Matlab-Simulink POWER ELEC 4d84149eca2fc

Ti liu hng dn matlab simulink thc hnh m phng in t cng sut
MC LC
1. Diode: ..................................................................................................... 4
1. Th vin: ....................................................................................................... 4
2. M t: ............................................................................................................ 4
3. Thng s v hp hi thoi:............................................................................ 5
4. Cc u vo v u ra: .................................................................................. 6
5. Cho php v gii hn: ................................................................................... 6
6. V d:............................................................................................................ 6
7. Kt qu m phng: ........................................................................................ 7
2. Thyristor .............................................................................................. 10
1. Th vin: ..................................................................................................... 10
2. M t: .......................................................................................................... 10
3. Hp hi thoi v cc thng s. .................................................................... 11
4. Cc u vo v u ra: ................................................................................ 13
5. Cho php v gii hn: ................................................................................. 14
6. V d:........................................................................................................... 14
7. Ni ring v b pht xung ng b vi ngun p....................................... 16
3. GTO...................................................................................................... 19
1. Th vin: ..................................................................................................... 19
2. M t: .......................................................................................................... 19
4. Hp hi thoi v cc thng s:.................................................................... 21
5. u vo v u ra:....................................................................................... 21
6. Cho php v gii hn: ................................................................................. 22
7. V d:........................................................................................................... 22
8. Kt qu m phng: ...................................................................................... 23
4. MOSFET.............................................................................................. 24
1. Th vin: ..................................................................................................... 24
2. M t: .......................................................................................................... 24
4. Cc u vo/ra:............................................................................................ 26
5. Cho php v gii hn: ................................................................................. 26
6.V d ............................................................................................................. 26
7. Kt qu m phng: ...................................................................................... 27
5. Ideal Switch ......................................................................................... 28
1. Th vin: ..................................................................................................... 28
4. u vo u ra: ........................................................................................... 30
5. Cho php v gii hn: ................................................................................. 30
6. V d ............................................................................................................ 30
7. Kt qu: ....................................................................................................... 31
6. IGBT..................................................................................................... 32
1. Th vin: ..................................................................................................... 32
GV. Trnh Quang Vinh - TH MC
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2. M t: .......................................................................................................... 32
3. Hp thoi v cc tham s: ........................................................................... 33
4. u vo/ra: .................................................................................................. 34
5. Cho php v hn ch: .................................................................................. 34
6. V d ........................................................................................................... 34
7. Kt qu: ....................................................................................................... 35
7. Cc cu thng dng: ........................................................................... 36
1. Th vin: ..................................................................................................... 36
2. M t: .......................................................................................................... 36
3. Cc loi cu: ................................................................................................ 36
4. Hp hi thoi va cc thng s:.................................................................... 38
5. u vo/ra: .................................................................................................. 40
6. Cho php v gii hn: ................................................................................. 40
7. V d:........................................................................................................... 40
8. Kt qu: ....................................................................................................... 42
8. o dng ................................................................................................ 44
1.Th vin: ...................................................................................................... 44
2. M t: .......................................................................................................... 44
3. Hp hi thoi v cc tham s: ..................................................................... 44
4. Tn hiu ra: .................................................................................................. 44
5. V d:........................................................................................................... 44
9. o p..................................................................................................... 45
1. Th vin: ..................................................................................................... 45
2. M t: .......................................................................................................... 45
4. Tn hiu ra: .................................................................................................. 45
5. V d:........................................................................................................... 46
10. ng h o a nng:......................................................................... 46
1. Th vin: ..................................................................................................... 46
2. M t: .......................................................................................................... 46
3. Du thng thng i vi in p v dng in:........................................ 47
4. Hp hi thoi v cc thng s ..................................................................... 48
5. V d:........................................................................................................... 49
11.C s v Simulink .............................................................................. 50
11.1 Khi ng Simulink ................................................................................ 50
11.2 Th vin User- Defined Functions.......................................................... 51
11.3 Th vin Sources..................................................................................... 52
11.4 Th vin Sinks ........................................................................................ 53
11.5 Th vin Signal Routing ......................................................................... 54
11.6 Th vin Signal Attributes ...................................................................... 56
11.7 Th vin Ports and Subsystems .............................................................. 56
11.8 Th vin Math Operations ...................................................................... 56
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11.9 Th vin Look- Up Tables...................................................................... 57
11.10 Th vin Discontinuities ....................................................................... 57
11.11 Th vin Continuous............................................................................. 57
12. Bi thc hnh m phng in t cng sut dnh cho sinh vin: . 58
12.1. Chnh lu 1 pha, chu k, khng iu khin, ti R-L-E:..................... 58
12.2. Chnh lu 1 pha, chu k, c iu khin, ti R-L-E: ........................... 59
12.3. Chnh lu 2 pha, chu k, khng iu khin, ti R-L-E:..................... 61
12.4. Chnh lu 2 pha, chu k, c iu khin, ti R-L-E: ........................... 62
12.5. Chnh lu 1 pha, hnh cu, khng iu khin, ti R-L-E:...................... 64
12.6. Chnh lu 1 pha, hnh cu, c iu khin, ti R-L-E: ............................ 65
12.7. Chnh lu 3 pha, hnh tia, khng iu khin, ti R-L-E: ....................... 67
12.8. Chnh lu 3 pha, hnh tia, c iu khin, ti R-L-E:.............................. 68
12.9. Chnh lu 3 pha, hnh cu, khng iu khin, ti R-L-E:...................... 70
12.10. Chnh lu 3 pha, hnh cu, c iu khin, ti R-L-E: .......................... 71
12.11. Chnh lu 3 pha, hnh cu, bn iu khin, ti R-L-E: ........................ 73
13. Cch pht xung iu khin Tiristor:............................................... 73
13.1. Khi Pulse generator: ............................................................................ 73
13.2. Cch to xung vi s hnh tia. ...................................................... 75
13.3. Cch to xung vi s hnh cu...................................................... 76
13.4. V d minh ho cch pht xung: ............................................................ 77
13.5. Ci tin cch pht xung vi mch chnh lu 3 pha, cu, c iu khin: 82

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1.
2.
3.
4.
5.
6.
7.
8.
CC THNH PHN IN T CNG SUT

Diode
M phng diode.
GTO
M phng Tiristor gate-turnoff (GTO).
Ideal Switch
M phng cng tc l tng.
IGBT
M phng transistor cch ly (IGBT).
MOSFET
M phng transistor trng.
Three-Level Bridge
NPC.
Thyristor
M phng Tiristor.
Universal Bridge
Cu bin i 3 pha.
1. Diode:
1. Th vin:
Power Electronics
2. M t:
Diode l mt thit b bn dn m c iu khin bng chnh in p Vak

v dng Iak ca chnh n. Khi mt diode c phn cc thun (Vak > 0), n s
bt u dn dng vi mt in p thun Vf nh i qua n. N kha khi dng
chy qua thit b tr thnh 0. Khi diode b phn cc ngc (Vak < 0), n bt u
trng thi off.
Khi Diode c m phng bng mt in tr, mt in cm v mt

ngun p mt chiu mc ni tip vi kha Diode. Hot ng ca kha ny c
iu khin bi in p Vak v dng Iak.

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Khi Diode cng cha vi mch ni tip Rs-Cs m c th c ni song
song vi diode (Gia cc cc A v K).
3. Thng s v hp hi thoi:
+ Resistance Ron - in tr thng Ron. in tr thng Ron khng th

c t v 0 khi m thng s in cm thng Lon c t v 0.
+ Inductance Lon - in cm thng Lon (H). in cm thng Lon khng
th c t v 0 khi m in tr Ron c t v 0.
+ Forward voltage Vf - ip p thun diode device (V).
+ Initial current Ic - t dng khi im chy bn trong device. N
thng c t v 0 ct bt u m phng vi khi Diode ny. Nu nh
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dng khi im IC c t bng gi tr ln hn 0, tnh ton v trng thi
steady-state ca SimPowerSystems cp ti trng thi khi im ca Diode
khi ng.Khi to tt c cc trng thi ca b bin i cng sut l mt cng
vic rt phc tp. Cho nn la chn ny ch vi cc mch n gin.
Snubber resistance Rs - in tr xung. t in tr xung bng v cng
loi tr xung khi khi m phng.
Snubber capacitance Cs - in cm xung (F). t in tr xung bng 0
loi tr xung khi khi m phng.
Show measurement port - Nu c la chn, s thm vo u ra ca
khi m phng tr v gi tr dng v p ca diode.
4. Cc u vo v u ra:
- m : L mt vector cha 2 tn hiu. Bn c th phn knh cc tn hiu
ny bng cch s dng mt Bus Selector block c cung cp trong th vin
the Simulink library
Tn hiu
Chc nng
n v
1
Dng Diode
A
2
in p Diode
V
5. Cho php v gii hn:
Khi Diode thc hin mt macro m hnh ca thit b Diode.N khng
c ly vo trong c tnh hnh hc hay th tc vt l phc tp ca thit b nm
di cc thay i trng thi [1]. Dng r (leakage current) trong trng thi kha
v dng hi phc ngc (reverse-recovery) (m) khng c cp. Trong
phn ln cc mch, dng ngc khng nh hng ti c tnh ca b bin i
hay cc thit b khc.
Ph thuc vo gi tr ca in cm thng Lon, diode c m hnh hoc
nh mt ngun dng (Lon > 0), hoc nh mt mch topology circuit thch hp
(Lon = 0). Khi Diode khng th ni tip vi mt in cm, mt ngun dng
hay mt mch h tr khi s mch snubber ca n c s dng. xem phn
Improving Simulation Performance bit thm chi tit v vn ny.
Bn phi s dng thut ton tch phn cng m phng cc mch c
chc cc diodes. ode23tb hoc ode15s vi cc thng s mc nh thng cho ta
tc m phng tt nht.
in cm Lon thng c p v 0 nu bn la chn khng to ra
(discretize) mch ca bn.
6. V d:
Demo Diode cng sut chng minh cho mt chnh lu chu k c cha
khi Diode, khi ti RL v mt khi ngun xoay chiu AC.
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7. Kt qu m phng:

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2. Thyristor
1. Th vin:
Power Electronics
2. M t:
Thyristor l mt thit b bn dn m c th thng nh mt tn hiu vo cng

gate. M hnh Thyristor c m t bao gm mt in tr thng Ron, in cm
thng Lon, v mt ngun p mt chiu Vf, mc ni tip vi mt kha. Kha ny
c iu khin bi mt tn hiu logical ph thuc vo in p Vak, dng Iak,
v tn hiu cng gate g.
Khi Thyristor cng cha mt mch ni tip Rs-Cs snubber m c th ni song

song vi thit b thyristor.
c tnh dng p tnh VI ca m hnh ny c trnh by nh sau:

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Thyristor thng khi in p anode-cathode Vak ln hn in p Vf v mt tn

hiu xung dng c a vo chn gate (g > 0). cao xung phi ln hn 0 v
di cho php dng anode Tiristor ln hn dng cht (dng gi) Il.
Thyristor khoa khi dng trn n v 0 (Iak = 0) v in p m xut hin gia cc
anode v cathode trong thi gian t nht bng thi gian kha Tiristor Tq. Nu
nh in p ny dng trong khong thi gian thp hn Tq, th Tiristor s t
ng thng tr li ngay c khi tn hiu gate l thp (g = 0) v dng anode thp
hn dng cht (dng gi). Hn na, nu nh trong sut thi gian chun b
thng, bin dng ca thit b nh di mc dng cht c t trong hp hi
thoi th Tiristor s kha sau khi tn hiu gate tr v thp (g = 0).
Thi gian kha Tq c trng cho thi gian hi phc ht mang: N chnh l
khong thi gian gia dng anode tc thi gim v 0 v ngay lp tc khi m
Tiristor c th chu c in p dng Vak m khng xy ra hin tng m tr
li.
3. Hp hi thoi v cc thng s.
M hnh Thyristor v m hnh Thyristor chi tit:
Ct ti u ha tc m phng, hai m hnh Tiristor loi ny u ph hp.
i vi m hnh Tiristor, dng cht Il v thi gian hi phc Tq c cho bng
0.

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+ in tr Ron
in tr thng Ron, khng th t bng 0 khi in cm Lon c t bng 0.
+ in cm Lon
in cm thng Lon khng th t bng 0 khi in tr thng c t bng 0.
+ in p thun Vf
in p thun ca Tiristor tnh theo n v V.
+ Dng khi im Ic
Khi thng s im cm thng Lon ln hn 0, bn c th xc nh mt dng khi
im chy trong thyristor. N thng c t bng 0 ct bt u m phng
vi khi Tiristor.
Bn c th xc nh gi tr dng khi im Ic tng ng vi trng thi c th
ca mch. Trong trng hp ny, tt c cc trng thi ca mch tuyn tnh phi
c t theo. Khi to tt c cc trng thi ca b bin i in t cng sut l
mt nhim v phc tp. Cho nn ch hu ch vi cc mch n gin.
+ in tr Snubber Rs
t in tr snubber thnh v cng loi b snubber khi m hnh.

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+ Snubber capacitance Cs: t in cm Snubber Cs thnh 0 loi b
snubber, hoc v cng tm mt in tr resistive snubber.
+ Show measurement port: Nu c la chn, s thm u ra m phng tr
v dng v p Tiristor.
+ Latching current Il: Dng in cht ca m hnh Tiristor c th.

+ Turn-off time Tq: Thi gian kha Tq ca m hnh Tiristor c th.
4. Cc u vo v u ra:
- g: Tn hiu iu khin Thyristor.
- m: L mt vector cha 2 tn hiu. Bn c th phn knh cc tn hiu ny bng
cch s dng mt Bus Selector block c cung cp trong th vin the
Simulink library
Tn hiu
Chc nng
n v
1
Dng Tiristor
A
2
in p Tiristor
V
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Khi Tiristor thc hin mt macro m hnh ca thit b Tiristor thc t. N
khng c ly vo trong c tnh hnh hc hay x l vt l phc tp ca thit b
m m phng hnh vi ca thit b [1, 2]. in p nh thng v gi tr gii hn
ca in p anode-cathode khng c cp trong m hnh.
Ph thuc vo in cm thng Lon, khi Thyristor c m t nh mt ngun
dng (Lon > 0) hoc nh mt mch in topology thch hp (Lon = 0). Xem
Improving Simulation Performance bit thm chi tit.
Khi khi Thyristor c m hnh nh mt ngun dng, n khng th c ni
tip vi mt in cm, mt ngun dng hoc mt mch h tr khi mch
snubber c s dng.
Khi m phng mt m hnh lin tc, bn phi dng mt thut ton tch phn
cng m phng mch c cha Tiristor. ode23tb hoc ode15s vi cc thng s
mc nh lun cho tc m phng tt nht.
in cm thng Lon b p v 0 nu nh bn chn discretize mch ca
bn.your circuit.
6. V d:
Trong demo thyristor cng sut vi chnh lu 1/2 chu k c s dng nui
cho ti RL. Xung chn gate c cp bi b pht xung pulse generator ng b
vi ngun p. Cc tham s c s dng nh sau:

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Gc pht xung c bin i bng mt b pht xung pulse generator ng b
vi ngun p. Chy m phng v quan st dng/p ti cng nh dng/p
Tiristor.

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7. Ni ring v b pht xung ng b vi ngun p
+ Step Fcn:
+ Step Fcn1:

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+ Step Fcn3:
+ Step Fcn4:
+ Step Fcn5:

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+ Memory:
+ Th1:

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+ Repeating sequence:
3. GTO
1. Th vin:
Power Electronics
2. M t:
Tiristor GTO l mt thit b bn dn m c th kha/thng nh tn hiu iu

khin chn cc gate. Ging nh thyristor thng thng, Tiristor GTO c th
thng bng mt xung dng (g > 0). Tuy nhin khng ging nh Tiristor thng
m ch c th kha khi dng v 0, Tiristor GTO c th kha ti bt k thi im
no bng cch a tn hiu xung cc gate bng 0.
Tiristor GTO tng ng vi mt in tr Ron, im cm Lon, v mt ngun
p Vf mc ni tip. Van cng sut c iu khin bi tn hiu logic ph thuc
vo in p Vak, dng Iak, v tn hiu xung g.

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Vf, Ron, v Lon l cc thng in p thun khi dn, in tr thng v in cm
thng. GTO cng chc cp ni tip Rs-Cs c th c ni song song vi GTO
(gia cc A v K).
Tiristor GTO c th thng khi in p anode-cathode ln hn in p Vf v mt
xung dng c t vo chn gate (g > 0). Khi tn hiu gate t v 0, Tiristor
GTO bt u kha nhng dng n khng v 0 ngay lp tc.
Bi v dng qu trnh trit tiu dng ca GTO nh hng ng k ti tn tht
kha, cho nn c tnh kha c xy dng vo m hnh ny. Dng suy gim c
th chia lm 2 phn. Khi tn hiu gate v 0, trc tin dng Iak gim t gi tr
Imax (Gi tr ca Iak khi GTO bt u thng) ti Imax/10, trong sut thi gian
gim(Tf), v sau t Imax/10 v 0 trong sut thi gian cui (Tt). GTO kha
khi dng Iak v 0. Dng in cht (latching) v dng in gi (holding) khng
c cp.

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4. Hp hi thoi v cc thng s:
+ Resistance Ron : in tr thng.

+ in cam thng Lon: C th t bng 0.
+ Forward voltage Vf: in p thun ca thit b Tiristor GTO.
+ Current 10% fall time: Thi gian gim dng Tf (s).
+ Current tail time: Thi gian tail dng Tt (s).
+ Initial current Ic: Dng ban u.
Bn c th t dng ban u cho Tiristor GTO. Thng th c t bng 0.
Nu nh thng s dng ban u t gi tr ln hn 0, th tnh ton trng thi
steady-state ca SimPowerSystems cp ti trng thi ban u GTO khi kha.
Khi to tt c cc trng thi ca b bin i cng sut l mt nhim v phc
tp. Cho nn, la chn ny ch hu ch vi cc mch n gin.
+ Snubber resistance Rs: in tr snubber. t bng v cng loi b
+ Snubber capacitance Cs: T in snubber. t bng 0 loi b hoc bng v
cng t mt in tr snubber.
+ Show measurement port: Nu c la chn, s thm u ra vo khi tr
li cc dng v p GTO.
5. u vo v u ra:
g Tn hiu m phng iu khin chn gate ca GTO.

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m - u ra l mt vector vi 2 tn hiu. Bn c th demultiplex cc tn
hiu ny bng cch s dng khi Bus Selector block oc cung cp trong th
vin Simulink library.
Tn hiu
Chc nng
n v
1
Dng GTO
A
2
in p GTO
V
Khi GTO thc hin mt macro m hnh ca thit b GTO .N khng c ly
vo trong c tnh hnh hc hay th tc vt l phc tp ca thit b nm di cc
thay i trng thi [1].
Khi GTO yu cu cp lin tc tn hiu vo chn gate (g > 0) n thng (Vi
Iak > 0). Dng cht v dng gi khng cp y. Cc gi t gii hn ca
in p anode-cathode khng c cp.
Khi GTO c m phng nh mt ngun dng. N khng th c ni tip
vi in cm, ngun dng hay mt mch h tr khi ngun mch snubber ca n
c s dng. trnh cc vng algebraic, bn khng th t in cm Lon v
0.
Mi khi GTO thm trng thi extra vo m hnh mch in. Mch cha khi
GTO khng th c discretized. Ct mch discretize s dng b bin i
GTO, sr dng khi Universal Bridge hoc khi Three-Level Bridge. Xem
Improving Simulation Performance bit thm chi tit v vn ny.
Bn phi s dng thut ton tch phn cng m phng cc mch chc khi
GTO. ode23tb hoc ode15s vi cc thng s mc nh s cho tc m phng
tt nht.
7. V d:
Demo power_buckconv minh chng s dng khi GTO. Mch snubber cha t
in Cs, in tr Rs, v diode Ds. in cm Ls ca mch snubber cng c
quan tm.
Tham s ca khi GTO (Rs = inf; Cs = 0). Tn s ng ct 1000 Hz v rng
xung 2160 (duty cycle: 60%).

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8. Kt qu m phng:

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4. MOSFET
1. Th vin:
Power Electronics
2. M t:
MOSFET l thit b bn dn iu khin bng tn hiu gate (g > 0) nu nh dng

Id dng (Id > 0). MOSFET ni song song vi mt Diode trong m thng khi
MOSFET phn cc ngc (Vds < 0). M hnh ny c m hnh nh mt khi
ni tip vi in tr (Rt) v in cm (Lon) vi van c iu khin bng tn
hiu logic (g > 0 hoc g = 0).

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MOSFET thng khi in p drain-source l dng v tn hiu dng
oc a vo chn gate (g > 0).
Vi dng dng chy qua thit b, MOSFET kha khi tn hiu gate vo
tr v 0. Nu nh dng Id l m (Id chy trong Diode trong) v khng c tn
hiu (g = 0), MOSFET s kha khi dng Id tr v 0 (Id = 0).
Ch : in tr Rt ph thuc vo hng dng drain: Rt = Ron nu Id > 0,
trong Ron th hin gi tr in tr dn thun ca MOSFET. Rt = Rd nu nh
Id < 0, trong Rd th hin in tr ca Diode trong.
Khi MOSFET cng cha mt mch ni tip Rs-Cs c th c ni song
sng vi MOSFET (gia cc cc d v s)

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+ Resistance Ron: in tr thng Ron.
+ Inductance Lon: in cm Lon (H). in cm Lon khng th c t v 0.
+ in tr trong diode Rd.
+ Initial current Ic: Bn c th t dng ban u chy trong MOSFET. Ngi ta
thng t v 0 ct bt u m phng vi khi ny.
Nu nh thng s dng khi u IC c t ln hn 0, tnh ton trng thi
steady-state ca SimPowerSystems cp ti trng thi ban u MOSFET khi
ng. Khi to tt c cc trng thi ca b bin i cng sut l mt nhim v
phc tp. Cho nn ch ng dng vi cc mch n gin.
+ Snubber resistance Rs: in tr snubber. t bng v cng loi khi m
hnh.
+ Snubber capacitance Cs: T in snubber (F). t bng 0 loi b hoc v
cng c mt in tr snubber.
+ Show measurement port: Nu c la chn n tr li vector dng v p.
4. Cc u vo/ra:
g tn hiu iu khin ng/m MOSFET.
m - Xut ra vect dng/p.
Tn hiu
1
2
Chc nng
Dng MOSFET
p MOSFET
n v
A
V

Khi MOSFET thc hin mt macro m hnh ca thit b MOSFET .N khng
c ly vo trong c tnh hnh hc hay th tc vt l phc tp ca thit b nm
di cc thay i trng thi [1].
Khi MOSFET c m phng nh mt ngun dng. N khng th c ni
tip vi in cm, ngun dng hay mt mch h tr khi ngun mch snubber
ca n c s dng. trnh cc vng algebraic, bn khng th t in cm
Lon v 0.
Mi khi MOSFET thm trng thi extra vo m hnh mch in. Mch cha
khi GTO khng th c discretized. Tuy nhin discretization c cho php
vi cu MOSFET/Diode c m phng cng vi Universal Bridge block hoc
Three-Level Bridge block.
tt nht.
6.V d
Demo power_mosconv chng minh cch s dng MOSFET trong b bin i
van zero-current quasi-resonant. Trong b bin i nh th ny, dng sinh ra
bi mch dao ng Lr-Cr chy qua MOSFET v Diode trong. Dng m chy

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qua Diode trong m kha ti dng 0 [1]. Tn s ng/ct l 2 MHz v rng
xung 720 (duty cycle: 20%).
7. Kt qu m phng:

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5. Ideal Switch
1. Th vin:
Power Electronics
2. M t:
Khi Ideal Switch khng tng ng vi thit b vt l trong thc t. Khi s dng
vi logic ng van thch hp, n c th c dng m hnh cc thit b bn
dn n gin nh GTO hay MOSFET, thp ch c cu dao cng sut vi dng
ct. Van ny oc m phng bng in tr thng Ron ni tip vi van c iu
khin bng tn hiu logic vo chn cng gate g.

- 28 -

Khi Ideal Switch c iu khin 2 chiu bi tn hiu gate (g > 0 hoc g =
0). N c cc c tnh sau: Bt k phn cc thun hay ngc u c dng chy
qua bng 0 nu nh g = 0. Dn dong theo c 2 hng vi in p ti quasi-zero;
khi m g > 0 van ngay lp tc chuyn t on sang off.
Khi Ideal Switch thng khi mt tn hiu dng c a vo chn gate (g > 0).
Kha khi tn hiu chn gate bng 0 (g = 0).
Khi Ideal Switch cng chc mch ni tip Rs-Cs snubber m c th ni song
song vi ideal switch (gia cc 1 v 2).

- 29 -

+ Internal resistance Ron: in tr trong ca van). Khng th c t v 0.
+ Initial state: Trng thi ban u ca khi Ideal Switch. Trng thi ban u ca
Ideal Switch c a vo tnh ton trong steady-state calculation ca
SimPowerSystems.
+ Snubber resistance Rs: t v cng loi b.
+ Snubber capacitance Cs: t 0 loi b.
+ Show measurement port: Nu c la chn, n s thm vo khi u ra
tr v gi tr dng/p.
4. u vo u ra:
g Tn hiu m phng iu khin ng m van.
m - Vector dng/p ra.
Tn hiu
Chc nng
n v
1
Dng Ideal switch
A
2
p Ideal switch
V
Khi Ideal Switch c m phng nh mt ngun dng. N khng th c ni
tip vi in cm, ngun dng hay mt mch h tr khi ngun mch snubber
ca n c s dng.
Xem Improving Simulation Performance bit thm chi tit.
tt nht.
6. V d
Demo power_switch s dng khi Ideal Switch ng mt mch RLC vi mt
ngun xoay chiu AC (60 Hz). Van, m ban u c kha, c m u tin
ti t = 50 ms (3 chu k) v sau c kha li ti t = 138 ms (8.25 chu k).
Khi Ideal Switch c in tr 0.01 ohms v khng snubber c dng.

- 30 -

7. Kt qu:

- 31 -
6. IGBT
1. Th vin:
Power Electronics
2. M t:
Khi IGBT m t mt thit b bn dn m c iu khin bi tn hiu gate.

IGBT c m hnh bng s ni tip in tr thng Ron, in cm thng Lon,
v ngun p mt chiu Vf ni tip vi van c iu khin bi tn hiu logic (g
> 0 hoc g = 0)
IGBT thng khi in p collector-emitter l dng v ln hn in p Vf v tn

hiu dng c a vo chn gate (g > 0). N kha khi in pcollectoremitter dng v tn hiu 0 c a vo chn gate (g = 0).
IGBT kha khi in p collector-emitter m. Ch rng rt nhiu IGBT khng
c reverse blocking capability. Cho nn, chng s dng vi Diode chng song
song.
Khi IGBT c cha Rs-Cs snubber m ni song song vi IGBT (gia cc C v
E).

- 32 -

c tnh kha ca m hnh IGBT xp x bng 2 phn on. Khi tn hiu gate v
0, dng collector gim t Imax v 0.1 Imax trong thi gian gim (Tf), v t 0.1
Imax v 0 trong thi gian tail time (Tt).
3. Hp thoi v cc tham s:

- 33 -

+Resistance Ron: in tr thng.
+ Inductance Lon: in cm thng. Khng th t v 0.
+ Forward voltage Vf: in p thun.
+ Current 10% fall time: Thi gian gim dng Tf (s).
+ Current tail time: Thi gian tail dng Tt (s).
+ Initial current Ic: Bn c th t dng khi u chy trong IGBT. N thng
c t v 0 thc hin m phng. Nu nh thng t ln hn 0, cc tnh
ton trng thi steady-state ca SimPowerSystems cp ti trng thi ban u
ca IGBT khi m IGBT ng. Vic khi to tt c cc trng thi khi u ca
cc b bin i cng sut l nhim v phc tp. Cho nn, la chn ny ch hu
ch vi mch n gin.
+ Snubber resistance Rs: in tr snubber. t bng v cng loi b.
+ Snubber capacitance Cs: T snubber. t t Snubber Cs bng 0 loi b,
hoc bng v cng t in tr snubber.
+ Show measurement port: Nu c la chn, thm u ra m phng cho
dng/p/
4. u vo/ra:
g Tn hiu m phng iu khin ng/m IGBT.
m - Xut vector dng/p.
Tn hiu
Chc nng
n v
1
Dng IGBT
A
2
p IGBT
V
5. Cho php v hn ch:
Khi IGBT thc hin mt macro m hnh ca thit b IGBT.N khng c ly
vo trong c tnh hnh hc hay th tc vt l phc tp ca thit b nm di cc
thay i trng thi [1].
Khi IGBT c m phng nh mt ngun dng. N khng th c ni tip
vi in cm, ngun dng hay mt mch h tr khi ngun mch snubber ca n
c s dng. trnh cc vng algebraic, bn khng th t in cm Lon v
0.
Xem Improving Simulation Performance bit thm chi tit.
Mch cha khi IGBT khng th c discretized. Ct mch discretize s
dng b bin i IGBT, s dng khi Universal Bridge hoc khi Three-Level
Bridge. Xem Improving Simulation Performance bit thm chi tit v vn
ny.
tt nht.
6. V d
Demo power_igbtconv minh chng cch s dng ca khi IGBT trong b bin
i DC-DC. IGBT c ng/m vi tn s 10 kHz truyn nng lng t

- 34 -

ngun mt chiu DC sang ti (RC). Gi tr trung bnh in p ra (VR) l mt
hm ca duty cycle () ca van IGBT:
Trong v d ny, = 0.5 c gi tr theo l thuyt VR l 200 V, cho rng

khng c in p ri qua Diode v IGBT.
7. Kt qu:
Chy m phng v quan st dng cm (IL), dng collector IGBT (IC), dng
Diode (ID), in p collector-emitter IGBT (VCE), v in p ti (VR).
in p ti (197 V) gim hn mt cht thp hn gi tr l thuyt (200 V) bi v
in p thun (Vf) ca diode (0.8 V) v ca IGBT (Vf = 1 V)

- 35 -
7. Cc cu thng dng:
1. Th vin:
Power Electronics
2. M t:
Cc khi cu thng dng thc hin mt b bin i cng sut 3 pha thng dng,
bao gm 6 van cng sut ni li vi nhau thnh mt cu trc cu. Loi van cng
sut v cu trc b bin i c la chn t hp hi thoi.
Khi cu thng dng cho php m phng cc b bin i s dng c hai loi
thit b kha t nhin (diodes hoc thyristors) v c thit b kha cng bc
(GTO, IGBT, MOSFET).
Cc khi cu thng dng l cc khi c bn dnh cho vic to ra cc b bin i
ngun p 2 cp (VSC).
3. Cc loi cu:
a) Cu Diode:
b) Cu Thyristor:

- 36 -

c) Cu GTO-Diode:
d) Cu IGBT-Diode:
e) Cu MOSFET-Diode v cu Ideal Switch:
Ch : S cc thit b l khc nhau nu nh c thit b cng sut l kha t nhin

hay kha cng bc. i vi thit b kha t nhin, s theo s sp t t nhin.
- 37 -

4. Hp hi thoi va cc thng s:
a) S c cc tay cu - Number of bridge arms

+ t l 1 hoc 2 c c b chuyn i 1 pha (2 hoc 4 van cng sut).
+ t 3 c c b chuyn i 3 pha ni trong cu trc cu Graetz (6 van
cng sut).
b) in tr Snubber Rs
+ t Rs=inf loi b thnh phn snubbers.
c) T in Snubber Cs
+ t t in Snubber Cs=0 loi b snubbers, hoc bng inf thu c mt
resistive snubber.
+ Ct trnh cc dao ng khi h thng ca bn c discretized, bn cn t
gi tr Rs v Cs cho cu diode v thyristor.
+ i vi cc van kha cng bc (GTO, IGBT, hay MOSFET), cu phi tha
mn thun tr snubbers trong lc xung m tc ng n van.
+ Nu nh xung m van cng bc b kha, ch cc Diode chng hot ng
ng thi hot ng, v cu hot nh mt b chnh lu Diode. Trong iu kin
thch hp gi tr Rs v Cs phi c sr dng.
+ Khi h thng c discretized, s dng cc thng s sau y xc nh gi
tr xp x ca Rs v Cs:
- 38 -
Trong
Gi tr Rs v Cs c xc nh da trn 2 tiu ch sau: Dng d snubber ti tn

s c bn thp hn 0.1% dng danh nh khi van khng dn. Hng s thi gian
RC ca snubbers ln hn 2 ln thi gian trch mu sample time Ts. Cc gi tr
Rs v Cs m bo tnh n nh s cho cu discretized bridge c th khc so vi
cc gi tr thc t trong mch tht.
+ Power electronic device: La chn loi van.
+ Ron: in tr thng.
+ Lon: in cm thng: i vi diode hoc thyristor. Khi cu c discretized,
tham s Lon phi c t v 0.
+ Forward voltage Vf: Thng s ny ch ph hp khi thit b cng sut c la
chn l Diode v Tiristor. in p thun (V), qua thit b khi n ang dn. in
p thun [Device Vf, Diode Vfd]
Thng s ny l ph hp khi van la chn l GTO/Diodes hoc
IGBT/Diodes.
Forward voltages ca van cng bc (GTO, MOSFET, hoc IGBT) v ca
cc Diode chng song song.
+ [Tf (s) Tt (s)]: Thi gian gim Tf v thi gian tail Tt (s), cho van GTO hoc
van IGBT.
+ Measurements
La chn Device voltages o in p qua 6 cc van cng sut.
La chn Device currents o dng chy qua 6 van cng sut. Nu nh cc
Diode chng song song c s dng, dng c o l tng dng trong van m
cng bc (GTO, MOSFET, hay IGBT) v trong Diode chng song song. Cho
nn mt dng dng xc nh mt dng ang chy trong van cng bc v mt
dng in m xc nh mt dng chy trong diode. Nu nh thit b snubber
c xc nh thid dng o c l cc dng m ch chy qua cc van cng
sut.
La chn in p UAB UBC UCA UDC o in p cc cc (AC v DC) ca
khi Universal Bridge.
La chn tt c cc in p v dng in o tt c in p v dng in c
nh ngha trong khi Universal Bridge.
t mt khi Multimeter trong m hnh ca bn hin th cc o lng c
la chn trong qu trnh m phng. Trong menu o lng ph hp ca khi
Multimeter block, o lng c xc nh bng mt nhn theo tn ca khi.
- 39 -
5. u vo/ra:
g tn hiu gate iu khin van. Xung sp t trong vector ca tn hiu
gate tng ng vi s van c xc nh trong 6 mch trnh by trong mc m
t. i vi cu diode v thyristor, xung sp t tng ng sp t t nhin ca
commutation. i vi tt c cc van cng bc, cc xung c gi ti cc van
cap hn v thp hn ca pha A, B v C.

Khi Universal Bridge c th c discretized cho s dng trong m phng
bc thi gian gin on. Trong trng hp ny, logic commutation trong ca
Universal Bridge quan tm ti commutation gia cc van cng sut v diodes
trong mc chuyn i. Trong vic xy dng b bin i vi cc van cng bc
(GTOs, MOSFETs, IGBTs), discretization ca m hnh l khng ph hp. Xem
Improving Simulation Performance bit thm chi tit.
7. V d:
Demo power_bridges minh chng cho cch s dng ca 2 b Universal Bridge
blocks trong mch bin i ac/dc/ac bao gm chnh lu nui ti bin tn IGBT
thng qua ghp ni mt chiu. Bin tn cung vi iu ch rng xung (PWM)
sinh ra in p sin 3 pha 50 Hz ti ti. Trong v d ny bin tn thay i nhanh
vi tn s 2000 Hz.
IGBT c iu khin vi b iu khin PI ct duy tr 1 in p p.u. (380

V/ms, 50 Hz) ti cc cc ti.
Mt khi Multimeter c dng quan st commutation ca cc dng gia
diodes 1 v 3 trong cue diode v gia van IGBT/Diodes 1 v 2 trn cu IGBT.
- 40 -

- 41 -
8. Kt qu:
Bt u m phng. Sau qung thi gian xp x 40 ms, h thng t trng thi
steady state. Quan st dng sng p ti DC bus, gi tr ra inverter, v ti trn
Scope1. Harmonics c pht ra bi bin tn quan multiples 2 kHz c lc bi
b lc LC. Khi gi tr xung ti t 537 V (380 V RMS).
Trong trng thi steady state, ch s iu bin m = 0.77, v in p DC l 780 V.
Thnh phn c bn ca in p 50 Hz l
Vab = 780 V * 0.612 * 0.80 = 382 V RMS
Quan st dng Diode trn Scope2, ch ra t diode 1 ti diode 3. Cng quan st
dmg trace 2 trn van 1 v 2 ca cu IGBT/Diode (van cao hn v thp hn ni
ti pha A). Hai dng ny b sung cho nhau. Mt dng dng xc nh dng
chy trong IGBT, ngc li dng m xc nh mt dng chy trong Diode
chng song song.
- 42 -

- 43 -
8. o dng
1.Th vin:
Measurements
2. M t:
Khi o dng c dng o dng tc thi chy trong bt k khi in hoc

dng dy no. u ra m phng cung cp tn hiu m phng m c th s dng
cho khi m phng khc.
3. Hp hi thoi v cc tham s:
4. Tn hiu ra:
+ Xc nh dnh dng tn hiu ra khi khi ny c s dng trong m phng
mt pha. Thng s tn hiu ra khng cho php khi khi khng c s dng
trong m phng 1 pha. M phng mt pha c tch cc bng khi Powergui
t trong m hnh ny.
+ t Complex tn hiu ra o c c dng gi tr complex.
+ t Real-Imag l phn thc v o ca dng o c. Tn hiu ra l mt
vector 2 thnh phn.
+ t Magnitude-Angle ra bin v tn s ca dng o. Tn hiu ra l mt
vector 2 thnh phn.
+ t Magnitude xut ra bin ca dng o c. Tn hiu ra l mt gi
tr n.
5. V d:
Demo o dng s dng 4 khi o dng c cc dng nhnh khc nhau trong
mch. 2 scope hin th cng dng.
- 44 -
9. o p
1. Th vin:
Measurements
2. M t:
Khi o p Voltage Measurement block o in p tc thi gia 2 cc in. u

ra cung cp tn hiu m phng m c th c s dng cho mt khi mo phng
khc.
4. Tn hiu ra:
+ Xc nh dnh dng tn hiu ra khi khi ny c s dng trong m phng mt
pha. Thng s tn hiu ra khng cho php khi khi khng c s dng trong
m phng 1 pha. M phng mt pha c tch cc bng khi Powergui t
trong m hnh ny.
+ t Complex tn hiu ra o c c dng gi tr complex.

- 45 -

+ t Real-Imag l phn thc v o ca p o c. Tn hiu ra l mt vector 2
thnh phn.
+ t Magnitude-Angle ra bin v tn s ca p o. Tn hiu ra l mt
vector 2 thnh phn.
+ t Magnitude xut ra bin ca p o c. Tn hiu ra l mt gi tr
n.
5. V d:
Demo s dng 3 khi o p c in p.
10. ng h o a nng:
1. Th vin:
Measurements
2. M t:
Khi Multimeter c s dng o in p v dng in trong o lng c

m t trong hp hi thoi ca cc khi SimPowerSystems.
Cc khi powerlib lit ra trong bng sau c mt tham s c bit
(Measurements) m cho php bn o in p hoc dng lin quan ti khi .
La chn in p hay dng in thng qua tham s o lng ny tng ng
vi vic ni mt khi o in p hoc dng in trong bn trong cc khi ca

- 46 -

bn. Cc tn hiu o c c th c quan st qua mt khi Multimeter c
t trong mch ca bn.
Li khi Multimeter vo trong h thng mc cao nht trong mch ca bn v
knick p ln icon m hp hi thoi.
3. Du thng thng i vi in p v dng in:

Khi bn o mt dng in s dng mt khi o dng, chiu dng ca dng
in c xc nh ngay trn biu tng khi (Dng dng t cc + ti cc -).
Tng t nh vy khi bn o in p. Tuy nhin, khi in p v dng in ca
khi t th vin Elements c o s dng khi Multimeter, cc tnh in p v
dng in khng r rng ngay lp tc bi v cc khi c th c quay v khng
c du xc nh cc tnh ngay trn biu tng ca khi.
Khng ging cc ng tn hiu, cc u vo, u ra, ng kt ni m hnh vt
l v cc chn tn hiu ca SimPowerSystems thiu bn cht thc mt cch trc
tip. Cc tnh in p v dng c xc nh, khng phi bi chiu ca ng
tn hiu, nhng thay vo l ta theo khi. tm ta mt ta theo khi, trc
ht phi click vo khi la chn n. Sau vo cc lnh sau y:
get_param(gcb,'Orientation')
Bng sau xc nh cc cc tnh ca dng v p c o vi khi Multimeter
block cho cc i tng mt pha v ba pha RLC (branches hoc loads), surge
arresters, v single-phase v three-phase breakers. Bng cng xc nh cc cc
tnh cc bin trng thi ca chng (xc nh dng v in p t).

- 47 -
i vi bin p mt pha (tuyn tnh hoc bo ha), vi cc kt ni winding xut

hin cnh bn tri v cnh bn phi, in p winding l in p ti nh kt ni
vi cnh y kt ni bt k chiu no ca khi (phi hay tri). Dng winding l
dng vo trn nh ca kt ni.
i vi bin p 3 pha, cc tnh in p v dng c xc nh bng nhn tn
hiu c s dng trong Multimeter block. V d, Uan_w2 = in p so vi
trung tnh ca pha A ca Y c ni vi winding #2, Iab_w1 = dng winding
chy t A sang B trong cun dy winding ni tam gic #1.
4. Hp hi thoi v cc thng s

- 48 -

5. V d:

- 49 -
11.C s v Simulink
Simulink l phn chng trnh m rng ca Matlab dng m phng h
thng v kho st cc h thng ng hc. Simulink cung cp cho ngi s dng mt
th vin rt phong ph, c sn cc khi chc nng thuc v nhiu lnh vc khc
nhau, c th kho st h thng tuyn tnh, phi tuyn cng nh gin on. Ngi s
dng c th to cc khi chc nng ring ty theo mc ch s dng.
11.1 Khi ng Simulink
thc hin cng vic trong Simulink, trc ht cn khi ng Matlab. G
lnh Simulink trn Command Windows hoc click vo biu tng simulink trn
toolbar.
Sau
khi
gi
lnh
Simulink, ca s th vin
Simulink xut hin nh hnh 2.1
bao gm cc th vin con:
Continuous,
Sources,
Discontinuities,
Sinks,
Operations,
Functions,
Math
User-Defined
Signal
Attributes,
Signal Routing...
s dng cc khi
trong th vin, chn File New
Model, to ra ca s mi.
Hnh 11.1
Tu theo mc ch s dng m
chn cc khi c chc nng
tng
ng
Simulink.

- 50 -
trong th vin
Ngi s dng c th i tn ca cc khi trong m hnh ang s dng, tuy

nhin mi tn c s dng mt ln. Ngi s dng cng c th thay i cc thng
s ca cc khi bng cch nhy kp chut tri vo khi cn thay i.
M hnh Simulink:
T ca s th vin Simulink hay t ca s truy cp th vin, vic to cc ca
s m phng tht n gin: File New Model hoc m files c sn: File
Open hoc lu gi file ang hin hnh: File Save (Save as).
- Sao chp: c th s dng cc khi chc nng trong th vin, ta dng
chut gp khi cn s dng trong th vin, sau th khi vo ca s son
tho.
- Di chuyn: C th di chuyn cc khi trong ca s son tho mt cch d
dng nh phm chut tri.
- nh du: Gi phm Shift kt hp vi phm chut tri nh du cc
khi tu theo yu cu ca ngi s dng.
- Xo: Ngi s dng c th xo cc khi ang lm vic bng cch nh
du vo khi cn xa, sau n phm Delete.
- H thng con: Chn cc khi c quan h chc nng vi nhau, chn
EditCreate Subsystem to thnh h thng con.
- Ni cc khi: Dng phm chut tri nhy vo u ra ca khi, gi phm
chut tri ri ko n u vo ca khi cn ni.
- Kch c v dng d liu ca tn hiu: T Menu chn Format Signal
Dimensions s hin th kch c ca tn hiu i qua ng ni.
11.2 Th vin User- Defined Functions
Cn khai bo mt hm vo khi Fcn, bin l tn hiu vo (k hiu l
u), tn hiu ra l kt qu ca hm khai bo.
- 51 -

Khi MATLAB Fcn l mt dng m rng ca khi Fcn. Ti khi
MATLAB Fcn, c th khai bo mt biu thc hay mt hm Matlab
(vit di dng M-File) ca bin.
11.3 Th vin Sources
Khi Constant to hng s khng ph thuc vo thi gian.
Hng s c th l scalar, vct hay ma trn, tu theo cch khai
bo Constant value v Interpret vector parameters as 1-D c
c chn hay khng. Nu Interpret vector parameters as 1-D
c chn th ta c th khai bo ti Constant value l vct hng
hay ct vi kch c [1 n] hay [n 1] di dng ma trn. Nu
Interpret vector parameters as 1-D khng c chn th cc vct
hng hay ct ch l tn hiu 1-D.
Hai khi Ramp v Step gip ta c th to c tn hiu dng
bc thang hay dng tn hiu dc tuyn tnh dng kch thch cc
m hnh Simulink. Trong hp thoi Block Parameters ca khi
Step, c th khai bo gi tr u/gi tr cui v c im bt u ca
bc nhy. i vi Ramp ta c th khai bo dc, thi im v
gi tr xut ca u ra.
Khi Pulse Generator to tn hiu dng xung hnh ch nht,
cn khi Signal Generator c th to ra cc tn hiu kch thch khc
nhau (v d: hnh sin, rng ca). Bin v tn s c th thay i
tu .
V d:
Hnh 11.2

- 52 -

Khi Signal Builder gip ngi s dng c th t to tn hiu
kch thch tu theo yu cu s dng. C th to nhiu tn hiu cng
mt lc.
Khi From Workspace c nhim v ly s liu t ca s
Matlab cung cp cho m hnh Simulink, s liu c ly khai
bo ti dng Data.
Khi Repeating Sequence c th to tn hiu dng tun hon.
Tn hiu ra Output values phi c chiu di tng ng vi chiu di
ca vct thi gian Timer values.
Khi Sine Wave c s dng to tn hiu hnh sin cho c
hai li m hnh lin tc (Sample Time = 0) cng nh gin on
(Sample Time = 1).
Khi From File gip ngi s dng c th ly s liu t mt
M-File c sn. S liu c trong M-File c th l s liu ca ln m
phng trc c lu gi nh khi To-File trong s
Simulink.
11.4 Th vin Sinks
Khi Display hin th bng s kt qu ca vic m phng
Simulink ti thi gian m phng t.
Khi XY Graph biu din hai tn hiu u vo scalar trn h
trc to Oxy. Tn hiu th nht (pha trn) tng ng vi trc x,
tn hiu th hai (pha di) tng ng vi trc y. Ta c th t gii
hn cho hai trc trong hp thoi Block Parameter.
Khi To Workspace c tc dng a s liu t Simulink ra ca
s Matlab.
Khi To File lu s liu cng vi vct thi gian di dng
M-File.
- 53 -

Khi Scope c th hin th cc tn hiu trong qu trnh m
phng. S tn hiu cn c hin th ti Number of Axes..
11.5 Th vin Signal Routing
m hnh Simulink n gin, khng gy ri cho ngi s
dng, khi Goto c tc dng lu tr s liu a vo bin (c t
tn A trong Block Parameter), tu theo yu
cu, ngi s dng c th ly s liu t khi
From (tn bin s liu ca khi ny phi
trng vi tn bin s liu t trong khi
Hnh 11.3
Goto). V d nh hnh 11.3

Khi Mux c tc dng nhp cc tn hiu 1-D thnh mt knh
tn hiu. Trong khi khi Demux c tc dng ngc li, khi ny
tch cc tn hiu trong knh c nhp trc thnh cc tn
hiu ring l. Khi Mux hay Demux lm vic theo ch vct,
hoc theo ch Bus tu theo vic khai bo trong Block Parameter.

- 54 -
Hnh 11.4
Cc tn hiu do khi Mux nhp li c th c khi Bus
Selector tch ra hay gom chng li theo tng tn hiu ban u.
Khi Switch c tc dng chuyn mch, a tn hiu t u vo
1 hoc 3 n u ra. Tn hiu iu khin s chuyn mch ny c
ni vo u 2 (gia). Ngng gi tr chuyn mch c khai bo
bng tham s Threshold ti Block Parameter. Khi tn hiu iu
khin u2 Threshold u ra c ni vo u vo 1. Khi tn hiu
u2 < Threshold th tn hiu iu khin c ni ti u vo 3. V d
trn hnh 11.5 cho ta thy hot ng ca khi Switch
Hnh 11.5
Vic chuyn mch ca khi Manual Switch c thc hin
bng cch nhy kp phm chut tri ti u cn ni.
- 55 -

Khi Multiport Switch c u iu khin trn cng. u vo
c chn ph thuc vo gi tr lm trn ca tn hiu iu khin. S
u vo c khai bo ti Number of inputs ca Block Parameter.
Khi Selector cho ngi s dng c c s la chn linh
hot hn. N c kh nng tch tng tn hiu u vo hay tch tng
phn t ca ma trn ri gom chng li thnh mt tn hiu mi.
11.6 Th vin Signal Attributes
Khi IC c tc dng gn cho tn hiu ra ca khi iu kin ban
u nht nh.
11.7 Th vin Ports and Subsystems
Khi If Action Subsystems gip ngi s dng c th ly tn
hiu u vo nu tn hiu Action c kch.
Khi If lm vic ging nh cu trc if...else...end. iu kin
ca if c th c thay i trong Block Parameter..
Khi Triggered Subsystem s cho tn hiu u ra nu tn hiu
c kch t 0 ln 1 u vo Trigger.
11.8 Th vin Math Operations
u ra ca khi Abs l gi tr tuyt i ca tn hiu u vo.
Kh Khi Algebraic Constraint s a tn hiu u vo f(z) v 0
v a ra gi tr z. Gi tr ca z s c hi tip v u vo.
u ra ca khi Sum l tng ca cc tn hiu u vo. Nu tn
hiu u vo l scalar th tn hiu tng cng l scalar. Khi Sum tnh
tng ca tng phn t. Nu u vo ch c 1 vct th u ra s l
tng ca tt c cc phn t ca vct
Khi Dot Product tnh tch scalar (v hng) ca cc vct
u vo.

- 56 -

Khi Product thc hin php nhn hay chia gia cc tn hiu
u vo (1-D hay 2-D).
Khi Gain c tc dng khuch i tn hiu u vo. Thng s
khuch i c thng bo ti Gain trong Block Parameter.
Khi Slider Gain c tc dng khuch i tn hiu u vo.
Thng s khuch i c th c thay i trong qu trnh m
phng.
Khi Relational Operator thc hin kt hp cc tn hiu u
vo theo ton t so snh c khai bo ti Relational Operator
trong Block Parameter. u ra s nhn gi tr True (ng) hoc
False (sai).
Khi Logical Operator thc hin kt hp cc tn hiu u vo
theo quan h logic c khai bo ti Operator trong Block
Parameter. u ra s nhn gi tr True (ng) hoc False (sai).
11.9 Th vin Look- Up Tables
Khi Look- Up Tables to tn hiu ra t tn hiu vo tng
ng, cc gi tr ra v gi tr vo c nhp trong bng tra.
11.10 Th vin Discontinuities
Khi Saturation gip ta c th gii hn ti a ca tn hiu u
vo v pha dng (Upper limit) v pha m (Lower limit).
11.11 Th vin Continuous
Khi Derivative c tc dng tnh o hm tn hiu u vo.
Tn hiu u ra c dng
u
.
t
Khi Integrator ly tch phn tn hiu u vo ca khi. Gi tr

ban u c chn ti Initial condition trong Block Parameter
nu Initial condition source c chn l external th gi tr ban
u c nhn t bn ngoi ca khi.
- 57 -

Nu mun tnh tch phn c hn th chn Limit output v in
gi tr cn trn (Upper staturation limit) v cn di (Lower
staturation limit) trong Block Parameter.
12. Bi thc hnh m phng in t cng sut dnh cho

sinh vin:
12.1. Chnh lu 1 pha, chu k, khng iu khin, ti R-L-E:
Sinh vin iu chnh cc trng hp sau:
+ Ti R.
+ Ti R-L.
+ Ti R-E.
+ Ti L-E.
+ Ti R-L-E.
Kt hp vi iu kin:
+ C diode m D0.
+ Khng c diode m D0.
Thc hin m phng - V th mi trng hp.
Xc nh kt qu, i chiu l thuyt v a ra kt lun.
m
a
+
Diode
i
- Id
Id
V2
+
v
U2
220V
50Hz
R
em Iak
Vak
Demux
L
Ve do thi
Ud
+
-
Ud
DC
DCVoltage Source
Chinhluu1pha, khongdieukhien, hinhtia

- 58 -
+
v
E
12.2. Chnh lu 1 pha, chu k, c iu khin, ti R-L-E:

+ Ti R.
+ Ti R-L.
+ Ti R-E.
+ Ti L-E.
+ Ti R-L-E.
Kt hp vi iu kin:
+ C diode m D0.

- 59 -

g
i
-
Id
Id
T hyristor
Vload1
+
v
-
R
m Iak
U2
Vak
220V
50Hz
Demux
Ve do thi
Ud
U2
+
-
Ud
DC
DC Voltage Source
Chinh luu 1 pha, co dieu khien, hinh tia
XDK
XDK
Pulse
Generator

- 60 -
+
v
-

12.3. Chnh lu 2 pha, chu k, khng iu khin, ti R-L-E:
+ Ti R.
+ Ti R-L.
+ Ti R-E.
+ Ti L-E.
+ Ti R-L-E.
Kt hp vi iu kin:
+ C diode m D0.
m
a
k
Diode
em Iak1
Vak1
Demux
Ud
+
-
Ud
V1
R
L
+
v
V1
Ve do thi
DC
DC Voltage Source
+
v
E
3
V2
Demux Demux1
Id
i
-
+
v Iak2 Iak2Vak2
V2
Linear Transformer
75 kVA
Id
m
a
k
14400 v
50 Hz
Diode1
Chinh luu 2 pha, hinh tia, khong dieu khien

- 61 -
12.4. Chnh lu 2 pha, chu k, c iu khin, ti R-L-E:

+ Ti R.
+ Ti R-L.
+ Ti R-E.
+ Ti L-E.
+ Ti R-L-E.
Kt hp vi iu kin:
+ C diode m D0.
- 62 -
Iak1 Iak1Vak1
Demux Demux1
U21
+
v
-
U21
Thyristor1
2
1
3
U1
g
Linear Transformer
75 kVA
+
v
-
Thyristor2
DC Voltage Source
E
+
v
-
Ud
Iak2 Iak2Vak2
+
v
-
Demux Demux2
Id
i
-
U22
Xung
U22
Id
14400 v
50 Hz
Xung
Pulse
Generator
Chinh luu 2 pha, hinh tia, co dieu khien

- 63 -
Scope

12.5. Chnh lu 1 pha, hnh cu, khng iu khin, ti R-L-E:
+ Ti R.
+ Ti R-L.
+ Ti R-E.
+ Ti L-E.
+ Ti R-L-E.
Kt hp vi iu kin:
+ C diode m D0.
U2
+
v
U2
Diode2
Diode
Ud
+
v
Ud
Diode3
a
Diode1
a
Ve do thi
L
Linear Transformer
75 kVA
DCVoltage Source
Id
Id
14400 v
50 Hz
i
+
-
Chinh luu 1 pha, hinh cau, khong dieu khien

- 64 -
E
+
v
E
12.6. Chnh lu 1 pha, hnh cu, c iu khin, ti R-L-E:

+ Ti R.
+ Ti R-L.
+ Ti R-E.
+ Ti L-E.
+ Ti R-L-E.
Kt hp vi iu kin:
+ C diode m D0.
- 65 -
U2
+
v
-
U2
Thyristor 1
Thyristor 3
Ud
+
v
-
Ud
Ve do thi
Linear Transformer
75 kVA
Thyristor 2
a
Thyristor 4
DC Voltage Source
Id
Id
14400 v
50 Hz
i
-
Xung
Xung
Pulse
Generator
U1
+
v
-
Xung
U1
Chinh luu 1 pha, hinh cau, co dieu khien

- 66 -
E
+
v
-

12.7. Chnh lu 3 pha, hnh tia, khng iu khin, ti R-L-E:
+ Ti R.
+ Ti R-L.
+ Ti R-E.
+ Ti L-E.
+ Ti R-L-E.
Kt hp vi iu kin:
+ C diode m D0.
Xc nh kt qu, i chiu l thuyt v a ra kt lun
U1
+
v
-
U2
+
v
U2
3Fa
U3
+
v
-
Diode
m
a
k
Ud
Ua
+
v
Ud
R
m
a
k
Ub
Vedothi
Diode1
E
DCVoltageSource
Uc
m
a
k
Diode2
i
-
Id
Id
Chinhluu3pha, hinhtia, khongdieukhien

- 67 -
+
v
E
12.8. Chnh lu 3 pha, hnh tia, c iu khin, ti R-L-E:

+ Ti R.
+ Ti R-L.
+ Ti R-E.
+ Ti L-E.
+ Ti R-L-E.
Kt hp vi iu kin:
+ C diode m D0.
- 68 -

Ua
Xung
+
v
-
Pulse
Generator
Ua
Ub
+
v
-
Ub
Uc
+
v
-
220 v
50 Hz
Uc
Thyristor1
Ud
R
+
v
-
Ud
220 v
50 Hz1
Thyristor2
DC Voltage Source
g
Thyristor3
Id
i
-
220 v
50 Hz2
E
+
v
-
Id
Chinh luu 3pha, hinh tia, co dieu khien,

- 69 -
Ve do thi

12.9. Chnh lu 3 pha, hnh cu, khng iu khin, ti R-L-E:
+ Ti R.
+ Ti R-L.
+ Ti R-E.
+ Ti L-E.
+ Ti R-L-E.
Kt hp vi iu kin:
+ C diode m D0.
U1
+
v
-
U2
+
v
U2
3Fa
U3
m
k
Ud
Ua
Diode5
a
Diode3
a
Diode1
m
k
m
k
+
v
-
+
v
Ud
Diode4
Diode2
Diode6
a
Vedothi
m
k
m
k
Ub
m
k
DCVoltageSource
Uc
i
-
Id
Id
Chinhluu3pha, hinhcau, khongdieukhien

- 70 -
+
v
E
12.10. Chnh lu 3 pha, hnh cu, c iu khin, ti R-L-E:

+ Ti R.
+ Ti R-L.
+ Ti R-E.
+ Ti L-E.
+ Ti R-L-E.
Kt hp vi iu kin:
+ C diode m D0.
- 71 -

Ua
+
v
-
3f a
Ua
Ub
+
v
-
Ub
Uc
Uc
Ud
R
+
v
-
Thyristor5
g
Thyristor3
g
Thyristor1
220 v
50 Hz
+
v
-
Ud
Thyristor4
220 v
50 Hz1
Thyristor6
Thyristor2
E
+
v
-
DC Voltage Source
220 v
50 Hz2
i
-
Id
Id
Xung
Xung
Scope
Pulse
Generator
Chinh luu 3 pha, hinh cau, co dieu khien

- 72 -

12.11. Chnh lu 3 pha, hnh cu, bn iu khin, ti R-L-E:
+ Ti R.
+ Ti R-L.
+ Ti R-E.
+ Ti L-E.
+ Ti R-L-E.
Kt hp vi iu kin:
+ C diode m D0.
13. Cch pht xung iu khin Tiristor:

13.1. Khi Pulse generator:

- 73 -

+ Pulse Generator: Pht ra cc xung vung theo chu k.
+ Th vin: Sources
+ M t:
Khi Pulse Generator pht ra cc xung vung theo chu k. Cc tham s
ca khi l: Tham s dng sng, bin (Amplitude), rng xung (Pulse
Width), chu k (Period) v tr pha (Phasedelay), xc nh hnh dng ca song
pht ra. S sau y cho thy nh hng ca mi thng s ti dng sng:
Khi Pulse Generator c th pht ra dng tn hiu scalar, vector, matrix

ca bt k loi d liu thc no. khi ny c th pht ra tn hiu scalar, s
dnh scalars xc nh thng s dng sng. pht ra tn hiu vector hay
matrix, s dng vectors hay matrices xc nh dng sng. Mi loi dng sng
nh hng ti thnh phn p ng ca tn hiu u ra. V d nh, thnh phn
u tin ca thng s bin vector xc nh bin ca thnh phn u tin
ca mt xung ra dng vector. Tt c cc thng s v dng sng phi c cng
chiu sau scalar expansion. Loi d liu ra tng t nh loi d liu ca tham s
bin .
Thng s loi xung ca khi cho phpc nh u ra l time-based hoc
sample-based. Nu nh la chn sample-based, khi s tnh ton u ra ca n
vi mt tc t trc do ta xc nh. Nu la chn time-based, Simulink s
tnh ton u ra ca n ti nhng thi im khi m u ra c s thay i. iu
ny dn n trong mt vi trng hp yu cu tnh ton u ra ca khi c th
vt qua chu k m phng.
Ph thuc vo c tnh dng xung m tc thay i ca u ra c th
thay i. V l do ny nn Simulink khng s dng fixed solver tnh ton y
ra ca time-based pulse generator. Simulink cho php bn n ra mt fixed-step
solver cho m hnh ca bn m cha time-based pulse generators. Tuy nhin
trong trng hp ny Simulink tnh ton mt fixed sample time cho time-based
pulse generators. Khi n m phng time-based pulse generators nh l
sample-based
- 74 -

+ Cc thng s:
- Pulse type - loi xung: time-based hoc sample-based.
- Time: Xc nh liu c dng thi gian m phng hay dng mt tn
hiu ngoi nh mt ngun gi tr cho bin thi gian tn hiu ra. Nu
nh la chn mt ngun tn hiu ngoi, khi hin thi mt cng vo
ghp ni vi ngun.
- Amplitude - Bin xung: Mc nh l 1.
- Period: Chu l xung tnh theo n v giy. Nu nh loi xung l timebased hay s ln thi gian trch mu (number of sample times) nu nh
loi xung l sample-based. Mc nh l 2.
- Pulse width: rng xung l phn trm on/ton chu k. Mc nh l
50%.
- Phase delay: if (t>phasedelay) && (xung on)
Y(t)= Bin
Else
Y(t)=0;
Mc nh l 0 giy.
- Sample Time: di ca thi gian trch mu tnh theo giy. Ch khi
loi xung (pulse type) c chn l sample-based.
- Interpret vector parameters as 1-D: Nu la chn v cc thng s khc
l ma trn mt hng hoc mt ct, sau scalar expansion, khi pht tn
hiu ra nh mt tn hiu vector mt chiu. Nu khng, chiu ca u ra
tng t nh chiu ca cc thng s khc.
13.2. Cch to xung vi s hnh tia.
Vi cc 3 pha hnh tia, im m t nhin ln lt l
5 9 13
6 6 6
Nu gi chu k Period= 0 v Phasedelay = *

Th gc m thc s 1 =
Sau mt chu k xung Period 2 = * + 0

1= 2
5
* = * + 0
6
2
0 =
3
5
6
Nh vy ta phi t:
Period=
2
=(2.0.01)/3
3
Gc m thc s: = Phasedelay

- 75 -

Tiristor vai tr nh Diode th = Phasedelay
Do Phasedelay =
=0
13.3. Cch to xung vi s hnh cu.

Vi cc 3 pha hnh cu, im m t nhin ln lt l
5 9
vi van l
6 6 6
3 7 11
vi van chn
6 6 6
Nu gi chu k Period= 0 v Phasedelay = *

Th gc m thc s 1 = *
Sau mt chu k xung Period 2 = * + 0

1= 2
3
* = * + 0
6
0 =
3
6
Nh vy ta phi t:
Period=
=0.01/3
Gc m thc s: = Phasedelay
Tiristor vai tr nh Diode th = Phasedelay

Do Phasedelay =

- 76 -
=0

13.4. V d minh ho cch pht xung:
Ngun in li quc gia c: Bin 220(V), tn s 50 (Hz) tc l c chu
k T=1/f=0.02 (s). T ta c cc gi tr tng ng nh sau:
- tng ng vi 0,01 giy
- / 2 tng ng vi 0.01/2 giy.
- / 3 tng ng vi 0.01/3 giy.
- / 6 tng ng vi 0.01/6 giy.
- 2 tng ng vi 2.0.01=0.02 giy.
Cc gi tr tng ng ny s gip chng ta d dng quan st cc c tnh
trn th ca m phng matlab simulink.
a) Cch pht xung vi s cu:

- 77 -

- 78 -

- 79 -
b) Cch pht xung vi s tia:

- 80 -

- 81 -

13.5. Ci tin cch pht xung vi mch chnh lu 3 pha, cu, c iu khin:
Dng 2 ngun pht xung vi cc b van chn v l khc nhau: Pht xung
l v pht xung chn. Gc m in vo phn Gc Alpha ging nhau trong c hai
phn.

- 82 -

Cch pht xung ny ci tin c nhm ln pha m khi gc Alpha bng
hoc ln hn 0.01/6 nhng vn xy ra nhm ln khi gc Alpha bng hoc ln
hn 0.01/3.

- 83 -

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Ti liu hng dn matlab simulink thc hnh m phng in t cng sut

Ti liu hng dn matlab simulink thc hnh m phng in t cng sut

Ti liu hng dn matlab simulink thc hnh m phng in t cng sut

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Ti liu hng dn matlab simulink thc hnh m phng in t cng sut

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Ti liu hng dn matlab simulink thc hnh m phng in t cng sut

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Ti liu hng dn matlab simulink thc hnh m phng in t cng sut

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