PWM trong ATmega32

Cc ch v cch vit: CSx2:0 : bit CS x: th t Timer/Counter (t 0 n 2) 2:0 : bit 2 n bit 0 TCNTn: Timer/Counter th n ( t 0 n 2) Cc hnh v m t cc thanh ghi thng ly ca TCNT0 ( tr cc trng hp ring) PWM l mt chc nng c bit ca cc Timer/Counter (TCNT) ca ATmega32. ATmega32 c 3 Timer/Counter, v tng ng vi 3 Timer/Counter c 4 chn PWM, l: Tn gi OC0 OC1A OC1B OC2 V tr PIN4 PIN19 PIN18 PIN21 Thuc Timer/Counter TCNT0 TCNT1A TCNT1B TNCT2

Cch thc lm vic chung ca pwm l s dng mt b nh thi kt hp vi 1 b so snh (thanh ghi OCR Output Compare Register) to u ra dng pwm chn OC. Nguyn l ca n l so snh gi tr tc thi ca thanh ghi TCNT (gi tr ny lin tc thay i do timer m ln hoc xung) vi gi tr t trong OCR, t to tn hiu ng ra OC . V d: nu gi tr ca TCNT nh hn OCR th ng ra OC l 1, nu gi tr ca TCNR ln hn OCR th ng ra OC c gi tr 0. Khi s dng pwm ca ATmega32, c 3 dng (mode) pwm khc nhau m ngi s dng cn ch : Phase corect pwm mode Fast pwm mode Phase and Frequency correct pwm mode 1. Fast pwm: Fast pwm l ch to ra xung pwm c tn s cao. Timer m t gi tr BOTTOM n gi tr MAX v tr v m li t gi tr BOTTOM. Ty vo vic t ng ra o hay khng o (cc bit COMx1 v COMx0) m ta c dng xung khc nhau. ch khng o, ng ra OC = 0 khi gi tr ca TCNT >= OCR, v OC = 1 khi gi tr ca TCNT tr v BOTTOM.. ch o, ng ra OC = 1 khi TCNT>=OCR, v OC = 0 khi TCNT c gi tr BOTTOM. C th xem dng xung ng ra qua biu thi gian sau:

Tn s pwm ca ng ra c th c tnh ton theo cng thc sau: i vi TCNT0 v TCNT2: fOCnPWM = fclk_I/O / (N.256) i vi TCNT1: FOCnPWM = fckl_I/O / (N.(1+TOP)) Vi N l h s chia t l ( ty thuc vo cch thit lp cc bit CS v loi TCNT) 2. Phase Correct pwm: i vi mode ny, timer m t gi tr BOTTOM ln n gi tr MAX v sau m t MAX xung BOTTOM. ch khng o, ng ra OC = 0 khi TCNT >= OCR v OC = 1 khi TCNT < OCR. ch o, ng ra OC =1 khi TCNT >= OCR v OC = 0 khi TCNT<OCR. Nh vy, ch Phase Correct pwm c tn s hot ng thp hn so vi ch Fast pwm. Tuy nhin ch ny thng c s dng iu khin ng c do c tnh i xng ca n. Biu dng sng:

Tn s pwm: i vi TCNT0 v TCNT2: FOCnPCPWM = fclk_I/O / (N.510) i vi TCNT1: FOCnPCPWM = fckl_I/O / (2.N.TOP) Vi N l h s t l ( ty thuc vo cch thit lp cc bit CS v loi TCNT)

3. Phase and Frequency Correct pwm ( ch c TCNT1): Mode ny gn ging vi mode Phase Correct pwm. S khc bit gia 2 mode l thanh ghi OCR1x c cp nht bi thanh ghi m OCR1x Buffer Register. mode ny, phn gii pwm c th c xc nh bi c 2 thanh ghi ICR1 hoc OCR1A. phn gii nh nht l 2 bit (ICR1 hoc OCR1A c t l 0x0003), v phn gii ln nht l 16 bit (ICR1 hoc OCR1A c t vi gi tr MAX). Cng thc tnh phn gii: RPFCPWM = log(TOP + 1) / log2 Dng sng ng ra:

i vi TCNT1 trong c 3 mode pwm ta u c th chn phn gii ca pwm theo cng thc sau: RFPWM = log(TOP + 1) / log(2) Cc thanh ghi cn ch : Xt chung TCNT0 v TCNT2 ( cng l TCNT 8 bit ): 1. TCCR ( Timer/Counter Control Register): Thanh ghi iu khin Timer/Counter. Thanh ghi ny c th c/ghi tng bit phc v cho vic thit lp cc ch hot ng ca Timer/Counter. Hnh di y m t thanh ghi TCCR0 ( tng t vi TCCR2).

ngha ca cc bit trong chc nng pwm: 1.1. FOCx (Force Output Compare): phi c t = 0 khi dng chc nng pwm. 1.2. WGMx1:0 ( Waveform Generation Mode): cc bit ny iu khin cch thc m, gi tr ln nht (TOP) v dng tn hiu xung ra ca TCNT i vi pwm ta cn lu cc gi tr ca WGM nh sau (TCNT0 v TCNT2): WGMx1 0 1 WGMx0 1 1 Mode hot ng Phase Correct pwm Fast pwm Gi tr TOP 0xFF 0xFF Cp nht gi tr OCR TOP BOTTOM Set c TOV BOTTOM MAX

1.3. COMx1:0 (Compare Match Output Mode): cc bit ny iu khin cch thc hot ng ca ng ra OC i vi dng Fast pwm: COMx1 1 1 COMx0 0 1 Hot ng ng ra Ocx OC = 0 khi TCNT = OCR, OC = 1 khi TCNT = BOTTOM (ng ra dng khng o) OC = 1 khi TCNT = OCR, OC =0 khi TCNT = BOTTOM (ng ra dng o)

i vi dng Phase Correct pwm: COMx1 1 1 COMx0 0 1 Hot ng ng ra Ocx OC = 0 khi timer m ln v TCNT = OCR, OC = 1 khi timer m xung v TCNT = BOTTOM OC = 1 khi timer m ln v TCNT = OCR, OC = 0 khi timer m xung v TCNT = BOTTOM

1.4. CSx2:0 (Clock Select): bit chn xung clock. Ty vo vic thit lp cc bit ny m ta c xung clock ni hay ngoi, tn s xung l bao nhiu. Cc la chn cho tng bit cng c s khc bit gia cc TCNT. 2. TCNT: thanh ghi lu tr gi tr tc thi ca timer. Gi tr trong thanh ghi ny s c soa snh vi gi tr trong OCR. 3. OCR (Output Compare Register): y l thanh ghi lu tr gi tr m ta mun so snh vi thanh TCNT. Cc gi tr c th t l t BOTTOM n MAX (ty thuc timer 8bit hay 16 bit). Gi tr ny c th c xc nh t ban u hoc ngay c lc timer ang hot ng. Xt ring TCNT1 16bit: 1. Thanh ghi TCCR1A v TCCR1B: i vi TCNT1 c s khc bit vi 2 TCNT cn li. TCNT1 l timer/counter 16 bit. N c 2 thanh ghi iu khin l TCCR1A v TCCR1B. Thanh ghi TCCR1A:

Thanh ghi TCCR1B:

Cc bit c chc nng tng t vi thanh ghi TCCR ca TCNT0 v TCNT2. Ch l bit 5 ca thanh ghi TCCR1B phi c t = 0 khi thit lp cho thanh ghi ny. im khc bit l c 4 bit WGM trong 2 thanh ghi ny. Cc la chn cho tng bit c quy nh trong bng sau:

2. Thanh ghi TCNT1H v TCNT1L: Hai thanh ghi ny hp li thnh 1 thanh ghi d liu 16bit ca TCNT1. 3. Thanh ghi OCR1AH v OCR1AL 4. Thanh ghi OCR1BH v OCR1BL Cc thanh ghi TCNT, OCR c chc nng tng t bn TCNT0 v TCNT2. iu cn lu l chng c th xem nh thanh ghi 16 bit. 5. Thanh ghi ICR1H v ICR1L (Input Capture Register) Vic truy cp vo cc thanh ghi 16bit (c v ghi) cn tun th ng trnh t thc hin. Khi ghi d liu vo thanh ghi 16bit, cn ghi vo byte cao trc ri mi ti byte thp. Cn khi c d liu th ngc li, cn c t byte thp trc ri mi ti byte cao. ( C th xem trong datasheet ATmega32 phn truy cp thanh ghi 16 bit Accessing 16-bit Registers, trang 89). Ch l khng phi thanh ghi 16 bit no cng cn tun th theo ng trnh t ny. Ngoi ra cn c cc thanh ghi phc v cho cc ng dng cn ti chnng trnh ngt. l cc thanh ghi TIMSK v TIFR. tm hiu v chng c th c trong datasheet ca ATmega32. Cch thc thc hin pwm: 1. Xc nh loi iu khin pwm cn c l bao nhiu bit. T xc nh loi timer cn thit ( 8bit hay 16bit). 2. Xc nh ng ra o hay khng o thit lp cc bit COM 3. Xc nh kiu pwm thit lp cc bit WGM 4. Xc nh tn s pwm thit lp cc bit CS 5. Trnh t thc hin ( n gin nht cho dng 8 bit 16bit thc hin c cht khc bit) 1. Ghi gi tr vo thanh ghi OCR 2. Ghi gi tr cn iu khin vo thanh ghi TCCR 3. Ngay sau khi ghi gi tr cho TCCR th ng ra OC xut hin xung pwm.

Sau y l mt chng trnh n gin xut xung pwm chn OC0 iu khin sng ca led: .include"m32def.inc" .def temp = r16 reset: .org 0x00 ldi r16,low(RAMEND) ldi r17,high(RAMEND) out spl,r16 out sph,r17 ser temp out ddrb,temp main: out portb,temp ldi r16,0x0E ;a gi tr cn so snh vo thanh ghi OCR0 out ocr0,r16 ldi r16,(1<<pwm0)|(1<<com01)|(1<<cs02) out tccr0,r16 ;thit lp thanh ghi iu khin TCCR0 ldi r16,0 out portb,r16 ;tt cc ng ra PORTB ch c ng ra OC0 hot ng ;kiu xung pwm. ;khai bo c tin x l ;khai bo byte temp

;khi to SP

;thit lp PORTB l ng ra

Sau y l chng trnh iu khin 1 led sng dn n cc i ri sau tt dn. Cch thc lm vic l cp nht gi tr cho thanh ghi OCR thay i lin tc t BOTTOM n MAX v ngc li: .include"m32def.inc" .def temp=r16 reset: .org 0x00 ldi r16,low(RAMEND) ldi r17,high(RAMEND) out spl,r16 out sph,r17 ser temp out ddrb,temp main: ser temp out portb,temp nop

ldi r16,0xe0 out ocr0,r16 ldi r16,(1<<pwm0)|(1<<com01)|(1<<cs02) out tccr0,r16 ldi r16,0 out portb,r16 giam: call delay out ocr0,r16 dec r16 brne giam tang: call delay out ocr0,r16 inc r16 brne tang jmp giam delay: dec r20 brne delay dec r21 brne delay ret Mt chng trnh dng TCNT1: xung pwm dng fast pwm 10bit, ng ra khng o, xung clock chia 256 ( khi tnh tn s ca pwm th N=256). .include"m32def.inc" .def temp=r16 reset: .org 0x00 ldi r16,low(RAMEND) ldi r17,high(RAMEND) out sph,r17 out spl,r16 ser temp out ddrd,temp main: clr temp out portd,temp nop ldi r16,0xff out ocr1ah,r16 ;thay i cc gi tr trong ocr1ah v ocr1al xem kt qu ;ng ra OC1A

ldi r17,0xa0 out ocr1al,r17 ldi r16,(1<<pwm10)|(1<<com1a1)|(1<<wgm11) out tccr1a,r16 ldi r16,(1<<wgm12)|(1<<cs12) out tccr1b,r16 jmp main