Professional Documents
Culture Documents
CK
APPD
REV
ZONE
ECN
ENG
APPD
DESCRIPTION OF CHANGE
DATE
DATE
8/9/2007
(.csa)
Page
TABLE_TABLEOFCONTENTS_HEAD
TABLE_TABLEOFCONTENTS_ITEM
TABLE_TABLEOFCONTENTS_ITEM
TABLE_TABLEOFCONTENTS_ITEM
TABLE_TABLEOFCONTENTS_ITEM
TABLE_TABLEOFCONTENTS_ITEM
TABLE_TABLEOFCONTENTS_ITEM
TABLE_TABLEOFCONTENTS_ITEM
TABLE_TABLEOFCONTENTS_ITEM
TABLE_TABLEOFCONTENTS_ITEM
TABLE_TABLEOFCONTENTS_ITEM
TABLE_TABLEOFCONTENTS_ITEM
TABLE_TABLEOFCONTENTS_ITEM
TABLE_TABLEOFCONTENTS_ITEM
TABLE_TABLEOFCONTENTS_ITEM
TABLE_TABLEOFCONTENTS_ITEM
TABLE_TABLEOFCONTENTS_ITEM
TABLE_TABLEOFCONTENTS_ITEM
TABLE_TABLEOFCONTENTS_ITEM
TABLE_TABLEOFCONTENTS_ITEM
TABLE_TABLEOFCONTENTS_ITEM
TABLE_TABLEOFCONTENTS_ITEM
TABLE_TABLEOFCONTENTS_ITEM
TABLE_TABLEOFCONTENTS_ITEM
TABLE_TABLEOFCONTENTS_ITEM
TABLE_TABLEOFCONTENTS_ITEM
TABLE_TABLEOFCONTENTS_ITEM
TABLE_TABLEOFCONTENTS_ITEM
TABLE_TABLEOFCONTENTS_ITEM
TABLE_TABLEOFCONTENTS_ITEM
TABLE_TABLEOFCONTENTS_ITEM
TABLE_TABLEOFCONTENTS_ITEM
TABLE_TABLEOFCONTENTS_ITEM
TABLE_TABLEOFCONTENTS_ITEM
TABLE_TABLEOFCONTENTS_ITEM
TABLE_TABLEOFCONTENTS_ITEM
TABLE_TABLEOFCONTENTS_ITEM
TABLE_TABLEOFCONTENTS_ITEM
TABLE_TABLEOFCONTENTS_ITEM
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31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
Date
Contents
Sync
Table of Contents
System Block Diagram
Power Block Diagram
CONFIGURATION OPTIONS
Revision History
FUNC TEST 1 OF 2
Power Aliases
SIGNAL ALIAS /RESET
CPU FSB
CPU Power & Ground
CPU Decoupling & VID
CPU ITP700FLEX DEBUG
NB CPU Interface
NB PEG / Video Interfaces
NB Misc Interfaces
NB DDR2 Interfaces
NB Power 1
NB Power 2
NB Grounds
NB Standard Decoupling
NB Graphics Decoupling
SB Enet, Disk, FSB, LPC
SB PCI, PCIe, DMI, USB
SB Pwr Mgt, GPIO, Clink
SB Power & Ground
SB Decoupling
SB Misc
Clock (CK505)
Clock Termination
DDR2 SO-DIMM Connector A
DDR2 SO-DIMM Connector B
Memory Active Termination
2
3
4
5
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
37
Ethernet (Yukon)
Yukon Power Control
ETHERNET CONNECTOR
FIREWIRE CONTROLLER
FIREWIRE PORT
PATA CONNECTOR
SATA CONNECTOR
USB EXTERNAL CONNECTORS
CONNECTOR MISC
IR CONTROLLER & BT INTERFACE
SMC
SMC SUPPORT
38
39
40
43
44
45
46
47
48
49
50
(.csa)
TABLE_TABLEOFCONTENTS_ITEM
RX
RX
MK
RX
RX
RX
MK
RX
RX
RX
RX
ES
ES
ES
ES
ES
ES
ES
ES
ES
ES
RX
RX
RX
RX
RX
RX
DK
DK
LD
LD
LD
LT
LT
LT
LT
LT
LT
DK
RX
LT
LT
LT
LD
LD
09/05/2006
Page
TABLE_TABLEOFCONTENTS_HEAD
USB
05/11/2006
WFERRY-WF
06/30/2005
POWER
07/18/2005
SMC
N/A
N/A
07/25/2005
TP
06/15/2006
WFERRY
07/17/2006
GPU
11/12/2006
T9_MLB_NOME
11/12/2006
T9_MLB_NOME
04/26/2006
MSARWAR
5/23/05
MASTER
10/30/2006
T9_MLB
10/30/2006
T9_MLB
10/30/2006
T9_MLB
10/30/2006
T9_MLB
10/30/2006
T9_MLB
10/30/2006
T9_MLB
10/30/2006
T9_MLB
06/15/2006
WFERRY
06/15/2006
WFERRY
10/30/2006
T9_MLB
10/30/2006
T9_MLB
10/30/2006
T9_MLB
10/30/2006
T9_MLB
06/01/2006
WFERRY
07/26/2005
NB
06/06/2006
DSIMON
06/06/2006
DSIMON-WF
06/20/2005
MEMORY
06/20/2005
MEMORY
06/20/2005
MEMORY
08/19/2005
ENET
10/07/2006
USB
10/07/2006
USB
09/14/2006
USB
08/30/2005
ENET
07/17/2006
GPU
07/17/2006
GPU
07/17/2006
GPU
06/30/2006
USB
06/29/2006
USB
09/05/2006
USB
10/30/2006
T9_MLB
07/17/2006
GPU
TABLE_TABLEOFCONTENTS_ITEM
TABLE_TABLEOFCONTENTS_ITEM
TABLE_TABLEOFCONTENTS_ITEM
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TABLE_TABLEOFCONTENTS_ITEM
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TABLE_TABLEOFCONTENTS_ITEM
TABLE_TABLEOFCONTENTS_ITEM
TABLE_TABLEOFCONTENTS_ITEM
TABLE_TABLEOFCONTENTS_ITEM
TABLE_TABLEOFCONTENTS_ITEM
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TABLE_TABLEOFCONTENTS_ITEM
TABLE_TABLEOFCONTENTS_ITEM
TABLE_TABLEOFCONTENTS_ITEM
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TABLE_TABLEOFCONTENTS_ITEM
TABLE_TABLEOFCONTENTS_ITEM
TABLE_TABLEOFCONTENTS_ITEM
TABLE_TABLEOFCONTENTS_ITEM
TABLE_TABLEOFCONTENTS_ITEM
TABLE_TABLEOFCONTENTS_ITEM
TABLE_TABLEOFCONTENTS_ITEM
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
51
52
53
55
56
59
61
62
66
67
68
69
70
71
72
73
75
76
77
78
79
90
92
94
100
101
102
103
104
105
106
TABLE_TABLEOFCONTENTS_ITEM
Sync
LD
LD
ES
ES
LD
MK
RX
RX
RX
RX
RX
RX
MK
MK
MK
MK
MK
MK
MK
MK
MK
MK
ES
ES
ES
RX
ES
LD
RX
RX
DK
DVT BUILD
Date
Contents
06/01/2006
WFERRY
06/01/2006
WFERRY
07/17/2006
GPU
06/21/2006
GPU
11/10/2005
ENET
08/23/2005
SMC
04/26/2006
WFERRY
03/12/2007
M70AUDIO
03/12/2007
M70AUDIO
03/12/2007
M70AUDIO
03/12/2007
M70AUDIO
07/13/2005
POWER
05/31/2006
DSIMON-WF
07/13/2005
POWER
06/29/2006
GPU
07/13/2005
POWER
07/13/2005
POWER
07/13/2005
POWER
12/06/2005
ENET
06/12/2006
DSIMON-WF
08/19/2005
SMC
06/23/2006
GPU
06/06/2005
GRAPHIC
05/21/05
EUGENE
06/08/2006
WFERRY
06/12/2006
WFERRY
06/08/2006
WFERRY
06/12/2006
WFERRY
06/12/2006
WFERRY
06/12/2006
WFERRY
06/12/2006
WFERRY
K36 EE DRIS:
RX-RAYMOND XU
DK-DINESH KUMAR
RC-RAY CHANG
MK-MARC KLINGELHOFER
LT-LAWRENCE TAN
LD-LINDA DUNN
MM-MARY(YUAN) MA
APPLE INC.
METRIC
XX
X.XX
DRAFTER
Schematic / PCB #s
PART NUMBER
MFG APPD
QA APPD
DESIGNER
RELEASE
SCALE
ANGLES
QTY
DESCRIPTION
REFERENCE DES
CRITICAL
051-7455
SCHEM,MLB,K36
SCH
CRITICAL
820-2279
PCBF,MLB,K36
PCB
CRITICAL
BOM OPTION
TITLE
SCHEM,MLB,K36
NONE
ENG APPD
DESIGN CK
X.XXX
MATERIAL/FINISH
NOTED AS
APPLICABLE
SIZE
DRAWING NUMBER
051-7455
REV.
SHT
01
OF
76
U1000
CPU
U2900
CK 505
2.? GHz
Core ~1.2V
Pg 10
J1302
Clocks
TERMS
Pg 28
Pg 29
ITP CONN
Pg 9
PG 12
FSB
NB-GMCH
Core
1.05 - 1.25V
Pg 14
RGB
GPIO
DVI-I
MUX
Power
Supply
PG 57
PG 57-67
DIMM
DDR2 - Dual Channel
Parallel
Term
Temp Sense
Pg 32
1.8V - 64 Bits
533/667/800? MHz
U5520
PG 49
HEAT-PIPE/FIN
U5500
PG 49
Pg 15
Pg 17,18,19
Pg 14
DMI
CLnk 0
Pg 15
Pg 15
POWER SENSE
PG 69
J9001
FAN CONN PG 50
SPI
Boot ROM
x4 DMI
B,0
SMC
Pg 23
SATA
PG 46
Pg 25
Pg 24
1 2 3 4 5 6 7 8 9
PCI-E
Ln5 Ln6
Core
J4700
J4810
3G
Geyser
CONNECTOR
PG 43
Trackpad/Keyboard
PG 42
Bluetooth
PG 43
J4601
USB
Connectors
PG 41
CAMERA
Pg 24
USB
UATA
Pg 23
IR
CONTROLLER
Core 1.05V
Pg 22
PG 39
J4850
PG 44
Pg 23
Conn
GPIOs
SB-ICH8
SATA-2
UATA
LPC Conn
PG 44
J4600
U4800
SMB
SATA-1
J4401
SPI
Pg 24
J5100
U2300
Pg 22
PG 40
CLnk 0
Fan Ser
Prt
Pg 22
SATA-0
SATA
Conn
DMI
Pg 23
LPC
U4900
J4501
PG 54
2.5 GHz
PG 67
PG 48
J5601
U6100/50
Int Disp
Conn
CPU
Pg30,31
Misc
LVDS
J9401
TV
Out
PG 68
Pg 15/16
PCI-E
SDVO
TMDS
DC/Batt
Conn
J3101
J3201
Main Memory
Pg 13
U1400
U9200
J6900/50
64-Bit
800/1066? MHz
E-NET
CLnk 1
PCI
AZALIA
Pg 22
Pg 24
Pg 23
Pg 22
DIMMs
Clk Gen
J3101
U2900
J3201
UC500
33 MHz
32-Bit
U6200
U4000
Audio
Codec
FW32306
Pg 53
Pg 37
JACK
TRANSLATORS
U3700
NINEVEH
PG 56
E-NET
U6600/10/20
Speaker
Amps
SYNC_MASTER=WFERRY-WF
SYNC_DATE=05/11/2006
PG 54
Pg 34
J3400
J4300
J3900
Mini PCI-E
AirPort
E-NET
Conn
FireWire
Conn
Pg 33
Pg 36
PG 38
Audio
Conns
PG 55
APPLE INC.
DRAWING NUMBER
051-7455
SCALE
SHT
NONE
OF
REV.
76
01
SMC_ENRGYSTR_LDO_EN
MAX8719
U7950
SHGN*
D7950
7A FUSE
PPVBAT_G3H_CHGR_REG
VOUT
PPBUS_G3H
SMC PWRGD
RN5VD30A-F
U5000
(PAGE 45)
ENABLE
Q5350
AC
ADAPTER
IN
CHGR_EN
(S5)
U7970
6A FUSE
DCIN
ENABLES
VIN
17 1V5S0_RUNSS
(S0)
ENA2
PGOOD1
A
U5300
01
02
VOUT
IMVP_VR_ON
PGOOD2
19
U7100
(PAGE 59)
PM_SB_PWROK
PPBUS_G3H
P5VS0_EN
ICH
11 Q7860
RC
DELAY
P5VS3_EN_L
(S3)
RC
DELAY
P3V3S3_EN_L
(S3)
12
U4900
PM_SLP_S3_L
06
P60
PM_SLP_S4_L
ENA
PP5V_S3
(PAGE 45)
02
Q7859
Q7860
07
SMC_PM_G2_EN
(S5)
VIN
5VS5_RUNSS
(S5)
3V3S5_RUNSS
(S5)
Q7859
ENA1
ENA2
07
5V
VOUT1
MAX8516
PM_ENET_EN_L
VOUT
PP1V2_ENET_REG
VIN
16
13
P3V3S3_EN_L
12
18
P1V8S0_EN
ENA
U2265
(PAGE 21)
15
VOUT
18
SMC_ADAPTER_EN
PM3V3ENET_SS
12
1V8S3_RUNSS
PM_SLP_S3_L
RUNSS_GATE_D
Q7007
SOFT
START
Q7007
SOFT
START
Q7006
SOFT
START
1V5S0_RUNSS
(S0)
14
17
1V05S0_RUNSS
17
(S0)
S3
ALL_SYS_PWRGD
09 RSMRST_PWRGD
05
VLDOIN
1.8V
VOUT1
0.9V VOUT2
R7502
13
PP1V8_S3_REG
(10.75A MAX CURRENT)
99ms DLY
IMVP_VR_ON(P16)
RSMRST_IN(P13)
PLT_RST*
PWR_BUTTON(P90)
P17(BTN_OUT)
IMVP_VR_ON
ADAPTER IN
PM_PWRBTN_L
SMC_RESET_L
SLP_S5_L(P95)
SLP_S4_L
SLP_S4_L(P94)
SLP_S3_L(P93)
PGOOD_1V5S0
PGOOD_1V05S0
U4900
(PAGE 44)
PP0V9_S0_REG
RST*
18
PGOOD_1V8S3
UVLO_A
GATE A P5VS0_EN
15
PP5V_S0_FET
UVLO_B
PP3V3_S0_FET
GATE B P3V3S0_EN
UVLO_C
15
PP1V8_S0_FET
UVLO_D
GATE C P1V8S0_EN
ENA*
GATE D RUNSS_GATE_D
PM_SLP_S3_L
GPU_VCORE
15
PPVCORE_S0_NB_GFX_IMVP
(7.7A MAX CURRENT)
SYNC_DATE=06/30/2005
15
ISL6130IRZA
U7000
(PAGE 58)
VIN ISL6263
21
APPLE INC.
DRAWING NUMBER
051-7455
SCALE
SHT
NONE
23
10-1
SLP_S5_L
15
PP1V8_S3_REG_R
14
U7200
PWRGD(P12)
PM_RSMRST_L
RST*
16
19
02
ENA
VOUT
(PAGE 60)
10
RSMRST_OUT(P15)
PGOOD_SEQUENCER
TPS51116
U7500
(PAGE 62)
1V25S0_RUNSS
17
(S0)
GFX_VR_EN
20
VIN
S5
30
FSB_CPURST_L
SMC
22
SLP_S3_L
02
HCPURST*
U1400
(PAGE 13)
SMC_ONOFF_L
04-1
U7870
Q7006
17
BATTERY ONLY:
PP1V5_S0_REG
15
TPS3808-1.25V
MR* U7200
RESET*
SENSE
(PAGE 58)
P1V25_S0_NB_DPLL
WOL_EN
PM_ENET_EN_L
U3820
PP1V9_ENET_REG
ENA
VOUT
(PAGE 35)
16
P3V3S0_EN 15
Q3810
P3V3_ENET_FET
PWROK
1.9V S3
PP1V25_S0_FET
Q7001
TPS731125
18
PP1V25_S0_REG
TPS79501DRB
VIN
PP3V3_ENET_FET
MCH DPLL
VIN
VOUT
CRESTLINE
PP3V3_S3
Q7004
P1V8_S0_FET
U7720
(PAGE 64)
Q7866
09
1.25V S0
TPS62510
ENA
PP3V3_S0_FET
Q3802
PP4V5_AUDIO_ANALOG
VOUT
PP3V3_S5
14 Q3801
15
U6201
1V25S0_RUNSS
12
VREG3
RSMRST_PWRGD
PP3V3ENET_SS
RESET*
U1000
(PAGE 9)
17-1
(PAGE 53)
PP5V_S5
TPS51120
U7600
(PAGE 63)
1.2V YUKON
VIN U3830
17-1
PP5V_S5_REG
08
PGOOD1,2
P5VS3_EN_L
PWRGOOD
17
CHGR_EN
28
CPU
16
VIN
13
SMC
LOGIC
CPU_PWRGD
PWROK
CPUPWRGD(GPIO49)
U2300
(PAGE 22)
25
4.5V AUDIO
TPS79501
15
Q7865
P25
24
29
U2801
PP5V_S0_FET
PM_S4_STATE_L
PLT_RST_L
RSMRST*
26 VR_PWRGOOD_DELAY
Q7000
12
06-1
PWRBTN*
VRMPWRGD
27
SMC_CPU_VSENSE
VR_PWRGOOD_DELAY
PGOOD
CK_PWRGD
PLTRST*
19
VR_ON
23
BATT_POS_F
18
VR_PWRGD_CK505_L
CLKEN#
SLG8LP537V
U2900
(PAGE 28)
U2803
VR_PWRGD_CK505
A SMC_CPU_ISENSE PPVCORE_CPU_S0
(36A MAX CURRENT)
CPUVCORE
ISL9504
3S2P
PWRGD
CLK_PWRGD
PP1V05_S0_REG_R
ICH8M
PGOOD_1V5S0
PGOOD_1V05S0
VIN
1.5VVOUT2
18
R7302
PP1V05_S0_REG
(8A MAX CURRENT)
PP1V5_S0_REG
(4A MAX CURRENT)
VOUT1
TPS51124
U7300
(PAGE 61)
SMC_BATT_ISENSE
ISL6257HRZ
U7900
(PAGE 66)
BATTERY
ENA1
U7975
VOUT
PBUS CONVERTER/
BATTERY CHARGER
SMC_DCIN_ISENSE
1.05V
17 1V05S0_RUNSS
(S0)
CLOCK
VIN
01
04
SMC_RESET_L
02
(PAGE 66)
03
3.425V G3HOT
PP3V42_G3H_REG
LT3470
U7790
(PAGE 64)
PBUSB_VSENSE
ENRGYSTR LDO
02
PPDCIN_G3H
OF
REV.
76
01
PAGE_BORDER=TRUE
Page Notes
Power aliases required by this page:
(NONE)
Signal aliases required by this page:
(NONE)
BOM OPTION
BOMOPTION
K36 GOOD
630-9104
EVT
IC,MDC,SR,E1,2.0G,800FSB,4M,BGA
U1000
CRITICAL
GOOD
337S3500
IC,MDC,SR,G0,2.2G,800FSB,4M,BGA
U1000
CRITICAL
BETTER
337S3500
IC,MDC,SR,G0,2.2G,800FSB,4M,BGA
U1000
CRITICAL
BEST
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_HEAD
PART#
QTY
DESCRIPTION
REFERENCE DESIGNATOR(S)
CRITICAL
BOM OPTION
CRITICAL
K36
TABLE_5_ITEM
343S0448
IC,CRESTLINE,GM965,667
U1400
GROUND
L8-L9
L9
---
0.031
---
0.031
0.07
L7-L8
L8
REMOVED
0.076
POWER
TABLE_5_ITEM
337S3463
REMOVED
>
L7
>>
BOM OPTION
>>
L6-L7
CRITICAL
---
---
0.014
TABLE_5_HEAD
PART#
QTY
DESCRIPTION
REFERENCE DESIGNATOR(S)
CRITICAL
BOM OPTION
TABLE_5_ITEM
0.076
SIGNAL
L9-L10
HF VERSION OF 128S0057
C4610,C4611,C6830,C6831
CRITICAL
K36
128S0164
HF VERSION OF 128S0073
C2130,C2716,C7543
CRITICAL
K36
128S0148
HF VERSION OF 128S0085
C6605
CRITICAL
K36
128S0169
HF VERSION OF 128S0111
C7220,C7352,C7542
CRITICAL
K36
IC,ICH8,BGA
U2300
CRITICAL
K36
TABLE_5_ITEM
128S0160
HF VERSION OF 128S0113
C2173,C2700
CRITICAL
K36
516-0162
J3101,J3201
CRITICAL
K36
128S0150
HF VERSION OF 128S0115
CRITICAL
K36
128S0157
HF VERSION OF 128S0122
C2220
CRITICAL
K36
128S0162
HF VERSION OF 128S0123
C2140
CRITICAL
K36
128S0135
HF VERSION OF 128S0129
C6601,C6603
CRITICAL
K36
TABLE_5_ITEM
0.156
TABLE_5_ITEM
TABLE_5_ITEM
L10
SIGNAL
L10-L11
L11
GROUND
0.1
0.014
TABLE_5_ITEM
0.076
TABLE_5_ITEM
0.1
0.014
C6204,C6205,C7651,C7652,C7691,C7692
TABLE_5_ITEM
TABLE_5_HEAD
PART#
QTY
DESCRIPTION
REFERENCE DESIGNATOR(S)
CRITICAL
BOM OPTION
TABLE_5_ITEM
341S2196
U6100
CRITICAL
K36_PGM
341S2060
IC,EEPROM,SERIAL IIC,8KBIT,SO8
U3780
CRITICAL
K36_PGM
TABLE_5_ITEM
TABLE_5_ITEM
341S2198
IC,SMC,HS8/2116
U4900
CRITICAL
K36_PGM
341S2093
IC,CYPRESS,CY7C63833,ENCORE_II,USB_CONTR
U4800
CRITICAL
K36_PGM
TABLE_5_ITEM
0.1
0.014
128S0147
TABLE_5_ITEM
338S0434
>
POWER
>
L6
0.014
0.07
>
L5-L6
>>>
0.076
GND
>> >
L5
0.079
0.014
>
L4-L5
>>
Speed)
Speed)
SIGNAL
>>
REFERENCE DESIGNATOR(S)
0.156
L3-L4
L4
0.079
0.014
>
DESCRIPTION
SIGNAL
>>
QTY
0.076
>>
L3
---
0.014
>
L2-L3
TABLE_5_HEAD
PART#
0.07
GROUND
>>
L2
0.1
>
L1-L2
0.018
0.047
>>
CONFORMAL_COAT
L1
SIGNAL(TOP)
TRACE WIDTH
(MM)
>
Speed)
Speed)
THICKNESS
(MM)
>
MLB STACKUP
LAYER
REMOVED
>
SIGNAL
GROUND
SIGNAL(High
SIGNAL(High
GROUND
POWER
POWER
GROUND
SIGNAL(High
SIGNAL(High
GROUND
SIGNAL
REMOVED
>
Top
2
3
4
5
6
7
8
9
10
11
BOTTOM
M70 GOOD
630-7935
CONCEPT
>>
>>
>>
K36 BEST
630-9106
EVT
>>
>>
>>
COMMON
ALTERNATE
ARB_ONLY
K36
LPCPLUS
INVERTER_BUF
BOM OPTION
INVERTER_UNBUF
BOM OPTION
ITP
NO_REBOOT_MODE
NBCFG_DMI_REVERSE
NBCFG_DMI_X2
NBCFG_DYN_ODT_DISABLE
NBCFG_PEG_REVERSE
NBCFG_SDVO_AND_PCIE
GOOD
BETTER
BEST
K36_PGM
YUKON_EC
YUKON_ULTRA
NORMAL
FANCY
STANDOFF
ODD_PWR_CORE
ODD_PWR_RESUME
ISL6126
BOM OPTION
ISL6130
BOM OPTION
K36 BETTER
630-9105
EVT
TABLE_5_ITEM
L11-L12
0.07
L12 SIGNAL(BOTTOM)0.047
0.018
CONFORMAL_COAT
0.1
TABLE_5_ITEM
TOTAL
1.276
---
TABLE_5_HEAD
CRITICAL
BOM OPTION
826-4393
PART#
QTY
DESCRIPTION
LBL,P/N LABEL,PCB,28MMX6MM
REFERENCE DESIGNATOR(S)
EEE:Z55
CRITICAL
GOOD
826-4393
LBL,P/N LABEL,PCB,28MMX6MM
EEE:Z56
CRITICAL
BETTER
TABLE_5_ITEM
CONFIGURATION OPTIONS
TABLE_5_ITEM
SYNC_MASTER=SMC SYNC_DATE=07/18/2005
TABLE_5_ITEM
826-4393
LBL,P/N LABEL,PCB,28MMX6MM
EEE:Z57
CRITICAL
BEST
D
APPLE INC.
DRAWING NUMBER
SCALE
SHT
NONE
REV.
051-7455
4
OF
76
01
Revision History
- WAKE-ON-WIRELESS SUPPORT - RADAR: 4954357
- ADD ISOLATION BUFFER FOR ODD_RESET_L SIGNAL, ADD 100K PULL-DOWN TO ODD_PWR_EN_L, ADD DRAG CIRCUIT TO
PROPERLY DISCHARGE ODD POWER WHEN ITS TURNED OFF - RADAR: 4923903
- ADD 270K PULL-DOWN RESISTOR ON HTPLG - RADAR: 4888755
- LOWER RDS(ON) MOSFET (FDC606P - APN: 376S0552) FOR ODD AND LCD POWER - RADAR: TBD
- HIGH-PRECISION 0.1% RESISTORS TO INCREASE OUTPUT VOLTAGE REGULATION (5V, 3.3V, PBUS_LDO) ACCURACY - RADAR:4972500
- FIX LINDA CARD POWER ALIAS (NEED TO CONNECT TO PP3V42_G3HOT INSTEAD OF PP3V3_S5) - RADAR: 4927858
- FIX MOJO-CARD SMC TX, RX REVERSAL - RADAR: 4910888
- NO STUFF 3G CONNECTOR CIRCUITRY
- CHANGE BOM STUFFING TO SPEED UP PORT POWER SHUT-OFF RESPONSE TIME DURING ACTIVE LATE-VG EVENT (RADAR: 4985252)
- CHANGE BOM STUFFING TO ENABLE ON-BOARD MICROPHONE CONNECTOR (M42/M42A SOLUTION) INSTEAD OF ROUTING
MICROPHONE THROUGH LVDS CABLE
- CHANGE LOAD CAP STUFFING OPTION FOR RTC AND ETHERNET CRYSTALS TO MEET 5XESR (-R) REQUIREMENT
- CHANGE 10UF, 16V CPU VCORE CAPS TO 10UF, 6.3V CAPS - RADAR: 4952553
- MOVE SMC RESET BUTTON PAD TO TOP SIDE OF MLB - RADAR: 4920913
- MODIFY FIREWIRE CONNECTOR SYMBOL TO SUPPORT MINI-DVI CONNECTOR WITH TAB
- TEST POINT MOVEMENTS REQUESTED BY ICT AND MAC-1 GROUPS - RADAR: 4924481
3/8/2007
CSA PAGE 22:
- 4986074 CHANGE L2205 TO R2205(100OHM,5%,1/10W,0603).
CSA PAGE 25:
- 4924443 CHANGE R2514 FROM 100K PULL-DOWN TO 10K PULL-UP TO 3.3V_S5.
CSA PAGE 77:
- 5048817 SYNC 1P25V REGULATOR CIRCUIT FROM M82, CHANGE R AND C TO 0402, CHANGE =PP3V3_S5_P1V25S0 TO =PP3V3_S5_1V25S0,
C7723 FROM 2.2NF TO 10000PF, C7724 FROM 22PF TO 100PF, C7728 FROM 2.2NF TO 10000PF,
AND REVERT REFERENCE DESIGNATORS. (CHANGE FROM TPS62510 TO LTC3412A)
3/12/2007
CSA PAGE 25:
- 4924443 CHANGE R2514 FROM 100K PULL-UP TO 47K PULL-UP.
CSA PAGE 45:
- UPDATE SYMBOL FOR J4501.
CSA PAGE 62,66,67,68:
- SYNC FROM AUDIO TEAM.
CSA PAGE 94:
- 4986074 CHANGE R9469 FOR CRT_TVO_IREF FROM 1.3K TO 1.21K.
7/17/2007
CSA PAGE 59:
- UPDATE SYMBOL FOR U5930, VENDOR PART NUMBER CHANGES FROM SMB380 TO BMA150.
6/29/2007
CSA PAGE 4:
- CHANGE GOOD CPU FROM 337S3471(1.8G) TO 337S3463(2.0G).
- CHANGE BETTER CPU FROM 337S3456(2.0G) TO 337S3464(2.2G).
- CHANGE BEST CPU FROM 337S3457(2.2G) TO 337S3465(2.4G).
- CHANGE NB FROM 338S0426(500M) TO 343S0448(667M).
- CHANGE SB FROM 338S0427 TO 338S0434.
CSA PAGE 16:
- DISCONNECT GFX_VID<0> TO GND.
- CONNECT GFX_VID<0:3> TO GFX_VID0:3 ON NB.
- ADD R1600 (0OHM, 0402) TO CONNECT GFX_VID<4> TO GND.
CSA PAGE 22:
- 5282756 ADD C2207 (0.1UF, 0402).
- SIZING DOWN R2205 FROM 0603 TO 0402 FOR PLACEMENT.
- CHANGE GFX_VID<1:4> TO GFX_VID<0:3>.
- CHANGE STRAPPING FROM 0010 ON GFX_VID<1:4> TO 0001 ON GFX_VID<0:3>.
CSA PAGE 39:
- CHANGE J3900 FROM 514S0143 TO 514-0443.
- EDIT BOM OPTION TABLE.
CSA PAGE 46:
- CHANGE U4600 FROM 353S1245 TO 353S1728.
- REMOVE MIN_NECK_WIDTH=0.3MM FROM PP5V_S3_USB2_EXTA/B.
- ADD NOSTUFF R4660 AND R4661.
CSA PAGE 47:
- CHANGE J4700 FROM 516S0251 TO 516S0588.
CSA PAGE 69:
- CHANGE J6900 FROM 518S0287 TO 518S0526.
- REPLACE BATTERY INTERFACE CIRCUIT WITH THE ONE ON M42B ESTAR.
CSA PAGE 94:
- 5040728 CHANGE L9404 FROM 155S0303 TO 155S0348.
7/5/2006
CSA PAGE 4:
- REPLACE ALL M70 WITH K36 (TEXT, BOM OPTIONS, 630 NUMBERS).
CSA PAGE 21:
- CHANGE C2173 FROM 128S0051 TO 128S0113 PER CE.
CSA PAGE 27:
- CHANGE C2700 FROM 128S0051 TO 128S0113 PER CE.
CSA PAGE 28:
- CHANGE J2800 FROM 518S0487 TO 518S0519.
CSA PAGE 46:
- REMOVE R4660 AND R4601 (U4675 BYPASS RESISTORS).
CSA PAGE 48:
- CHANGE J4810 FROM 518S0369 TO 518S0521.
CSA PAGE 55:
- CHANGE U5500 FROM M70 EMC1033 CIRCUIT TO M71 EMC1043 CIRCUIT.
- J5550 CHANGES FROM 2PIN TO 4PIN.
CSA PAGE 56:
- CHANGE J5601 FROM 518S0369 TO 518S0521.
CSA PAGE 67:
- CHANGE J6702 FROM 518S0487 TO 518S0519.
- CHANGE J6703 FROM 518S0369 TO 518S0521.
CSA PAGE 90:
- CHANGE J9000 FROM 518S0369 TO 518S0521.
7/6/2006
CSA PAGE 8:
- REMOVE NO_TEST=TRUE FOR 1V8S3_COMP, 1V8S3_FSET, 3V3S5_COMP, 3V3S5_FSET, 1V05S0_COMP, 1V05S0_FSET, IMVP6_RBIAS, IMVP6_COMP, 5VS5_RUNSS, 1V5S0_RUNSS.
- REMOVE NO_TEST=TRUE FOR CK505_PCI4_CLK_SPN, CK505_SRC1_N/P_SPN, CK505_SRC3_N/P_SPN, CK505_SRC7_N/P_SPN, CK505_SRC_CLKREQ1/3_L?SPN.
- ADD FUNC_TEST=TRUE FOR THRM_FINSTACK_P/N.
- ADD FUNC_TEST=TRUE FOR PP1V05_S0_R.
CSA PAGE 9:
- REMOVE ALIASES FOR GND_CHASSIS_AUDIO_SPKRCONN,GND_CHASSIS_AUDIO_SHIELD1,GND_CHASSIS_AUDIO_SHIELD2,GND_CHASSIS_AUDIO_SHIELD3,MIC_SHIELD_LVDS_R,MIC_SHLD_CONN.
- REMOVE ALIAS FOR =FWPWR_PWRON.
- ADD SPN ALIASES FOR TP_CK505_SRC7_N/P.
- ADD SPN ALIASES FOR CK505_PCI2/4_CLK.
CSA PAGE 12:
- REMOVE R1290 TO R1296 ON CPU_VID<0:6>.
CSA PAGE 13:
- DELETE TEXT NOTE AND WITH RESET BUTTON.
CSA PAGE 15:
- RENAME LVDS_VREFH/L TO TP_LVDS_VREFH/L.
CSA PAGE 25:
- ADD R2597 AND R2596 FOR 10K PU ON GPIO6 AND GPIO17(EXTGPU_RST_L).
- CHANGE R2514 TO 100K.
CSA PAGE 29:
- CHANGE L2902 AND L2903 FROM 155S0302 TO 0OHM R2906 AND R2907.
- NOSTUFF C2907, C2910, C2916, C2911, C2914.
- CHANGE R2900, R2901 FROM 2.2OHM TO 0OHM.
- CHANGE R2902 FROM 1OHM TO 0OHM.
CSA PAGE 44:
- REMOVE TEXT NOTE WILL CHANGE TO 606P.
CSA PAGE 53:
- RE-DRAW CPU VOLTAGE SENSE RC FILTERING.
CSA PAGE 62:
- RE-CONNECTED /SHDN INPUT OF U6801 SO THAT ITS CONTROLLED BY U6200 PORTA VREF. - DISCONNECTED GPIO1 AND TERMINATED IT WITH A 10K PULL DOWN.
- ADDED A NO STUFF PULL-UP TO CODEC_DVDD AT GPIO1.
- ADDED SMALL 15PF COMPENSATION CAP. TO U6201 FEEDBACK NETWORK (C6224).
CSA PAGE 67:
- CHANGED ALL TRANSIENT SUPPRESSORS TO 6.8V/100PF DEVICES (WERE ORIGINALLY 8V/100PF DEVICES).
- ADDED L6771 AND L6773 TO MIC INPUT EMI FILTER.
- REMOVED DZ6772.
- ADDED R6740 NO STUFF.
CSA PAGE 68:
- CONNECTED MIC_SHLD_CONN TO GND_CHASSIS_AUDIO_MIC THROUGH R6854.
- ADDED R6856 NO STUFF.
CSA PAGE 71:
- RENAME CPU_VID_R<6:0> TO CPU_VID<6:0>.
7/13/2007
CSA PAGE 4:
- CHANGE BEST CPU FROM 337S3465(2.4GHZ) TO 337S3464(2.2GHZ).
CSA PAGE 38:
- CHANGE C3831 AND C3832 FROM 138S0582 TO 138S0554 (DONT NEED LOW-PROFILE PARTS).
7/12/2007
CSA PAGE 43:
- CHANGE J4300 FROM 514-0289 TO 514-0456 (SAME JEDEC).
- UPDATE BOM OPTION TABLE FOR J4300.
- NORMAL CHANGES FROM 514-0359 TO 514-0456, FANCY CHANGES FROM 514-0316 TO 514-0476.
CSA PAGE 46:
- CHANGE J4600 AND J4601 FROM 514-0288 TO 514-0457 (DIFFERENT JEDEC, SAME LANDPATTERN).
- UPDATE BOM OPTION TABLE FOR J4600 AND J4601.
- NORMAL CHANGES FROM 514-0288 TO 514-0457, FANCY CHANGES FROM 514-0315 TO 514-0477.
CSA PAGE 62:
- ADD PAGE_TITLE AUDIO: CODEC.
CSA PAGE 67:
- CHANGE J6700 FROM 514-0409 TO 514-0459 (DIFFERENT JEDEC, SAME LANDPATTERN).
- UPDATE BOM OPTION TABLE FOR J6700.
- NORMAL CHANGES FROM 514-0409 TO 514-0459, FANCY CHANGES FROM 514-0411 TO 514-0479.
- CHANGE J6750 FROM 514-0408 TO 514-0458 (DIFFERENT JEDEC, SAME LANDPATTERN).
- UPDATE BOM OPTION TABLE FOR J6750.
- NORMAL CHANGES FROM 514-0408 TO 514-0458, FANCY CHANGES FROM 514-0410 TO 514-0478.
CSA PAGE 79:
- CHANGE L7900 FROM 152S0302 TO 152S0670 FOR CORRECT AVL.
CSA PAGE 94:
- UPDATE BOM OPTION TABLE FOR J9401.
- NORMAL CHANGES FROM 514-0375 TO 514-0480, FANCY CHANGES FROM 514-0376 TO 514-0481.
3/14/2007
CSA PAGE 47:
- ADD TEXT NOTE TO UPDATE J4700 FROM 516S0251 TO 516S0588 WHEN SYMBOL IS READY.
CSA PAGE 69:
- ADD TEXT NOTE TO UPDATE J6900 FROM 518S0287 TO 518S0526 WHEN SYMBOL IS READY.
CSA PAGE 90:
- DELETE LVDS_VREFH AND LVDS_VREFL TO GROUND TO FIX LVDS GLITCH.
CSA PAGE 94:
- ADD TEXT NOTE TO CHANGE L9404 FROM 155S0303 TO 155S0348 WHEN SYMBOL IS READY.
7/11/2007
CSA PAGE 9:
- CHANGE Z0901 AND Z0906 FROM 998-1178 TO 998-1186 (NON-PLATED).
CSA PAGE 31:
- STUFF C3110 AND C3111.
CSA PAGE 32:
- STUFF C3210 AND C3211.
CSA PAGE 39:
- UPDATE PN FOR FANCY RJ45 CONNECTOR, 514-0475.
CSA PAGE 50:
- REMOVE R5077 (BECOMES R5931).
CSA PAGE 59:
- ADD R5930, 10K PU ON SMC_SMS_INT.
- ADD R5931 (WAS R5077 BEFORE), 10K PD ON SMC_SMS_INIT.
- STUFF U5930 (DIGITAL ACCELEROMETER) CIRCUIT.
3/5/2007
CSA PAGE 8:
- 4954357 ADD =PP3V3_S3_AIRPORT_AUX BACK TO PP3V3_S3 ALIAS.
CSA PAGE 34:
- 4954357 BREAK OUT =PP3V3_S3_AIRPORT_AUX(J3400,PIN 24) FROM PP3V3_S3_AP_AUX AGAIN.
- 4954357 MOVE C3409 AND C3410 FROM PP3V3_S3_AP_AUX RAIL TO =PP3V3_S3_AIRPORT_AUX RAIL.
CSA PAGE 49:
- 5040728 STUFF C9421 FOR EMI.
CSA PAGE 62,66,67,68:
- SYNC FROM AUDIO TEAM.
CSA PAGE 67:
- 4999533 SWAP PIN 2 AND PIN 3 OF MIC CONNECTOR, BACK TO M42 PIN OUT.
CSA PAGE 79:
- 5029811 CHANGE Q7940 FROM 376S0326 TO 376S0558.
7/10/2007
CSA PAGE 4:
- BOOTROM PART NUMBER CHANGES FROM 341S2085 TO 341S2196.
- SMC PART NUMBER CHANGES FROM 341S2088 TO 341S2198.
- UPDATE EEE CODES, Z55 FOR GOOD, Z56 FOR BETTER, Z57 FOR BEST.
CSA PAGE 8:
- ADD ALIAS =PP3V3_S3_SMBUS_SMC_MGMT TO PP3V3_S3.
CSA PAGE 29:
- ADD CRITICAL TO U2900.
CSA PAGE 44:
- ADD CRITICAL TO U4401.
CSA PAGE 46:
- CHANGE U4675 FROM APN 353S1505 TO APN 353S1742. (SMALL PACKAGE)
- ADD R4670 & R4671. (USB BYPASS ROUTING).
CSA PAGE 49:
- REMOVE ALIAS FOR =SMC_SMS_INT TO SMC_PG1 - SIGNAL SHOULD JUST BE CALLED SMC_SMS_INT.
CSA PAGE 50:
- CHANGE R5077 FROM PULL-UP TO A PULL-DOWN RESISTOR AND NAME IT SMC_SMS_INT.
CSA PAGE 52:
- ICH8-M ME SMBUS:
- SMB_ME_CLK AND SMB_ME_DATA ON SOUTHBRIDGE DISCONNECTED FROM SMB_MGMT_CLK AND SMB_MGMT_DATA FROM SMC.B
- THE 10K PULL-UP RESISTORS (R5230 AND R5231), AND STILL REMAIN CONNECTED TO PP3V3_S5_SMBUS_SB_ME AND STAY ON THE SB SIDE.
- SMC MANAGEMENT SMBUS CONNECTION:
- ADD TWO NEW 10K PULL-UP RESISTOR (R5232 & R5233) TO =PP3V3_S3_SMBUS_SMC_MGMT.B
- THE PULL-UP RESISTORS SHOULD BE CONNECTED BETWEEN SMB_MGMT_CLK AND SMB_MGMT_DATA TO =I2C_SMS_SCL AND =I2C_SMS_SDA OF THE NEW ACCELEROMETER.
CSA PAGE 59:
-ADD 2ND SMS (U5930).
CSA PAGE 62:
- CHANGED C6210 FROM A CASE-R 10UF TANT. CAP. TO A SMA-LF 3.3UF TANT. CAP.
- MADE NO_TEST ATTRIBUTE VISIBLE FOR NET NC_VRP CONNECTED TO PIN 37 OF U6200.
CSA PAGE 67:
- REMOVED NO STUFF RESISTORS R6730, R6731, AND R6732. ALSO REMOVED L6774.
- STUFFED R6740.
- MADE DZ6702, DZ6703, DZ6704, DZ6705, DZ6752, DZ6753, DZ6754, DZ6755, DZ6770, DZ6771B CRITICAL.
CSA PAGE 68:
- NO STUFFED R6854
CSA PAGE 72:
- CHANGE R7208 FROM 8.66K TO 15.8K.
7/24/2007
CSA PAGE 4:
- CHANGE BETTER AND BEST CPU TO G0 STEPPING PARTS (FROM 337S3464 TO 337S3500).
CSA PAGE 22:
- STUFF R2242 AND NOSTUFF R2247.
CSA PAGE 92:
- CHANGE R9201 AND R9202 FROM 5.23K TO 2.94K.
- CHANGE R9211 AND R9212 FROM 16.5K TO 9.09K.
Revision History
SYNC_MASTER=N/A
SYNC_DATE=N/A
D
APPLE INC.
DRAWING NUMBER
051-7455
SCALE
SHT
NONE
OF
REV.
76
01
Fan Connectors
NO_TEST
IMVP6_RBIAS
IMVP6_COMP
5VS5_RUNSS
1V5S0_RUNSS
I93
I94
I95
I96
59A4 59B7
59A4 59B7
I12
I15
63B5 65C5
I16
58B1 61B5
I157
I158
I159
FUNC_TEST
=PP5V_S0_FAN_RT
TRUE
FAN_RT_PWM
TRUE
FAN_RT_TACH
TRUE
=PP3V3_S0_FAN_RT
TRUE
SMC_FAN_1_CTL
TRUE
SMC_FAN_1_TACH
TRUE
I1
50B3
I3
50C3
I4
7C4 50C4
44A8 50B4
I177
44A8 50C4
I180
CLOCK NO_TESTS
I111
I112
I113
I115
I114
I116
I117
I118
I119
I120
I122
NO_TEST
TRUE
TRUE
TRUE
TRUE
TRUE
TRUE
TRUE
TRUE
TRUE
TRUE
TRUE
I19
I18
CK505_CPU0_N
CK505_CPU0_P
CK505_CPU1_N
CK505_CPU1_P
CK505_CPU2_ITP_SRC10_N
CK505_CPU2_ITP_SRC10_P
CK505_DOT96_27M_N
CK505_DOT96_27M_P
CK505_LVDS_N
CK505_LVDS_P
I17
I71
I72
I73
I74
I75
I76
I77
I78
I79
CK505_PCIF1_CLK
I80
I81
I82
I83
I125
I183
TRUE
TRUE
CK505_SRC2_N
CK505_SRC2_P
I84
28B4 29C6 75C3
I85
I86
I87
I186
I187
I188
I189
I190
I191
I194
I195
TRUE
TRUE
TRUE
TRUE
TRUE
TRUE
TRUE
TRUE
CK505_SRC4_N
CK505_SRC4_P
CK505_SRC5_N
CK505_SRC5_P
CK505_SRC6_N
CK505_SRC6_P
CK505_SRC8_N
CK505_SRC8_P
I88
28B4 29C6 75C3
I89
I91
I90
I201
I202
I203
I204
I205
I206
I207
I208
FW_B_TPA_N_SPN
FW_B_TPA_P_SPN
FW_B_TPBIAS_SPN
FW_B_TPB_N_SPN
FW_B_TPB_P_SPN
FW_C_TPA_N_SPN
FW_C_TPA_P_SPN
FW_C_TPBIAS_SPN
FW_C_TPB_N_SPN
FW_C_TPB_P_SPN
I92
I152
8D1
I155
8D1
8D1
8D1
I153
8D1
I154
8D1
I156
8D1
8D1
8D1
I160
8D1
I161
LVDS NO_TESTS
I209
I210
I211
I212
I213
I214
I215
NO_TEST
TRUE
TRUE
TRUE
TRUE
TRUE
TRUE
TRUE
I244
I162
I163
LVDS_B_CLK_N_SPN
LVDS_B_CLK_P_SPN
LVDS_B_DATA_N0_SPN
LVDS_B_DATA_N1_SPN
LVDS_B_DATA_N2_SPN
LVDS_B_DATA_P1_SPN
LVDS_B_DATA_P2_SPN
I164
8D5
I169
8D5
I166
8D5
I167
8D5
I168
8D5
I174
8D5
I171
I173
I175
I176
I178
I181
I223
I236
NO_TEST
TRUE
7B1 46C6
7A7 46C6
I10
I21
I22
I24
I23
I25
I45
I29
44C1 46B6
I32
I31
44D1 46B6
I33
I36
46C5
I38
57A5
57A5
57B5
57A5
Audio FUNC_TEST
=PP5V_S0_AUDIO_AMP
TRUE
=PP5V_S0_AUDIO
TRUE
GND_AUDIO_AMP
TRUE
GND_AUDIO_CODEC
TRUE
ACZ_SDATAIN<0>
TRUE
ACZ_SDATAOUT
TRUE
ACZ_BITCLK
TRUE
ACZ_RST_L
TRUE
ACZ_SYNC
TRUE
Battery FUNC_TEST
SMC_BATT_ISET
TRUE
SMC_BATT_CHG_EN
TRUE
SMC_BC_ACOK
TRUE
SMC_ADAPTER_EN
TRUE
SMC_BATT_TRICKLE_EN_L
TRUE
SYS_ONEWIRE
TRUE
8A5 53C7
8A5 53C7
8A5 53C7
8A5 53B7
8A5 53C7
44B5 66A8
44C8 45B6 66A4
66A6
44C5 45B6 57C3
57C7
45B3 57C4
33C7 35C7 38C6
44D5
44C8 45B6
66A3
44B8 45D5 57C8
FUNC_TEST
=PP1V05_S0_REG
TRUE
SMBus FUNC_TEST
SMBUS_SMC_B_S0_SCL
TRUE
SMBUS_SMC_B_S0_SDA
TRUE
FIREWIRE FUNC_TEST
PPFW_SWITCH
TRUE
SLEEP LED FUNC_TEST
SYS_LED_ANODE
TRUE
SMC FUNC_TEST
SMC_LID
TRUE
SMC_MANUAL_RST_L
TRUE
SMC_CPU_VSENSE
TRUE
Power Supply FUNC_TEST
ALL_SYS_PWRGD
TRUE
PPVCORE_S0_CPU
TRUE
PP1V05_S0_R
TRUE
PP1V05_S0
TRUE
PP1V5_S0
TRUE
PP1V8_S0
TRUE
PP3V3_S0
TRUE
PP5V_S0
TRUE
PP1V2_ENET_S0
TRUE
PP1V8_S3
TRUE
8D5
I172
I219
I11
I44
I47
I46
I48
I224
I225
I240
I241
USB FUNC_TEST
TRUE
TRUE
TRUE
TRUE
TRUE
TRUE
TRUE
TRUE
TP_USB_EXCARD_P
TP_USB_EXCARD_N
TP_USB_EXTC_P
TP_USB_EXTC_N
USB2_BT_F_P
USB2_BT_F_N
USB2_3G_F_N
USB2_3G_F_P
8B2
8B2
8B2
8B2
43C2
43C2
43A4
43A4
I57
DC-JACK FUNC_TEST
ACIN_ENABLE_GATE
TRUE
I58
7D8 61B8
FIREWARE NO_TESTS
I200
I9
I151
I199
FUNC_TEST
=PP3V42_G3H_LPCPLUS
TRUE
=PP5V_S0_LPCPLUS
TRUE
LPC_AD<0>
TRUE
LPC_AD<1>
TRUE
LPC_FRAME_L
TRUE
PM_CLKRUN_L
TRUE
BOOT_LPC_SPI_L
TRUE
SMC_TMS
TRUE
DEBUG_RESET_L
TRUE
SMC_TRST_L
TRUE
SMC_TDO
TRUE
SMC_MD1
TRUE
SMC_TX_L
TRUE
FWH_INIT_L
TRUE
PCI_CLK33M_LPCPLUS
TRUE
LPC_AD<2>
TRUE
LPC_AD<3>
TRUE
INT_SERIRQ
TRUE
PM_SUS_STAT_L
TRUE
SMC_TDI
TRUE
SMC_TCK
TRUE
SMC_RESET_L
TRUE
SMC_NMI
TRUE
SMC_RX_L
TRUE
LINDACARD_GPIO
TRUE
BATT_POS
BATT_NEG
TRUE
TRUE
I182
NO_TEST
TRUE
TRUE
TRUE
TRUE
TRUE
TRUE
TRUE
TRUE
TRUE
TRUE
FUNC_TEST
SMC_BS_ALRT_L
TRUE
SMBUS_BATT_SCL_F
TRUE
SMBUS_BATT_SDA_F
TRUE
TRUE
TRUE
TRUE
TRUE
TRUE
TRUE
PP3V3_S3
PP5V_S3
PP3V3_S5
PP5V_S5
PP3V42_G3H
PPBUS_G3H
TRUE
TRUE
TRUE
TRUE
PP18V5_G3H
PP0V9_S0
PP3V3_S3_BT_F
GND_BT_F
47C5 76C3
47C5 76C3
I60
I59
I61
38D3
I63
40C5 45A3
I221
I220
42C3 44B5 45C5 57A8
I222
45D8
I238
44C5 48B1
I237
I239
27A5 44D8 58A3
7D7
7D7
I227
7D7 45D2
I226
7C7
I228
7B7
I230
7D4 45D1
I229
7A7
I231
INVERTER
TRUE
TRUE
TRUE
TRUE
57C3 66A6
66B5 66C2
CONNECTOR FUNC_TEST
PPBUS_ALL_INV_CONN
INV_GND
PP5V_INV_F
INV_BKLIGHT_PWM_L
67D3
67D2
67D3
67D2
MIC FUNC_TEST
MIC_HI
TRUE
MIC_LO
TRUE
MIC_SHIELD
TRUE
MIC_HI_CONN
TRUE
MIC_LO_CONN
TRUE
MIC_SHLD_CONN
TRUE
55B3 56A6
55B3 56A6
B
55B1 55D3
55B1 55D3
55A1 55D3 56A6
SPEAKER FUNC_TEST
SPKRCONN_L_N_OUT
TRUE
SPKRCONN_L_P_OUT
TRUE
SPKRCONN_R_N_OUT
TRUE
SPKRCONN_R_P_OUT
TRUE
SPKRCONN_SUB_N_OUT
TRUE
SPKRCONN_SUB_P_OUT
TRUE
54C1 55C2
54C1 55C2
54C1 55C2
54D1 55C2
54B1 55C2
54B1 55C2
7B5
7B4
7A4
I232
7A4
I233
7D1
I234
7C1
I235
7C1
I242
7B1
I243
THERMAL FUNC_TEST
THRM_HEATPIPE_P
TRUE
THRM_HEATPIPE_N
TRUE
THRM_DIMM_DX_F_N
TRUE
THRM_DIMM_DX_F_P
TRUE
THRM_FINSTACK_P
TRUE
THRM_FINSTACK_N
TRUE
7B1
49D6
49D6
49B6
49B6
49C6
49C6
FUNC TEST 1 OF 2
7D7
43D2
43C2
SMC_FAN_3_TACH
D
APPLE INC.
DRAWING NUMBER
051-7455
SCALE
SHT
NONE
OF
REV.
76
01
"S0,S0M" RAILS
=PP3V3_S0_FET
PP3V3_S0
59D1
=PPVORE_S0_CPU_REG
62B8
=PP0V9_S0_REG
(DDR2 TERMINATION 0.9V PWR)
PPVCORE_S0_CPU
MIN_LINE_WIDTH=0.3 mm
MIN_NECK_WIDTH=0.3 MM
VOLTAGE=0.9V
MAKE_BASE=TRUE
=PPVCORE_S0_CPU
PP0V9_S0
MIN_LINE_WIDTH=0.4 mm
MIN_NECK_WIDTH=0.2 mm
VOLTAGE=0.9V
MAKE_BASE=TRUE
=PP0V9_S3M_MEM_TERM
61B8 6B2
=PP1V05_S0_REG
PP1V05_S0
MIN_LINE_WIDTH=0.6 mm
MIN_NECK_WIDTH=0.2 mm
VOLTAGE=1.05V
MAKE_BASE=TRUE
=PP1V05_S0_SB_CPU_IO
=PPVCORE_S0_SB
61C7
=PP1V05_S0_REG_R
PP1V05_S0_R
MIN_LINE_WIDTH=0.6 mm
MIN_NECK_WIDTH=0.2 mm
VOLTAGE=1.05V
MAKE_BASE=TRUE
=PP1V05_S0_CPU
=PP1V05_S0_NB_PCIE
=PPVCORE_S0_NB
=PP1V25R1V05_S0_FSB_NB
=PP1V25R1V05_S0_NB_VTT
=PP1V05_S0M_NB_VCCAXM
64B2
=PP1V25_S0_REG
62C5 61B1
6A2
32D4
6B2 45D2
25D3 26D2
=PP3V3_S0_SMC_LS
6B2
PP1V5_S0
MIN_LINE_WIDTH=0.5 mm
MIN_NECK_WIDTH=0.2 mm
VOLTAGE=1.5V
MAKE_BASE=TRUE
6B2
=PP1V5_S0_CPU
10B7 11B3
=PP1V5_S0_NB_TVDAC
21D8
=PP1V5_S0_SB
26A8 26C8 26D6
=PP1V5_S0_SB_VCC1_5_A_ARX
25B6 26D5
=PP1V5_S0_SB_VCC1_5_A_ATX
25B6 26C6
=PP1V5_S0_SB_VCC1_5_A
25B6 26C2
=PP1V5_S0_SB_VCCUSBPLL
25A6 26B6
=PP1V5_S0_SB_VCC1_5_A_USB_CORE 25B6 26C2
=PP1V5_S0_AIRPORT
33D2
=PP1V5_S0_NB_FOLLOW
21D5
58C4 58B8
=PP1V8_S0_FET
PP1V8_S0
MIN_LINE_WIDTH=0.4 mm
MIN_NECK_WIDTH=0.2 mm
VOLTAGE=1.8V
MAKE_BASE=TRUE
=PP1V8_S0_NB_LVDS
=PP1V8_S0_NB_DPLL
=PP1V8_S0_TMDS
B
60C2
=PPVCORE_S0_NB_GFX_IMVP
35C1
=PP1V2_ENET_REG
PP1V2_ENET_S0
MIN_LINE_WIDTH=0.6 mm
MIN_NECK_WIDTH=0.2 mm
VOLTAGE=1.2V
MAKE_BASE=TRUE
=PP1V2_ENET_PHY
35D4
=PP3V3_ENET_PHY
PP3V3_ENET_FET
MIN_LINE_WIDTH=0.6 mm
MIN_NECK_WIDTH=0.2 mm
VOLTAGE=3.3V
MAKE_BASE=TRUE
35D1 35B2
21C5
=PP1V8_S3_REG
62B2
68D6
=PP5V_S0_SB
=PP5V_S0_SATA
=PP5V_S0_3G
=PP5V_S0_LPCPLUS
=PP5V_S0_ISENSECAL
=PP5V_S0_FAN_RT
=PP5V_S0_AUDIO
=PP5V_S0_AUDIO_AMP
=PP5V_S0_CPU_IMVP
=PP5V_S0_NB_GFX_IMVP
=PP5V_S0_LCD
=PP5V_S0_TMDS
=PP5V_S0_NB_TVDAC
=PP5V_S0_IDE_RESET
27B6 27B8
27D4
38C6
=PP3V3_S5_SMBUS_SB_ME
=PP3V3_S5_ROM
=PP3V3_S5_LCD
=PP3V3_S5_SB_CLINK1
=PP3V3_S5_1V25S0
=PP3V3_S5_AIRPORT_AUX
39C2
=PP5V_S5_REG
=PP3V3_S3_FET
43B5
6D2 46C6
48B8
6D2 50C4
6D1 53A7 56C4
6D1 54B8 54C8 54D8
6A2
26D8
39D6
41C8
61C4
62C5
65B6
58B3 58C6 58D5 65B5
66B3
25B3 26C4
23A3
"G3H" RAILS
18C6 20A6
30A7 31A3 31A7
25A6 26B2
25A3 26D3
24C1
64C4
=PP3V42_G3H_REG
=PP1V9_ENET_REG
PP1V9_ENET_S0
=PP1V8_S0_YUKON
36D8
=PP1V8R2V5_ENET_PHY
6A2
=PP3V42_G3H_SMC
=PP3V42_G3H_SMCVREF
=PP3V42_G3H_SMBUS_SMC_BSA
=PP3V42_G3H_ACIN
=PP3V42_G3H_LIDSWITCH
=PP3V42_G3H_PWRCTL
=PP3V42_G3H_SB_RTC
=PP3V42_G3H_SMCUSBMUX
=PP3V42_G3H_LPCPLUS
MIN_LINE_WIDTH=0.6 mm
MIN_NECK_WIDTH=0.2 mm
VOLTAGE=2.5V
MAKE_BASE=TRUE
34D6
PP3V42_G3H
MIN_LINE_WIDTH=0.3 mm
MIN_NECK_WIDTH=0.2 mm
VOLTAGE=3.42V
MAKE_BASE=TRUE
34C7
34D6
57D1
=PP18V5_G3H_INRUSH
57D3
=PPDCIN_G3H
6A2
45C8
47C3
57C4 66A5 66A8 66B8
57A8
65C7
27D7
41A6
6D2 46C6
PP18V5_G3H
6A2
=PP18V5_G3H_CHGR
66D8
MIN_LINE_WIDTH=0.6 MM
MIN_NECK_WIDTH=0.20 MM
VOLTAGE=18.5V
MAKE_BASE=TRUE
PPDCIN_G3H
MIN_LINE_WIDTH=0.6 mm
MIN_NECK_WIDTH=0.2 mm
VOLTAGE=18.5V
MAKE_BASE=TRUE
=PPVIN_G3H_P3V42G3H
64C6
58C5
20A5 20A6
66C2
=PPBUSA_G3H
PPBUS_G3H
6A2
MIN_LINE_WIDTH=0.6 mm
MIN_NECK_WIDTH=0.2 mm
VOLTAGE=18.5V
MAKE_BASE=TRUE
=PPVIN_S0_NB_DPLL
=PPBUS_S5_FWPWRSW
PP1V8_S3_MEM_NB
MIN_LINE_WIDTH=0.6 mm
MIN_NECK_WIDTH=0.4 mm
VOLTAGE=1.8V
MAKE_BASE=TRUE
66C2
38D5
=PPVIN_S5_CPU_IMVP
=PPVIN_S5_NB_GFX_IMVP
=PPBUSB_G3H
=PPBUS_S5_INV
67D4
=PPVIN_S5_1V8S30V9S0
=PPVIN_S5_5VS5
=PPVIN_S5_3V3S5
=PPVIN_S5_1V5S0
=PPVIN_S5_1V05S0
=PPVIN_S5_IMVP
6A2
62B3
63A6 63B6
63B3
61B3
61B5
45A6
33C2
37D5
37C5
43D3
51C7
47D3
62A2 62C2
Power Aliases
35D7
47C3 51B6
SYNC_MASTER=WFERRY
SYNC_DATE=06/15/2006
35D3
59D8
60D2
67D7
69D7
21D6
65B4
=PP5V_S3_FET
PP5V_S3
6A2
MIN_LINE_WIDTH=0.6 mm
MIN_NECK_WIDTH=0.2 mm
VOLTAGE=5V
MAKE_BASE=TRUE
39B7
SIZE
42D6
43D8
APPLE INC.
67A5
DRAWING NUMBER
051-7455
SCALE
SHT
NONE
25A3 26D2
64B6
=PP5V_S5_PWRCTL
=PP5V_S5_FET
48D2
=PP5V_S3_SYSLED
=PP5V_S3_GEYSER
=PP5V_S3_IR
=PP5V_S3_CAMERA
67C7
=PP5V_S5_1V51V05S0
=PP5V_S5_1V8S30V9S0
=PP3V3_S3_AIRPORT_AUX
=PP3V3_S3_FW
=PP3V3_S3_PCI
=PP3V3_S3_BT
=PP3V3_S3_SMS
=PP3V3_S3_SMBUS_SMC_A_S3
=PP3V3_S3_PDCISENS
=PP3V3_S3_ENETPWRCTL
=PP3V3_S3_SMBUS_SMC_MGMT
=PP3V3_ENET_P3V3ENETFET
40C6
24B1
=PP5V_S5_SB
=PP5V_S5_PATA
=PP5V_S5_USB
MIN_LINE_WIDTH=0.6 mm
MIN_NECK_WIDTH=0.2 mm
VOLTAGE=3.3V
MAKE_BASE=TRUE
26D8
24D8
52C6
PP5V_S5
60C7
PP3V3_S3
6A2
23C8
47A7
MIN_LINE_WIDTH=0.6 mm
MIN_NECK_WIDTH=0.2 mm
VOLTAGE=5V
MAKE_BASE=TRUE
=PP1V8_S3_REG_R
27C5
33C6
59D8
=PP1V8_S3_FET
=PP1V8_S3_MEMVREF
=PP1V8_S3_MEM
=PP1V8_ENET_P1V8ENETFET
65C3 65A4
MIN_LINE_WIDTH=0.6 mm
MIN_NECK_WIDTH=0.2 mm
VOLTAGE=5V
MAKE_BASE=TRUE
26D8 39C8
PP1V8_S3
PPVCORE_S0_NB_GFX
PP5V_S0
25C3 26A8
63B8
=PP1V8_S3M_MEM_NB
=PP1V8_S3_NB_VCC
=PP5V_S0_FET
25C3 26B8
8A4
MIN_LINE_WIDTH=0.6 mm
MIN_NECK_WIDTH=0.2 mm
VOLTAGE=1.8V
MAKE_BASE=TRUE
21A7
62C4
58D4 58C8
"S3" RAILS
6B2
MIN_LINE_WIDTH=0.5 mm
MIN_NECK_WIDTH=0.25 mm
VOLTAGE=1.25V
MAKE_BASE=TRUE
=PPVCORE_S0_NB_GFX
6A2
=PP3V3_S5_SB_PM
=PP3V3_S5_SB_USB
=PP3V3_S5_SB_GPIO
=PP3V3_S5_SB
=PP3V3_S5_FET
=PP3V3_S5_SB_VCCSUS3_3_USB
=PP3V3_S5_SB_VCCSUS3_3
=PP3V3_S5_SB_3V3_VCCSUSHDA
=PP3V3_S5_FWLATEVG
25B3 26B4
25C3 26B4
6D2 50C4
=PP3V3_S0_SB_PCI
58A3
25A6
49C2 49D2
=PP3V3_S0_NB_VCCA_PEG_BG
=PPSPD_S0_MEM
=PP3V3_S0MWOL_SB_VCCCL3_3
=PP3V3_S0MWOL_SB_VCCLAN3_3
=PP3V3_S0MWOL_SB_CLINK0
=PP3V3_S0_CK505
=PP3V3_S0_NB_VCCSYNC
=PP3V3_S0_NB
=PP3V3_S0_TMDS
20B8
6A2
47C5
20D4
20A8
PP3V3_S5
MIN_LINE_WIDTH=0.6 mm
MIN_NECK_WIDTH=0.2 mm
VOLTAGE=3.3V
MAKE_BASE=TRUE
47D5
25C3 26A6
=PP3V3_S5_REG
47D8
=PP3V3_S0_PDCISENS
=PP3V3_S0_LCD
=PP3V3_S0_TMDS
=PP3V3_S0_CPUPOWER
=PP3V3_S0_PBATTISENS
=PP3V3R1V5_S0_SB_VCCHDA
18C3 20A8
63B1
20B2
46C4
=PP3V3_S0_IMVP
=PP3V3_S0_NB_GFX_IMVP
45D4
=PP3V3_S0_LPCPLUS
=PP3V3_S0_SMBUS_SB
=PP3V3_S0_SMBUS_SMC_0_S0
=PP3V3_S0_SMBUS_SMC_B_S0
=PP3V3_S0_THRM_SNR
=PP3V3_S0_FAN_RT
=PP3V3_S0_ENET
=PP3V3_S0_AUDIO
PP1V25_S0
=PP1V25_S0_SB_DMI
=PP1V25_S0_NB_VCCAXF
=PP1V25_S0_NB_PLL
=PP1V25_S0_NB_VCC
=PP1V25_S0_NB_VCCA
=PP1V25_S0_FET
=PP1V5_S0_REG
=PP3V3_S0_NB_VCCHV
=PP3V3_S0_NB_FOLLOW
=PP3V3_S0_SB_GPIO
=PP3V3_S0_SB_VCCGLAN3_3
=PP3V3_S0_SB_VCC3_3_PCI
=PP3V3_S0_SB_VCC3_3_IDE
=PP3V3_S0_SB_VCC3_3_VCCPCORE
=PP3V3_S0_SB_VCC3_3_SATA
=PP3V3_S0_SB_VCC3_3_DMI
=PP3V3_S0_SB
=PP3V3_S0_SB_PM
=PP3V3_S0_RSTBUF
=PP3V3_S0_AIRPORT
=PP3V3_S0_FW
=PP3V3_S0_PATA
MIN_LINE_WIDTH=0.6 mm
MIN_NECK_WIDTH=0.2 mm
VOLTAGE=1.25V
MAKE_BASE=TRUE
=PP1V25_S0_NB_PLL
=PP1V25_S0_NB_VCCDMI
6B2
"S5" RAILS
6A2 45D1
MIN_LINE_WIDTH=0.6 mm
MIN_NECK_WIDTH=0.2 mm
VOLTAGE=3.3V
MAKE_BASE=TRUE
OF
REV.
76
01
67C2
INVT_CHGND
VOLTAGE=0V
MAKE_BASE=TRUE
43B5 43A5
LVDS ALIASES
ZS0920
1 EMI-SPRING
LVDS_B_CLK_N
LVDS_B_CLK_P
LVDS_B_DATA_N<0>
LVDS_B_DATA_N<1>
LVDS_B_DATA_N<2>
14C5
=GND_CHASSIS_3GPOWER
14C5
14C5
CHASSIS GND
14C5
14C5
TP_LVDS_B_DATAN3
15C6
OMIT
GND_CHASSIS_IO Z0906
5R2P3-7SQBNP
=GND_BATT_CHGND
=GND_CHASSIS_AUDIO_JACK
57A6
55C3
30A5
LVDS_B_CLK_N_SPN
6A7
LVDS_B_CLK_P_SPNMAKE_BASE=TRUE
6A7
MAKE_BASE=TRUE
LVDS_B_DATA_N0_SPN
6A7
MAKE_BASE=TRUE
LVDS_B_DATA_N1_SPN
6A7
MAKE_BASE=TRUE
LVDS_B_DATA_N2_SPN
6A7
MAKE_BASE=TRUE
LVDS_B_DATA_N3_SPN
22B6
22B6
22B6
22B6
LVDS_B_DATA_P<0>
LVDS_B_DATA_P<1>
LVDS_B_DATA_P<2>
TP_LVDS_B_DATAP3
LVDS_B_DATA_P0_SPN
MAKE_BASE=TRUE
LVDS_B_DATA_P1_SPN
6A7
MAKE_BASE=TRUE
LVDS_B_DATA_P2_SPN
6A7
MAKE_BASE=TRUE
LVDS_B_DATA_P3_SPN
TP_LVDS_A_DATAP3
TP_LVDS_A_DATAN3
LVDS_A_DATA_P3_SPN
MAKE_BASE=TRUE
LVDS_A_DATA_N3_SPN
14C5
14C5
15C6
22B6
22B6
22B6
15C6
OMIT
Z0907
40C8
VOLTAGE=0V
MAKE_BASE=TRUE
=GND_CHASSIS_LVDS
6P5R2P6-7SQB
1
14D3
14D3
14D3
1 C0908
C0907
0.1UF
0.01UF
14D3
10%
10%
16V
2 X5R
402
14D3
14D3
14D3
2 16V
CERM
14D3
402
14D3
14C3
GND_CHASSIS_DCIN Z0902
VOLTAGE=0V
MAKE_BASE=TRUE
57C8
=GND_DCIN_CHGND
36B2
=GND_CHASSIS_RJ45
7X7R2P3-5B
1
14C3
14C3
14C3
14C3
14C3
69C4 69A4
=GND_CHASSIS_TMDS_UPPER
C0930
14C3
0.1UF
14C3
10%
16V
2 X5R
402
14C3
14C3
14C3
38B1
41C4 41C2 41A4 41A2
Z0908
8D7
5P0R2P3-7BLB
1
=GND_CHASSIS_FW_DOWN
=GND_CHASSIS_USB
1 C0911
C0910
0.1UF
0.01UF
10%
2 16V
X5R
402
14C3
14C3
14C3
14C3
14C3
14C3
14C3
10%
2 16V
CERM
402
14C3
14C3
14C3
OMIT
GND_CHASSIS_CENTER Z0910
VOLTAGE=0V
5R2P3-7SQB
MAKE_BASE=TRUE
=GND_CHASSIS_DIPDIMM_CENTER
C0916 1 C0917
0.01UF
10%
0.1UF
10%
2 16V
CERM
2 16V
X5R
402
402
14B3
14B3
14B3
14B3
14B3
14B3
14B3
14B3
14B3
31D4
14B3
OMIT
GND_CHASSIS_RIGHT Z0909
VOLTAGE=0V
5R2P3-7SQB
MAKE_BASE=TRUE
14B3
14B3
C0914 1 C0915
14B3
=GND_CHASSIS_DIPDIMM_RIGHT
14B3
0.01UF
10%
0.1UF
10%
16V
2 X5R
402
14B3
14B3
2 16V
CERM
14B3
402
14B3
OMIT
OMIT
Z0901
Z0911
5R2P3-7SQBNP
5R2P3-7B
1
1
GND_CHASSIS_CPU
GND_CHASSIS_FANSCREW
14B3
14B3
14A3
14A3
14A3
1 C0913
C0912
0.1UF
0.01UF
10%
10%
2 16V
X5R
402
C0918
0.1UF
10%
2 16V
X5R
402
2 16V
CERM
402
14A3
0.01UF
10%
73C3 22C8
402
73C3 22C8
73C3 22C8
NB_RIGHT_DOWN_SCREW 1
R0912
1/16W
MF-LF
2402
73B3 22B8
TP_PCIE_A_D2R_N
23D5 TP_PCIE_A_D2R_P
23D5 TP_PCIE_A_R2D_C_N
23D5
Z0904
HDA_BIT_CLK
HDA_SYNC
HDA_RST_L
HDA_SDIN0
HDA_SDOUT
STDOFF-4.2OD3.95H-5.52R3.37-7SQB
R0910
22C8
TP_HDA_SDIN3
15B6
OMIT
Z0921
15B6
15B6
15B6
15B6
R0921
R0911
NB_CFG<3>
NB_CFG<4>
NB_CFG<6>
NB_CFG<7>
NB_CFG<8>
1/16W
MF-LF
2402
1/16W
MF-LF
2402
TP_PCIE_FW_D2R_N
23D5 TP_PCIE_FW_D2R_P
23D5 TP_PCIE_FW_R2D_C_N
23D5 TP_PCIE_FW_R2D_C_P
23D5
28B4
28B4
28B4
28B4
28B4
75D3 28B6
75D3 28B6
34B8 28A4
USB2_EXTA_N
MAKE_BASE=TRUE
EXTAUSB_OC_L
MAKE_BASE=TRUE
MAKE_BASE=TRUE
USB2_AIRPORT_P
33B3 =USB2_AIRPORT_N
USB2_AIRPORT_N
MAKE_BASE=TRUE
MAKE_BASE=TRUE
=USB2_3G_P
=USB2_3G_N
43A4
43A4
23C2 73B3
USB_MINI_N
23C2 73B3
USB2_3G_P
USB_EXTD_P 23C2
USB2_3G_N MAKE_BASE=TRUE USB_EXTD_N 23C2
MAKE_BASE=TRUE
67B4 =USB2_CAMERA_P
USB2_CAMERA_P
67A4 =USB2_CAMERA_N
USB2_CAMERA_N
MAKE_BASE=TRUE
USB_CAMERA_P
23C2 73B3
USB_CAMERA_N
23C2 73B3
MAKE_BASE=TRUE
=USB2_IR_P
43C4 =USB2_IR_N
43C4
USB_IR_P
USB_IR_N
USB_IR_P
USB_IR_N
MAKE_BASE=TRUE
MAKE_BASE=TRUE
USB2_GEYSER_P
42C7 =USB2_GEYSER_N
USB2_GEYSER_N
USB_TPAD_P
USB_TPAD_N
MAKE_BASE=TRUE
MAKE_BASE=TRUE
23C2 73B3
23C2 73B3
MAKE_BASE=TRUE
43C3 =USB2_BT_P
SB ALIASES
MAKE_BASE=TRUE
USB_BT_N
VR_PWRGD_CLKEN
=SB_CLINK_MPWROK
SB_SATA_CLKREQ_L
EXTGPU_RST_L
24C3
24C5
24C5 24B5
MAKE_BASE=TRUE
USB_BT_P
USB_BT_N
USB_BT_P
43C3 =USB2_BT_N
VR_PWRGD_CK505
27A8
MAKE_BASE=TRUE
CLINK_MPWROK
8B1 27A6
MAKE_BASE=TRUE
SB_CLK100M_SATA_OE_L
28B4
MAKE_BASE=TRUE
TP_SB_GPIO17
41B5 =USB2_EXTB_P
USB2_EXTB_P
41B5 =USB2_EXTB_N
USB2_EXTB_N
MAKE_BASE=TRUE
EXTBUSB_OC_L
USB_EXTB_P 23C2
USB_EXTB_N 23C2
USB_EXTB_OC_L
MAKE_BASE=TRUE
41C8 =EXTBUSB_OC_L
MAKE_BASE=TRUE
73B3
73B3
23C8
MAKE_BASE=TRUE
SO-DIMM ALIASES
TP_USB_EXCARD_P
6C1
MEM_A_A<15>
MEM_B_A<15>
TP_MEM_CLKN2
15C6 TP_MEM_CLKP5
15C6 TP_MEM_CLKN5
15C6
TP_USB_EXCARD_N
6C1
MEM_A_A15_SPN
MEM_B_A15_SPN MAKE_BASE=TRUE
MEM_CLK_P_2_SPNMAKE_BASE=TRUE
MEM_CLK_N_2_SPNMAKE_BASE=TRUE
MEM_CLK_P_5_SPNMAKE_BASE=TRUE
MEM_CLK_N_5_SPNMAKE_BASE=TRUE
TP_MEM_CLKP2
MAKE_BASE=TRUE
USB_EXCARD_P
23C2 73B3
USB_EXCARD_N
23C2 73B3
MAKE_BASE=TRUE
TP_USB_EXTC_P
6C1
MAKE_BASE=TRUE
TP_USB_EXTC_N
6C1
USB_EXTC_P
23C2 73B3
USB_EXTC_N
23C2 73B3
MAKE_BASE=TRUE
MAKE_BASE=TRUE
44B8 15B7
44B8 15B7
PM_EXTTS_L<0>
MAKE_BASE=TRUE
PM_EXTTS_L<1>
MAKE_BASE=TRUE
DIMM_OVERTEMPA_L
30C4
DIMM_OVERTEMPB_L
31C4
NB ALIASES
56A8 56A4 55B3
53D3 53B7 53A7
54C8 54B8 54A8
56C4 56B8 56B5
=GND_AUDIO_CODEC
6D1
GND_AUDIO_CODEC
6D1
GND_AUDIO_AMP
NB_CLK96M_DOT_P
NB_CLK96M_DOT_N
NB_CLK100M_DPLLSS_P
NB_CLK100M_DPLLSS_N
15C3
XW0802
SM
2
MAKE_BASE=TRUE
60C6
CLINK_MPWROK
15A3
MAKE_BASE=TRUE
=GND_AUDIO_AMP
GFX_VR_EN
=GFX_VR_EN
=NB_CLINK_MPWROK
=NB_CLK96M_DOT_P
=NB_CLK96M_DOT_N
15C3
15C3 =NB_CLK100M_DPLLSS_P
15C3 =NB_CLK100M_DPLLSS_N
19D2 =NB_TDE_SENSE
15B3
XW0801
SM
MAKE_BASE=TRUE
8B3 27A6
MAKE_BASE=TRUE
29B3 75B3
MAKE_BASE=TRUE
29B3 75B3
MAKE_BASE=TRUE
29C3 75B3
MAKE_BASE=TRUE
29C3 75B3
MAKE_BASE=TRUE
=NB_TDE_FORCE
19C2 =NB_TDB_FORCE
19C2 =NB_TDB_SENSE
6C1 53C7
MAKE_BASE=TRUE
6C1 53C7
MAKE_BASE=TRUE
Ethernet ALIASES
6C1 53B7
MAKE_BASE=TRUE
6D1 53C7
TABLE_5_HEAD
PART#
QTY
DESCRIPTION
REFERENCE DESIGNATOR(S)
BOM OPTION
TABLE_5_ITEM
MAKE_BASE=TRUE
6D1 53C7
860-0876
THERMAL STANDOFF
Z0903,Z0904,Z0905,Z0921STANDOFF
860-0723
STANDOFF WIRELESS
Z0912
STANDOFF
860-0749
Z0913
STANDOFF
TABLE_5_ITEM
7C4
=PP3V3_S0_ENET
=ENET_VMAIN_AVLBL
34C2
MAKE_BASE=TRUE
MAKE_BASE=TRUE
34C7
=YUKON_EC_PP2V5_ENET
TABLE_5_ITEM
TP_NB_CFG<3>
TP_NB_CFG<4>
TP_NB_CFG<6>
TP_NB_CFG<7>
TP_NB_CFG<8>
SYNC_MASTER=GPU
MAKE_BASE=TRUE
MAKE_BASE=TRUE
=GND_CHASSIS_TMDS_DOWN
38B1
=GND_CHASSIS_FW_UPPER
VOLTAGE=0V
MAKE_BASE=TRUE
MAKE_BASE=TRUE
GND_CHASSIS_IO1
69A3
MAKE_BASE=TRUE
OMIT
Z0912
Z0913
STDOFF-4.2OD2.15H-1.2-3.2-TH
STDOFF-4.2OD3.95H-5.52R3.37-6B
NC 1
NC
SYNC_DATE=07/17/2006
SIZE
D
APPLE INC.
DRAWING NUMBER
051-7455
SCALE
SHT
NONE
USB_MINI_P
CLOCK ALIASES
28B4
USB2_EXTA_P
41C8 =EXTAUSB_OC_L
MAKE_BASE=TRUE
MAKE_BASE=TRUE
0
5%
0
5%
TP_PCIE_EXCARD_R2D_C_N
23D5 TP_PCIE_EXCARD_R2D_C_P
23D5
NB CFG ALIASES
Z0905
STDOFF-4.5OD3.95H-1.1-3.2-TH
STDOFF-4.5OD3.95H-1.1-3.2-TH
CPU_THERMAL_SCREW_RIGHT
MAKE_BASE=TRUE
PCIE_A_D2R_N_SPN
MAKE_BASE=TRUE
PCIE_A_D2R_P_SPN
MAKE_BASE=TRUE
PCIE_A_R2D_C_N_SPN
MAKE_BASE=TRUE
PCIE_A_R2D_C_P_SPN
PCIE_B_D2R_N_SPN MAKE_BASE=TRUE
PCIE_B_D2R_P_SPN MAKE_BASE=TRUE
MAKE_BASE=TRUE
PCIE_B_R2D_C_N_SPN
MAKE_BASE=TRUE
PCIE_B_R2D_C_P_SPN
PCIE_C_D2R_N_SPN MAKE_BASE=TRUE
MAKE_BASE=TRUE
PCIE_C_D2R_P_SPN
MAKE_BASE=TRUE
PCIE_C_R2D_C_N_SPN
MAKE_BASE=TRUE
PCIE_C_R2D_C_P_SPN
MAKE_BASE=TRUE
PCIE_D_D2R_N_SPN
PCIE_D_D2R_P_SPN MAKE_BASE=TRUE
MAKE_BASE=TRUE
PCIE_D_R2D_C_N_SPN
MAKE_BASE=TRUE
PCIE_D_R2D_C_P_SPN
MAKE_BASE=TRUE
CPU_THERMAL_SCREW_DOWN
1
ACZ_BITCLK
ACZ_SYNC
ACZ_RST_L
ACZ_SDATAIN<0>
ACZ_SDATAOUT
HDN_SDIN1_SPN
HDN_SPIN2_SPN
HDN_SPIN3_SPN
TP_HDA_SDIN1
22C8 TP_HDA_SDIN2
22C8
OMIT
TP_PCIE_A_R2D_C_P
TP_PCIE_B_D2R_N
23D5 TP_PCIE_B_D2R_P
23D5 TP_PCIE_B_R2D_C_N
23D5 TP_PCIE_B_R2D_C_P
23D5 TP_PCIE_EXCARD_D2R_N
23D5 TP_PCIE_EXCARD_D2R_P
23D5
23D5
MAKE_BASE=TRUE
CPU_THERMAL_SCREW_UP1
0
5%
73C3 22C8
OMIT
STDOFF-4.2OD3.95H-5.52R3.37-6B
SATA_C_D2R_N_SPN
MAKE_BASE=TRUE
SATA_C_D2R_P_SPN
MAKE_BASE=TRUE
SATA_C_R2D_C_N_SPN
MAKE_BASE=TRUE
SATA_C_R2D_C_P_SPN
19C2
2 16V
CERM
OMIT
FW_B_TPBIAS_SPN
6B7
FW_B_TPA_P_SPNMAKE_BASE=TRUE
6B7
FW_B_TPA_N_SPNMAKE_BASE=TRUE
6B7
MAKE_BASE=TRUE
FW_B_TPB_P_SPN
6B7
FW_B_TPB_N_SPNMAKE_BASE=TRUE
6B7
MAKE_BASE=TRUE
FW_C_TPBIAS_SPN
6B7
FW_C_TPA_P_SPNMAKE_BASE=TRUE
6B7
MAKE_BASE=TRUE
FW_C_TPA_N_SPN
6B7
FW_C_TPB_P_SPNMAKE_BASE=TRUE
6B7
FW_C_TPB_N_SPNMAKE_BASE=TRUE
6B7
37B3
PCI_EXP ALIASES
MAKE_BASE=TRUE
C0919
FW_B_TPBIAS
FW_B_TPA_P
FW_B_TPA_N
37B3 FW_B_TPB_P
37B3 FW_B_TPB_N
37B3 FW_C_TPBIAS
37B3 FW_C_TPA_P
37B3 FW_C_TPA_N
37B3 FW_C_TPB_P
37B3 FW_C_TPB_N
37B3
37B3
MAKE_BASE=TRUE
MAKE_BASE=TRUE
SATA_C_D2R_N
SATA_C_D2R_P
SATA_C_R2D_C_N
SATA_C_R2D_C_P
MAKE_BASE=TRUE
15C6
FIREWIRE ALIASES
22B6
MAKE_BASE=TRUE
14C5
=GND_CHASSIS_AUDIO_MIC
=GND_CHASSIS_DIPDIMM_LEFT
56A4
SATA ALIASES
CLIP-SM-M42
OF
REV.
76
01
OMIT
70C3 13D3
BI
70C3 13D3
BI
70C3 13D3
BI
70C3 13D3
BI
70C3 13D3
BI
70C3 13D3
BI
70C3 13D3
BI
70C3 13C3
BI
70C3 13C3
BI
70C3 13A3
BI
70C3 13A3
BI
70C3 13A3
BI
70C3 13A3
BI
70C3 13A3
BI
70C3 13C3
BI
70C3 13C3
BI
70C3 13C3
BI
70C3 13C3
BI
70C3 13C3
BI
70C3 13C3
BI
70C3 13C3
BI
70C3 13C3
BI
70C3 13C3
BI
70C3 13C3
BI
70C3 13C3
BI
70C3 13C3
BI
70C3 13C3
BI
70C3 13C3
BI
70C3 13C3
BI
70C3 13C3
BI
70C3 13C3
BI
70C3 13C3
BI
70C3 13C3
BI
70C3 13C3
BI
70C3 22C4
70C3 22C2
70B3 22C4
IN
IN
70C3 22C4
IN
70B3 22C4
K3
FSB_A_L<17>
FSB_A_L<18>
FSB_A_L<19>
FSB_A_L<20>
FSB_A_L<21>
FSB_A_L<22>
FSB_A_L<23>
FSB_A_L<24>
FSB_A_L<25>
FSB_A_L<26>
FSB_A_L<27>
FSB_A_L<28>
FSB_A_L<29>
FSB_A_L<30>
FSB_A_L<31>
FSB_A_L<32>
FSB_A_L<33>
FSB_A_L<34>
FSB_A_L<35>
FSB_ADSTB_L<1>
Y2
IN CPU_A20M_L
OUT CPU_FERR_L
70B3 22C4
70C3 22C4
FSB_REQ_L<0>
FSB_REQ_L<1>
FSB_REQ_L<2>
FSB_REQ_L<3>
FSB_REQ_L<4>
IN
IN
N2
J1
N3
P5
P2
L2
P4
P1
R1
M1
H2
K2
J3
L1
U5
R3
W6
U4
Y5
U1
R4
T5
T3
W2
W5
Y4
U2
V4
W3
AA4
AB2
AA3
V1
A6
A5
CPU_IGNNE_L
C4
CPU_STPCLK_L
CPU_INTR
CPU_NMI
CPU_SMI_L
TP_CPU_RSVD0
TP_CPU_RSVD1
TP_CPU_RSVD2
TP_CPU_RSVD3
TP_CPU_RSVD4
TP_CPU_RSVD5
TP_CPU_RSVD6
TP_CPU_RSVD7
TP_CPU_RSVD8
TP_CPU_RSVD9
M3
D5
C6
B4
A3
M4
N5
T2
V3
B2
C3
D2
D22
D3
F6
REQ0*
REQ1*
REQ2*
REQ3*
REQ4*
A17*
A18*
A19*
A20*
A21*
A22*
A23*
A24*
A25*
A26*
A27*
A28*
A29*
A30*
A31*
A32*
A33*
A34*
A35*
ADSTB1*
DEFER*
DRDY*
DBSY*
H5
E1
FSB_DEFER_L
FSB_DRDY_L
FSB_DBSY_L
BR0*
F1
FSB_BREQ0_L
F21
BI
13C3 70D3
BI
13C3 70D3
BI
13C3 70D3
BI
13B3 70D3
BI
13B3 70D3
BI
13B3 70D3
BI
13B3 70D3
=PP1V05_S0_CPU
IERR*
INIT*
CPU_INIT_L
IN
LOCK*
H4
FSB_LOCK_L
BI
RESET*
RS0*
RS1*
RS2*
TRDY*
C1
FSB_CPURST_L
FSB_RS_L<0>
FSB_RS_L<1>
FSB_RS_L<2>
FSB_TRDY_L
HIT*
HITM*
BPM0*
BPM1*
BPM2*
BPM3*
PRDY*
PREQ*
TCK
TDI
TDO
TMS
TRST*
DBR*
F3
F4
G3
G2
E4
XDP_BPM_L<0>
XDP_BPM_L<1>
XDP_BPM_L<2>
XDP_BPM_L<3>
XDP_BPM_L<4>
XDP_BPM_L<5>
XDP_TCK
XDP_TDI
XDP_TDO
XDP_TMS
XDP_TRST_L
XDP_DBRESET_L
AD4
AD3
AD1
AC4
AC2
AC1
AC5
AA6
AB3
AB5
AB6
C20
R1002
54.9
1%
1/16W
MF-LF
2 402
PLACE TESTPOINT ON
FSB_IERR_L WITH A GND
0.1" AWAY
13B3 70D3
IN
IN
13A3 70D3
IN
13A3 70D3
IN
13A3 70D3
IN
13B3 70D3
BI
13B3 70D3
BI
13B3 70D3
BI
12B2 70A3
BI
12B2 70A3
BI
12B2 70A3
BI
12B3 70A3
BI
12B2 70A3
=PP1V05_S0_CPU
54.9
1%
1/16W
MF-LF
402
THERMTRIP*
RSVD0
RSVD1
RSVD2
RSVD3
RSVD4
RSVD5
RSVD6
RSVD7
RSVD8
RSVD9
B25
CPU_PROCHOT_L
CPU_THERMD_P
CPU_THERMD_N
C7
PM_THRMTRIP_L
D21
A24
BI
BCLK0
BCLK1
A22
A21
XDP_TDI
54.9
XDP_TDO
BI
BI
OUT
BI
IN
70D3 13D5
BI
IN
70D3 13D5
BI
OUT
12B4 27C6
70D3 13C5
R1004
OUT
OUT
49C7
OUT
49B7
OUT
PM_THRMTRIP#
SHOULD CONNECT TO ICH AND
GMCH WITHOUT T (NO STUB)
BI
70D3 13C5
BI
70D3 13C5
BI
70D3 13B3
BI
70D3 13B3
BI
70D3 13B3
BI
70C3 13C5
BI
70C3 13C5
BI
70C3 13C5
BI
70C3 13C5
BI
70C3 13C5
BI
70C3 13C5
BI
BI
IN
29D3 75C3
70C3 13C5
IN
29D3 75C3
70C3 13C5
BI
70C3 13C5
BI
70C3 13C5
BI
70C3 13C5
BI
70C3 13C5
BI
70C3 13C5
BI
70C3 13C5
BI
=PP1V05_S0_CPU
NC
2.0K
1%
1/16W
MF-LF
402 2
70C3 13C5
BI
70C3 13C5
BI
70C3 13B3
BI
70C3 13B3
BI
70C3 13B3
BI
FSB_D_L<0>
FSB_D_L<1>
FSB_D_L<2>
FSB_D_L<3>
FSB_D_L<4>
FSB_D_L<5>
FSB_D_L<6>
FSB_D_L<7>
FSB_D_L<8>
FSB_D_L<9>
FSB_D_L<10>
FSB_D_L<11>
FSB_D_L<12>
FSB_D_L<13>
FSB_D_L<14>
FSB_D_L<15>
FSB_DSTB_L_N<0>
FSB_DSTB_L_P<0>
FSB_DINV_L<0>
E22
FSB_D_L<16>
FSB_D_L<17>
FSB_D_L<18>
FSB_D_L<19>
FSB_D_L<20>
FSB_D_L<21>
FSB_D_L<22>
FSB_D_L<23>
FSB_D_L<24>
FSB_D_L<25>
FSB_D_L<26>
FSB_D_L<27>
FSB_D_L<28>
FSB_D_L<29>
FSB_D_L<30>
FSB_D_L<31>
FSB_DSTB_L_N<1>
FSB_DSTB_L_P<1>
FSB_DINV_L<1>
N22
54.9
1%
1/16W
MF-LF
402
R1023
70A3 12B3 9C6
649
XDP_TRST_L
G22
F23
G25
E25
E23
K24
G24
J24
J23
H22
F26
K22
H23
J26
H26
H25
K25
P26
R23
L23
M24
L22
M23
P25
P23
P22
T24
R24
L25
T25
N25
L26
M26
N24
AD26
C23
D25
C24
AF26
AF1
A26
D16*
D17*
D18*
D19*
D20*
D21*
D22*
D23*
D24*
D25*
D26*
D27*
D28*
D29*
D30*
D31*
DSTBN1*
DATBP1*
DINV1*
GTLREF
TEST1
TEST2
TEST3
TEST4
TEST5
TEST6
U1000
MEROM
FCBGA
2 OF 4
10%
16V
X5R
402
70B3 29C6
OUT
70B3 29B6
OUT
70B3 29A6
OUT
CPU_BSEL<0>
CPU_BSEL<1>
CPU_BSEL<2>
B22
B23
C21
D32*
D33*
D34*
D35*
D36*
D37*
D38*
D39*
D40*
D41*
D42*
D43*
D44*
D45*
D46*
D47*
DSTBN2*
DSTBP2*
DINV2*
Y22
D48*
D49*
D50*
D51*
D52*
D53*
D54*
D55*
D56*
D57*
D58*
D59*
D60*
D61*
D62*
D63*
DSTBN3*
DSTBP3*
DINV3*
AE24
COMP0
COMP1
COMP2
COMP3
MISC
DPRSTP*
DPSLP*
DPWR*
PWRGOOD
SLP*
PSI*
BSEL0
BSEL1
BSEL2
FSB_D_L<32>
FSB_D_L<33>
FSB_D_L<34>
FSB_D_L<35>
FSB_D_L<36>
FSB_D_L<37>
FSB_D_L<38>
FSB_D_L<39>
FSB_D_L<40>
FSB_D_L<41>
FSB_D_L<42>
FSB_D_L<43>
FSB_D_L<44>
FSB_D_L<45>
FSB_D_L<46>
FSB_D_L<47>
FSB_DSTB_L_N<2>
FSB_DSTB_L_P<2>
FSB_DINV_L<2>
AB24
V24
V26
V23
T22
U25
U23
Y25
W22
Y23
W24
W25
AA23
AA24
AB25
Y26
AA26
U22
FSB_D_L<48>
FSB_D_L<49>
FSB_D_L<50>
FSB_D_L<51>
FSB_D_L<52>
FSB_D_L<53>
FSB_D_L<54>
FSB_D_L<55>
FSB_D_L<56>
FSB_D_L<57>
FSB_D_L<58>
FSB_D_L<59>
FSB_D_L<60>
FSB_D_L<61>
FSB_D_L<62>
FSB_D_L<63>
FSB_DSTB_L_N<3>
FSB_DSTB_L_P<3>
FSB_DINV_L<3>
AD24
AA21
AB22
AB21
AC26
AD20
AE22
AF23
AC25
AE21
AD21
AC22
AD23
AF22
AC23
AE25
AF24
AC20
R26
U26
AA1
Y1
E5
B5
D24
D6
D7
AE6
BI
13C5 70C3
BI
13C5 70C3
BI
13C5 70C3
BI
13C5 70C3
BI
13C5 70C3
BI
13C5 70C3
BI
13C5 70C3
BI
13B5 70C3
BI
13B5 70C3
BI
13B5 70C3
BI
13B5 70C3
BI
13B5 70C3
BI
13B5 70C3
BI
13B5 70C3
BI
13B5 70C3
BI
13B5 70C3
BI
13B3 70C3
BI
13A3 70C3
BI
13B3 70C3
BI
13B5 70C3
BI
13B5 70C3
BI
13B5 70C3
BI
13B5 70C3
BI
13B5 70C3
BI
13B5 70C3
BI
13B5 70C3
BI
13B5 70C3
BI
13B5 70C3
BI
13B5 70C3
BI
13B5 70C3
BI
13B5 70C3
BI
13B5 70C3
BI
13B5 70C3
BI
13B5 70C3
BI
13B5 70C3
BI
13B3 70C3
BI
13A3 70C3
BI
13B3 70C3
LAYOUT NOTE:
COMP0,2 CONNECT WITH ZO=27.4OHM,
MAKE TRACE LENGTH SHORTER THAN 0.5".
COMP1,3 CONNECT WITH ZO=55OHM,
MAKE TRACE LENGTH SHORTER THAN 0.5".
R1016
27.4
R1017
1%
1/16W
MF-LF
402
1%
1/16W
MF-LF
402
R1018
R1019
1%
1/16W
MF-LF
402
54.9
CPU_COMP<0>
70B3 CPU_COMP<1>
70B3 CPU_COMP<2>
70B3 CPU_COMP<3>
70B3
CPU_DPRSTP_L
CPU_DPSLP_L
FSB_DPWR_L
CPU_PWRGD
FSB_CPUSLP_L
CPU_PSI_L
54.9
IN
IN
22C4 70B3
IN
13B3 70D3
IN
IN
13A5 70B3
OUT
27.4
1%
1/16W
MF-LF
402
27B3
NOSTUFF
R1030
0
54.9
XDP_TCK
E26
R1022
70B3 12B3 12B2 9C6
F24
D0*
D1*
D2*
D3*
D4*
D5*
D6*
D7*
D8*
D9*
D10*
D11*
D12*
D13*
D14*
D15*
DSTBN0*
DSTBP0*
DINV0*
0.1uF
R1024
BI
70D3 13D5
70D3 13D5
2
1%
1/16W
MF-LF
402
BI
70D3 13D5
1%
1/16W
MF-LF
402
R1021
70D3 13D5
1%
1/16W
MF-LF
402
=PP1V05_S0_CPU
BI
1K
54.9
BI
70D3 13D5
IN
R1005
B1
BI
70D3 13D5
BI
NC
70D3 13D5
70D3 13D5
H CLK
FSB_CLK_CPU_P
FSB_CLK_CPU_N
BI
5%
1/16W
MF-LF
2 402
PROCHOT*
THERMDA
THERMDC
70D3 13D5
70D3 13D5
12B2 70A3
BI
IN
THERMAL
R1020
XDP_TMS
R1003 1
R1006
OMIT
FSB_HIT_L
FSB_HITM_L
G6
68
A20M*
FERR*
IGNNE*
STPCLK*
LINT0
LINT1
SMI*
G5
DATA GRP 2
BI
1 OF 4
FSB_ADS_L
FSB_BNR_L
FSB_BPRI_L
H1
E2
DATA GRP 3
BI
70C3 13D3
FCBGA
DATA GRP 0
70C3 13D3
K5
ADS*
BNR*
BPRI*
MEROM
DATA GRP 1
BI
L4
CONTROL
70C3 13D3
L5
U1000
XDP/ITP SIGNALS
BI
A3*
A4*
A5*
A6*
A7*
A8*
A9*
A10*
A11*
A12*
A13*
A14*
A15*
A16*
ADSTB0*
ADDR GROUP0
BI
70C3 13D3
J4
ADDR GROUP1
70C3 13D3
FSB_A_L<3>
FSB_A_L<4>
FSB_A_L<5>
FSB_A_L<6>
FSB_A_L<7>
FSB_A_L<8>
FSB_A_L<9>
FSB_A_L<10>
FSB_A_L<11>
FSB_A_L<12>
FSB_A_L<13>
FSB_A_L<14>
FSB_A_L<15>
FSB_A_L<16>
FSB_ADSTB_L<0>
ICH
BI
RESERVED
70C3 13D3
NOSTUFF
R1012 1
1%
1/16W
MF-LF
402
1K
5%
1/16W
MF-LF
402
1%
1/16W
MF-LF
402
5%
1/16W
MF-LF
402
NOSTUFF
1
R1007
1K
5%
1/16W
MF-LF
402
CPU FSB
SYNC_MASTER=T9_MLB_NOME
SYNC_DATE=11/12/2006
D
APPLE INC.
DRAWING NUMBER
051-7455
SCALE
SHT
NONE
OF
REV.
76
01
A4
A7
AB20
OMIT
AB7
A10
U1000
AC7
A12
MEROM
AC9
A13
FCBGA
AC12
A15
3 OF 4
AC13
A9
A17
AC15
A18
AC17
A20
AC18
B7
AD7
B9
AD9
B10
AD10
B12
AD12
B14
AD14
B15
AD15
B17
AD17
B18
AD18
B20
AE9
VCC
C9
AE10
C10
AE12
C12
C13
AE15
C15
AE17
C17
AE18
AF10
D12
AF12
D14
AF14
VCC
A16
A23
R25
41.0 A (HFM)
30.4 A (LFM)
25.5 A (SuperLFM)
21.0 A (HFM)
18.7 A (LFM)
TBD A (SuperLFM)
TBD
TBD
AF2
T1
B6
T4
TBD
TBD
A (Auto-Halt/Stop-Grant HFM)
A (Auto-Halt/Stop-Grant SuperLFM)
TBD
TBD
A (Auto-Halt/Stop-Grant HFM)
A (Auto-Halt/Stop-Grant LFM)
TBD
TBD
A (Sleep HFM)
A (Sleep SuperLFM)
TBD
TBD
A (Sleep HFM)
A (Sleep LFM)
TBD
TBD
TBD
TBD
TBD
A (Deeper Sleep)
TBD
A (Deeper Sleep)
TBD
TBD
AF18
E7
AF20
A (HFM)
A (LFM)
E10
V6
E13
J6
E15
K6
E17
J21
E20
K21
VCCP
F9
M21
N6
F12
R21
F14
R6
F15
T21
F17
T6
F18
V21
F20
W21
AA7
AA9
B26
VCCA
7C7 11B3
130 mA
C26
AA12
AA20
AB9
AC10
VID0
VID1
VID2
VID3
VID4
VID5
VID6
AD6
AF5
AE5
AF4
AE3
AF3
AE2
CPU_VID<0>
CPU_VID<1>
CPU_VID<2>
CPU_VID<3>
CPU_VID<4>
CPU_VID<5>
CPU_VID<6>
OUT
59C7 70A3
OUT
59C7 70A3
OUT
59C7 70A3
OUT
59C7 70A3
OUT
59C7 70A3
OUT
59C7 70A3
OUT
59C7 70A3
=PPVCORE_S0_CPU
1
R1100
100
AB10
AB12
AB14
1%
1/16W
MF-LF
402
VCCSENSE
AF7
CPU_VCCSENSE_P
OUT
AB15
AB17
AB18
T26
B13
U3
B16
U6
B19
U21
B21
U24
B24
V2
C5
V5
C8
V22
C11
V25
C14
W1
C16
W4
C19
W23
C2
W26
C22
Y3
C25
Y6
D1
Y21
D4
Y24
D8
AA2
D11
AA5
D13
AA8
D16
AA11
D19
AA14
D23
AA16
D26
AA19
E3
AA22
E6
AA25
E8
AB1
AB4
VSS
VSS
AB8
E16
AB11
E19
AB13
E21
AB16
E24
AB19
F5
AB23
F8
AB26
F11
AC3
F13
AC6
F16
AC8
F19
AC11
F2
AC14
F22
AC16
F25
AC19
G4
AC21
G1
AC24
N21
F10
AA18
T23
M6
E18
AA17
B8
B11
E14
7C7 9B5 9B6 9C5 9D5 11A3 12B3 12C5
G21
E12
AA15
R22
4 OF 4
E11
=PP1V05_S0_CPU
E9
AA13
R5
FCBGA
A19
AF17
D18
AA10
AF15
D17
Low Voltage:
AF9
D10
F7
Standard Voltage:
AE20
D9
D15
R2
MEROM
AE13
C18
P24
U1000
A14
P21
OMIT
A11
=PPVCORE_S0_CPU
P6
A8
VSSSENSE
AE7
CPU_VCCSENSE_N
OUT
1
R1101
100
1%
1/16W
MF-LF
2 402
PLACEMENT_NOTE=Place within 1 inch of CPU, no stub.
G23
AD2
G26
AD5
H3
AD8
H6
AD11
H21
AD13
H24
AD16
J2
AD19
J5
AD22
J22
AD25
J25
AE1
K1
AE4
K4
AE8
K23
AE11
K26
AE14
L3
AE16
L6
AE19
L21
AE23
L24
AE26
M2
A2
M5
AF6
M22
AF8
M25
AF11
N1
AF13
N4
AF16
N23
AF19
N26
AF21
P3
A25
AF25
SYNC_MASTER=T9_MLB_NOME
SYNC_DATE=11/12/2006
D
APPLE INC.
051-7455
SCALE
SHT
NONE
Current numbers from Merom for Santa Rosa EMTS, doc #22221.
DRAWING NUMBER
10
OF
REV.
76
01
=PPVCORE_S0_CPU
LAYOUT NOTE:
CRITICAL
C1200
10UF
10%
2 6.3V
X5R
805-2
LAYOUT NOTE:
CRITICAL
1
10UF
10%
2 6.3V
X5R
805-2
CRITICAL
1
C1210
10UF
10%
2 6.3V
X5R
805-2
C1201
CRITICAL
1
10UF
10%
2 6.3V
X5R
805-2
10%
2 6.3V
X5R
805-2
CRITICAL
1
C1203
10UF
10%
2 6.3V
X5R
805-2
C1211
CRITICAL
1
10UF
CRITICAL
1
C1202
C1212
C1213
10UF
10%
2 6.3V
X5R
805-2
10%
2 6.3V
X5R
805-2
C1204
10UF
10%
2 6.3V
X5R
805-2
CRITICAL
1
10UF
CRITICAL
1
CRITICAL
1
10UF
10%
2 6.3V
X5R
805-2
10%
2 6.3V
X5R
805-2
CRITICAL
1
C1215
10UF
10%
2 6.3V
X5R
805-2
C1206
10UF
10%
2 6.3V
X5R
805-2
C1214
CRITICAL
1
10UF
CRITICAL
1
C1205
CRITICAL
1
10UF
10%
2 6.3V
X5R
805-2
CRITICAL
1
C1216
10UF
10%
2 6.3V
X5R
805-2
C1207
CRITICAL
1
10UF
10%
2 6.3V
X5R
805-2
CRITICAL
1
C1217
10UF
10%
2 6.3V
X5R
805-2
C1208
CRITICAL
1
10UF
10%
2 6.3V
X5R
805-2
CRITICAL
1
C1218
10UF
10%
2 6.3V
X5R
805-2
C1209
CRITICAL
1
C1219
10UF
10%
2 6.3V
X5R
805-2
LAYOUT NOTE:
PLACE ON BOTTOMSIDE
3
CRITICAL
1
CRITICAL
C1250
330UF
10%
2 2.0V
TANT
D2T
CRITICAL
C1251
330UF
CRITICAL
C1252
330UF
10%
2 2.0V
TANT
D2T
10%
2 2.0V
TANT
D2T
C1253
330UF
LAYOUT NOTE:
10B7 7C7
PLACE ON BOTTOMSIDE
=PP1V5_S0_CPU
10%
2 2.0V
TANT
D2T
1x 10uF, 1x 0.01uF
C1280 1
10uF
C1281
0.01UF
20%
6.3V 2
X5R
603
10%
16V
2 CERM
402
LAYOUT NOTE:
PLACE C1281 NEAR PIN B26 OF U1000
=PP1V05_S0_CPU
1X 330UF, 6X 0.1UF
CRITICAL
1
C1235 1
10%
2.5V 2
TANT
D2T
C1236
0.1UF
330uF
20%
2 10V
CERM
402
C1237
0.1UF
20%
2 10V
CERM
402
C1238
0.1UF
20%
2 10V
CERM
402
C1239
0.1UF
20%
2 10V
CERM
402
C1240
0.1UF
C1241
0.1UF
20%
2 10V
CERM
402
20%
2 10V
CERM
402
LAYOUT NOTE:
PLACE C1235 CLOSE TO CPU
SYNC_MASTER=MSARWAR
SYNC_DATE=04/26/2006
D
APPLE INC.
DRAWING NUMBER
051-7455
SCALE
SHT
NONE
11
OF
REV.
76
01
C
ITP
CRITICAL
=PP1V05_S0_CPU
J1302
NOSTUFF
QT500306-L021-9F
M-ST-SM
R1301
54.9
1%
1/16W
MF-LF
2402
IN
ITP
XDP_TDO
R1300
22.6
IN
R1302
22.6
ITP
FSB_CPURST_L
OUT
OUT
OUT
1%
1/16W
MF-LF
402
29D3
IN
(FROM CK505 HOST 133/167MHZ)
29D3
IN
XDP_TDI
XDP_TRST_L
(TCK)
XDP_TCK
ITP_TDO
CPU_XDP_CLK_N
CPU_XDP_CLK_P
ITPRESET_L
1%
1/16W
MF-LF
402
70A3 9C6
27C6 9C6
OUT
IO
XDP_BPM_L<3>
XDP_DBRESET_L
12C5 11A3 10C7 9D5 9C5 9B6 9B5 7C7
=PP1V05_S0_CPU
1
ITP
C1300
0.1UF
10%
2 16V
X5R
402
32
31
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
34
33
XDP_TMS
LVDS_CTRL_DATA
LVDS_CTRL_CLK
(FBO)
XDP_TCK
OUT
14D5 67A7
14D5 67A7
70A3 9C6
70A3 9C6
70A3 9C6
70A3 9C6
OUT
XDP_BPM_L<5>
XDP_BPM_L<4>
XDP_BPM_L<2>
XDP_BPM_L<1>
XDP_BPM_L<0>
IO
IO
IO
IO
CPU_PWRGD
IO
516S0394
(DBA#) INDICATE THAT ITP IS USING TAP I/F, NC IN 965GM CHIPSET SYSTEM.
(DEBUG PORT ACTIVE)
(DBR#)
TO ICH8M SYS_RST*, AND WITH SYSTEM RESET LOGIC
(DEBUG PORT RESET)
D
APPLE INC.
DRAWING NUMBER
051-7455
SCALE
SHT
NONE
12
OF
REV.
76
01
OMIT
U1400
BI
70D3 9C4
BI
70D3 9C4
BI
70D3 9C4
BI
70D3 9C4
BI
70D3 9C4
BI
70D3 9C4
BI
70D3 9C4
BI
70D3 9C4
BI
70D3 9C4
BI
70D3 9C4
BI
70D3 9C4
BI
70D3 9C4
BI
70D3 9C4
BI
70D3 9C4
BI
70C3 9C4
BI
70C3 9C4
BI
70C3 9C4
B
29C6 29B6 7C7
=PP1V25R1V05_S0_FSB_NB
R1421
54.9
1%
1/16W
MF-LF
402
R1420
R1410
54.9
221
1%
1/16W
MF-LF
402
1%
1/16W
MF-LF
402
BI
70C3 9B4
BI
70C3 9B4
BI
70C3 9B4
BI
70C3 9B4
BI
70C3 9B4
BI
70C3 9B4
BI
70C3 9B4
BI
70D3 9C4
BI
70C3 9B4
BI
70C3 9B4
BI
70C3 9B4
BI
70C3 9B4
BI
70C3 9B4
BI
70C3 9B4
BI
70C3 9C2
BI
70C3 9C2
BI
70C3 9C2
BI
70C3 9C2
BI
70C3 9C2
BI
70C3 9C2
BI
70C3 9C2
BI
70C3 9C2
BI
70C3 9C2
BI
70C3 9C2
BI
70C3 9C2
BI
70C3 9C2
BI
70C3 9C2
BI
70C3 9C2
BI
70C3 9C2
BI
70C3 9C2
BI
70C3 9C2
BI
70C3 9C2
BI
70C3 9C2
BI
70C3 9B2
BI
70C3 9B2
BI
70C3 9B2
BI
70C3 9B2
BI
70C3 9B2
BI
70C3 9B2
BI
70C3 9B2
BI
70C3 9B2
BI
70C3 9B2
BI
70C3 9B2
BI
70C3 9B2
BI
70C3 9B2
BI
70C3 9B2
BI
FSB_D_L<0>
FSB_D_L<1>
FSB_D_L<2>
FSB_D_L<3>
FSB_D_L<4>
FSB_D_L<5>
FSB_D_L<6>
FSB_D_L<7>
FSB_D_L<8>
FSB_D_L<9>
FSB_D_L<10>
FSB_D_L<11>
FSB_D_L<12>
FSB_D_L<13>
FSB_D_L<14>
FSB_D_L<15>
FSB_D_L<16>
FSB_D_L<17>
FSB_D_L<18>
FSB_D_L<19>
FSB_D_L<20>
FSB_D_L<21>
FSB_D_L<22>
FSB_D_L<23>
FSB_D_L<24>
FSB_D_L<25>
FSB_D_L<26>
FSB_D_L<27>
FSB_D_L<28>
FSB_D_L<29>
FSB_D_L<30>
FSB_D_L<31>
FSB_D_L<32>
FSB_D_L<33>
FSB_D_L<34>
FSB_D_L<35>
FSB_D_L<36>
FSB_D_L<37>
FSB_D_L<38>
FSB_D_L<39>
FSB_D_L<40>
FSB_D_L<41>
FSB_D_L<42>
FSB_D_L<43>
FSB_D_L<44>
FSB_D_L<45>
FSB_D_L<46>
FSB_D_L<47>
FSB_D_L<48>
FSB_D_L<49>
FSB_D_L<50>
FSB_D_L<51>
FSB_D_L<52>
FSB_D_L<53>
FSB_D_L<54>
FSB_D_L<55>
FSB_D_L<56>
FSB_D_L<57>
FSB_D_L<58>
FSB_D_L<59>
FSB_D_L<60>
FSB_D_L<61>
FSB_D_L<62>
FSB_D_L<63>
G2
G7
M6
H7
H3
G4
F3
N8
H2
M10
N12
N9
H5
P13
K9
M2
W10
Y8
V4
M3
J1
N5
N3
W6
W9
N2
Y7
Y9
P4
W3
N1
AD12
AE3
AD9
AC9
AC7
AC14
AD11
AC11
AB2
AD7
AB1
Y3
AC6
AE2
AC5
AG3
AJ9
AH8
AJ14
AE9
AE11
AH12
AJ5
AH5
AJ6
AE7
AJ7
AJ2
AE5
AJ3
AH2
AH13
NB_FSB_SCOMP
NB_FSB_SCOMP_L
1
1K
1%
1/16W
MF-LF
402 2
OUT
70B3 9A2
OUT
B3
C2
W1
W2
FSB_CPURST_L
FSB_CPUSLP_L
B6
NB_FSB_VREF
B9
E5
A9
R1426
2.0K
1%
1/16W
MF-LF
402
C1425
0.1uF
2
2
10%
16V
X5R
402
R1415
24.9
1%
1/16W
MF-LF
402
R1411
100
1%
1/16W
MF-LF
402
H_D0*
H_D1*
H_D2*
H_D3*
H_D4*
H_D5*
H_D6*
H_D7*
H_D8*
H_D9*
H_D10*
H_D11*
H_D12*
H_D13*
H_D14*
H_D15*
H_D16*
H_D17*
H_D18*
H_D19*
H_D20*
H_D21*
H_D22*
H_D23*
H_D24*
H_D25*
H_D26*
H_D27*
H_D28*
H_D29*
H_D30*
H_D31*
H_D32*
H_D33*
H_D34*
H_D35*
H_D36*
H_D37*
H_D38*
H_D39*
H_D40*
H_D41*
H_D42*
H_D43*
H_D44*
H_D45*
H_D46*
H_D47*
H_D48*
H_D49*
H_D50*
H_D51*
H_D52*
H_D53*
H_D54*
H_D55*
H_D56*
H_D57*
H_D58*
H_D59*
H_D60*
H_D61*
H_D62*
H_D63*
H_SWING
H_RCOMP
H_SCOMP
H_SCOMP*
H_CPURST*
H_CPUSLP*
H_AVREF
H_DVREF
H_A3*
H_A4*
H_A5*
H_A6*
H_A7*
H_A8*
H_A9*
H_A10*
H_A11*
H_A12*
H_A13*
H_A14*
H_A15*
H_A16*
H_A17*
H_A18*
H_A19*
H_A20*
H_A21*
H_A22*
H_A23*
H_A24*
H_A25*
H_A26*
H_A27*
H_A28*
H_A29*
H_A30*
H_A31*
H_A32*
H_A33*
H_A34*
H_A35*
J13
H_ADS*
H_ADSTB0*
H_ADSTB1*
H_BNR*
H_BPRI*
H_BREQ*
H_DEFER*
H_DBSY*
HPLL_CLK
HPLL_CLK*
H_DPWR*
H_DRDY*
H_HIT*
H_HITM*
H_LOCK*
H_TRDY*
G12
FCBGA
(1 OF 10)
NB_FSB_SWING
NB_FSB_RCOMP
R1425
CRESTLINE
E2
HOST
70D3 9C4
B11
C11
M11
C15
F16
L13
G17
C14
K16
B13
L16
J17
B14
K19
P15
R17
B16
H20
L19
D17
M17
N16
J19
B18
E19
B17
B15
E17
C18
A19
B19
N19
H17
G20
C8
E8
F12
D6
C10
AM5
AM7
H8
K7
E4
C6
G10
B7
H_DINV0*
H_DINV1*
H_DINV2*
H_DINV3*
K5
H_DSTBN0*
H_DSTBN1*
H_DSTBN2*
H_DSTBN3*
M7
H_DSTBP0*
H_DSTBP1*
H_DSTBP2*
H_DSTBP3*
L7
L2
AD13
AE13
K3
AD2
AH11
K2
AC2
AJ10
H_REQ0*
H_REQ1*
H_REQ2*
H_REQ3*
H_REQ4*
M14
H_RS0*
H_RS1*
H_RS2*
E12
E13
A11
H13
B12
D7
D8
FSB_A_L<3>
FSB_A_L<4>
FSB_A_L<5>
FSB_A_L<6>
FSB_A_L<7>
FSB_A_L<8>
FSB_A_L<9>
FSB_A_L<10>
FSB_A_L<11>
FSB_A_L<12>
FSB_A_L<13>
FSB_A_L<14>
FSB_A_L<15>
FSB_A_L<16>
FSB_A_L<17>
FSB_A_L<18>
FSB_A_L<19>
FSB_A_L<20>
FSB_A_L<21>
FSB_A_L<22>
FSB_A_L<23>
FSB_A_L<24>
FSB_A_L<25>
FSB_A_L<26>
FSB_A_L<27>
FSB_A_L<28>
FSB_A_L<29>
FSB_A_L<30>
FSB_A_L<31>
FSB_A_L<32>
FSB_A_L<33>
FSB_A_L<34>
FSB_A_L<35>
FSB_ADS_L
FSB_ADSTB_L<0>
FSB_ADSTB_L<1>
FSB_BNR_L
FSB_BPRI_L
FSB_BREQ0_L
FSB_DEFER_L
FSB_DBSY_L
FSB_CLK_NB_P
FSB_CLK_NB_N
FSB_DPWR_L
FSB_DRDY_L
FSB_HIT_L
FSB_HITM_L
FSB_LOCK_L
FSB_TRDY_L
FSB_DINV_L<0>
FSB_DINV_L<1>
FSB_DINV_L<2>
FSB_DINV_L<3>
FSB_DSTB_L_N<0>
FSB_DSTB_L_N<1>
FSB_DSTB_L_N<2>
FSB_DSTB_L_N<3>
FSB_DSTB_L_P<0>
FSB_DSTB_L_P<1>
FSB_DSTB_L_P<2>
FSB_DSTB_L_P<3>
FSB_REQ_L<0>
FSB_REQ_L<1>
FSB_REQ_L<2>
FSB_REQ_L<3>
FSB_REQ_L<4>
FSB_RS_L<0>
FSB_RS_L<1>
FSB_RS_L<2>
BI
9D8 70C3
BI
9D8 70C3
BI
9D8 70C3
BI
9D8 70C3
BI
9D8 70C3
BI
9D8 70C3
BI
9D8 70C3
BI
9D8 70C3
BI
9D8 70C3
BI
9D8 70C3
BI
9D8 70C3
BI
9D8 70C3
BI
9D8 70C3
BI
9D8 70C3
BI
9C8 70C3
BI
9C8 70C3
BI
9C8 70C3
BI
9C8 70C3
BI
9C8 70C3
BI
9C8 70C3
BI
9C8 70C3
BI
9C8 70C3
BI
9C8 70C3
BI
9C8 70C3
BI
9C8 70C3
BI
9C8 70C3
BI
9C8 70C3
BI
9C8 70C3
BI
9C8 70C3
BI
9C8 70C3
BI
9C8 70C3
BI
9C8 70C3
BI
9C8 70C3
BI
9D6 70D3
BI
9D8 70C3
BI
9C8 70C3
BI
OUT
BI
OUT
9D6 70D3
9D6 70D3
9D6 70D3
9D6 70D3
IN
29D3 75C3
IN
29D3 75C3
BI
9B2 70D3
BI
9D6 70D3
BI
9D6 70D3
BI
BI
9C6 70D3
9C6 70D3
IN
9D6 70D3
OUT
9D6 70D3
BI
9C4 70D3
BI
9B4 70C3
BI
9C2 70C3
BI
9B2 70C3
BI
9C4 70D3
BI
9B4 70C3
BI
9C2 70C3
BI
9B2 70C3
BI
9C4 70D3
BI
9B4 70C3
BI
9C2 70C3
BI
9B2 70C3
BI
9D8 70C3
BI
9D8 70C3
BI
9D8 70C3
BI
9D8 70C3
BI
9C8 70C3
OUT
9D6 70D3
OUT
9D6 70D3
OUT
9D6 70D3
NB CPU Interface
C1410
0.1uF
2
2
10%
16V
X5R
402
SYNC_MASTER=T9_MLB
SYNC_DATE=10/30/2006
D
APPLE INC.
DRAWING NUMBER
051-7455
SCALE
SHT
NONE
13
OF
REV.
76
01
PP1V05_S0_NB_VCCPEG
1
U1400
OUT
67D8
OUT
67A7 12B1
BI
67A7 12B1
BI
67B6
BI
67B6
BI
67B8
71C3 67A8
OUT
BI
IN
IN
71D3 67B3
OUT
71D3 67B3
OUT
8D6
OUT
8D6
OUT
71D3 67B2
OUT
71D3 67B2
OUT
71D3 67B2
OUT
71D3 67B2
OUT
71D3 67B2
OUT
71D3 67B2
OUT
8D6
OUT
8D6
OUT
8D6
OUT
8D6
OUT
8D6
OUT
8D6
OUT
LVDS_BKLT_CTL
LVDS_BKLT_EN
LVDS_CTRL_CLK
LVDS_CTRL_DATA
LVDS_DDC_CLK
LVDS_DDC_DATA
LVDS_VDD_EN
LVDS_IBG
TP_LVDS_VBG
TP_LVDS_VREFH
TP_LVDS_VREFL
LVDS_A_CLK_N
LVDS_A_CLK_P
LVDS_B_CLK_N
LVDS_B_CLK_P
LVDS_A_DATA_N<0>
LVDS_A_DATA_N<1>
LVDS_A_DATA_N<2>
LVDS_A_DATA_P<0>
LVDS_A_DATA_P<1>
LVDS_A_DATA_P<2>
LVDS_B_DATA_N<0>
LVDS_B_DATA_N<1>
LVDS_B_DATA_N<2>
LVDS_B_DATA_P<0>
LVDS_B_DATA_P<1>
LVDS_B_DATA_P<2>
L_BKLT_CTRL
H39
E39
L_BKLT_EN
L_CTRL_CLK
FCBGA
PEG_COMPI
N43
(3 OF 10)
PEG_COMPO
M43
E40
L_CTRL_DATA
PEG_RX0*
PEG_RX1*
J51
C37
D35
L_DDC_CLK
L_DDC_DATA
PEG_RX2*
N47
K40
L_VDD_EN
PEG_RX3*
PEG_RX4*
T45
LVDS_IBG
U40
L41
L43
LVDS_VBG
LVDS_VREFH
PEG_RX5*
PEG_RX6*
PEG_RX7*
Y40
PEG_RX8*
PEG_RX9*
AB51
PEG_RX10*
AD44
PEG_RX11*
PEG_RX12*
AD40
PEG_RX13*
AH49
PEG_RX14*
PEG_RX15*
AG45
N41
N40
LVDS_VREFL
D46
LVDSA_CLK*
LVDSA_CLK
C45
D44
E42
LVDSB_CLK*
LVDSB_CLK
69D8
OUT
69D8
OUT
69D8
OUT
69B8
OUT
69A8
OUT
69A8
OUT
69C8
OUT
69C8
OUT
=TV_A_DAC
=TV_B_DAC
=TV_C_DAC
=TV_A_RTN
=TV_B_RTN
=TV_C_RTN
TV_DCONSEL<0>
TV_DCONSEL<1>
69D7
OUT
69B8
OUT
69D7
OUT
69A8
OUT
69D7
OUT
69A8
OUT
69B8
BI
69B8
BI
69D7
OUT
69D8
OUT
69D7
OUT
=CRT_BLUE
=CRT_BLUE_L
=CRT_GREEN
=CRT_GREEN_L
=CRT_RED
=CRT_RED_L
CRT_DDC_CLK
CRT_DDC_DATA
=CRT_HSYNC_R
=CRT_TVO_IREF
=CRT_VSYNC_R
Y44
W49
AG46
AG41
E51
LVDSA_DATA1*
PEG_RX0
J50
F49
LVDSA_DATA2*
PEG_RX1
PEG_RX2
L50
PEG_RX3
U44
PEG_RX4
PEG_RX5
T49
PEG_RX6
W45
PEG_RX7
PEG_RX8
W41
PEG_RX9
PEG_RX10
Y48
PEG_RX11
AC41
PEG_RX12
PEG_RX13
AH47
PEG_RX14
AH45
PEG_RX15
AG42
PEG_TX0*
PEG_TX1*
N45
PEG_TX2*
U47
PEG_TX3*
PEG_TX4*
N51
PEG_TX5*
PEG_TX6*
T42
PEG_TX7*
W46
PEG_TX8*
PEG_TX9*
W38
G50
E50
F48
LVDSA_DATA0
LVDSA_DATA1
LVDSA_DATA2
G44
LVDSB_DATA0*
B47
LVDSB_DATA1*
LVDSB_DATA2*
B45
E44
LVDSB_DATA0
A47
LVDSB_DATA1
LVDSB_DATA2
A45
G27
TVA_DAC
TVB_DAC
K27
TVC_DAC
E27
F27
J27
L27
TVA_RTN
TVB_RTN
TVC_RTN
M35
TV_DCONSEL0
P33
TV_DCONSEL1
M47
T41
AB50
AC45
AG49
U39
R50
Y43
AD39
PEG_TX10*
AC46
PEG_TX11*
PEG_TX12*
AC49
PEG_TX13*
AH39
PEG_TX14*
PEG_TX15*
AE49
AC42
AH44
PEG_TX0
M45
CRT_BLUE
CRT_BLUE*
PEG_TX1
PEG_TX2
T38
G32
K29
CRT_GREEN
PEG_TX3
N50
J29
F29
CRT_GREEN*
CRT_RED
PEG_TX4
PEG_TX5
R51
E29
CRT_RED*
PEG_TX6
W42
PEG_TX7
PEG_TX8
Y47
H32
VGA
T50
LVDSA_DATA0*
L51
G51
CRESTLINE
J40
LVDS
67C6
TV
PCI-EXPRESS GRAPHICS
T46
U43
Y39
PEG_TX9
PEG_TX10
AC38
G35
CRT_DDC_CLK
CRT_DDC_DATA
F33
CRT_HSYNC
PEG_TX11
AC50
C32
CRT_TVO_IREF
CRT_VSYNC
PEG_TX12
PEG_TX13
AD43
PEG_TX14
AE50
PEG_TX15
AH43
K33
E33
18B3 20D3
R1510
24.9
OMIT
LVDS Disable
AD47
AG39
1%
1/16W
MF-LF
402
PEG_COMP
IN
8D6
IN
68B6 71D3
IN
8C6
IN
8C6
IN
8C6
IN
8C6
IN
8C6
IN
8C6
IN
8C6
IN
8C6
IN
8C6
IN
8C6
IN
8C6
IN
8C6
IN
8C6
IN
8C6
IN
8C6
IN
68B6 71D3
IN
8C6
IN
8C6
IN
8C6
IN
8C6
IN
8C6
IN
8C6
IN
8C6
IN
8C6
IN
8C6
IN
8C6
IN
8C6
IN
8B6
IN
8B6
IN
8B6
OUT
68C6 71D3
OUT
68C6 71D3
OUT
68B6 71D3
OUT
68B6 71D3
OUT
8B6
OUT
8B6
OUT
8B6
OUT
8B6
OUT
8B6
OUT
8B6
OUT
8B6
OUT
8B6
OUT
8B6
OUT
8B6
OUT
8B6
OUT
8B6
OUT
68C6 71D3
OUT
68C6 71D3
OUT
68B6 71D3
OUT
68B6 71D3
OUT
8B6
OUT
8B6
OUT
8B6
OUT
8B6
OUT
8B6
OUT
8B6
OUT
8B6
OUT
8B6
OUT
8B6
OUT
8B6
OUT
8B6
OUT
8A6
SDVO_TVCLKIN#
SDVO_INT#
SDVO_FLDSTALL#
SDVO_TVCLKIN
SDVO_INT
SDVO_FLDSTALL
SDVOB_RED#
SDVOB_GREEN#
SDVOB_BLUE#
SDVOB_CLKN
SDVOC_RED#
SDVOC_GREEN#
SDVOC_BLUE#
SDVOC_CLKN
SDVOB_RED
SDVOB_GREEN
SDVOB_BLUE
SDVOB_CLKP
SDVOC_RED
SDVOC_GREEN
SDVOC_BLUE
SDVOC_CLKP
Follow instructions for LVDS and CRT & TV-Out Disable above.
Can also tie CRT_DDC_*, L_CTRL_*, L_DDC_*, SDVO_CTRL_* and
TV_DCONSELx to GND.
Tie DPLL_REF_CLK and DPLL_REF_SSCLK to GND.
Tie DPLL_REF_CLK* and DPLL_REF_SSCLK* to VCC (VCore).
Tie VCCA_DPLLA and VCCA_DPLLB to VCC (VCore).
Tie VCC_AXG and VCC_AXG_NCTF to GND.
Leave GFX_VID<3..0> and GFX_VR_EN as NC.
SYNC_MASTER=T9_MLB
SYNC_DATE=10/30/2006
D
APPLE INC.
DRAWING NUMBER
051-7455
SCALE
SHT
NONE
14
OF
REV.
76
01
NB_CFG<5>
RESERVED
U1400
NB_CFG<9>
15B6
NBCFG_PEG_REVERSE
NB_CFG<7>
RESERVED
R1659
3.9K
RESERVED
NB_CFG<8>
NB_CFG<9>
High = Normal
PCIe Graphics
Lane Reversal
Low
5%
1/16W
MF-LF
402
= Reversed
NB_CFG<16>
RESERVED
NB_CFG<10>
15B6
NBCFG_DYN_ODT_DISABLE
1
R1666
3.9K
NB_CFG<11>
RESERVED
2
NB_CFG<12>
See Below
NB_CFG<13>
See Below
NB_CFG<14>
RESERVED
5%
1/16W
MF-LF
402
=PP3V3_S0_NB_VCCHV
8B4
NBCFG_DMI_REVERSE
NB_CFG<15>
RESERVED
2
NB_CFG<16>
High = Enabled
FSB Dynamic
ODT
Low
8B4
R1669
8B4
3.9K
8B4
5%
1/16W
MF-LF
402
NB_CFG<19>
= Disabled
NB_CFG<17>
RESERVED
NB_CFG<18>
RESERVED
8D6
NB_CFG<19>
High = Reversed
NBCFG_SDVO_AND_PCIE
1
8D6
R1670
8D6
3.9K
Low
NB_CFG<20>
5%
1/16W
MF-LF
402
NB_CFG<20>
15B6
= Normal
Concurrent
SDVO/PCIe x1
=
=
=
=
70B3 29C8
IN
70B3 29B8
IN
70B3 29B8
OUT
8A6
BI
8A6
RESERVED
XOR Mode Enabled
All-Z Mode Enabled
Normal Operation
IN
8A6
15D7
NB_CFG<13:12>
00
01
10
11
OUT
15B6
=PP3V3_S0_NB_VCCHV
DMI Lane
Reversal
OUT
BI
OUT
8A6
OUT
8A6
OUT
15D7
=PP3V3_S0_NB_VCCHV
15D7
R1630 1
10K
5%
1/16W
MF-LF
402 2
44B8 8B2
IN
44B8 8B2
IN
R1631
15C7
10K
5%
1/16W
MF-LF
2 402
15C7
24D5
70B3 59C7 22C4 9B2
OUT
IN
TP_NB_RSVD<20>
TP_NB_RSVD<21>
TP_NB_RSVD<22>
TP_NB_RSVD<23>
TP_NB_RSVD<24>
TP_NB_RSVD<25>
TP_NB_RSVD<26>
TP_NB_RSVD<27>
TP_MEM_CLKP2
TP_MEM_CLKN2
TP_MEM_CLKP5
TP_MEM_CLKN5
MEM_A_A<14>
MEM_B_A<14>
TP_NB_RSVD<34>
TP_NB_RSVD<35>
TP_NB_RSVD<36>
TP_LVDS_A_DATAN3
TP_LVDS_A_DATAP3
TP_LVDS_B_DATAN3
TP_LVDS_B_DATAP3
TP_NB_RSVD<41>
TP_NB_RSVD<42>
TP_NB_RSVD<43>
TP_NB_RSVD<44>
TP_NB_RSVD<45>
RSVD1
FCBGA
SM_CK0
AV29
P37
(2 OF 10)
SM_CK1
SM_CK3
BB23
R35
RSVD2
RSVD3
N35
RSVD4
SM_CK4
AV23
AR12
AR13
RSVD5
RSVD6
SM_CK0*
AW30
RSVD7
AN13
RSVD8
RSVD9
SM_CK1*
SM_CK3*
BA23
AM12
SM_CK4*
AW23
SM_CKE0
BE29
SM_CKE1
SM_CKE3
AY32
SM_CKE4
BG37
SM_CS0*
SM_CS1*
BG20
SM_CS2*
BG16
SM_CS3*
BE13
SM_ODT0
SM_ODT1
BH18
SM_ODT2
BJ14
J12
AR37
RSVD10
AM36
RSVD11
RSVD12
AL36
AM37
D20
RSVD20
B51
RSVD21
BJ20
BK22
RSVD22
RSVD23
BF19
RSVD24
BH20
RSVD25
RSVD26
SM_CK2*
SM_RCOMP*
BK14
SM_RCOMP_VOH
BK31
BD24
SM_CK5
SM_CK5*
SA_MA14
BL31
BJ29
SM_RCOMP_VOL
BH39
SB_MA14
RSVD34
AW20
RSVD35
BK20
RSVD36
RSVD37
BE24
C48
D47
B44
IN
OUT
IN
B42
DPLL_REF_SSCLK
DPLL_REF_SSCLK*
H48
RSVD43
B34
C34
RSVD44
RSVD45
NB_BSEL<0>
NB_BSEL<1>
NB_BSEL<2>
NB_CFG<3>
NB_CFG<4>
NB_CFG<5>
NB_CFG<6>
NB_CFG<7>
NB_CFG<8>
NB_CFG<9>
TP_NB_CFG<10>
TP_NB_CFG<11>
TP_NB_CFG<12>
TP_NB_CFG<13>
TP_NB_CFG<14>
TP_NB_CFG<15>
NB_CFG<16>
TP_NB_CFG<17>
TP_NB_CFG<18>
NB_CFG<19>
NB_CFG<20>
P27
CFG0
DMI_RXN0
AN47
N27
CFG1
DMI_RXN1
AJ38
N24
CFG2
CFG3
DMI_RXN2
DMI_RXN3
AN42
DMI_RXP0
AM47
DMI_RXP1
DMI_RXP2
AJ39
DMI_RXP3
AN45
DMI_TXN0
AJ46
DMI_TXN1
DMI_TXN2
AJ41
DMI_TXN3
AM44
DMI_TXP0
DMI_TXP1
AJ47
DMI_TXP2
AM39
DMI_TXP3
AM43
PM_BMBUSY_L
CPU_DPRSTP_L
GFX_VID0
E35
GFX_VID1
A39
GFX_VID2
GFX_VID3
C38
GFX_VR_EN
E36
F23
N23
CFG6
J20
CFG7
CFG8
C20
CFG9
R24
L23
CFG10
CFG11
J23
CFG12
E23
CFG13
CFG14
G23
E20
K23
M20
CFG15
CFG16
IPU
IPU
IPU
IPU
IPU
IPU
IPU
IPU
IPU
IPU
IPU
IPU
IPU
IPU
IPU
IPD
IPD
IPD
M24
CFG17
L32
N33
CFG18
CFG19
L35
CFG20
G41
PM_BM_BUSY*
L39
PM_DPRSTP*
PM_EXT_TS0*
VR_PWRGOOD_DELAY
NB_RESET_L
PM_THRMTRIP_L
PM_DPRSLPVR
AW49
PM_EXT_TS1*
PWROK
AV20
RSTIN*
TP_NB_NC<1>
TP_NB_NC<2>
TP_NB_NC<3>
TP_NB_NC<4>
TP_NB_NC<5>
TP_NB_NC<6>
TP_NB_NC<7>
TP_NB_NC<8>
TP_NB_NC<9>
TP_NB_NC<10>
TP_NB_NC<11>
TP_NB_NC<12>
TP_NB_NC<13>
TP_NB_NC<14>
TP_NB_NC<15>
TP_NB_NC<16>
BJ51
NC1
BK51
NC2
BK50
BL50
NC3
NC4
BL49
NC5
N20
G36
BL3
BL2
BK1
BJ1
THERMTRIP*
DPRSLPVR
NC6
NC7
NC8
NC9
E1
NC10
A5
C51
NC11
NC12
B50
NC13
A50
A49
NC14
NC15
BK2
NC16
31A4 72B3
OUT
30D4 72D3
OUT
30A4 72D3
OUT
31D4 72B3
OUT
31A4 72B3
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
R1610 1
1%
1/16W
MF-LF
402
K44
PEG_CLK*
K45
C1623
10%
16V
CERM
402
0.1uF
=NB_CLK96M_DOT_P
=NB_CLK96M_DOT_N
=NB_CLK100M_DPLLSS_P
=NB_CLK100M_DPLLSS_N
NB_CLK100M_PCIE_P
NB_CLK100M_PCIE_N
DMI_S2N_N<0>
DMI_S2N_N<1>
DMI_S2N_N<2>
DMI_S2N_N<3>
AN46
DMI_S2N_P<0>
DMI_S2N_P<1>
DMI_S2N_P<2>
DMI_S2N_P<3>
AN41
DMI_N2S_N<0>
DMI_N2S_N<1>
DMI_N2S_N<2>
DMI_N2S_N<3>
AM40
DMI_N2S_P<0>
DMI_N2S_P<1>
DMI_N2S_P<2>
DMI_N2S_P<3>
AJ42
B39
R1600
1
CL_CLK
AM49
CL_DATA
AK50
CL_PWROK
CL_RST*
AT43
CL_VREF
AM50
AN49
GFX_VID<0>
GFX_VID<1>
GFX_VID<2>
GFX_VID<3>
=GFX_VR_EN
GFX_VID<4>
5%
1/16W
MF-LF
402
CLINK_NB_CLK
CLINK_NB_DATA
=NB_CLINK_MPWROK
CLINK_NB_RESET_L
74A3 NB_CLINK_VREF
IN
8B2
IN
8B2
IN
8B2
IN
8B2
IN
29C3 75B3
IN
29C3 75B3
IN
23D2 71D3
IN
23D2 71D3
IN
23D2 71D3
IN
23D2 71D3
IN
23D2 71D3
IN
23D2 71D3
IN
23D2 71D3
IN
23D2 71D3
OUT
23D2 71D3
OUT
23D2 71D3
OUT
23D2 71D3
OUT
23D2 71D3
OUT
23D2 71D3
OUT
23D2 71D3
OUT
23D2 71D3
OUT
23D2 71D3
OUT
21B6 60C6
OUT
21B6 60C6
OUT
21B6 60C6
OUT
21B6 60C6
OUT
8B2
OUT
60C6
20%
10V
CERM
402
IN
20A5
IN
20A4
0.1uF
C1625
20
1%
1/16W
MF-LF
402
2.2UF
0.01UF
10%
16V
CERM
402
20%
6.3V
CERM1
603
R1622
3.01K
1%
1/16W
MF-LF
402
C1624
R1624
1K
2.2UF
20%
6.3V
CERM1
603
1%
1/16W
MF-LF
402
BI
24C3 74A3
BI
24C3 74A3
IN
OUT
H35
SDVO_CTRL_DATA
CLKREQ*
K36
ICH_SYNC*
G40
TEST1
A37
TEST2
R32
G39
SDVO_CTRLCLK
SDVO_CTRLDATA
NB_CLKREQ_L
NB_SB_SYNC_L
24C3 74A3
BI
68A6
BI
68A6
OUT
28B4
OUT
24B5
R1640
1K
8B2
C1640
SDVO_CTRL_CLK
18C3 20A6
1
1
R1641
392
0.1uF
20%
10V
CERM
402
1%
1/16W
MF-LF
402
2
2
1%
1/16W
MF-LF
402
NB Misc Interfaces
SYNC_MASTER=T9_MLB
SYNC_DATE=10/30/2006
NB_TEST1
NB_TEST2
1
R1690
5%
1/16W
MF-LF
402
D
APPLE INC.
DRAWING NUMBER
051-7455
SCALE
SHT
NONE
R1611 1
20%
10V
CERM
402
PP1V25_S0M_NB_VCCAXD
5%
1/16W
MF-LF
402
C1622
C1616
20K
1%
1/16W
MF-LF
402
R1691 1
0.01UF
=PP0V9_S3M_MEM_NBVREFA
=PP0V9_S3M_MEM_NBVREFB
R1620
1K
MEM_RCOMP_VOH
MEM_RCOMP_VOL
H47
PEG_CLK
=PP1V8_S3M_MEM_NB
MEM_RCOMP
MEM_RCOMP_L
C42
B36
J36
27D1
DPLL_REF_CLK
DPLL_REF_CLK*
RSVD41
RSVD42
CFG4
CFG5
31D4 72B3
OUT
C1615
RSVD38
RSVD39
RSVD40
C23
30A4 72D3
OUT
AW4
B37
C21
30D4 72D3
OUT
AR49
A35
L36
IN
SM_VREF0
SM_VREF1
OUT
20
MEM_ODT<0>
MEM_ODT<1>
MEM_ODT<2>
MEM_ODT<3>
BJ15
BL15
BC23
MEM_CS_L<0>
MEM_CS_L<1>
MEM_CS_L<2>
MEM_CS_L<3>
BK16
BE16
BG23
MEM_CKE<0>
MEM_CKE<1>
MEM_CKE<3>
MEM_CKE<4>
BD39
SM_ODT3
RSVD27
SM_CK2
BJ18
MEM_CLK_N<0>
MEM_CLK_N<1>
MEM_CLK_N<3>
MEM_CLK_N<4>
AW25
SM_RCOMP
BF23
MEM_CLK_P<0>
MEM_CLK_P<1>
MEM_CLK_P<3>
MEM_CLK_P<4>
BA25
C44
PM_EXTTS_L<0>
PM_EXTTS_L<1>
59C7 27B5
RSVD13
RSVD14
H10
BK18
RSVD
RESERVED
CRESTLINE
P36
DDR MUXING
TP_NB_RSVD<1>
TP_NB_RSVD<2>
TP_NB_RSVD<3>
TP_NB_RSVD<4>
TP_NB_RSVD<5>
TP_NB_RSVD<6>
TP_NB_RSVD<7>
TP_NB_RSVD<8>
TP_NB_RSVD<9>
TP_NB_RSVD<10>
TP_NB_RSVD<11>
TP_NB_RSVD<12>
TP_NB_RSVD<13>
TP_NB_RSVD<14>
= DMIx2
CLK
5%
1/16W
MF-LF
402
CFG
DMI
NB_CFG<6>
OMIT
3.9K
PM
GRAPHICS VID
Low
R1655
ME
High = DMIx4
DMI x2 Select
15B6
NC
RESERVED
NB_CFG<5>
NBCFG_DMI_X2
1
NB_CFG<4>
MISC
NB_CFG<3>
15
OF
REV.
76
01
OMIT
BI
72D3 30D4
BI
72D3 30D4
BI
72D3 30D4
BI
72D3 30D6
BI
72D3 30D6
BI
72D3 30D6
BI
72D3 30D4
BI
72D3 30D4
BI
72D3 30D6
BI
72D3 30D4
BI
72D3 30D4
BI
72D3 30C4
BI
72D3 30C4
BI
72D3 30C6
BI
72D3 30C6
BI
72D3 30C4
BI
72D3 30C6
BI
72D3 30C4
BI
72D3 30C6
BI
72D3 30D6
BI
72D3 30C6
BI
72D3 30C4
BI
72D3 30C6
BI
72D3 30C4
BI
72D3 30D4
BI
72D3 30C4
BI
72D3 30C6
BI
72D3 30B4
BI
72D3 30B6
BI
72D3 30B4
72D3 30B4
BI
BI
72D3 30B6
BI
72D3 30B4
BI
72D3 30B6
BI
72D3 30B6
BI
72D3 30B4
BI
72D3 30B6
BI
72D3 30B6
BI
BI
72D3 30A6
BI
72D3 30B4
BI
72D3 30A4
BI
72D3 30A6
BI
72D3 30A4
BI
72D3 30A4
BI
72D3 30A6
BI
72D3 30A4
BI
72D3 30A6
BI
72D3 30A6
BI
72D3 30A4
BI
72D3 30A4
BI
72D3 30A6
BI
72D3 30A6
BI
72D3 30A6
BI
72D3 30A4
BI
72D3 30A6
BI
72D3 30A4
BI
72D3 30A4
BI
72D3 30A4
72D3 30A6
BI
BI
AR43
AW44
BA45
SA_DQ0
SA_DQ1
SA_DQ2
AR41
SA_DQ3
SA_DQ4
AR45
SA_DQ5
AY46
AW47
SA_DQ6
SA_DQ7
BB45
SA_DQ8
BF48
SA_DQ9
SA_DQ10
AT42
BG47
BJ45
SA_DQ11
BB47
SA_DQ12
SA_DQ13
BG50
BE45
SA_DQ14
SA_DQ15
AW43
SA_DQ16
BH49
BG42
SA_DQ17
SA_DQ18
BE40
SA_DQ19
BF44
SA_DQ20
SA_DQ21
BE44
BH45
BG40
SA_DQ22
BF40
SA_DQ23
SA_DQ24
AR40
AT39
SA_DQ25
SA_DQ26
AW36
SA_DQ27
AW40
AY41
SA_DQ28
SA_DQ29
AV38
SA_DQ30
AT38
AV13
SA_DQ31
SA_DQ32
AT13
SA_DQ33
AW11
SA_DQ34
SA_DQ35
AW41
AV11
AT11
SA_DQ36
SA_DQ37
BA13
SA_DQ38
AU15
BE10
SA_DQ39
SA_DQ40
BD10
SA_DQ41
BA11
AY9
SA_DQ42
SA_DQ43
BG10
SA_DQ44
BD8
AW9
BD7
FCBGA
(4 OF 10)
SA_BS0
BB19
SA_BS1
SA_BS2
BK19
BF29
SA_CAS*
BL17
MEM_A_CAS_L
SA_DM0
AT45
SA_DM1
BD44
MEM_A_DM<0>
MEM_A_DM<1>
MEM_A_DM<2>
MEM_A_DM<3>
MEM_A_DM<4>
MEM_A_DM<5>
MEM_A_DM<6>
MEM_A_DM<7>
SA_DM2
SA_DM3
BD42
SA_DM4
AW13
SA_DM5
SA_DM6
BG8
SA_DM7
AN6
AW38
AY5
SA_DQS0
AT46
SA_DQS1
SA_DQS2
BE48
SA_DQS3
BC37
BB43
SA_DQS4
SA_DQS5
BB16
SA_DQS6
BB2
SA_DQS7
SA_DQS0*
AP3
SA_DQS1*
SA_DQS2*
BH6
AT47
BD47
BC41
SA_DQS3*
BA37
SA_DQS4*
SA_DQS5*
BA16
SA_DQS6*
BC1
SA_DQS7*
BH7
AP2
SA_MA0
BJ19
SA_MA1
SA_MA2
BD20
BK27
SA_MA3
SA_MA4
BH28
SA_MA5
BK28
SA_MA6
SA_MA7
BJ27
SA_MA8
BL24
BJ25
BL28
SA_MA9
SA_MA10
BA28
SA_MA11
BE28
SA_MA12
SA_MA13
SA_DQ45
SA_DQ46
MEM_A_BS<0>
MEM_A_BS<1>
MEM_A_BS<2>
BC19
BG30
BJ16
SA_RAS*
BE18
SA_RCVEN*
AY20
OUT
72B3 31D4
BI
OUT
72B3 31D6
BI
OUT
72B3 31D4
BI
72B3 31D6
BI
72B3 31D6
BI
72B3 31D4
BI
OUT
OUT
30D4 72C3
OUT
30D4 72C3
OUT
30C6 72C3
OUT
30C4 72C3
OUT
30B4 72C3
OUT
30B6 72C3
OUT
30A6 72C3
OUT
MEM_A_DQS_P<0>
MEM_A_DQS_P<1>
MEM_A_DQS_P<2>
MEM_A_DQS_P<3>
MEM_A_DQS_P<4>
MEM_A_DQS_P<5>
MEM_A_DQS_P<6>
MEM_A_DQS_P<7>
MEM_A_DQS_N<0>
MEM_A_DQS_N<1>
MEM_A_DQS_N<2>
MEM_A_DQS_N<3>
MEM_A_DQS_N<4>
MEM_A_DQS_N<5>
MEM_A_DQS_N<6>
MEM_A_DQS_N<7>
MEM_A_A<0>
MEM_A_A<1>
MEM_A_A<2>
MEM_A_A<3>
MEM_A_A<4>
MEM_A_A<5>
MEM_A_A<6>
MEM_A_A<7>
MEM_A_A<8>
MEM_A_A<9>
MEM_A_A<10>
MEM_A_A<11>
MEM_A_A<12>
MEM_A_A<13>
MEM_A_RAS_L
TP_MEM_A_RCVEN_L
72B3 31D4
BI
72B3 31D6
BI
72B3 31D6
BI
72B3 31D4
BI
72B3 31D6
BI
72B3 31D4
BI
72B3 31D6
BI
72B3 31D6
BI
72B3 31D4
BI
30A4 72C3
BI
30D6 72C3
BI
30D6 72C3
BI
30C4 72C3
BI
30C6 72C3
BI
30B6 72C3
BI
30B4 72C3
BI
30A4 72C3
BI
30A6 72C3
BI
30D6 72C3
BI
30D6 72C3
BI
30C4 72C3
BI
30C6 72C3
BI
30B6 72C3
BI
30B4 72C3
BI
30A4 72C3
BI
30A6 72C3
72B3 31D4
BI
72B3 31C4
BI
72B3 31C6
BI
72B3 31C6
BI
72B3 31C4
BI
72B3 31C6
BI
72B3 31C4
BI
72B3 31C6
BI
72B3 31C4
BI
72B3 31C4
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
72B3 31C4
BI
72B3 31C4
BI
72B3 31C6
BI
72B3 31C4
BI
72B3 31C6
BI
72B3 31C6
BI
72B3 31C6
BI
72B3 31B6
BI
72B3 31B4
BI
72B3 31B4
BI
72B3 31B6
OUT
OUT
BI
72B3 31B4
BI
72B3 31B4
BI
72B3 31B6
OUT
BI
BI
72B3 31B6
BI
72B3 31A6
BI
72B3 31A4
BI
72B3 31B4
BI
72B3 31B4
BI
72B3 31A6
BI
72B3 31B6
BI
72B3 31A4
BI
72B3 31B6
BI
72B3 31A6
BI
72B3 31A4
BI
72B3 31A6
BI
72B3 31A4
BI
BB5
SA_DQ47
SA_DQ48
AY7
SA_DQ49
AT5
AT7
SA_DQ50
SA_DQ51
AY6
SA_DQ52
72B3 31A6
BI
BB7
72B3 31A4
BI
AR5
SA_DQ53
SA_DQ54
72B3 31A4
BI
AR8
SA_DQ55
72B3 31A6
BI
AR9
SA_DQ56
SA_DQ57
72B3 31A6
BI
72B3 31A6
BI
SA_DQ58
SA_DQ59
72B3 31A4
BI
AN10
72B3 31A4
BI
AT9
SA_DQ60
72B3 31A4
BI
AN9
SA_DQ61
SA_DQ62
72B3 31A6
BI
AM9
AN11
SA_DQ63
72B3 31A6
BB9
AN3
AM8
U1400
CRESTLINE
SA_WE*
BA19
MEM_A_WE_L
OUT
72B3 31A4
BI
BI
MEM_B_DQ<0>
MEM_B_DQ<1>
MEM_B_DQ<2>
MEM_B_DQ<3>
MEM_B_DQ<4>
MEM_B_DQ<5>
MEM_B_DQ<6>
MEM_B_DQ<7>
MEM_B_DQ<8>
MEM_B_DQ<9>
MEM_B_DQ<10>
MEM_B_DQ<11>
MEM_B_DQ<12>
MEM_B_DQ<13>
MEM_B_DQ<14>
MEM_B_DQ<15>
MEM_B_DQ<16>
MEM_B_DQ<17>
MEM_B_DQ<18>
MEM_B_DQ<19>
MEM_B_DQ<20>
MEM_B_DQ<21>
MEM_B_DQ<22>
MEM_B_DQ<23>
MEM_B_DQ<24>
MEM_B_DQ<25>
MEM_B_DQ<26>
MEM_B_DQ<27>
MEM_B_DQ<28>
MEM_B_DQ<29>
MEM_B_DQ<30>
MEM_B_DQ<31>
MEM_B_DQ<32>
MEM_B_DQ<33>
MEM_B_DQ<34>
MEM_B_DQ<35>
MEM_B_DQ<36>
MEM_B_DQ<37>
MEM_B_DQ<38>
MEM_B_DQ<39>
MEM_B_DQ<40>
MEM_B_DQ<41>
MEM_B_DQ<42>
MEM_B_DQ<43>
MEM_B_DQ<44>
MEM_B_DQ<45>
MEM_B_DQ<46>
MEM_B_DQ<47>
MEM_B_DQ<48>
MEM_B_DQ<49>
MEM_B_DQ<50>
MEM_B_DQ<51>
MEM_B_DQ<52>
MEM_B_DQ<53>
MEM_B_DQ<54>
MEM_B_DQ<55>
MEM_B_DQ<56>
MEM_B_DQ<57>
MEM_B_DQ<58>
MEM_B_DQ<59>
MEM_B_DQ<60>
MEM_B_DQ<61>
MEM_B_DQ<62>
MEM_B_DQ<63>
AP49
SB_DQ0
CRESTLINE
AR51
SB_DQ1
SB_DQ2
(5 OF 10)
AW50
AN51
SB_DQ3
SB_DQ4
AN50
SB_DQ5
AV50
AV49
SB_DQ6
SB_DQ7
BA50
SB_DQ8
BB50
SB_DQ9
SB_DQ10
AW51
BA49
BE50
SB_DQ11
BA51
SB_DQ12
SB_DQ13
AY49
BF49
SB_DQ14
SB_DQ15
BJ50
SB_DQ16
BJ44
BJ43
SB_DQ17
SB_DQ18
BL43
SB_DQ19
BK47
SB_DQ20
SB_DQ21
BF50
BK49
BK43
SB_DQ22
BK42
SB_DQ23
SB_DQ24
BJ41
BJ37
SB_DQ25
SB_DQ26
BJ36
SB_DQ27
BL41
BJ40
SB_DQ28
SB_DQ29
BL35
SB_DQ30
BK37
BK13
SB_DQ31
SB_DQ32
BE11
SB_DQ33
BK11
SB_DQ34
SB_DQ35
BK41
BC11
BE12
SB_DQ36
SB_DQ37
BC12
SB_DQ38
BC13
BJ10
SB_DQ39
SB_DQ40
BL9
SB_DQ41
BG12
BL5
SB_DQ42
SB_DQ43
BK9
SB_DQ44
BK5
BK10
BJ8
SB_DQ45
SB_DQ46
BF4
SB_DQ47
SB_DQ48
BH5
SB_DQ49
BG1
BC2
SB_DQ50
SB_DQ51
BK3
SB_DQ52
BE4
BD3
SB_DQ53
SB_DQ54
BJ2
SB_DQ55
BA3
SB_DQ56
SB_DQ57
BJ6
BB3
AT3
SB_DQ58
SB_DQ59
AY2
SB_DQ60
AY3
AU2
SB_DQ61
SB_DQ62
AT2
SB_DQ63
AR1
FCBGA
BI
72D3 30D6
72D3 30D6
BI
72D3 30D6
MEM_A_DQ<0>
MEM_A_DQ<1>
MEM_A_DQ<2>
MEM_A_DQ<3>
MEM_A_DQ<4>
MEM_A_DQ<5>
MEM_A_DQ<6>
MEM_A_DQ<7>
MEM_A_DQ<8>
MEM_A_DQ<9>
MEM_A_DQ<10>
MEM_A_DQ<11>
MEM_A_DQ<12>
MEM_A_DQ<13>
MEM_A_DQ<14>
MEM_A_DQ<15>
MEM_A_DQ<16>
MEM_A_DQ<17>
MEM_A_DQ<18>
MEM_A_DQ<19>
MEM_A_DQ<20>
MEM_A_DQ<21>
MEM_A_DQ<22>
MEM_A_DQ<23>
MEM_A_DQ<24>
MEM_A_DQ<25>
MEM_A_DQ<26>
MEM_A_DQ<27>
MEM_A_DQ<28>
MEM_A_DQ<29>
MEM_A_DQ<30>
MEM_A_DQ<31>
MEM_A_DQ<32>
MEM_A_DQ<33>
MEM_A_DQ<34>
MEM_A_DQ<35>
MEM_A_DQ<36>
MEM_A_DQ<37>
MEM_A_DQ<38>
MEM_A_DQ<39>
MEM_A_DQ<40>
MEM_A_DQ<41>
MEM_A_DQ<42>
MEM_A_DQ<43>
MEM_A_DQ<44>
MEM_A_DQ<45>
MEM_A_DQ<46>
MEM_A_DQ<47>
MEM_A_DQ<48>
MEM_A_DQ<49>
MEM_A_DQ<50>
MEM_A_DQ<51>
MEM_A_DQ<52>
MEM_A_DQ<53>
MEM_A_DQ<54>
MEM_A_DQ<55>
MEM_A_DQ<56>
MEM_A_DQ<57>
MEM_A_DQ<58>
MEM_A_DQ<59>
MEM_A_DQ<60>
MEM_A_DQ<61>
MEM_A_DQ<62>
MEM_A_DQ<63>
72D3 30D6
BI
OMIT
U1400
72D3 30D4
SB_BS0
AY17
SB_BS1
SB_BS2
BG18
BG36
MEM_B_BS<0>
MEM_B_BS<1>
MEM_B_BS<2>
SB_CAS*
BE17
MEM_B_CAS_L
SB_DM0
AR50
SB_DM1
BD49
SB_DM2
SB_DM3
BK45
SB_DM4
BH12
SB_DM5
SB_DM6
BJ7
SB_DM7
AW2
MEM_B_DM<0>
MEM_B_DM<1>
MEM_B_DM<2>
MEM_B_DM<3>
MEM_B_DM<4>
MEM_B_DM<5>
MEM_B_DM<6>
MEM_B_DM<7>
BL39
BF3
SB_DQS0
AT50
SB_DQS1
SB_DQS2
BD50
SB_DQS3
BK39
SB_DQS4
SB_DQS5
BL7
SB_DQS6
BE2
SB_DQS7
SB_DQS0*
AV2
SB_DQS1*
SB_DQS2*
BC50
BK46
BJ12
AU50
BL45
SB_DQS3*
BK38
SB_DQS4*
SB_DQS5*
BK7
SB_DQS6*
BF2
SB_DQS7*
AV3
BK12
SB_MA0
BC18
SB_MA1
SB_MA2
BG28
SB_MA3
SB_MA4
AW17
SB_MA5
BE25
SB_MA6
SB_MA7
BA29
SB_MA8
AY28
SB_MA9
SB_MA10
BD37
SB_MA11
BE37
SB_MA12
SB_MA13
BA39
BG25
BF25
BC28
BG17
BG13
OUT
MEM_B_DQS_P<0>
MEM_B_DQS_P<1>
MEM_B_DQS_P<2>
MEM_B_DQS_P<3>
MEM_B_DQS_P<4>
MEM_B_DQS_P<5>
MEM_B_DQS_P<6>
MEM_B_DQS_P<7>
MEM_B_DQS_N<0>
MEM_B_DQS_N<1>
MEM_B_DQS_N<2>
MEM_B_DQS_N<3>
MEM_B_DQS_N<4>
MEM_B_DQS_N<5>
MEM_B_DQS_N<6>
MEM_B_DQS_N<7>
OUT
OUT
OUT
31D4 72B3
OUT
31D4 72B3
OUT
31C4 72B3
OUT
31C6 72B3
OUT
31B4 72B3
OUT
31A6 72B3
OUT
31A4 72A3
OUT
31A6 72A3
BI
31D6 72A3
BI
31D6 72A3
BI
31C6 72A3
BI
31C4 72A3
BI
31B6 72A3
BI
31A4 72A3
BI
31A6 72A3
BI
31A4 72A3
BI
31D6 72A3
BI
31D6 72A3
BI
31C6 72A3
BI
31C4 72A3
BI
31B6 72A3
BI
31B4 72A3
BI
31A6 72A3
BI
MEM_B_A<0>
MEM_B_A<1>
MEM_B_A<2>
MEM_B_A<3>
MEM_B_A<4>
MEM_B_A<5>
MEM_B_A<6>
MEM_B_A<7>
MEM_B_A<8>
MEM_B_A<9>
MEM_B_A<10>
MEM_B_A<11>
MEM_B_A<12>
MEM_B_A<13>
OUT
OUT
OUT
31A4 72A3
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
SB_RAS*
AV16
AY18
MEM_B_RAS_L
TP_MEM_B_RCVEN_L
OUT
SB_RCVEN*
SB_WE*
BC17
MEM_B_WE_L
OUT
NB DDR2 Interfaces
SYNC_MASTER=T9_MLB
SYNC_DATE=10/30/2006
D
APPLE INC.
DRAWING NUMBER
051-7455
SCALE
SHT
NONE
16
OF
REV.
76
01
VCC4
VCC6
AJ31
VCC7
AJ28
VCC8
VCC9
AH31
VCC10
AH29
VCC11
AF32
VCC12
R30
=PP1V8_S3M_MEM_NB
(2 ch, 667MHz)
(2 ch, 533MHz)
(1 ch, 667MHz)
(1 ch, 533MHz)
(standby)
AU33
AU35
AV33
AW33
VCC_SM4
VCC_SM5
VCC_SM6
AY35
VCC_SM7
VCC_SM8
BA33
VCC_SM9
BA35
VCC_SM10
VCC_SM11
BB33
BC32
BC33
BC35
BD32
BD35
BE32
BE33
BE35
VCC_SM12
VCC_SM13
VCC_SM14
VCC_SM15
VCC_SM16
VCC_SM17
VCC_SM18
VCC_SM19
BF33
VCC_SM20
BF34
VCC_SM21
VCC_SM22
BG32
BG33
BG35
BH32
BH34
VCC_SM23
VCC_SM24
VCC_SM25
BH35
VCC_SM26
VCC_SM27
BJ32
VCC_SM28
BJ33
VCC_SM29
VCC_SM30
BJ34
BK32
VCC_SM31
BK33
VCC_SM32
VCC_SM33
BK34
BK35
VCC_SM34
BL33
VCC_SM35
VCC_SM36
AU30
=PPVCORE_S0_NB_GFX
R20
VCC_AXG1
T14
VCC_AXG2
W13
W14
Y12
AA20
AA23
AA26
VCC_AXG5
VCC_AXG6
VCC_AXG7
AA28
VCC_AXG8
VCC_AXG9
AB21
VCC_AXG10
AB24
AB29
VCC_AXG11
VCC_AXG12
AC20
VCC_AXG13
AC21
AC23
VCC_AXG14
VCC_AXG15
AC24
VCC_AXG16
AC26
VCC_AXG17
VCC_AXG18
AC28
AC29
VCC_AXG3
VCC_AXG4
AD20
VCC_AXG19
VCC_AXG20
AD23
VCC_AXG21
AD24
AD28
VCC_AXG22
VCC_AXG23
AF21
VCC_AXG24
AF26
AA31
VCC_AXG25
VCC_AXG26
AH20
VCC_AXG27
AH21
VCC_AXG28
VCC_AXG29
AH23
AH24
AH26
VCC_AXG30
VCC_AXG31
AD31
VCC_AXG32
AJ20
VCC_AXG33
VCC_AXG34
AN14
VCC GFX
VCC_SM2
VCC_SM3
AW35
BA32
VCC_SM1
AU32
mA
mA
mA
mA
mA
VCC SM
3300
2700
1700
1395
5
VCC13
VCC_AXG_NCTF3
T19
VCC_AXG_NCTF4
VCC_AXG_NCTF5
T21
VCC_AXG_NCTF6
VCC_AXG_NCTF7
T23
VCC_AXG_NCTF8
U15
VCC_AXG_NCTF9
VCC_AXG_NCTF10
U16
VCC_AXG_NCTF11
U19
VCC_AXG_NCTF12
VCC_AXG_NCTF13
U20
VCC_AXG_NCTF14
U23
VCC_AXG_NCTF15
VCC_AXG_NCTF16
U26
VCC_AXG_NCTF17
VCC_AXG_NCTF18
V17
VCC_AXG_NCTF19
V20
VCC_AXG_NCTF20
VCC_AXG_NCTF21
V21
VCC_AXG_NCTF22
V24
VCC_AXG_NCTF23
VCC_AXG_NCTF24
Y15
VCC_AXG_NCTF25
Y17
VCC_AXG_NCTF26
VCC_AXG_NCTF27
Y19
VCC_AXG_NCTF28
VCC_AXG_NCTF29
Y21
VCC_AXG_NCTF20
Y24
VCC_AXG_NCTF31
VCC_AXG_NCTF32
Y26
VCC_AXG_NCTF33
Y29
VCC_AXG_NCTF34
VCC_AXG_NCTF35
AA16
VCC_AXG_NCTF36
AB16
VCC_AXG_NCTF37
VCC_AXG_NCTF38
AB19
VCC_AXG_NCTF39
VCC_AXG_NCTF40
AC17
VCC_AXG_NCTF41
AD15
VCC_AXG_NCTF42
VCC_AXG_NCTF43
AD16
VCC_AXG_NCTF44
AF16
VCC_AXG_NCTF45
VCC_AXG_NCTF46
AF19
VCC_AXG_NCTF47
AH16
VCC_AXG_NCTF48
VCC_AXG_NCTF49
AH17
VCC_AXG_NCTF50
VCC_AXG_NCTF51
AJ16
VCC_AXG_NCTF52
AJ19
VCC_AXG_NCTF53
VCC_AXG_NCTF54
AK16
VCC_AXG_NCTF55
AL16
VCC_AXG_NCTF56
VCC_AXG_NCTF57
AL17
VCC_AXG_NCTF58
AL20
VCC_AXG_NCTF59
VCC_AXG_NCTF60
AL21
VCC_AXG_NCTF61
VCC_AXG_NCTF62
AM15
VCC_AXG_NCTF63
AM19
VCC_AXG_NCTF64
VCC_AXG_NCTF65
AM20
VCC_AXG_NCTF66
AM23
VCC_AXG_NCTF67
VCC_AXG_NCTF68
AP15
VCC_AXG_NCTF69
AP17
VCC_AXG_NCTF70
VCC_AXG_NCTF71
AP19
VCC_AXG_NCTF72
VCC_AXG_NCTF73
AP21
VCC_AXG_NCTF74
AP24
VCC_AXG_NCTF75
VCC_AXG_NCTF76
AR20
VCC_AXG_NCTF77
AR23
VCC_AXG_NCTF78
VCC_AXG_NCTF79
AR24
VCC_AXG_NCTF80
V26
VCC_AXG_NCTF81
VCC_AXG_NCTF82
V28
VCC_AXG_NCTF83
Y31
T18
OMIT
T22
T25
U1400
=PPVCORE_S0_NB
CRESTLINE
AB33
AB36
U17
AB37
VCC_NCTF3
AC33
VCC_NCTF4
VCC_NCTF5
AC35
U21
AC36
VCC_NCTF6
AD35
VCC_NCTF7
VCC_NCTF8
AD36
AF33
V16
AF36
V19
VCC_NCTF11
AH35
VCC_NCTF12
VCC_NCTF13
AH37
VCC_NCTF14
AJ33
VCC_NCTF15
VCC_NCTF16
AJ35
Y16
AK33
VCC_NCTF17
AK35
VCC_NCTF18
VCC_NCTF19
AK36
AK37
Y20
AD33
Y23
Y28
VCC_NCTF22
AM35
VCC_NCTF23
VCC_NCTF24
AL35
VCC_NCTF25
AA33
VCC_NCTF26
VCC_NCTF27
AA35
AA36
VCC_NCTF28
AP35
VCC_NCTF29
VCC_NCTF30
AA17
AP36
AR35
AC16
AR36
VCC_NCTF33
Y33
VCC_NCTF34
VCC_NCTF35
Y35
Y36
VCC_NCTF36
Y37
VCC_NCTF37
VCC_NCTF38
AD17
T30
AH15
T34
VCC_NCTF39
T35
VCC_NCTF40
VCC_NCTF41
U29
U31
AH19
U32
VCC_NCTF44
U35
VCC_NCTF45
VCC_NCTF46
U36
V32
VCC_NCTF47
V33
VCC_NCTF48
VCC_NCTF49
AK19
V36
V37
AL19
VSS_NCTF1
VSS_NCTF2
T27
VSS_NCTF3
U24
VSS_NCTF4
VSS_NCTF5
U28
VSS_NCTF6
VSS_NCTF7
V35
VSS_NCTF8
AB17
VSS_NCTF9
VSS_NCTF10
AB35
VSS_NCTF11
AD37
VSS_NCTF12
VSS_NCTF13
AF17
VSS_NCTF14
AK17
VSS_NCTF15
VSS_NCTF16
AM17
VSS_NCTF17
VSS_NCTF18
AP26
VSS_NCTF19
AR15
VSS_NCTF20
VSS_NCTF21
AR19
T37
V31
AA19
AD19
AF35
AM24
AP28
AR28
VSS_SCB1
VSS_SCB2
A3
VSS_SCB3
VSS_SCB4
C1
VSS_SCB5
BL51
VSS_SCB6
A51
VCC_AXM1
AT33
VCC_AXM2
VCC_AXM3
AT31
VCC_AXM4
VCC_AXM5
AK24
VCC_AXM6
AJ26
VCC_AXM7
AJ23
B2
BL1
=PP1V05_S0M_NB_VCCAXM
VCC_NCTF42
VCC_NCTF43
U33
AJ17
AL23
VCC_NCTF31
VCC_NCTF32
Y32
AC19
VCC_NCTF20
VCC_NCTF21
AJ36
AL33
FCBGA
(7 OF 10)
VCC_NCTF9
VCC_NCTF10
AH33
AH36
V23
VCC_NCTF1
VCC_NCTF2
POWER
AK32
T17
VSS NCTF
VCC5
AC31
AH32
=PPVCORE_S0_NB_GFX
VCC_AXG_NCTF1
VCC_AXG_NCTF2
VSS SCB
AC32
(6 FCBGA
OF 10)
VCC AXM
AH28
VCC2
VCC3
VCC NCTF
VCC1
AT34
VCC SM LF
OMIT
CRESTLINE
AT35
AK29
AK23
VCC_NCTF50
=PP1V05_S0M_NB_VCCAXM
AL24
VCC_AXM_NCTF1
AL26
VCC_AXM_NCTF2
AL28
VCC_AXM_NCTF3
VCC_AXM_NCTF4
AM16
AM26
AM28
VCC_AXM_NCTF5
AM29
VCC_AXM_NCTF6
VCC_AXM_NCTF7
AM21
AM31
AP16
AM32
VCC_AXM_NCTF8
AM33
VCC_AXM_NCTF9
VCC_AXM_NCTF10
AP29
AP31
AP20
AP32
AP23
AR21
VCC_AXM_NCTF13
AL29
VCC_AXM_NCTF14
VCC_AXM_NCTF15
AL32
VCC_AXM_NCTF16
AR31
VCC_AXM_NCTF17
VCC_AXM_NCTF18
AR32
AR33
AR26
VCC_AXM_NCTF11
VCC_AXM_NCTF12
AP33
AL31
VCC_AXM_NCTF19
V29
NB Power 1
VCC_SM_LF1
AW45
VCC_SM_LF2
VCC_SM_LF3
BC39
VCC_SM_LF4
BD17
VCC_SM_LF5
VCC_SM_LF6
BD4
VCC_SM_LF7
AT6
BE39
AW8
NB_VCCSM_LF1
NB_VCCSM_LF2
NB_VCCSM_LF3
NB_VCCSM_LF4
NB_VCCSM_LF5
NB_VCCSM_LF6
NB_VCCSM_LF7
SYNC_MASTER=T9_MLB
SYNC_DATE=10/30/2006
C1807
0.1uF
20%
10V
CERM
402
C1806
0.1uF
2
20%
10V
CERM
402
C1805
0.22UF
20%
6.3V
X5R
402
C1804
0.22UF
2
20%
6.3V
X5R
402
C1803
0.47UF
2
10%
6.3V
CERM-X5R
402
C1802
1uF
2
10%
6.3V
CERM
402
C1801
1uF
2
10%
6.3V
CERM
402
SIZE
APPLE INC.
DRAWING NUMBER
051-7455
SCALE
SHT
NONE
540 mA
U1400
=PPVCORE_S0_NB
VCC CORE
POWER
17
OF
REV.
76
01
OMIT
U1400
21D1
5 mA
21B1
21B1
J32
VCC_SYNC
PP3V3_S0_NB_VCCA_CRTDAC
A33
VCCA_CRT_DAC1
B33
VCCA_CRT_DAC2
A30
VCCA_DAC_BG
PP3V3_S0_NB_VCCA_DAC_BG
B32
=GND_NB_VSSA_DAC_BG
FCBGA
VTT1
U13
(8 OF 10)
VTT2
VTT3
U12
VTT4
VTT5
U9
VTT6
U7
VTT7
VTT8
U5
VTT9
U2
VTT10
VTT11
U1
VTT12
T11
VTT13
VTT14
T10
VTT15
VTT16
T7
VSSA_DAC_BG
21A3
PP1V25_S0_NB_VCCA_DPLLA
B49
VCCA_DPLLA
21A3
PP1V25_S0_NB_VCCA_DPLLB
H49
VCCA_DPLLB
VCCA_HPLL
VCCA_MPLL
VTT
80 mA
150 mA
20C1
PP1V25_S0M_NB_VCCA_MPLL
AM2
21B3
B41
VSSA_LVDS
=PP3V3_S0_NB_VCCA_PEG_BG
K50
20A6
=GND_NB_VSSA_PEG_BG
K49
VSSA_PEG_BG
20B2
PP1V25_S0_NB_PEGPLL
U51
VCCA_PEG_PLL
20B5
PP1V25_S0M_NB_VCCA_SM
20A6 7C4
100 mA
VCCA_LVDS
AW18
VCCA_SM1
AV19
VCCA_SM2
VCCA_SM3
AU19
AU18
VCCA_SM4
AU17
VCCA_SM5
AT22
VCCA_SM7
AT21
VCCA_SM8
VCCA_SM9
AT19
AT18
VCCA_SM10
AT17
VCCA_SM11
AR17
AR16
35 mA
20B5
VCCA_PEG_BG
VCCA_SM_NCTF1
VCCA_SM_NCTF2
PP1V25_S0M_NB_VCCA_SM_CK
BC29
VCCA_SM_CK1
BB29
VCCA_SM_CK2
U8
U3
T13
T9
T6
VTT17
T5
VTT18
VTT19
T3
VTT20
R3
VTT21
VTT22
R2
T2
R1
AT23
VCC_AXD3
AU24
VCC_AXD4
VCC_AXD5
AT29
VCC_AXD6
AT30
VCC_AXD_NCTF
AR29
PP1V25_S0M_NB_VCCAXD
15A2 20A6
515 mA
PP1V25_S0_NB_VCCAXF
20D5
495 mA
=PP1V25_S0_NB_VCCDMI
7C7 20A8
100 mA
PP1V8_S3M_NB_VCCSMCK
20A2
200 mA
18C6 21C3
100 mA
AU28
AT25
VCC_AXF1
VCC_AXF2
B23
VCC_AXF3
A21
AJ50
VCC_SM_CK1
BK24
VCC_SM_CK2
VCC_SM_CK3
BK23
VCC_SM_CK4
BJ23
BJ24
S0 or S3M is acceptable
PP1V8_S0_NB_VCCTXLVDS
A43
40 mA
21D1
C27
PP3V3_S0_NB_VCCA_TVDACB
PP3V3_S0_NB_VCCA_TVDACA
VCCA_TVB_DAC2
B28
VCCA_TVC_DAC1
VCCA_TVC_DAC2
A28
60 mA
60 mA
M32
VCCD_CRT
21D6
=PP1V5_S0_NB_VCCD_CRT
PP1V5_S0_NB_VCCD_TVDAC
L29
VCCD_TVDAC
21C5
PP1V5_S0_NB_VCCD_QDAC
N28
VCCD_QDAC
21C7
5 mA
250 mA
VCCA_TVA_DAC2
VCCA_TVB_DAC1
B27
AN2
VCCD_HPLL
U48
VCCD_PEG_PLL
21B3
=PP1V8_S0_NB_VCCD_LVDS
J41
VCCD_LVDS1
H42
VCCD_LVDS2
LVDS
150 mA
VCC_HV1
C40
VCC_HV2
B40
VCC_PEG1
AD51
VCC_PEG2
W50
VCC_PEG3
VCC_PEG4
W51
VCC_PEG5
V50
100 mA
PP1V05_S0_NB_VCCPEG
14D2 20D3
1260 mA
PP1V05_S0_NB_VCCRXRDMI
20C3
260 mA
V49
VCC_RXR_DMI1
AH50
VCC_RXR_DMI2
AH51
=PP1V25_S0M_NB_VCCD_HPLL
20D1
PEG
21C1
VTTLF
40 mA
VCCA_TVA_DAC1
CRT
B25
DMI
C25
PP3V3_S0_NB_VCCA_TVDACC
TV/CRT
21C1
HV
=PP3V3_S0_NB_VCCHV
40 mA
B21
VCC_DMI
VCC_TX_LVDS
7C7 20C8
U11
VCC_AXD1
VCC_AXD2
AXF
0.4 mA
=GND_NB_VSSA_LVDS
A41
A SM
21C3
A CK
10 mA
S0 or S3M is acceptable
18B3 PP1V8_S0_NB_VCCTXLVDS
SM CK
PP1V25_S0M_NB_VCCA_HPLL
A LVDS
20D1
A PEG
AXD
50 mA
PLL
100 mA
AL2
=PP1V25R1V05_S0_NB_VTT
CRESTLINE
=PP3V3_S0_NB_VCCSYNC
POWER
21B5 7C4
CRT
30 mA
VTTLF1
A7
VTTLF2
F2
VTTLF3
AH1
NB_VTTLF_CAP1
NB_VTTLF_CAP2
NB_VTTLF_CAP3
1
C1913
0.47UF
2
10%
6.3V
CERM-X5R
402
C1912
0.47UF
2
10%
6.3V
CERM-X5R
402
C1911
0.47UF
10%
6.3V
CERM-X5R
402
NB Power 2
SYNC_MASTER=T9_MLB
SYNC_DATE=10/30/2006
D
APPLE INC.
051-7455
SCALE
SHT
NONE
DRAWING NUMBER
18
OF
REV.
76
01
OMIT
U1400
VSS100
AW24
C46
VSS199
FCBGA
VSS287
W11
A15
VSS2
VSS3
(9 OF 10)
VSS101
VSS102
AW29
C50
VSS200
VSS201
(10 OF 10)
VSS288
VSS289
W39
VSS103
VSS104
AW5
D13
D24
VSS290
VSS291
W47
AW7
VSS105
AY10
D3
VSS204
VSS292
W7
VSS205
VSS206
VSS293
VSS294
Y13
VSS202
VSS203
W43
W5
AA29
VSS7
VSS8
VSS106
VSS107
AY24
D32
AY37
D39
AB23
VSS9
VSS108
AY42
D45
VSS207
VSS295
Y41
AB26
VSS10
VSS11
VSS109
VSS110
AY43
D49
E10
VSS208
VSS209
VSS296
VSS297
Y45
AY45
AB31
VSS12
VSS111
AY47
E16
VSS210
VSS298
Y5
AC10
VSS13
VSS14
VSS112
VSS113
AY50
E24
E28
VSS211
VSS212
VSS299
VSS300
Y50
B10
VSS15
VSS16
VSS114
VSS115
B20
E32
VSS301
P29
B24
E47
AC43
VSS17
VSS116
B29
F19
VSS215
AC47
VSS18
VSS19
VSS117
VSS118
B30
F36
T29
F4
VSS216
VSS217
VSS302
B35
AD21
VSS20
VSS119
B38
F40
VSS218
AD26
F50
VSS219
VSS220
AC13
AC3
AC39
AD1
VSS213
VSS214
VSS21
VSS22
VSS120
VSS121
B43
AD3
VSS23
VSS122
B5
G13
VSS221
AD41
VSS24
VSS25
VSS123
VSS124
B8
G16
BA1
G19
VSS222
VSS223
VSS26
VSS27
VSS125
VSS126
BA17
G24
BA18
G28
VSS28
VSS127
BA2
G29
VSS226
G33
VSS227
VSS228
AD29
AD45
AD49
AD5
AD50
AD8
B46
G1
VSS224
VSS225
TDE_SENSE
Y2
Y49
Y11
TDE_FORCE
VSS303
T31
=NB_TDE_FORCE
8A2
TDB_FORCE
VSS304
T33
=NB_TDB_FORCE
8A2
NOTE: TDB = _N
TDB_SENSE
VSS305
R28
=NB_TDB_SENSE
VSS29
VSS30
VSS128
VSS129
BB12
G42
AE14
VSS31
VSS130
BB25
G45
VSS229
VSS306
AA32
AE6
VSS32
VSS33
VSS131
VSS132
BB40
G48
G8
VSS230
VSS231
VSS307
VSS308
AB32
BB44
AF23
VSS34
VSS133
BB49
H24
VSS232
VSS309
AF28
AF24
VSS35
VSS36
VSS134
VSS135
BB8
H28
H4
VSS233
VSS234
VSS310
VSS311
AF29
BC16
VSS37
VSS38
VSS136
VSS137
BC24
H45
J11
VSS312
VSS313
AV25
BC25
VSS235
VSS236
J16
VSS237
VSS238
VSS239
AF20
AF31
AG2
AG38
AG43
VSS39
VSS138
BC36
AG47
VSS40
VSS41
VSS139
VSS140
BC40
J2
BC51
J24
AH3
VSS42
VSS141
BD13
J28
VSS240
AH40
VSS43
VSS44
VSS142
VSS143
BD2
J33
BD28
J35
VSS241
VSS242
AH7
VSS45
VSS144
BD45
J39
VSS243
AH9
VSS46
VSS47
VSS145
VSS146
BD48
BD5
K12
VSS245
VSS48
VSS49
VSS147
VSS148
BE1
K47
BE19
K8
VSS246
VSS247
L1
VSS248
VSS249
VSS250
AG50
AH41
AJ11
AJ13
AJ21
AJ24
VSS50
VSS149
BE23
AJ29
VSS51
VSS52
VSS150
VSS151
BE30
L17
BE42
L20
AJ43
VSS53
VSS152
BE51
L24
VSS251
AJ45
VSS54
VSS55
VSS153
VSS154
BE8
L28
BF12
L3
VSS252
VSS253
AK20
VSS56
VSS155
BF16
L33
VSS254
AK21
VSS57
VSS58
VSS156
VSS157
BF36
L49
BG19
M28
VSS255
VSS256
VSS59
VSS60
VSS158
VSS159
BG2
M42
BG24
M46
M49
VSS259
VSS260
VSS261
AJ32
AJ49
AK26
AK28
AK31
AK51
VSS61
VSS160
BG29
AL1
VSS62
VSS63
VSS161
VSS162
BG39
M5
BG48
M50
VSS163
BG5
AM11
AM13
AM3
VSS64
M9
VSS262
N11
VSS263
VSS264
VSS65
VSS66
VSS164
VSS165
BH17
N14
AM41
VSS67
VSS166
BH30
N17
VSS265
AM45
VSS68
VSS69
VSS167
VSS168
BH44
N29
BH46
N32
VSS266
VSS267
VSS70
VSS71
VSS169
VSS170
BH8
N36
BJ11
N39
N44
VSS270
N49
VSS271
VSS272
AN1
AN38
AN39
AN43
VSS72
VSS171
BJ13
AN5
VSS73
VSS74
VSS172
VSS173
BJ38
AN7
BJ4
N7
VSS75
VSS174
BJ42
AP48
VSS76
VSS77
VSS175
VSS176
AR11
VSS78
VSS177
BK17
P3
VSS276
AR2
VSS79
VSS80
VSS178
VSS179
BK25
P50
BK29
R49
VSS277
VSS278
VSS81
VSS82
VSS180
VSS181
BK36
T39
BK40
T43
AR7
VSS83
VSS182
BK44
T47
VSS281
AT10
VSS84
VSS85
VSS183
VSS184
BK6
U41
BK8
U45
VSS282
VSS283
U50
VSS284
VSS285
VSS286
AR39
AR44
AR47
AT14
P19
VSS273
BJ46
P2
BK15
P23
VSS274
VSS275
AT41
VSS86
VSS185
BL11
AT49
VSS87
VSS88
VSS186
VSS187
BL13
V2
BL19
V3
VSS89
VSS188
BL22
VSS90
VSS91
VSS189
VSS190
BL37
AU1
AU23
AU29
AU3
AU36
VSS92
VSS93
VSS191
VSS192
C12
VSS94
VSS193
C19
AV39
VSS95
VSS96
VSS194
VSS195
C28
AW1
VSS97
VSS196
C33
AW12
VSS98
VSS99
VSS197
VSS198
C36
AV48
AW16
AT27
H50
VSS279
VSS280
NB Grounds
SYNC_MASTER=T9_MLB
SYNC_DATE=10/30/2006
BL47
AU51
AU49
AD32
VSS268
VSS269
AP4
AP50
8A2
VSS257
VSS258
BG51
AM4
8A2
NOTE: TDE = _P
BA24
AE10
C7
VSS6
AB28
AW32
AA24
AB20
VSS4
VSS5
VSS
FCBGA
AA21
CRESTLINE
VSS1
A24
U1400
CRESTLINE
A13
A17
OMIT
VSS
C16
C29
SIZE
C41
APPLE INC.
DRAWING NUMBER
051-7455
SCALE
SHT
NONE
19
OF
REV.
76
01
18C3
=PPVCORE_S0_NB
PP1V25_S0_NB_VCCAXF
=PP1V25_S0_NB_VCCAXF
350 mA
MIN_LINE_WIDTH=0.4 MM
MIN_NECK_WIDTH=0.2 MM
VOLTAGE=1.25V
CRITICAL
C2100 1
C2101
22UF
470UF
C2102
0.22uF
20%
6.3V
2 CERM
805
20%
2.5V 2 3
TANT
D2T
C2103
0.22uF
20%
6.3V
2 X5R
402
20%
6.3V
2 X5R
402
C2170
C2104
10uF
0.1UF
20%
6.3V 2
X5R
603
20%
10V
2 CERM
402
7C7
=PP1V25_S0_NB_PLL
20B4 7C7
=PP1V25_S0M_NB_VCCD_HPLL
450 mA
C2171
1UF
20%
2 10V
CERM
402
250mA,0.5ohm
L2181
L2173
=PP1V05_S0M_NB_VCCAXM
7C7
540 mA
22UF
C2111
0.22uF
20%
6.3V
2 CERM
805
C2112
0.22uF
20%
6.3V
2 X5R
402
C2113
0.1UF
20%
6.3V
2 X5R
402
20%
2 10V
CERM
C2114
0.1UF
20%
2 10V
CERM
402
C2115
20%
2 10V
CERM
402
402
MIN_LINE_WIDTH=0.5 MM
MIN_NECK_WIDTH=0.2 MM
VOLTAGE=1.05V
OMIT
1210
CRITICAL
C2173
Layout Note:
Place L and C
close to MCH
0.1UF
91NH
=PP1V05_S0_NB_PCIE
1450 mA
C2174
20%
6.3V
2 X5R
603
20%
2.5V 2
POLY
CASE-B2
0402-LF
C2181
22UF
1200 mA
MIN_LINE_WIDTH=0.3 MM
MIN_NECK_WIDTH=0.2 MM
VOLTAGE=1.05V
850 mA
C2121 1
C2122 1
C2123 1
C2124 1
20%
6.3V 2
CERM
603
20%
6.3V 2
CERM
603
20%
6.3V
CERM1 2
603
10%
6.3V
CERM-X5R 2
402
20%
6.3V
2 X5R
603
4.7uF
4.7uF
2.2uF
0.47UF
C2177
20%
402
250mA,0.5ohm
L2183
120-OHM-0.3A-EMI
MIN_LINE_WIDTH=0.3 MM
MIN_NECK_WIDTH=0.2 MM
VOLTAGE=1.25V
R21831
0.51
18B3
1%
1/16W
MF-LF
402
250 mA
C2183 1
C2184
0.1UF
MIN_LINE_WIDTH=0.3 MM
MIN_NECK_WIDTH=0.2 MM
VOLTAGE=1.25V
22UF
20%
6.3V 2
CERM
805
18D6
150 mA
20%
10V
2 CERM
402
PP1V25_S0M_NB_MPLL_RC
Layout Note:
10uF caps should
be close to MCH
on opposite side.
10uF
C2182
10V
2 CERM
0402-LF
=PP1V25R1V05_S0_NB_VTT
18D6
50 mA
0.1UF
20%
6.3V 2
CERM
805
Layout Note:
10uF caps should
be close to MCH
on opposite side.
10uF
220UF
MIN_LINE_WIDTH=0.25 MM
MIN_NECK_WIDTH=0.2 MM
VOLTAGE=1.25V
18D3 7C7
120-OHM-0.3A-EMI
CRITICAL
C2110
C2180
0.1UF
10%
2 6.3V
CERM
402
18A6
250 mA
2400 mA
OMIT
CRITICAL
C2130 1
330UF
20%
2.5V 2
POLY
CASE-C2
C2135
0.1UF
C2131
22UF
20%
2 10V
CERM
402
C2132
22UF
20%
2 6.3V
CERM
805
20%
2 6.3V
CERM
805
R2141
=PP1V25_S0_NB_VCCA
7C7
??? mA
OMIT
CRITICAL
MIN_LINE_WIDTH=0.4 MM
MIN_NECK_WIDTH=0.2 MM
VOLTAGE=1.25V
5%
1/16W
MF-LF
402
C2140 1
330UF
C2142
22UF
20%
2 6.3V
CERM
805
20%
2.0V 2
POLY
CASE-B2
C2143
4.7UF
C2145
22UF
20%
6.3V
2 CERM
805
SOD-723
C2144
R2186
PP3V3_S0_NBCORE_FOLLOW_R
10
MIN_LINE_WIDTH=0.4 MM
MIN_NECK_WIDTH=0.2 MM
VOLTAGE=3.3V
=PP3V3_S0_NB_FOLLOW
7D4
1%
1/16W
MF-LF
402
MIN_LINE_WIDTH=0.4 MM
MIN_NECK_WIDTH=0.2 MM
VOLTAGE=1.25V
NOSTUFF
1
10%
2 6.3V
CERM
402
1SS418
=PPVCORE_S0_NB
??? mA
5%
1/16W
MF-LF
402
17D7
7C7
17D3
20D8
1UF
10%
2 6.3V
X5R-CERM
603
R2145
1
D2186
C2147
2.2UF
20D3 7C7
WF: 220-ohm
L2190
FERR-220-OHM-2.5A
1
100 mA
??? mA
PP1V25_S0_NB_PEGPLL
MIN_LINE_WIDTH=0.25 MM
MIN_NECK_WIDTH=0.2 MM
VOLTAGE=1.25V
2
0603
R21901
C2148
0.1UF
20%
6.3V
2 CERM
402-LF
=PP1V25_S0_NB_PLL
18B6
20%
10V
2 CERM
402
1.1
1%
1/16W
MF-LF
402 2
C2191
0.1UF
18C6
100 mA
C2192
0.1UF
20%
20%
10V
2 CERM
2 10V
CERM
402
402
PP1V25_S0_NB_PEGPLL_RC
C2190
10uF
20%
6.3V 2
X5R
603
20A6 7B4
=PP1V8_S3_MEMVREF
R21121
10%
6.3V
2 CERM
402
1K
1%
1/16W
MF-LF
4022
R21101
PP0V9_S3M_MEM_NBVREFA 1K
MAKE_BASE=TRUE
MIN_LINE_WIDTH=0.4 MM
MIN_NECK_WIDTH=0.2 mm
VOLTAGE=0.9V
1%
1/16W
MF-LF
4022
=PP0V9_S3M_MEM_NBVREFA
100 mA
100 mA
R21131
=PP3V3_S0_NB_VCCHV
=PP1V25_S0_NB_VCCDMI
1
C2160
0.1UF
C2161
0.1UF
20%
2 10V
CERM
402
20%
2 10V
CERM
402
C2165
7C4 18C6
5 mA
=PP0V9_S3M_MEM_NBVREFB
L2195
1.0UH-0.23A
1
2
7A4 200 mA=PP1V8_S3_NB_VCC
15C2
R21951
1.1
R2111
1%
1/16W
MF-LF
402 2
1K
1%
1/16W
MF-LF
4022
PP1V8_S3M_NB_VCCSMCK
MIN_LINE_WIDTH=0.25 MM
MIN_NECK_WIDTH=0.2 MM
VOLTAGE=1.8V
0603
1K
=PP3V3_S0_NB_VCCA_PEG_BG
MIN_LINE_WIDTH=0.25 MM
MIN_NECK_WIDTH=0.2 MM
VOLTAGE=1.25V
1%
1/16W
MF-LF
4022
C2196
22UF
20%
6.3V 2
CERM
805
C2197
0.1UF
20%
2 10V
CERM
NB Standard Decoupling
402
PP1V8_S3_NB_VCCSMCK_RC
0.1UF
C2195
20%
2 10V
CERM
402
18B3
200 mA
SYNC_MASTER=WFERRY
MIN_LINE_WIDTH=0.25 MM
MIN_NECK_WIDTH=0.2 MM
VOLTAGE=1.8V
10uF
=GND_NB_VSSA_PEG_BG
18C6
20%
6.3V
X5R 2
603
SYNC_DATE=06/15/2006
D
APPLE INC.
Current numbers from Crestline EDS Addendum, doc #20127.
DRAWING NUMBER
051-7455
SCALE
SHT
NONE
20
OF
REV.
76
01
7A7
=PP5V_S0_NB_TVDAC
205 mA
R2281
U2280
C2280
5%
1/16W
MF-LF
2 402
1UF
TPS79933
C2201
PP3V3_S0_NB_TVDAC 205 mA
NO STUFF
C2281
1UF
NC
NR 2
5 NC
MIN_LINE_WIDTH=0.4 MM
MIN_NECK_WIDTH=0.2 MM
VOLTAGE=3.3V
P3V3TVDAC_NOISE
C2282 1
THRML
PAD
GND
16V
NFM18
1
1
C2288
16V
NFM18
=PP1V5_S0_NB_TVDAC
C2285
65 mA
1
0.1UF
20%
2 10V
CERM
402
18B6
R2205
100
NO STUFF
NO STUFF
1SS418
R2285
D2285
60 mA
PP1V5_S0_NB_VCCD_CRT 21C5
MIN_LINE_WIDTH=0.2 MM
MIN_NECK_WIDTH=0.2 MM
VOLTAGE=1.5V
18B6
MIN_LINE_WIDTH=0.3 MM
MIN_NECK_WIDTH=0.2 MM
VOLTAGE=1.5V
C2200
7B7
=PP1V5_S0_NB_FOLLOW
6 mA
=PP1V5_S0_NB_VCCD_CRT
PP3V3_S0_NB_TVDAC_FOLLOW
MIN_LINE_WIDTH=0.4 MM
MIN_NECK_WIDTH=0.2 MM
VOLTAGE=3.3V
SOD-723
PP1V5_S0_NB_VCCD_CRT
10
0402-LF
1%
1/16W
MF-LF
402
C2290
16V
NFM18
PP3V3_S0_NB_TVDAC_F
2
1
MIN_LINE_WIDTH=0.4 MM
MIN_NECK_WIDTH=0.2 MM
VOLTAGE=3.3V
125 mA
10uF
20%
6.3V
X5R 2
603
21D6
1
1
1
1
C2294
MIN_LINE_WIDTH=0.2 MM
MIN_NECK_WIDTH=0.2 MM
VOLTAGE=1.5V
16V
NFM18
5 mA
C2207
0.1UF
20%
2 10V
CERM
402
Layout Note:
These 4 caps should be
within 6.35 mm of NB edge
10%
2 10V
X5R
402
20%
10V
2 CERM
402
18B6
1UF
18B6
40 mA
CRITICAL
C2205
MIN_LINE_WIDTH=0.3 MM
MIN_NECK_WIDTH=0.2 MM
VOLTAGE=3.3V
22000pF-1000mA
PP1V5_S0_NB_VCCD_QDAC
PP3V3_S0_NB_VCCA_TVDACA
3
C2291
CRITICAL
PP1V5_S0_NB_QDAC
0.1UF
C2206
MIN_LINE_WIDTH=0.2 MM
MIN_NECK_WIDTH=0.2 MM
VOLTAGE=1.5V
Layout Note:
These 2 caps should be
within 6.35 mm of NB edge
22000pF-1000mA
22000pF-1000mA
16V
NFM18
18D6
80 mA
C2292
L2290
120-OHM-0.3A-EMI
MAKE_BASE=TRUE
5%
1/16W
MF-LF
2402
MIN_LINE_WIDTH=0.4 MM
MIN_NECK_WIDTH=0.2 MM
VOLTAGE=3.3V
CRITICAL
PP1V5_S0_NB_VCCD_TVDAC
0.1UF
22000pF-1000mA
7B7
PP3V3_S0_NB_VCCA_CRTDAC
20%
2 10V
CERM
402
20%
6.3V
2 X5R
603
10%
16V
CERM 2
402
80 mA
10UF
0.01UF
22000pF-1000mA
120-OHM-0.3A-EMI
1
2
PP3V3_S0_NB_CRTDAC_F
0402-LF
2 10%
6.3V
CERM
402
CRITICAL
C2289
L2288
MIN_LINE_WIDTH=0.6MM
MIN_NECK_WIDTH=0.2MM
VOLTAGE=3.3V
SON OUT 1
6 IN
4 EN
P3V3TVDAC_EN_RC
10%
6.3V 2
CERM
402
CRITICAL
CRITICAL
18B6
40 mA
20%
2 10V
CERM
402
=PPVCORE_S0_NB_GFX
7700 mA
C2293
MIN_LINE_WIDTH=0.3 MM
MIN_NECK_WIDTH=0.2 MM
VOLTAGE=3.3V
0.1UF
PP3V3_S0_NB_VCCA_TVDACB
3
CRITICAL
C2210 1
C2212
22UF
470UF
C2213
10uF
20%
2 6.3V
CERM
805
20%
2.5V 2 3
TANT
D2T
20%
2 6.3V
X5R
603
C2214
1UF
10%
2 6.3V
CERM
402
C2215
0.47UF
10%
2 6.3V
CERM-X5R
402
C2216
0.1UF
20%
2 10V
CERM
402
C2217
Layout Note:
These 8 caps should be
within 6.35 mm of NB edge
CRITICAL
C2296
0.1UF
20%
2 10V
CERM
402
22000pF-1000mA
16V
NFM18
PP3V3_S0_NB_VCCA_TVDACC
3
C2295
MIN_LINE_WIDTH=0.3 MM
MIN_NECK_WIDTH=0.2 MM
VOLTAGE=3.3V
18B6
40 mA
0.1UF
20%
2 10V
CERM
402
=PP3V3_S0_NB_VCCHV
part properties
PP1V8_S0_NB_VCCTXLVDS
1.0UH-0.5A-0.675A
=PP1V8_S0_NB_LVDS
260 mA
MIN_LINE_WIDTH=0.2 MM
MIN_NECK_WIDTH=0.2 MM
VOLTAGE=1.8V
2
1007
OMIT
NO STUFF
R2242 R2243
1
22K
22K
5%
1/16W
MF-LF
2 402
5%
1/16W
MF-LF
2 402
NO STUFF
R2244
22K
CRITICAL1
C2220
R2245
NO STUFF
R2247 1R2248
22K
22K
5%
1/16W
MF-LF
2 402
5%
1/16W
MF-LF
2 402
OUT
15B3 60C6
OUT
15B3 60C6
OUT
15B3 60C6
OUT
15B3 60C6
22K
5%
1/16W
MF-LF
2 402
C2298
22000pF-1000mA
16V
NFM18
0.001uF
20%
2 50V
CERM
402
=GND_NB_VSSA_LVDS
18C6
=PP1V8_S0_NB_VCCD_LVDS
C2297
PP3V3_S0_NB_VCCA_DAC_BG
3
MIN_LINE_WIDTH=0.2 MM
MIN_NECK_WIDTH=0.2 MM
VOLTAGE=3.3V
18D6
5 mA
0.1UF
20%
2 10V
CERM
402
=GND_NB_VSSA_DAC_BG
18D6
18A6
150 mA
C2226
NO STUFF
R2249
CRITICAL
C2223
GFX_VID<0>
GFX_VID<1>
GFX_VID<2>
GFX_VID<3>
VID<3:0>=1001=1.05575V
1000=1.08150V
0011=1.21025V
C2221
20%
2 50V
CERM
402
20%
2.5V 2
POLY
CASE-B2-SM
22K
0.001uF
220UF
5%
1/16W
MF-LF
2 402
5%
1/16W
MF-LF
2 402
18B3 18C6
110 mA
1UF
R2250
10%
2 6.3V
CERM
402
22K
5%
1/16W
MF-LF
2 402
18D6 7C4
=PP3V3_S0_NB_VCCSYNC
10 mA
C2230
0.1UF
20%
2 10V
CERM
402
CRITICAL
U2265
=PP1V8_S0_NB_DPLL
(1.7V - 5.5V)
80 mA
C2265 1
TPS731125
SOT23-5
1 IN
3 EN
1UF
OUT 5
NR/FB 4
GND
R2261
PP1V25_S0_NB_DPLL
MIN_LINE_WIDTH=0.4 MM
MIN_NECK_WIDTH=0.2 MM
VOLTAGE=1.25V
P1V25S0NBDPLL_FB
10%
6.3V 2
CERM
402
C2266
10UF
20%
6.3V
2 X5R
603
80 mA
PP1V25_S0_NB_VCCA_DPLLA
MIN_LINE_WIDTH=0.3 MM
MIN_NECK_WIDTH=0.2 MM
VOLTAGE=1.25V
5%
1/16W
MF-LF
402
C2267
R2266
0.01UF
0.300
10%
2 16V
CERM
402
5%
1/10W
FF
2 603
C2261
0.1UF
20%
10V
2 CERM
402
PP1V25_S0_NB_DPLL_RF
1
18D6
NB Graphics Decoupling
80 mA
SYNC_MASTER=WFERRY
R2262
1
PP1V25_S0_NB_VCCA_DPLLB
MIN_LINE_WIDTH=0.3 MM
MIN_NECK_WIDTH=0.2 MM
VOLTAGE=1.25V
5%
1/16W
MF-LF
402
18D6
C2262
0.1UF
20%
10V
2 CERM
402
SIZE
D
APPLE INC.
SYNC_DATE=06/15/2006
DRAWING NUMBER
051-7455
SCALE
SHT
NONE
21
OF
REV.
76
01
R2310 1
26C6 26A4 25D6 23C2
27D4 26A5 25D6
5%
1/16W
MF-LF
402
R2300 1
27C8
27C8
IN
OUT
8.2K
PP1V5_S0_SB_VCC1_5_B
PP3V3_G3_SB_RTC
R2301
332K
24.9
1%
1/16W
MF-LF
402
1%
1/16W
MF-LF
402
1%
1/16W
MF-LF
402
R2311
10K
5%
1/16W
MF-LF
402
R2302
332K
OMIT
SB_RTC_X1
SB_RTC_X2
AG25
AF24
U2300
RTCX1
RTCX2
ICH8M
BGA
SB_RTC_RST_L
AF23
RTCRST*
IN
SB_SM_INTRUDER_L
AD22
INTRUDER*
TP_LAN_R2D<0>
TP_LAN_R2D<1>
TP_LAN_R2D<2>
D21
GLAN_COMP
B21
C22
E20
C20
AH21
D25
C25
73C3 8A6
OUT
HDA_BIT_CLK
HDA_SYNC
73C3 8A6
OUT
HDA_RST_L
OUT
73C3 8A6
IN
8A6
8A6
8A6
73B3 8A6
OUT
R2313
R2314
33
33
1
1
R2315
33
HDA_BIT_CLK_R
73C3 HDA_SYNC_R
73C3
5%
1/16W
MF-LF
402
5%
1/16W
MF-LF
402
5%
1/16W
MF-LF
402
73C3
HDA_RST_L_R
HDA_SDIN0
TP_HDA_SDIN1
TP_HDA_SDIN2
TP_HDA_SDIN3
HDA_SDOUT
73B3
5%
1/16W
MF-LF
HDA_SDOUT_R
TP_SB_SATALED_L
73D3 40D4
73D3 40C4
AE13
402
HDA_DOCK_EN_L
TP_HDA_DOCK_RST_L
IN
IN
73D3 40D4
OUT
73D3 40D4
OUT
8D4
IN
8D4
IN
8D4
OUT
8D4
OUT
8D4
IN
8D4
IN
8D4
OUT
8D4
OUT
75B3 29C3
IN
75B3 29C3
IN
40D2
40D2
IN
IN
SATA_A_D2R_N
SATA_A_D2R_P
SATA_A_R2D_C_N
SATA_A_R2D_C_P
INT PU
LAN_TXD0
LAN_TXD1
LAN_TXD2
AE10
AG14
AF10
AF6
AF5
AH5
AH6
SATA_B_D2R_N
SATA_B_D2R_P
SATA_B_R2D_C_N
SATA_B_R2D_C_P
AG3
SATA_C_D2R_N
SATA_C_D2R_P
SATA_C_R2D_C_N
SATA_C_R2D_C_P
AF2
SB_CLK100M_SATA_N
SB_CLK100M_SATA_P
AB7
SATA_RBIAS_N
SATA_RBIAS_P
AG1
AG4
AJ4
AJ3
AF1
AE4
AE3
AC6
AG2
C4
LPC_FRAME_L
DPRSTP*
DPSLP*
AF26
FERR*
AD24
CPUPWRGD/GPIO49
AG29
IGNNE*
INT PD
INT PD
SB_A20GATE
CPU_A20M_L
BI
OUT
BI
OUT
CPU_PWRGD
OUT
AF27
CPU_IGNNE_L
OUT
9C8 70B3
INIT*
INTR
RCIN*
AE24
CPU_INIT_L
CPU_INTR
SB_RCIN_L
OUT
OUT
9B8 70C3
NMI
SMI*
AD23
CPU_NMI
CPU_SMI_L
OUT
9B8 70C3
AG28
OUT
9B8 70B3
STPCLK*
AA24
CPU_STPCLK_L
OUT
9B8 70B3
THRMTRIP*
AE27
CPU_THERMTRIP_R
AC20
AH14
TP8
HDA_DOCK_EN*/GPIO33
HDA_DOCK_RST*/GPIO34
INT PU
INT PD
SATA0RXN
SATA0RXP
SATA0TXN
SATA0TXP
SATA2RXN
SATA2RXP
SATA2TXN
SATA2TXP
SATA_CLKN
SATA_CLKP
SATARBIAS*
SATARBIAS
DD0
DD1
DD2
DD3
DD4
DD5
DD6
DD7
DD8
DD9
DD10
DD11
DD12
DD13
DD14
DD15
TP_SB_TP8
V1
IDE_PDD<0>
IDE_PDD<1>
IDE_PDD<2>
IDE_PDD<3>
IDE_PDD<4>
IDE_PDD<5>
IDE_PDD<6>
IDE_PDD<7>
IDE_PDD<8>
IDE_PDD<9>
IDE_PDD<10>
IDE_PDD<11>
IDE_PDD<12>
IDE_PDD<13>
IDE_PDD<14>
IDE_PDD<15>
DA0
DA1
DA2
V3
T1
V4
T5
AB2
T6
T3
R2
T4
V6
V5
U1
V2
U6
AA4
AA1
AB3
DCS1*
DCS3*
Y6
DIOR*
DIOW*
DDACK*
IDEIRQ
IORDY
DDREQ
W4
Y5
W3
Y2
Y3
Y1
W5
R2306
10K
5%
1/16W
MF-LF
2 402
=PP1V05_S0_SB_CPU_IO
54.9
1%
1/16W
MF-LF
402
IDE_PDA<0>
IDE_PDA<1>
IDE_PDA<2>
IDE_PDCS1_L
IDE_PDCS3_L
IDE_PDIOR_L
IDE_PDIOW_L
IDE_PDDACK_L
IDE_IRQ14
IDE_PDIORDY
IDE_PDDREQ
R2309
54.9
1%
1/16W
MF-LF
402
CPU_FERR_L
AA23
U2
R2305 1
R2304
39C5 73D3
BI
39C5 73D3
BI
39C5 73D3
BI
39C5 73D3
BI
39C5 73D3
BI
39C5 73D3
BI
39C5 73D3
BI
39C5 73D3
BI
39C3 73D3
BI
39C3 73D3
BI
39C3 73D3
BI
39C3 73D3
BI
39C3 73D3
BI
39C3 73D3
BI
39C3 73D3
BI
9C8 70C3
R2308
1
BI
IN
2.2K
INT PD
SATA1RXN
SATA1RXP
SATA1TXN
SATA1TXP
8.2K
NO STUFF
INT PD
9B2 70B3
AE26
R2303 1
5%
1/16W
MF-LF
402
CPU_DPRSTP_L
CPU_DPSLP_L
=PP3V3_S0_SB_GPIO
INT PD
HDA_SDOUT
SATALED*
AG26
BI
OUT
INT PD
INT PD
E6
TP_LPC_DRQ0_L
EXTGPU_PWR_EN
BI
9C8 70C3
GLAN_COMPI
GLAN_COMPO
HDA_SDIN0
HDA_SDIN1
HDA_SDIN2
HDA_SDIN3
G9
BI
OUT
GLAN_DOCK*/GPIO13
HDA_RST*
AD13
33
INT PU
AE14
AH15
FWH4/LFRAME*
G8
AF13
INT PU
AJ15
AH17
F6
LPC_AD<0>
LPC_AD<1>
LPC_AD<2>
LPC_AD<3>
F5
A20GATE
A20M*
LAN_RSTSYNC
HDA_BIT_CLK
HDA_SYNC
AJ16
AJ17
R2316
GLAN_CLK
LAN_RXD0
LAN_RXD1
LAN_RXD2
E5
LDRQ0*
LDRQ1*/GPIO23
CPU
C21
INT PU
IDE
D22
TP_LAN_D2R<0>
TP_LAN_D2R<1>
TP_LAN_D2R<2>
LAN_ENERGY_DET
74B3
B24
FWH0/LAD0
FWH1/LAD1
FWH2/LAD2
FWH3/LAD3
INT PU
LAN/GLAN
TP_LAN_RSTSYNC
AD21
INTVRMEN
LAN100_SLP
IHDA
TP_ENET_GLAN_CLK
AF25
SATA
SB_INTVRMEN
SB_LAN100_SLP
LPC
IN
27C5
(1 OF 6)
RTC
27D5
73C3 8A6
=PP3V3_S0_SB_GPIO
INT PU
5%
1/16W
MF-LF
402
24.9
1%
1/16W
MF-LF
402
PM_THRMTRIP_L
IN
39C3 73D3
OUT
39B5 73D3
OUT
39B5 73D3
OUT
39B3 73D3
OUT
39B5 73D3
OUT
39B3 73D3
OUT
39C3 73D3
OUT
39B5 73D3
OUT
39B3 73D3
IN
39B5 73D3
IN
39B5 73D3
IN
39C3 73D3
HDA
SYNC_MASTER=T9_MLB
HDA_BIT_CLK
SYNC_DATE=10/30/2006
HDA_RST#
HDA_SDIN[0-2]
INTEGRATED PDs
HDA_SDOUT
INTEGRATED PD
ACZ_SYNC
INTEGRATED PD
D
APPLE INC.
DRAWING NUMBER
051-7455
SCALE
SHT
NONE
22
OF
REV.
76
01
OMIT
8D4
Spares
8D4
(x2-capable,
pull HDA_SYNC
high for x2)
8D4
8D4
8C4
8C4
8C4
8C4
ExpressCard
8C4
8C4
8C4
8C4
FireWire
8C4
8C4
33B6
33B6
33B6
33B6
OUT
TP_PCIE_B_D2R_N
TP_PCIE_B_D2R_P
TP_PCIE_B_R2D_C_N
TP_PCIE_B_R2D_C_P
M27
TP_PCIE_EXCARD_D2R_N
TP_PCIE_EXCARD_D2R_P
TP_PCIE_EXCARD_R2D_C_N
TP_PCIE_EXCARD_R2D_C_P
K27
TP_PCIE_FW_D2R_N
TP_PCIE_FW_D2R_P
TP_PCIE_FW_R2D_C_N
TP_PCIE_FW_R2D_C_P
H27
PCIE_MINI_D2R_N
PCIE_MINI_D2R_P
PCIE_MINI_R2D_C_N
PCIE_MINI_R2D_C_P
F27
P26
N29
N28
M26
L29
L28
K26
J29
J28
H26
G29
G28
F26
E29
E28
U2300
PERN1
PERP1
PETN1
PETP1
ICH8M
BGA
(2 OF 6)
PERN2
PERP2
PETN2
PETP2
PERN3
PERP3
PETN3
PETP3
PERN4
PERP4
PETN4
PETP4
PERN5
PERP5
PETN5
PETP5
=PP3V3_S5_SB_USB
R2402
10K
10K
5%
1/16W
MF-LF
402 2
10K
8C1
IN
OUT
33B6
OUT
IN
OUT
OUT
OUT
IN
IN
IN
34C8
Ethernet
Yukon-PCIE
Nineveh-GLCI
10K
34C8
5%
1/16W
MF-LF
402 2
R2403
10K
5%
1/16W
MF-LF
2 402
39B8
R2408
5%
1/16W
MF-LF
402 2
R2401
10K
5%
1/16W
MF-LF
402 2
R2404
R2405
10K
5%
1/16W
MF-LF
2 402
5%
1/16W
MF-LF
402
2
IN
IN
34C8
OUT
34C8
OUT
PCIE_ENET_D2R_N
PCIE_ENET_D2R_P
PCIE_ENET_R2D_C_N
PCIE_ENET_R2D_C_P
D27
SPI_SCLK_R
SPI_CE_R_L<0>
TP_SPI_CE_R_L<1>
C23
SPI_SI_R
SPI_SO
D23
D26
C29
C28
PERN6/GLAN_RXN
PERP6/GLAN_RXP
PETN6/GLAN_TXN
PETP6/GLAN_TXP
R2407
10K
73A3 52C7
BI
R2409
10K
5%
1/16W
MF-LF
2 402
BI
5%
1/16W
MF-LF
2 402
73A3 52C3
BI
73A3 52C3
BI
B23
E22
F21
SPI_CLK
SPI_CS0*
SPI_CS1*
SPI_MOSI
SPI_MISO
INT PU
AG16
AG15
AE15
AF15
AG17
AD12
AJ18
AD14
AH18
DMI3RXN
DMI3RXP
DMI3TXN
DMI3TXP
AD27
Y26
W29
W28
DMI_N2S_N<2>
DMI_N2S_P<2>
DMI_S2N_N<2>
DMI_S2N_P<2>
AB25
AA29
AA28
DMI_N2S_N<3>
DMI_N2S_P<3>
DMI_S2N_N<3>
DMI_S2N_P<3>
AD26
AC29
AC28
SB_CLK100M_DMI_N
SB_CLK100M_DMI_P
T25
USBP0N
USBP0P
USBP1N
USBP1P
USBP2N
USBP2P
USBP3N
USBP3P
USBP4N
USBP4P
USBP5N
USBP5P
USBP6N
USBP6P
USBP7N
USBP7P
USBP8N
USBP8P
USBP9N
USBP9P
G3
USB_EXTA_N
USB_EXTA_P
USB_MINI_N
USB_MINI_P
USB_EXTD_N
USB_EXTD_P
USB_CAMERA_N
USB_CAMERA_P
USB_IR_N
USB_IR_P
USB_TPAD_N
USB_TPAD_P
USB_BT_N
USB_BT_P
USB_EXTB_N
USB_EXTB_P
USB_EXCARD_N
USB_EXCARD_P
USB_EXTC_N
USB_EXTC_P
USBRBIAS*
USBRBIAS
F2
INT PD
INT PD
INT PD
INT PD
INT PD
INT PD
INT PD
INT PD
INT PD
INT PD
USB
INT PD
INT PD
INT PD
INT PD
INT PD
IN
15B3 71D3
IN
15B3 71D3
OUT
15C3 71D3
OUT
15B3 71D3
IN
15B3 71D3
IN
15B3 71D3
OUT
15C3 71D3
OUT
15B3 71D3
IN
15B3 71D3
IN
15B3 71D3
OUT
15B3 71D3
OUT
15B3 71D3
IN
15B3 71D3
IN
15B3 71D3
OUT
15B3 71D3
OUT
15B3 71D3
IN
29C3 75B3
IN
29C3 75B3
R2413
1
1%
NOSTUFF
R2406
AB26
DMI_N2S_N<1>
DMI_N2S_P<1>
DMI_S2N_N<1>
DMI_S2N_P<1>
DMI_IRCOMP_R
INT PU
OC0*
OC1*/GPIO40
OC2*/GPIO41
OC3*/GPIO42
OC4*/GPIO43
OC5*/GPIO29
OC6*/GPIO30
OC7*/GPIO31
OC8*
OC9*
DMI2RXN
DMI2RXP
DMI2TXN
DMI2TXP
U28
Y24
INT PD
AJ19
Y27
U29
Y23
INT PD
USB_EXTA_OC_L
SB_GPIO40
USB_EXTD_OC_L
SB_GPIO42
PM_LATRIGGER_L
EXTGPU_LVDS_EN
SB_GPIO30
USB_EXTB_OC_L
EXCARD_OC_L
USB_EXTC_OC_L
DMI1RXN
DMI1RXP
DMI1TXN
DMI1TXP
V26
DMI_ZCOMP
DMI_IRCOMP
INT PD
INT PU
INT PU
V27
T26
INT PD
73A3 52C7
DMI_N2S_N<0>
DMI_N2S_P<0>
DMI_S2N_N<0>
DMI_S2N_P<0>
DMI0RXN
DMI0RXP
DMI0TXN
DMI0TXP
DMI_CLKN
DMI_CLKP
INT PD
EHCI0
EHCI1
R2400
8B1
IN
OUT
P27
SPI
7D1
IN
TP_PCIE_A_D2R_N
TP_PCIE_A_D2R_P
TP_PCIE_A_R2D_C_N
TP_PCIE_A_R2D_C_P
8D4
PCI_EXPRESS
8D4
G2
H5
H4
H2
H1
J3
J2
K5
K4
K2
K1
L3
L2
M5
M4
M2
M1
N3
N2
24.9
1/16W
USB_RBIAS
100K
22.6
PP1V5_S0_SB_VCC1_5_B
MF-LF
R2414
73B3
F3
402
BI
8C1 73B3
BI
8C1 73B3
BI
8C1 73B3
BI
8C1 73B3
BI
8C1
BI
8C1
BI
8C1 73B3
BI
8C1 73B3
BI
BI
BI
8C1 73B3
BI
8C1 73B3
BI
BI
BI
8B1 73B3
BI
8B1 73B3
BI
8B1 73B3
BI
8B1 73B3
BI
8B1 73B3
BI
8B1 73B3
External A
AirPort (PCIe Mini-Card)
External D / WWAN
Camera
IR
Geyser Trackpad/Keyboard
Bluetooth
External B
ExpressCard
External C
NOTE: USBP[0-9]P/N have internal 15K pull-downs.
1%
1/16W
MF-LF
402
5%
1/16W
MF-LF
402 2
OMIT
U2300
74D3 37C5
BI
74D3 37C5
BI
74D3 37C5
BI
74D3 37C5
BI
74D3 37C5
BI
74D3 37C5
BI
74D3 37C5
BI
74D3 37C5
BI
74D3 37C5
74D3 37C5
BI
74D3 37C5
BI
74D3 37C5
BI
74D3 37B5
BI
74D3 37B5
BI
74D3 37B5
BI
74D3 37B5
BI
74D3 37B5
BI
74D3 37B5
BI
74D3 37B5
BI
74D3 37B6
BI
74D3 37B5
BI
74D3 37B5
BI
74D3 37B5
BI
74D3 37B5
BI
BI
74D3 37B5
BI
74D3 37B5
BI
74D3 37B5
BI
74D3 37B5
BI
74D3 37B5
BI
74D3 37B5
BI
74D3 37B5
BI
74D3 37B5
BI
74C3 23A4
BI
74C3 23A4
BI
74C3 23A4
BI
BI
PCI_AD<0>
PCI_AD<1>
PCI_AD<2>
PCI_AD<3>
PCI_AD<4>
PCI_AD<5>
PCI_AD<6>
PCI_AD<7>
PCI_AD<8>
PCI_AD<9>
PCI_AD<10>
PCI_AD<11>
PCI_AD<12>
PCI_AD<13>
PCI_AD<14>
PCI_AD<15>
PCI_AD<16>
PCI_AD<17>
PCI_AD<18>
PCI_AD<19>
PCI_AD<20>
PCI_AD<21>
PCI_AD<22>
PCI_AD<23>
PCI_AD<24>
PCI_AD<25>
PCI_AD<26>
PCI_AD<27>
PCI_AD<28>
PCI_AD<29>
PCI_AD<30>
PCI_AD<31>
INT_PIRQA_L
INT_PIRQB_L
INT_PIRQC_L
INT_PIRQD_L
D20
E19
D19
A20
D17
A21
A19
C19
A18
B16
A12
E16
A14
G16
A15
B6
C11
A9
D11
B12
C12
D10
C7
F13
E11
E13
E12
D8
A6
E8
D6
A3
F9
B5
C5
A10
AD0
AD1
AD2
AD3
AD4
AD5
AD6
AD7
AD8
AD9
AD10
AD11
AD12
AD13
AD14
AD15
AD16
AD17
AD18
AD19
AD20
AD21
AD22
AD23
AD24
AD25
AD26
AD27
AD28
AD29
AD30
AD31
PIRQA*
PIRQB*
PIRQC*
PIRQD*
ICH8M
BGA
(3 OF 6)
INT PU
INT PU
INT PU
REQ0*
INT PU
GNT0*
REQ1*/GPIO50
GNT1*/GPIO51
REQ2*/GPIO52
GNT2*/GPIO53
REQ3*/GPIO54
GNT3*/GPIO55
A4
PCI_FW_REQ_L
IN
IN
23A4 74D3
IN
23A4 74D3
PCI_FW_GNT_L
D7
E18
C18
B19
F18
A11
C10
MAKE_BASE=TRUE
PCI_REQ1_L
TP_SB_GPIO51
PCI_REQ2_L
TP_SB_GPIO53
ODD_RST_5VTOL_L
TP_SB_GPIO55
BOOT_LPC_SPI_L
1
C/BE0*
C/BE1*
C/BE2*
C/BE3*
IRDY*
PAR
PCIRST*
DEVSEL*
PERR*
PLOCK*
SERR*
STOP*
TRDY*
FRAME*
C17
E15
F16
E17
C8
D9
G6
D16
A7
B7
F10
C16
C9
A17
37A5 74D3
OUT
6C2 46B6
R2415
I/F
1K
OUT
39A8 73D3
PCI
OUT
PCI_C_BE_L<0>
PCI_C_BE_L<1>
PCI_C_BE_L<2>
PCI_C_BE_L<3>
PCI_IRDY_L
PCI_PAR
PCI_RST_L
PCI_DEVSEL_L
PCI_PERR_L
PCI_LOCK_L
PCI_SERR_L
PCI_STOP_L
PCI_TRDY_L
PCI_FRAME_L
BI
37B5 74D3
BI
37B5 74D3
BI
37B5 74D3
BI
37B5 74D3
BI
BI
OUT
5%
1/16W
MF-LF
402
INT
AG24
B10
G7
PLT_RST_L
PCI_CLK33M_SB
TP_PCI_PME_L
BI
23A4 74D3
BI
BI
BI
74D3 23A6
27D4 67C6
29A5 29B3 75B3
74C3 23A8
74C3 23A8
INTERRUPT I/F
PIRQE*/GPIO2
PIRQF*/GPIO3
PIRQG*/GPIO4
PIRQH*/GPIO5
F8
G11
F12
B3
74C3 23A8
INT_PIRQE_L
INT_PIRQF_L
DVI_HOTPLUG_DET
ODD_PWR_EN_L
7C4
BI
IN
SPI
37B5 74D3
37A6
23A4 37A5 74D3
OUT
PLTRST*
PCICLK
PU
PME*
LPC
GNT0# HAS INT PU; ENABLED ONLY WHEN PCIRST#=0 AND PWROK=H
BI
BI
GNT0#
BI
23A4 74C3
BI
23A4 74C3
IN
68A4 68B8
OUT
23A4 39C8
74C3 23A6
74C3 23A6
39C8 23A6
FireWire INT*
PCI_FRAME_L
PCI_IRDY_L
PCI_TRDY_L
PCI_STOP_L
PCI_SERR_L
PCI_DEVSEL_L
PCI_PERR_L
PCI_LOCK_L
R2423
R2424
R2425
R2426
R2427
R2428
R2430
R2429
PCI_FW_REQ_L
PCI_REQ1_L
PCI_REQ2_L
R2432
R2431
R2433
INT_PIRQA_L
INT_PIRQB_L
INT_PIRQC_L
INT_PIRQD_L
INT_PIRQE_L
INT_PIRQF_L
ODD_PWR_EN_L
R2437
R2436
R2438
R2439
R2440
R2441
R2442
=PP3V3_S0_SB_PCI
1
8.2K
8.2K
8.2K
8.2K
8.2K
8.2K
8.2K
8.2K
8.2K
8.2K
8.2K
SYNC_DATE=10/30/2006
8.2K
8.2K
8.2K
8.2K
8.2K
8.2K
8.2K
D
APPLE INC.
DRAWING NUMBER
051-7455
SCALE
SHT
NONE
23
OF
REV.
76
01
NO_REBOOT_MODE
1
R2506
10K
1K
5%
1/16W
MF-LF
402
5%
1/16W
MF-LF
402
5%
1/16W
MF-LF
402
5%
1/16W
MF-LF
402
5%
1/16W
MF-LF
402
5%
1/16W
MF-LF
402
R2550
R2552
R2547
R2505
R2507
10K
10K
10K
10K
8.2K
8.2K
5%
1/16W
MF-LF
402
5%
1/16W
MF-LF
402
5%
1/16W
MF-LF
402
5%
1/16W
MF-LF
402
5%
1/16W
MF-LF
402
5%
1/16W
MF-LF
402
R2532 2
R2510
10K
OMIT
U2300
AJ26
BI
SMB_CLK
SMB_DATA
CLINK_WLAN_RESET_L
SMB_ME_CLK
SMB_ME_DATA
AE19
SMBCLK
SMBDATA
LINKALERT*
SMLINK0
SMLINK1
IN
PM_RI_L
AF17
RI*
73A3 47D8
BI
73A3 47D8
BI
74A3
BI
73A3 47A8
BI
73A3 47A8
24A5
IN
PM_SUS_STAT_L
PM_SYSRST_L
IN
PM_BMBUSY_L
OUT
44B8 27C5
15B6
AD19
AG21
AC17
F4
AD15
AG12
LINDACARD_GPIO
IN
AG22
ICH8M
BGA
(4 OF 6)
SUS_STAT*/LPCPD*
SYS_RESET*
SMBALERT*/GPIO11
PM_STPPCI_L
PM_STPCPU_L
AE20
OUT
AG18
STP_PCI*/GPIO15
STP_CPU*/GPIO25
BI
PM_CLKRUN_L
AH11
CLKRUN*/GPIO32
AE17
PCIE_WAKE_L
INT_SERIRQ
IN
37A5 24A5
IN
24B5
IN
44C5
IN
AC13
WAKE*
SERIRQ
THRM*
VR_PWRGD_CLKEN
AJ20
VRMPWRGD
TP_SB_TP7
AJ22
TP7
AF12
8B4
44B8
PM_THRM_L
PCI_PME_FW_L
TP_SB_GPIO6
AJ8
AJ9
SMC_RUNTIME_SCI_L
SMC_WAKE_SCI_L
AH9
AE16
24A5
24B5 8B4
OUT
OUT
24A5
24A7
8B4
OUT
LAN_PHYPC
EXTGPU_RST_L
SB_GPIO18
TP_SB_GPIO20
SB_SCLOCK
SATA_B_PWR_EN_L
FWH_MFG_MODE
SB_SATA_CLKREQ_L
SB_SLOAD
SB_SDATAOUT<0>
SB_SDATAOUT<1>
AC19
AG8
AH12
AE11
AG10
AH25
AD16
AG13
AF9
AJ11
AD10
TACH1/GPIO1 INT PU
TACH2/GPIO6 INT PU
TACH3/GPIO7 INT PU
GPIO8
GPIO12
TACH0/GPIO17 INT PU
GPIO18
GPIO20 INT PD
SCLOCK/GPIO22
QRT_STATE0/GPIO27
QRT_STATE1/GPIO28
SATACLKREQ*/GPIO35
SLOAD/GPIO38
SDATAOUT0/GPIO39
SDATAOUT1/GPIO48
GPIO
IN
POWER MGT
OUT
29C2 28C4
BI
SATA0GP/GPIO21
SATA1GP/GPIO19
SATA2GP/GPIO36
SATA3GP/GPIO37
IN
SPKR
INT PD
NB_SB_SYNC_L
AJ13
MCH_SYNC*
TP_SB_TP3
AJ21
TP3
MISC
15A3
AD9
INT PU
5%
1/16W
MF-LF
402
R2534
10K
5%
1/16W
MF-LF
402
RSVD_EXTGPU_LVDS_EN
SATA_B_DET_L
SB_GPIO36
SB_CRT_TVOUT_MUX_L
AJ12
AJ10
AF11
AG11
D3
SUS_CLK_SB
SLP_S3*
SLP_S4*
SLP_S5*
AG23
AD18
PM_SLP_S3_L
TP_PM_SLP_S4_L
PM_SLP_S5_L
S4_STATE*/GPIO26
AH27
PM_S4_STATE_L
SUSCLK
10K
SB_CLK14P3M_TIMER
SB_CLK48M_USBCTLR
AG9
AF21
OUT
OUT
IN
IN
D
69A6
OUT
45A8
OUT
OUT
44C5 45C3
OUT
PWROK
AE23
PM_SB_PWROK
IN
DPRSLPVR/GPIO16
AJ14
PM_DPRSLPVR
OUT
BATLOW*
AE21
PM_BATLOW_L
IN
24A5 44B8
PWRBTN*
C2
PM_PWRBTN_L
IN
44C8
LAN_RST*
AH20
PM_LAN_ENABLE
IN
44D8
RSMRST*
AG27
PM_RSMRST_L
IN
44C8
CK_PWRGD
E1
CLK_PWRGD
CLPWROK
E3
INT PU
OUT
27A6
28A4
8B4
AJ25
TP_PM_SLP_M_L
F23
CLINK_NB_CLK
CLINK_WLAN_CLK
BI
15A3 74A3
BI
74A3
CL_DATA0
CL_DATA1
F22
CLINK_NB_DATA
CLINK_WLAN_DATA
BI
15A3 74A3
BI
74A3
AE18
AF19
R2524
100K
IN
CL_CLK0
CL_CLK1
SLP_M*
5%
1/16W
MF-LF
402
R2525
10K
5%
1/16W
MF-LF
402
=PP3V3_S0MWOL_SB_CLINK0
1
CL_VREF0
CL_VREF1
D24
74A3
AH23
74A3
CL_RST*
AJ23
MEM_LED/GPIO24
ME_EC_ALERT/GPIO10
EC_ME_ALERT/GPIO14
WOL_EN/GPIO9
AJ27
AJ24
AF22
AG19
CLINK_NB_RESET_L
OUT
ARB_DETECT_L
SB_GPIO10_CL1
SB_GPIO14_CL2
35B7 WOL_EN
BI
15A3 74A3
C2500
1
1
10%
16V
X5R
402
24A5
2
2
24A5
100K
5%
1/16W
MF-LF
402
=PP3V3_S5_SB_CLINK1
1
10%
16V
X5R
402
R2511
1
1
10K
R2514
5%
1/16W
MF-LF
402
R2515
NOSTUFF
R2512
24D5
5%
1/16W
MF-LF
402
5%
1/16W
MF-LF
402
PM_RI_L
10K
1%
1/16W
MF-LF
402
10K
24B3
44B8 24C3
=PP3V3_S5_SB
R2544
PM_BATLOW_L
24C5
LAN_PHYPC
SB_GPIO14_CL2
10K
SYNC_MASTER=T9_MLB
SYNC_DATE=10/30/2006
R2598
SB_GPIO10_CL1
R2546
24B3
1%
1/16W
MF-LF
402
24B3
8.2K
5%
1/16W
MF-LF
402
R2545
10K
1%
1/16W
MF-LF
402
R2516
R2536
24C5
ARB_ONLY
1
10K
1%
1/16W
MF-LF
402
1%
1/16W
MF-LF
402
5%
1/16W
MF-LF
402
FWH_MFG_MODE
LINDACARD_GPIO
ARB_DETECT_L
1
10K
100K
5%
1/16W
MF-LF
402
PCI_PME_FW_L
453
R2530
1
R2531
37A5 24C5
R2529
1%
1/16W
MF-LF
402
SATA_B_PWR_EN_L
=PP3V3_S5_SB
10K
1
1
0.1uF
1%
1/16W
MF-LF
402
1%
1/16W
MF-LF
402
R2596
PLACE R2511-16 WHERE PHYSICALLY ACCESSIBLE
10K
R2528
3.24K
R2597
TP_SB_GPIO6
10K
1%
1/16W
MF-LF
402
SIZE
1%
1/16W
MF-LF
402
APPLE INC.
DRAWING NUMBER
051-7455
SCALE
SHT
NONE
7C1
C2501
24C5
1%
1/16W
MF-LF
402
R2523 1
=PP3V3_S0_SB_GPIO
EXTGPU_RST_L
R2527
NOSTUFF
24C5 8B4
1%
1/16W
MF-LF
402
453
0.1uF
24A7
LAYOUT NOTE:
R2526
SB_CLINK_VREF0
SB_CLINK_VREF1
24C5
7C4
3.24K
INT PU
SB_SPKR
R2533 2
5%
1/16W
MF-LF
402
G5
CLK14
CLK48
BMBUSY*/GPIO0
29C2 28C4
34B8 33C5
5%
1/16W
MF-LF
402
R2535
10K
10K
SATA
GPIO
R2504
8.2K
CLOCKS
R2553
8.2K
CONTROLLER LINK
R2551
1K
SMB
R2502
R2500
SYS GPIO
=PP3V3_S0_SB_GPIO
=PP3V3_S5_SB_GPIO
24
OF
REV.
76
01
7
6 uA S0-G3
A23
A5
26D7
PP5V_S0_SB_V5REF
A13
ICH8M
B13
BGA
A16
V5REF
V5REF_SUS
D14
PP5V_S5_SB_V5REF_SUS
G4
PP1V5_S0_SB_VCC1_5_B
AA25
G14
E14
F14
L27
657 mA
L4
AC11
L5
AA26
L11
AC14
M12
AA27
L12
AC25
M13
AB27
L14
AC26
M14
AB28
AC27
M15
AB29
AD17
M16
D28
AD20
M17
D29
M11
AD28
M23
E25
M18
AD29
M28
E26
P11
AD3
M29
E27
P18
AD4
M3
F24
T11
AD6
N1
F25
T18
CORE
L17
L18
AE1
N11
G24
U18
N12
H23
V17
AE2
N13
H24
V14
AE22
N14
J23
V11
AD1
N15
J24
U11
AE25
N16
K24
V18
AE5
N17
K25
AE6
N18
L23
AE9
N26
L24
AF14
N27
L25
AF16
N4
M24
AF18
N5
M25
AF3
N6
N23
AF4
P12
N24
AG5
VCC1_5_B
V16
V12
VCCDMIPLL
VCC_DMI
R29
PP1V5_S0_SB_VCCDMIPLL
26A6
23 mA
AE28
=PP1V25_S0_SB_DMI
7C7 26A6
50 mA
AE29
N25
P14
P24
P15
P25
AH13
P16
R24
AH16
P17
R25
AH19
P23
R26
AH2
P28
R27
P29
T23
R11
T24
R12
T27
AH26
R13
T28
AH3
R14
T29
AH4
R15
U24
AA3
AH8
R16
W25
U7
AJ5
R17
V24
B11
R18
U25
B14
R28
Y25
B17
R4
V25
V23
VSS
VSS
B2
T12
B20
T13
B22
T14
B8
T15
C24
T16
C26
T17
47 mA
26D5
PP1V5_S0_SB_VCCSATAPLL
AJ6
AC23
VCCP CORE
P13
AG6
AH10
AH24
L16
VCC1_05
AE12
AH22
1130 mA
7D7 26D2
C14
OMIT
AB24
AF28
=PPVCORE_S0_SB
C13
(6 OF 6)
T7
26C7
1 mA S0-S5
L26
OMIT
U2300
=PP1V05_S0_SB_CPU_IO
1 mA
V_CPU_IO
AC24
VCC3_3
AF29
=PP3V3_S0_SB_VCC3_3_DMI
7D4 26A8
VCC3_3
AD2
=PP3V3_S0_SB_VCC3_3_SATA
7D4 26B8
AC8
=PP3V3_S0_SB_VCC3_3_VCCPCORE
=PP3V3_S0_SB_VCC3_3_IDE
7D4 26B4
=PP3V3_S0_SB_VCC3_3_PCI
7D4 26B4
AD8
VCC3_3
AE8
AF8
V7
IDE
VCCRTC
VCCA3GP
AD25
L15
(5 OF 6)
AB1
PP3V3_G3_SB_RTC
L13
BGA
A25
1 mA
L1
ICH8M
AA2
AA7
K7
U2300
(VCC3_3 total)
VCC3_3
W1
442 mA
W6
W7
Y7
VCCSATAPLL
A8
B15
AE7
B18
AG7
T2
B4
VCC1_5_A
AH7
U12
B9
VCC3_3
AJ7
U15
D2
U16
D4
D5
U17
E21
U23
E24
U26
E4
U27
E9
U3
1080 mA
26C6 7B7
=PP1V5_S0_SB_VCC1_5_A_ATX
AC1
AC3
VCC1_5_A
26C2 7B7
=PP1V5_S0_SB_VCC1_5_A
AC10
AC9
U5
V13
F28
V15
F29
V28
G12
F7
V29
G17
G1
W2
E2
W26
G10
W27
G13
Y28
G19
Y29
G23
Y4
G25
AB4
F1
G26
AB23
L6
G27
AB5
L7
H25
AB6
M6
H28
AD5
M7
H29
U4
26C2 7B6
=PP1V5_S0_SB_VCC1_5_A_USB_CORE
VCC1_5_A
H7
J26
A28
J27
A29
J4
AH1
J5
VSS_NCTF
K23
K28
AD7
10 mA
26B6 7B7
=PP1V5_S0_SB_VCCUSBPLL
D1
VCCSUSHDA
AD11
=PP3V3_S5_SB_3V3_VCCSUSHDA
7D1 26B2
J6
VCCSUS1_05
AF20
TP_VCCSUS1_05_INTERNAL_REG1
TP_VCCSUS1_05_INTERNAL_REG2
VCCSUS1_5
AC16
TP_VCCSUS1_5_INTERNAL_REG1
VCCSUS1_5
J7
TP_VCCSUS1_5_INTERNAL_REG2
VCCSUS3_3
C3
=PP3V3_S5_SB_VCCSUS3_3
19 mA S0,26B2 7C4
63 mA M1 & WOL
AJ1
AJ28
AJ29
K6
B1
11 mA S0,
1 mA S3-S5
VCCUSBPLL
VCC1_5_A
AC18
AC21
VCCSUS3_3
AC22
AG20
AH28
P6
NOTE:
VccHDA and VccSusHDA can be 1.5V or 3.3V
depending on VIO of HD Audio interface.
Current figures provided assume 1.5V.
=PP3V3_S5_SB_VCCSUS3_3_USB
7D1 26D2
117 mA S0,
44 mA S3-S5
P7
C1
VCC1_5_A24
TP_VCCLAN1_05_INTERNAL_REG1
TP_VCCLAN1_05_INTERNAL_REG2
F17
P1
=PP3V3_S0MWOL_SB_VCCCL3_3
F20
G18
G21
VCCLAN1_05
VCCSUS3_3
23 mA
26B7
PP1V5_S0_SB_VCCGLANPLL
A24
80 mA
26A4
=PP1V5_S0_SB_VCCGLAN1_5
B27
B28
VCCGLANPLL
VCCGLAN1_5
A26
7D4
=PP3V3_S0_SB_VCCGLAN3_3
B25
SYNC_MASTER=T9_MLB
P5
VCCCL3_3
B26
1 mA
P3
VCCGLAN3_3
R3
C2600
R5
1uF
10%
6.3V
CERM
402
R6
VCCCL1_05
G22
C2601
0.1uF
2
20%
10V
CERM
402
TP_VCCCL1_05_INTERNAL_REG
VCCCL1_5
VCCLAN3_3
A22
VCCCL1_5V
F19
=PP3V3_S0MWOL_SB_VCCLAN3_3
SIZE
19 mA S0,
51 mA M1 & WOL
7C4 26D3
G20
D
APPLE INC.
DRAWING NUMBER
051-7455
SCALE
SHT
NONE
Current numbers from ICH8M Max Power Estimates Rev 2.0, doc #610194.
SYNC_DATE=10/30/2006
R1
A27
B29
P2
P4
AH29
K3
32 mA
N7
W23
AJ2
K29
7C4 26C4
VCC1_5_A
GLAN POWER
A2
=PP3V3R1V5_S0_SB_VCCHDA
VCC1_5_A
H6
J25
AC12
AC7
W24
A1
VCCHDA
VCC1_5_A
AA5
AA6
F11
AC5
E23
J1
E7
AC4
F15
H3
E10
AC2
VCCPSUS
D18
C15
D13
VCCPUSB
U14
ATX
D15
USB CORE
U13
(VCC1_5_A total)
D12
(VCCSUS3_3 total)
C6
PCI
AF7
ARX
C27
26D5 7B7
=PP1V5_S0_SB_VCC1_5_A_ARX
25
OF
REV.
76
01
8
7A7
D2702
1/16W
MF-LF
402
5%
25B6 7B7
HN2S02JE
25D6
VOLTAGE=5V
MIN_LINE_WIDTH=0.3MM
MIN_NECK_WIDTH=0.25MM
0.1UF
10%
6.3V
L2702
=PP1V5_S0_SB
10%
2 16V
X5R
402
R2701
2
1/16W
MF-LF
402
5%
1UF
20%
6.3V
PLACEMENT NOTE:
PLACE < 2.54MM OF SB ON SECONDARY OR
3.56MM ON PRIMARY NEAR PIN AJ6
10%
6.3V
CERM
402
2 X5R
603
25A3 7C4
C2702
0.1UF
10%
2 16V
X5R
402
20%
2 2.5V
POLY
CASE-C2
VOLTAGE=5V
MIN_LINE_WIDTH=0.3MM
MIN_NECK_WIDTH=0.25MM
C2704
25D6
=PP1V5_S0_SB
25B6 7B7
0805-1
PP1V5_S0_SB_VCC1_5_B
C2700
220UF
20%
2 2.5V
POLY
CASE-B2
C2705
C2706
22UF
22UF
20%
6.3V
2 CERM
805
20%
6.3V
2 CERM
805
PLACEMENT NOTE:
PLACE < 2.54MM OF SB ON SECONDARY OR
3.56MM ON PRIMARY NEAR PIN AC1..AC5
C2707
2.2UF
C2713
10%
2 16V
X5R
402
25B3 7C4
25A6
NOSTUFF
10%
C2742
10UF
20%
2 6.3V
X5R
603
20%
2 6.3V
CERM1
603
10%
2 16V
X5R
402
PLACEMENT NOTE:
PLACE C2709 NEAR PIN B27 OF SB
VOLTAGE=1.5V
MIN_LINE_WIDTH=0.5MM
MIN_NECK_WIDTH=0.25MM
C2701
0.01UF
10%
2 16V
CERM
402
10%
C2743
25B6 7B7
=PP1V5_S0_SB_VCC1_5_A
10%
=PP3V3_S0_SB_VCC3_3_DMI
0.1UF
10%
C2722
0.1UF
10%
2 16V
X5R
402
25B6 7B6
C2724
4.7UF
20%
6.3V
2 CERM
603
=PP1V5_S0_SB_VCC1_5_A_USB_CORE
PLACEMENT NOTE:
PLACE < 2.54MM OF SB ON SECONDARY OR
3.56MM ON PRIMARY NEAR PINS F1..M7
C2712
0.1UF
10%
2 16V
X5R
402
402
25C3 7D4
PLACEMENT NOTE:
PLACE < 2.54MM OF SB ON SECONDARY OR
3.56MM ON PRIMARY NEAR PINS AA3...Y7
C2715
0.1UF
0.1UF
C2725
0.1UF
10%
16V
2 X5R
402
PLACEMENT NOTE:
PLACE < 2.54MM OF SB ON SECONDARY OR
3.56MM ON PRIMARY NEAR PINS F20,G21
C2709
0.1UF
10%
2 16V
X5R
402
PLACEMENT NOTE:
DISTRIBUTE IN PCI SECTION OF SB
NEAR PINS A8 ... F11
NOSTUFF
C2726
0.1UF
10%
2 16V
X5R
402
C2727
0.1UF
10%
2 16V
X5R
402
C2740
0.1UF
10%
2 16V
X5R
402
=PP3V3_S0_SB_VCC3_3_PCI
25B3 7D1
C2728
0.1UF
10%
2 16V
X5R
402
=PP3V3_S5_SB_3V3_VCCSUSHDA
PLACEMENT NOTE:
PLACE < 2.54MM OF SB ON SECONDARY
OR 3.56MM ON PRIMARY NEAR PIN AD11
C2741
0.1UF
10%
16V
2 X5R
402
PP1V5_S0_SB_VCC1_5_B
26C6 25D6 23C2 22D7
=PP1V25_S0_SB_DMI
PLACEMENT NOTE:
PLACE < 2.54MM OF SB ON SECONDARY
OR 3.56MM ON PRIMARY NEAR PIN AE29
2 16V
X5R
402
MAKE_BASE=TRUE
25A6
SB Decoupling
=PP1V5_S0_SB_VCCGLAN1_5
SYNC_MASTER=WFERRY
1
C2730
0.1UF
C2737
10%
16V
2 X5R
402
=PP3V3_S0MWOL_SB_VCCCL3_3
25A6 7C4
=PP3V3_S0_SB_VCC3_3_IDE
10UF
25C3 7C7
10%
16V
X5R 2
402
C2739
C2729
0.1UF
10%
2 16V
X5R
402
PLACEMENT NOTE:
PLACE CAP NEAR PIN B27..A26
C2736
4.7uF
20%
6.3V
2 CERM
603
22UF
20%
6.3V
2 CERM
805
SYNC_DATE=06/01/2006
SIZE
PLACEMENT NOTE:
PLACE CAPS NEAR PIN AD25 OF SB
D
APPLE INC.
DRAWING NUMBER
051-7455
SCALE
SHT
NONE
0.1UF
C2708
C2710
10%
2 16V
X5R
402
2 16V
X5R
20%
2 6.3V
X5R
603
10%
0.1UF
VOLTAGE=1.5V
MIN_LINE_WIDTH=0.5MM
MIN_NECK_WIDTH=0.25MM
1007
PLACEMENT NOTE:
PLACE CAPS < 2.54MM OF SB ON
SECONDARY SIDE OR 3.56MM ON PRIMARY
C2721
=PP3V3_S0_SB_VCC3_3_VCCPCORE
PLACEMENT NOTE:
PLACE CAP < 2.54MM OF SB ON SECONDARY
OR 3.56MM ON PRIMARY NEAR PIN AF29
C2723
10%
2 16V
X5R
402
0.1UF
25C3 7D4
=PP1V05_S0_SB_CPU_IO
=PP1V5_S0_SB_VCCUSBPLL
C2738
L2703
1/16W 5%
MF-LF 402
=PP3V3_S0_SB_VCC3_3_SATA
R2700
2.2uF
PLACEMENT NOTE:
PLACE C2715 NEAR PIN D1 OF SB
0.1UF
2 16V
X5R
4.7uF
C2732
25A6 7B7
PLACEMENT NOTE:
PLACE < 2.54MM OF SB ON SECONDARY
OR 3.56MM ON PRIMARY NEAR PIN AD2
C2714
C2720
C2733
20%
6.3V
2 CERM
603
PLACEMENT NOTE:
PLACE CAP NEAR PINS
AC10..AD7 OF SB
1UF
PLACEMENT NOTE:
PLACE CAP NEAR PINS
P6..R6
402
10%
2 6.3V
CERM
402
402
=PP1V5_S0_SB
C2719
PP1V5_S0_SB_VCCGLANPLL
PLACEMENT NOTE:
PLACE CAPS < 2.54MM OF SB ON SECONDARY
OR 3.56MM ON PRIMARY NEAR PIN A24
=PP3V3_S5_SB_VCCSUS3_3_USB
2 16V
X5R
PLACEMENT NOTE:
PLACE CAPS NEAR PIN C2..AH28
VOLTAGE=1.5V
MIN_LINE_WIDTH=0.5MM
MIN_NECK_WIDTH=0.25MM
25C3 7D4
25A3 7D1
=PP3V3R1V5_S0_SB_VCCHDA
0.1UF
M70 DOES NOT USE GIGABIT IN SB, SO NO NEED FOR PLL FILTERING
D
ICH USB/VCCSUS3_3 BYPASS
(ICH SUSPEND USB 3.3V PWR)
PLACEMENT NOTE:
PLACE NEAR PINS AC23,AC24 OF SB
10%
16V
2 X5R
402
0.1UF
20%
6.3V
2 CERM1
603
PLACEMENT NOTE:
PLACE C2700 & C2705-07 < 2.54MM OF SB
ON SECONDARY SIDE OR 3.56MM ON PRIMARY
DISTRIBUTED BETWEEN AA25..V23
C2734
0.1UF
10%
16V
2 X5R
402
0.1UF
VOLTAGE=1.5V
MIN_LINE_WIDTH=0.5MM
MIN_NECK_WIDTH=0.25MM
OMIT
CRITICAL NOSTUFF
0.1UF
PLACEMENT NOTE:
PLACE CAPS NEAR PINS
AC18..AH28
PLACEMENT NOTE:
PLACE < 2.54MM OF SB ON SECONDARY OR
3.56MM ON PRIMARY NEAR PIN AH11
PLACEMENT NOTE:
PLACE C2704 < 2.54MM OF PIN G4 OF SB
ON SECONDARY SIDE OR 3.56MM ON PRIMARY
C2731
PLACEHOLDER
FOR 270UF
16V
2 X5R
PLACEMENT NOTE:
PLACE < 2.54MM OF SB ON SECONDARY
OR 3.56MM ON PRIMARY NEAR PIN AC12
330UF
402
10%
2 16V
X5R
402
C2716
SOT-363
0.1UF
26A8 7B7
26D6
CRITICAL
1
=PP3V3_S0MWOL_SB_VCCLAN3_3
PLACEMENT NOTE:
PLACE CAP UNDER SB NEAR PINS
F19 AND G20
D2702
PP5V_S5_SB_V5REF_SUS
1
C2717
HN2S02JE
NC
10
C2735
10UF
=PP5V_S5_SB
2
7C1
=PP3V3_S5_SB_VCCSUS3_3
PP1V5_S0_SB_VCCSATAPLL
0805
7D7 25D3
VOLTAGE=1.5V
MIN_LINE_WIDTH=0.5MM
MIN_NECK_WIDTH=0.25MM
10UH-100MA
26C8 26A8 7B7
C2718
0.1UF
PLACEMENT NOTE:
PLACE C2703 < 2.54MM OF PIN A16..T7 OF SB
ON SECONDARY SIDE OR 3.56MM ON PRIMARY
OMIT
1UF
2 CERM
402
C2703
10%
2 16V
X5R
402
C2711
PLACEMENT NOTE:
PLACE < 2.54MM OF SB ON SECONDARY OR
3.56MM ON PRIMARY NEAR PINS AE7..AJ7
PLACEMENT NOTE:
PLACE CAPS AT EDGE OF SB
PP5V_S0_SB_V5REF
SOT-363
NC
100
R2702
26
OF
REV.
76
01
D2800
7B1
HN2S02JE
=PP3V42_G3H_SB_RTCSOT-363
1
5
2
PP3V3_G3C_SB_RTC_D PP3V3_G3_SB_RTC
MAKE_BASE=TRUE
NC
HN2S02JE
CRITICAL
PPVBATT_G3C_RTC
NC
22D8
5%
1/16W
MF-LF
402
R2806
1M
SB_RTC_RST_L
OUT
7D4
C2805
=PP3V3_S0_RSTBUF
CRITICAL
1
C2880
0.1UF
5 TC7SZ08AFEF
SOT665
U2880Y
B
R2880
100K
5%
1/16W
MF-LF
2402
20%
10V
CERM 2
402
518S0519
PLT_RST_BUF_L
TMDS_RST_L
68B5
AIRPORT_RST_L
33C3
5%
1/16W
MF-LF
402
Buffered
1UF
10%
SB_SM_INTRUDER_L
OUT
15B6
5%
1/16W
MF-LF
402
R2885
0
1
22D8
NB_RESET_L
5%
1/16W
MF-LF
402
R2887
0
2 6.3V
CERM
402
5%
1/16W
MF-LF
2 402
VOLTAGE=3V
MIN_LINE_WIDTH=0.3MM
1UF
10%
5%
1/16W
MF-LF
2402
1
2
VOLTAGE=3V
MIN_LINE_WIDTH=0.3MM
2 NC
R2807
1K
J2800
R2886
100
PLT_RST_L
MAKE_BASE=TRUE
C2810
R2800
20K
SOT-363
4
3
PPVBATT_G3C_RTC_R
78171-0002
M-RT-SM
3
NC
IN
2 6.3V
CERM
402
D2800
67C6 23A6
22D7 25D6 26A5
R2881
0
1
5%
1/16W
MF-LF
402
DEBUG_RESET_L
Linda Card represents 3 loads
6C2 46B6
R2883
100
1
SMC_LRESET_L
44C8
ENET_RESET_L
34B8
5%
1/16W
MF-LF
402
R2801
0
1
5%
1/16W
MF-LF
402
SB_RTC_X1
R2810
0
1
SB_RTC_X1_R
5%
1/16W
MF-LF
402
1
R2809
10M
5%
1/16W
MF-LF
4022
CRITICAL
1
Y2800
32.768K
7X1.5X1.4-SM
197S0219
7D1
=PP3V3_S5_SB_PM
1
R2897
10K
C2808
10PF
1
5%
50V
CERM
402
R2896
12B4 9C6
1K
2
XDP_DBRESET_L
IN
1 XDP_DBRESET_L_R
44B8
24D5
OMIT
5%
1/16W
MF-LF
402
C2809
10PF
5%
1/16W
MF-LF
4022
I59
R2898
100K
This part is never stuffed,
5%
1/16W
it provides a set of pads
MF-LF
4022
on the board to short or
to solder a reset button.
1
2
SB_RTC_X2
Change
Y2800 to 197S019 -7.0mmx1.5mmx1.4mm
5%
In CLOSE=12.5pF
50V
22D8
CERM
402
PM_SYSRST_LOUT
MAKE_BASE=TRUE
27B6 7D4
=PP3V3_S0_SB_PM
27B8 7D4
1
C2811
0.1UF
1
C2807
0.1UF
20%
10V
CERM 2
402
VCC
OUT
8B3
VR_PWRGD_CK505
4
U2803 A
SON
GND
1
R2803
100K
PM_SB_PWROK
VR_PWRGD_CK505_L
IN
R28121
MAKE_BASE=TRUE
R2802
10K
0 2
5%
CLINK_MPWROK1
1/16W
OUT
24C3
59C7
8B3 8B1
5%
1/16W
MF-LF
4022
5%
1/16W
MF-LF
402
OUT
5%
1/16W
MF-LF
2402
U28011
B
59C7 15B6
VR_PWRGOOD_DELAY
IN
ALL_SYS_PWRGD IN
MF-LF
402 2
CK410_PD_VTT_PWRGD_L
59C7
R2811
1.8K
TC7SZ08AFEF 5 CRITICAL
2
SOT665
A
YTC7SH00FEF
IMVP6_PSI_L
20%
10V
CERM 2
402
5 CRITICAL
CPU_PSI_L
9A2
=PP3V3_S0_SB_PM
SB Misc
SYNC_MASTER=NB
SYNC_DATE=07/26/2005
D
APPLE INC.
DRAWING NUMBER
051-7455
SCALE
SHT
NONE
27
OF
REV.
76
01
ORIGINAL DESIGN:
USE 155S0302 FOR L2902(R2906) AND L2903(R2907)
STUFF C2907,C2910,C2916,C2911,C2914
USE 2.2OHM FOR R2900,R2901 AND 1OHM FOR R2902
MIN_LINE_WIDTH=0.5mm
MIN_NECK_WIDTH=0.2mm
VOLTAGE=3.3V
C2909
0.1UF
10%
2 16V
X5R
402
R2901
R2906
5%
1/16W
MF-LF
402
NOSTUFF
C2910
10UF
5%
1/16W
MF-LF
402
20%
2 6.3V
X5R
603
=PP3V3_S0_CK505
NOSTUFF
1
C2911
1UF
10%
2 6.3V
CERM
402
D
L2901
FERR-120-OHM-1.5A
1
2
PP3V3_S0_CK505_VDD_CPU_SRC
=PP3V3_S0_CK505
MIN_LINE_WIDTH=0.5mm
MIN_NECK_WIDTH=0.2mm
VOLTAGE=3.3V
0402-LF
C2900
C2901
1UF
10UF
10%
6.3V
CERM 2
402
0.1UF
20%
6.3V 2
X5R
603
R2907
0
PP3V3_S0_CK505_VDDA_R
MIN_LINE_WIDTH=0.5mm
VOLTAGE=3.3V
MIN_NECK_WIDTH=0.2mm
PP3V3_S0_CK505_VDD_PCI
C2902
10%
2 16V
X5R
402
C2903
0.1UF
10%
2 16V
X5R
402
C2904
0.1UF
10%
2 16V
X5R
402
C2905
0.1UF
10%
2 16V
X5R
402
MIN_LINE_WIDTH=0.5mm
MIN_NECK_WIDTH=0.2mm
VOLTAGE=3.3V
C2906
C2912
0.1UF
0.1UF
10%
2 16V
X5R
402
10%
16V
2 X5R
402
C2913
0.1UF
10%
2 16V
X5R
402
R2900
0
C2914
10UF
20%
2 6.3V
X5R
603
R2902
PP3V3_S0_CK505_VDDA
VOLTAGE=3.3V
5% MIN_LINE_WIDTH=0.5mm
1/16W MIN_NECK_WIDTH=0.2mm
MF-LF
402
5%
1/16W
MF-LF
402
NOSTUFF
1
PP3V3_S0_CK505_VDD_REF
NOSTUFF
1
C2907
10UF
20%
2 6.3V
X5R
603
MIN_LINE_WIDTH=0.5mm
MIN_NECK_WIDTH=0.2mm
VOLTAGE=3.3V
1
C2908
0.1UF
C2915
0.1UF
10%
2 16V
X5R
402
10%
2 16V
X5R
402
NOSTUFF
1
C2916
10UF
5%
1/16W
MF-LF
402
20%
2 6.3V
X5R
603
18PF
5%
2 50V
CERM
402
C2990
CK505_XTAL_IN
CK505_XTAL_OUT
=PP3V3_S0_CK505
29B8
R2903(FW
10K
5%
1/16W
MF-LF
2 402
75D3 29B6
OUT
PCI 33MHZ)
(TPM LPC 33MHZ)
(SMC LPC 33MHZ)
(PCI SLOT)
(PORT80 LPC 33MHZ)
IN
BI
OUT
CK505_PCIF1_CLK
OUT
75D3 8C4
OUT
75D3 29A6
OUT
75D3 8C4
75D3 29B2
OUT
12
17
28
35
U2900
PCI_STOP*
CPU_STOP*
SLG2AP101
QFN
VDD_A
VSS_A
56
55
PM_STPPCI_L
PM_STPCPU_L
IN
24C8 29C2
IN
24C8 29C2
CK505_CPU0_N
CK505_CPU0_P
OUT
CPU_0
44
45
OUT
CPU_1_MCH*
CPU_1_MCH
41
42
CK505_CPU1_N
CK505_CPU1_P
OUT
OUT
CPU_ITP*/SRC_10*
FS_B/TEST_MODE
CPU_ITP/SRC_10
36
37
OUT
OUT
57 PCI_1
SRC_0*/LCD_CLK*
58 PCI_2
SRC_0/LCD_CLK
63 PCI_3
SRC_1*
64 PCI_4
SRC_1
65 PCI_5/FCT_SEL
(NO INT PD)
CLKREQ_1*
(INT
PU)
68 PCIF_0/ITP_EN
(NO INT PU)
SRC_2*
1
11
10
OUT
OUT
OUT
8C4
51
50
8
CK505_FSB_TEST_MODE
CK505_PCI1_CLK
CK505_PCI2_CLK
CK505_PCI3_CLK
CK505_PCI4_CLK
CK505_PCI5_FCTSEL1
75D3 29B6
CK505_PCIF0_CLK
(ICH8M PCI 33MHZ)
49
CRITICAL
38
39
61
67
18PF
5%
50V
2 CERM
402
VDD_SRC
C2989
VDD_REF
VDD_PCI
5X3.2-SM
VDD_CPU
VDD_48
14.31818
43
CRITICAL
Y2901
XTAL_IN
XTAL_OUT
CPU_0*
PCIF_1
SRC_2
14
13
9
16
15
CK505_CPU2_ITP_SRC10_N
CK505_CPU2_ITP_SRC10_P
CK505_LVDS_N
CK505_LVDS_P
TP_CK505_SRC1_N
TP_CK505_SRC1_P
CK505_SRC_CLKREQ1_L
CK505_SRC2_N
CK505_SRC2_P
OUT
8C4
IN
29C2
OUT
OUT
47D6
47D6
IN
BI
=SMBUS_CK505_SCL
=SMBUS_CK505_SDA
CK505_PGMODE
47
48
SCL
SDA
SRC_3*
SRC_3
CLKREQ_3*
(INT PU)
28A4
(INT PU)
SRC_4*
NOSTUFF
R2905
0 = VTT_PWRGD#/PD
1 = CKPWRGD/PD#
475
1%
1/16W
MF-LF
2 402
SRC_4
CLKREQ_4*
VSS_48
(INT PU)
46
VSS_CPU
62
66
VSS_PCI
SRC_5
52
VSS_REF
31
VSS_SRC
69
SRC_5*
CLKREQ_5*
(INT PU)
SRC_6*
SRC_6
CLKREQ_6*
(INT PU)
SRC_7*
SRC_7
THRM_PAD
CLKREQ_7*
SRC_8*
SRC_8
CLKREQ_8*
0
1
PIN 6
22
21
20
CK505_SRC4_N
CK505_SRC4_P
SB_CLK100M_SATA_OE_L
24
23
60
27
26
25
OUT
CK505_SRC5_N
CK505_SRC5_P
NB_CLKREQ_L
30
29
40
TP_CK505_SRC7_N
TP_CK505_SRC7_P
CK505_PGMODE
32
33
34
CK505_SRC8_N
CK505_SRC8_P
=ENET_CLKREQ_L
4
54
53
CK505_USB48_FSA
CK505_CLK14P3M_TIMER
CK505_REF1
DOT96C
27M
SPREAD
100MT_SST
SRCT0
IN
IN
33C5
OUT
8C4
OUT
8C4
28B5
CLK_PWRGD
27M NON
SPREAD
OUT
OUT
DOT96T
OUT
OUT
CKPWRGD/PD*
PIN 10
29C2
IN
CK505_DOT96_27M_N
CK505_DOT96_27M_P
PIN 7
8C4
IN
OUT
CK505_SRC6_N
CK505_SRC6_P
CK505_SRC_CLKREQ6_L
8C4
OUT
OUT
7
6
48M/FS_A
REF_0/FS_C/TEST_SEL
GPU_STOP*
FCTSEL1
TP_CK505_SRC3_N
TP_CK505_SRC3_P
CK505_SRC_CLKREQ3_L
DOT_96*/27M_SS
DOT_96/27M
(INT PD)
19
18
59
OUT
OUT
IN
OUT
OUT
IN
24C3
OUT
29D8 75D3
OUT
29D8 75D3
BI
(SLOT E )
(FROM ICH8M)
(ICH8M USB 48MHZ)
(ICH8M,SIO,LPC REF. 14.318MHZ)
Clock (CK505)
SYNC_MASTER=DSIMON
PIN 11
100MC_SST
SRCC0
SYNC_DATE=06/06/2006
D
APPLE INC.
DRAWING NUMBER
051-7455
SCALE
SHT
NONE
28
OF
REV.
76
01
IN
CK505_USB48_FSA
33
SB_CLK48M_USBCTLR
OUT
5%
1/16W
MF-LF
402
R3000
R3033
1
2.2K 2
CK505_FSA
75D3 28A4
IN
CK505_CLK14P3M_TIMER
SB_CLK14P3M_TIMER
OUT
CK505_CPU0_N
IN
CK505_CPU1_P
IN
CK505_CPU1_N
CK505_FSC
IN
IN
IN
R3080
1K
70B3 15C6
OUT
NB_BSEL<0>
1K
5%
1/16W
MF-LF
2 402
CK505_CPU2_ITP_SRC10_N
CK505_LVDS_P
R3082
CK505_FSA
1K
5%
1/16W
MF-LF
402
R30831
IN
CPU_BSEL<0>
IN
IN
CK505_SRC2_P
IN
CK505_SRC2_N
5%
1/16W
MF-LF
402 2
IN
CK505_SRC4_P
IN
CK505_SRC4_N
=PP1V25R1V05_S0_FSB_NB
IN
CK505_SRC5_P
IN
CK505_SRC5_N
1K
70B3 15C6
OUT
NB_BSEL<1>
R3085
1
1K
OUT
IN
IN
CK505_SRC6_P
CK505_SRC6_N
R3086
0
5%
1/16W
MF-LF
402
R3087
1K
CPU_BSEL<1>
IN
IN
CK505_SRC8_P
IN
CK505_SRC8_N
=PP1V25R1V05_S0_FSB_NB
IN
IN
CK505_DOT96_27M_P
70B3 15B6
OUT
NB_BSEL<2>
75B3 29D6
CK505_DOT96_27M_N
NOSTUFF
75D3 28B8
IN
CK505_PCIF0_CLK
IN
CK505_PCIF1_CLK
75D3 28B6
IN
CK505_PCI1_CLK
1K
5%
1/16W
MF-LF
402
CPU_BSEL<2>
IN
9A4 70B3
OUT
8B1 75B3
10K
PM_STPPCI_L
28C4 24C8
1/16W
10K
PM_STPCPU_L
23D2 75B3
OUT
22B6 75B3
OUT
NB_CLK100M_PCIE_P
OUT
PCIE_CLK100M_MINI_N
R3047
1
5%
402
5%
402
MF-LF
28B4
10K
CK505_SRC_CLKREQ1_L
1/16W
22B6 75B3
10K
CK505_SRC_CLKREQ3_L
1/16W
R3050
1
402
MF-LF
R3051
1
2
MF-LF
NOSTUFF
5%
PCIE_CLK100M_ENET_N
402
15C3 75B3
OUT
15C3 75B3
OUT
33C5 75B3
OUT
33C5 75A3
OUT
34C8
=PP3V3_S0_CK505
NOSTUFF
34C8
R3067
10K
5%
1/16W
MF-LF
2 402
NB_CLK96M_DOT_P
R3025
33
33
OUT
NB_CLK96M_DOT_N
OUT
IN
CK505_PCI3_CLK
33
OUT
6C2
46C4 75C3
PCI_CLK33M_SB
OUT
23A6
29A5 75B3
PCI_CLK33M_FW
OUT
29A5
37A5 75B3
PCI_CLK33M_SMC
OUT
29A5
44C8 75B3
5%
1/16W
MF-LF
2 402
Clock Termination
SYNC_MASTER=DSIMON-WF
1
NOSTUFF
NOSTUFF
NOSTUFF
NOSTUFF
NOSTUFF
0.25%
2 50V
CERM
402
3.3PF
0.25%
2 50V
CERM
402
3.3PF
0.25%
2 50V
CERM
402
3.3PF
0.25%
2 50V
CERM
402
SYNC_DATE=06/06/2006
3.3PF
0.25%
2 50V
CERM
402
D
APPLE INC.
DRAWING NUMBER
051-7455
SCALE
SHT
NONE
10K
PCI_CLK33M_SMC
PCI_CLK33M_SB
SB_CLK48M_USBCTLR
SB_CLK14P3M_TIMER
PCI_CLK33M_FW
CK505_PCI5_FCTSEL1
PCI_CLK33M_LPCPLUS
5%
1/16W
MF-LF
402
BI
R3066
R3027
33
75D3 28B6
8B1 75B3
5%
1/16W
MF-LF
402
8B1 75B3
5%
1/16W
MF-LF
402
NOSTUFF
5%
PCIE_CLK100M_ENET_P
R3023
1
2
MF-LF
NB_CLK100M_PCIE_N
PCIE_CLK100M_MINI_P
5%
1/16W
MF-LF
402
1/16W
SB_CLK100M_SATA_N
R3019
0
R3046
23C2 75B3
28B4
=PP3V3_S0_CK505
8A1 75B3
OUT
R3030
75D3 28B6
12B3
5%
1/16W
MF-LF
402
5%
1/16W
MF-LF
402 2
R3090
R3091
5%
1/16W
MF-LF
402
R3028
OUT
SB_CLK100M_DMI_N
R3017
5%
1/16W
MF-LF
402
CK505_FSC
(ICH8M 14.318MHZ)
R3026
5%
1/16W
MF-LF
2 402
5%
1/16W
MF-LF
402
5%
1/16W
MF-LF
402
5%
1/16W
MF-LF
402
1K
1K
R3088
R3089
CLKREQ Controls
R3024
75D3 28A4 6C7
12B3
5%
1/16W
MF-LF
402
5%
1/16W
MF-LF
402 2
OUT
OUT
R3015
5%
1/16W
MF-LF
402
9A4 70B3
5%
1/16W
MF-LF
402
13B3 75C3
OUT
SB_CLK100M_SATA_P
R3022
CK505_FSB_TEST_MODE
NOSTUFF
5%
1/16W
MF-LF
402
28C6
5%
1/16W
MF-LF
2 402
OUT
5%
1/16W
MF-LF
402
R3018
R3084
28C4 24C8
5%
1/16W
MF-LF
402
NB_CLK100M_DPLLSS_N
R3011
1
5%
1/16W
MF-LF
402
13B3 75C3
SB_CLK100M_DMI_P
R3016
75C3 28B4 6C7
NB_CLK100M_DPLLSS_P
5%
1/16W
MF-LF
402
OUT
5%
1/16W
MF-LF
402
R3014
75C3 28B4 6C7
CPU_XDP_CLK_N
9B6 75C3
R3007
9B4 70B3
CPU_XDP_CLK_P
5%
1/16W
MF-LF
402
OUT
FSB_CLK_NB_N
R3005
5%
1/16W
MF-LF
402
5%
1/16W
MF-LF
402
CK505_LVDS_N
FSB_CLK_NB_P
R3003
1
R3010
5%
1/16W
MF-LF
402
75B3 29D6
9B6 75C3
FSB_CLK_CPU_N
5%
1/16W
MF-LF
402
5%
1/16W
MF-LF
402
5%
1/16W
MF-LF
402
CK505_CPU2_ITP_SRC10_P
OUT
R3001
R3006
=PP1V25R1V05_S0_FSB_NB
NOSTUFF
R3081
29A8 75B3
5%
1/16W
MF-LF
402
FSB_CLK_CPU_P
5%
1/16W
MF-LF
402
R3004
R3035
10K
IN
5%
1/16W
MF-LF
402
CK505_CPU0_P
R3002
R3034
33
IN
29C8 75B3
5%
1/16W
MF-LF
402
CLK Termination
R3032
75D3 28A4
29
OF
REV.
76
01
7
31D6 31D4 31B2 30D4 30B2 7B4
30D1
=PP1V8_S3_MEM
MEM_VREF_A
1
C3120 1 C3100
2.2UF
20%
2 4V
X5R
402
0.1UF
20%
2 10V
CERM
402
72D3
MEM_A_DQS_N<0>
16C5 MEM_A_DQS_P<0>
72C3 16C5
72C3
72D3
72D3
MEM_A_DQ<3>
16D8 MEM_A_DQ<7>
72D3 16D8
72D3
72D3
16D8 MEM_A_DQ<1>
16D8 MEM_A_DQ<2>
16C8 MEM_A_DQ<8>
16C8 MEM_A_DQ<13>
72C3 16C5
72C3 16C5
MEM_A_DQS_N<1>
MEM_A_DQS_P<1>
MEM_A_DQ<9>
16C8 MEM_A_DQ<10>
72D3 16C8
72D3
MEM_A_DQ<24>
16C8 MEM_A_DQ<25>
72D3 16C8
72D3
72C3
72C3
16C5 MEM_A_DQS_N<3>
16C5 MEM_A_DQS_P<3>
72D3 16C8
72D3 16C8
72D3 16C8
72D3 16C8
72C3 16C5
MEM_A_DQ<31>
MEM_A_DQ<27>
MEM_A_DQ<23>
MEM_A_DQ<19>
MEM_A_DM<2>
NC
72D3 16C8
72D3 16C8
MEM_A_DQ<18>
MEM_A_DQ<21>
MEM_CKE<0>
MEM_A_BS<2>
NC
MEM_A_A<12>
MEM_A_A<9>
MEM_A_A<8>
MEM_A_A<5>
16B5 MEM_A_A<3>
16C5 MEM_A_A<1>
MEM_A_A<10>
16D5 MEM_A_BS<0>
16B5 MEM_A_WE_L
MEM_A_CAS_L
15D3 MEM_CS_L<1>
72D3 16B8
72D3 16B8
72C3 16C5
72C3 16C5
MEM_ODT<1>
MEM_A_DQ<38>
MEM_A_DQ<39>
MEM_A_DQS_N<4>
MEM_A_DQS_P<4>
MEM_A_DQ<36>
16C8 MEM_A_DQ<33>
72D3 16B8
72D3
MEM_A_DQ<41>
16B8 MEM_A_DQ<42>
72D3 16B8
72D3
72C3 16C5
72D3
72D3
72D3
72D3
MEM_A_DM<5>
16B8 MEM_A_DQ<43>
16B8 MEM_A_DQ<46>
16B8 MEM_A_DQ<56>
16B8 MEM_A_DQ<57>
NC
MEM_A_DQS_N<7>
16C5 MEM_A_DQS_P<7>
72C3 16C5
72C3
MEM_A_DQ<59>
16A8 MEM_A_DQ<63>
72D3 16B8
72D3
MEM_A_DQ<52>
16B8 MEM_A_DQ<49>
72D3 16B8
72D3
72C3 16C5
72D3 16B8
72D3 16B8
=PPSPD_S0_MEM
1
1 C3121
C3122
2.2UF
0.1UF
20%
2 4V
X5R
402
20%
2 10V
CERM
402
MEM_A_DM<6>
MEM_A_DQ<51>
MEM_A_DQ<55>
=I2C_SODIMMA_SDA
47D6 =I2C_SODIMMA_SCL
47D6
41
43
45
47
49
51
53
55
57
59
61
63
65
67
69
71
73
75
77
79
81
83
85
87
89
91
93
95
97
99
101
103
105
107
109
111
113
115
117
119
121
123
125
127
129
131
133
135
137
139
141
143
145
147
149
151
153
155
157
159
161
163
165
167
169
171
173
175
177
179
181
183
185
187
189
191
193
195
197
199
VSS1
DQ0
DQ1
CRITICAL VSS0
J3101 DQ4
DQ5
F-RT-TH3
VSS4
DQS0*
DQS0
VSS6
DQ2
DQ3
VSS8
DQ8
DQ9
VSS10
DQS1*
DQS1
DM0
VSS5
DQ6
DQ7
VSS7
DQ12
DQ13
VSS9
DM1
VSS11
CK0
CK0*
VSS13
DQ14
DQ15
VSS14
VSS15
KEY
VSS16
VSS17
DQ16
DQ17
VSS18
DQ20
DQ21
VSS19
DQS2*
DQS2
NC0
DM2
VSS21
DQ18
DQ19
VSS22
DQ22
DQ23
VSS23
DQ24
VSS24
DQ28
DQ25
VSS25
DM3
DQ29
VSS26
DQS3*
NC1
VSS27
DQS3
VSS28
DQ26
DQ27
VSS29
DQ30
DQ31
VSS30
CKE0
VDD0
NC2
NC/CKE1
VDD1
NC/A15
BA2
VDD2
NC/A14
VDD3
A11
A7
A6
VDD4
A5
VDD5
A4
A3
A1
VDD6
A2
A0
VDD7
A10/AP
BA0
BA1
RAS*
WE*
VDD8
CAS*
S0*
VDD9
ODT0
NC/S1*
VDD10
NC/ODT1
NC/A13
VDD11
NC3
VSS31
DQ32
VSS32
DQ36
DQ33
VSS33
DQS4*
DQ37
VSS34
DM4
DQS4
VSS36
VSS35
DQ38
DQ34
DQ35
VSS38
DQ39
VSS37
DQ44
DQ40
DQ41
DQ45
VSS39
VSS40
DM5
VSS41
DQS5*
DQS5
VSS42
DQ42
DQ43
VSS43
DQ46
DQ47
VSS44
DQ48
DQ49
DQ52
DQ53
VSS45
NC_TEST
VSS47
VSS46
CK1
CK1*
DQS6*
DQS6
VSS48
DM6
VSS49
DQ50
DQ51
VSS50
DQ54
DQ55
VSS51
DQ56
VSS52
DQ60
DQ57
VSS53
DM7
DQ61
VSS54
DQS7*
VSS55
DQ58
DQ59
DQS7
VSS56
DQ62
VSS57
SDA
DQ63
VSS58
SCL
VDDSPD
516-0135
VSS2
VSS12
DQ10
DQ11
A12
A9
A8
=PP1V8_S3_MEM
SA0
SA1
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
202=GND_CHASSIS_DIPDIMM_LEFT
16D8 72D3
16D5 72C3
MEM_A_DQ<0>
MEM_A_DQ<6>
16D8 72D3
MEM_A_DQ<12>
MEM_A_DQ<14>
MEM_A_DM<1>
MEM_CLK_P<0>
MEM_CLK_N<0>
MEM_A_DQ<11>
MEM_A_DQ<15>
MEM_A_DQ<29>
MEM_A_DQ<28>
16D8 72D3
31D2 20C8 17D7 15D2 7A4
R3100
1K
16C8 72D3
MEM_VREF_A
15D3 72D3
R3101
1K
16C8 72D3
1%
1/16W
MF-LF
2 402
16C8 72D3
16C8 72D3
16C8 72D3
16C5 72C3
16C8 72D3
16C8 72D3
Page Notes
16C8 72D3
16C8 72D3
MEM_A_DQS_N<2>
MEM_A_DQS_P<2>
16C5 72C3
MEM_A_DQ<20>
MEM_A_DQ<17>
16C8 72D3
MEM_CKE<1>
MEM_A_A<4>
MEM_A_A<2>
MEM_A_A<0>
MEM_A_BS<1>
MEM_A_RAS_L
MEM_CS_L<0>
MEM_ODT<0>
MEM_A_A<13>
16C5 72C3
16C8 72D3
MEM_A_DM<4>
MEM_A_DQ<32>
MEM_A_DQ<35>
MEM_A_DQ<44>
MEM_A_DQ<40>
MEM_A_DQS_N<5>
MEM_A_DQS_P<5>
MEM_A_DQ<47>
MEM_A_DQ<45>
MEM_A_DQ<60>
MEM_A_DQ<61>
8B4
15C6 32C6 72D3
=PP1V8_S3_MEM
C3109
4.7uF
20%
2 6.3V
CERM
603
C3110
20%
10V
2 CERM
402
0.1UF
20%
10V
2 CERM
402
C3114
16C5 72C3
0.1UF
20%
2 10V
CERM
402
16C8 72D3
16B8 72D3
16B8 72D3
C3115
0.1UF
20%
6.3V
2 CERM
402-LF
16C5 72C3
0.1UF
C3113
0.1UF
20%
10V
2 CERM
402
C3116
2.2UF
C3117
2.2UF
20%
6.3V
2 CERM
402-LF
C3131
2.2UF
20%
6.3V
2 CERM
402-LF
20%
6.3V
2 CERM
402-LF
C3132
2.2UF
20%
6.3V
2 CERM
402-LF
16B8 72D3
16B8 72D3
16A8 72D3
16A8 72D3
16C5 72C3
16B8 72D3
15D3 72D3
16A8 72D3
30A4
MEM_A_SA0
R3102
10K
1
5%
1/16W
MF-LF
402
16B8 72D3
16B8 72D3
16C5 72C3
30A4
MEM_A_SA1
SYNC_MASTER=MEMORY
R3103
10K
1
5%
1/16W
MF-LF
402
16C5 72C3
16B8 72D3
SYNC_DATE=06/20/2005
16B8 72D3
SIZE
8D8
C3112
20%
10V
2 CERM
402
20%
2 10V
CERM
402
C3130
2.2UF
16C5 72C3
MEM_A_DQ<62>
MEM_A_DQ<58>
MEM_A_SA0
MEM_A_SA1
16B8 72D3
MEM_A_DM<7>
MEM_A_DQ<50>
MEM_A_DQ<54>
C3111
16B8 72D3
15D3 72D3
MEM_A_DQS_N<6>
MEM_A_DQS_P<6>
16B8 72D3
MEM_CLK_P<1>
MEM_CLK_N<1>
MEM_A_DQ<48>
MEM_A_DQ<53>
0.1UF
MEM_A_DQ<37>
MEM_A_DQ<34>
30D7
VOLTAGE=0.9V
MIN_LINE_WIDTH=0.25 mm
MIN_NECK_WIDTH=0.25 mm
1
15D3 72D3
8B1
MEM_A_A<11>
MEM_A_A<7>
MEM_A_A<6>
1%
1/16W
MF-LF
2 402
16D5 72C3
MEM_A_DM<3>
MEM_A_A<15>
MEM_A_A<14>
=PP1V8_S3M_MEM_NB
16C8 72D3
DIMM_OVERTEMPA_L
MEM_A_DQ<16>
MEM_A_DQ<22>
DDR2 VRef
16D8 72D3
MEM_A_DM<0>
MEM_A_DQ<26>
MEM_A_DQ<30>
MEM_A_DQ<4>
MEM_A_DQ<5>
42
44
46
48
50
52
54
56
58
60
62
64
66
68
70
72
74
76
78
80
82
84 NC
86 NC
88
90
92
94
96
98
100
102
104
106
108
110
112
114
116
118
120 NC
122
124
126
128
130
132
134
136
138
140
142
144
146
148
150
152
154
156
158
160
162
164
166
168
170
172
174
176
178
180
182
184
186
188
190
192
194
196
198
200
5
=GND_CHASSIS_DIPDIMM_CENTER
OMIT
VREF
DDR2-SODIMM-STD
30A4
30A4
APPLE INC.
051-7455
SCALE
SHT
NONE
ADDR=0xA0(WR)/0xA1(RD)
DRAWING NUMBER
30
OF
REV.
76
01
31D1
=PP1V8_S3_MEM
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
MEM_VREF_B
1
1 C3200
C3220
2.2UF
0.1UF
20%
2 4V
X5R
402
20%
2 10V
CERM
402
MEM_B_DQ<1>
16D4 MEM_B_DQ<4>
72B3 16D4
72B3
72A3 16C1
72A3 16C1
MEM_B_DQS_N<0>
MEM_B_DQS_P<0>
MEM_B_DQ<7>
16D4 MEM_B_DQ<3>
72B3 16D4
72B3
72B3 16C4
72B3 16C4
72A3 16C1
72A3 16C1
MEM_B_DQ<13>
MEM_B_DQ<12>
MEM_B_DQS_N<1>
MEM_B_DQS_P<1>
MEM_B_DQ<10>
16C4 MEM_B_DQ<8>
72B3 16C4
72B3
MEM_B_DQ<17>
16C4 MEM_B_DQ<20>
72B3 16C4
72B3
72A3 16C1
72A3 16C1
72B3 16C4
72B3 16C4
MEM_B_DQS_N<2>
MEM_B_DQS_P<2>
MEM_B_DQ<22>
MEM_B_DQ<18>
72B3 16C4
MEM_B_DQ<29>
MEM_B_DQ<27>
72B3 16C1
MEM_B_DM<3>
72B3 16C4
NC
72B3 16C4
72B3 16C4
MEM_B_DQ<30>
MEM_B_DQ<31>
MEM_CKE<3>
NC
72B3 32A5
72B3 32B5
72B3 32B5
MEM_B_BS<2>
16B1 MEM_B_A<12>
16B1 MEM_B_A<9>
16B1 MEM_B_A<8>
MEM_B_A<5>
MEM_B_A<3>
16C1 MEM_B_A<1>
MEM_B_A<10>
16D1 MEM_B_BS<0>
16B1 MEM_B_WE_L
72B3 16B4
72B3 16C4
MEM_B_CAS_L
MEM_CS_L<3>
MEM_ODT<3>
MEM_B_DQ<38>
MEM_B_DQ<32>
MEM_B_DQS_N<4>
16C1 MEM_B_DQS_P<4>
72A3 16C1
72A3
MEM_B_DQ<39>
16B4 MEM_B_DQ<35>
72B3 16B4
72B3
72B3 16B4
72B3 16B4
72B3 16C1
MEM_B_DQ<47>
MEM_B_DQ<45>
MEM_B_DM<5>
MEM_B_DQ<44>
16B4 MEM_B_DQ<40>
72B3 16B4
72B3
MEM_B_DQ<48>
16B4 MEM_B_DQ<52>
72B3 16B4
72B3
NC
MEM_B_DQS_N<6>
16C1 MEM_B_DQS_P<6>
72A3 16C1
72A3
MEM_B_DQ<50>
16B4 MEM_B_DQ<55>
72B3 16B4
72B3
72B3 16B4
MEM_B_DQ<56>
MEM_B_DQ<57>
72A3 16C1
MEM_B_DM<7>
72B3 16B4
=PPSPD_S0_MEM
72B3 16A4
1 C3221
C3222
2.2UF
0.1UF
20%
2 4V
X5R
402
20%
2 10V
CERM
402
72B3 16A4
MEM_B_DQ<61>
MEM_B_DQ<63>
=I2C_SODIMMB_SDA
47C6 =I2C_SODIMMB_SCL
47C6
41
43
45
47
49
51
53
55
57
59
61
63
65
67
69
71
73
75
77
79
81
83
85
87
89
91
93
95
97
99
101
103
105
107
109
111
113
115
117
119
121
123
125
127
129
131
133
135
137
139
141
143
145
147
149
151
153
155
157
159
161
163
165
167
169
171
173
175
177
179
181
183
185
187
189
191
193
195
197
199
OMIT
VREF
VSS1
DQ0
CRITICAL VSS0
J3201
DQ1
F-RT-TH3
VSS4
DQS0*
DQS0
VSS6
DQ2
DQ3
VSS8
DQ8
DQ9
VSS10
DQS1*
DQS1
DQ4
DQ5
VSS2
DM0
VSS5
DQ6
DQ7
VSS7
DQ12
DQ13
VSS9
DM1
VSS11
CK0
CK0*
VSS12
VSS13
DQ10
DQ14
DQ11
DQ15
VSS14
VSS15
KEY
VSS16
VSS17
DQ16
DQ20
DQ17
DQ21
VSS18
VSS19
DQS2*
NC0
DQS2
DM2
VSS21
VSS22
DQ18
DQ22
DQ19
DQ23
VSS23
VSS24
DQ24
DQ28
DQ25
DQ29
VSS25
VSS26
DM3
DQS3*
NC1
DQS3
VSS27
VSS28
DQ26
DQ30
DQ27
DQ31
VSS29
VSS30
CKE0
NC/CKE1
VDD0
VDD1
NC2
NC/A15
BA2
NC/A14
VDD2
VDD3
A12
A11
A9
A7
A8
A6
VDD4
VDD5
A5
A4
A3
A2
A1
A0
VDD6
VDD7
A10/AP
BA0
BA1
RAS*
WE*
S0*
VDD8
VDD9
CAS*
ODT0
NC/S1*
VDD10
NC/A13
VDD11
NC/ODT1
VSS31
NC3
VSS32
DQ32
DQ36
DQ33
DQ37
VSS33
VSS34
DQS4*
DM4
DQS4
VSS35
VSS36
DQ38
DQ34
DQ39
DQ35
VSS37
VSS38
DQ44
DQ40
DQ45
DQ41
VSS39
VSS40
DQS5*
DM5
DQS5
VSS41
VSS42
DQ42
DQ46
DQ43
DQ47
VSS43
VSS44
DQ48
DQ52
DQ49
DQ53
VSS45
VSS46
NC_TEST
CK1
VSS47
CK1*
DQS6*
VSS48
DQS6
DM6
VSS49
VSS50
DQ50
DQ54
DQ51
DQ55
VSS51
VSS52
DQ56
DQ60
DQ57
DQ61
VSS53
VSS54
DM7
DQS7*
VSS55
DQS7
DQ58
VSS56
DQ59
DQ62
VSS57
DQ63
SDA
VSS58
SCL
SA0
VDDSPD
SA1
516-0135
=GND_CHASSIS_DIPDIMM_RIGHT
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
54
56
58
60
62
64
66
68
70
72
74
76
78
80
82
84 NC
86 NC
88
90
92
94
96
98
100
102
104
106
108
110
112
114
116
118
120 NC
122
124
126
128
130
132
134
136
138
140
142
144
146
148
150
152
154
156
158
160
162
164
166
168
170
172
174
176
178
180
182
184
186
188
190
192
194
196
198
200
202=GND_CHASSIS_DIPDIMM_CENTER
=PP1V8_S3_MEM
5
DIP DIMM CONN201
DDR2-SODIMM-STD
MEM_B_DQ<5>
MEM_B_DQ<0>
16D4 72B3
16D4 72B3
MEM_B_DM<0>
16D1 72B3
=PP1V8_S3M_MEM_NB
MEM_B_DQ<6>
MEM_B_DQ<2>
16D4 72B3
R3201
16D4 72B3
MEM_B_DQ<15>
MEM_B_DQ<11>
1K
1%
1/16W
MF-LF
2 402
16C4 72B3
16C4 72B3
MEM_VREF_B
MEM_B_DM<1>
MEM_CLK_P<3>
MEM_CLK_N<3>
MEM_B_DQ<9>
MEM_B_DQ<14>
MEM_B_DQ<21>
MEM_B_DQ<16>
DIMM_OVERTEMPB_L
16C4 72B3
16C4 72B3
16C4 72B3
8B1
16C4 72B3
MEM_CKE<4>
1%
1/16W
MF-LF
2 402
16C4 72B3
MEM_B_DQ<23>
MEM_B_DQ<19>
MEM_B_DQ<24>
MEM_B_DQ<26>
1K
15D3 72B3
16C1 72B3
MEM_B_DQS_N<3>
MEM_B_DQS_P<3>
R3202
15D3 72B3
MEM_B_DM<2>
MEM_B_DQ<25>
MEM_B_DQ<28>
Page Notes
16C4 72B3
16C4 72B3
16C4 72B3
16C1 72A3
16C1 72A3
16C4 72B3
8B4
15C6 32A5 72B3
MEM_B_A<11>
MEM_B_A<7>
MEM_B_A<6>
MEM_B_A<4>
MEM_B_A<2>
MEM_B_A<0>
16C4 72B3
MEM_B_A<15>
MEM_B_A<14>
31D7
VOLTAGE=0.9V
MIN_LINE_WIDTH=0.25 mm
MIN_NECK_WIDTH=0.25 mm
1
16D1 72B3
=PP1V8_S3_MEM
MEM_B_BS<1>
MEM_B_RAS_L
MEM_CS_L<2>
C3209
4.7uF
20%
6.3V
2 CERM
603
MEM_ODT<2>
MEM_B_A<13>
C3210
20%
MEM_B_DQ<43>
MEM_B_DQ<42>
MEM_B_DQS_N<5>
MEM_B_DQS_P<5>
MEM_B_DQ<41>
MEM_B_DQ<46>
MEM_B_DQ<53>
MEM_B_DQ<49>
MEM_CLK_P<4>
MEM_CLK_N<4>
MEM_B_DM<6>
C3212
20%
20%
2 10V
CERM
402
0.1UF
402
C3213
0.1UF
2 10V
CERM
402
16B4 72B3
16B4 72B3
C3214
16C1 72B3
MEM_B_DQ<34>
MEM_B_DQ<33>
0.1UF
2 10V
CERM
402
MEM_B_DM<4>
C3211
20%
2 10V
CERM
MEM_B_DQ<36>
MEM_B_DQ<37>
0.1UF
0.1UF
20%
2 10V
CERM
402
16B4 72B3
16C4 72B3
C3215
0.1UF
20%
2 10V
CERM
402
C3216
2.2UF
C3217
2.2UF
20%
2 6.3V
CERM
402-LF
20%
2 6.3V
CERM
402-LF
16B4 72B3
C3230
16B4 72B3
16C1 72A3
2 6.3V
CERM
2.2UF
20%
402-LF
16C1 72A3
C3231
2.2UF
20%
C3232
2.2UF
20%
2 6.3V
CERM
2 6.3V
CERM
402-LF
402-LF
16B4 72B3
16B4 72B3
16B4 72B3
16B4 72B3
15D3 72B3
15D3 72B3
16C1 72A3
MEM_B_DQ<51>
MEM_B_DQ<54>
MEM_B_DQ<60>
MEM_B_DQ<62>
MEM_B_DQS_N<7>
MEM_B_DQS_P<7>
MEM_B_DQ<58>
MEM_B_DQ<59>
MEM_B_SA0
J3201_SA1
16B4 72B3
31A4
16B4 72B3
MEM_B_SA0
R3203
10K
1
5%
1/16W
MF-LF
402
16A4 72B3
SYNC_MASTER=MEMORY
16C1 72A3
=PPSPD_S0_MEM
16C1 72A3
R3200
1
16B4 72B3
16B4 72B3
31A3
10K
5%
1/16W
MF-LF
2 402
SIZE
D
APPLE INC.
ADDR=0xA4(WR)/0xA5(RD)
SYNC_DATE=06/20/2005
16A4 72B3
DRAWING NUMBER
SCALE
SHT
NONE
REV.
051-7455
31
OF
76
01
One cap for each side of every RPAK, one cap for every two discrete resistors
BOMOPTION shown at the top of each group applies to every part below it
7D7
IN
MEM_CS_L<3..0>
0
IN
MEM_CKE<0>
MEM_CKE<1>
MEM_CKE<3>
MEM_CKE<4>
IN
MEM_ODT<3..0>
IN
IN
IN
0
1
2
3
IN
MEM_A_A<14..0>
0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
IN
MEM_A_BS<2..0>
0
1
2
=PP0V9_S3M_MEM_TERM
RP3300
R3301
RP3301
RP3302
56
56
56
56
3
1
2
4
6
2
7
5
RP3303
RP3304
RP3305
R3327
56 1
56 1
56 1
56 1
8
8
8
RP3300
R3309
RP3301
R3311
56
56
56
56
1
3
2
6
5% 1/16W SM-LF
5% 1/16WMF-LF402
5% 1/16W SM-LF
5% 1/16WMF-LF402
RP3307
RP3308
RP3307
RP3308
RP3307
RP3308
RP3307
RP3304
RP3308
RP3303
RP3309
RP3304
RP3303
R3325
RP3304
56
56
56
56
56
56
56
56
56
56
56
56
56
56
56
4
4
3
3
2
2
1
4
1
4
1
3
3
5
5
6
6
7
7
8
5
8
5
8
6
6
1
2
2
7
RP3309
RP3300
RP3303
56
56
56
2
1
2
7
8
7
5%
5%
5%
5%
1/16W SM-LF
1/16WMF-LF402
1/16W SM-LF
1/16W SM-LF
5%
5%
5%
5%
1/16W SM-LF
1/16W SM-LF
1/16W SM-LF
1/16W MF-LF402
0.1UF
20%
10V
2 CERM
402
1/16W SM-LF
1/16W SM-LF
1/16W SM-LF
1/16W SM-LF
1/16W SM-LF
1/16W SM-LF
1/16W SM-LF
1/16W SM-LF
1/16W SM-LF
1/16W SM-LF
1/16W SM-LF
1/16W SM-LF
1/16WSM-LF
1/16WMF-LF402
1/16W SM-LF
5% 1/16W SM-LF
5% 1/16W SM-LF
5% 1/16W SM-LF
C3302
0.1UF
20%
10V
2 CERM
402
C3304
0.1UF
20%
10V
2 CERM
402
5%
5%
5%
5%
5%
5%
5%
5%
5%
5%
5%
5%
5%
5%
5%
C3300
C3306
0.1UF
20%
2 10V
CERM
402
C3308
0.1UF
20%
10V
2 CERM
402
C3310
0.1UF
20%
2 10V
CERM
402
C3312
0.1UF
20%
2 10V
CERM
402
72D3 30B4 16B5
IN
IN
IN
RP3300
RP3309
RP3309
MEM_A_RAS_L
MEM_A_CAS_L
MEM_A_WE_L
56
56
56
2
4
3
7
5
6
5% 1/16W SM-LF
5% 1/16W SM-LF
5% 1/16W SM-LF
C3314
0.1UF
20%
2 10V
CERM
402
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
MEM_B_A<0>
MEM_B_A<3>
MEM_B_A<2>
MEM_B_A<10>
MEM_B_A<4>
MEM_B_A<5>
MEM_B_A<6>
MEM_B_A<7>
MEM_B_A<8>
MEM_B_A<9>
MEM_B_A<1>
MEM_B_A<11>
MEM_B_A<12>
MEM_B_A<13>
MEM_B_A<14>
MEM_B_BS<2..0>
0
1
2
IN
IN
IN
MEM_B_RAS_L
MEM_B_CAS_L
MEM_B_WE_L
RP3311
RP3310
RP3311
R3335
RP3311
RP3310
RP3306
RP3306
RP3310
RP3305
RP3310
RP3306
RP3305
RP3301
RP3306
56 3
56 3
56 2
56 1
56 1
56 2
56 4
56 3
56 1
56 4
56 4
56 2
56 3
56 4
56 1
6
6
7
2
8
7
5
6
8
5
5
7
6
5
8
RP3302
RP3311
RP3305
56
56
56
1
4
2
8
5
7
RP3301
RP3302
RP3302
56
56
56
1
2
3
8
7
6
C3316
0.1UF
5%
5%
5%
5%
5%
5%
5%
5%
5%
5%
5%
5%
5%
5%
5%
1/16W SM-LF
1/16W SM-LF
1/16W SM-LF
1/16WMF-LF402
1/16W SM-LF
1/16W SM-LF
1/16W SM-LF
1/16W SM-LF
1/16W SM-LF
1/16W SM-LF
1/16W SM-LF
1/16W SM-LF
1/16WSM-LF
1/16W SM-LF
1/16WSM-LF
5% 1/16W SM-LF
5% 1/16WSM-LF
5% 1/16W SM-LF
20%
10V
2 CERM
402
C3318
0.1UF
20%
10V
2 CERM
402
C3320
0.1UF
20%
10V
2 CERM
402
C3322
0.1UF
20%
2 10V
CERM
402
C3301
0.1UF
20%
10V
2 CERM
402
C3303
0.1UF
20%
10V
2 CERM
402
C3305
0.1UF
20%
10V
2 CERM
402
C3307
0.1UF
20%
10V
2 CERM
402
C3309
0.1UF
20%
10V
2 CERM
402
LAYOUT NOTE:PLACE ONE CAP CLOSE TO EVERY TWO PULLUP RESISTORS TERMINATED
TO PP0V9_S0_MEM_TERM
C3311
0.1UF
20%
2 10V
CERM
402
C3313
0.1UF
20%
2 10V
CERM
402
C3315
0.1UF
20%
2 10V
CERM
402
C3317
0.1UF
20%
10V
2 CERM
402
C3319
0.1UF
20%
10V
2 CERM
402
C3321
0.1UF
20%
10V
2 CERM
402
C3323
0.1UF
20%
2 10V
CERM
402
C3324
0.1UF
20%
10V
2 CERM
402
C3325
0.1UF
20%
10V
2 CERM
402
D
APPLE INC.
DRAWING NUMBER
051-7455
SCALE
SHT
NONE
32
OF
REV.
76
01
CRITICAL
Q3401
FDC638P
SM-LF
=PP3V3_S5_AIRPORT_AUX
5%
1/16W
MF-LF
402
R3405
10K
PM_WLAN_EN_L
Q3402
D 6
2 G
S 1
SSM6N15FE
SOT563
Q3402
D 3
5 G
S 4
C3411
0.033UF3
10%
2 16V
X5R
402
PP3V3_S3_AP_AUX
C34081 C3407
0.1UF
0.1UF
20%
10V
2 CERM
402
20%
10V
2 CERM
402
MIN_LINE_WIDTH=0.2MM
MIN_NECK_WIDTH=0.2MM
VOLTAGE=3.3V
C3412
5%
1/16W
MF-LF
402
C3404
0.1UF
20%
10V
2 CERM
402
NOSTUFF
PM_WLAN_EN_L_SS
=PP1V5_S0_AIRPORT
1
C3405
0.1UF
20%
10V
2 CERM
402
7B7
C3406
0.1UF
20%
10V
2 CERM
402
R3404
100K
6
5
2
1
4
=PP3V3_S5_AIRPORT_AUX
0.01UF
16V
402
10%
CERM
SSM6N15FE
SOT563
R3403
1/8W 805
5% MF-LF
PM_SLP_S3_L
SMC_ADAPTER_EN
NOSTUFF
CRITICAL
D 6
J3400
SSM6N15FE
SOT563
AS0B22-S45N-7F
F-ST-SM
54
2 G
S 1
34B8 24C8
PM_WLAN_EN_L2
5%
1/16W
MF-LF
402
R3406
100K
=PP3V3_S5_AIRPORT_AUX
=PP3V3_S0_AIRPORT 2
PM_WLAN_EN_L1
Q3403
7D4
33B5
WOW_EN
ICH8 GPIO42
Q3403
28B4
D 3
SSM6N15FE
75A3 29B3
SOT563
OUT
OUT
IN
75B3 29C3 IN
1
3
5
7
9
11
13
PCIE_WAKE_L
CK505_SRC_CLKREQ6_L
PCIE_CLK100M_MINI_N
PCIE_CLK100M_MINI_P
15
5 G
S 4
74B3 33B5
PM_S4_STATE_L
74C3 33B5
74C3 33B5
OUT
OUT
PCIE_E_D2R_N
PCIE_E_D2R_P
PCIE_E_R2D_C_N
IN
IN
74C3 33B5
1
PCIE_E_R2D_C_P
C3400
1
2
0.1UF
CERM 402
2
0.1UF 20% 10V
CERM 402
20% 10V
PCIE_E_R2D_N
PCIE_E_R2D_P
C3401
23C8
SB_GPIO42
WOW_EN
33C7
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51
KEY
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
C
27D1
MIN_LINE_WIDTH=0.2MM
MIN_NECK_WIDTH=0.2MM
VOLTAGE=3.3V
AIRPORT_RST_L
IN
=PP3V3_S3_AIRPORT_AUX
1
7A4
C34091 C3410
10UF
20%
2 6.3V
X5R
603
0.1UF
20%
2 10V
CERM
402
402 1/16W
R3401MF-LF
5%
SMB_AIRPORT_CONN_CLK
SMB_AIRPORT_CONN_DATA
0
0
2
2
47C3
=SMB_AIRPORT_CLK
IO
47C3
=SMB_AIRPORT_DATA
IO
1/16W
R3402402
MF-LF 5%
=USB2_AIRPORT_N
IO
8C2 =USB2_AIRPORT_P
IO
8C2
53
MAKE_BASE=TRUE
23D5
23C5
23C5
23C5
PCIE_MINI_D2R_N
PCIE_MINI_D2R_P
PCIE_MINI_R2D_C_N
PCIE_MINI_R2D_C_P
PCIE_E_D2R_N
PCIE_E_D2R_P
PCIE_E_R2D_C_N
PCIE_E_R2D_C_P
33C5 74B3
MAKE_BASE=TRUE
33B5 74C3
MAKE_BASE=TRUE
33B6 74C3
MAKE_BASE=TRUE
33B6 74C3
MAKE_BASE=TRUE
AIRPORT CONN
D
APPLE INC.
DRAWING NUMBER
051-7455
SCALE
SHT
NONE
33
OF
REV.
76
01
Page Notes
Power aliases required by this page:
- =PP3V3_ENET_PHY
(EC
/ Ultra)
- =PP1V8R2V5_ENET_PHY
(2.5V / 1.8V)
- =YUKON_EC_PP2V5_ENET
(2.5V / GND)
- =PP1V2_ENET_PHY
No link:
10 Mbps:
100 Mbps:
1000 Mbps:
7B5 =PP1V2_ENET_PHY
Yukon Ultra
Yukon EC
171
179
203
426
mA
mA
mA
mA
No link:
10 Mbps:
100 Mbps:
1000 Mbps:
No link:
10 Mbps:
100 Mbps:
1000 Mbps:
mA
mA
mA
mA
C3700
4.7UF
20%
6.3V
CERM 2
603
C3701
0.1UF
C3702
0.1UF
10%
2 16V
X5R
402
C3703
0.1UF
10%
16V
2 X5R
402
C3704
0.1UF
10%
2 16V
X5R
402
C3705
0.1UF
10%
16V
2 X5R
402
10%
2 16V
X5R
402
C3706
0.001UF
10%
2 50V
CERM
402
C3707
0.001UF
C3708
0.001UF
10%
2 50V
CERM
402
10%
2 50V
CERM
402
7B5 =PP3V3_ENET_PHY
Yukon Ultra
Yukon EC
130
130
150
290
4
4
4
4
mA
mA
mA
mA
No link:
10 Mbps:
100 Mbps:
1000 Mbps:
60
70
70
80
mA
mA
mA
mA
C3710
4.7UF
20%
6.3V
CERM 2
603
C3711
0.1UF
C3712
0.1UF
10%
16V
2 X5R
402
C3713
0.1UF
10%
2 16V
X5R
402
C3714
0.001UF
C3715
0.001UF
10%
2 50V
CERM
402
10%
2 16V
X5R
402
10%
2 50V
CERM
402
L3720
FERR-120-OHM-1.5A
PCIE_ENET_D2R_P
C3735
OUT
PCIE_ENET_D2R_N
C3736
IN
PCIE_ENET_R2D_C_P
0.1UF
C3730
0.1UF
C3731
PCIE_ENET_R2D_C_N
0.1UF
2
10%
2
10%
16V
16V
X5R
X5R
0.1UF
IN
2
10%
16V
X5R
402
2
10%
16V
X5R
402
C3724
0.001UF
EC:AVDD 2.5V
PCIE_ENET_D2R_C_P
PCIE_ENET_D2R_C_N
49 TX_P
50 TX_N
PCIE_ENET_R2D_P
PCIE_ENET_R2D_N
54 RX_P
CRITICAL
U3700
402
402
88E8058
QFN
53 RX_N
IN
29B3
IN
PCIE_CLK100M_ENET_P
PCIE_CLK100M_ENET_N
28A4 8C4
OUT
=ENET_CLKREQ_L
33C5 24C8
OUT
PCIE_WAKE_L
27C1
IN
ENET_RESET_L
74B3 36B7
BI
74B3 36B7
BI
ANALOG
PCI EXPRESS
42 CLKREQ*
BI
74B3 36C7
BI
LED
17 MDIP0
18 MDIN0
20 MDIP1
21 MDIN1
MEDIA
BI
74B3 36C7
BI
74B3 36C7
BI
ENET_MDI_P<2>
ENET_MDI_N<2>
ENET_MDI_P<3>
ENET_MDI_N<3>
TWSI
26 MDIP2
27 MDIN2
30 MDIP3
SIGNAL_MODEL=EMPTY
SIGNAL_MODEL=EMPTY
1
1
R3740
49.9
R3741
1%
1/16W
MF-LF
2 402
49.9
1%
1/16W
MF-LF
402 2
SIGNAL_MODEL=EMPTY
SIGNAL_MODEL=EMPTY
1
1
R3742
49.9
C3740
0.001UF
10%
50V
2 CERM
402
R3743
1%
1/16W
MF-LF
2 402
ENET_MDI0
1
49.9
1%
1/16W
MF-LF
402 2
SIGNAL_MODEL=EMPTY
SIGNAL_MODEL=EMPTY
1
1
12
9
VMAIN_AVLBL
47
SWITCH_VCC
11
R3744
49.9
1%
1/16W
MF-LF
2 402
ENET_MDI1
1
R3745
49.9
1%
1/16W
MF-LF
402 2
R3746
49.9
1%
1/16W
MF-LF
2 402
ENET_MDI2
C3742
0.001UF
C3744
0.001UF
10%
50V
2 CERM
402
10%
50V
2 CERM
402
R3747
49.9
CRITICAL
1%
1/16W
MF-LF
402 2
C3746
0.001UF
10%
50V
2 CERM
402
15 XTALI
14 XTALO
25.0000M
3
C3750 1
15PF
5%
50V
CERM 2
402
NC
NC
CTRL12
TP_YUKON_CTRL18
TP_YUKON_CTRL12
RSET
16
YUKON_RSET
LED_ACT*
LED_LINK10/100*
59
LED_LINK1000*
62
LED_DUPLEX*
63
(IPU)
SPI_DO
34
(IPU)
SPI_DI
SPI_CLK
35
(IPU)
60
37
(IPU)
SPI_CS
36
(IPU)
VPD_CLK
38
(IPU)
VPD_DATA
41
(IPD)
TESTMODE
46
RSVD_24
24
RSVD_25
RSVD_29
25
RSVD_43
43
MAIN CLK
THRML_PAD
Y3750
SM-3.2X2.5MM
ENET_MDI3
1
ENET_CLK25M_XTALI
ENET_CLK25M_XTALO
OUT
29
R3765
4.99K
1%
1/16W
MF-LF
2 402
NC
NC
NC
NC
YUKON_VPD_CLK
YUKON_VPD_DATA
NC
NC
NC
NC
VPD ROM
1
C3780
NC
NC
C3751
15PF
5%
2 50V
CERM
402
4.7K
5%
1/16W
MF-LF
402 2
8
3
2
1
7
R37801
0.1UF
10%
2 16V
X5R
402
16pF
OUT
NC
NC
NC
NC
1
4
ENET_LOM_DIS_L
CTRL18
TEST/RSVD
31 MDIN3
SIGNAL_MODEL=EMPTY
SIGNAL_MODEL=EMPTY
1
1
VDD6 48
VDD7 58
10
65
BI
74B3 36C7
NC
NC
74B3 36B7
5%
1/16W
MF-LF
402 2
VAUX_AVLBL
SWITCH_VAUX
EC:CTRL25
5 PERST*
ENET_MDI_P<1>
ENET_MDI_N<1>
4.7K
YUKON_ULTRA
EC:NO CONNECT
6 WAKE*
ENET_MDI_P<0>
ENET_MDI_N<0>
R37601
LOM_DISABLE*
55 REFCLKP
56 REFCLKN
SPI
74B3 36C7
VDD5 44
10%
2 50V
CERM
402
VDD3 33
VDD4 39
10%
2 16V
X5R
402
VDD2 13
C3723
0.1UF
10%
16V
2 X5R
402
VDD0 2
VDD1 7
0.1UF
AVDDH 8
C3722
VDDO_TTL3 61
OUT
23C5
23C5
10%
2 16V
X5R
402
=YUKON_EC_PP2V5_ENET
Yukon EC:
Alias to PP1V8R2V5_ENET_PHY_AVDD, add 1x 0.1uF & 1x 0.001uF caps
Yukon Ultra: Alias to GND
23C5
23C5
C3721
0.1UF
20%
6.3V 2
CERM
603
VDDO_TTL1 40
VDDO_TTL2 45
4.7UF
NC_32 32
NC_51 51
8A4
C3720
(EC:2.5V)
mA
mA
mA
mA
AVDD3 28
No link:
0
10 Mbps:
30
100 Mbps:
40
1000 Mbps: 150
VDDO_TTL0 1
No link:
82 mA
10 Mbps:
108 mA
100 Mbps: 126 mA
1000 Mbps: 218 mA
PP1V8R2V5_ENET_PHY_AVDD
MIN_LINE_WIDTH=0.4 mm
MIN_NECK_WIDTH=0.22 mm
VOLTAGE=1.8V
AVDD1 22
AVDD2 23
2
0402-LF
AVDD0 19
NC_57 57
NC_64 64
=PP1V8R2V5_ENET_PHY
NC_52 52
7B3
Yukon EC (2.5V)
VCC
E2
NC1 OMIT SDA
NC0 U3780 SCL
WC*
M24C08
R3781
4.7K
5%
1/16W
MF-LF
2 402
5
6
SO8
CRITICAL
VSS
4
PART NUMBER
114S0285
QTY
DESCRIPTION
REFERENCE DES
RES,4.87K,1%,1/16W,0402,LF
R3760
CRITICAL
BOM OPTION
YUKON_EC
Ethernet (Yukon)
SYNC_MASTER=USB
SYNC_DATE=10/07/2006
D
APPLE INC.
DRAWING NUMBER
051-7455
SCALE
SHT
NONE
34
OF
REV.
76
01
35D4 7B6
PP3V3_ENET_FET
"ENET" = "S0" || AC
15K
5%
1/16W
MF-LF
2 402
1.8A
0.085ohm
NTR4101P
R3801
5%
1/16W
MF-LF
2 402
35A3
Q3801
2 G
S 1
C3811
PM_ENET_EN_L
Q3801
D 3
5 G
S 4
R3810
10K
1
10%
2 16V
X5R
402
CRITICAL
R3824
33K
7B6 35D4
5%
1/16W
MF-LF
2402
C3820
OUT1
OUT2
NR/FB
=PP1V9_ENET_REG
3
4
5
C38221
50V
5%
CERM
402
1%
1/16W
MF-LF
2 402
20%
2 6.3V
X5R
603
16.9K
NC
1UF
10%
PP1V9_S3_FB
2 6.3V
CERM
402
R3822
C3823
10UF
30.1K
1%
1/16W
MF-LF
2 402
NOSTUFF
C3810
0.01UF
P3V3ENET_SS
7B4
35B2
R3821
27PF
NC
0.033UF
100K
D 6
SON
1 IN1
2 IN2
8 EN
PP1V9_ENET_EN
PP3V3_ENET_FET
2
=PP3V3_ENET_P3V3ENETFET
GND THRM_PAD
SOT-23
=PP3V3_S3_ENETPWRCTL
7A4
U3820
LREG_TPS79501DRB
R3823
CRITICAL
Q3810
7A4
5%
1/16W
MF-LF
402
1
10%
16V
CERM
402
SSM6N15FE
SOT563
SSM6N15FE
SOT563
PM_SLP_S3_L
IN
SMC_ADAPTER_EN
=PP3V3_S5_SB
R3802
100K
Q3802
CRITICAL
D 6
SSM6N15FE
5%
1/16W
MF-LF
2 402
24B3
SOT563
2 G
WOL_EN
=PP1V8_ENET_P1V8ENETFET
35B2
S 1
1
2
3
PP1V2_ENET_EN 1 EN
4
5
10
1 C3831
C3830
22UF
20%
2 6.3V
CERM
805
U3830
SOP OUT0
IN0
IN1
MAX8516
PM_ENET_WOL_EN_L
IN
4.7UF
20%
6.3V
2 CERM
603
NC0
NC1
NC2
OUT1
8
9
FB
=PP1V2_ENET_REG 7B6
R3830
5.11K
1%
1/16W
MF-LF
2 402
PP1V2_S3_FB
GND
THRML
PAD
11
R3831
C3832
4.7UF
20%
2 6.3V
CERM
603
3.65K
1%
1/16W
MF-LF
2 402
Name
PM_SLP_S3_L
Logic
S0
SMC_ADAPTER_EN PM_ENET_EN_L
PM_ENET_EN
AC
Yukon Power
Powered by S3
S0 on Battery
High (3.3V)
Low (0V)
Low (0V)
High (3.3V)
Power
S3 on Battery
Low (0V)
Low (0V)
High (3.3V)
Low (0V)
Power
S0 on AC
High (3.3V)
High (3.3V)
Low (0V)
High (3.3V)
Power
S3 on AC
Low (0V)
High (3.3V)
Low (0V)
High (3.3V)
Power
S5 on anything
N/A
N/A
N/A
N/A
No Power
B
35D1 7B4
=PP1V9_ENET_REG
R3832
100K
5%
1/16W
MF-LF
2 402
PP1V2_ENET_EN
35B3
Q3802
D 3
5 G
S 4
SSM6N15FE
SOT563
35C6
PM_ENET_EN_L
SYNC_MASTER=USB
SYNC_DATE=10/07/2006
D
APPLE INC.
DRAWING NUMBER
051-7455
SCALE
SHT
NONE
35
OF
REV.
76
01
D
L3950
FERR-120-OHM-1.5A
1
7B3 =PP1V8_S0_YUKON
PP1V8_S0_YUKON_AVDD
0402-LF
1
C3900
0.1UF
C3904
0.001UF
10%
2 50V
CERM
402
10%
2 16V
X5R
402
C3901
0.1UF
10%
2 16V
X5R
402
C3905
0.001UF
10%
2 50V
CERM
402
C3902
0.1UF
10%
2 16V
X5R
402
C3906
0.001UF
10%
2 50V
CERM
402
C3903
0.1UF
C3907
ETHERNET CONNECTOR
0.001UF
10%
10%
2 16V
X5R
402
2 50V
CERM
402
OMIT
CRITICAL
CRITICAL
R3911
0
2
MF-LF
402
R3910
0
1
2
1
5%1/16W
74B3 34B8
IO
ENET_MDI_P<1>
74B3 34B8
IO
ENET_MDI_N<1>
5%1/16W
MF-LF
402
T3901
SM
1
ENET_MDI_R_P<1>
J3900
12
ENET_MDI_TRAN_P<1>
11
ENET_MDI_TRAN_N<1>
10
TX
R3909
2 0
MF-LF
402
R3908
1
2 0
1
5%1/16W
74B3 34B8
IO
ENET_MDI_P<3>
74B3 34B8
IO
ENET_MDI_N<3>
5%1/16W
MF-LF
402
F-RT-TH
9
2
ENET_MDI_R_N<1>
3
RJ45-M71
1% 1/16W
TLA-6T213LF
6
ENET_MDI_R_N<3>
1
2
3
4
5
6
7
8
MF-LF
402
R3902
2 75
ENET_CENTER_TAP<3> 1
1% 1/16W
5
ENET_MDI_R_P<3>
SYM_VER-1
R3903
2 75
ENET_CENTER_TAP<1> 1
MF-LF
402
ENET_MDI_TRAN_P<3>
ENET_MDI_TRAN_N<3>
10
RX
CRITICAL
74B3 34B8
IO
74B3 34B8
IO
R3907
1
2 0
5%1/16W
MF-LF
402
R3906
1
2 0
ENET_MDI_P<2>
ENET_MDI_N<2>
5%1/16W
MF-LF
402
1
ENET_MDI_R_N<2>
T3902
SM
2
ENET_MDI_R_P<2>
514-0443
IO
74B3 34B8
IO
R3905
1
2 0
5%1/16W
MF-LF
402
R3904
0
1
2
ENET_MDI_P<0>
ENET_MDI_N<0>
5%1/16W
MF-LF
402
ENET_MDI_TRAN_P<2>
10
R3901
2 75
ENET_CENTER_TAP<2> 1
R3900
2 75
ENET_CENTER_TAP<0> 1
TX
74B3 34B8
ENET_MDI_TRAN_N<2>
12
11
TLA-6T213LF
5
ENET_MDI_R_N<0>
1% 1/16W
1% 1/16W
MF-LF
402
MF-LF
402
ENET_MDI_TRAN_N<0>
6
ENET_MDI_R_P<0>
ENET_MDI_TRAN_P<0>
7
RX
MIN_NECK_WIDTH=0.25MM
ENET_BOB_SMITH_CAP
MIN_LINE_WIDTH=0.6MM
CRITICAL
1
C3910
1000PF
10%
2KV
2 CERM
1206
8C8
=GND_CHASSIS_RJ45
OUT
C3911
0.001UF
10%
2 50V
CERM
402
C3912
0.001UF
10%
2 50V
CERM
402
TABLE_5_HEAD
CRITICAL
BOM OPTION
514-0443
PART#
QTY
DESCRIPTION
CONN,8P RJ-45 JACK,TH,MG3,LF
REFERENCE DESIGNATOR(S)
J3900
CRITICAL
NORMAL
514-0475
J3900
CRITICAL
FANCY
TABLE_5_ITEM
TABLE_5_ITEM
ETHERNET CONNECTOR
SYNC_MASTER=USB
SYNC_DATE=09/14/2006
D
APPLE INC.
DRAWING NUMBER
051-7455
SCALE
SHT
NONE
36
OF
REV.
76
01
PAGE NOTES
=PP3V3_S0_FW - 3.3V POWER FOR FIREWIRE (MOBILE: OFF DURING SLEEP)
=PP3V3_S0_PCI - 3.3V POWER FOR PCI FIREWIRE (MOBILE: OFF DURING SLEEP)
PCI_GNT3_L - PCI GRANT FROM SB
PCI_CLK_FW - NEED TO REFERENCE TO ALIAS PAGE
PCI_RST_L - PCI RESET FROM SB
FW_PC0 - FIREWIRE POWER CLASS IDENTIFIER
7A4
=PP3V3_S3_FW
PLACE ONE CAP PER TWO PINS STARTING WITH C4024 ON VDD0
1
INPUT/OUTPUT
0.1UF
20%
2 10V
CERM
402
2 6.3V
X5R
PCI_AD<0..31>,PCI_C_BE_L<0..3>,PCI_FRAME_L,PCI_IRDY_L,PCI_TRDY_L,
PCI_DEVSEL_L, PCI_STOP_L, PCI_PAR, PCI_PERR_L, PCI_SERR_L
FW_A_TPA_P/N, FW_A_TPB_P/N, FW_A_TPBIAS - PORT 0 FIREWIRE DIFF PAIRS
FW_B_TPA_P/N, FW_B_TPB_P/N, FW_B_TPBIAS - PORT 1 FIREWIRE DIFF PAIRS
FW_C_TPA_P/N, FW_C_TPB_P/N, FW_C_TPBIAS - PORT 2 FIREWIRE DIFF PAIRS
603
L4000
600-OHM-300MA
OUTPUT
VOLTAGE=3.3V
74D3 23B8
IO
74D3 23B8
IO
74D3 23B8
IO
74D3 23B8
IO
74D3 23B8
IO
74D3 23B8
IO
74D3 23B8
IO
74D3 23B8
IO
74D3 23B8
IO
74D3 23A8
IO
74D3 23A8
IO
74D3 23A8
IO
74D3 23A8
IO
74D3 23A8
IO
74D3 23A8
IO
74D3 23A8
IO
74D3 23A8
IO
74D3 23A8
IO
74D3 23A8
IO
74D3 23A8
IO
74D3 23A8
IO
74D3 23A8
IO
74D3 23A8
IO
74D3 23A8
IO
74D3 23A8
IO
74D3 23A8
IO
74D3 23B6
IO
74D3 23B6
IO
74D3 23B6
IO
74D3 23B6
IO
74D3 23A6
IO
IO
IO
IO
IO
PCI_RST_L1
A
THIS IS FROM ICH-8
IN
74D3 23B5
IO
IO
IN
IO
46B6
44C5 24C8 6C2
1%
1/16W
MF-LF
402
OUT
OUT
10%
2 16V
X5R
402
10%
2 16V
X5R
402
74C3
23A8 23A4
24C5 24A5
PCI_AD<20>
PCI_AD<21>
PCI_AD<22>
PCI_AD<23>
PCI_AD<24>
PCI_AD<25>
PCI_AD<26>
PCI_AD<27>
PCI_AD<28>
PCI_AD<29>
PCI_AD<30>
PCI_AD<31>
PCI_C_BE_L<0>
K12
PCI_C_BE_L<1>M9
PCI_C_BE_L<2>L3
PCI_C_BE_L<3>L1
PCI_PAR
N10
PCI_FRAME_L N6
PCI_IRDY_L
M6
PCI_TRDY_L
N7
PCI_DEVSEL_L N8
PCI_STOP_L
M7
FW_PCI_IDSEL L2
PCI_FW_REQ_L E2
PCI_FW_GNT_L E1
PCI_PERR_L
M8
PCI_SERR_L
N9
PCI_CLK33M_FWG2
PM_CLKRUN_L D1
FW_PCI_RST_L F1
INT_PIRQD_L D2
PCI_PME_FW_L F2
A2
D10
A13
B13
A7
A8
D6
197S0030 3.2MMX2.5MM
CRITICAL
VDDA5
74D3 23B8
IO
VDDA4
VDDA3
IN
23A6
R4032
100
10%
2 16V
X5R
402
VDDA2
IO
VDDA1
VDDA0
74D3 23B8
OUT
MIN_LINE_WIDTH=0.5MM
1 C4017 1 C4029 1 C4025
C4016
MIN_NECK_WIDTH=0.2MM
0.1UF
0.1UF
0.1UF
10UF
VDD9
5%
1/16W
MF-LF
4022
IO
F10
G10
H10
H12
J13
J12
K13
K10
L12
M13
L11
M12
M11
N12
M10
N11
M4
N5
N4
M3
M2
N3
K4
M1
K2
J4
K1
J2
J1
H2
H4
H1
VDD7
1
R4031
22
IO
74D3 23B8
PCI_AD<0>
PCI_AD<1>
PCI_AD<2>
PCI_AD<3>
PCI_AD<4>
PCI_AD<5>
PCI_AD<6>
PCI_AD<7>
PCI_AD<8>
PCI_AD<9>
PCI_AD<10>
PCI_AD<11>
PCI_AD<12>
PCI_AD<13>
PCI_AD<14>
PCI_AD<15>
PCI_AD<16>
PCI_AD<17>
PCI_AD<18>
VDD6
VDD5
IO
74D3 23B8
VDD4
PCI_AD<19>
74D3 23B8
VDD3
VDD2
74D3
23A8
IO
VDD1
VDD0
IO
0.1UF
20%
2 10V
CERM
402
=PP3V3_S3_PCI
G13
CONNECT TO VDD FOR 3.3V OPERATION
0.1UF
20%
2 10V
CERM
402
PP3V3_S3_FW_AVDD
1
20%
2 6.3V
X5R
603
7A4
20%
2 10V
CERM
402
PLACE ONE CAP PER TWO PINS STARTING WITH C4016 ON VDDA0
0402
0.1UF
20%
2 10V
CERM
402
G4
N1
N2
K5
K6
K7
L13
H13
0.1UF
0.1UF
20%
2 10V
CERM
402
PAGE HISTORY
5/19/2005
6/20/2005
6/21/2005
6/21/2005
6/21/2005
6/22/2005
6/22/2005
6/22/2005
6/22/2005
6/22/2005
7/26/2005
INPUT
R4000
390
1
Y4003
SM-3.2X2.5MM
24.576MHZ
3
FW_XO_R 1
5%
1/16W
MF-LF
402
PCI_VIOS
2 4
1
C4011
15PF
PCI_AD0
PCI_AD1
CRITICAL
PCI_AD2
U4000
PCI_AD3
PCI_AD4
FW32306
XI
A5
FW_XI
XO
B5
FW_XO
5%
50V
CERM 2
402
RESET*
B4
A6
SPEC RECOMMENDS 2.49K
R0 B7
PCI_AD10
R1
PCI_AD11
PCI_AD12
PCI_AD7
PCI_AD8
PCI_AD9
C4012
15PF
5%
2 50V
CERM
402
BGA
PCI_AD5
PCI_AD6
FW_PWRON_RST_L
1 C4020 1
R4020
R4052
0.1UF
510K
10%
2.1K
FW_R1
1%
1/16W
MF-LF
2 402
FW_R0
PCI_AD13
PCI_AD14
PCI_AD15
TPBIAS0
TPA0_P
PCI_AD16
PCI_AD17
TPA0_N
TPB0_P
TPB0_N
PCI_AD18
PCI_AD19
PCI_AD20
TPBIAS1
TPA1_P
TPA1_N
PCI_AD21
PCI_AD22
PCI_AD23
TPB1_P
TPB1_N
TPBIAS2
PCI_AD24
PCI_AD25
PCI_AD26
TPA2_P
TPA2_N
PCI_AD27
PCI_AD28
TPB2_P
TPB2_N
PCI_AD29
B8
A9
B9
B10
A10
D8
A11
B11
B12
A12
C13
C11
C12
D13
D12
38C6
38B6
38B6
38B6
38B6
8D2
8D2
8D2
8D2
8D2
8D2
8D2
8D2
8D2
8D2
FW_A_TPBIAS
FW_A_TPA_P
FW_A_TPA_N
FW_A_TPB_P
FW_A_TPB_N
FW_B_TPBIAS
FW_B_TPA_P
FW_B_TPA_N
FW_B_TPB_P
FW_B_TPB_N
FW_C_TPBIAS
FW_C_TPA_P
FW_C_TPA_N
FW_C_TPB_P
FW_C_TPB_N
5%
1/16W
MF-LF
2 402
2 16V
X5R
402
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
PCI_AD30
PCI_AD31
PCI_CBE0*
PCI_CBE1*
PCI_CBE2*
PCI_CBE3*
PCI_PAR
MODE_420
PCI_FRAME*
PCI_IRDY*
MODE_A
PCI_TRDY*
PC0
PCI_DEVSEL*
PCI_STOP*
PC1
PC2
PCI_IDSEL
CONTENDER
CARDBUSN
MPCI_ACTN_323
PCI_REQ*
PCI_GNT*
PCI_PERR*
TEST0
PCI_SERR*
MANUFACTURING TEST
PCI_CLK
CLKRUN*
TEST1
PINS
PTEST
SE
SM
PCI_RST*
PCI_INTA*
C2
C1
A4
A3
B3
38C8
FW_PC0IO
FW_TEST0
FW_TEST1
FW_PTEST
1
1
FW_SE
R4036 R4037
47
1
FW_SM
5%
R4035 47
1/16W
5%
MF-LF
47
1
1/16W
R4034
1
5%
MF-LF
2402
R4033
1/16W
402
47
5%
1/16W
MF-LF
MF-LF
FIREWIRE CONTROLLER
SYNC_MASTER=ENETSYNC_DATE=08/30/2005
2 402
2 402
VSSA3
VSSA4
VSSA1
VSSA2
VSSA0
E13
E9
D9
D7
D5
VSS21
VSS22
VSS20
VSS18
VSS19
VSS15
VSS16
VSS12
VSS13
VSS14
VSS11
VSS9
VSS10
VSS8
VSS6
VSS7
VSS4
VSS5
VSS3
A1
B2
C3
D4
E4
E5
F4
F6
F7
F8
G1
G6
G7
G8
H6
H7
H8
J5
J9
J10
K8
K9
N13
VSS1
VSS2
E12
F13
F12
G12
B1
E10
5%
1/16W
MF-LF
2 402
M5
B6
47
PCI_PME*
VSS17
SIZE
D
APPLE INC.
DRAWING NUMBER
051-7455
SCALE
SHT
NONE
37
OF
REV.
76
01
Page Notes
INPUT:
PPBUS_S5_FWPWRSW_F
VOLTAGE=18.5V
MIN_LINE_WIDTH=0.5MM
MIN_NECK_WIDTH=0.25MM
CRITICAL
INPUT/OUTPUT:
OUTPUT:
FW_PC0 - POWER CLASS IDENTIFIER (SINGLE PORT - TIE LOW)
R43901
5/19/05
6/22/05
6/22/05
6/22/05
7/26/05
7/26/05
7/26/05
7/26/05
7/26/05
7/26/05
7/26/05
INITIAL REVISION
CHANGED DIFF PAIR NAMES TO MATCH REUSE
REMOVED CONSTRAINTS BECAUSE USING ALLEGRO CONST MANAGER
CONNECTED FW_PC0 FOR SINGLE PORT
UPDATED LATE-VG POWER RAIL CIRCUIT FROM M1
CHANGED CONNECTOR PORT NAMING TO PORT0
SWITCHED TO 514-0124 FOR PRE-PROTO CONNECTOR
REMOVED R4520 - IT HASNT BEEN STUFFED FOR MANY PRODUCTS
CHANGED FL4590 TO 1.1A VERSION
REMOVED ETHERNET LOW-POWER MODE CIRCUIT
UPDATED SIGNAL NAMES FOR FW PORT POWER ENABLE
1
SMC_ADAPTER_EN
FWPWR_ACIN 1
=PP3V3_S0_FW
NC
D 6
FWPWR_EN 2 G
S 1
10%
2 50V
CERM
402
FWPWR_EN_L_DIV
FWPWR_EN_AND
Q4392
D 3
5 G
S 4
SSM6N15FE
SOT563
5%
1/16W
MF-LF
2 402
38A4
FW_PORTPWR_EN
[LATE VG NOTES]
38A7
CURRENT THROUGH THE BIAS RESISTOR SHOULD BE 5MA FOR A VOLTAGE DROP TO 2.2V
PP2V4_FWLATEVG
CRITICAL
D4320
IT IS 2.2V INSTEAD OF 2.7V BECAUSE THE SNAPBACK ESD DIODES HAVE A 0.5V DROP
37B3
FW_A_TPBIAS
R4300
R4301
56.2
56.2
1%
1/16W
MF-LF
2 402
0.001UF
470K
IO
C4310
SSM6N15FE
SOT563
R4395
FW_PC0
MIN_LINE_WIDTH=0.15MM
MIN_NECK_WIDTH=0.15MM
Q4392
OUT
CRITICAL
10%
25V
2 X7R
402
2
SM
FWPWR_EN_L
7D4
37A3
CRS08
5%
1/16W
MF-LF
402 2
SOT665
5%
1/16W
MF-LF
402
VOLTAGE=16.5V
MIN_LINE_WIDTH=0.5MM
MIN_NECK_WIDTH=0.25MM
3.3K
HN2D01JEF
10K
PPFW_PORT0_VP
L4310
FERR-250-OHM
R43911
D4391
VOLTAGE=16.5V
MIN_LINE_WIDTH=0.5MM
MIN_NECK_WIDTH=0.25MM
MIN_LINE_WIDTH=0.15MM
MIN_NECK_WIDTH=0.15MM
R4394
C4390
0.01UF
5%
1/16W
MF-LF
402 2
CRITICAL
4.7K
PAGE HISTORY
PPFW_PORT0_VP_F
D4390
SM
6
5
2
1
MINISMDC
Cable Power
6B2
VOLTAGE=19V
MIN_LINE_WIDTH=0.5MM
MIN_NECK_WIDTH=0.25MM
FDC638P
SM-LF
1.1A-24V
7B1 =PPBUS_S5_FWPWRSW
PPFW_SWITCH
Q4390
CRITICAL
FL4390
1%
1/16W
MF-LF
2 402
C4320
0.01UF
C4300
BAV99DW-X-F
SOT-363
5
10%
16V
CERM 2
402
0.33UF
10%
2 6.3V
CERM-X5R
402
3
4
CRITICAL
D4320
C4321
0.01UF
BAV99DW-X-F
SOT-363
2
10%
16V
CERM 2
402
1394A
PORT 0
CRITICAL
FL4320
OMIT
J4300
CRITICAL
TCM2010-100-4P
FW_PORT0_TPA_P
SM
1394A
F-RT-TH3
FW_PORT0_TPA_N
FW_A_TPA_P
37B3 FW_A_TPA_N
37B3 FW_A_TPB_P
37B3 FW_A_TPB_N
FW_PORT0_TPA_P_FL
FW_PORT0_TPA_N_FL
37B3
IO
IO
IO
IO
R4302
CRITICAL
D4321
56.2
56.2
1%
1/16W
MF-LF
2 402
1%
1/16W
MF-LF
2 402
R4304
0.01UF
10%
4.99K
220PF
C4323 1
FW_PORT0_TPB_N_FL
3
1
TPO
(TPA+)
TPO#
(TPA-)
TPI
(TPB+)
TPI#
(TPB-)
VP
VGND
(GND_FW_PORT0_VGND)
SOT-363
5
0.01UF
10%
16V
CERM 2
402
1%
1/16W
MF-LF
2 402
5%
2 25V
CERM
402
C4322 1
C4301
(PPFW_PORT0_VP)
BAV99DW-X-F
SOT-363
2
FW_PORT0_TPB
1
CRITICAL
D4321
BAV99DW-X-F
FW_PORT0_TPB_P_FL
FW_PORT0_TPB_N
R4303
FW_PORT0_TPB_P
C4324 C4325 1
0.01UF
10%
2 50V
X7R
603-1
16V
CERM 2
402
0.01UF
514-0456
=GND_CHASSIS_FW_UPPER
10%
16V
CERM 2
402
=GND_CHASSIS_FW_DOWN
8A6
8C8
R4350
330
=PP3V3_S5_FWLATEVG1
5%
1/16W
MF-LF
402
38C5
NO STUFF
1
C4352
VOLTAGE=3.3V
MIN_LINE_WIDTH=0.35MM
MIN_NECK_WIDTH=0.25MM
CRITICAL
0.001UF
402
10%
50V
2 CERM
=PP3V3_S5_FWLATEVG
TABLE_5_HEAD
PP2V4_FWLATEVG
38A6 7D1
D4350
SOT23
MMBZ5227B
R4352
R4351
10K
10K
1
5%
1/16W
MF-LF
2402
4
PP2V4_FWLATEVG_RC
-
5%
2 50V
CERM
402
SC70
1
DESCRIPTION
REFERENCE DESIGNATOR(S)
CRITICAL
BOM OPTION
1SS418
2
514-0456
J4300
CRITICAL
NORMAL
514-0476
J4300
CRITICAL
FANCY
TABLE_5_ITEM
5%
1/16W
MF-LF
2402
FW_PORTPWR_EN
FIREWIRE PORT
38C5
SYNC_MASTER=GPU
SOD-723
C4355
0.33UF
10%
2 6.3V
CERM-X5R
402
R4354
200K
1
SYNC_DATE=07/17/2006
80.6K
1%
1/16W
MF-LF
2402
D4351
LATEVG_EVENT_L 1
V-
NC
1
C4353
100PF R4353
U4350
TLV7211
V+
3
FWLATEVG_3V_REF
+
1
CRITICAL
2
QTY
TABLE_5_ITEM
R4356
2.0M
10%
2 16V
X5R
402
1%
1/16W
MF-LF
2402
PART#
C4354
0.1UF
1%
1/16W
MF-LF
402
SIZE
D
APPLE INC.
DRAWING NUMBER
051-7455
SCALE
SHT
NONE
38
OF
REV.
76
01
CRITICAL
Q4410
R4465
26D8 7D4
6.2K
5%
=PP3V3_S0_SB
1/16W
MF-LF
2402
R4425
ODD_PWR_EN_SLOW_START_L
10K
1
R4476
Q4475
10K
R4477
330
1
ODD_PWR_EN_SLOW_START
Q4475
5 G
2 ODD_PWR_EN_SLOW_START_R
5%
1/16W
MF-LF
402
D 6
SSM6N15FE
SOT563
D 3
SSM6N15FE
SOT563
5%
1/16W
MF-LF
2 402
C4477
2 16V
X5R
402
ODD_PWR_EN_L
16V
X5R
402
C4475
NOSTUFF
10K
5%
1/16W
MF-LF
2402
5%
1/16W
MF-LF
4022
Per ATA Spec
1
CRITICAL
J4401
73D3
ODD_RST_BUF_L
IDE_PDD<7>
22B4 IDE_PDD<6>
22B4 IDE_PDD<5>
22B4 IDE_PDD<4>
22B4 IDE_PDD<3>
22B4 IDE_PDD<2>
22C4 IDE_PDD<1>
22C4 IDE_PDD<0>
M-ST-SM
51
73D3
22B4 IDE_PDIOW_L
NC 2
NC 4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
NC38
40
42
44
46
48
50
73D3 22B4
73D3
73D3
73D3
73D3
73D3
39A6
R4402
0
73D3 22A4
OUT
73D3 22B4
OUT
IDE_PDIORDY
IDE_IRQ14
IDE_PDA<1>
IDE_PDA<0>
22B4 IDE_PDCS1_L
73D3 22B4
5%
1/16W
MF-LF
402
73D3 22B4
NOSTUFF
1
C4404
10PF
CORE RAIL 5V
73D3
5%
50V
CERM 2
402
R4453
5-1775184-0
39A7
0.47UF
10%
7D4
R4420
R44241
100K
5%
1/16W
MF-LF
2 402
=PP3V3_S0_PATA
R4451
4.7K
73D3
ODD_PWR_EN_L_R
ODD_PWR_EN_SLOW_START_L_R
10%
S 1
5%
1/16W
MF-LF
402
=PP5V_S0_IDE_PATA
S 4
ODD_PWR_RESUME
SB_GPIO40
23C8
NOSTUFF
C4476
1
R4401
0
ICH8 GPIO5
MAKE_BASE=TRUE
0.1UF
2 6.3V
CERM-X5R
402
G
PP5V_S0_IDE_PATA
VOLTAGE=5V
MIN_LINE_WIDTH=0.35MM
MIN_NECK_WIDTH=0.25MM
39A5
0.1UF
10%
5%
1/16W
MF-LF
402
6
5
2
1
FDC606P
SOT-6
=PP5V_S5_PATA
7C1
IDE_CSEL_PD
NC
33K
NC
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
NC
52
NC
5%
1/16W
MF-LF
2402
73D3
73D3
NC
IDE_PDA<2> 22B4 73D3
IDE_PDCS3_L 22B4 73D3
NC
516S0339
R4458
1
7A7
0
5%
=PP5V_S0_IDE_RESET
1/16W
MF-LF
2402
PER ATA SPEC
R4460
R4459
6.2K
5%
1/16W
MF-LF
2402
PER ATA7 SPEC
100K
5%
1/16W
MF-LF
2402
73D3
23B6 ODD_RST_5VTOL_L
ICH8 GPIO54
39C4
CRITICAL
1
2
MC74VHC1G09
SC70
U4401Y
ODD_RST_BUF_L
39C5
39C7
=PP5V_S0_IDE_PATA
R4461
1%
1/16W
MF-LF
402
24.9K2ODD_PWR_EN_L_B
2
ODD_PWR_EN_L_R
1
Q4420
MMDT3904XF
SOT-363-LF
ODD_POWER_DISCHARGE
R4462
PATA CONNECTOR
4.7
5%
1/16W
MF-LF
2 402
D
APPLE INC.
DRAWING NUMBER
051-7455
SCALE
SHT
NONE
39
OF
REV.
76
01
SATA CONNECTOR
PLACE L4501 NEAR J4501
CRITICAL
L4501
90-OHM-100MA
518S0390
1210-4SM1
CRITICAL
J4501
20247-019E
F-ST-SM
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
C4503
1
2
SATA_A_R2D_F_N
0.0047UF
402
73D3
73D3
SATA_A_R2D_P
SATA_A_R2D_N
SATA_A_D2R_F_N
C4502
1
2
402
SATA_A_R2D_C_NIN
402
SATA_A_D2R_N
MAKE_BASE=TRUE
SATA_A_D2R_P
22B6
SATA_RBIAS_N
OUT
22A6
SATA_RBIAS_P
OUT
SATA_RBIAS_PN
OUT
R4501
OUT
24.9
1%
SYM_VER-1
C4520
C4521
0.1UF
10UF
10%
73D3 22B6
1/16W
MF-LF
2402
2 16V
X5R
22B6
SATA_A_D2R_F_P
0.0047UF
402
=PP5V_S0_SATA 7A7
NOSTUFF
90-OHM-100MA
1210-4SM173D3
2
0.0047UF
NOSTUFF
1
73D3 22B6
L4502
C4500
1
2
SATA_A_D2R_C_N
SATA_A_D2R_C_P
NC
C4501
1
2
CRITICAL
73D3
73D3
0.0047UF
402
SYM_VER-1
20%
2 6.3V
X5R
603
NC
NC
NC
21
8C7
SATA_A_R2D_F_P
20
R4522
10
SYS_LED_ANODE_L
GND_CHASSIS_SATA
IR_RX_OUT 43C8
R4550
100
(TO IR RECEIVER)
PP5V_S3_SYSLED_F 1
1
C4550
4.7UF
20%
2 6.3V
CERM
603
C
SATA DIFF PAIR GND VIAS
SYS_LED_ANODE 6B2
45A3
5%
1/16W
MF-LF
0.01UF 402
HOLE-VIA-P5RP25
GV4503
HOLE-VIA-P5RP25
GV4504
HOLE-VIA-P5RP25
GV4505
HOLE-VIA-P5RP25
GV4506
HOLE-VIA-P5RP25
C4522
10%
2 16V
CERM
402
GV4501
HOLE-VIA-P5RP25
1
GV4507
7A4 45A4
HOLE-VIA-P5RP25
5%
1/16W
MF-LF
402
=PP5V_S3_SYSLED
GV4502
GV4508
HOLE-VIA-P5RP25
1
SATA CONNECTOR
A
D
APPLE INC.
DRAWING NUMBER
051-7455
SCALE
SHT
NONE
40
OF
REV.
76
01
41D2
FERR-120-OHM-1.5A
1
PP5V_S3_USB2_EXTA_F
MIN_LINE_WIDTH=0.6MM
MIN_NECK_WIDTH=0.3MM
VOLTAGE=5V
0402-LF
OMIT
CRITICAL
J4600
USB-M71-MG3
F-RT-TH
5
CRITICAL
90-OHM-100MA
TCM1005
SYM_VER-1
7C1
41A5
USB2_MUXED_EXTA_N
41A5
USB2_MUXED_EXTA_P
=PP5V_S5_USB
1
20%
6.3V
X5R
603
D4600
SC-75
OMIT
R4650
1K
=EXTAUSB_OC_L
U4600
5%
TPS2060
MF-LF
C46501/16W
402
2 IN
0.47UF
10%
8
3
5
4
6.3V
2 CERM-X5R
402
1K
=EXTBUSB_OC_L
1
EN1*
PP5V_S3_USB2_EXTA
OUT2
PP5V_S3_USB2_EXTB
OC2*
C4602
0.01UF
10%
2 16V
CERM
402
C4603
514-0457
0.01UF
10%
2 16V
CERM
402
RCLAMP0502B
=GND_CHASSIS_USB
VOLTAGE=5V
MIN_LINE_WIDTH=0.6MM
VOLTAGE=5V
MIN_LINE_WIDTH=0.6MM
EN2*
=GND_CHASSIS_USB3
41B2
PP5V_S3_USB2_EXTB_F
L4603
FERR-120-OHM-1.5A
GND TPAD
R4651
8B2
OUT1
MSOP
OC1*
C4610
100UF
20%
2 6.3V
POLY
B2
CRITICAL
2 EXTAUSB_OC_F_L
VOLTAGE=0V
CRITICAL
8C2
0402-LF
CRITICAL
1 VBUS
2 D3 D+
4 GND
6
FERR-120-OHM-1.5AMIN_LINE_WIDTH=0.6MM
MIN_NECK_WIDTH=0.3MM
0.1UF
20%
10V
CERM
402
PP5V_S3_USB2_EXTA_F
USB2_EXTA_F_N
USB2_EXTA_F_P
USB2_GND_EXTA_F
L4604
C4613 1 C4612
10uF
41D3
2 EXTBUSB_OC_F_L
5%
1/16W
MF-LF
402
C4651
0.47UF
2
0402-LF
OMIT
10%
2 6.3V
CERM-X5R
402
MIN_LINE_WIDTH=0.6MM
MIN_NECK_WIDTH=0.3MM
VOLTAGE=5V
CRITICAL
C4611
100UF
20%
2 6.3V
POLY
B2
65B6
PM_SLP_S4_LS5V
OMIT
CRITICAL
J4601
USB-M71-MG3
CRITICAL
F-RT-TH
5
90-OHM-100MA
TCM1005
SYM_VER-1
8B2
=USB2_EXTB_N
8B2
=USB2_EXTB_P
41C3
0.1UF
1
=PP3V42_G3H_SMCUSBMUX
20%
10V
CERM
402
1
7
8C2
8C2
D+A
D-A
1/16W
MF-LF
2402
USB2_MUXED_EXTA_P
USB2_MUXED_EXTA_N
D+ 3
D- 5
2 D+B
6 D-B
=GND_CHASSIS_USB
L4605
41C5
41C5
VOLTAGE=0V
0402-LF
TQFN
CRITICAL
USB_DEBUGPRT_EN_L
SEL 10
8 OE*
44B8
GND
SYNC_MASTER=USB
5%
1/16W
MF-LF
402
SYNC_DATE=06/30/2006
R4670
1
514-0457
10%
2 16V
CERM
402
MIN_LINE_WIDTH=0.6MM
FERR-120-OHM-1.5A
MIN_NECK_WIDTH=0.3MM
PI3USB10LP
=USB2_EXTA_P
=USB2_EXTA_N
C4607
0.01UF
RCLAMP0502B
10K
5%
U4675
R4677
SMC_RX_L
SMC_TX_L
C4606
0.01UF
10%
2 16V
CERM
402
=GND_CHASSIS_USB3
7B1
VCC
2 NOSTUFF
PART#
QTY
DESCRIPTION
REFERENCE DESIGNATOR(S)
CRITICAL
BOM OPTION
TABLE_5_ITEM
R4671
514-0457
J4600,J4601
CRITICAL
NORMAL
514-0477
J4600,J4601
CRITICAL
FANCY
SIZE
TABLE_5_ITEM
2 NOSTUFF
5%
1/16W
MF-LF
402
APPLE INC.
DRAWING NUMBER
051-7455
SCALE
SHT
NONE
1 VBUS
2 D3 D+
4 GND
6
CRITICAL
D4601
SC-75
C4675
PP5V_S3_USB2_EXTB_F
USB2_EXTB_F_N
USB2_EXTB_F_P
USB2_GND_EXTB_F
41
OF
REV.
76
01
L4700
600-OHM-300MA
7A4
=PP5V_S3_GEYSER
2
0402
R4710
45D5 45C8 44C5
OUT
SMC_ONOFF_L
CONN_GEYSER_ONOFF_L
MAKE_BASE=TRUE
1
C4700
0.1UF
20%
2 10V
CERM
402
CONN_GEYSER_ONOFF_FLTR_L
5%
1/16W
MF-LF
402
C4710
0.1UF
1K
PP5V_S3_GEYSER_F
VOLTAGE=5V
MIN_LINE_WIDTH=0.6MM
MIN_NECK_WIDTH=0.3MM
20%
10V
CERM
402
CRITICAL
J4700
53307-1039
F-ST-SM
8C2
8C2
CONN_GEYSER_USB_N
=USB2_GEYSER_N
SYM_VER-1
TCM1005
90-OHM-100MA
L4701
CRITICAL
CRITICAL
D4700
SC-75
1
2
4
6
8
10
1
3
5
7
9
CONN_GEYSER_USB_P
=USB2_GEYSER_P
L4702
600-OHM-300MA
1
2 GEYSER_GND_F
0402
L4703
600-OHM-300MA
0402
1
SMC_LID_LC
516S0588
SMC_LID 6B2
C4703
0.01uF
10%
2 16V
CERM
402
MIN_LINE_WIDTH=0.6MM
MIN_NECK_WIDTH=0.3MM
VOLTAGE=0V
RCLAMP0502B
CONNECTOR MISC
SYNC_MASTER=USB SYNC_DATE=06/29/2006
D
APPLE INC.
DRAWING NUMBER
051-7455
SCALE
SHT
NONE
42
OF
REV.
76
01
BLUETOOTH
IR CYPRESS ENCORE II USB CONTROLLER
PLACE L4810 NEAR J4800
L4810
7A4
=PP3V3_S3_BT
7A4
=PP5V_S3_IR
2
0402-LF
R4803
1
5%
1/16W
MF-LF
402
20%
6.3V
2 X5R
603
C4802
C4804 C4801
0.1UF
0.001UF
1UF
10%
2 10V
X5R
402
C4810
10UF
PP5V_S3_IR_R
1
20%
2 10V
CERM
402
10%
2 50V
CERM
402
C4811
0.1UF
20%
2 10V
CERM
402
6A2
PP3V3_S3_BT_F
MIN_LINE_WIDTH=0.2MM
MIN_NECK_WIDTH=0.2MM
VOLTAGE=3.3V
CRITICAL
J4810
78171-0004
CRITICAL
16
TP_IR_P00
TP_IR_P01
TP_IR_P02
TP_IR_P03
TP_IR_P04
IR_RX_OUT_RC
R4800
40C6
IR_RX_OUT
100 2
1
5%
1/16W
MF-LF
402
C4803
0.001UF
10%
2 50V
CERM
402
7
6
5
4
3
2
1
32
9 P2_0
8 P2_1
VDD
P0_0
P0_1
P0_2/INT0
P0_3/INT1
P0_4/INT2
P0_5/TIO0
P0_6/TIO1
P0_7
P1_0/D+
P1_1/DP1_2/VREG
P1_3/SSEL
P1_4/SCLK
P1_5/SMOSI
P1_6/MISO
OMIT
P1_7
U4800
P3_0
CY7C63833
QFN
CRITICAL P3_1
10
11
12 NC
17
19
14
15
18
20
23
24
25
26
USB2_IR_P_R
USB2_IR_N_R
ENCORE_VREG_C
1
M-RT-SM
5
L4812
R4801
=USB2_IR_P
5%
1/16W
MF-LF
402
=USB2_IR_N
8B2
=USB2_BT_N
8C2
=USB2_BT_P
8C2
5%
1/16W
MF-LF
402
C4800
SYM_VER-1
8C2
R4802
1
90-OHM-100MA
TCM1005
1
2
3
4
USB2_BT_F_N
6C1 USB2_BT_F_P
6C1
TO M13D SLOT
1UF
10%
6A2
2 10V
X5R
402
L4811
120-OHM-0.3A-EMI
1
21
22
GND_BT_F 518S0521
MIN_LINE_WIDTH=0.2MM
MIN_NECK_WIDTH=0.2MM
VOLTAGE=0V
0402-LF
27
28
29
NC
30
31
33
13
VSS THRM_PAD
3G CONNECTOR
NOSTUFF
L4852
FERR-220-OHM-2A
7A7
=PP5V_S0_3G
PP5V0_S0_3G_F
0603
NOSTUFF
1
NOSTUFF
C4850
0.01UF
10%
2 50V
X7R
402
C4851
0.01UF
10%
NOSTUFF
CRITICAL
2 50V
X7R
402
J4850
LVC-D10SFYG
F-RT-SM
43A5 8D8
=GND_CHASSIS_3GPOWER
13
11
NOSTUFF
L4853
FERR-220-OHM-2A
1
GND_3G_F
0603
1
NOSTUFF
L4855
0.01UF
10%
2 50V
X7R
402
43B5 8D8
NOSTUFF
CRITICAL
C4852
=GND_CHASSIS_3GPOWER
90-OHM-100MA
TCM1005
SYM_VER-1
8C2
=USB2_3G_P
8C2
=USB2_3G_N
6C1
USB2_3G_F_P
USB2_3G_F_N
12
NOSTUFF
L4854
FERR-120-OHM-1.5A
1
6C1
1
2
3
4
5
6
7
8
9
10
14
GND_CHASSIS_3G_CONN
0402
D
APPLE INC.
DRAWING NUMBER
051-7455
SCALE
SHT
NONE
43
OF
REV.
76
01
45C6
51B8 45D8 45D4 45C1 7C1
PP3V3_S5_AVREF_SMC
=PP3V42_G3H_SMC
C4902
22UF
20%
6.3V
CERM
805
C4903
0.1UF
C4904
0.1UF
20%
10V
CERM
402
C4905
20%
10V
CERM
402
0.1UF
20%
10V
CERM
402
C4906
0.1UF
20%
10V
CERM
402
R4999
OUT
SMC_P20
44B4 SMC_P21
44B4 SMC_P22
44B4 SMC_P23
SMC_BATT_TRICKLE_EN_L
OUT
SMC_BATT_CHG_EN
OUT
44B4 SMC_P26
44B4 SMC_P27
BI
BI
BI
BI
IN
27C1
IN
44A4
45A6
47B3
44B4
IN
BI
OUT
47D6
IN
BI
SMC_TX_L
SMC_RX_L
SMB_0_S0_CLK
K13
K14
D12
P65/KIN5*
P66/IRQ6*/KIN6*
C15
P17
P67/IRQ7*/KIN7*
J13
D13
P20
P70/AN0
N12
D14
P21
P22
P71/AN1
P72/AN2
R13
P73/AN3
P74/AN4
R14
E14
P23
P24
E15
P25
P75/AN5
R15
E13
P26
P27
P76/AN6
P77/AN7
N13
F14
K12
J12
P14
P15
(OC)
SMC_WAKE_SCI_L
SMC_P81
PM_CLKRUN_L
PM_SUS_STAT_L
SMC_TX_L
SMC_RX_L
SMB_MGMT_CLK
(OC)
SMC_ONOFF_L
SMC_BC_ACOK
SMC_BS_ALRT_L
PM_SLP_S3_L
PM_S4_STATE_L
PM_SLP_S5_L
SMC_SUS_CLK
SMB_0_S0_DATA
45C5
IN
45D1
IN
48C1 59C7
IN
6B2 48B1
IN
44A4
IN
44A4
IN
66C2
45C5
45C7
IN
48D6
IN
66B1
IN
45B3
P80/PME*
P81/GA20
A7
B7
P84/IRQ3*/TXD1
P85/IRQ4*/RXD1
C6
P86/IRQ5*/SCK1/SCL1
B6
P90/IRQ2*
K4
P91/IRQ1*
P92/IRQ0*
J2
B5
P40/TMIO
P41/TMO0
D5
P42/SDA1
P93/IRQ12*
J3
C3
P94/IRQ13*
P95/IRQ14*
J4
B1
P43/TMI1/EXSCK1
P44/TMO1
C2
P45
P96/EXCL
H1
D3
P97/IRQ15*/SDA0
G2
C1
P46/PWX0/PWM0
P47/PWX1/PWM1
G1
P50
44C8
G4
P51
P52/SCL0
44C8
P36/LCLK
P37/SERIRQ
A5
J1
H2
OUT
24C8
OUT
F2
IN
OUT
IN
BI
27C5 24D5
41A5
OUT
OUT
15B7 8B2
BI
15B7 8B2
BI
BI
24C3 24A5
OUT
24C8
OUT
(DEBUG_SW_3)
PA0/KIN8*/PA2DC
P3
PA1/KIN9*/PA2DD
PA2/KIN10*/PS2AC
(OC)
(OC)
(OC)
(OC)
(OC)
(OC)
R2
48A8
IN
OUT
45C3
44B4
IN
OUT
45D5
IN
45D5
44B4
50B4 6D2
IN
OUT
OUT
44B4
OUT
44B4
OUT
44B4
IN
50C4 6D2
IN
44B4
IN
44A4 6A7
IN
51C2
IN
51C2
IN
51C2
IN
45C6
IN
61C5
IN
62C2
IN
44A4
IN
44A4
IN
R1
PA3/KIN11*/PS2AD
PA4/KIN12*/PS2BC
N2
PA5/KIN13*/PS2BD
N3
M4
N1
SMC_PB0
SMC_RUNTIME_SCI_L
SMC_ODD_DETECT
ISENSE_CAL_EN
SMC_EXCARD_CP
SMC_EXCARD_PWR_EN
SMC_EXCARD_OC_L
SMC_GFX_OVERTEMP_L
45C5
39B2
R3
M2
IN
IN
IN
IN
IN
24D3 45C3
IN
45A7
BI
PE3*/ETDO
PE4*/ETMS
L4
L2
PF0/IRQ8*/PWM2
M7
PF1/IRQ9*/PWM3
P6
PB0/LSMI*
PF2/IRQ10*/TMOY
PF3/IRQ11*/TMOX
PB1/LSCI
PF4/PWM4
M6
D10
PB2
PB3
PF5/PWM5
PF6/PWM6
R5
C11
PB4
PB5
A12
PB6
PB7
P5
PF7/PWM7
N5
PG0/EXIRQ8*/TMIX
PG1/EXIRQ9*/TMIY
P9
PG2/EXIRQ10*/SDA2
N9
R9
PC0/TIOCA0/WUE8*
PC1/TIOCB0/WUE9*
PG3/EXIRQ11*/SCL2
PG4/EXIRQ12*/EXSDAA
P8
G13
PC2/TIOCC0/TCLKA/WUE10*
PG5/EXIRQ13*/EXSCLA
M8
G12
PG6/EXIRQ14*/EXSDAB
PG7/EXIRQ15*/EXSCLB
P7
H14
PC3/TIOCD0/TCLKB/WUE11*
PC4/TIOCA1/WUE12*
H15
PC5/TIOCB1/TCLKC/WUE13*
H13
PC6/TIOCA2/WUE14*
PC7/TIOCB2/TCLKD/WUE15*
H12
SMC_PF0
SMC_PF1
SMC_LID
SMC_PF3
SMC_BATT_ISET
SMC_BATT_VSET
SMC_SYS_ISET
SMC_SYS_VSET
N6
G15
G14
SMC_CASE_OPEN
SMC_TCK
SMC_TDI
SMC_TDO
SMC_TMS
M1
A10
D11
SMS_X_AXIS
SMS_Y_AXIS
SMS_Z_AXIS
SMC_ANALOG_ID
SMC_NB_CORE_ISENSE
SMC_NB_1V8_ISENSE
ALS_LEFT
ALS_RIGHT
M3
B10
B11
SMC_FAN_0_CTL
SMC_FAN_1_CTL
SMC_FAN_2_CTL
SMC_FAN_3_CTL
SMC_FAN_0_TACH
SMC_FAN_1_TACH
SMC_FAN_2_TACH
SMC_FAN_3_TACH
PE0
PE1*/ETCK
PE2*/ETDI
R6
A11
M15
A1
J15
F1
VCL
VCC
P1
P2
M14
F4
ETRST*
L1
P12
R12
SMC_MD1
IN
6C2 46B6
SMC_NMI
IN
6C2 46B4
SMC_TRST_L
IN
6C2 46B6
SMC_KBC_MDE
NO STUFF
1
R4902
10K
R4998
10K
5%
1/16W
MF-LF
2 402
R4903
0
5%
1/16W
MF-LF
2 402
5%
1/16W
MF-LF
2 402
C
GND_SMC_AVSS
44D8
47D6
44C8
SMC_P14
SMC_P20
SMC_P21
SMC_P22
SMC_P23
SMC_P26
SMC_P27
SMC_P46
SMC_P44
SMC_P43
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
SMC_P62
SMC_P63
SMC_P64
SMC_P81
SMC_PF1
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
45B6 48A1 48B1 48C1 48C6 60B2 61C5 62C2 66B1 66C2
NC_SMC_P14
NC_SMC_P20
NC_SMC_P21
NC_SMC_P22
NC_SMC_P23
NC_SMC_P26
NC_SMC_P27
NC_SMC_P46
NC_SMC_P44
NC_SMC_P43
OMIT
U4900
SMC_H8S2116
BGA
U4900
SMC_H8S2116
PA6/KIN14*/PS2CC
PA7/KIN15*/PS2CD
NMI
5%
1/16W
MF-LF
402
44C8
BGA
EXTAL
44C8
(2 OF 4)
XTAL
B2
K1
SM
44C8
SMC_PA0
SMC_PA1
PM_SYSRST_L
USB_DEBUGPRT_EN_L
PM_EXTTS_L<0>
PM_EXTTS_L<1>
SYS_ONEWIRE
PM_BATLOW_L
A2
E2
MD2
10K
47B3
IN
OMIT
45C5
SMC_XTAL
SMC_EXTAL
MD1
R4901
XW4900
44B8
45C5
RES*
44C8
(DEBUG_SW_1)
(DEBUG_SW_2)
E3
44B4
44C8
(OC)
SMC_RESET_L
AVSS
P82/CLKRUN*
P83/LPCPD*
D7
5%
1/16W
MF-LF
402
VSS
P32/LAD2
P33/LAD3
A8
IN
45C7
P31/LAD1
A6
R4909 1
10K
(3 OF 4)
IN
P30/LAD0
C8
SMC_H8S2116
44B4
A9
D6
10%
6.3V
CERM-X5R
402
BGA
C9
P34/LFRAME*
P35/LRESET*
U4900
44B4
C7
D8
OMIT
44B4
SMC_CPU_ISENSE
SMC_CPU_VSENSE
SMC_GPU_ISENSE
SMC_GPU_VSENSE
SMC_DCIN_ISENSE
SMC_PBUS_VSENSE
SMC_BATT_ISENSE
SMC_NB_1V25_ISENSE
P13
65C6
OUT
D9
B9
(OC)
(1 OF 4)
OUT
AVREF
AVREF
P64/KIN4*
P15
P16
E12
OUT
P14
C14
D15
LPC_AD<0>
LPC_AD<1>
LPC_AD<2>
LPC_AD<3>
LPC_FRAME_L
SMC_LRESET_L
PCI_CLK33M_SMC
INT_SERIRQ
SMC_GFX_THROTTLE_L
SMC_SYS_LED
OUT
SMB_MGMT_DATA
BI
44B4 SMC_P43
44B4 SMC_P44
44A4 SMC_P45
44B4 SMC_P46
SMC_SYS_KBDLED
OUT
B15
A15
44B4
P62/KIN2*
P63/KIN3*
L15
B14
P12
P13
BGA
SMC_PM_G2_EN
SMC_ADAPTER_EN
SMC_P62
SMC_P63
SMC_P64
PM_LAN_PWRGD
SMC_PROCHOT_3_3_L
SMC_P67
C4907
0.47UF
D2
OUT
24C3
L14
B4
59C7
L13
P61/KIN1*
A4
IN
OUT
P60/KIN0*
SMC_H8S2116
A13
24C2
U4900
P11
B13
P10
C13
F13
IN
B12
F12
PM_LAN_ENABLE
SMC_RSTGATE_L
ALL_SYS_PWRGD
RSMRST_PWRGD
44B4 SMC_P14
PM_RSMRST_L
IMVP_VR_ON
PM_PWRBTN_L
R4
OUT
P4
OUT
D1
24C2
VCC
VCC
20%
10V
CERM
402
OMIT
44A4
0.1UF
VCC
C4920
N15
PP3V3_S5_SMC_AVCC
MIN_LINE_WIDTH=0.25 MM
MIN_NECK_WIDTH=0.20 MM
VOLTAGE=3.3V
N14
5%
1/16W
MF-LF
402
AVCC
4.7
AVCC
SMC_VCL
R8
R7
PH0/EXIRQ6*
E1
PH1/EXIRQ7*
PH2/FWE
F3
PH3/EXEXCL
C4
PH4
PH5
D4
K2
(OC)
(OC)
(OC)
(OC)
(OC)
(OC)
SMC_PG0
SMC_SMS_INT
SMB_BSA_DATA
SMB_BSA_CLK
SMB_A_S3_DATA
SMB_A_S3_CLK
SMB_B_S0_DATA
SMB_B_S0_CLK
SMC_PROCHOT
SMC_THRMTRIP
SMC_FWE
ALS_GAIN
SMC_PH4
SMS_ONOFF_L
IN
45B3
IN
IN
44D5
44D5
44D5
OUT
IN
44C5
44B5
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
44A4
44B4
IN
45C1
44A5
OUT
6C1 66A8
OUT
44A4
OUT
66B8
OUT
44A4
IN
51A8
44B8
44A8
44A8
44A8
45C5
44A8
44A8
BI
47C3
44A8 6A7
BI
47C3
44A8
BI
47D3
44A8
BI
47D3
44B5
BI
47C6
44B5
BI
47C6
44B5
44D8
OUT
45B6
44C8
OUT
45B5
IN
45C5
OUT
44B4
OUT
51C7
M11
PD0/AN8
P11
R11
PD1/AN9
PD2/AN10
N11
PD3/AN11
44C8
P10
44A5
R10
PD4/AN12
PD5/AN13
N10
PD6/AN14
M10
PD7/AN15
B3
(4 OF 4)
NC_SMC_P62
NC_SMC_P63
NC_SMC_P64
NC_SMC_P81
NC_SMC_PF1
44A4
44C5
NOTE: SMS Interrupt can be active high or low, rename net accordingly.
If SMS interrupt is not used, pull up to SMC rail.
44C5
SMC_SYS_KBDLED
ALS_GAIN
SMC_EXCARD_PWR_EN
SMC_FAN_0_CTL
SMC_FAN_2_CTL
SMC_FAN_3_CTL
SMC_FAN_0_TACH
SMC_FAN_2_TACH
SMC_FAN_3_TACH
ALS_LEFT
ALS_RIGHT
SMC_PF0
SMC_BATT_VSET
SMC_SYS_VSET
SMC_RSTGATE_L
SMC_GFX_THROTTLE_L
MAKE_BASE=TRUE
SMC_GPU_ISENSE
MAKE_BASE=TRUE
SMC_GPU_VSENSE
SMC_P45
SMC_PH4
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
NC_SMC_PF0
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
NC_SMC_SYS_KBDLED
NC_ALS_GAIN
NC_SMC_EXCARD_PWR_EN
NC_SMC_FAN_0_CTL
NC_SMC_FAN_2_CTL
NC_SMC_FAN_3_CTL
NC_SMC_FAN_0_TACH
NC_SMC_FAN_2_TACH
NC_SMC_FAN_3_TACH
NC_ALS_LEFT
NC_ALS_RIGHT
NC0
NC1
NC12
NC13
F15
NC2
NC3
NC14
NC15
C12
L3
N4
NC4
NC16
C5
M5
NC17
NC18
A3
N7
NC5
NC6
M12
NC7
NC19
E4
M13
NC20
NC21
H4
L12
NC8
NC9
K15
NC10
NC22
N8
J14
NC11
G3
H3
K3
A14
C10
B8
M9
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC_SMC_BATT_VSET
NC_SMC_SYS_VSET
NC_SMC_RSTGATE_L
NC_SMC_GFX_THROTTLE_L
SMC_GPU1_ISENSE
SMC_GPU1_VSENSE
SMC_ENRGYSTR_LDO_EN
SMC_ENRGYSTR_LDO_PGOOD
60B2 60C7
MAKE_BASE=TRUE
MAKE_BASE=TRUE
48B1
SMC
66D3
45C5 66C1
SYNC_MASTER=T9_MLB
SYNC_DATE=10/30/2006
D
APPLE INC.
DRAWING NUMBER
051-7455
SCALE
SHT
NONE
44
OF
REV.
76
01
1
C5000
0.1UF
U5000
SOT23-5
R5001C5001 1
0
0.01UF
46B4
44C3 6C2
OUT 1
CD
NC
44A8
SMC_RESET_L
OUT
44B8
46B6 44C5 44B8 41A8 6C2
46B4 44C5 44B8 41A8 6C2
57C8 44B8 6C1
57A2 44C5 6D1
CRITICAL
44A5
57A8 44B5 42C3 6B2
5%
50V
CERM
402
Y5020
C5020
15PF
SMC_XTAL
20.00MHZ
5X3.2-SM
66C1 44A2
44C5
C5021
44B8
15PF
SMC_EXTAL
Is this the best part to use?
44C3
SMC_ONOFF_L
OUT
R5010
0
R5078
470
44B8
44B8
44C5
5%
50V
CERM
402
44B5
R50941
RSMRST_PWRGD
R50531
SMC_ONOFF_L
R50281
SMC_EXCARD_OC_L
R50801
SMC_TX_L
R50811
SMC_RX_L
R50821
SYS_ONEWIRE
R50831
SMC_BS_ALRT_L
R50841
SMC_TMS
R50851
SMC_TDO
R50861
SMC_TDI
R50871
SMC_TCK
R50481
SMC_FWE
R50731
SMC_LID
SMC_ENRGYSTR_LDO_PGOODR50951
R50911
PM_LAN_PWRGD
R50981
SMC_PA0
R50991
SMC_PA1
R50901
SMC_PB0
R50891
SMC_P67
R50791
SMC_PG0
2
2
2
3.3K
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
5%
1/16W
MF-LF
2402
100K
10K
10K
10K
100K
2.0K
470K
10K
10K
10K
10K
10K
100K
10K
10K
10K
10K
10K
10K
10K
44C5
SMC_PROCHOT_3_3_L
3
5
4
R5071
3.3K
1
CPU_PROCHOT_L 5%
1/16W
MF-LF
402
Q5077
BC847BV-X-F
SOT563
CPU_PROCHOT_L_R
1
=PP3V42_G3H_SMC
1
2
5%
1/16W
MF-LF
402
VIN
VOUT
CRITICAL
PP3V3_S5_AVREF_SMC
MIN_LINE_WIDTH=0.4 MM
MIN_NECK_WIDTH=0.2 MM
VOLTAGE=3.3V
GND
10%
2 6.3V
CERM-X5R
402
44A8
44D4
66A3 44C8 6C1
C5067
0.01UF
10%
2 16V
CERM
402
C5065
C5066 1
0.47UF 10uF
20%
6.3V
X5R 2
603
R5076
10K
5%
1/16W
MF-LF
2402
C
44B5
VR5065
Q5077
BC847BV-X-F
SOT563
CPU_PROCHOT_BUF
SMC_PF3
SMC_CPU_RESET_3_3_L
R5072
0
=PP3V42_G3H_SMCVREF ISL60002-33
SOT23-3
5%
1/16W
MF-LF
2 402
R5070
SMC AVREF
Supply
NOSTUFF
7C1
PP3V3_S0
10K
=PP3V42_G3H_SMC
7D4 6A2
PP1V05_S0
GND
5%
1/10W
MF-LF
2603
R50301
SMC_GFX_OVERTEMP_L
7D7 6B2
10%
16V
CERM 2
402
NOSTUFF
=PP3V3_S0_SMC_LS
7D4
SMS_INT_L
5%
1/16W
MF-LF
2402
RN5VD30A-F
5
4
5%
1/16W
MF-LF
2402
R5000
1K
VDD
SMC_MANUAL_RST_L
NOSTUFF
NC
SMS_INT_L
SMC_TPM_RESET_L
CRITICAL
2
20%
10V
CERM 2
402
6B2
=PP3V42_G3H_SMC
GND_SMC_AVSS
R50491
R50541
SMC_BATT_TRICKLE_EN_L
SMC_ANALOG_ID
R50551
R50881
SMC_BATT_CHG_EN
SMC_BC_ACOK
R50061
100K
R50241
10K
10K
R50471
10K
R50961
R50971
2 470K
PM_SLP_S5_L
24D3 44C5
10K
SMC_EXCARD_CP
44B8
10K
SMC_CASE_OPEN
44B5
10K
SMC_ADAPTER_EN
10K
SMC_NB_1V25_ISENSE
44C5
MIN_LINE_WIDTH=0.4 MM66C2
MIN_NECK_WIDTH=0.2 MM
VOLTAGE=0V
CPU_PROCHOT_L
PM_THRMTRIP_L
TABLE_ALT_HEAD
PART NUMBER
ALTERNATE FOR
PART NUMBER
BOM OPTION
REF DES
353S1278
353S1381
VR5065
COMMENTS:
Q5001
D 6
2 G
S 1
SSM6N15FE
SOT563
TABLE_ALT_ITEM
TI REF3133
44A5
Q5001
D 3
5 G
S 4
SSM6N15FE
SOT563
SMC_PROCHOT
44A5
SMC_THRMTRIP
=PP5V_S3_SYSLED
TABLE_5_HEAD
PART#
R5075
470K
1
PBUS_SMC_VSENSE_EN_L
24D3
SUS_CLK_SB
R5011
0
1
2
5%
1/16W
MF-LF
402
44C5
2 G
62B8 58B7 44C5 35C7 33C7 24D3 IN
1/16W
MF-LF
2402
R5050
C5050
0.001UF
10%
2 50V
CERM
402
Q5050
S 1
Q5002
D 3
3.74K2
REFERENCE DESIGNATOR(S)
BOM OPTION
114S0071
R5050
NORMAL
114S0086
R5050
FANCY
TABLE_5_ITEM
1/16W
MF-LF
2402
4
MMDT3906XF
SYS_LED_EN1
DESCRIPTION
TABLE_5_ITEM
31.6
1%
Q5050
MMDT3906XF
SOT-363
R5052
QTY
SYS_LED_ILIM
D 6
PM_SLP_S3_L
R5011 CLOSE TO SB
SYS_LED_ISET
48D7
SSM6N15FE
SOT563
SMC_SUS_CLK
OUT
357
1%
1%
1/16W
MF-LF
402
Q5002
R5051
1OMIT
SOT-363
SMC SUPPORT
40C5 6B2
1%
1/16W
MF-LF
402
SYNC_MASTER=GPU SYNC_DATE=07/17/2006
SYS_LED_ANODE
OUT
0.0094A NORMAL
0.007A FANCY
SSM6N15FE
SOT563
5 G
44C8
IN
S 4
SIZE
SMC_SYS_LED
D
APPLE INC.
DRAWING NUMBER
051-7455
SCALE
SHT
NONE
45
OF
REV.
76
01
FWH_INIT_L Generation
LPC+ Connector
7C4
=PP3V3_S0_LPCPLUS
LPCPLUS
7B1 6D2
7A7 6D2
=PP3V42_G3H_LPCPLUS
=PP5V_S0_LPCPLUS
BI
BI
IN
OUT
23B5 6C2
OUT
OUT
27D1 6C2
IN
44C1 6C2
OUT
IN
OUT
IN
LPC_AD<0>
LPC_AD<1>
LPC_FRAME_L
PM_CLKRUN_L
BOOT_LPC_SPI_L
SMC_TMS
DEBUG_RESET_L
SMC_TRST_L
SMC_TDO
SMC_MD1
SMC_TX_L
2
4
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
1.3K
5%
1/16W
MF-LF
2 402
SM1
R5191
330
J5100
R5192
F-ST-5047
6C2
FWH_INIT_L
PCI_CLK33M_LPCPLUS
IN
LPCPLUS
CRITICAL
LPCPLUS
5%
1/16W
MF-LF
2 402
LPCPLUS
3
LPC_AD<2>
LPC_AD<3>
INT_SERIRQ
PM_SUS_STAT_L
SMC_TDI
SMC_TCK
SMC_RESET_L
SMC_NMI
SMC_RX_L
LINDACARD_GPIO
BI
BI
Q5190
BC847BV-X-F
SOT563
4
BI
IN
OUT
OUT
OUT
OUT
6C2 44C1
OUT
OUT
CPU_INIT_LS3V3
LPCPLUS
LPCPLUS
6
Q5190
BC847BV-X-F
R5190
2
SOT563
CPU_INIT_R_L
330
CPU_INIT_L
IN
5%
1/16W
MF-LF
402
516S0416
SYNC_MASTER=WFERRY
SYNC_DATE=06/01/2006
D
APPLE INC.
DRAWING NUMBER
051-7455
SCALE
SHT
NONE
46
OF
REV.
76
01
7C4
R52001
4.7K
U2300
(MASTER)
73A3 24D5
SMB_CLK
73A3 24D5
SMB_DATA
=PP3V3_S0_SMBUS_SB
ICH8-M
5%
1/16W
MF-LF
402 2
R5201
4.7K
Clock Chip
R52501
4.7K
U4900
(MASTER)
5%
1/16W
MF-LF
402 2
SMBUS_SB_SCL
=SMBUS_CK505_SCL
28B6
44B8
SMB_0_S0_CLK
76C3
SMBUS_SB_SDA
=SMBUS_CK505_SDA
28B6
44B5
SMB_0_S0_DATA
76C3
MAKE_BASE=TRUE
MAKE_BASE=TRUE
NOTE: SMC RMT bus remains powered and may be active in S3 state
7A4
U5500
SMBUS_SMC_0_S0_SCL
THRM_HEATPIPE_SMB_CLK
SMBUS_SMC_0_S0_SDA
THRM_HEATPIPE_SMB_DATA
MAKE_BASE=TRUE
MAKE_BASE=TRUE
49D4
49D4
=PP3V3_S3_SMBUS_SMC_A_S3
R52701
SMC
5%
1/16W
MF-LF
2 402
=PP3V3_S0_SMBUS_SMC_0_S0
SMC
SLG8LP537V: U2900
(Write: 0xD2 Read: 0xD3)
5%
1/16W
MF-LF
2 402
R5271
100K
U4900
(MASTER)
100K
5%
1/16W
MF-LF
402 2
44A5
SMB_A_S3_CLK
76C3
44A5
SMB_A_S3_DATA
76C3
5%
1/16W
MF-LF
2 402
SMBUS_SMC_A_S3_SCL
MAKE_BASE=TRUE
SMBUS_SMC_A_S3_SDA
MAKE_BASE=TRUE
SO-DIMM "A"
J3100
(Write: 0xA0 Read: 0xA1)
=I2C_SODIMMA_SCL
30A6
=I2C_SODIMMA_SDA
30A6
=PP3V3_S0_SMBUS_SMC_B_S0
7B1
SO-DIMM "B"
=I2C_SODIMMB_SCL
31A6
=I2C_SODIMMB_SDA
31A6
R52601
SMC
J3200
(Write: 0xA4 Read: 0xA5)
4.7K
U4900
(MASTER)
5%
1/16W
MF-LF
402 2
44A5
SMB_B_S0_CLK
76C3 6B2
44A5
SMB_B_S0_DATA
76C3 6B2
CPU Temp
R5261
4.7K
5%
1/16W
MF-LF
2 402
SMBUS_SMC_B_S0_SCL
THRM_CPU_SMB_CLK
49B4
SMBUS_SMC_B_S0_SDA
THRM_CPU_SMB_DATA
49B4
MAKE_BASE=TRUE
R52801
SMC
EMC1043-5: U5520
(Write: 0x98 Read: 0x99)
MAKE_BASE=TRUE
=PP3V42_G3H_SMBUS_SMC_BSA
8.2K
5%
1/16W
MF-LF
402 2
44A5
SMB_BSA_CLK
76C3
44A5
SMB_BSA_DATA
76C3
Battery
R5281
8.2K
U4900
(MASTER)
J6950
(Write: 0x16 Read: 0x17)
5%
1/16W
MF-LF
2 402
SMBUS_SMC_BSA_SCL
=SMBUS_BATT_SCL
57A2
SMBUS_SMC_BSA_SDA
=SMBUS_BATT_SDA
57A2
MAKE_BASE=TRUE
MAKE_BASE=TRUE
AIRPORT
J3400
=SMB_AIRPORT_CLK
33B3
=SMB_AIRPORT_DATA
33B3
51B6 7A4
=PP3V3_S3_SMBUS_SMC_MGMT
SMC
U4900
SMC MGMT Bus
44C5
SMB_MGMT_CLK
44C8
SMB_MGMT_DATA
R52321
10K
5%
1/16W
MF-LF
402 2
SMS
R5233
10K
U5930
5%
1/16W
MF-LF
2 402
76C3
76C3
SMBUS_SMC_MGMT_SCL
MAKE_BASE=TRUE
SMBUS_SMC_MGMT_SDA
MAKE_BASE=TRUE
=I2C_SMS_SCL
51A6
=I2C_SMS_SDA
51A6
7D1
=PP3V3_S5_SMBUS_SB_ME
R52301
ICH8-M
10K
U2300
(MASTER?)
73A3 24D5
SMB_ME_CLK
73A3 24D5
SMB_ME_DATA
5%
1/16W
MF-LF
402 2
SMBUS CONNECTIONS
R5231
SYNC_MASTER=WFERRY
10K
5%
1/16W
MF-LF
2 402
SYNC_DATE=06/01/2006
SMBUS_SB_ME_SCL
MAKE_BASE=TRUE
SMBUS_SB_ME_SDA
MAKE_BASE=TRUE
D
APPLE INC.
DRAWING NUMBER
051-7455
SCALE
SHT
NONE
47
OF
REV.
76
01
2
=PPVIN_S5_CPU_IMVP
PBUS_S0_SMC_VSENSE
D
G
1
59B6 59A4
SOT-723
R5307
0
1
IMVP6_DROOP
SSM3J15FV
Q5350
R5305
30.1K2
1
IMVP6_CPU_ISENSE_P
5%
1/16W
MF-LF
402
R5350
27.4K
1%
1/16W
MF-LF
2 402
45A5
NOSTUFF
C5304
0.1UF
C5301
0.1UF
SMC_PBUS_VSENSE
5.49K
1%
C5350
0.22UF
10%
2 6.3V
CERM-X5R
402
1/16W
MF-LF
2 402
=PP3V3_S0_CPUPOWER
7C4
20%
10V
CERM
402
44C5
R5351
1%
1/16W
MF-LF
402
CPU_ISENSE_R_P 1
GND_SMC_AVSS
59B6 59A4
R5308
0
IMVP6_VO 1
R5306
30.1K
1
IMVP6_CPU_ISENSE_N
5%
1/16W
MF-LF
402
NOSTUFF
1
C5355
CPU_ISENSE_R_N 3
1%
1/16W
MF-LF
402
CRITICAL
+
V+
U5300
HPA00141AIDCKR
R5302
SC70-5
4.53K
4
1
2
CPU_ISENSE_OUT_R
1%
1/16W
MF-LF
402
V2
SMC_CPU_ISENSE
1
44C5 59C7
C5302
0.22UF
20%
2 6.3V
X5R
402
0.1UF
20%
2 10V
CERM
402
R5300
1M
1%
1/16W
MF-LF
402
20%
2 10V
CERM
402
PBUS_SMC_VSENSE_EN_L
DRIVEN LOW IN S0
10%
50V
CERM
402
GND_SMC_AVSS
1
R5303
C5303
470PF 1M
10%
2 50V
CERM
402
1%
1/16W
MF-LF
2402
=PPVCORE_S0_CPU
R5312
4.53K
1
SMC_CPU_VSENSE
1%
1/16W
MF-LF
402
6B2 44C5
C5312
0.22UF
C5312 CLOSE TO SMC
20%
2 6.3V
X5R
402
GND_SMC_AVSS
R5381
=PPVCORE_S0_CPU
21C5 17D5 17B7 7B7
R5343
1.00
1
7A7
CRITICAL
=PP5V_S0_ISENSECAL
SI3446DV
TSOP-LF
CRITICAL
U5302
44B8
IN
2
ISENSE_CAL_EN
R5342
5 SN74AHCT1G125DCKRE4
1K 2
4 ISENSE_CAL_EN_5V
1
SC70-5
5%
1/16W
3 1
MF-LF
402
ISENSE_CAL_EN_5V_R3
21206
1
2
5
6
44A2
1%
1/16W
MF-LF
402
1%
1/4W
MF-LF
Q5300
SMC_GPU1_VSENSE
=PPVCORE_S0_NB_GFX 14.53K
2
CPUVCORE_ISENSE_CAL
C5376
0.22UF
20%
2 6.3V
X5R
MIN_LINE_WIDTH=0.50 mm
MIN_NECK_WIDTH=0.20 mm
402
GND_SMC_AVSS
SYNC_MASTER=GPU
SYNC_DATE=07/17/2006
D
APPLE INC.
DRAWING NUMBER
051-7455
SCALE
SHT
NONE
48
OF
REV.
76
01
PP3V3_S0_THRM_HEATPIPE_F
PLACE C5501 NEXT
1
TO U5500 VDD
0.1UF
10%
2 16V
X5R
402
CRITICAL
J5550
78171-0004
M-RT-SM
5
PLACE C5510
NEXT TO U5500
2
3
4
6A1
CRITICAL
=PP3V3_S0_THRM_SNR
7C4 49C2
5%
1/16W
MF-LF
402
C5501 C5502
1
1UF
10%
2 6.3V
CERM
402
U5500
EMC1043-5
C5510
0.0022UF
10%
2 50V
CERM
402
THRM_HEATPIPE_N
1
2
DP1
DN1
3
4
DP2
MSOP
SMCLK
SMDATA
8
7
47D3
47D3
THRM_HEATPIPE_SMB_CLK
THRM_HEATPIPE_SMB_DATA
ADDR= 1001 100B
IO
IO
DN2
GND
518S0521
1. ROUTE DXP AND DXN DIFFERENTIALLY
2. ROUTE GROUNDED GAURD TRACES AROUND THE DXP/DXN DIFF PAIR
3. 10 MIL TRACE WIDTHS AND 10MIL SPACING BETWEEN THE GAURD
6A1
C5511
0.0022UF
10%
2 50V
CERM
402
LAYOUT NOTE:
LAYOUT NOTE:
CPU_THERMD_N ON SAME
CPU_THERMD_N
LAYER.
THRM_FINSTACK_P
PLACE C5511
NEXT TO U5500
6A1
THRM_FINSTACK_N
R5524
33
PP3V3_S0_THRM_CPU_F
1
C5522
0.1UF
10%
10 MIL TRACE
2 16V
X5R
10 MIL SPACING
OUT
9C6
402
C5523
1UF
C
=PP3V3_S0_THRM_SNR 7C4
49D2
5%
1/16W
MF-LF
402
10%
2 6.3V
CERM
402
CPU_THERMD_P
CRITICAL
1
IN
9C6
C5520
0.0022UF
10%
2 50V
CERM
402
CPU_THERMD_N
6A1
THRM_DIMM_DX_F_P
10
NOSTUFF
C5524
0.0022UF
10%
2 50V
CERM
402
C5521
0.0022UF
VDD
U5520
EMC1043-5
1
2
DP1
DN1
3
4
DP2
MSOP
SMCLK
SMDATA
8
7
47C3
47C3
THRM_CPU_SMB_CLK
THRM_CPU_SMB_DATA
ADDR= 1001 100B
IO
IO
DN2
GND
10%
2 50V
CERM
402
1
6A1
1%
1/16W
MF-LF
402
BC846BM3T5G
SOT732-3
THRM_DIMM_DX_P
THRM_DIMM_DX_N
R5522
CRITICAL
Q5520
6
1. ROUTE DXP AND DXN DIFFERENTIALLY
2. ROUTE GROUNDED GAURD TRACES AROUND THE DXP/DXN DIFF PAIR
3. 10 MIL TRACE WIDTHS AND 10MIL SPACING BETWEEN THE GAURD
THRM_DIMM_DX_F_N
R5523
10
1%
1/16W
MF-LF
402
TEMPERATURE SENSE
SYNC_MASTER=GPU
SYNC_DATE=06/21/2006
D
APPLE INC.
DRAWING NUMBER
051-7455
SCALE
SHT
NONE
49
OF
REV.
76
01
7A7 6D2
7C4 6D2
=PP5V_S0_FAN_RT
=PP3V3_S0_FAN_RT
R5660 1
47K
5%
R5665
44A8 6D2
1/16W
MF-LF
402
78171-0004
M-RT-SM
NC 5
1
2
3
4
147K2 FAN_RT_TACH
SMC_FAN_1_TACH
6D2
5%
1/16W
MF-LF
402
NC
R5661 1
SSM3K15FV
D
3
SMC_FAN_1_CTL
SOD-VESM
44A8 6D2
5V DC
TACH
MOTOR CONTROL
GND
518S0521
Q5660
1/16W
MF-LF
402
100K
5%
CRITICAL
J5601
6D2
FAN_RT_PWM
Fan
SYNC_MASTER=ENET
SYNC_DATE=11/10/2005
D
APPLE INC.
DRAWING NUMBER
051-7455
SCALE
SHT
NONE
50
OF
REV.
76
01
PAGE NOTES
INPUT
=PP3V3_S3_SMS - 3.3V POWER FOR SMS (STAYS ALIVE IN SLEEP)
SMS_ONOFF_L - CONNECT TO SMC TO BE ABLE TO PUT SMS INTO LOW-POWER MODE
OUTPUT
SMS_ACC_*_AXIS - ACCELEROMETER OUTPUT TO SCU
PAGE HISTORY
5/19/2005
7/26/2005
7/26/2005
7/26/2005
Desired Orientation
(Placed on board bottom side)
Package Top
1
7A4
+Y
=PP3V3_S3_SMS
+X
NC
C5920
0.1UF
+Z (up)
10%
16V 2
X5R
402
CRITICAL
3 12
VDD VMUX
U5920
KXPA42050
DFN
SMS_ACC_SELFTEST
44A5
9 SELF
OUTPUTX
8 PS
OUTPUTY
10 S1
11 S0
OUTPUTZ
TEST
SMS_ONOFF_L
R5921
SMS_X_AXIS
SMS_Y_AXIS
SMS_Z_AXIS
NC1 1
NC2 2
NC13 13
NC14 14
10K
5%
1/16W
MF-LF
2402
GND
NC
NC
NC
NC
THRML
PAD
44A8
44A8
1 C5905 1 C5906
C5904
0.033UF 0.033UF 0.033UF
10%
2 16V
X5R
402
15
44A8
10%
2 16V
X5R
402
10%
2 16V
X5R
402
Desired Orientation
(Placed on board bottom side)
Package Top
+Z (UP)
+Y
+X
=PP3V42_G3H_SMC
NOSTUFF
R5930
10K
5%
47B1
44B5
=I2C_SMS_SCL
6 SCK
7 SDO
1/16W
MF-LF
2 402
VDD
47B1
=I2C_SMS_SDA
8 SDI
SMC_SMS_INT
U5930
BMA150
LGA
CRITICAL
1/16W
MF-LF
2 402
NC
12 NC
C5931
0.022UF
10%
16V
CERM-X5R
402
C5932
16V
X5R
402
0.1UF
10%
1 NC
10 NC
GND
10K
5%
11 NC
RESERVED
5 CSB
VDDIO
4 INT
R5931
=PP3V3_S3_SMBUS_SMC_MGMT
2
47C3 7A4
SMS
SYNC_MASTER=SMC SYNC_DATE=08/23/2005
D
APPLE INC.
DRAWING NUMBER
051-7455
SCALE
SHT
NONE
51
OF
REV.
76
01
7D1
=PP3V3_S5_ROM
R61001
3.3K
5%
1/16W
MF-LF
402 2
73A3 23C5
73A3 23C5
IN
5%
1/16W
MF-LF
2 402
0.1UF
10%
16V
X5R 2
402
CRITICAL
VDD
U6100
73A3
SPI_A_SCLK_R
R6191
1
15
SOI
SCK
SI
SO
SST25VF016B
73A3
SPI_CE_L<0>
5%
R6101 C6100 1
3.3K
16MBIT
R6190 close to SB
R6190
15 2
SPI_SCLK_R 1
IN
5%
1/16W
MF-LF
SPI_CE_R_L<0> 402
402
SPI_A_WP_L
SPI_A_HOLD_L
3
7
CE*
WP*
HOLD*
R6114
OMIT
73A3
SPI_A_SO_R 1
15
5%
1/16W
MF-LF
402
VSS
5%
1/16W
MF-LF
402
SPI_SO
OUT
23C5 73A3
SPI ROMs
SYNC_MASTER=WFERRY
SYNC_DATE=04/26/2006
D
APPLE INC.
DRAWING NUMBER
051-7455
SCALE
SHT
NONE
52
OF
REV.
76
01
AUDIO CODEC
APPLE P/N 353S1538
L6202
MIN_LINE_WIDTH=0.40MM
MIN_NECK_WIDTH=0.20MM
VOLTAGE=4.5V
FERR-220-OHM
PP4V5_AUDIO_ANALOG
53A3
0402
MIN_NECK_WIDTH=0.20MM
VOLTAGE=3.3V
2
0402
CRITICAL
C6200 1
1UF
MIN_NECK_WIDTH=0.20MM
53C8
CODEC_DVDD
C6201
0.001UF
10%
53D6
NO STUFF
8A5 6D1
IN
ACZ_BITCLK
ACZ_SYNC
ACZ_SDATAOUT
R6204
R6270
100K
8A5 6D1
5%
1/16W
MF-LF
2 402
OUT
54A8
R6271
ACZ_SDATAIN<0>
39
CODEC_SDATA_IN
5%
1/16W
MF-LF
402
AUD_GPIO_0
AUD_GPIO_1
5%
1/16W
MF-LF
2 402
BCLK
SYNC
SDATA_OUT
SDATA_IN
2
3
23
24
PORT-C-L
PORT-C-R
AUD_BI_PORT_D_L
AUD_BI_PORT_D_R
35
36
PORT-D-L
54B8
54C8
NC_BAL_IN_L
NC_BAL_IN_COM
NC_BAL_IN_R
NO_TEST18
NO_TEST19
NO_TEST20
U6200
ALC885Q-VB3-GR
REV B3
ACZ_RST_L
16 NO_TEST
17 NO_TEST
30 NO_TEST
33
14 NO_TEST
15 NO_TEST
31 NO_TEST
28
21
22
NC_AUD_BI_PORT_F_L
NC_AUD_BI_PORT_F_R
NC_AUD_VREF_PORT_F
29 NO_TEST
32 NO_TEST
NC_AUD_VREF_PORT_C
NC_AUD_VREF_PORT_D
PORT-F-R
PORT-E-L
PORT-E-R
PORT-E-VREFO
PORT-B-VREFO
PORT-B-L
RESET*
PORT-B-VREFO2
PORT-G-R
PORT-H-L
CRITICAL
AVSS2
VREF
JDREF
NC
AUD_SPDIF_I
AUD_SENSE_A
AUD_SENSE_B
55B3
56A8 56C8
56C8
56C4
56C4
AUD_VREF_PORT_A
AUD_VREF_PORT_B
AUD_BI_PORT_B_L
AUD_BI_PORT_B_R
56B4
56A4
56A4
NC_AUD_BI_PORT_G_L
43 NO_TEST
44
AUD_BI_PORT_G_R
54A8
NC_AUD_BI_PORT_H_L
NC_AUD_BI_PORT_H_R
45 NO_TEST
46 NO_TEST
AUD_CODEC_VREF
27
40 AUD_CODEC_JDREF
37 NC_VRP
1
R6209
100K
5%
1/16W
MF-LF
2 402
R6205
NO_TEST
20.0K
1%
1/16W
MF-LF
2 402 CRITICAL
C6210
R6201
10%
16V
TANT
SMA-LF
5%
1/16W
MF-LF
2 402
C6212
0.001UF
3.3UF
=GND_AUDIO_CODEC
AUD_SPDIF_OUT 55D3
56C2
56B1 56A8 56A4 55B3 54C8 54B8 54A8 53D3 53A7 8B4
56C4 56B8 56B5 56B4
39
NC_AUD_BI_PORT_E_L
NC_AUD_BI_PORT_E_R
NC_AUD_VREF_PORT_E
NO STUFF
8B4 53A7 53B7 54A8 54B8 54C8 55B3 56A4 56A8 56B1 56B4
56B5 56B8 56C4
AUD_BI_PORT_A_L
AUD_BI_PORT_A_R
26
42
49
10%
16V
2 X5R
402
DVSS
THRM_PAD
0.1UF
5%
1/16W
MF-LF
2 402
AVSS1
PORT-H-R
C6208
100K
4
7
R6203
=GND_AUDIO_CODEC
5%
1/16W
MF-LF
402
PORT-F-L
CD-GND
CD-R
11
0.001UF
39
41
PORT-G-L
IN
AUD_SPDIF_O
48
47
PORT-A-L
PORT-A-R
PORT-C-VREFO
8A5 6C1
C6207
20%
2 50V
CERM
402
20%
6.3V 2
POLY
CASE-B2
13
34
CD-L
BEEP
150UF
SENSE_A
SENSE_B
PORT-F-VREFO
PORT-A-VREFO/DCVOL
PORT-D-R
12
C6205 1
CRITICAL
PORT-B-R
BEEP
0.001UF
OMIT
CRITICAL
R6206
SPDIFO
SPDIFI/EAPD/MIDI-I/DMIC-R
GPIO0/DMIC-CLK
GPIO1/DMIC-L
AUD_BI_PORT_C_L
56A1 AUD_BI_PORT_C_R
C6206
10%
2 50V
CERM
402
20%
6.3V 2
POLY
CASE-B2
QFN
56B1
10K
6
10
5
8
AVDD1
IN
DVDD
IN
150UF
10%
2 50V
CERM
402
DVDD_IO
CODEC_DVDD
8A5 6C1
8A5 6C1
OMIT
CRITICAL
C6204 1
1
9
402
C6203
0.001UF
10%
2 50V
CERM
402
6.3V
CERM 2
AVDD_ADC_DAC
25
38
L6201
FERR-220-OHM
AVDD2
MIN_LINE_WIDTH=0.30MM
MIN_NECK_WIDTH=0.20MM
VOLTAGE=3.3V
7C4 =PP3V3_S0_AUDIO
10%
50V
2 CERM
402
MIN_LINE_WIDTH=0.30 MM
MIN_NECK_WIDTH=0.20 MM
VOLTAGE=0V
U6201
L6200
FERR-220-OHM
=PP5V_S0_AUDIO
AUD_4V5_REG_IN
1
2
8
0402
R6202
=PP3V3_S0_AUDIO
1K
GND THRM_PAD
AUD_REG_SHDN_L
5%
1/16W
MF-LF
402
CRITICAL
C6220
0.1UF
10%
16V
2 X5R
402
OUT1
OUT2
NR/FB
LREG_TPS79501DRB
SON
IN1
IN2
EN
C6221
10UF
20%
6.3V 2
X5R
603
C6223
0.001UF
PP4V5_AUDIO_ANALOG
3
4
5
4V5_REG_FB
NC
R6210
80.6K
1%
1/16W
MF-LF
2 402
MIN_LINE_WIDTH=0.30 MM
MIN_NECK_WIDTH=0.20 MM
VOLTAGE=5V
VOUT=1.2246V*[1+(R6210/R6211)]=4.58V
R6211
53D3
C6224
15PF
5%
50V
2 CERM
402
AUDIO: CODEC
29.4K
10%
2 50V
CERM
402
1%
1/16W
MF-LF
2 402
SYNC_MASTER=M70AUDIO
56B1 56A8 56A4 55B3 54C8 54B8 54A8 53D3 53B7 8B4
56C4 56B8 56B5 56B4
NO STUFF
R6200
1
5%
1/16W
MF-LF
402
D
APPLE INC.
DRAWING NUMBER
051-7455
SCALE
SHT
NONE
53
OF
REV.
76
01
SATELLITE
APN:353S1595
SATELLITE
SUB
GAIN
D
MIN_LINE_WIDTH=0.30 mm
MIN_NECK_WIDTH=0.20 MM
54C4 SPKRAMP_R_P_OUT
VOLTAGE=5V
MIN_LINE_WIDTH=0.60 MM
MIN_NECK_WIDTH=0.20 MM
6D1 =PP5V_S0_AUDIO_AMP
MIN_LINE_WIDTH=0.30 mm
MIN_NECK_WIDTH=0.20 MM
54C4 SPKRAMP_R_N_OUT
AUD_BI_PORT_D_R
1uF
10%
6.3V
CERM 2
402
C6610
FERR-1000-OHM
1
C6607 1
CRITICAL
L6610
AUD_SPKRAMP_INR_L
2
0402
MAX9705_R_N
1UF
10
PVDD
2 IN+
3 IN-
OUT+
OUTSYNC
5 SHDN*
100
5%
1/16W
MF-LF
2 402
54B4
54C8 54A6
FERR-1000-OHM
1
AUD_SPKRAMP_INL_L
0.047UF
0402
10%
6.3V
CERM 2
402
1UF
54A4 54B4
U6620
TDFN1
OUT+
OUT-
CRITICAL SYNC
10%
16V
X7R 2
402
SPKRAMP_THERMPLANE
PP5V_S0_AUDIO_F
C6606
AUD_SPKRAMP_INSUB_L
L6611
AUD_GPIO_0
AUD_SPKRAMP_INSUB
MAX9705_SUB_N
10%
16V
X5R
402
FERR-1000-OHM
1
10%
6.3V
CERM 2
402
C6630
0.1UF
1
VDD
1uF
CRITICAL
FERR-1000-OHM
0402
IN
OUT
6B1 55C2
MIN_LINE_WIDTH=0.30 mm
MIN_NECK_WIDTH=0.20 MM
SPKRAMP_SUB_P_OUT
MIN_LINE_WIDTH=0.30 mm
MIN_NECK_WIDTH=0.20 MM
SPKRCONN_SUB_P_OUT
R6680
2
OUT
6A1 55C2
5%
1/16W
MF-LF
402
=PP5V_S0_AUDIO_AMP
IN
1UF
U6630
OUT+
OUTCRITICAL SYNC
5 SHDN*
0402
R6610
10K
5%
1/16W
MF-LF
402 2
4
54B8 54C8
11
120UF
OUT
6A1 55C2
SUB-TWEETER
SPKRAMP_SUB_P_OUT 54B3
SPKRAMP_SUB_N_OUT 54B3
SPKRAMP_SYNC1 54C4
5%
1/16W
MF-LF
402
20%
POLY
CASE-B2
8
9
MIN_LINE_WIDTH=0.30 mm
MIN_NECK_WIDTH=0.20 MM
SPKRCONN_SUB_N_OUT
R6681
R6602
100
5%
1/16W
MF-LF
CRITICAL
C6631 1
2 402
0.1UF
10%
16V
X5R 2
402
=GND_AUDIO_CODEC
C6605
2 6.3V
TDFN1
2 IN+
3 IN-
THRML
GND PGND PAD
AUD_SPKRAMP_SHUTDOWN_L
10%
6.3V
CERM 2
402
10
PVDD
MIN_LINE_WIDTH=0.30 mm
MIN_NECK_WIDTH=0.20 MM
54A4 SPKRAMP_SUB_N_OUT
OMIT
CRITICAL
1
MAX9705
2
1
SPKRAMP_SYNC2 54B4
SPKRAMP_THERMPLANE
54A4
54A4 54C4
=GND_AUDIO_AMP
L6630
53C7
C6609 1
53B2
MIN_LINE_WIDTH=0.30 mm
MIN_NECK_WIDTH=0.20 MM
SPKRCONN_L_N_OUT
R6671
THRML
=GND_AUDIO_CODEC
AUD_BI_PORT_G_R
6B1 55C2
SPKRAMP_L_P_OUT 54C3
SPKRAMP_L_N_OUT 54C3
SPKRAMP_SYNC2 54A4
54C8 54C4
C
OUT
LEFT SATELLITE
2 6.3V
0.047UF
MAX9705
CRITICAL
MIN_LINE_WIDTH=0.30 mm
MIN_NECK_WIDTH=0.20 MM
SPKRAMP_L_N_OUT
C6603
20%
POLY
CASE-B3-SM
6.3V
5 SHDN*
C6621
5%
1/16W
MF-LF
402
47UF
10%
CERM 2
402
10
PVDD
2 IN+
3 IN-
MAX9705_L_N
10%
16V
X7R
402
AUD_SPKRAMP_SHUTDOWN_L
1
VDD
1uF
AUD_SPKRAMP_INL
OMIT
CRITICAL
C6604 1
AUD_BI_PORT_D_L
MIN_LINE_WIDTH=0.30 mm
MIN_NECK_WIDTH=0.20 MM
SPKRCONN_L_P_OUT
R6670
5%
1/16W
MF-LF
402
54B4
=PP5V_S0_AUDIO_AMP
PP5V_S0_AUDIO_F
IN
MIN_LINE_WIDTH=0.30 mm
MIN_NECK_WIDTH=0.20 MM
SPKRAMP_L_P_OUT
SPKRAMP_SYNC1 54A4
C6608 1
53C7
6B1 55C2
54D3
=GND_AUDIO_AMP
C6620
OUT
54C3
R6601
SPKRAMP_THERMPLANE
L6620
RIGHT SATELLITE
=GND_AUDIO_CODEC
CRITICAL
5%
1/16W
MF-LF
402
C6611 1
MIN_LINE_WIDTH=0.30 mm
MIN_NECK_WIDTH=0.20 MM
SPKRCONN_R_N_OUT
R6661
C6601
SPKRAMP_R_P_OUT
SPKRAMP_R_N_OUT
8
9
54C4 54B8
6B1 55C2
20%
POLY
CASE-B3-SM
10%
16V
X7R 2
402
2 6.3V
THRML
CRITICAL
0.047UF
47UF
10%
6.3V
CERM 2
402
U6610
CRITICAL
AUD_SPKRAMP_SHUTDOWN_L
54B8 54A6
54B8 54C8
OMIT
CRITICAL
1
TDFN1
10%
16V
X7R
402
1
VDD
C6602
MAX9705
0.047UF AUD_SPKRAMP_INR
1
PP5V_S0_AUDIO_F
VOLTAGE=5V
MIN_LINE_WIDTH=0.30 MM
MIN_NECK_WIDTH=0.20 MM
5%
1/16W
MF-LF
402
IN
MIN_LINE_WIDTH=0.30 mm
MIN_NECK_WIDTH=0.20 MM
SPKRCONN_R_P_OUT
OUT
R6660
5%
1/16W
MF-LF
402
R6600
53C7
=GND_AUDIO_AMP
SYNC_MASTER=M70AUDIO
SYNC_DATE=03/12/2007
MIN_LINE_WIDTH=0.60 MM
MIN_NECK_WIDTH=0.20 MM
54C8 54B8 54A8 8A4 =GND_AUDIO_AMP
XW6600
SM
1
SPKRAMP_THERMPLANE
D
APPLE INC.
DRAWING NUMBER
051-7455
SCALE
SHT
NONE
54
OF
REV.
76
01
MIC CONNECTOR
APN:518S0392
CRITICAL
J6701
48227-0301
L6790
M-RT-SM1
4
FERR-220-OHM
=PP3V3_S0_AUDIO
IN
0402
L6700
AUD_CONNJ1_SLEEVE
PP3V3_S0_AUDIO_SPDIF
53C2
55B1 6B1
L6701
FERR-120-OHM-1.5A
55B8
55B1 6B1
FERR-120-OHM-1.5A
AUD_CONNJ1_SLEEVE_F
0402-LF
MIC_LO_CONN
MIC_HI_CONN
MIC_SHLD_CONN
FERR-1000-OHM
OMIT
AUD_CONNJ1_TIPDET
CRITICAL
J6700
SPEAKER CONNECTOR
FERR-1000-OHM
AUD_CONNJ1_RING_F
0402
1
7
AUD_CONNJ1_TIP
L6707
AUD_CONNJ1_TIP_F
AUD_CONNJ1_SLEEVEDET
NO STUFF
1
5.6V-15A
1UF
C
GND_AUDIO_SPDIF_DGND
0405
10%
2 6.3V
CERM
402
6.8V-100PF
6.8V-100PF
R6791
0
NO STUFF
CRITICAL
402
5.6V-15A
5%
1/16W
MF-LF
402
0405
CRITICAL
DZ6703
DZ6705
402
402
6.8V-100PF
DZ6701
IN
SPKRCONN_L_P_OUT
SPKRCONN_L_N_OUT
AUD_PORTA_L
BI
1
2
78171-0004
56C1
M-RT-SM
5
10K
AUD_J1_SLEEVEDET_R
OUT
56B6 56B8
IN
54B1 6A1
IN
54D1 6B1
IN
54C1 6B1
IN
SPKRCONN_SUB_P_OUT
SPKRCONN_SUB_N_OUT
SPKRCONN_R_P_OUT
SPKRCONN_R_N_OUT
4.7
1
2
3
4
APN:518S0521
AUD_J1_TIPDET_R
OUT
56C8
5%
1/16W
MF-LF
402
6.8V-100PF
1
54B1 6A1
R6701
402
DZ6702
1
DZ6704
CRITICAL
IN
54C1 6B1
J6703
5%
1/16W
MF-LF
402
CRITICAL
DZ6700
C6700
54C1 6B1
0402
APN:514-0459
56C1
R6700
AUD_CONNJ1_SLEEVEDET_F
BI
CRITICAL
0402
FERR-1000-OHM
10
M-RT-SM
3
FERR-1000-OHM
2
0402
8
9
J6702
78171-0002
L6706
FERR-1000-OHM
AUD_PORTA_R
0402
L6705
AUD_CONNJ1_RING
CRITICAL
APN:518S0519
L6704
FERR-1000-OHM
AUD_CONNJ1_TIPDET_F
L6703
F-RT-TH
2
3
55A8
0402
AUDIO-OUT-M71-MG3
SHLD_PIN
SHLD_PIN
0402-LF
L6702
VCC
GND
VIN
AUD_SPDIF_OUT
XW6705
SM
C6705
8D8
100PF
5%
2 CERM
402
=GND_CHASSIS_AUDIO_JACK
CHASSIS_AUDIO_JACK_ISOL
50V
XW6700
SM
CHASSIS_AUDIO_JACK_ISOL
AUD_J1_COM
XW6701
SM
AUD_J2_COM
AUD_J2_OPT_OUT
55D8
R6749
1
10
L6750
CRITICAL
1
FERR-1000-OHM
1
AUD_CONNJ2_RING
5
1
OUT
L6771
MIC_LO_CONN_F
FERR-1000-OHM
1
MIC_LO_CONN
0402
6B1 55D3
0402
B
L6754
L6755
AUD_CONNJ2_TIP_F
C6750
1UF
10%
2 6.3V
CERM
402
NO STUFF
CRITICAL
6.8V-100PF
5.6V-15A
2
CRITICAL
DZ6754
6.8V-100PF
402
0405
402
DZ6752
DZ6750
CRITICAL
6.8V-100PF
0405
CRITICAL
DZ6753
5.6V-15A
20%
2 6.3V
X5R
603
402
6.8V-100PF
AUD_PORTC_L
6.8V-100PF
BI
402
56B2
CRITICAL
2
R6740
2
1
4.7
AUD_J2_TIPDET_R
OUT
56A8
55C8 55C1 55A8
5%
1/16W
MF-LF
2 402
C6756
100PF
5%
2 50V
CERM
402
CHASSIS_AUDIO_JACK_ISOL
AUDIO: JACK
TABLE_5_HEAD
PART#
QTY
DESCRIPTION
REFERENCE DESIGNATOR(S)
CRITICAL
BOM OPTION
J6700
CRITICAL
NORMAL
TABLE_5_ITEM
514-0459
SYNC_MASTER=M70AUDIO
TABLE_5_ITEM
J6750
CRITICAL
NORMAL
514-0479
J6700
CRITICAL
FANCY
514-0478
J6750
CRITICAL
FANCY
SYNC_DATE=03/12/2007
TABLE_5_ITEM
TABLE_5_ITEM
MIC_SHLD_CONN
402
514-0458
CHASSIS_AUDIO_JACK_ISOL
DZ6771
6.8V-100PF
5%
1/16W
MF-LF
402
1
6B1 55D3
R6751
DZ6755
402
MIC_HI_CONN
DZ6770
5%
1/16W
MF-LF
402
DZ6751
10uF
10K
0402
R6750
AUD_CONNJ2_SLEEVEDET_F
FERR-1000-OHM
0402
56A2
NO STUFF
C6751
MIC_HI_CONN_F
CRITICAL
0402
1
0402
FERR-1000-OHM
AUD_CONNJ2_SLEEVEDET
BI
L6773
FERR-1000-OHM
MIC_HI
L6756
L6757
10
AUD_PORTC_R
OUT
FERR-1000-OHM
0402
56A6 6B1
2
0402
FERR-1000-OHM
7
6
L6772
FERR-1000-OHM
AUD_CONNJ2_RING_F
0402
APN:514-0458
AUD_CONNJ2_TIPDET_F
L6753
AUD_CONNJ2_TIP
AUD_CONNJ2_TIPDET
56A6 6B1
0402
2
4
GND_AUDIO_SPDIF_DGND
L6770
FERR-1000-OHM
MIC_LO
0402-LF
F-RT-TH
55C8
FERR-1000-OHM
AUDIO-IN-MG3-M71
SHLD_PIN
SHLD_PIN
53C2
L6752
J6750
VCC
GND
VOUT
FERR-120-OHM-1.5A
0402-LF
OMIT
8B4 53A7 53B7 53D3 54A8 54B8 54C8 56A4 56A8 56B1 56B4
56B5 56B8 56C4
L6751
FERR-120-OHM-1.5A
1
2
AUD_CONNJ2_SLEEVE_F
AUD_CONNJ2_SLEEVE
=GND_AUDIO_CODEC
AUD_SPDIF_I
5%
1/16W
MF-LF
402
PP3V3_S0_AUDIO_SPDIF
D
APPLE INC.
DRAWING NUMBER
051-7455
SCALE
SHT
NONE
55
OF
REV.
76
01
VOLUME
0X0F (15)
0X26 (38)
0X0E (14)
N/A
CONVERTER
0X05 (5)
0X25 (37)
0X04 (4)
0X06 (6)
PIN COMPLEX
0X15 (21,PORTA)
0X14 (20,PORTD)
0X16 (22,PORTG)
0X1E (30,SPDIF OUT)
MUTE CONTROL
VREF_A(100%)
GPIO 0
GPIO 0
N/A
DET ASSIGNMENT
0X15 (21,PORTA)
N/A
N/A
0X1B (27,PORTE)
MIXER
0X23 (35)
0X24 (36)
N/A
VOLUME
0X08 (8)
0X07 (7)
N/A
MUTE CONTROL
0X08 (8)
0X07 (7)
N/A
CONVERTER
0X08 (8)
0X07 (7)
0X0A (10)
PIN COMPLEX
0X1A (26,PORTC)
0X18 (24,PORTB)
0X1F (31,SPDIF IN)
VREF
N/A
VREF_B (80%)
N/A
DET ASSIGNMENT
0X1A (26,PORTC)
N/A
N/A
PORT A HP/LO
=PP5V_S0_AUDIO
OMIT
CRITICAL
C6830
100UF
1
PORT A DETECT
53C2
OUT AUD_SENSE_B
56A8 53C2
OUT AUD_SENSE_A
PP3V3_S0_AUDIO_F
AUD_OUTJACK_INSERT_L
R6801
Q6800
270K
Q6801
47K
39.2K
39.2K
1%
1/16W
MF-LF
402
1%
1/16W
MF-LF
402
SSM6N15FE
S 1
NC
C6801
MAX9890_OUTL
INL
MAX9890_OUTR
OUTR
CEXT
THM
PAD
100K 2
5%
1/16W
MF-LF
402
R6861
270K
5%
1/16W
MF-LF
2 402
S 4
L6800
=PP3V3_S0_AUDIO
PP3V3_S0_AUDIO_F
0402
Q6800
D 3
56B8 55C3
AUD_J1_SLEEVEDET_R
10%
=GND_AUDIO_CODEC
C6800
0.1UF
16V
X5R
402
S 4
R6850
C6802
PORT C LI
10%
16V
1/16W
MF-LF
402
56C4 56B8 56B5
54B8 54A8 53D3 53B7 53A7 8B4
56B4 56B1 56A8 56A4 55B3 54C8
=GND_AUDIO_CODEC
CRITICAL
C6832
R6855
6.81K
2 CERM
2.2K
VREF_PORT_B_R
2
1%
402
AUD_VREF_PORT_B
1/16W
MF-LF
55B3
IN
AUD_PORTC_L
R6836
C6853
1%
1/16W
MF-LF
402
20%
6.3V
2 X5R
603
=GND_AUDIO_CODEC
R6851
AUD_SENSE_A
55B3 6B1
IN
MIC_HI
R6813
C6851
5%
1/16W
MF-LF
402 2
R6811
AUD_INJACK_INSERT_L
270K
5%
1/16W
MF-LF
402
Q6802
SSM3K15FV
CERM
402
NC
55B3 6B1
IN
5%
1/16W
MF-LF
402
C6852
C6811
55B3
IN
XW6800
CERM
402
8B4 53A7 53B7 53D3 54A8 54B8 54C8 55B3 56A4 56A8 56B4
56B5 56B8 56C4
CRITICAL
C6833
3.3UF
AUD_BI_PORT_C_R
OUT
53C7
10%
16V
TANT
SMA-LF
53C2
NO STUFF
=GND_AUDIO_CODEC
=GND_AUDIO_CODEC
5%
50V
10%
16V
TANT
SMA-LF
AUD_PORTC_R
53C7
8B4 53A7 53B7 53D3 54A8 54B8 54C8 55B3 56A8 56B1 56B4
56B5 56B8 56C4
R6853
IN
5%
1/16W
MF-LF
402
S 2
SYNC_MASTER=M70AUDIO
NO STUFF
0.1UF
10%
X5R
100PF
MIC_SHLD_CONN
55D3 55A1 6B1
53C2
CRITICAL
AUD_J2_DET_RC
1
AUD_BI_PORT_B_R
NO STUFF
SOD-VESM
2
MIC_LO
AUD_BI_PORT_B_L
MAKE_BASE=TRUE
CRITICAL
SM
D 3
R6812
R6852
5%
1/16W
MF-LF
2 402
1%
1/16W
MF-LF
402
1 AUD_BI_PORT_C_L
OUT
27.4K
10% 16V
X5R 402
100K
10%
50V
MIC_IN
680PF
8B4 53A7 53B7 53D3 54A8 54B8 54C8 55B3 56A4 56A8 56B1
56B5 56B8 56C4
0.1uF
R6837
C6850
5%
402
CRITICAL
10K
PP3V3_S0_AUDIO_F
330
1/16W
MF-LF
27.4K
10UF
3.3UF
53C2
5%
402
CRITICAL
47K
FERR-1000-OHM
AUD_J1_SLEEVEDET_INV
0.01UF
1%
1/16W
MF-LF
402
5%
1/16W
MF-LF
402
27.4K
SOT563
AUD_J2_TIPDET_R
R6835
10K
S 1
SSM6N15FE
IN
55C3
=GND_AUDIO_CODEC
55A3
OUT
6.3V
53C2
56A8 56A4 55B3 54C8 54B8 54A8 53D3 53B7 53A7 8B4
56B8 56B5 56B4 56B1
56A8 56A4 55B3 54C8 54B8 54A8 53D3 53B7 53A7 8B4
56C4 56B8 56B4 56B1
POLY
B2
R6839
C6835
10%
16V
2 X5R
402
SOT563
402
IN
MAX9890_CEXT
NC
AUD_PORTA_R
2
20%
AUD_VREF_PORT_A
1%
1/16W
MF-LF
402
100UF
1
27.4K
C6831
0.1UF
R6803
PP3V3_S0_AUDIO_F
56C8 53C2
R6834
16V
10%
X5R
AUD_J1_SLEEVEDET_R
TDFN
INRCRITICALOUTL
D 6
=GND_AUDIO_CODEC
IN
6.3V
POLY
B2
OMIT
CRITICAL
0.1UF
56B6 55C3
VCC
GND
SSM6N15FE
SOT563
IN
55C3
OUT
AUD_J1_DET_RC
5%
1/16W
MF-LF
402
402
AUD_BI_PORT_A_L
AUD_PORTA_L
20%
U6801
SHDN*
AUD_PORTE_DET_L
Q6801
D 3
10%
2 6.3V
CERM
R6805
AUD_PORTA_DET_L
SOT563
R6802
1
SSM6N15FE
5%
1/16W
MF-LF
2 402
AUD_J1_TIPDET_R
D 6
1UF
AUD_BI_PORT_A_R
R6806
IN
IN
53C2
55C3
53C2
MAX9890BETA+
C6836
402
56C4 56B8
54B8 54A8 53D3 53B7 53A7 8B4
56B5 56B4 56B1 56A4 55B3 54C8
=GND_AUDIO_CODEC
SYNC_DATE=03/12/2007
R6854
16V
=GND_CHASSIS_AUDIO_MIC
8D8
5%
1/16W
MF-LF
402
NO STUFF
R6856
SIZE
5%
1/16W
MF-LF
402
APPLE INC.
DRAWING NUMBER
051-7455
SCALE
SHT
NONE
56
OF
REV.
76
01
DC-JACK INTERFACE
CRITICAL
D6901
HN2D01JEF
R6905
47
5%
1/8W
MF-LF
805
2
518S0526
66B2 57B2
87438-0563
M-RT-SM
CRITICAL
VOLTAGE=18.5V
MIN_LINE_WIDTH=2 MM 1
MIN_NECK_WIDTH=0.20 MM
C6902
0.01uF
6C1
44C5
45B6
66A6 57C3
3
=GND_DCIN_CHGND
ADAPTER_SENSE
S
G
D
SOT563
402
OVP
S 4
Q6999
SSM3K15FV
Q6940
R6908
R6906
102K
102K
1%
1/16W
MF-LF
2402
1%
1/16W
MF-LF
2402
5%
1/16W
MF-LF
10%
2 50V
CERM
402
R6903
1
10K
C6930
0.1UF
10%
2 25V
X5R
402
ONEWIRE_OV
LM397
10%
2 25V
X5R
402
5%
1/16W
MF-LF
2 402
ONEWIRE_ESD
R6907 1R6909
10.7K
1%
1/16W
MF-LF
2402
R6931
100K
51.1K
1%
1/16W
MF-LF
2402
D2
D1
S1
V+
=PP18V5_G3H_INRUSH7B3
VOLTAGE=18.5V
MIN_LINE_WIDTH=0.6 MM
MIN_NECK_WIDTH=0.20 MM
GATE
R6913
1 C6917 4
470K
5%
1/16W
MF-LF
2402
U6950
0.22UF
20%
2 25V
X5R
603
ACIN_ENABLE_L_DIV
U6900
TLV7211
SC70
1
2
1
TC7SZ08AFEF
5 SOT665
A
Y
V-
NC
8
7
6
5
SMC_ADAPTER_EN
2
-
R6910
5%
1/16W
MF-LF
402
D3
CRITICAL
1M
1
5%
1/16W
MF-LF
2 402
D4
S3
S2
44D5
33C7 6C1
38C6 35C7
45B3
CRITICAL
ACIN_DIV
R6933
100K
ONEWIRE_DCIN_DIV
SOT23-5
2 S
V+
U6990
R6901
1K
1%
1/16W
MF-LF
2 402
CRITICALV-
R6900
1 C6903
100K
0.001UF
2 402
C6918
0.1UF
ACIN_1V20_REF 4
1
3 D
SOD-VESM
SOI
1
D
NTK3142P
5%
1/16W
MF-LF
2 402
ONEWIRE_EN
AO4409
3
2
1
66A5 7B1
66B8 66A8
G
ONEWIRE_PWR_EN_L_DIV
5 G
SOT563
1%
1/16W
MF-LF
2 402
CRITICAL
Q6950
INRUSH LIMITER
=PP3V42_G3H_ACIN
Q6920
SSM6N15FE1 R6932
24.3K
7B3
ACIN DETECTION
2 1/16W
MF-LF
5%
1/16W
MF-LF
402
3 D
PP18V5_DCIN_ONEWIRE
G 5
Q6920
SSM6N15FE
1
SYS_ONEWIRE_BILAT
C6907
0.001UF
47K
5%
SOT723-3
4 S
SYS_ONEWIRE
6
R6904
Q6910
SSM6N15FE
R6911
D 3 100K
SOT563
10%
2 50V
CERM
402
RCLAMP2402B
NC
=PPDCIN_G3H
ONEWIRE_PWR_EN_L
1
2 SMC_BC_ACOK_ONEWIRE_R
1
PPVBATT_G3H_R
MIN_NECK_WIDTH=0.20 MM
R6902
SMC_BC_ACOK
1
NC
1/8W
MF-LF
VOLTAGE=18.5V
805
PP18V5_DCIN
MIN_LINE_WIDTH=0.6 MM
5%
1/16W
MF-LF
402
47
5%
1K
10%
2 25V
X7R
402
D6900
SC-75
8C8
PP18V5_DCIN_F
1
2
3
4
5
PPDCIN_G3H_R
R6940
CRITICAL
F6900
6AMP-24V
1206-1
J6900
66A6
45B6
SMC_BC_ACOK 6C1
44C5
57C7
66A6 6C1
ACIN_ENABLE_GATE
CRITICAL
1
BATT_POS_F
SOT665
MIN_LINE_WIDTH=0.2 MM
MIN_NECK_WIDTH=0.2 MM
R6914
330K
5%
1/16W
MF-LF
2402
ACIN_ENABLE_L
D 6
Q6910
SSM6N15FE
SOT563
2 G
S 1
G 1
TABLE_ALT_HEAD
PART NUMBER
ALTERNATE FOR
PART NUMBER
BOM OPTION
REF DES
COMMENTS:
376S0466
376S0543
Q6950
AOS MOSFET
353S1717
353S1297
U6990
TI & NATIONAL
TABLE_ALT_ITEM
TABLE_ALT_ITEM
BATTERY INTERFACE
L6901
FERR-50-OHM
SM-LF
6D1
0402
=PP3V42_G3H_LIDSWITCH
NC
10
57D5 66B2
0402-LF
6D1
SMBUS_BATT_SCL_F
NC
6D1
11
6D1
14
13
16
15
PP3V42_G3H_LIDSWITCH_F 18
20
GND_SMC_LID_F
17
600-OHM-300MA
0402
VOID
120-OHM-0.3A-EMI
12
L6907
1
BATT_POS_F
L6902
L6909
600-OHM-300MA
7B1
BATT_POS
=SMBUS_BATT_SCL
47C1
L6903
SMBUS_BATT_SDA_F
BATT_NEG
120-OHM-0.3A-EMI
0402-LF
1
SMC_BS_ALRT_L_F
=SMBUS_BATT_SDA
47C1
L6904
19
120-OHM-0.3A-EMI
0402-LF
CRITICAL
L6908
127216FA020
0402
SMC_LID
J6950
600-OHM-300MA
F-ST-SM
0.001UF
10%
2 50V
CERM
402
SMC_LID_F
C6920
0.01uF
10%
2 16V
CERM
402
C6921
57A6 8D8
0.01uF
10%
2 16V
CERM
402
=GND_BATT_CHGND
C6911
C6905
0.001UF
10%
50V
2 CERM
402
C6909
0.001UF
10%
2 50V
CERM
402
C6915
47pF
5%
2 50V
CERM
402
C6906
47pF
5%
2 50V
CERM
402
L6905
FERR-50-OHM
SM-LF
1
SMC_BS_ALRT_L
=GND_BATT_CHGND
8D8 57A6
PIN 1
D
APPLE INC.
DRAWING NUMBER
051-7455
SCALE
SHT
NONE
57
OF
REV.
76
01
CRITICAL
Q7000
FDM6296
ALTERNATE FOR
PART NUMBER
BOM OPTION
REF DES
COMMENTS:
10%
50V
CERM
402
TABLE_ALT_ITEM
376S0448
376S0445
MOSFET
CHANNEL
RDS(ON)
LOADING
0.0022UF
Q7000
P5VS0_EN
7A8 58C8
5V S0 FET
C7003
G
TABLE_ALT_HEAD
PART NUMBER
=PP5V_S0_FET
MICROFET3X33
2
5
1
7C1 =PP5V_S5_FET
D
S
R7030
100K
FDM6296
N-TYPE
15 mOhm @4.5V
4.348 A
5%
1/16W
MF-LF
=PP3V3_S0_FET
402
2
1
7D6
Q7001
FDC655BN
1
=PP3V3_S5_FET
=PP3V3_S0_FET
SOT6
2
5
6
S
MOSFET
CHANNEL
RDS(ON)
LOADING
C7004
0.0022UF
10%
50V
CERM
402
P3V3S0_EN 1
58C2 58B2
FDC655BN
N-TYPE
33 mOhm @4.5V
1.810 A
Q7004
FDC655BN
=PP5V_S5_FET
1
R7002
R7001
30.9K
4.87K
1%
1/16W
MF-LF
402
1%
1/16W
MF-LF
2 402
2
=PP3V3_S0_FET
R7003
28.7K
1%
1/16W
MF-LF
402
C7000
6.3V
10%
CERM
402
R7004
7.5K
1%
1/16W
MF-LF
2 402
0.0022UF
UVLO_A
QFN
GATE_A
UVLO_B
UVLO_C
GATE_B
GATE_C
UVLO_D
GATE_D
CRITICAL
DLY_ON_A
ENABLE_1
DLY_ON_B
DLY_ON_C
DLY_ON_D
58C4 7B8
2
=PP1V8_S0_FET
NC
NC
NC
NC
R7006
R7005
22.1K
13.7K
1
1%
1/16W
MF-LF
402
1%
1/16W
MF-LF
2 402
9
11
19
22
NC
DLY_OFF_A
NC
DLY_OFF_B
NC
NC
DLY_OFF_C
DLY_OFF_D
RESET*
10
GND
PM_SLP_S3_L
P1V8S0_EN 1
RUNSS_GATE_D
21
8
16
15
TP_DLY_ON_A
TP_DLY_ON_B
TP_DLY_ON_C
TP_DLY_ON_D
5%
1/16W
MF-LF
402
2
1
7D6 =PP3V3_S0_FET
24
5%
1/16W
MF-LF
1
402
1V25S0_RUNSS_BUF
2
D 3
1
SSM6N15FE
5 G
FDC655BN
N-TYPE
33 mOhm @4.5V
0.260 A
58C2 58B2
THML
PAD
5%
1/16W
MF-LF
402
2
1
7D6 =PP3V3_S0_FET
=PP5V_S5_FET
470K
5%
58C2
10%
16V
2 CERM
402
2 16V
CERM
402
R7007
47
NOSTUFF
0.01UF
10%
2 16V
CERM
402
0.0012UF
S 4
R7051
330
5%
1/16W
MF-LF
1
402
1V5S0_RUNSS_BUF
2
Q7007
C7023
0.022UF
10%
Q7006
D 6
2 G
S 1
1V5S0_RUNSS
D 3
SSM6N15FE
5 G
6D7 61B5
C7050
0.001UF
10%
2 50V
CERM
402
SOT563
1/16W
MF-LF
2402
C7022
C7040
10%
2 50V
CERM
402
R7061
C
64B6
RUNSS_GATE_D_L
NOSTUFF
0.01UF
1V25S0_RUNSS
SOT563
NOSTUFF 1
C7021
C7024
0.01UF 0.01UF
10%
C7030
R7040
330
Q7006
7B8 58B8
18 DLY_OFF_A
13 DLY_OFF_B
3 DLY_OFF_C
4 DLY_OFF_D
61B5
10%
2 16V
CERM
402
R7050
10K
2
5
6
7
25
10%
CERM
402
VDD
S0SEQ_BEGIN 1
MOSFET
CHANNEL
RDS(ON)
LOADING
50V
U7000
PGOOD_1V8S3 20
12
S0PWRGD_5V_DIV
17
S0PWRGD_3V3_DIV
14
S0PWRGD_1V8_DIV
C7005
1UF
ISL6130IRZA
62A3
23
=PP5V_S0_FET
S 1
R7041
100K
1.8V S0 FET
2 G
RUNSS_GATE_D_L
2
5
6
58D4 7A8
=PP1V8_S0_FET
SOT6
1
=PP1V8_S3_FET
D 6
1V05S0_RUNSS
CRITICAL
7B4
Q7007
3.3V S0 FET
5%
1/16W
MF-LF
1
402
1V05S0_RUNSS_BUF
2
SSM6N15FE
SOT563
CRITICAL
R7031
330
S 4
RUNSS_GATE_D_L
SSM6N15FE
SOT563
2 16V
CERM-X5R
402
~26MS
5%
1/16W
MF-LF
402
DEASSERTED 160MS
AFTER UVLO_D VALID
=PP3V3_S0_FET
1
R7012
100K
61A6
61A3
PGOOD_1V05S0
PGOOD_1V5S0
ALL_SYS_PWRGD_AND 3
MAKEBASE=TRUE
U7002.3 has int 90K pull-up
VDD
CRITICAL
SENSE
U7002
RESET*
TPS3808-1.25V
MR*
SOT23-6
GND
PGOOD_SEQUENCER
10%
2 16V
X5R
402
5%
1/16W
MF-LF
2402
C7001
0.1UF
CT
5
4
=PP1V25_S0_FET
7C7
ALL_SYSPWRGD_DLY
1
SYNC_MASTER=DSIMON-WF
C7002
0.001UF
ALL_SYS_PWRGD
SYNC_DATE=05/31/2006
10%
2 50V
CERM
402
APPLE INC.
DRAWING NUMBER
051-7455
SCALE
SHT
NONE
58
OF
REV.
76
01
R7112
1UF
10%
6.3V
CERM
402
10
5%
1/16W
MF-LF
402
R7120
5%
1/16W
MF-LF
402
PM_DPRSLPVR
1
2
C7196
R7145
499
ERT-J0EV474J
1%
1/16W
MF-LF
2 402
IMVP6_NTC_R
70A3
CPU_DPRSTP_L
70B3 IMVP_DPRSLPVR
27B2
IN IMVP6_PSI_L
R7106
0
5%
44C5
48C1 OUT
IN
1
SMC_CPU_ISENSE
R7146
4.53K
1% 27A7
1/16W
FROM SMC MF-LF
402
27B5 15B6
IN
OUT
39 VID2
38 VID1
37 VID0
46 DPRSTP*
45 DPRSLPVR
2 PSI*
3 IMON
59A8
UGATE1
59A8
PHASE1
59A8
LGATE1
PGND1
59A8
ISEN1
C7106
R7109
1K
1%
1/16W
MF-LF
2 402
0.001UF
R7113
IMVP6_VDIFF_RC
1
R7111
IMVP6_PHASE2
IMVP6_LGATE2
(GND)
4 RBIAS
59A4
IMVP6_VDIFF
13 VDIFF
59A4 48C5
VO
12 FB2
11 FB
VSEN
10 COMP
9 VW
RTN
17
IMVP6_DFB
18
C7113
220PF
5%
25V
CERM
402
C7107
10%
50V
CERM
1%
1/16W
MF-LF
2 402
0.001UF
402
97.6K
R7110
59A4
0.068UF
10%
10V
CERM
402
59A4
NO STUFF
1
C7116
R7118 R7117
1%
1/16W
MF-LF
2 402
10%
50V
CERM
402
4.32K
1%
1/16W
MF-LF
402
C7129
180pF
5%
2 50V
CERM
402
59C6
59C6
59C6
59C6
59C6
59C6
59C6
59C6
C7134 1
0.033UF
10%
16V
X5R
402
C7128
0.22UF
10%
6.3V
CERM-X5R
402
R7115
11K
1%
1/16W
MF-LF
2 402
C7101
33UF
20%
16V
POLY
CASED2E-SM
1
C7108
33UF
R7104
0.22uF
5%
1/16W
MF-LF
402
20%
16V
2
POLY
CASED2E-SM
C
59D8
59D4
7B1
48D7
C7199
1UF
R7101
3.65K
10%
25V
X5R
603
1%
1/16W
MF-LF
2 402
RJK0305DPB
LFPAK
(IMVP6_PHASE2)
5
CRITICAL
Q7103
RJK0301DPB
LFPAK
L7101
CRITICAL
0.36UH-30A-0.80MOHM
Q7105
MPC1055-SM
MPC1055LR36
DCR=0.8mOhm
RJK0301DPB
LFPAK
R7105
1 2 3
NO STUFF
CRITICAL
R7131
C7102
0.0022UF
10%
50V
CERM
402
R7107
0.22uF
5%
1/16W
MF-LF
402
10%
6.3V
CERM-X5R
402
1
R7152
10K
R7143
3.65K
10%
50V
CERM
402
1%
1/16W
MF-LF
402
1%
1/16W
MF-LF
2 402
(IMVP6_ISEN2)
(IMVP6_VSUM)
ERT-J1VR103J
(IMVP6_VO)
R1100/R1101 **ON THE CPU PAGE** PROTECT THE IMVP6 IF THE CPU IS NOT INSTALLED
C7121
10%
6.3V
CERM-X5R
402
5%
1/16W
MF-LF
2 402
IMVP6_PHASE2
IMVP6_BOOT2
IMVP6_UGATE2
IMVP6_LGATE2
IMVP6_ISEN2
R7123
0
R7122
TABLE_ALT_HEAD
5%
1/16W
MF-LF
2 402
MIN_LINE_WIDTH
0.25 MM
0.25 MM
0.25 MM
0.25 MM
0.25 MM
PART NUMBER
ALTERNATE FOR
PART NUMBER
BOM OPTION
REF DES
COMMENTS:
128S0093
128S0092
C7101,C7108 KEMET
T520V336M016ATE0457650
128S0093
128S0092
C7109,C7117 KEMET
T520V336M016ATE0457650
TABLE_ALT_ITEM
CPU_VCCSENSE_P
CPU_VCCSENSE_N
59B6
59C8 59B7
59B6 48C5
59B6 48D5
59B6
MIN_NECK_WIDTH
0.25 MM
0.25 MM
0.25 MM
0.25 MM
0.25 MM
59B7
59B7
59B7
59B7 6D7
59B7
59A5 10A6
70A3
70A3 59A5 10A6
59B5
IMVP6_OCSET
IMVP6_VSUM
GND_IMVP6_SGND
IMVP6_VO
IMVP6_DROOP
IMVP6_DFB
IMVP6_SOFT
IMVP6_RBIAS
IMVP6_VDIFF
IMVP6_FB2
IMVP6_FB
IMVP6_COMP
IMVP6_VW
CPU_VCCSENSE_P
CPU_VCCSENSE_N
IMVP6_RTN
IMVP6_VSEN
MIN_LINE_WIDTH
0.25 MM
0.25 MM
0.50 MM
0.25 MM
0.25 MM
0.25 MM
0.25 MM
0.25 MM
0.25 MM
0.25 MM
0.25 MM
0.25 MM
0.25 MM
0.25 MM
0.25 MM
0.25 MM
0.25 MM
MIN_NECK_WIDTH
0.20 MM
0.20 MM
0.20 MM
0.20 MM
0.20 MM
0.20 MM
0.20 MM
0.20 MM
0.20 MM
0.20 MM
0.20 MM
0.20 MM
0.25 MM
0.25 MM
0.25 MM
0.25 MM
0.25 MM
TABLE_ALT_ITEM
SYNC_DATE=07/13/2005
D
APPLE INC.
DRAWING NUMBER
051-7455
SCALE
SHT
NONE
NO STUFF
2
NO STUFF
C7192
0.0022UF
C7104
1%
1/16W
MF-LF
402
1 2 3
10KOHM-5%
IMVP6_VO_R
59B6
CRITICAL
1%
1/16W
MF-LF
2 402
59C7
IMVP6_PHASE1
IMVP6_BOOT1
IMVP6_UGATE1
IMVP6_LGATE1
IMVP6_ISEN1
=PPVIN_S5_CPU_IMVP
CRITICAL
CRITICAL
3.92K
59B7 6D7
59C6
10%
6.3V
CERM-X5R
402
10K
C7103
10K
1%
1/16W
MF-LF
402
10%
50V
CERM
402
R7130
59C6
59C6
1 2 3
R7116
10%
16V
CERM
402
0.22uF
1
R7100
C7190
0.0022UF
1%
1/16W
MF-LF
2 402
(IMVP6_VO)
XW7100
SM
MIN_LINE_WIDTH
1.5 MM
0.25 MM
1.5 MM
1.5 MM
0.25 MM
10%
50V
CERM
402
13.7K
0.018UF
OMIT
C7100
0.0022UF
NO STUFF
10%
16V
X7R
402
1/16W
MF-LF
402
1 2 3
0603-LF
(IMVP6_COMP)
Q7102
C7133
0.1UF
10%
16V
2 X5R
402
10%
16V
X5R
402
MPC1055LR36
DCR=0.8mOhm
LFPAK
NO STUFF
C7132
6.81K
0.1UF
L7100
MPC1055-SM
RJK0301DPB
1 2 3
C7115
0.01UF
1
7D8
0.36UH-30A-0.80MOHM
Q7104
RJK0301DPB
=PPVORE_S0_CPU_REG
NO STUFF
R7151
10K
1%
1K
CRITICAL
CRITICAL
Q7101
CRITICAL
C7131
1UF
10%
25V
X5R
603
LFPAK
0.001UF
15
49
2
C7127
14
C7118
20%
16V
POLY
CASED2E-SM 2
(IMVP6_PHASE1)
NO STUFF
(IMVP6_VW)
IMVP6_COMP_RC
1%
1/16W
MF-LF
2 402
16
IMVP6_VSUM
IMVP6_OCSET
IMVP6_VO
IMVP6_DROOP
59A4
C7117
33UF
CRITICAL
IMVP6_ISEN2
TPAD
GND_IMVP6_SGND
CRITICAL
1-Phase DCM
IMVP6_RBIAS
470PF
R7114
29
59A4 6D7
21
10%
50V
CERM
402
1 2 3
20%
16V
POLY
CASED2E-SM
(IMVP6_ISEN1)
30
PGND2
GND
C7114
IMVP6_ISEN1
19
255
59A4
59C8
24
25 NC
(IMVP6_FB)
IMVP6_LGATE1
(GND)
IMVP6_UGATE2
59A6
LGATE2
1%
1/16W
MF-LF
2 402
33
59A4
VSUM
OCSET 8
59A4
1K
32
7 SOFT
59A4
1%
1/16W
MF-LF
402
IMVP6_PHASE1
IMVP6_SOFT
IMVP6_FB2
IMVP6_FB
59A4 6D7 IMVP6_COMP
59A4 IMVP6_VW
NO STUFF
34
59A6 28
PHASE2
59A4
DFB
10%
50V
CERM
402
IMVP6_UGATE1
5%
1/16W
MF-LF
402
59A6 27
UGATE2
59A4
48D5
DROOP
26
35
59A6 23
ISEN2
59A4
59A6
QFN
48 3V3
IMVP6_VR_TT
IMVP6_NTC
1%
1/16W
MF-LF
402
1
U7100BOOT2
41 VID4
40 VID3
IMVP6_BOOT1
IMVP6_BOOT2
59A8 36
BOOT1
5 VR_TT*
6 NTC
147K
0.015uF
10%
16V
X7R
402
1-Phase DCM
IMVP6_BOOT1_RC
R7125
CRITICAL
VR_PWRGD_CK505_L 47 CLK_EN*
44 VR_ON
IMVP_VR_ON
VR_PWRGOOD_DELAY 1 PGOOD
OUT
R7108
C7105
IMVP6_PMON
NO STUFF
1/16W
MF-LF
CPU_PROCHOT_L 402
70C3 45C3 45B5 9C5
70A3
31
PVCC
IMVP6_RTN
70A3
43 VID6
42 VID5
ISL9504BCRZ
70A3
NO STUFF
CPU_VID<6>
10B7 CPU_VID<5>
10B7 CPU_VID<4>
10B7 CPU_VID<3>
70A3
10B7 CPU_VID<2>
70A3
10B7 CPU_VID<1>
10B7 CPU_VID<0>
70A3 10B7
22
VDD
IMVP6_VSEN
VIN
RJK0305DPB
C7109
33UF
1-Phase CCM
5%
1/16W
MF-LF
402
1
2 IMVP6_BOOT2_RC
0.1uF
20
CRITICAL
LFPAK
10%
16V
X5R
402
CRITICAL
Q7100
R7124
C7130
R7126
C7110
2-Phase CCM
NO STUFF
NO STUFF
1
0
1
0
PP3V3_S0_IMVP6_3V3
470K
402
0.01uF
1
1
0
0
CRITICAL
5%
1/16W
MF-LF
402
R7127
10%
16V
CERM
402
0
0
1
1
10UF
20%
6.3V
X5R
603
0.01UF
4.02K
Operation Mode
10%
16V
CERM
402
R7121
1%
1/16W
MF-LF
402
PSI*
MIN_LINE_WIDTH=0.25 MM
MIN_NECK_WIDTH=0.2 MM
10
GND_IMVP6_SGND
NO STUFF
DPRSTP*
MIN_LINE_WIDTH=0.25 MM
MIN_NECK_WIDTH=0.2 MM
=PP3V3_S0_IMVP1
59B7 59A4
DPRSLPVR
PPVIN_S5_IMVP6_VIN
10
7C4
C7135
1
2
=PPVIN_S5_CPU_IMVP
24C3 15A6
70B3 IN
MIN_LINE_WIDTH=0.25 MM
MIN_NECK_WIDTH=0.2 MM
VOLTAGE=5V
C7126
=PPVIN_S5_CPU_IMVP
PP5V_S0_IMVP6_VDD
=PP5V_S0_CPU_IMVP
7A7
59
OF
REV.
76
01
GND_GCORE_SGND
R7217
150K
1%
1/16W
MF-LF
402
1
2
60A7
GCORE_VDD1
C7221
GCORE_RBIAS
=PP5V_S0_NB_GFX_IMVP
7A7
R7202
10
5%
1/16W
MF-LF
402
1
60A7 GCORE_PVCC
1UF
10%
60A5
6.3V
CERM
402
TABLE_ALT_HEAD
PART NUMBER
ALTERNATE FOR
PART NUMBER
BOM OPTION
128S0093
128S0092
REF DES
COMMENTS:
TABLE_ALT_ITEM
1%
1/16W
MF-LF
2402
R7222
10K
1%
1/16W
MF-LF
2402
R7220
30K
60B2 44A2
5%
1/16W
MF-LF
2 402
20%
6.3V
CERM1
2 603
R7225
R7224
VDD
10K
5%
1/16W
MF-LF
402
1/16W
MF-LF
402
1
2
1 RBIAS
2 SOFT
NC 31
R7223
10K
15B3
21B6
15B3
21B6
5%
1/16W
MF-LF
402
15B3
21B6
15B3
21B6
1 C7213
C7214
0.001UF 0.001UF
10%
2 50V
CERM
402
15A3
10%
2 50V
CERM
402
23
GFX_VID<0>
24
GFX_VID<1>
25
GFX_VID<2>
26
GFX_VID<3>
27
GFX_VID<4>
8B1 GFX_VR_EN 29
30
GCORE_AF_EN
GCORE_FDE 32
60A5 GCORE_VSEN 8
60A5 GCORE_RTN 9
60A5
VIN
PGOOD
VID0
VID1
VID2
VID3
VID4
VR_ON
AF_EN
FDE
VSEN
RTN
60A7
UGATE
C7212
0.001UF
10%
50V
CERM
402
R7214
6.98K
0.001UF
10%
1%
1/16W
MF-LF
2402
2 50V
CERM
402
60A5
60A7
LGATE
GCORE_COMP 5 COMP
60A5
OCSET
60A7
DFB
R7216 1R7215
0
0
5%
1/16W
MF-LF
2402
5%
1/16W
MF-LF
2402
1/16W
MF-LF
402
60A5
VSS
15
C7208
XW7200
SM
0.0018UF
10%
60C5
60C5
60C5
60C5
60C5
60D7 60C5 60A5
60D5
60D5
60C5
60B5
60B5
60B5
GCORE_PHASE
GCORE_BOOT
GCORE_UGATE
GCORE_LGATE
GCORE_BOOT_RC
GND_GCORE_SGND
GCORE_VDD
GCORE_PVCC
GCORE_VIN
GCORE_DROOP
GCORE_VSUM
GCORE_DFB
MIN_LINE_WIDTH
1 MM
0.3 MM
1 MM
1 MM
0.3 MM
0.6 MM
0.3 MM
0.3 MM
0.3 MM
0.3 MM
0.3 MM
0.3 MM
60A7
R7210
2.94K
1%
1/16W
MF-LF
402
1
1%
1/16W
MF-LF
402
8 R1+
3
4
V-
GPU_ISENSE1
CRITICAL
R2
U7201
R7207 C7203
470PF
200K
1%
2
1/16W
MF-LF
402
60C7
R7227 C7222
0.22UF
1
4.53K
INA326EA-250
1%
MSOP
SMC_GPU1_ISENSE 44A2
1/16W
MF-LF
402
20%
6.3V
2 X5R
402
GND_SMC_AVSS 44C1
10%
50V
2 CERM
402
OMIT
10%
50V
CERM
402
C7219
10UF
20%
6.3V
2 X5R
603
CRITICAL
C7220
330UF
20%
2.5V
2 POLY
CASE-D2E-LF
R7209
C7207 1K
1%
1/16W
MF-LF
402
50V
CERM
402
2
1
=PP3V3_S0_PDCISENS
Placement Note:
7
2
1 R1- V+
1%
1/16W
MF-LF
402
C7205
0.001UF
1
GPU_ISENSE_R2
MIN_NECK_WIDTH
0.25 MM
0.25 MM
0.25 MM
0.25 MM
0.25 MM
0.25 MM
0.25 MM
0.25 MM
0.25 MM
0.25 MM
0.25 MM
0.25 MM
2.21K
1%
1/16W
MF-LF
402
R7204
C7204
750
47PF
5%
2 50V
CERM
402
1/16W
MF-LF
402
10
R7206
GPU_ISENSE_R1_P
R7208
330PF
10%
R7212
10%
16V
X5R
402
GPU_ISENSE_R1_N
RJK0303DPB
C72231 R7226
0.1UF
100
GCORE_VSUM_R
2.21K
1%
GPU_ISENSE_VCC
1/4W
MF-LF
1206
1 2 3
3 GCORE_OCSET
11 GCORE_DFB
THRM_PAD
50V
CERM
402
2
1
2 GCORE_VDIFF_RC
1/16W
MF-LF
402
1
7B8
12
33
PGND
GCORE_FB
R7211
1.1K
1%
GCORE_LGATE
=PPVCORE_S0_NB_GFX_IMVP
0.002
1%
Q7201
15.8K
1%
DROOP
60A5
21
6 FB
10%
50V
CERM
402
2
1
2 GCORE_FB_RC
60A5
19 GCORE_PHASE
13 GCORE_VSUM
60A7
VSUM
20
1%
1/16W
2 MF-LF
402
60A5 1
CRITICAL
L7200
0.82UH-16.5A
IHLP2525EZ-SM
CRITICAL
1
2
1
2
1 2 3
VO
GCORE_VDIFF
5%
50V
CERM
402
X5R
MF-LF
402
402
2
2 GCORE_BOOT_RC
20%
16V
POLY
CASED2E-SM
LFPAK
16V
18 GCORE_UGATE 1/16W
C7218 1 CRITICAL
C7217
33UF
LFPAK
GCORE_VW 4 VW
C7209
680PF
RJK0305DPB
0.1UF
10%
0
5%
Q7200
CRITICAL
7 VDIFF
C7210
R7213
150PF 1 150K
CRITICAL
60D7
7B1
1UF
10%
25V
X5R
603
R7205
C7211
1
1
KEMET T520V336M016ATE0457650
=PPVIN_S5_NB_GFX_IMVP
C7201
R7201
14
C7217
17 GCORE_BOOT 1
60A7
BOOT
60A7
PHASE
C7200 R7200
0.01UF 10
10%
5%
1/16W
2 25V
X7R
MF-LF
402
402
GND_GCORE_SGND 60A5 60A7
PVCC
U7200
CRITICAL
QFN
28 IMON
5%
1/16W
MF-LF
402
60A7 GCORE_VIN
GCORE_PMON
100K
5%
R7203
C7202
2.2UF 1
22
10K
1%
16V
1/16W
X7R
MF-LF
402
402
SMC_GPU1_ISENSE1
2
ISL6263B
R7221
GCORE_SOFT
STUFF
C7215 NO
R7218
0.015UF
4.53K
10%
7C4
NO STUFF NO STUFF 1
60A5
16
=PP3V3_S0_NB_GFX_IMVP
GCORE_DROOP
C7206
0.1UF
10%
2 16V
X5R
402
GND_GCORE_SGND
I103
60B5
I104
60B6
I105
60B6
I106
60C6
I107
60D6
I108
60C6
I109
60B6
I110
60B6
I111
60B6
I112
60B6
I113
60B6
GCORE_OCSET
GCORE_VW
GCORE_RTN
GCORE_VSEN
GCORE_RBIAS
GCORE_SOFT
GCORE_COMP
GCORE_FB
GCORE_VDIFF
GCORE_FB_RC
GCORE_VDIFF_RC
MIN_LINE_WIDTH MIN_NECK_WIDTH
0.3 MM
0.25 MM
0.3 MM
0.25 MM
0.3 MM
0.25 MM
0.3 MM
0.25 MM
0.3 MM
0.25 MM
0.3 MM
0.25 MM
0.3 MM
0.25 MM
0.3 MM
0.25 MM
0.3 MM
0.25 MM
0.3 MM
0.25 MM
0.3 MM
0.25 MM
I115
I116
I117
I118
I119
I120
SYNC_MASTER=GPU
SYNC_DATE=06/29/2006
I121
I122
I123
I124
I125
I114
APPLE INC.
DRAWING NUMBER
051-7455
SCALE
SHT
NONE
60
OF
REV.
76
01
22UF
1%
1/16W
MF-LF
402
CRITICAL
R2
4.53K
INA326EA-250
1%
MSOP
C7351
402
45B6 48A1 48B1 48C1 48C6 60B2
62C2 66B1 66C2
1/16W
MF-LF
402
402
1V51V05S0_V5FILT
1
61A3
7D8 6B2
=PP1V05_S0_REG
C7324
0.1UF
CRITICAL
S
L7320
1.0UH-13A-5.6M-OHM
VOLTAGE=1.05V
MIN_LINE_WIDTH=1.5 mm
MIN_NECK_WIDTH=0.25 mm
B
1
2
<Rc>
NO STUFF 1
C7329 R7327
7.68K
100PF
5%
50V
CERM
402
1%
1/16W
MF-LF
2 402
2 10%
50V
CERM
402
Q7321
SI7108DNS
PWRPK-1212-8
<Rd>
NO STUFF 1 R7328
20.0K
C7328
1%
0.001UF
1/16W
CRITICAL
CRITICAL
C7352
2 330UF
20%
2.5V
POLY
CASE-D2E-LF
R7326
1/16W
MF-LF
402
MF-LF
2 402
NO STUFF
C7325
0.1UF
V5FILT
1
1V05S0_VBST 22
1V05S0_VH
21
mm
1V05S0_LL
20
mm
1V05S0_VL
19
VO1
VBST1
DR_VH1
LL1
DR_VL1
24
TRIP1
VFB1
PGOOD1
MIN_LINE_WIDTH=1 mm
MIN_NECK_WIDTH=0.25
MIN_LINE_WIDTH=1 mm
MIN_NECK_WIDTH=0.25
MIN_LINE_WIDTH=1 mm
MIN_NECK_WIDTH=0.25 mm
1V05S0_TRIP 17
1V05S0_VFB
2
1V05S0_LL_RC
S
3 2 1
20%
6.3V
X5R
603
7A1
R7324
0
NO STUFF
274K
1%
OMIT
7A1
10%
5%
16V
1/16W
X5R
MF-LF
402
402
2
1 1V05S0_VBST_RC
1
2
3 2 1
SM-IHLP
1
R7325
6.65K
1%
1/16W
MF-LF
2 402
10%
16V
X5R
402
C7398
220PF
5%
25V
CERM
402
6
9 1V5S0_VBST 1
101V5S0_VH MIN_LINE_WIDTH=1 mm
MIN_NECK_WIDTH=0.25 mm
111V5S0_LL MIN_LINE_WIDTH=1 mm
MIN_NECK_WIDTH=0.25 mm
121V5S0_VL MIN_LINE_WIDTH=1 mm
TRIP2
VFB2
PGOOD2
141V5S0_TRIP
5 1V5S0_VFB
7
U7300
TPS51124
QFN
TONSEL
4 NC
25V
CERM
402
1%
1/16W
MF-LF
2 402
220PF
5%
BOM OPTION
128S0093
128S0092
REF DES
COMMENTS:
MICROFET3X3
C7381 1 C7380
1UF
33UF
10%
25V
X5R
603
20%
16V
POLY
2 CASED2E-SM
XW7320
OPEN-SAWTOOTH
VOLTAGE=1.5V
MIN_LINE_WIDTH=1.5 mm
MIN_NECK_WIDTH=0.25 mm
CRITICAL
Q7361
SI7110DN
PWRPK-1212-8
R7365
3.74K
7C8
62C5
PP1V5_S0_REG_P
1
5
=PP1V5_S0_REG
JUMPER
1 2 3 SM-IHLP
C7389
CRITICAL
L7360
1.0UH-13A-5.6M-OHM
G
S
PGND THRM_PAD
CRITICAL
Q7360
FDM6296
CRITICAL
C7392
330UF
10%
3 2 2.0V
TANT
D2T
<Ra> 1
R7367
C7350
20.0K
10UF
20%
6.3V
2 X5R
603
2 1%
1/16W
MF-LF
402
1 2 3
NO STUFF
C7369
100PF
5%
50V
CERM
402
<Rb>
R7368
20.5K
1%
1/16W
MF-LF
2 402
61B6
GND_1V51V05S0_SGND
Routing Note:
put 6 vias under the thermal
pad (pin 25)
TABLE_ALT_HEAD
ALTERNATE FOR
PART NUMBER
MIN_NECK_WIDTH=0.25 mm
10%
16V
X5R
402
1
2 1V5S0_VBST_RC2
=PPVIN_S5_1V5S0
CRITICAL
5
D
C7364
0.1UF
VO2
VBST2
DR_VH2
LL2
DR_VL2
SYM(1 OF 2)
CRITICAL
1V05S0_RUNSS
23 EN1
8 EN2
6D7 1V5S0_RUNSS
58B1
GND
5%
1/16W
MF-LF
402
V5IN
58D1
R7364
0
XW7300
SM
PART NUMBER
Routing Note:
The discharge path (VO2) should have
a dedicated trace to the output cap;
separate from the output voltage
sensing trace,
PWRPK-1212-8
2 POLY
CASED2E-SM
X5R
603
10%
10V
X5R
402
=PP5V_S5_1V51V05S0
Placement Note:
C7301
10UF
7C1
GND_1V51V05S0_SGND
=PPVIN_S5_1V05S0
1
C7305
1UF
CRITICAL
C73411 C7340 CRITICAL
Q7320
1UF
33UF
10%
20%
SI7110DN
25V
16V
R7361
3.3
5%
10%
50V
2 CERM
Routing Note:
The discharge path (VO1) should have
a dedicated trace to the output cap;
separate from the output voltage
sensing trace,
20%
6.3V
2 X5R
GND_SMC_AVSS 44C1
1%
1/16W
MF-LF
402
10UF
20%
2 6.3V
X5R
603
1/16W
MF-LF
402
R7391 C7399
470PF
200K
NB_ISENSE_R2
NB_ISENSE_R1_P
PP1V05_S0
1.05V
0.00V
R7305 C7306
0.22UF
U7301
PP1V5_S0
1.5V
0.0V
SMC_NB_CORE_ISENSE 44A8
25
NB_ISENSE 1
16
1/4W
MF-LF
2 1206
8 R1+
3
4
V-
13
0.002
1%
7
2
1 R1- V+
PM_SLP_S3_L
HIGH
LOW
R7302
State
S0
S3/S5/G3Hot
1%
1/16W
MF-LF
402
15
R7392
2.21K
Placement Note:
NB_ISENSE_R1_N
CRITICAL
10%
16V
X5R
402
20%
2 6.3V
CERM
805
PLACE C7390,C7391
NEAR NB
=PP3V3_S0_PDCISENS
Placement Note:
C73031 R7390
0.1UF
100
C7390
18
TABLE_ALT_ITEM
C7380,C7340 KEMET
T520V336M016ATE0457650
58A5
PGOOD_1V05S0
PGOOD_1V5S0
58A5
TABLE_ALT_HEAD
PART NUMBER
ALTERNATE FOR
PART NUMBER
BOM OPTION
REF DES
376S0448
376S0445
Q7360
COMMENTS:
TABLE_ALT_ITEM
APPLE INC.
DRAWING NUMBER
051-7455
SCALE
SHT
NONE
61
OF
REV.
76
01
State
PM_SLP_S4_LPM_SLP_S3_LPP1V8_S3
S0
HIGH
HIGH
1.8V
S3
HIGH
LOW
1.8V
S5/G3Hot
LOW
LOW
0.0V
Vout = 0.75V * (1 + Ra / Rb)
NO STUFF
<Rb>
1
2
1
2
1V8S3_VDDQSET
R7522
<Ra>
C7503
20.0K
1%
100PF
R7521 5%
1/16W
MF-LF
28K
402
10%
16V
X5R
402
1
C7500
1UF
5%
1/16W
MF-LF
402
4
V-
MEM_ISENSE1
CRITICAL
R2
R7503
4.53K
U7501
1%
INA326EA-250
1/16W
MSOP
R7563
1%
1/16W
MF-LF
402
10%
2 50V
CERM
402
200K
MEM_ISENSE_R1_P
Placement Note:
MF-LF
402
MEM_ISENSE_R2
20%
6.3V
X5R
603
1%
1/16W
MF-LF
2 402
R7500
0
15
22
14
24
23
R7510
8.25K
5%
1/16W
MF-LF
402
Routing Note:
PM_SLP_S3_L
1V8S3_RUNSS
10
11
S3
S5
PGOOD
CRITICAL
DRVH
LL
U7500
SYM (1 OF 2)
1V8S3_CS 16
TPS51116
COMP
QFN
CS
Routing Note:
1V8S3_VBST_RC
1
1V8S3_VBST
65C2
62A6
7A4 62A2
SMC_NB_1V8_ISENSE
1
0.22UF
20%
2 6.3V
X5R
402
GND_SMC_AVSS
C7564
470PF
44A8
C7505
44C1 45B6 48A1 48B1 48C1 48C6 60B2 61C5 66B1 66C2
=PP0V9_S0_REG
1
2.94K
1%
1/16W
MF-LF
402
=PP3V3_S3_PDCISENS
R7561
100
PLACE C7504 NEAR U7501 PIN 7
7
2
1 R1- V+
8 R1+
3
R7560
CRITICAL
5%
1/16W
MF-LF
402
10%
10V
X5R
402
7D8
MEM_ISENSE_R1_N
1
R7502
=PP5V_S5_1V8S30V9S0 0.002
1%
1/4W
MF-LF
R7507 1 C7502
21206
4.7
10UF
1V8S3_V5FILT
1
16V
X5R
402
7B5
7C8 61B1
10UF
20%
2 6.3V
X5R
603 GND_1V8S3_VTTGND
0.1UF
10%
=PP1V8_S3_REG_R
=PP1V5_S0_REG
1 C7501
MEMVTT_VREF
Routing Note:
C75041
PP0V9_S0
0.9V
0.0V
0.0V
MEM_ISENSE_VCC
Placement Note:
50V
CERM
402
1%
1/16W
MF-LF
402
1
2
C7540
0.033UF
13
21 1V8S3_DRVH
20 1V8S3_LL
DRVL
19 1V8S3_DRVL
MODE
Connect CS_GND to
Q7521 PIN1,2.3
using Kevin connection.
NC0
NC1
=PPVIN_S5_1V8S30V9S0
CRITICAL 1 C7531
CRITICAL
1 C7530
1UF
Q7520
10%
33UF
25V
7A1
C7509
0.1uF
10%
16V
X5R
402
SI7110DN
1 2 3
62C5
GND
PGND
VTTGND
18
CS_GND
17
C7508
10UF
20%
2 6.3V
X5R
603
THRM_PAD
25
C7507
10UF
20%
2 6.3V
X5R
603
MIN_LINE_WIDTH=1.5 mm
MIN_NECK_WIDTH=0.25 mm
Q7521
PWRPK-1212-8
7B6
OMIT
C7542
330UF
C7541
10UF
20%
20%
2.5V
6.3V
2 POLY
CASE-D2E-LF 2 X5R
603
CRITICAL
C7543
330UF
20%
2 2.5V
POLY
CASE-C2
1 2 3
GND_1V8S3_VTTGND
XW7501
SM
GND_1V8S3_SGND
Routing Note:
put 6 vias under the thermal pad
=PP1V8_S3_REG
CRITICAL
CRITICAL
SI7108DNS
OMIT
VOLTAGE=1.8V
5
D
7 NC
12 NC
SM-IHLP
1
MIN_LINE_WIDTH=1 mm
MIN_NECK_WIDTH=0.25 mm
MIN_LINE_WIDTH=1 mm
MIN_NECK_WIDTH=0.25 mm
20%
2 X5R
16V
603
POLY
CASED2E-SM
CRITICAL
L7520
1.0UH-13A-5.6M-OHM
MIN_LINE_WIDTH=1 mm
MIN_NECK_WIDTH=0.25 mm
PWRPK-1212-8
Placement Note:
PLACE XW7500,XW7501 NEAR C7542 PIN 2
PGOOD_1V8S3
XW7500
SM
PART NUMBER
ALTERNATE FOR
PART NUMBER
BOM OPTION
REF DES
COMMENTS:
TABLE_ALT_ITEM
128S0093
128S0092
C7530
KEMET T520V336M016ATE0457650
58B6
R7599
100K
TABLE_ALT_HEAD
5%
1/16W
MF-LF
402
2
=PP3V3_S3_PDCISENS
1.8V/0.9V Supplies
SYNC_MASTER=POWER
SYNC_DATE=07/13/2005
APPLE INC.
DRAWING NUMBER
051-7455
SCALE
SHT
NONE
62
OF
REV.
76
01
State
G3H
SMC_PM_G2_EN
PP3V3_G3H
PP5V_S5
PP3V3_S5
LOW
HIGH
3.3V
3.3V
0.0V
5.0V
0.0V
3.3V
S0/S3/S5
Vout = 1V * (1 + Ra / Rb)
<Ra> CRITICAL<Rb>
R7667
R7668
20K
4.99K
0.1%
1/16W
MF
402
603
20%
2 6.3V
POLY
CASE-B2
CASE-B2
SI7110DN
25V
CERM
402
PWRPK-1212-8
3 2 1
COMP2
VO2
4
VREF2
VFB1
GND
1
VO1
COMP1
VFB2
PGOOD2
11
EN2
12
SYM (2 OF 3)
NC
NC
RSMRST_PWRGD 44D8
13 3V3S5_VBST
128S0093
128S0092
REF DES
3V3S5_VBST_RC2
D
4
1%
1/16W
MF-LF
402
MICROFET3X3
XW7620
1 2 3
C7671
0.01UF
S
63A4 63B6 63C4
VOLTAGE=3.3V
MIN_LINE_WIDTH=1.5 mm
MIN_NECK_WIDTH=0.25 mm
L7620
4.7UH
IHLP
OMIT
1%
1/16W
MF-LF
Q7621
PWRPK-1212-8
20%
2 6.3V
POLY
CASE-B2
C7652
150UF
C7651
150UF
20%
2 6.3V
POLY
CASE-B2
C7640
T520V336M016ATE0457650
376S0445
Q7620
C7602
1UF
10%
2 25V
X5R
603
KEMET T520V336M016ATE0457650
TABLE_ALT_ITEM
376S0448
C7650
10UF
20%
2 6.3V
X5R
603
5V3V3S5_V5FILT 63C4
5V3V3S5_VREG3
5%
1/16W
MF-LF
402
TABLE_ALT_ITEM
128S0092
KEMET T520V336M016ATE0457650
1 C7605 1 C7603
C7604
10UF
1UF
10UF
10%
2 10V
X5R
402
20%
6.3V
X5R
603
20%
2 6.3V
X5R
603
5V/3.3V Supplies
GND_5V3V3S5_SGND
Placement Note:
R7601,C7605
C7602 close
C7604 close
C7603 CLOSE
R7605,R7603
close to
to U7600
to U7600
TO U7600
close to
SYNC_MASTER=POWER
SYNC_DATE=07/13/2005
XW7601
SM
PP3V3_S5_REG_P
5%
1/16W
MF-LF
TABLE_ALT_ITEM
128S0093
7D3
2 402
=PPVIN_S5_5VS5
COMMENTS:
C7682,C7680 KEMET
=PP3V3_S5_REG
OMIT
CRITICAL CRITICAL
SI7110DN
JUMPER
CRITICAL
CRITICAL
G
OPEN-SAWTOOTH
NO STUFF
R7603
1
R7671
5.90K
100K
2 402
FDM6296
1 2 3
1
R7605
7.87K
20%
16V
POLY
CASED2E-SM
Q7620
G
S
10%
2 16V
CERM
402
GND_5V3V3S5_SGND
CRITICAL
C7640
33UF
CRITICAL
3V3S5_RUNSS
GND_5V3V3S5_SGND
TABLE_ALT_HEAD
BOM OPTION
1
2
16V
X5R
402
PGND2
V5FILT
5VS5_DRVL
25 DRVL1
mm
R7601
4.7
ALTERNATE FOR
PART NUMBER
0.1UF
10%
65C5
C7641
1UF
10%
2 25V
X5R
603
C7620
143V3S5_DRVH
5VS5_LL
26 LL1
mm
R7670
100K
PART NUMBER
R7620
0
5%
1/16W
MF-LF
402
=PPVIN_S5_3V3S5
45D5 63B5
MIN_LINE_WIDTH=1 mm
DRVH2
MIN_NECK_WIDTH=0.25 mm
MIN_LINE_WIDTH=1 mm
LL2 153V3S5_LL
MIN_NECK_WIDTH=0.25 mm
MIN_LINE_WIDTH=1 mm
DRVL2 163V3S5_DRVL MIN_NECK_WIDTH=0.25 mm
NO STUFF1
7A1
63B6
10
27 DRVH1
5VS5_DRVH
mm
5%
1/16W
MF-LF
402
7A1
VBST2
5VS5_RUNSS
220PF
5%
EN3
EN1
C7670
4
EN5
LLP
C7622
22PF
28 VBST1
5VS5_VBST
NO STUFF1
17
IHLP
CRITICAL
20%
PGOOD1
3V3S5_VFB
402
U7600
VREG3
6D7
65C5
CRITICAL
C7692
Q7661
150UF
2 6.3V
POLY
30
29
63A4
5%
TPS51120
Routing Note:
The discharge path (VO2) should have
a dedicated trace to the output cap;
separate from the output voltage
sensing trace,
5%
50V
CERM
402
2 50V
CERM
18 CS2
3V3S5_CS
10%
TONSEL
20
OMIT
SKIPSEL
31
19
L7660
3.3UH
OMIT
32
CRITICAL
CRITICAL
1 5VS5_VBST_RC
1
MIN_LINE_WIDTH=1 mm
MIN_NECK_WIDTH=0.25
MIN_LINE_WIDTH=1 mm
MIN_NECK_WIDTH=0.25
MIN_LINE_WIDTH=1 mm
MIN_NECK_WIDTH=0.25
3 2 1
1
C7690
C7691
2.2UF
150UF
2 16V
X5R
VOLTAGE=5V
MIN_LINE_WIDTH=1.5 mm
MIN_NECK_WIDTH=0.25 mm
PWRPK-1212-8
JUMPER
5%
1/16W
MF-LF
402
16V
X5R
402
SI7110DN
R7660
0
0.1UF
10%
Q7660
XW7660
OPEN-SAWTOOTH
1
2
=PP5V_S5_REG
PP5V_S5_REG_P
C7660
603
RSMRST_PWRGD
21 VREG5
5VS5_VREG
7C3
VIN
1UF
10%
2 25V
X5R
PWPD
C7627
100PF
CRITICAL
33
NO STUFF
5V3V3S5_V5FILT
22
C7681
CRITICAL
Routing Note:
put 6 vias under the thermal pad
(pin 33)
10%
50V
CERM
402
5VS5_VFB
PGND1
C7680
33UF
20%
2 20%
16V
16V
POLY
POLY
CASED2E-SM
CASED2E-SM
0.1%
1/16W
MF
402
C7600
0.001UF
2
25V3V3S5_VREF
24
C7682
33UF
5%
1/16W
MF-LF
402
0.1%
1/16W
MF
402
GND_5V3V3S5_SGND
R7610
0
5%
50V
CERM
402
=PPVIN_S5_5VS5
CRITICAL 1 CRITICAL
C7667
100PF
2
NO STUFF
5V3V3S5_TONSEL
CRITICAL
0.1%
1/16W
MF
402
23 CS1
5VS5_CS
Routing Note:
The discharge path (VO1) should have
a dedicated trace to the output cap;
separate from the output voltage
sensing trace,
Vout = 1V * (1 + Rc / Rd)
<Rd>CRITICAL<Rc>
R7628
R7627
8.66K
20K
CRITICAL
APPLE INC.
DRAWING NUMBER
051-7455
SCALE
SHT
NONE
63
OF
REV.
76
01
=PPVIN_G3H_P3V42G3H
P3V42G3H5_BOOST
3
VIN
BOOST
C77911
CRITICAL
U7790
LT3470
SHDN*TSOT23-8 SW
BIAS
NC 2
CRITICAL
L7790
33uH
0.22uF
10%
2
6.3V
CERM-X5R
402
CDPH4D19F-SM
1
5 PP3V42G3H_SW
7
22pF
GND
P3V42G3H_FB
1
=PP3V42_G3H_REG
7C3
<Ra>
1
1 C7792 R7791
348K
NC
FB
5%
2 50V
CERM
402
CRITICAL
C7790
10UF
10%
1%
1/16W
MF-LF
2402
1 C7793
22UF
20%
<Rb>
2 6.3V
CERM
1
R7792
805
200K
1%
1/16W
MF-LF
2402
25V
X5R
1206-1
1.25V S0 REGULATOR
=PP3V3_S5_1V25S0
1M
1V25S0_RUNSS
P1V25S0_RT
P1V25S0_ITH 13
P1V25S0_MODE16
C7723 C7724
1000PF
10%
25V
2 X7R
402
SW
100PF
5%
50V
CERM
402
R7728
14
C7725
2.2UH-3.25A
L7720
2
2
=PP1V25_S0_REG
P1V25S0_SW
MIN_LINE_WIDTH=0.6 mm IHLP1616BZ-SM
MIN_NECK_WIDTH=0.25 mm
<Ra>
R7723
1%
1/16W
MF-LF
402
1%
1/16W
MF-LF
402
VOLTAGE=0V
MIN_LINE_WIDTH=0.2 mm
MIN_NECK_WIDTH=0.2 mm
C7728
10%
25V
X7R
402
7C8
Vout = 1.2516V
3.0A max output
(Switcher limit)
1000PF
XW7700
SM
GND_P1V2S3_SGND
47.0K
R7726
309K
470PF
10%
50V
CERM
402
CRITICAL
8
9
VFB
THERM
SGND PGND PAD
5%
1/16W
MF-LF
2 402
4
5
17
P1V25S0_ITH_RC
1
CRITICAL
ITH
SYNC/MODE
Burst
1%
1/16W
MF-LF
402 2
QFN
RT
PGOOD 12
RUN/SS
8.25K
47UF
20%
4V
CERM-X5R 2
0805
U7720
LTC3412A
15
1
R7721
C7720 1
SVIN PVIN
5%
1/16W
MF-LF
402
2
58C1
R7727
5%
1/16W
MF-LF
402 2
NO STUFF
1
10
3
11
R7722
Continuous
7C1
C7729
20%
4V
CERM-X5R
0805
47UF
C7730
47UF
20%
4V
2 CERM-X5R
0805
P1V25S0_VFB
<Rb>
R7724
60.4K
1%
1/16W
MF-LF
402
P1V25S0_VFB_DIV
3.42V/1.25V Switcher
SYNC_MASTER=ENETSYNC_DATE=12/06/2005
<Rc>
R7725
23.2K
1%
1/16W
MF-LF
402
APPLE INC.
DRAWING NUMBER
051-7455
SCALE
SHT
NONE
64
OF
REV.
76
01
6D7 63B5
65A4 7A6
=PP3V3_S3_FET
D 3
Q7859
R7857
C
7B1
1/16W
5 G
MF-LF
402
=PP3V42_G3H_PWRCTL
1
2 SMC_PM_G2_EN_L
SSM6N15FE
SOT563
44D5
IN
3V3S5_RUNSS
D 3
D 6
SMC_PM_G2_EN
5 G
S 4
65A6 44C5 33B7 24D3
Q7860
=PP3V3_S5_FET
SSM6N15FE
SOT563
470K
5%
IN
CRITICAL
U7870
74LVC1G07
SC70
4
2
PM_S4_STATE_L
10K
1%
1/16W
MF-LF
2 402
1V8S3_RUNSS
C
62B8
NC
63B4
R7875
NC
Q7859
SSM6N15FE
S 4
SOT563
R7856
100K
2 G
S 1
5%
1/16W
MF-LF
2 402
CRITICAL
Q7865
FDC638P
SM-LF
=PP5V_S3_FET
7A5
6
5
2
1
=PP5V_S5_FET4
R7805
100K
5%
1/16W
MF-LF
402
7C1
=PP5V_S5_PWRCTL
1
2 PM_SLP_S4_LS5V
P5VS3_EN_L
R7806
10K
5%
1/16W
MF-LF
402
D 6
Q7860
IN
PM_S4_STATE_L
2 G
1
R7807
100K
5%
1/16W
MF-LF
402
MOSFET
C7801
0.0022uF CHANNEL
10%
RDS(ON)
50V
CERM
402
LOADING
1
2
FDC638P
=PP3V3_S3_FET
SM-LF
S 1
7A6 65C3
6
5
2
1
=PP3V3_S5_FET
4
R7808
10K
5%
1/16W
MF-LF
402
FDC638P
P-TYPE
48 mOhm @4.5V
0.051 A
CRITICAL
Q7866
SSM6N15FE
SOT563
5V S3 FET
P3V3S3_EN_L
C7802
0.01UF
10%
16V
CERM
402
3.3V S3 FET
MOSFET
CHANNEL
RDS(ON)
LOADING
FDC638P
P-TYPE
65 mOhm @2.5V
0.098 A
SYNC_MASTER=DSIMON-WF
SYNC_DATE=06/12/2006
APPLE INC.
DRAWING NUMBER
051-7455
SCALE
SHT
NONE
65
OF
REV.
76
01
LDO_FDBK
MIN_LINE_WIDTH=0.5 MM
MIN_NECK_WIDTH=0.2 MM
U7950
1 IN
SOI
CRITICAL
Q7940
SOT-23
66B5
470PF
CSON
VREF
10%
50V
2 CERM
402
R7906
MMBD914XXG
2.2
SOT23
5%
1/16W
MF-LF
2 402
CHGR_ACSET_RC
1%
1/16W
MF-LF
2 402
CHGR_VREF
CHGR_ACPRN
CHGR_ACSET
D7922
23
27
1
2
13
CHLIM
ACPRN
ACSET
BGATE
DCIN
BOOT
UGATE
PHASE
LGATE
EN
DCPRN
DCSET
14 CHGR_BOOT
15 CHGR_UGATE
16 CHGR_PHASE
1%
1/16W
MF-LF
2 402
66B8
66A8
0.1UF
R7961
20.0K
1%
1/16W
MF-LF
2 402
C7927
0.022UF
10%
2 16V
CERM-X5R
402
GND_CHGR_SGND
NOSTUFF
R7964
2.43K
1
CHGR_CHLIM_R
2
R7979
10K
5%
1/16W
MF-LF
402
D 6
Q7961
SSM6N15FE
SOT563
44B5 6C1
SMC_BATT_ISET
66B8 66B5
2 G
SMC_BATT_ISET_L
=PP3V42_G3H_ACIN
1
1%
1/16W
MF-LF
402
Q7961
D 3
SOT563
15.0K
1%
1/16W
MF-LF
402
1
1
R7963
44.2K
5 G
S 1
BOM OPTION
128S0092
REF DES
1%
1/16W
MF-LF
2 402
S 4
1%
1/16W
MF-LF
402
66C2 6B1
CHGR_VDD
Q7900,Q7920,Q7921
AOS
20%
2 16V
ELEC
6.3X5.5SM1
1%
1/16W
MF-LF
402
C7920
0.01uF
10%
2 16V
CERM
402
100K
C7921
0.1UF
10%
2 16V
X5R
402
1/10W
MF-LF
603
10%
2 50V
CERM
402
3
2
NO STUFF
10%
2 16V
CERM
402
2 G
0.1UF
10%
16V
X5R
402
1%
1/16W
MF-LF
2 402
0.22UF
10%
2 10V
CERM
402
C7928
C7909
Q7950
SSM6N15FE D
SOT563
S1
10%
603
Placement Note:
C7981
CRITICAL
5 G
R7965
66B8
66A8
57C4 7B1
1%
1/16W
MF-LF
402
1
=PP3V42_G3H_ACIN
D 6
S 4
5%
3W
MF
2525
1
SMC_BC_ACOK
BATT_RC
1
D 3
0.1UF
C7924
0.01uF
R7922
1%
1/16W
MF-LF
2 402
R7971
4.53K
1%
1/16W
MF-LF
402
GND
2
C7972
0.22UF
20%
6.3V
2 X5R
402
GND_SMC_AVSS
MIN_LINE_WIDTH=0.6 MM
MIN_NECK_WIDTH=0.2 MM
BATT_POS_F
57B2 57D5
8
7
6
5
Q7921
AO4409
SOI
MIN_LINE_WIDTH=0.2 MM
R7923
35.7K
BYPASS_R_DRV
6 D
Q7924
SSM6N15FE
SOT563
SYNC_MASTER=SMC
SYNC_DATE=08/19/2005
S 4
G 2
1 S
SMC_BATT_TRICKLE_EN_L
5 G
S 4
SIZE
D
APPLE INC.
DRAWING NUMBER
051-7455
SCALE
SHT
NONE
BYPASS_R_GATEMIN_NECK_WIDTH=0.2 MM
SMC_BATT_ISENSE 44C5
CRITICAL
39.2K
D 3
SSM6N15FE
SOT563
D4
D3
SOT23-5
C7975
402
D2
D1
U7975
V+INA193
OUT 1 BATT_ISENSE1
1%
1/16W
MF-LF
2 402
Q7922
5 G
SSM6N15FE
SOT563
C7923
10%
16V
X5R
402
S 1
8 PPVBATT_G3H_PRE
1
7
6
3
S3
5
2
S2
1
S1
GATE
10%
2 16V
CERM
402
Q7924
2 G
P3V42_G3H_ACIN_R
Q7922
T520V336M016ATE0457650
57C7 57C3 45B6 44C5 6C1
5
=PP3V3_S0_PBATTISENS
R7920
27
NO STUFF
1
VIN+ VIN-
BATT_FET_GATE
MIN_LINE_WIDTH=0.2 MM
MIN_NECK_WIDTH=0.2 MM
10%
16V
2 CERM
1%
1/16W
MF-LF
402
1UF
25V
2 X5R
10%
D3
SSM6N15FE
SOT563
402
6B1 66B5
C7910
1UF
D2
D1
BATT_ENABLE_L
R7925
10K
PPVBAT_G3H_CHGR_OUT
2 6.3V
CERM
GATE
5%
1/16W
MF-LF
2 402
S 1
7B3
7AMP
D4
S3
S2
330K
Q7950
SSM6N15FE
SOT563
C7980 1
=PPBUSA_G3H
1206
0.0022UF
R7931
0.01UF
MOSFET
D 6
7B3
2 CHGR_PHASE_RC
R7981
49.9
1%
1 2 3
=PPBUSB_G3H
MIN_LINE_WIDTH=0.6 MM
MIN_NECK_WIDTH=0.25 MM
100UF
CASED2E-SM
PPVBAT_G3H_CHGR_OUT
R7950
TABLE_ALT_ITEM
376S0543
20%
33UF
2 16V
POLY
44C1 45B6 48A1 48B1 48C1 48C6 60B2 61C5 62C2 66B1
SOI
COMMENTS:
C7908,C7910 KEMET
C7908
Q7920
AO4409
66C6
20%
6.3V
F7900
CRITICAL CRITICAL
CRITICAL
TABLE_ALT_ITEM
376S0466
10%
50V
CERM
402
100K
ALTERNATE FOR
PART NUMBER
FDA1254-3SM
1%
1/16W
MF-LF
2 402
TABLE_ALT_HEAD
128S0093
C7916
GND_CHGR_SGND
PART NUMBER
0.5%
1W
MF
0612
PPVBAT_G3H_CHGR_REG
1
L7900
4.7UH
R7951
R7909
100K
R7962
SSM6N15FE
S 4
MIN_LINE_WIDTH=0.6 MM
MIN_NECK_WIDTH=0.25 MM
CRITICAL
44A2
45C5
0.22UF
CRITICAL
NC
1 2 3
SMC_ENRGYSTR_LDO_PGOOD
C7971
10%
25V
X5R
603
SOT563
5 G
0.001UF
GND_CHGR_SGND
TLV341
S 1
U7901
1%
1/16W
MF-LF
402
SOT563
10%
25V
X5R
402
100K
66B5 66A8
Q7960
D 3
SSM6N15FE
V+
SMC_SYS_ISET
R7960
15.0K
44B5
2 G
SOT563
2 X5R
1UF
10%
25V
2 X5R
603
NO STUFF
CHGR_VREF_VF
V-
D 6
Q7960
SSM6N15FE
CHGR_ACLIM_R 1
5%
1/16W
MF-LF
402
1/16W
MF-LF
402
C7951
1
C7907
C7950
1UF
1UF
10%
25V
X5R
603
7C4
CRITICAL
R7969
10K
20%
25V
2
POLY
CASE-D2-LF
SM
ACIN_ENABLE_GATE
XW7900
SMC_SYS_ISET_L
=PP3V42_G3H_ACIN
1
CRITICAL
CRITICAL
R7908
0.01
R7968
2.37K
1%
1/16W
MF-LF
402
R7953
402
RJK0305DPB
LFPAK
10%
2 25V
X5R
402
10%
2 25V
X5R
402
RJK0305DPB
C7917
R7970
GND_SMC_AVSS
LFPAK
C7903
0.1UF
NO STUFF
Q7901
Q7902
CRITICAL
22.6K
SMC_DCIN_ISENSE 44C5
4.53K
1%
GND
C7905 1 C7906
22UF
22UF
20%
CHGR_BOOT_RC
CRITICAL
0.1UF
FB 3
THRML
PAD
DCIN_ISENSE 1
SOT23-5
10%
25V
2
POLY
CASE-D2-LF
CRITICAL
24 NC
28 NC
INA193
C7970
CRITICAL
5%
1/16W
MF-LF
402
C7941
GND
D7950
0.1%
1/16W
MF
2 402
0.5%
402
1W
MF
2 0612
MIN_LINE_WIDTH=0.6 MM
MIN_NECK_WIDTH=0.25PP18V5_S5_CHGR_SW_R
MM
5%
1/16W
MF-LF
402
2
U7970 OUT 1
2 6.3V
CERM
0.02
5%
1/16W
MF-LF
402
2
R7910
2.2
12 CHGR_LGATE
1
5%
1/16W
MF-LF
2 402
0.1%-50PPM
1/16W
BAT54CW-X-F
MF-LF
SOT-323
402
1
2
1UF
R7997
NO STUFF
R7902
100K
17 CHGR_BGATE
25 CHGR_DCIN
10%
2 10V
X5R
402
1%
1/16W
MF-LF
2 402
100K
VADJ
CELLS
22
CHGR_CHLIM
7
=PP3V3_S0_PDCISENS
5 V+
1CRITICAL
R7905
18
CRITICAL
SGATE 18 CHGR_SGATE
CSIP 19
CSIN 20 CHGR_CSIN
ISL6257HRZ
1UF
88.7K
1 C7967
SOD-123
QFN
THRML_PAD
R7940
C7902
10%
25V
X5R
402
7 I.C.
NC
100K
CRITICAL
61C5 60C2 7C4
0.1UF
U7900
CHGR_CSOP
21 CSOP
R7944
FB
C7904 1
R7954
C7952
R7952
221K
PGOOD 5
VIN+ VIN-
5%
1/16W
MF-LF
2 402
CRITICAL
D7900
B0530WXF
PGND
0.1UF
26
NC 9
2
10%
2 25V
X5R
402
10K
100K
MIN_LINE_WIDTH=0.2 MM
MIN_NECK_WIDTH=0.2 MM
1UF
10%
2 10V
X5R
402
VDDP
GND
C7940
29
VDD
CHGR_ACLIM
8 ACLIM
CHGR_ICOMP
3 ICOMP
CHGR_VCOMP
4 VCOMP
C7912
11
CHGR_FB_R 1
16V
X5R
402
1
2
5%
1/16W
MF-LF
402
10
1%
1/16W
MF-LF
402
CHGR_FB
R7967
10%
2 25V
X5R
603
R7903
TDFN
SMC_ENRGYSTR_LDO_EN6 SHDN*
1UF
NO STUFF
CHGR_VDDP
R7900
4.7
10V
X5R
402
3.01K
0.033uF
10%
1UF
10%
1%
50V
1/16W
CERM
MF-LF
402
402
1
2 CHGR_VCOMP_RC
1
2
C7900
R7901
C7911
56.2K
0.001UF
10%
R7941
S1
CHGR_VDD
1
C7901
D2
D1
MIN_LINE_WIDTH=0.6 MM
MIN_NECK_WIDTH=0.25 MM
PPVDCIN_G3H_PRE
3
2
1
S
2
S3
S2
GATE
FDN360P_NL
D4
D3
8
7
6
5
=PP18V5_G3H_CHGR
CHGR_EN
7B1
44A2
CRITICAL
OUT 8
Placement Note:
MAX8719
Q7900
AO4409
LDO_OUT
VCCCRITICAL
66
OF
REV.
76
01
=PP5V_S0_LCD
7A7
PP5V_INV
100K
1%
R9001
100K
1
INV_PWREN_F_L
Q9006
SSM3K15FV
Q9005
D
INV_PWREN_L
1 G
7B1
VOLTAGE=12.6V
MIN_LINE_WIDTH=0.30 MM
MIN_NECK_WIDTH=0.20 MM
0402-LF
NTK3142P
SOT723-3
L9002
INVERTER CONNECTOR D
FERR-120-OHM-1.5A
1%
1/16W
MF-LF
402
D 3
SOD-VESM
FERR-120-OHM-1.5A
PPBUS_ALL_INV_CONN
=PPBUS_S5_INV 1
2
6B1
1/16W
MF-LF
2 402
L9003
MIN_LINE_WIDTH=0.30 MM
MIN_NECK_WIDTH=0.20 MM
VOLTAGE=5V
R9000
CRITICAL
J9000
0402-LF
78171-0004
2
1 G
14D5
IN
C9014
S 2
0.0022UF
LVDS_BKLT_EN
6B1
PP5V_INV_F
L9001
=PP3V3_S0_LCD
LVDS_BKLT_CTL
U9053Y
100PF
5%
5%
2 50V
CERM
402
SOT665
5 TC7SZ08AFEF
BKLIGHT_CTL
2 50V
CERM
402
5%
5%
2 50V
CERM
2 50V
CERM
402
402
C90591
INVT_CHGND
0.1UF
10%
16V
X5R 2
402
=PP3V3_S5_LCD
R9023
D 3
10K
5%
1/16W
MF-LF
402
6
5
2
1
PP3V3_LCDVDD_SW
1
1
LCDVDD_PWREN_L
SOD-VESM
LCD + CAMERA
FDC606P
SOT-6
5%
1/16W
MF-LF
2 402
SSM3K15FV
Q9003
100K
Q9004
8D8
CRITICAL
R9002
7D1
518S0521
0402-LF
PLT_RST_L
INV_GND
CRITICAL
14D5
6B1
120-OHM-0.3A-EMI
1
27D4 23A6
1
2
3
4
6B1 INV_BKLIGHT_PWM_L
VOLTAGE=5V
MIN_LINE_WIDTH=0.30 MM
MIN_NECK_WIDTH=0.20 MM
0402-LF
10%
50V
CERM
402
M-RT-SM
5
L9000
120-OHM-0.3A-EMI
C9011
0.1UF
LCDVDD_PWREN_L_R
C9009
VOLTAGE=3.3V
MIN_LINE_WIDTH=0.30 MM
MIN_NECK_WIDTH=0.20 MM
0.001UF
C9012
10UF
10%
2 16V
X5R
402
CONNECTOR
20%
2 6.3V
X5R
603
CRITICAL
J9001
S-050162B
F-RT-SM
10%
50V
CERM
402
25
C9013
0.0033UF
1
1 G
14D5
IN
S 2
=PP3V3_S0_LCD
10%
50V
CERM
402
LVDS_VDD_EN
R9009
R9008
10K
10K
5%
1/16W
MF-LF
2402 67C6
5%
1/16W
MF-LF
2402
14D5
14D5
R9014
100K
1%
1/16W
MF-LF
2 402
L9004
FERR-120-OHM-1.5A
67A6
67A4 67A2 8C8
PP3V3_S0_LCD_F
(LVDS DDC POWER)
VOLTAGE=3.3V MIN_LINE_WIDTH=0.25 MIN_NECK_WIDTH=0.20
MM
MM
0402-LF
LVDS_DDC_CLK
LVDS_DDC_DATA
CRITICAL
L9006
90-OHM-200MA
SM
5%
1/16W
MF-LF
SM
5%
1/16W
MF-LF
LVDS_CTRL_CLK
14D5 12B1
LVDS_CTRL_DATA
71D3 14C5
SYM_VER-1
8C2
2402
8C2
14D5 12B1
IO
LVDS_A_CLK_N1
IO
LVDS_A_CLK_P2
L9007
90-OHM-200MA
2 402
71D3 14C5
CRITICAL
R9015
R9016
10K
10K
IO
IO
=USB2_CAMERA_P
=USB2_CAMERA_N
7A4
1
=PP5V_S3_CAMERA
OUT
MIC_LO_LVDS
MIC_LO_LVDS_CONN
0402NOSTUFF
L9011
OUT
MIC_HI_LVDS
C90161
MIC_HI_LVDS_CONN
0402NOSTUFF
50V
CERM
402
67A2
L9012
FERR-1000-OHM
71D3 14C5
IO
71D3 14C5
IO
71D3 14C5
IO
OUT
=GND_CHASSIS_LVDS
0402 NOSTUFF
NOSTUFF
CRITICAL 2 CRITICAL
DZ9000
DZ9001
402-1
402-1
8V-100PF
1%
1/16W
MF-LF
402
C9010
C90151 0.001UF
10%
50V
50V
CERM
402
CERM
402
=GND_CHASSIS_LVDS
26
SYNC_MASTER=GPU SYNC_DATE=06/23/2006
C90081
0.001UF
10%
=GND_CHASSIS_LVDS
DRAWING NUMBER
051-7455
SCALE
SHT
NONE
CAMERA I/F
Plexi: 516S0212
*Enclosure: 518S0364
APPLE INC.
LCD I/F
INVERTER,LVDS,TMDS
50V
CERM
402
MIC_LO_LVDS_CONN
MIC_HI_LVDS_CONN
24
67B2 67A6 67A4 8C8
0.001UF
10%
67A4
8V-100PF
1
67B2 67A4 67A2 8C8
LVDS_A_DATA_N<0>
LVDS_A_DATA_P<0>
LVDS_A_DATA_N<1>
LVDS_A_DATA_P<1>
LVDS_A_DATA_N<2>
LVDS_A_DATA_P<2>
LVDS_A_CLK_F_N
LVDS_A_CLK_F_P
67A4
VOLTAGE=5V
MIN_NECK_WIDTH=0.20 MM
MIN_LINE_WIDTH=0.30 MM
0.001UF
10%
FERR-1000-OHM
LVDS_IBG
IO
PP5V_S3_CAMERA_F
L9010
71C3 14D5
IO
71D3 14C5
USB2_CAMERA_CONN_P
USB2_CAMERA_CONN_N
0402-LF
FERR-1000-OHM
R9013
2.37K
IO
71D3 14C5
L9005
FERR-120-OHM-1.5A
NOSTUFF
71D3 14C5
SYM_VER-1
NOSTUFF
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
VOLTAGE=3.3VMIN_LINE_WIDTH=0.30 MIN_NECK_WIDTH=0.20
MM
MM
0402-LF
120-OHM-0.3A-EMI
1
2
=PP3V3_S0_LCD
=PP3V3_S0_LCD
NOSTUFF
23
PP3V3_LCDVDD_SW_F
L9008
=GND_CHASSIS_LVDS
67
OF
REV.
76
01
7
L9206
L9201
FERR-120-OHM-1.5A
69C8
68D8 68C8
68B1 7C4
68B7 68B2
69C2 69B7
1
=PP3V3_S0_TMDS
PP3V3_S0_ANALOG_TMDS_F
VOLTAGE=3.3V
MIN_LINE_WIDTH=0.5MM
MIN_NECK_WIDTH=0.25MM
0402-LF
1
C9236
0.001UF
10%
50V
2 CERM
402
68B1
68B4
7B7
68D6
FERR-120-OHM-1.5A
2
=PP1V8_S0_TMDS1
C9207
10%
2 50V
CERM
402
0.1UF
10%
16V
2 X5R
402
0.1UF
0.1UF
10UF
10%
2 16V
X5R
402
PP1V8_S0_TMDS_F
10%
2 16V
X5R
402
20%
2 6.3V
X5R
603
C9208 1C9209
0.001UF
10%
2 50V
CERM
402
10%
2 50V
CERM
402
0.1UF
10%
2 16V
X5R
402
PP3V3_S0_ANALOG_SDVO_F
0.001UF
10%
2 50V
CERM
402
68C4
68D6 7B7
C9230
C9231
0.001UF
0.1UF
10%
2 50V
CERM
402
10%
2 16V
X5R
402
=PP1V8_S0_TMDS 1
C9214
0.1UF
C9200
0.001UF
10%
2 16V
X5R
402
10%
2 50V
CERM
402
C9201
0.001UF
10%
2 50V
CERM
402
C9202
C9203
0.1UF
0.1UF
10%
2 16V
X5R
402
10%
2 16V
X5R
402
1%
1/16W
MF-LF
402
1%
1/16W
MF-LF
402
TMDS_TX_P<1>
0.001UF
R9208
49.9
1
R9238
TMDS_TX<1> 149.92
1%
1/16W
MF-LF
402
68C4
603
VOLTAGE=3.3V
MIN_LINE_WIDTH=0.3MM
MIN_NECK_WIDTH=0.25MM
C9232
C9233
0.001UF
0.1UF
10%
2 50V
CERM
402
R9209
R9239
1%
1/16W
MF-LF
402
1%
1/16W
MF-LF
402
10%
2 16V
X5R
402
C9206
R9210
0.1UF
10%
2 16V
X5R
402
69A2 68B2
68D6 68B1
68D3
PP3V3_S0_ANALOG_TMDS_F
PP1V8_S0_TMDS_F
TMDS_SDR_N38
TMDS_SDG_P40
TMDS_SDG_N41
TMDS_SDB_P43
TMDS_SDB_N44
C9219
0.1UF
10% 16V
X5R 402
=PP3V3_S0_TMDS
14C3
71D3 OUT
R9201
2.94K
CRITICAL
R9200 5.5V
TOL INPUT
10K 2TMDS_HTPLG_R
2
U9201
74LVC1G17DRL
1/16W
MF-LF
402
1%
1/16W
MF-LF
402
R9202
2.94K
1%
1/16W
MF-LF
402
OUT
1
PEG_D2R_P<1>
PEG_D2R_N<1>
15A3
15A3
TMDS_INT_P
TMDS_INT_N
32
33
TMDS_EXT_RES
35
TMDS_RST_L
SDVO_CTRLCLK
SDVO_CTRLDATA
TMDS_HTPLG_BUF
1
9.09K
1%
1/16W
MF-LF
402
10% 16V
X5R 402
27D1
IO
R9211
0.1UF
IO
TMDS_SDC_P46
TMDS_SDC_N47
C9220
SOT-553
4
NC
R9212
IF
9.09K
1%
1/16W
MF-LF
402
5
4
6
ADDRESS=0X70
NC
HIGH, ADDRESS=0X72
29
DVI_HOTPLUG_DET
R9203
23A6 68B8
1K
5%
U9200
TXC_P
TXC_N
17
16
20
19
23
22
14
13
EXT_SWING
25
LQFP
SDG_P
SDG_N
SDB_P
SDVO RCVR
CORE
SDB_N
TX1_P
DIFF SIG
DATA
SDC_P
SDC_N
SDI_P
SDI_N
RESET*
SDSDA
TX1_N
TX2_P
TX2_N
I2C MASTER
INTER SCLDDC 8
SDADDC 9
EXT_RES
CONFIG/
PRGRM
TEXT MODE
0.1UF
10%
402
TX0_P
TX0_N
SIL1362ACLU
SDR_N
SDSCL
48
CRITICAL
C92211 C9205
2 16V
X5R
OVCC
0.1UF
10%
2 16V
X5R
402 TMDS_SDR_P37 SDR_P
SPVCC
0.1UF
0.1UF
10%
10%
2 16V
2 16V
X5R
X5R
402
402
VCC2
0.1UF
0.1UF
10%
10%
2 16V
2 16V
X5R
X5R
402
402
5%
1/16W
MF-LF
402
VCC0
0.1UF
10%
16V
X5R
402
10UF
20%
2 6.3V
X5R
603
69B2 68D3
69B2 68D1
69B2 68D3
69B2 68D1
69B2 68C3
69B2 68C1
69A2 68C3
69A2 68C1
PP3V3_S0_ANALOG_TMDS_F
TMDS_TX_P<0>
OUT
TMDS_TX_N<0>
OUT
TMDS_TX_P<1>
OUT
TMDS_TX_N<1>
OUT
TMDS_TX_P<2>
OUT
TMDS_TX_N<2>
OUT
TMDS_TX_CLK_P
OUT
TMDS_TX_CLK_N
OUT
68B4 68D6
R9204
249
1%
1/16W
MF-LF
2402
=PP3V3_S0_TMDS
B
7C4 68B2 68B7 68C8 68D8 69B7
69C2 69C8
1
R9205
R9206
10K
10K
TMDS_EXT_SWING
TMDS_I2C_SCL
TMDS_I2C_SDA
5%
1/16W
MF-LF
2402
5%
1/16W
MF-LF
2402
30
A1
HTPLG
GND0
GND1
5%
1/16W
MF-LF
2402
7
31
C92411 C92421
0.1UF
0.1UF
10%
10%
2 16V
2 16V
2
X5R
X5R
402
402
VCC1
10
28
34
100K
=PP3V3_S0_TMDS
SPGND
IN
SGND1
IN
71D3 14B3
IN
71D3 14B3
R9250
0.001UF
PP3V3_S0_PVCC2_TMDS_F
PP3V3_S0_PVCC1_TMDS_F
36
42
IN
71D3 14C3
68C6
SVCC0
SVCC1
71D3 14B3
68C7
PEG_R2D_C_N<1>
PEG_R2D_C_P<2>
PEG_R2D_C_N<2>
PEG_R2D_C_P<3>
PEG_R2D_C_N<3>
C9225
PP3V3_S0_ANALOG_SDVO_F
PP1V8_S0_ANALOG_SDVO_F
SGND0
IN
68D3
39
45
71D3 14C3
68D6
11
26
IN
PEG_R2D_C_P<1>
PVCC2
PEG_R2D_C_N<0>
PVCC1
IN
71D3 14B3
PGND2
0.1UF
10%
2 16V
X5R
402
27
71D3 14C3
15
21
PEG_R2D_C_P<0>
AVCC0
AVCC1
IN
AGND2
C9235
71D3 14B3
DVI_HOTPLUG_DET
TMDS_HTPLG
68B2 69A2
1%
1/16W
MF-LF
402
68C4
AGND0
AGND1
C9234
0.001UF
IN
R9240
49.92 TMDS_TX_CLK_N
1
TMDS_TX_CLK
12
18
24
VOLTAGE=3.3V
MIN_LINE_WIDTH=0.3MM
MIN_NECK_WIDTH=0.25MM
10%
2 50V
CERM
402
69C6
C9224
10%
2 50V
CERM
402
0402-LF
1
49.92
1
TMDS_TX_CLK_P
1%
1/16W
MF-LF
402
PP3V3_S0_PVCC2_TMDS_F
68B2 69B2
10%
2 50V
CERM
402
68C4
L9205
FERR-120-OHM-1.5A
1
=PP3V3_S0_TMDS
TMDS_TX_N<2>
0.001UF
PP3V3_S0_PVCC1_TMDS_F
0402-LF
69C2 69B7
68B2 68B1 7C4
68D8 68C8 68B7
69C8
68B2 69B2
1%
1/16W
MF-LF
402
L9204
TMDS_TX_N<1>
10UF
20%
FERR-120-OHM-1.5A
C9223
0.001UF
C9204
2 6.3V
X5R
68B2 69B2
10%
2 50V
CERM
402
69B2 68B2
69C8
68D8 68C8
68B1 7C4
68B7 68B2
69C2 69B7
C9222
TMDS_TX_N<0>
10%
2 50V
CERM
402
VOLTAGE=1.8V
MIN_LINE_WIDTH=0.5MM
MIN_NECK_WIDTH=0.25MM
R9237
20%
6.3V
2 X5R
603
PP1V8_S0_ANALOG_SDVO_F
0402-LF
R9207
10UF
69B2 68B2
VOLTAGE=3.3V
MIN_LINE_WIDTH=0.3MM
MIN_NECK_WIDTH=0.25MM
0402-LF
68B2
69B2
C9212 1 C9213
L9200
FERR-120-OHM-1.5A
C9210 1C9211
0.001UF
10%
2 16V
X5R
402
0.1UF
68B4
VOLTAGE=1.8V
MIN_LINE_WIDTH=0.5MM
MIN_NECK_WIDTH=0.25MM
0402-LF
L9203
FERR-120-OHM-1.5A
69C8
68D8 68C8
68B1 7C4
68B7 68B2
69C2 69B7
1/16W
MF-LF
2402
EXTERNAL TMDS
SYNC_MASTER=GRAPHIC
SYNC_DATE=06/06/2005
D
APPLE INC.
DRAWING NUMBER
051-7455
SCALE
SHT
NONE
68
OF
REV.
76
01
NB VIDEO ALIASES
CRT_TVO_IREF
TV_A_DAC
TV_B_DAC
TV_C_DAC
=CRT_TVO_IREF
=TV_A_DAC
=TV_B_DAC
=TV_C_DAC
14A5
14C5
14B5
14B5
71C3
14B5 69D8
=CRT_BLUE
CRT_BLUE
=CRT_GREEN
CRT_GREEN
=CRT_RED
CRT_RED
=CRT_HSYNC_R
=CRT_VSYNC_R
CRT_HSYNC_R
CRT_VSYNC_R
69B8 71C3
MAKE_BASE=TRUE
MAKE_BASE=TRUE
69B8 71C3
MAKE_BASE=TRUE
14B5
69A8 71C3
MAKE_BASE=TRUE
MAKE_BASE=TRUE
69A8 71C3
MAKE_BASE=TRUE
14B5
69A8 71C3
MAKE_BASE=TRUE
14B5
14A5
69C3 71C3
MAKE_BASE=TRUE
69C3 71C3
MAKE_BASE=TRUE
71C3 69D7
R9469
1.21K
CRT_TVO_IREF
7A7
1SS418
L9444
600-OHM-300MA
SOD-723
0.5AMP-13.2V
PP5V_S0_TMDS_FUSE
2
2
1
=PP5V_S0_TMDS 1
1%
1/16W
MF-LF
402
7C4
D9401
CRITICAL
F9404
VOLTAGE=5V
MIN_LINE_WIDTH=0.30 MM
MIN_NECK_WIDTH=0.20 MM
PP5V_S0_DVIPORT
VOLTAGE=5V
MIN_LINE_WIDTH=0.5 MM
MIN_NECK_WIDTH=0.25 MM
SM-LF
0402
1
C9404
0.1UF
PLACE THE RESISTOR CLOSE TO GMCH AND THE CAP NEAR CONNECTOR
69B4
VOLTAGE=5V
MIN_LINE_WIDTH=0.5 MM
MIN_NECK_WIDTH=0.25 MM
=PP3V3_S0_TMDS
20%
2 10V
CERM
402
=GND_CHASSIS_TMDS_UPPER
TABLE_ALT_HEAD
=PP3V3_S0_NB
PART NUMBER
ALTERNATE FOR
PART NUMBER
BOM OPTION
REF DES
740S0044
740S0028
F9404
COMMENTS:
CRITICAL
8C8 69A4
R9460
39
TABLE_ALT_ITEM
71C3 69D5
R9466 R9467
2.2K
5%
1/16W
MF-LF
2402
TV_DCONSEL<0>
14B5
TV_DCONSEL<1>
1/16W
MF-LF
2 402
1
R9462
2.2K
10%
2 50V
CERM
402
GPU_CRT_DDC_CLK
SSM6N15FE
SOT563
2
G
CRT_DDC_DATA
Q9401
IO
1/16W
MF-LF
4022
IO
CRT_DDC_CLK
2.2K
5%
SOT563
5%
2 50V
CERM
402
14B5
14B5
1%
1/16W
MF-LF
2402
=CRT_BLUE_L
TV_B_DAC
CRT_GREEN
R9452 1R9453
75
1%
75
1%
1/16W
MF-LF
2402
14B5
14B5
1/16W
MF-LF
2 402
=TV_B_RTN
5
6
S1B
S2B
11
10
S1C
14
13
S1D
DA
U9401
S2A
S2C
SOP
S2D
GND
=CRT_GREEN_L
DB
DC
DD
12
IN
EN_L
1
15
FL9400
210MHZ
CRT_VSYNC_LS 1
69D5
71C3
C9443
33PF
1
9
2
10
3
11
4
12
5
13
6
14
7
15
8
16
25
69D4
PP5V_S0_DVIPORT 17
VGA_B
VGA_HSYNC
VGA_G
69C1 VGA_VSYNC
26
18
27
19
28
20
29
30
22
31
32
24
69C4 8C8
=GND_CHASSIS_TMDS_UPPER
68B2 68C3
TMDS_TX_N<2>
68B2 68C1
4
SYM_VER-1
TMDS_TX_CONN_P<2>
L9407
90-OHM-100MA
1210-4SM1
TMDS_TX_CONN_N<2>
2
1
TMDS_TX_CONN_N<1>
TMDS_TX_P<1>
68B2 68D3
TMDS_TX_N<1>
68B2 68D1
TMDS_TX_CONN_P<1>
4
SYM_VER-1
CRITICAL
TMDS_TX_CONN_P<0>
L9406
90-OHM-100MA
1210-4SM1
TMDS_TX_CONN_N<0>
2
1
TMDS_TX_CONN_CLK_N
TMDS_TX_P<0>
68B2 68D3
TMDS_TX_N<0>
68B2 68D1
TMDS_TX_CONN_CLK_P
4
SYM_VER-1
CRITICAL
L9404
300-OHM-50MA
1210-4SM
514-0376
CRITICAL
TMDS_TX_P<2>
CRITICAL
8A6
2
1
=GND_CHASSIS_TMDS_DOWN
EXT_C_R
TMDS_TX_CLK_P
68B2 68C3
TMDS_TX_CLK_N
68B2 68C1
3
4
SYM_VER-1
C9421
0.1UF
10%
2 16V
X5R
402
MINI-DVI CONNECTOR
SYNC_MASTER=EUGENESYNC_DATE=05/21/05
NOTICE OF PROPRIETARY PROPERTY
TV_C_DAC
CRT_RED
R9454 1R9455
75
1%
1/16W
MF-LF
2 402
14B5
14B5
69B4
NOSTUFF
VGA_VSYNC
5%
1/16W
MF-LF
402
F-RT-TH
VGA_R
EXT_Y_G
MINI-DVI-M42-BLK
100PF
5%
MEA2010P-SM
125
GND
33
34
35
36
69D7
71C3
69D5
71C3
S1A
J9401
C9412
69C1
VCC
2
3
TS3V330
R9471
39
US
VCC
OMIT
CRITICAL
0.1UF
10%
CRITICAL
16
33PF
5%
CRITICAL
EXT_COMPVID_B
2 16V
X5R
402
C9442
L9405
NC
NC
C9439
CRT_VSYNC_R
8 U9404
SN74LVC2G125DCU
2 A
CRT_VSYNC_LS_R
90-OHM-100MA
1210-4SM1
=PP3V3_S0_TMDS
=TV_A_RTN
69B4
NOSTUFF
402
2 50V
CERM
402
69C8 69C2
68B2 68B1 7C4
68D8 68C8 68B7
VGA_HSYNC
5%
1/16W
MF-LF
402
5%
1%
1/16W
MF-LF
2402
CRT_HSYNC_LS 1 39
2 50V
CERM
GPU_CRT_DDC_DATA
69D7
71C3
71C3 69D5
1
R9450
R9451
75
75
100PF
C9411
0.001UF
SSM6N15FE
125
C9410
Q9401
VCC
GND
R9461
39
TMDS_HTPLG
R94211 R94221
R9470
US
5 A
CRT_HSYNC_LS_R
5%
1/16W
MF-LF
402
1
1/16W
MF-LF
4022
14B5
71C3 69D5
=PP3V3_S0_TMDS
2.2K
5%
14B5
5%
1/16W
MF-LF
2402
0.1UF
20%
2 10V
CERM
402
402
PLACE THE RESISTOR CLOSE TO GMCH AND THE CAP NEAR THE CONNECTOR
CRITICAL
R9463
2.2K
5%
1/16W
MF-LF
4022
8 U9404
SN74LVC2G125DCU
C9460
2 50V
CERM
68A8
5%
1/16W
MF-LF
402
PP5V_S0_DVIPORT_D
2.2K
5%
14B5
CRT_HSYNC_R1
75
1%
SB_CRT_TVOUT_MUX_L
1/16W
MF-LF
2402
24D2
TABLE_5_HEAD
CRITICAL
BOM OPTION
514-0480
PART#
QTY
DESCRIPTION
CONN,REC,MINI-DVI,32P,RA,TABS,MG3
REFERENCE DESIGNATOR(S)
J9401
CRITICAL
NORMAL
514-0481
CONN,REC,MINI-DVI,32P,RA,TABS,BLK
J9401
CRITICAL
FANCY
=TV_C_RTN
SIZE
TABLE_5_ITEM
=CRT_RED_L
TABLE_5_ITEM
APPLE INC.
DRAWING NUMBER
051-7455
SCALE
SHT
NONE
69
OF
REV.
76
01
TABLE_PHYSICAL_RULE_HEAD
PHYSICAL_RULE_SET
LAYER
ALLOW ROUTE
ON LAYER?
FSB_55S
=55_OHM_SE
=55_OHM_SE
=55_OHM_SE
=STANDARD
=STANDARD
ELECTRICAL_CONSTRAINT_SET
PHYSICAL
SPACING
TABLE_PHYSICAL_RULE_ITEM
FSB_COMMON
FSB_55S
FSB_COMMON
FSB_COMMON
FSB_55S
FSB_COMMON
TABLE_PHYSICAL_RULE_ITEM
FSB_DSTB_55S
=55_OHM_SE
=55_OHM_SE
=55_OHM_SE
=1:1_DIFFPAIR
=1:1_DIFFPAIR
TABLE_SPACING_RULE_HEAD
SPACING_RULE_SET
LAYER
LINE-TO-LINE SPACING
TABLE_SPACING_RULE_HEAD
WEIGHT
SPACING_RULE_SET
LAYER
LINE-TO-LINE SPACING
WEIGHT
TABLE_SPACING_RULE_ITEM
FSB_ADDR
=3:1_SPACING
FSB_DATA
=3:1_SPACING
TABLE_SPACING_RULE_ITEM
=2:1_SPACING
FSB_ADSTB
=3:1_SPACING
TABLE_SPACING_RULE_ITEM
FSB_DATA2DATA
=2:1_SPACING
FSB_DSTB
=3:1_SPACING
TABLE_SPACING_RULE_ITEM
=3:1_SPACING
FSB_COMMON
FSB_55S
FSB_COMMON
FSB_COMMON
FSB_55S
FSB_COMMON
FSB_COMMON
FSB_55S
FSB_COMMON
FSB_COMMON
FSB_55S
FSB_COMMON
FSB_COMMON
FSB_55S
FSB_COMMON
FSB_COMMON
FSB_55S
FSB_COMMON
FSB_COMMON
FSB_55S
FSB_COMMON
FSB_COMMON
FSB_55S
FSB_COMMON
FSB_COMMON
FSB_55S
FSB_COMMON
FSB_COMMON
FSB_55S
FSB_COMMON
FSB_CPURST_L
FSB_55S
FSB_COMMON
FSB_DATA_GROUP0
FSB_55S
FSB_DATA
FSB_DATA_GROUP0
FSB_55S
FSB_DATA
FSB_DSTB0
FSB_DSTB_55S
FSB_DSTB
FSB_DSTB_55S
FSB_DSTB
FSB_DATA_GROUP1
FSB_55S
FSB_DATA
FSB_DATA_GROUP1
FSB_55S
FSB_DATA
FSB_DSTB1
FSB_DSTB_55S
FSB_DSTB
FSB_DSTB_55S
FSB_DSTB
TABLE_SPACING_RULE_ITEM
TABLE_SPACING_RULE_ITEM
FSB_ADDR2ADSTB
FSB_55S
TABLE_SPACING_RULE_ITEM
FSB_ADDR2ADDR
FSB_COMMON
FSB_COMMON
TABLE_SPACING_RULE_ITEM
FSB_DATA2DSTB
=3:1_SPACING
TABLE_SPACING_RULE_HEAD
SPACING_RULE_SET
LAYER
LINE-TO-LINE SPACING
WEIGHT
TABLE_SPACING_RULE_ITEM
FSB_COMMON
=2:1_SPACING
?
TABLE_SPACING_ASSIGNMENT_HEAD
NET_SPACING_TYPE1
NET_SPACING_TYPE2
AREA_TYPE
SPACING_RULE_SET
FSB_ADDR
FSB_ADDR
FSB_ADDR2ADDR
TABLE_SPACING_ASSIGNMENT_ITEM
FSB_ADS_L
FSB_BNR_L
FSB_BPRI_L
FSB_BREQ0_L
FSB_DBSY_L
FSB_DEFER_L
FSB_DPWR_L
FSB_DRDY_L
FSB_HIT_L
FSB_HITM_L
FSB_LOCK_L
FSB_RS_L<2..0>
FSB_TRDY_L
FSB_CPURST_L
FSB_D_L<15..0>
FSB_DINV_L<0>
FSB_DSTB_L_P<0>
FSB_DSTB_L_N<0>
9D6 13C3
9D6 13C3
9D6 13C3
9D6 13B3
9D6 13B3
9D6 13B3
9B2 13B3
9D6 13B3
9C6 13B3
9C6 13B3
9D6 13B3
9D6 13A3
9D6 13B3
9D6 12B5 13A5
TABLE_SPACING_ASSIGNMENT_ITEM
FSB_ADDR
FSB_ADSTB
FSB_ADDR2ADSTB
FSB_DATA
FSB_DATA
FSB_DATA2DATA
FSB_DATA
FSB_DSTB
FSB_DATA2DSTB
TABLE_SPACING_ASSIGNMENT_ITEM
TABLE_SPACING_ASSIGNMENT_ITEM
FSB_DATA_GROUP2
FSB_55S
FSB_DATA
FSB_DATA_GROUP2
FSB_55S
FSB_DATA
FSB_DSTB2
FSB_DSTB_55S
FSB_DSTB
FSB_DSTB_55S
FSB_DSTB
Design Guide recommends each strobe/signal group is routed on the same layer.
Design Guide recommends FSB signals be routed only on internal layers.
FSB_DATA_GROUP3
FSB_55S
FSB_DATA
FSB_DATA_GROUP3
FSB_55S
FSB_DATA
FSB_DSTB3
FSB_DSTB_55S
FSB_DSTB
FSB_DSTB_55S
FSB_DSTB
FSB_ADDR_GROUP0
FSB_55S
FSB_ADDR
FSB_ADDR_GROUP0
FSB_55S
FSB_ADDR
FSB_ADSTB0
FSB_55S
FSB_ADSTB
FSB_ADDR_GROUP1
FSB_55S
FSB_ADDR
FSB_ADSTB1
FSB_55S
FSB_ADSTB
CPU_IERR_L
CPU_55S
CPU_FERR_L
CPU_55S
CPU_PROCHOT_L
CPU_55S
CPU_PWRGD
CPU_55S
CPU_FROM_SB
CPU_55S
CPU_FROM_SB
CPU_55S
CPU_FROM_SB
CPU_55S
CPU_FROM_SB
CPU_55S
CPU_FROM_SB
CPU_55S
CPU_INIT_L
CPU_55S
CPU_FROM_SB
CPU_55S
CPU_FROM_SB
CPU_55S
PM_THRMTRIP_L
CPU_55S
FSB_CPUSLP_L
CPU_55S
PM_DPRSLPVR
CPU_55S
CPU_2TO1
(See above)
CPU_55S
CPU_2TO1
CPU_BSEL0
CPU_55S
CPU_2TO1
(See above)
CPU_55S
CPU_2TO1
CPU_BSEL1
CPU_55S
CPU_2TO1
(See above)
CPU_55S
CPU_2TO1
CPU_BSEL2
CPU_55S
CPU_2TO1
(See above)
CPU_55S
CPU_2TO1
CPU_DPRSTP_L
CPU_55S
CPU_2TO1
CPU_GTLREF
CPU_55S
CPU_GTLREF
CPU_COMP
CPU_55S
CPU_COMP
NOTE: Design Guide does not indicate FSB spacing to other signals, assumed 3:1.
NOTE: Design Guide allows closer spacing if signal lengths can be shortened.
SOURCE: Santa Rosa Platform DG, Rev 0.9 (#20517), Sections 4.2 & 4.3
PHYSICAL_RULE_SET
LAYER
ALLOW ROUTE
ON LAYER?
CPU_27P4S
=27P4_OHM_SE
=27P4_OHM_SE
=27P4_OHM_SE
7 MIL
7 MIL
CPU_55S
=55_OHM_SE
=55_OHM_SE
=55_OHM_SE
=STANDARD
=STANDARD
SPACING_RULE_SET
LAYER
TABLE_PHYSICAL_RULE_ITEM
TABLE_PHYSICAL_RULE_ITEM
TABLE_SPACING_RULE_HEAD
LINE-TO-LINE SPACING
WEIGHT
TABLE_SPACING_RULE_ITEM
CPU_2TO1
=2:1_SPACING
CPU_COMP
25 MIL
CPU_2TO1
TABLE_SPACING_RULE_ITEM
TABLE_SPACING_RULE_ITEM
CPU_GTLREF
25 MIL
?
TABLE_SPACING_RULE_ITEM
CPU_ITP
=2:1_SPACING
?
TABLE_SPACING_RULE_ITEM
CPU_VCCSENSE
25 MIL
CPU_2TO1
CPU_COMP
CPU_27P4S
CPU_COMP
CPU_COMP
CPU_55S
CPU_COMP
CPU_COMP
CPU_27P4S
CPU_COMP
XDP_TDI
CPU_55S
CPU_ITP
XDP_TDO
CPU_55S
CPU_ITP
XDP_TMS
CPU_55S
CPU_ITP
XDP_TCK
CPU_55S
CPU_ITP
XDP_TRST_L
CPU_55S
CPU_ITP
XDP_BPM_L
CPU_55S
CPU_ITP
XDP_BPM_L5
CPU_55S
CPU_ITP
CLK_FSB_100D
CLK_FSB
CLK_FSB_100D
CLK_FSB
CPU_55S
CPU_ITP
CPU_55S
CPU_2TO1
CPU_55S
CPU_2TO1
CPU_VCCSENSE
CPU_27P4S
CPU_VCCSENSE
CPU_VCCSENSE
CPU_27P4S
CPU_VCCSENSE
CPU_27P4S
CPU_VCCSENSE
CPU_27P4S
CPU_VCCSENSE
(FSB_CPURST_L)
FSB_D_L<31..16>
FSB_DINV_L<1>
FSB_DSTB_L_P<1>
FSB_DSTB_L_N<1>
FSB_D_L<47..32>
FSB_DINV_L<2>
FSB_DSTB_L_P<2>
FSB_DSTB_L_N<2>
FSB_D_L<63..48>
FSB_DINV_L<3>
FSB_DSTB_L_P<3>
FSB_DSTB_L_N<3>
FSB_A_L<16..3>
FSB_REQ_L<4..0>
FSB_ADSTB_L<0>
FSB_A_L<35..17>
FSB_ADSTB_L<1>
CPU_IERR_L
CPU_FERR_L
CPU_PROCHOT_L
CPU_PWRGD
CPU_INTR
CPU_NMI
CPU_A20M_L
CPU_DPSLP_L
CPU_IGNNE_L
CPU_INIT_L
CPU_SMI_L
CPU_STPCLK_L
PM_THRMTRIP_L
FSB_CPUSLP_L
PM_DPRSLPVR
IMVP_DPRSLPVR
CPU_BSEL<0>
NB_BSEL<0>
CPU_BSEL<1>
NB_BSEL<1>
CPU_BSEL<2>
NB_BSEL<2>
CPU_DPRSTP_L
CPU_GTLREF
CPU_COMP<3>
CPU_COMP<2>
CPU_COMP<1>
CPU_COMP<0>
XDP_TDI
XDP_TDO
XDP_TMS
XDP_TCK
XDP_TRST_L
XDP_BPM_L<4..0>
XDP_BPM_L<5>
XDP_CLK_P
XDP_CLK_N
ITP_CPURST_L
CPU_VID<6..0>
IMVP6_VID<6..0>
CPU_VCCSENSE_P
CPU_VCCSENSE_N
IMVP6_VSEN_P
IMVP6_VSEN_N
9D8 13C3
9C8 13C3
9C8 13C3
9D6
9C8 22C2
9C5 45B5 45C3 59C8
9B2 12B1 22C4
9B8 22C4
9B8 22C4
9C8 22C4
9B2 22C4
9C8 22C4
9D6 22C4 46B2
9B8 22C4
9B8 22C4
9C6 15A6 22C2 45B3
9A2 13A5
15A6 24C3 59D8
59C7
9B4 29C6
15C6 29C8
9A4 29B6
15C6 29B8
9A4 29A6
15B6 29B8
9B4
9B3
9B3
9B3
9B3
10B7 59C7
CPU/FSB Constraints
SYNC_MASTER=WFERRY
SYNC_DATE=06/08/2006
D
APPLE INC.
DRAWING NUMBER
051-7455
SCALE
SHT
NONE
70
OF
REV.
76
01
TABLE_PHYSICAL_RULE_HEAD
PHYSICAL_RULE_SET
LAYER
ALLOW ROUTE
ON LAYER?
PCIE_100D
=100_OHM_DIFF
=100_OHM_DIFF
=100_OHM_DIFF
=100_OHM_DIFF
=100_OHM_DIFF
ELECTRICAL_CONSTRAINT_SET
PHYSICAL
SPACING
TABLE_PHYSICAL_RULE_ITEM
PEG_R2D
DMI_100D
=100_OHM_DIFF
=100_OHM_DIFF
=100_OHM_DIFF
=100_OHM_DIFF
PCIE
PCIE_100D
PCIE
PCIE_100D
PCIE
PCIE_100D
PCIE
DMI_100D
DMI
DMI_100D
DMI
DMI_100D
DMI
DMI_100D
DMI
LVDS_A_CLK
LVDS_100D
LVDS
LVDS_A_CLK
LVDS_100D
LVDS
LVDS_A_DATA
LVDS_100D
LVDS
LVDS_A_DATA
LVDS_100D
LVDS
LVDS_A_DATA3
LVDS_100D
LVDS
LVDS_A_DATA3
LVDS_100D
LVDS
LVDS_A_CLK_P
LVDS_A_CLK_N
LVDS_A_DATA_P<2..0>
LVDS_A_DATA_N<2..0>
LVDS_A_DATA_P<3>
LVDS_A_DATA_N<3>
LVDS_IBG
LVDS
LVDS_IBG
CRT_TVO_IREF
CRT
CRT_TVO_IREF
CRT_RED
CRT_GREEN
CRT_BLUE
CRT_HSYNC_R
CRT_VSYNC_R
TV_A_DAC
TV_B_DAC
TV_C_DAC
=100_OHM_DIFF
TABLE_SPACING_RULE_HEAD
SPACING_RULE_SET
LAYER
LINE-TO-LINE SPACING
PEG_D2R_N<1>
PEG_D2R_P<1>
PEG_R2D_C_P<3..0>
PEG_R2D_C_N<3..0>
PCIE_100D
TABLE_PHYSICAL_RULE_ITEM
WEIGHT
14D3 68B6
14C3 68B6
14B3 68B6 68C6
14B3 14C3 68B6 68C6
TABLE_SPACING_RULE_ITEM
PCIE
20 MIL
DMI
20 MIL
TABLE_SPACING_RULE_ITEM
SOURCE: Santa Rosa Platform DG, Rev 1.0 (#21112), Sections 7.2, 9.2 & 10.5
DMI_N2S
DMI_S2N
TABLE_PHYSICAL_RULE_HEAD
PHYSICAL_RULE_SET
LAYER
ALLOW ROUTE
ON LAYER?
LVDS_100D
=100_OHM_DIFF
=100_OHM_DIFF
=100_OHM_DIFF
=100_OHM_DIFF
=100_OHM_DIFF
CRT_50S
=50_OHM_SE
=50_OHM_SE
=50_OHM_SE
=STANDARD
=STANDARD
TABLE_PHYSICAL_RULE_ITEM
TABLE_PHYSICAL_RULE_ITEM
TABLE_PHYSICAL_RULE_ITEM
CRT_55S
=55_OHM_SE
=55_OHM_SE
=55_OHM_SE
=STANDARD
=STANDARD
DMI_N2S_P<3..0>
DMI_N2S_N<3..0>
DMI_S2N_P<3..0>
DMI_S2N_N<3..0>
15B3 23D2
15B3 23D2
15B3 23D2
15B3 15C3 23D2
14C5 67B3
14C5 67B3
14C5 67B2
14C5 67B2
TABLE_SPACING_RULE_HEAD
SPACING_RULE_SET
LAYER
LINE-TO-LINE SPACING
WEIGHT
TABLE_SPACING_RULE_ITEM
LVDS
20 MIL
CRT
25 MIL
CRT_2CRT
20 MIL
CRT_SYNC
25 MIL
CRT_SYNC2SYNC
20 MIL
TVDAC
25 MIL
TVDAC_2TVDAC
20 MIL
TABLE_SPACING_RULE_ITEM
TABLE_SPACING_RULE_ITEM
14D5 67A8
TABLE_SPACING_RULE_ITEM
TABLE_SPACING_RULE_ITEM
CRT_RED
CRT_50S
CRT
CRT_GREEN
CRT_50S
CRT
CRT_BLUE
CRT_50S
CRT
CRT_SYNC
CRT_55S
CRT_SYNC
CRT_SYNC
CRT_55S
CRT_SYNC
TV_A_DAC
CRT_50S
TVDAC
TV_B_DAC
CRT_50S
TVDAC
TV_C_DAC
CRT_50S
TVDAC
TABLE_SPACING_RULE_ITEM
TABLE_SPACING_ASSIGNMENT_HEAD
NET_SPACING_TYPE1
NET_SPACING_TYPE2
AREA_TYPE
SPACING_RULE_SET
TABLE_SPACING_ASSIGNMENT_ITEM
CRT
CRT
CRT_2CRT
TABLE_SPACING_ASSIGNMENT_ITEM
CRT_SYNC
CRT_SYNC
CRT_SYNC2SYNC
TVDAC
TVDAC
TVDAC_2TVDAC
69D7 69D8
69A8 69D5
69A8 69D5
69B8 69D5
69C3 69D5
69C3 69D5
69B8 69D7
69A8 69D7
69A8 69D7
TABLE_SPACING_ASSIGNMENT_ITEM
NB Constraints
SYNC_MASTER=WFERRY
SYNC_DATE=06/12/2006
D
APPLE INC.
DRAWING NUMBER
051-7455
SCALE
SHT
NONE
71
OF
REV.
76
01
TABLE_PHYSICAL_RULE_HEAD
PHYSICAL_RULE_SET
LAYER
ALLOW ROUTE
ON LAYER?
MEM_45S
=45_OHM_SE
=45_OHM_SE
=45_OHM_SE
=STANDARD
=STANDARD
ELECTRICAL_CONSTRAINT_SET
PHYSICAL
SPACING
TABLE_PHYSICAL_RULE_ITEM
MEM_A_CLK
MEM_70D
MEM_CLK
MEM_70D
MEM_CLK
MEM_A_CNTL
MEM_45S
MEM_CTRL
MEM_A_CNTL
MEM_45S
MEM_CTRL
MEM_A_CNTL
MEM_45S
MEM_CTRL
MEM_A_CMD
MEM_55S
MEM_CMD
TABLE_PHYSICAL_RULE_ITEM
MEM_55S
=55_OHM_SE
=55_OHM_SE
=55_OHM_SE
=STANDARD
=STANDARD
TABLE_PHYSICAL_RULE_ITEM
MEM_70D
=70_OHM_DIFF
=70_OHM_DIFF
=70_OHM_DIFF
=70_OHM_DIFF
=70_OHM_DIFF
MEM_85D
=85_OHM_DIFF
=85_OHM_DIFF
=85_OHM_DIFF
=85_OHM_DIFF
=85_OHM_DIFF
SPACING_RULE_SET
LAYER
TABLE_PHYSICAL_RULE_ITEM
TABLE_SPACING_RULE_HEAD
LINE-TO-LINE SPACING
WEIGHT
=4:1_SPACING
TABLE_SPACING_ASSIGNMENT_HEAD
NET_SPACING_TYPE1
NET_SPACING_TYPE2
AREA_TYPE
SPACING_RULE_SET
MEM_CLK
MEM_CLK
MEM_CLK2MEM
TABLE_SPACING_RULE_ITEM
MEM_CLK2MEM
TABLE_SPACING_RULE_ITEM
MEM_CTRL2CTRL
=2:1_SPACING
TABLE_SPACING_ASSIGNMENT_ITEM
MEM_CLK
MEM_CTRL
MEM_CLK2MEM
TABLE_SPACING_RULE_ITEM
MEM_CTRL2MEM
=3:1_SPACING
=1.5:1_SPACING
MEM_CLK
MEM_CMD
MEM_CLK2MEM
=3:1_SPACING
MEM_CMD
MEM_55S
MEM_CMD
MEM_A_CMD
MEM_55S
MEM_CMD
MEM_A_CMD
MEM_55S
MEM_CMD
MEM_CLK
MEM_DATA
MEM_CLK2MEM
MEM_A_DQ_BYTE0
MEM_55S
MEM_DATA
MEM_A_DQ_BYTE1
MEM_55S
MEM_DATA
MEM_A_DQ_BYTE2
MEM_55S
MEM_DATA
MEM_A_DQ_BYTE3
MEM_55S
MEM_DATA
MEM_A_DQ_BYTE4
MEM_55S
MEM_DATA
MEM_A_DQ_BYTE5
MEM_55S
MEM_DATA
MEM_A_DQ_BYTE6
MEM_55S
MEM_DATA
MEM_A_DQ_BYTE7
MEM_55S
MEM_DATA
MEM_A_DM0
MEM_55S
MEM_DATA
MEM_A_DM1
MEM_55S
MEM_DATA
MEM_A_DM2
MEM_55S
MEM_DATA
MEM_A_DM3
MEM_55S
MEM_DATA
MEM_A_DM4
MEM_55S
MEM_DATA
MEM_A_DM5
MEM_55S
MEM_DATA
MEM_A_DM6
MEM_55S
MEM_DATA
MEM_A_DM7
MEM_55S
MEM_DATA
MEM_A_DQS0
MEM_85D
MEM_DQS
MEM_85D
MEM_DQS
MEM_85D
MEM_DQS
MEM_85D
MEM_DQS
MEM_85D
MEM_DQS
MEM_85D
MEM_DQS
MEM_85D
MEM_DQS
MEM_85D
MEM_DQS
MEM_85D
MEM_DQS
MEM_85D
MEM_DQS
MEM_85D
MEM_DQS
MEM_85D
MEM_DQS
MEM_85D
MEM_DQS
MEM_85D
MEM_DQS
MEM_85D
MEM_DQS
MEM_85D
MEM_DQS
MEM_70D
MEM_CLK
MEM_70D
MEM_CLK
MEM_B_CNTL
MEM_45S
MEM_CTRL
MEM_B_CNTL
MEM_45S
MEM_CTRL
MEM_B_CNTL
MEM_45S
MEM_CTRL
MEM_B_CMD
MEM_55S
MEM_CMD
MEM_B_CMD
MEM_55S
MEM_CMD
MEM_B_CMD
MEM_55S
MEM_CMD
MEM_B_CMD
MEM_55S
MEM_CMD
MEM_B_CMD
MEM_55S
MEM_CMD
MEM_B_DQ_BYTE0
MEM_55S
MEM_DATA
MEM_B_DQ_BYTE1
MEM_55S
MEM_DATA
MEM_B_DQ_BYTE2
MEM_55S
MEM_DATA
MEM_B_DQ_BYTE3
MEM_55S
MEM_DATA
MEM_B_DQ_BYTE4
MEM_55S
MEM_DATA
MEM_B_DQ_BYTE5
MEM_55S
MEM_DATA
MEM_B_DQ_BYTE6
MEM_55S
MEM_DATA
MEM_B_DQ_BYTE7
MEM_55S
MEM_DATA
MEM_B_DM0
MEM_55S
MEM_DATA
MEM_B_DM1
MEM_55S
MEM_DATA
MEM_B_DM2
MEM_55S
MEM_DATA
MEM_B_DM3
MEM_55S
MEM_DATA
MEM_B_DM4
MEM_55S
MEM_DATA
MEM_B_DM5
MEM_55S
MEM_DATA
MEM_B_DM6
MEM_55S
MEM_DATA
MEM_B_DM7
MEM_55S
MEM_DATA
MEM_B_DQS0
MEM_85D
MEM_DQS
MEM_85D
MEM_DQS
MEM_85D
MEM_DQS
MEM_85D
MEM_DQS
MEM_85D
MEM_DQS
MEM_85D
MEM_DQS
MEM_85D
MEM_DQS
MEM_85D
MEM_DQS
MEM_85D
MEM_DQS
MEM_85D
MEM_DQS
MEM_85D
MEM_DQS
MEM_85D
MEM_DQS
MEM_85D
MEM_DQS
MEM_85D
MEM_DQS
MEM_85D
MEM_DQS
MEM_85D
MEM_DQS
TABLE_SPACING_ASSIGNMENT_ITEM
?
TABLE_SPACING_RULE_ITEM
MEM_CMD2MEM
MEM_55S
MEM_A_CMD
TABLE_SPACING_ASSIGNMENT_ITEM
MEM_CLK
MEM_DQS
MEM_CLK2MEM
TABLE_SPACING_RULE_ITEM
MEM_DATA2DATA
=1.5:1_SPACING
?
TABLE_SPACING_ASSIGNMENT_HEAD
NET_SPACING_TYPE1
TABLE_SPACING_RULE_ITEM
MEM_DATA2MEM
=3:1_SPACING
NET_SPACING_TYPE2
AREA_TYPE
SPACING_RULE_SET
TABLE_SPACING_ASSIGNMENT_ITEM
MEM_CMD
TABLE_SPACING_RULE_ITEM
MEM_DQS2MEM
=3:1_SPACING
MEM_CKE<1..0>
MEM_CS_L<1..0>
MEM_ODT<1..0>
MEM_A_A<14..0>
MEM_A_BS<2..0>
MEM_A_RAS_L
MEM_A_CAS_L
MEM_A_WE_L
TABLE_SPACING_ASSIGNMENT_ITEM
?
TABLE_SPACING_RULE_ITEM
MEM_CMD2CMD
MEM_A_CMD
TABLE_SPACING_ASSIGNMENT_ITEM
MEM_CLK_P<2..0>
MEM_CLK_N<2..0>
MEM_CLK
MEM_CMD2MEM
MEM_A_DQ<7..0>
MEM_A_DQ<15..8>
MEM_A_DQ<23..16>
MEM_A_DQ<31..24>
MEM_A_DQ<39..32>
MEM_A_DQ<47..40>
MEM_A_DQ<55..48>
MEM_A_DQ<63..56>
TABLE_SPACING_ASSIGNMENT_ITEM
MEM_CMD
TABLE_SPACING_RULE_ITEM
MEM_2OTHER
25 MIL
MEM_CTRL
MEM_CMD2MEM
TABLE_SPACING_ASSIGNMENT_ITEM
MEM_CMD
MEM_CMD
MEM_CMD2CMD
TABLE_SPACING_ASSIGNMENT_ITEM
MEM_CMD
MEM_DATA
MEM_CMD2MEM
TABLE_SPACING_ASSIGNMENT_ITEM
MEM_CMD
MEM_DQS
MEM_CMD2MEM
TABLE_SPACING_ASSIGNMENT_HEAD
NET_SPACING_TYPE1
NET_SPACING_TYPE2
AREA_TYPE
SPACING_RULE_SET
MEM_CTRL
MEM_CLK
MEM_CTRL2MEM
MEM_A_DM<0>
MEM_A_DM<1>
MEM_A_DM<2>
MEM_A_DM<3>
MEM_A_DM<4>
MEM_A_DM<5>
MEM_A_DM<6>
MEM_A_DM<7>
16D5 30D4
16D5 30D4
16C5 30C6
16C5 30C4
16C5 30B4
16C5 30B6
16C5 30A6
16C5 30A4
TABLE_SPACING_ASSIGNMENT_ITEM
TABLE_SPACING_ASSIGNMENT_ITEM
MEM_CTRL
MEM_CTRL
MEM_CTRL2CTRL
MEM_A_DQS1
TABLE_SPACING_ASSIGNMENT_ITEM
MEM_CTRL
MEM_CMD
MEM_CTRL2MEM
MEM_CTRL
MEM_DATA
MEM_CTRL2MEM
TABLE_SPACING_ASSIGNMENT_ITEM
MEM_A_DQS2
TABLE_SPACING_ASSIGNMENT_ITEM
MEM_CTRL
MEM_DQS
MEM_CTRL2MEM
MEM_A_DQS3
TABLE_SPACING_ASSIGNMENT_HEAD
NET_SPACING_TYPE1
NET_SPACING_TYPE2
AREA_TYPE
SPACING_RULE_SET
MEM_DATA
MEM_CLK
MEM_DATA2MEM
MEM_DATA
MEM_CTRL
MEM_DATA2MEM
MEM_A_DQS4
TABLE_SPACING_ASSIGNMENT_ITEM
MEM_A_DQS5
TABLE_SPACING_ASSIGNMENT_ITEM
MEM_A_DQS6
TABLE_SPACING_ASSIGNMENT_ITEM
MEM_DATA
MEM_CMD
MEM_DATA2MEM
MEM_DATA
MEM_DATA
MEM_DATA2DATA
TABLE_SPACING_ASSIGNMENT_ITEM
MEM_A_DQS7
TABLE_SPACING_ASSIGNMENT_ITEM
MEM_DATA
MEM_DQS
MEM_DATA2MEM
MEM_B_CLK
TABLE_SPACING_ASSIGNMENT_HEAD
NET_SPACING_TYPE1
NET_SPACING_TYPE2
AREA_TYPE
SPACING_RULE_SET
TABLE_SPACING_ASSIGNMENT_HEAD
NET_SPACING_TYPE1
NET_SPACING_TYPE2
AREA_TYPE
SPACING_RULE_SET
TABLE_SPACING_ASSIGNMENT_ITEM
MEM_CLK
MEM_2OTHER
MEM_CTRL
MEM_2OTHER
TABLE_SPACING_ASSIGNMENT_ITEM
MEM_DQS
MEM_CLK
MEM_DQS2MEM
MEM_DQS
MEM_CTRL
MEM_DQS2MEM
TABLE_SPACING_ASSIGNMENT_ITEM
TABLE_SPACING_ASSIGNMENT_ITEM
TABLE_SPACING_ASSIGNMENT_ITEM
MEM_CMD
MEM_2OTHER
MEM_DATA
MEM_2OTHER
MEM_DQS
MEM_2OTHER
TABLE_SPACING_ASSIGNMENT_ITEM
MEM_DQS
MEM_CMD
MEM_DQS2MEM
MEM_DQS
MEM_DATA
MEM_DQS2MEM
MEM_DQS
MEM_DQS
MEM_DQS2MEM
TABLE_SPACING_ASSIGNMENT_ITEM
TABLE_SPACING_ASSIGNMENT_ITEM
TABLE_SPACING_ASSIGNMENT_ITEM
TABLE_SPACING_ASSIGNMENT_ITEM
MEM_B_DQS1
MEM_B_DQS2
MEM_B_DQS3
MEM_B_DQS4
MEM_B_DQS5
MEM_B_DQS6
MEM_B_DQS7
MEM_A_DQS_P<0>
MEM_A_DQS_N<0>
MEM_A_DQS_P<1>
MEM_A_DQS_N<1>
MEM_A_DQS_P<2>
MEM_A_DQS_N<2>
MEM_A_DQS_P<3>
MEM_A_DQS_N<3>
MEM_A_DQS_P<4>
MEM_A_DQS_N<4>
MEM_A_DQS_P<5>
MEM_A_DQS_N<5>
MEM_A_DQS_P<6>
MEM_A_DQS_N<6>
MEM_A_DQS_P<7>
MEM_A_DQS_N<7>
MEM_CLK_P<5..3>
MEM_CLK_N<5..3>
MEM_CKE<4..3>
MEM_CS_L<3..2>
MEM_ODT<3..2>
MEM_B_A<14..0>
MEM_B_BS<2..0>
MEM_B_RAS_L
MEM_B_CAS_L
MEM_B_WE_L
MEM_B_DQ<7..0>
MEM_B_DQ<15..8>
MEM_B_DQ<23..16>
MEM_B_DQ<31..24>
MEM_B_DQ<39..32>
MEM_B_DQ<47..40>
MEM_B_DQ<55..48>
MEM_B_DQ<63..56>
MEM_B_DM<0>
MEM_B_DM<1>
MEM_B_DM<2>
MEM_B_DM<3>
MEM_B_DM<4>
MEM_B_DM<5>
MEM_B_DM<6>
MEM_B_DM<7>
MEM_B_DQS_P<0>
MEM_B_DQS_N<0>
MEM_B_DQS_P<1>
MEM_B_DQS_N<1>
MEM_B_DQS_P<2>
MEM_B_DQS_N<2>
MEM_B_DQS_P<3>
MEM_B_DQS_N<3>
MEM_B_DQS_P<4>
MEM_B_DQS_N<4>
MEM_B_DQS_P<5>
MEM_B_DQS_N<5>
MEM_B_DQS_P<6>
MEM_B_DQS_N<6>
MEM_B_DQS_P<7>
MEM_B_DQS_N<7>
16C5 30D6
16C5 30D6
16C5 30D6
16C5 30D6
16C5 30C4
16C5 30C4
16C5 30C6
16C5 30C6
16C5 30B6
16C5 30B6
16C5 30B4
16C5 30B4
16C5 30A4
16C5 30A4
16C5 30A6
16C5 30A6
16D1 31D4
16D1 31D4
16C1 31C4
16C1 31C6
16C1 31B4
16C1 31A6
16C1 31A4
16C1 31A6
16C1 31D6
16C1 31D6
16C1 31D6
16C1 31D6
16C1 31C6
16C1 31C6
16C1 31C4
16C1 31C4
16C1 31B6
16C1 31B6
16C1 31A4
Memory Constraints
16C1 31B4
16C1 31A6
SYNC_MASTER=WFERRY
SYNC_DATE=06/08/2006
16C1 31A6
16C1 31A4
16C1 31A4
D
APPLE INC.
DRAWING NUMBER
051-7455
SCALE
SHT
NONE
72
OF
REV.
76
01
TABLE_PHYSICAL_RULE_HEAD
PHYSICAL_RULE_SET
LAYER
ALLOW ROUTE
ON LAYER?
IDE_55S
=55_OHM_SE
=55_OHM_SE
=55_OHM_SE
=STANDARD
=STANDARD
ELECTRICAL_CONSTRAINT_SET
PHYSICAL
SPACING
TABLE_PHYSICAL_RULE_ITEM
IDE_PDD
IDE_55S
IDE
IDE_PDA
IDE_55S
IDE
IDE_PDCS
IDE_55S
IDE
IDE_PDCS
IDE_55S
IDE
IDE_CNTL
IDE_55S
IDE
IDE_PDIOR_L
IDE_55S
IDE
IDE_CNTL
IDE_55S
IDE
IDE_CNTL
IDE_55S
IDE
IDE_PDIORDY
IDE_55S
IDE
IDE_IRQ14
IDE_55S
IDE
IDE_RST_L
IDE_55S
IDE
SATA_A_R2D
SATA_100D
SATA
SATA_100D
SATA
SATA_100D
SATA
SATA_100D
SATA
SATA_100D
SATA
SATA_100D
SATA
SATA_100D
SATA
SATA_100D
SATA
TABLE_PHYSICAL_RULE_ITEM
SATA_55S
=55_OHM_SE
=55_OHM_SE
=55_OHM_SE
=STANDARD
=STANDARD
TABLE_PHYSICAL_RULE_ITEM
SATA_100D
=100_OHM_DIFF
=100_OHM_DIFF
=100_OHM_DIFF
=100_OHM_DIFF
=100_OHM_DIFF
TABLE_SPACING_RULE_HEAD
SPACING_RULE_SET
LAYER
LINE-TO-LINE SPACING
WEIGHT
TABLE_SPACING_RULE_ITEM
IDE
=1.8:1_SPACING
SATA
20 MIL
TABLE_SPACING_RULE_ITEM
SOURCE: Santa Rosa Platform DG, Rev 1.0 (#21112), Sections 10.7 & 10.9
PHYSICAL_RULE_SET
LAYER
ALLOW ROUTE
ON LAYER?
HDA_55S
SPACING_RULE_SET
LAYER
=55_OHM_SE
=55_OHM_SE
=55_OHM_SE
=STANDARD
=STANDARD
SATA_A_D2R
TABLE_SPACING_RULE_HEAD
LINE-TO-LINE SPACING
WEIGHT
TABLE_SPACING_RULE_ITEM
HDA
=1.8:1_SPACING
IDE_PDD<15..0>
IDE_PDA<2..0>
IDE_PDCS1_L
IDE_PDCS3_L
IDE_PDIOW_L
IDE_PDIOR_L
IDE_PDDACK_L
IDE_PDDREQ
IDE_PDIORDY
IDE_IRQ14
ODD_RST_5VTOL_L
SATA_A_R2D_C_P
SATA_A_R2D_C_N
SATA_A_R2D_P
SATA_A_R2D_N
SATA_A_D2R_P
SATA_A_D2R_N
SATA_A_D2R_C_P
SATA_A_D2R_C_N
22A4 39C3
22A4 39B5
22B4 39B5
23B6 39A8
22B6 40D4
22B6 40D4
40D7
40D7
22B6 40C4
22B6 40D4
40C7
40D7
PHYSICAL_RULE_SET
LAYER
ALLOW ROUTE
ON LAYER?
USB_60S
=55_OHM_SE
=55_OHM_SE
=55_OHM_SE
=STANDARD
=STANDARD
USB_90D
=90_OHM_DIFF
=90_OHM_DIFF
=90_OHM_DIFF
=90_OHM_DIFF
=90_OHM_DIFF
SPACING_RULE_SET
LAYER
TABLE_PHYSICAL_RULE_ITEM
TABLE_SPACING_RULE_HEAD
LINE-TO-LINE SPACING
WEIGHT
TABLE_SPACING_RULE_ITEM
USB
20 MIL
USB_2CLK
25 MIL
TABLE_SPACING_RULE_ITEM
SOURCE: Santa Rosa Platform DG, Rev 1.0 (#21112), Section 10.13.2
HDA_BIT_CLK
HDA_SYNC
TABLE_PHYSICAL_RULE_HEAD
PHYSICAL_RULE_SET
LAYER
ALLOW ROUTE
ON LAYER?
HDA_55S
HDA
HDA_55S
HDA
HDA_55S
HDA
HDA_55S
HDA
HDA_55S
HDA
HDA_55S
HDA
HDA_55S
HDA
TABLE_PHYSICAL_RULE_ITEM
SMB_55S
=55_OHM_SE
=55_OHM_SE
=55_OHM_SE
=STANDARD
=STANDARD
HDA_RST_L
TABLE_PHYSICAL_RULE_ITEM
SPI_55S
=55_OHM_SE
=55_OHM_SE
=55_OHM_SE
=STANDARD
=STANDARD
HDA_SDIN0
TABLE_SPACING_RULE_HEAD
SPACING_RULE_SET
LAYER
LINE-TO-LINE SPACING
WEIGHT
=3:1_SPACING
HDA_SDOUT
TABLE_SPACING_RULE_ITEM
SMB
USB_EXTA
TABLE_SPACING_RULE_ITEM
SPI
=1.8:1_SPACING
USB_IR
USB_EXTB
USB_EXCARD
USB_EXTC
HDA_55S
HDA
HDA_55S
HDA
USB_90D
USB
USB_90D
USB
USB_90D
USB
USB_90D
USB
USB_90D
USB
USB_90D
USB
USB_90D
USB
USB_90D
USB
USB_90D
USB
USB_90D
USB
USB_90D
USB
USB_90D
USB
USB_90D
USB
USB_90D
USB
USB_90D
USB
USB_90D
USB
USB_90D
USB
USB_90D
USB
USB_90D
USB
USB_90D
USB
USB_90D
USB
USB_90D
USB
USB_RBIAS
USB_60S
SMB_SB_SCL
SMB_55S
SMB
SMB_SB_SDA
SMB_55S
SMB
SMB_SB_ME_SCL
SMB_55S
SMB
SMB_SB_ME_SDA
SMB_55S
SMB
SPI_SCLK
SPI_55S
SPI
SPI_55S
SPI
SPI_55S
SPI
SPI_55S
SPI
SPI_55S
SPI
SPI_55S
SPI
SPI_55S
SPI
SPI_55S
SPI
SPI_55S
SPI
SPI_SI
SPI_SO
SPI_CE_L0
SPI_CE_L1
HDA_BIT_CLK
HDA_BIT_CLK_R
HDA_SYNC
HDA_SYNC_R
HDA_RST_L
HDA_RST_L_R
HDA_SDIN0
HDA_SDOUT
HDA_SDOUT_R
USB_EXTA_P
USB_EXTA_N
USB_EXTA_MUXED_P
USB_EXTA_MUXED_N
USB_MINI_P
USB_MINI_N
USB_3G_P
USB_3G_N
USB_CAMERA_P
USB_CAMERA_N
USB_BT_P
USB_BT_N
USB_TPAD_P
USB_TPAD_N
USB_IR_P
USB_IR_N
USB_EXTB_P
USB_EXTB_N
USB_EXCARD_P
USB_EXCARD_N
USB_EXTC_P
USB_EXTC_N
USB_RBIAS
SMB_CLK
SMB_DATA
SMB_ME_CLK
SMB_ME_DATA
SPI_SCLK_R
SPI_A_SCLK_R
SPI_SI_R
SPI_A_SI_R
SPI_SO
SPI_A_SO_R
SPI_CE_R_L<0>
SPI_CE_L<0>
SPI_CE_R_L<1>
8A6 22C8
22C6
8A6 22C8
22C6
8A6 22C8
22C6
8A6 22C8
8A6 22B8
22B6
8C1 23C2
8C1 23C2
8C1 23C2
8C1 23C2
8C1 23C2
8C1 23C2
8C1 8C2 23C2
8B1 8B2 23C2
8C1 23C2
8C1 23C2
8C1 8C2 23C2
8C1 8C2 23C2
8B1 23C2
8B1 23C2
8B1 23C2
8B1 23C2
8B1 23C2
8B1 23C2
23B3
24D5 47D8
24D5 47D8
24D5 47A8
24D5 47A8
23C5 52C7
52C5
23C5 52C3
52C4
23C5 52C3
52C4
23C5 52C7
52C6
SB Constraints (1 of 2)
SYNC_MASTER=WFERRY
SYNC_DATE=06/12/2006
D
APPLE INC.
DRAWING NUMBER
051-7455
SCALE
SHT
NONE
73
OF
REV.
76
01
TABLE_PHYSICAL_RULE_HEAD
PHYSICAL_RULE_SET
LAYER
ALLOW ROUTE
ON LAYER?
PCI_55S
=55_OHM_SE
=55_OHM_SE
=55_OHM_SE
=STANDARD
=STANDARD
ELECTRICAL_CONSTRAINT_SET
PHYSICAL
SPACING
TABLE_PHYSICAL_RULE_ITEM
PCI_AD
PCI_55S
PCI
PCI_AD19
PCI_55S
PCI
PCI_AD20
PCI_55S
PCI
PCI_AD
PCI_55S
PCI
PCI_AD
PCI_55S
PCI
PCI_C_BE_L
PCI_55S
PCI
PCI_CNTL
PCI_55S
PCI
PCI_CNTL
PCI_55S
PCI
PCI_CNTL
PCI_55S
PCI
PCI_LOCK_L
PCI_55S
PCI
PCI_CNTL
PCI_55S
PCI
PCI_CNTL
PCI_55S
PCI
PCI_CNTL
PCI_55S
PCI
PCI_CNTL
PCI_55S
PCI
PCI_FW_REQ_L
PCI_55S
PCI
PCI_FW_GNT_L
PCI_55S
PCI
PCI_REQ1_L
PCI_55S
PCI
PCI_GNT1_L
PCI_55S
PCI
PCI_REQ2_L
PCI_55S
PCI
PCI_GNT2_L
PCI_55S
PCI
INT_PIRQA_L
PCI_55S
PCI
INT_PIRQB_L
PCI_55S
PCI
INT_PIRQC_L
PCI_55S
PCI
INT_PIRQD_L
PCI_55S
PCI
SOURCE: Santa Rosa Platform DG, Rev 1.0 (#21112), Sections 10.27.1.5-7, 10.29 & 10.30
INT_PIRQE_L
PCI_55S
PCI
INT_PIRQF_L
PCI_55S
PCI
TABLE_SPACING_RULE_HEAD
SPACING_RULE_SET
LAYER
LINE-TO-LINE SPACING
WEIGHT
TABLE_SPACING_RULE_ITEM
PCI
=2:1_SPACING
SOURCE: Santa Rosa Platform DG, Rev 1.0 (#21112), Sections 10.18.1 & 10.19
PHYSICAL_RULE_SET
LAYER
ALLOW ROUTE
ON LAYER?
LAN_55S
=55_OHM_SE
=55_OHM_SE
=55_OHM_SE
=STANDARD
=STANDARD
ENET_100D
=100_OHM_DIFF
=100_OHM_DIFF
=100_OHM_DIFF
=100_OHM_DIFF
=100_OHM_DIFF
TABLE_PHYSICAL_RULE_ITEM
TABLE_PHYSICAL_RULE_ITEM
GLAN_100D
=100_OHM_DIFF
=100_OHM_DIFF
=100_OHM_DIFF
=100_OHM_DIFF
=100_OHM_DIFF
TABLE_SPACING_RULE_HEAD
SPACING_RULE_SET
LAYER
LINE-TO-LINE SPACING
WEIGHT
TABLE_SPACING_RULE_ITEM
ENET_CLK
=2.5:1_SPACING
ENET_GLAN
20 MILS
TABLE_SPACING_RULE_ITEM
TABLE_SPACING_RULE_ITEM
ENET_LAN
=1.5:1_SPACING
ENET_MDI
25 MILS
TABLE_SPACING_RULE_ITEM
PCI_AD<18..0>
PCI_AD<19>
PCI_AD<20>
PCI_AD<31..21>
PCI_PAR
PCI_C_BE_L<3..0>
PCI_IRDY_L
PCI_DEVSEL_L
PCI_PERR_L
PCI_LOCK_L
PCI_SERR_L
PCI_STOP_L
PCI_TRDY_L
PCI_FRAME_L
PCI_FW_REQ_L
PCI_FW_GNT_L
PCI_REQ1_L
PCI_GNT1_L
PCI_REQ2_L
PCI_GNT2_L
INT_PIRQA_L
INT_PIRQB_L
INT_PIRQC_L
INT_PIRQD_L
INT_PIRQE_L
INT_PIRQF_L
23A4 23B6
23A4 23A8
23A4 23A8
23A4 23A8
23A4 23A8 37A5
23A4 23A6
23A4 23A6
TABLE_PHYSICAL_RULE_HEAD
PHYSICAL_RULE_SET
LAYER
ALLOW ROUTE
ON LAYER?
CLINK_55S
=55_OHM_SE
=55_OHM_SE
=55_OHM_SE
=STANDARD
=STANDARD
CLINK_12MIL
12 MILS
5 MILS
300 MILS
=STANDARD
=STANDARD
SPACING_RULE_SET
LAYER
TABLE_PHYSICAL_RULE_ITEM
TABLE_PHYSICAL_RULE_ITEM
TABLE_SPACING_RULE_HEAD
LINE-TO-LINE SPACING
WEIGHT
TABLE_SPACING_RULE_ITEM
CLINK
=1.8:1_SPACING
CLINK_VREF
12 MILS
TABLE_SPACING_RULE_ITEM
SOURCE: Santa Rosa Platform DG, Rev 1.0 (#21112), Sections 10.27.1.5-7, 10.29 & 10.30
PCIE_E_R2D
PCIE_E_D2R
PCIE_100D
PCIE
PCIE_100D
PCIE
PCIE_100D
PCIE
PCIE_100D
PCIE
GLAN_COMP
GLAN_COMP
PCIE_E_R2D_C_P
PCIE_E_R2D_C_N
PCIE_E_D2R_P
PCIE_E_D2R_N
ENET_LAN
LAN_55S
ENET_LAN
LAN_55S
ENET_LAN
ENET_LAN
LAN_55S
ENET_LAN
ENET_GLAN_CLK
LAN_55S
ENET_CLK
LAN_55S
ENET_CLK
ENET_100D
ENET_MDI
ENET_MDI0
ENET_LAN
ENET_100D
ENET_MDI
ENET_MDI1
ENET_100D
ENET_MDI
ENET_100D
ENET_MDI
ENET_MDI2
ENET_100D
ENET_MDI
ENET_100D
ENET_MDI
ENET_100D
ENET_MDI
ENET_100D
ENET_MDI
CLINK_NB
CLINK_55S
CLINK
CLINK_NB
CLINK_55S
CLINK
CLINK_NB_RESET_L
CLINK_55S
CLINK
CLINK_WLAN
CLINK_55S
CLINK
CLINK_WLAN
CLINK_55S
CLINK
CLINK_WLAN_RESET_L
CLINK_55S
CLINK
NB_CLINK_VREF
CLINK_12MIL
CLINK_VREF
SB_CLINK_VREF0
CLINK_12MIL
CLINK_VREF
SB_CLINK_VREF1
CLINK_12MIL
CLINK_VREF
ENET_MDI3
LAN_RSTSYNC
LAN_R2D<2..0>
LAN_D2R<2..0>
ENET_GLAN_CLK_R
ENET_GLAN_CLK
ENET_MDI_P<0>
ENET_MDI_N<0>
ENET_MDI_P<1>
ENET_MDI_N<1>
ENET_MDI_P<2>
ENET_MDI_N<2>
ENET_MDI_P<3>
ENET_MDI_N<3>
CLINK_NB_CLK
CLINK_NB_DATA
CLINK_NB_RESET_L
CLINK_WLAN_CLK
CLINK_WLAN_DATA
CLINK_WLAN_RESET_L
NB_CLINK_VREF
SB_CLINK_VREF0
SB_CLINK_VREF1
33B5 33B6
33B5 33B6
33B5
33B5 33C5
22C6
B
34B8 36B7
34B8 36B7
34B8 36C7
34B8 36C7
34B8 36B7
34B8 36C7
34B8 36C7
34B8 36C7
15A3 24C3
15A3 24C3
15A3 24C3
24C3
24C3
24D5
15A4
24C3
24C3
SB Constraints (2 of 2)
SYNC_MASTER=WFERRY
SYNC_DATE=06/12/2006
D
APPLE INC.
DRAWING NUMBER
051-7455
SCALE
SHT
NONE
74
OF
REV.
76
01
TABLE_PHYSICAL_RULE_HEAD
PHYSICAL_RULE_SET
LAYER
ALLOW ROUTE
ON LAYER?
CLK_FSB_100D
=100_OHM_DIFF
=100_OHM_DIFF
=100_OHM_DIFF
=100_OHM_DIFF
=100_OHM_DIFF
ELECTRICAL_CONSTRAINT_SET
PHYSICAL
SPACING
TABLE_PHYSICAL_RULE_ITEM
CK505_CPU
CLK_FSB_100D
CLK_FSB
CK505_CPU
CLK_FSB_100D
CLK_FSB
CK505_NB
CLK_FSB_100D
CLK_FSB
CK505_NB
CLK_FSB_100D
CLK_FSB
CK505_ITP
CLK_FSB_100D
CLK_FSB
CK505_ITP
CLK_FSB_100D
CLK_FSB
CK505_PCIF0
CLK_MED_55S
CLK_MED
CK505_PCIF1
CLK_MED_55S
CLK_MED
CK505_PCI1
CLK_MED_55S
CLK_MED
CK505_PCI2
CLK_MED_55S
CLK_MED
CK505_PCI3
CLK_MED_55S
CLK_MED
CK505_PCI4
CLK_MED_55S
CLK_MED
CK505_PCI5
CLK_MED_55S
CLK_MED
(CPU_BSEL0)
(CPU_BSEL2)
CLK_MED_55S
CLK_MED
CLK_MED_55S
CLK_MED
CK505_DOT96
CLK_PCIE_100D
CLK_PCIE
CLK_PCIE_100D
CLK_PCIE
CLK_PCIE_100D
CLK_PCIE
CLK_PCIE_100D
CLK_PCIE
CLK_PCIE_100D
CLK_PCIE
CLK_PCIE_100D
CLK_PCIE
CLK_PCIE_100D
CLK_PCIE
CLK_PCIE_100D
CLK_PCIE
CLK_PCIE_100D
CLK_PCIE
CLK_PCIE_100D
CLK_PCIE
CLK_PCIE_100D
CLK_PCIE
CLK_PCIE_100D
CLK_PCIE
CLK_PCIE_100D
CLK_PCIE
CLK_PCIE_100D
CLK_PCIE
CLK_PCIE_100D
CLK_PCIE
CLK_PCIE_100D
CLK_PCIE
CLK_PCIE_100D
CLK_PCIE
CLK_PCIE_100D
CLK_PCIE
CLK_PCIE_100D
CLK_PCIE
CLK_PCIE_100D
CLK_PCIE
(CK505_CPU)
(CK505_CPU)
(CK505_NB)
(CK505_NB)
(CK505_ITP)
(CK505_ITP)
CLK_FSB_100D
CLK_FSB
CLK_FSB_100D
CLK_FSB
CLK_FSB_100D
CLK_FSB
CLK_FSB_100D
CLK_FSB
CLK_FSB_100D
CLK_FSB
CLK_FSB_100D
CLK_FSB
(CK505_PCIF0)
(CK505_PCIF1)
(CK505_PCI1)
(CK505_PCI2)
(CK505_PCI3)
CLK_MED_55S
CLK_MED
CLK_MED_55S
CLK_MED
CLK_MED_55S
CLK_MED
CLK_MED_55S
CLK_MED
CLK_MED_55S
CLK_MED
(CPU_BSEL0)
(CPU_BSEL2)
CLK_MED_55S
CLK_MED
CLK_MED_55S
CLK_MED
(CPU_BSEL0)
(CPU_BSEL2)
CLK_MED_55S
CLK_MED
CLK_MED_55S
CLK_MED
(CK505_DOT96)
(CK505_DOT96)
(CK505_LVDS)
(CK505_LVDS)
(CK505_SRC1)
(CK505_SRC1)
(CK505_SRC2)
(CK505_SRC2)
(CK505_SRC3)
(CK505_SRC3)
(CK505_SRC4)
(CK505_SRC4)
(CK505_SRC5)
(CK505_SRC5)
(CK505_SRC6)
(CK505_SRC6)
CLK_PCIE_100D
CLK_PCIE
CLK_PCIE_100D
CLK_PCIE
CLK_PCIE_100D
CLK_PCIE
CLK_PCIE_100D
CLK_PCIE
CLK_PCIE_100D
CLK_PCIE
CLK_PCIE_100D
CLK_PCIE
CLK_PCIE_100D
CLK_PCIE
CLK_PCIE_100D
CLK_PCIE
CLK_PCIE_100D
CLK_PCIE
CLK_PCIE_100D
CLK_PCIE
CLK_PCIE_100D
CLK_PCIE
CLK_PCIE_100D
CLK_PCIE
CLK_PCIE_100D
CLK_PCIE
CLK_PCIE_100D
CLK_PCIE
CLK_PCIE_100D
CLK_PCIE
CLK_PCIE_100D
CLK_PCIE
TABLE_PHYSICAL_RULE_ITEM
CLK_PCIE_100D
=100_OHM_DIFF
=100_OHM_DIFF
=100_OHM_DIFF
=100_OHM_DIFF
=100_OHM_DIFF
TABLE_PHYSICAL_RULE_ITEM
CLK_MED_55S
=55_OHM_SE
=55_OHM_SE
=55_OHM_SE
=STANDARD
=STANDARD
CLK_SLOW_55S
=55_OHM_SE
=55_OHM_SE
=55_OHM_SE
=STANDARD
=STANDARD
TABLE_PHYSICAL_RULE_ITEM
CK505_CPU0_P
CK505_CPU0_N
CK505_CPU1_P
CK505_CPU1_N
CK505_CPU2_ITP_SRC10_P
CK505_CPU2_ITP_SRC10_N
TABLE_SPACING_RULE_HEAD
SPACING_RULE_SET
LAYER
LINE-TO-LINE SPACING
WEIGHT
25 MIL
TABLE_SPACING_RULE_ITEM
CLK_FSB
TABLE_SPACING_RULE_ITEM
CLK_PCIE
20 MIL
CLK_MED
20 MIL
TABLE_SPACING_RULE_ITEM
TABLE_SPACING_RULE_ITEM
CLK_SLOW
10 MIL
SOURCE: Santa Rosa Platform DG, Rev 1.0 (#21112), Sections 14.1 - 14.6
CK505_LVDS
CK505_SRC1
CK505_SRC2
CK505_SRC3
CK505_SRC4
CK505_SRC5
CK505_SRC6
CK505_SRC7
CK505_SRC8
CK505_PCIF0_CLK
CK505_PCIF1_CLK
CK505_PCI1_CLK
CK505_PCI2_CLK
CK505_PCI3_CLK
CK505_PCI4_CLK
CK505_PCI5_FCTSEL1
CK505_USB48_FSA
CK505_CLK14P3M_TIMER
CK505_DOT96_27M_P
CK505_DOT96_27M_N
CK505_LVDS_P
CK505_LVDS_N
CK505_SRC1_P
CK505_SRC1_N
CK505_SRC2_P
CK505_SRC2_N
CK505_SRC3_P
CK505_SRC3_N
CK505_SRC4_P
CK505_SRC4_N
CK505_SRC5_P
CK505_SRC5_N
CK505_SRC6_P
CK505_SRC6_N
CK505_SRC7_P
CK505_SRC7_N
CK505_SRC8_P
CK505_SRC8_N
FSB_CLK_CPU_P
FSB_CLK_CPU_N
FSB_CLK_NB_P
FSB_CLK_NB_N
XDP_CLK_P
XDP_CLK_N
28B8 29B6
9B6 29D3
9B6 29D3
13B3 29D3
13B3 29D3
70A3
70A3
PCI_CLK33M_LPCPLUS
6C2 29B3 46C4
PCI_CLK33M_SB
23A6 29A5 29B3
PCI_CLK33M_FW
29A5 29B3 37A5
PCI_CLK33M_TPM
PCI_CLK33M_SMC
29A3 29A5 44C8
CK505 PCI4 is project-specific
CK505 PCI5 is project-specific
SB_CLK48M_USBCTLR
SB_CLK14P3M_TIMER
CK505_FSA
CK505_FSC
NB_CLK96M_DOT_P
NB_CLK96M_DOT_N
NB_CLK100M_DPLLSS_P
NB_CLK100M_DPLLSS_N
PEG_CLK100M_P
PEG_CLK100M_N
SB_CLK100M_DMI_P
SB_CLK100M_DMI_N
PCIE_CLK100M_EXCARD_P
PCIE_CLK100M_EXCARD_N
SB_CLK100M_SATA_P
SB_CLK100M_SATA_N
NB_CLK100M_PCIE_P
NB_CLK100M_PCIE_N
PCIE_CLK100M_MINI_P
PCIE_CLK100M_MINI_N
29C8 29D6
29A8 29D6
8B1 29B3
8B1 29B3
8B1 29C3
8A1 29C3
23C2 29C3
23D2 29C3
22B6 29C3
22B6 29C3
15C3 29C3
15C3 29C3
29C3 33C5
29B3 33C5
Clock Constraints
SYNC_MASTER=WFERRY
SYNC_DATE=06/12/2006
D
APPLE INC.
DRAWING NUMBER
051-7455
SCALE
SHT
NONE
75
OF
REV.
76
01
TABLE_PHYSICAL_RULE_HEAD
PHYSICAL_RULE_SET
LAYER
ALLOW ROUTE
ON LAYER?
FW_55S
=55_OHM_SE
=55_OHM_SE
=55_OHM_SE
=STANDARD
=STANDARD
ELECTRICAL_CONSTRAINT_SET
PHYSICAL
SPACING
TABLE_PHYSICAL_RULE_ITEM
FW_D_CTL
FW_55S
FW
FW_D_CTL
FW_55S
FW
FW_LCLK
CLK_MED_55S
CLK_MED
TABLE_PHYSICAL_RULE_ITEM
FW_110D
SPACING_RULE_SET
LAYER
=110_OHM_DIFF
=110_OHM_DIFF
=110_OHM_DIFF
=110_OHM_DIFF
=110_OHM_DIFF
CLK_MED_55S
CLK_MED
CLK_MED_55S
CLK_MED
CLK_MED_55S
CLK_MED
FW_55S
FW
FW_55S
FW
FW_LPS
FW_55S
FW
FW_LREQ
FW_55S
FW
FW_PINT
FW_55S
FW
FWPHY_CLK98P304M_XI
CLK_MED_55S
CLK_MED
CLK_MED_55S
CLK_MED
FW_0_TPA
FW_110D
FW_TP
FW_0_TPA
FW_110D
FW_TP
FW_0_TPB
FW_110D
FW_TP
TABLE_SPACING_RULE_HEAD
LINE-TO-LINE SPACING
WEIGHT
FW_PCLK
TABLE_SPACING_RULE_ITEM
FW
=2:1_SPACING
FW_TP
=3:1_SPACING
FW_LKON
TABLE_SPACING_RULE_ITEM
FW_110D
FW_TP
FW_1_TPA
FW_110D
FW_TP
FW_1_TPA
FW_110D
FW_TP
FW_1_TPB
FW_110D
FW_TP
FW_110D
FW_TP
FW_LINK<7..0>
FW_CTL<1..0>
CLKFW_LINK_LCLK
CLKFW_PHY_LCLK
CLKFW_LINK_PCLK
CLKFW_PHY_PCLK
FW_LKON
FW_LKON_R
FW_LPS
FW_LREQ
FW_PINT
CLK98P304M_FW_XI_R
CLK98P304M_FW_XI
FW_0_TPA_P
FW_0_TPA_N
FW_0_TPB_P
FW_0_TPB_N
FW_1_TPA_P
FW_1_TPA_N
FW_1_TPB_P
FW_1_TPB_N
PHYSICAL
SPACING
SMBUS_SMC_A_S3_SCL
SMB_55S
SMB
SMBUS_SMC_A_S3_SDA
SMB_55S
SMB
SMBUS_SMC_B_S0_SCL
SMB_55S
SMB
SMBUS_SMC_B_S0_SDA
SMB_55S
SMB
SMBUS_SMC_0_S0_SCL
SMB_55S
SMB
SMBUS_SMC_0_S0_SDA
SMB_55S
SMB
SMBUS_SMC_BSA_SCL
SMB_55S
SMB
SMBUS_SMC_BSA_SDA
SMB_55S
SMB
SMBUS_SMC_MGMT_SCL
SMB_55S
SMB
SMBUS_SMC_MGMT_SDA
SMB_55S
SMB
SMBUS_SMC_A_S3_SCL
SMBUS_SMC_A_S3_SDA
SMBUS_SMC_B_S0_SCL
SMBUS_SMC_B_S0_SDA
SMBUS_SMC_0_S0_SCL
SMBUS_SMC_0_S0_SDA
SMBUS_SMC_BSA_SCL
SMBUS_SMC_BSA_SDA
SMBUS_SMC_MGMT_SCL
SMBUS_SMC_MGMT_SDA
47D2
47D2
6B2 47C5
6B2 47C5
47D5
47D5
47C2
47C2
47B2
47B2
SYNC_MASTER=WFERRY
SYNC_DATE=06/12/2006
D
APPLE INC.
DRAWING NUMBER
051-7455
SCALE
SHT
NONE
76
OF
REV.
76
01