Professional Documents
Culture Documents
BO CO TH NGHIM VI X L - VI IU KHIN
1. cm DIP 18, 28 v 40 chn (c th cm 3 linh kin nhng ch dng 1 mi ln). 2. n p +5V dng cho ngun 9V, 100 mA AC/DC hay pin 9V. 3. u cm DB-9 theo chun giao tip RS-232. 4. u cm qua b lp trnh In-Circuit Debugger (ICD). 5. Bin tr 5K dng cho tn hiu nhp tng t. 6. Ba nt nhn dng to tn hiu kch t bn ngoi v reset. 7. LED ngun. 8. Bn LED ch th cho PORTB. 9. Jumper J6 ngt LED ch th RB0 (khi nhp tn hiu t nt nhn RB0). 10. B dao ng (OSC) 4 MHz. 11. Ni lp thm thch anh dao ng nu cn. 12. Thch anh dao ng 32.768 kHz to xung clock cho Timer1. 13. Jumper J7 ngt dao ng RC c sn (khong 2 MHz).
14. EEPROM ni tip 32K x 8 bit. 15. Mn hnh LCD. 16. Kn Piezo. 17. Vng lp thm linh kin. 18. Cm bin nhit TC74.
-Sau , ta c mt chng trnh cho PIC nh sau, by gi chng ta lu chng trnh va vit thnh BaiTN1.asm vo mt th mc to project pha trn. compile chng trnh ta vo menu Project_|Build All nh hnh bn di.
-Nu vic build tht bi, nhng vic ny th khng mong mun, ta c kt qu nh hnh sau:
-Nu vic build thnh cng, chng trnh s dch BaiTN1.asm thnh BaiTN1.hex trong cng th mc chng trnh BaiTN1.asm. Sau khi c c file hex, cng vic tip theo l lm th no np c file Hex xung board. u tin, chn mch np bng cch vo menu Programmer_|Select Programmer_|Mplab ICD2 nh hnh sau :
-Sau khi chn Mplab ICD2 xong th ta s thy giao din nh sau:
3. Cc bc cn lm tin hnh debug gi lp trn my hoc trn mch: -Bc 1. Chn Debugger bng menu Debugger_|Select Debugger_|Mplab SIM
-Bc 2. Tham kho menu Debugger. Xut hin nhiu chc nng h tr debug.
T y ta c th m phng c chng trnh ca mnh mt cch d dng. Cc chc nng thng dng : Run (F9): chy chng trnh, chng trnh s chy lin tc n khi no c breakpoint th dng. Breakpoints (F2): to ra breakpoint ti v tr hin ti ca con tr (cng c th
"double click" vo hng code mnh mong mun t Breakpoint). Step Into (F7): chy tng bc, vo trong chng trnh con (nu gp). Step Over (F8): chy tng bc, gi chng trnh con cng xem nh 1 bc. Reset: tr v u chng trnh. -Bc 3. Khi debug th ta cng cn phi bit gi tr ca cc thanh ghi cng nh b nh ca chip nh th no, xem c cc gi tr ny th chng ta qua menu View. xem c gi tr ca cc thanh ghi trong PIC ta chn menu View_|File registers s xut hin ca s nh hnh sau:
xem c gi tr ca cc thanh ghi SFR th ta chn View_|Special Function Registers s xut hin ca s nh hnh sau:
Hay xem mt v thanh ghi m ta quan tm th c th dng Watch xem bng cch vo menu View_|Watch th hnh sau s xut hin:
Mun xem thanh ghi no, ta ch vic chn thanh ghi tng ng trong combobox bn trn, sau nhn Add SFR.
Bi tp: Ci tin chng trnh BaiTN1.asm khi nhn RA4 s thy 4 LED t RB3 n RB0 sng nh u ra mt b m 4 bit nh phn tng dn (mi ln nhn tng 1).
list #include code goto udata PRG code start call main btfsc bra incf bra return clrf bcf bcf bcf bcf bsf return end p=18f4520 p18f4520.inc 0 start init PORTA,RA4 main LATB main PORTB TRISB,RB0 TRISB,RB1 TRISB,RB2 TRISB,RB3 TRISA,RA4
init
2.Gii thch ti sao dng LATB v PORTB lc ging nhau, lc khc nhau. -PORTB dng c d liu t ngoi thit b vo hoc cng c th c li d liu ghi ra cng LATB. -LATB dng cht d liu zut ra PORTB(thng dng phc v c ch c-sa-ghi). 3 Tnh thi gian chnh xc ca vng lp delay.
Bi tp: 1.Vit chng trnh khi nhn RA4 th cc led s sng m ln, mi ln nhn m ln 1 n v. list #include code goto udata PRG start code call p=18f4520 p18f4520.inc 0 start
main btfsc bra incf bra return init clrf bcf bcf bcf bcf bsf return end
2. Vit chng trnh sao cho mi ln nhn RA4 th 2 led tri v 2 led phi thay nhau sng. list #include code goto udata PRG start code call p=18f4520 p18f4520.inc 0 start
init PORTA,RA4 main 0x05 PORTB PORTA,RA4 loop 0x0a PORTB main
main btfsc bra movlw movwf loop btfsc bra movlw movwf bra return init clrf bcf bcf bcf bcf bsf return end
3.To hiu ng light river trn 4 led ca board mch starter kit. Nhn RA4 thay i chiu ca light river.
2. Dng ngt ngoi c trng thi nt nhn RA4 c b rung khng ?Lm sao bit chng rung? -Dng ngt ngoi trng thi nut nhn RA4 c rung.v khi nhn RA4 th to ra nhiu ngt lien tc.v th mch chy ng v n nh cn chng rung phm.
Bi tp: 1. Vit chng trnh khi to 2 ngt: Ngt ngoi INT0 (nhn ngt qua nt nhn RB0, Jumper JP6 h) vi u tin cao. Ngt timer 0 vi u tin thp. Trong chng trnh ngt ngoi INT0 bt 3 led n RB1, RB2, RB3 sng cng lc. Trong chng trnh timer 0 sau 1s khi 3 led c bt trong ngt ngoi th tt 3 led n RB1, RB2, RB3 cng lc.
list #include Code goto org goto org goto ; Vung du lieu udata delay res
call call goto ; Ham khoi dong ban dau init clrf movlw movwf bsf bcf bcf bcf movlw movwf return ; Ham khoi dong timer0 init_timer0 bsf bcf bcf bsf bsf bsf clrf movlw movwf
init_timer0 init_int0 $
LATB ; RB1-RB3 la cong xuat 0x0F ADCON1 TRISB,RB0 TRISB,RB1 TRISB,RB2 TRISB,RB3 .10 ; khoi dong bien delay=10 delay
RCON,IPEN ; cho phep uu tien ngat. INTCON2,TMR0IP ; timer0 uu tien thap INTCON,TMR0IF ; xoa co ngat timer0 INTCON,TMR0IE ; cho phep ngat timer0 INTCON,GIEH ; cho phep ngat uu tien cao INTCON,GIEL ; cho phep ngat uu tien thap T0CON ; prescaler 2:1 HIGH (-50000) ; nap so dem 50000 cho time TMR0H
movlw movwf bsf return ; Ham khoi dong int0 init_int0 bcf bcf bsf return ; Ham xu ly ngat timer0 timer0_isr bcf decfsz bra bcf bcf bcf movlw movwf timer0_isr_1 bcf movlw movwf movlw movwf
INTCON2,INTEDG0 ; tac dong canh xuong INTCON,INT0IF ; xoa co ngat INTCON,INT0IE ; cho phep ngat ngoai IN
T0CON,TMR0ON HIGH (-50000) ; nap lai so dem 50000 cho TMR0H LOW (-50000) TMR0L
bsf return ; Ham xu ly ngat int0 int0_isr bcf bsf bsf bsf movlw movwf return
; Ham xu ly ngat uu tien cao isr_high call retfie ; Ham xu ly ngat uu tien thap isr_low call retfie end timer0_isr int0_isr
2.Vit chng trnh hin th k t ln LCD. list #include #define #define LCD_D4 LCD_D5 p = 18f4520 P18f4520.inc LATD, RD0 ; LCD data bits LATD, RD1
LCD_D6 LCD_D7
LCD_D4_DIR TRISD, RD0 ; LCD data bits LCD_D5_DIR TRISD, RD1 LCD_D6_DIR TRISD, RD2 LCD_D7_DIR TRISD, RD3
LATD, RD6 ; LCD E clock LATD, RD5 ; LCD read/write line LATD, RD4 ; LCD register select line
LCD_E_DIR
TRISD, RD6
#define #define
LCD_INS LCD_DATA
0 1
LCDWriteNibble btfss bcf btfsc bsf bcf bcf bcf bcf STATUS, C LCD_RS STATUS, C LCD_RS LCD_RW ; Set write mode LCD_D4_DIR ; Set data bits to outputs LCD_D5_DIR LCD_D6_DIR ; Set the register select
bcf nop nop bsf nop nop btfss bcf btfsc bsf btfss bcf btfsc bsf btfss bcf btfsc bsf btfss bcf btfsc bsf nop nop bcf return
temp_wr, 7 ; Set high nibble LCD_D7 temp_wr, 7 LCD_D7 temp_wr, 6 LCD_D6 temp_wr, 6 LCD_D6 temp_wr, 5 LCD_D5 temp_wr, 5 LCD_D5 temp_wr, 4 LCD_D4 temp_wr, 4 LCD_D4 ; Small delay
LCD_E
LCDWrite_command macro data1 bcf movlw movwf call movlw movwf rcall endm LCDWrite_data macro data1 bsf movff rcall bsf rcall movlw movwf rcall endm LCD_RS ;write data data1,temp_wr LCDBusy STATUS, C LCDWrite 0x0F ;Wait ~100s @ 20 MHz delay DelayXCycles LCD_RS ;write command data1 temp_wr LCDWriteNibble 0xF delay DelayXCycles
LCDInit1 call bsf bcf bcf bcf init_variable LATD, RD7 TRISD, RD7 LCD_E_DIR ;configure control lines LCD_RW_DIR
lil11 movlw movwf rcall decfsz bra lil11 LCDWrite_command LCDWrite_command LCDWrite_command LCDWrite_command LCDWrite_command LCDWrite_command call call 0x20 0x80 0x00 0xf0 0x00 0x10 0xFF delay DelayXCycles COUNTER,F
Lcd_display
LCDWrite_data temp_wr1 incf clrf addwfc movlw cpfseq goto ;display line1 incf molw cpfseq goto clrf movlw movwf Set_cursor goto index_of_lcd MAX_INDEX index_of_lcd Exit_Lcd_display Index_of_lcd .1 flag_line .0,.1 Exit_Lcd_display FSR0L WREG FSR0H, F .0 flag_line Lcd_display_line2
Lcd_display_line2
incf movlw cpfseq goto clrf movlw movwf movlw movwf movlw movwf
index_of_lcd MAX_INDEX index_of_lcd Exit_Lcd_display Index_of_lcd .0 flag_line HIGH Lcd_buffer FSR0H LOW Lcd_buffer FSR0L
Set_cursor
.0, .0
Exit_Lcd_display Return
Bi 4 : Kho st b nh thi
a) Gii thch ngha cng thc tnh thi gian ca Timer. Nu dng prescaler 16:1 th cn chnh cc thng s no trong bi th nghim thi gian khng i. thi gian ca timer = 1/(FOSC /4)*prescaler Trong : -FOSC : tn s xung clock ngoi ( = 4MHz). -prescaler:gi tr ca thanh ghi T0CON T0CON=0x00 prescaler=2 T0CON=0x05 prescaler=4
V c ngt qung c set khi m trn t FFFF sang 0000 nn mun m 50000 th phi thit lp cho thanh ghi TMR0H v TMR0L l FFFF 50000 nn s m m
c) Xc nh thi gian chnh xc khi dng ngt thi gian trong bi th nghim. Thi gian chnh xc: 10ms+(2+1+2+2+1+1+1+2+1+1+1+1+1)*1s = 1.017ms Bi tp: 1. S dng b timer0 c sau 1s m ln 1 n v ri xut gi tr ra led n. list #include code goto org goto org goto udata delay PRG main call call goto init clrf PORTB ; toan bo PORTB la cong xuat init init_timer0 $ res code 1 p = 18f4520 p18f4520.inc 0 main 0x000008 ; vector ngat uu tien cao isr_high 0x000018 ; vector ngat uu tien thap isr_low
clrf return
TRISB
init_timer0 bsf bcf bcf bsf bsf bsf clrf movlw movwf movlw movwf bsf return isr_high ; khong lam gi ca retfie isr_low call retfie timer0_isr bcf decfsz bra INTCON,TMR0IF delay,1 timer0_isr_1 timer0_isr RCON,IPEN ; cho phep uu tien ngat. INTCON2,TMR0IP ; timer0 uu tien thap INTCON,TMR0IF ; xoa co ngat timer0 INTCON,TMR0IE ; cho phep ngat timer0 INTCON,GIEH ; cho phep ngat uu tien cao INTCON,GIEL ; cho phep ngat uu tien thap T0CON ; prescaler 2:1 HIGH (-50000) ; nap so dem 50000 cho timer0 TMR0H LOW (-50000) TMR0L T0CON,TMR0ON ; cho phep timer0 dem
incf movlw movwf timer0_isr_1 bcf movlw movwf movlw movwf bsf return end
T0CON,TMR0ON HIGH (-50000) ; nap lai so dem 50000 cho timer0 TMR0H LOW (-50000) TMR0L T0CON,TMR0ON ; cho phep timer0 dem lai
2.Dng b nh thi to xung vung chu k 10ms, duty cycle 30%. list #include code goto udata delay PRG main call call goto init init_timer0 $ res code 1 p=18f4520 P18f4520.inc 0 main
isr_high
bcf bra bcf movlw retfie isr_low bcf bsf movlw retfie init_timer0 clrf clrf
PORTB TRISB
Ta c 16 phm v 8 tn hiu iu khin. Nu mc 16 phm ny nh cc phm n, ta phi cn n 16 tn hiu iu khin. Gii m ma trn phm Ta xt 1 ma trn phm 2x2 nh hnh di y:
Khi phm A c nhn th in p ti C1 s bng R1. Nh vy nu ban u ti C1 v C2 l mc cao, R1 l mc thp v R2 l mc cao, th khi phm A c nhn, in p ti C1 (ban u l mc cao) s b ko xung mc thp.
Tng t nu phm B c nhn th C2 s b ko xung mc thp. xc nh 2 phm C v D c c nhn hay khng, ta s nng in p ti R1 ln mc cao, ko in p ti R2 ln mc cao (chuyn hng tch cc).
Nh vy, xc nh v tr ca phm no c nhn, ta s duyt qua tt c cc hng v xt cc phm hng . Quy c tn hin DEACTIVE l mc 1 v tn hin ACTIVE l mc 0, tng bc gii m ma trn phm nh sau:
Cho tn hiu cc ct l DEACTIVE Ci t tn hin ti cc ct l INPUT Cho tn hin cc hng l DEACTIVE Ci t tn hiu cc hng l OUTPUT Lp qua cc hng o Cho tn hiu hng ang xt l ACTIVE. o Xt cc ct trong hng ang cho ACTIVE, ct no c tn hiu ACTIVE l phm tng ng c nhn. Kt thc vng lp
row_buffer PRG code #define #define #define main call movlw movwf movlw movwf movlw movwf call goto init_IO clrf clrf clrf clrf clrf clrf movlw movwf movwf movwf movlw movwf movwf movwf movlw movwf movwf movwf movlw movwf movwf movwf movlw movwf movwf movwf movlw movwf movwf movwf
res red_data green_data row init_IO 0x3C red_data 0x33 green_data 0x80; row init_timer0 $
PORTD TRISD PORTC TRISC PORTB TRISB 0x80 red_buffer green_buffer row_buffer 0x40 red_buffer+1 green_buffer+1 row_buffer+1 0x20 red_buffer+2 green_buffer+2 row_buffer+2 0x10 red_buffer+3 green_buffer+3 row_buffer+3 0x08 red_buffer+4 green_buffer+4 row_buffer+4 0x04 red_buffer+5 green_buffer+5 row_buffer+5
movlw movwf movwf movwf movlw movwf movwf movwf return init_timer0 bsf bcf bcf bsf bsf bsf clrf movlw movwf movlw movwf bsf return timer0_isr bcf decfsz bra movlw movwf movf lfsr movff lfsr movff lfsr movff incf movlw cpfslt clrf
RCON,IPEN INTCON2,TMR0IP INTCON,TMR0IF INTCON,TMR0IE INTCON,GIEH INTCON,GIEL T0CON HIGH(-.5000) TMR0H LOW(-.5000) TMR0L T0CON,TMR0ON
INTCON,TMR0IF delay,1 timer0_isr_1 .10 delay index,w FSR0,red_buffer PLUSW0, red_data FSR0,green_buffer PLUSW0, green_data FSR0,row_buffer PLUSW0, row index .8 index index
movlw movwf movlw movwf bsf return int0_isr bcf movlw movwf return isr_high call retfie isr_low call retfie end
int0_isr
timer0_isr
main1
movwf movwf main2 btfss bra btfsc bra btfss bra incf bra
LATB TXREG PIR1,TXIF main2 PORTA,RA4 main4 PORTA,RA4 main3 dem main1
main3
main4 main5 INIT_PORT clrf clrf bsf bcf bsf RETURN INIT_UART movlw movwf bsf bsf bsf bsf bcf bsf bsf bsf RETURN end 19h SPBRG TXSTA,TXEN TXSTA,BRGH RCSTA,SPEN RCSTA,CREN PIR1,RCIF PIE1,RCIE INTCON,PEIE INTCON,GIE LATB TRISB TRISA,RA4 TRISC,6 TRISC,7 movlw .200 movwf delay decfsz delay bra main5 bra main1
list #include code org goto udata PRG start call call loop_2 call bra
init_portB clrf PORTB clrf TRISB return init_AD movlw movwf movlw movwf movlw movwf call bsf return B'00000100' ADCON1 B'11000101' ADCON0 0x01 ADCON2 setupdelay ADCON0,GO
setupdelay movlw .5 loop decfsz WREG bra loop return update_adc bsf ADCON0,GO loop_3 btfsc ADCON0,GO bra loop_3 movf ADRESH,W swapf WREG
list #include org bra START call goto Init_pwm bcf movlw movwf period movlw cycle movwf bcf bcf
p=18f4520 p18f4520.inc 0x000000 ; reset vector START Init_pwm $ TRISC,2 .174 PR2 ;initialize PWM .75 ;initialize PWM duty CCPR1L CCP1CON,CCP1X CCP1CON,CCP1Y
;postscale 1:1, prescaler 4, Timer2 ON movlw 0x05 movwf T2CON movlw 0x0C ;turn buzzer on movwf CCP1CON return end b)
call goto Init_pwm bcf movlw movwf period movlw cycle movwf bcf bcf
Init_pwm $ TRISC,2 .13 PR2 ;initialize PWM .17 ;initialize PWM duty CCPR1L CCP1CON,CCP1X CCP1CON,CCP1Y
;postscale 1:1, prescaler 4, Timer2 ON movlw 0x07 movwf T2CON movlw 0x3C ;turn buzzer on movwf CCP1CON return end