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CPU
B nh
chng
trnh
B nh
d liu
Vo/ra
song
song
Vo/ra
ni tip
Ngt
P1
Timer0
P2
Timer1
P3
P4
B nh
thi / b
m
Tn chip
8051
8052
8031
8032
87C51
87C52
AT89C51 / AT89S51
AT89C52 / AT89S52
ROM
4 Kbyte
8 Kbyte
x
x
x
x
x
x
EPROM
x
x
x
x
4 Kbyte
8 Kbyte
x
x
Flash
x
x
x
x
x
x
4 Kbyte
8 Kbyte
0x0FFF
0x0030
0x0003
0x0000
Tn chip
B nh SRAM
128 byte
256 byte
128 byte
128 byte
256 byte
256 byte
AT89C51
AT89C52
AT89C2051
AT89S51
AT89S52
AT89S8252
B nh EEPROM
0
0
0
0
0
2048 byte
64
Kbyte
B nh chng
trnh onchip
B nh SRAM
Dung lng
ty loi chip
i vi cc chip c b nh SRAM 128 byte th a ch ca cc byte SRAM
ny c nh s t 00h n 7Fh. i vi cc chip c b nh SRAM 256 byte th
a ch ca cc byte SRAM c nh s t 00h n FFh. c hai loi chip, SRAM
c a ch t 00h n 7Fh c gi l vng RAM thp, phn c a ch t 80h n
FFh (nu c) c gi l vng RAM cao.
Bn cnh cc b nh, bn trong mi chip 8051 cn c mt tp hp cc thanh
ghi chc nng c bit (SFR Special Function Register). Cc thanh ghi ny lin
quan n hot ng ca cc ngoi vi onchip (cc cng vo ra, timer, ngt ...). a
ch ca chng trng vi di a ch ca vng SRAM cao, tc l cng c a ch t
80h n FFh.
0x7F
Vng RAM
thng (khng
nh a ch bit
c)
0x30
Vng RAM 16
byte c th nh
a ch bit t
0x00 n 0x7F
0x2F
0x1F
0x20
8052 c
thm vng
RAM cao
(a ch
cng t
0x80 n
0xFF)
nhng
truy nhp
phi theo
ch a
ch gin
tip
phn bit
vi vng
SFR
0x00
y l vng cc
thanh ghi chc
nng c bit SFR
(Special Function
Register) c c
8051 v 8052.
Truy nhp
(ghi/c) vng ny
l truy nhp vo
cc a ch t 0x80
n 0xFF nhng
phi theo ch
a ch trc tip
SM1
SM2
REN
TB8
RB8
TI
RI
Bit SM0, SM1, SM2 quy nh ch hot ng ca cng ni tip. Thng thng
truyn thng gia 2 vi iu khin hoc gia 1 vi iu khin v 1 my tnh, gi tr ca
bit SM2 c t bng 0. Khi truyn thng theo kiu mng a vi x l
(multiprocessor communication), SM2 c t bng 1. Hai bit SM0 v SM1 thc
s l cc bit quy nh ch hot ng ca cng ni tip, chng to ra 4 t hp
(00,01,10 v 11) ng vi 4 ch hot ng m t trong bng sau.
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SM0
0
0
1
1
SM1
0
1
0
1
Ch
0 - ng b
1 - D b
2 - D b
3 - D b
Khung d liu
8 bit SBUF
8 bit SBUF
8bit SBUF + RB8/TB8
8bit SBUF + RB8/TB8
Baud rate
Fosc/12
Thay i c
Fosc/32 hoc Fosc/64
Thay i c
Ngt (Interrupt)
8051 ch c mt s lng kh t cc ngun ngt (interrupt source) hoc c
th gi l cc nguyn nhn ngt. Mi ngt c mt vector ngt ring, l mt a ch
c nh nm trong b nh chng trnh, khi ngt xy ra, CPU s t ng nhy n
thc hin lnh nm ti a ch ny. Bng tm tt cc ngt trong 8051 nh sau:
STT
Tn ngt
1 INT0
2 Timer0
3 INT1
4 Timer1
5 Serial Port
M t
C
ngt
Ngt ngoi 0 khi c tn IE0
hiu tch cc theo kiu
chn chn P3.2
Ngt trn timer0 khi TF0
gi tr timer0 trn t
gi tr max v gi tr
min
Ngt ngoi 1 khi c tn IE1
hiu tch cc theo kiu
chn chn P3.3
Ngt trn timer1 khi TF1
gi tr timer1 trn t
gi tr max v gi tr
min
Ngt cng ni tip khi TI, RI
vi iu khin nhn
hoc truyn xong mt
byte bng cng ni
tip
0x000B
TCON
0x0013
TCON
0x001B
SCON
0x0023
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Nhn vo bng trn ta thy ngt INT0 l ngt c mc u tin cao nht v ngt
timer2 l ngt c mc u tin thp nht trong s cc ngt. Nh vy nu ngt ngoi
1 v ngt timer0 cng xy ra mt lc, ngt timer0 s c CPU x l trc, sau
mi x l ngt ngoi 1.
Vi trng hp xy ra ngt xen k, khi CPU ang x l ngt A m ngt B xy
ra, CPU s gii quyt theo 2 hng: tip tc x l ngt A nu mc u tin ca ngt
B khng cao hn mc u tin ca ngt A, hoc s dng vic x l ngt A li,
chuyn sang x l ngt B nu mc u tin ca ngt B cao hn mc u tin ca
ngt A. Mc u tin cho cc ngt trong trng hp ny khng phi l mc u tin
cng do nh sn xut quy nh (tc l khng cn c vo bng trn) m l do ngi
lp trnh t. Lp trnh vin c th dng thanh ghi IP quy nh mc u tin cho
cc ngt mt trong hai mc: mc cao v mc thp. t mc u tin ca mt
ngt (trong trng hp xy ra xen k) mc cao, ta t bit tng ng vi ngt
trong thanh ghi IP bng 1, mc thp ng vi gi tr bit = 0.
Thanh ghi IP (Interrupt Priority)
PT2
PS
PT1
PX1
PT0
PX0
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Khi bit ITx = 1 th ngt ngoi tng ng c chn kiu l ngt theo sn
xung, ngc li nu bit ITx = 0 th ngt ngoi tng ng c s c kiu ngt l
ngt theo mc thp. Cc bit IE l cc bit c ngt ngoi, ch c tc dng trong trng
hp kiu ngt c chn l ngt theo sn xung.
Khi kiu ngt theo sn xung c chn th ngt s xy ra duy nht mt ln
khi c sn xung ca tn hiu, sau khi tn hiu mc thp, hoc c sn ln,
hoc mc cao th cng khng c ngt xy ra na cho n khi c sn xung tip
theo. C ngt IE s dng ln khi c sn xung v t ng b xa khi CPU bt u
x l ngt.
Khi kiu ngt theo mc thp c chn th ngt s xy ra bt c khi no tn
hiu ti chn ngt mc thp. Nu sau khi x l xong ngt m tn hiu vn mc
thp th li ngt tip, c nh vy cho n khi x l xong ngt ln th n , tn hiu
ln mc cao ri th thi khng ngt na. C ngt IE trong trng hp ny khng c
ngha g c.
Thng thng kiu ngt hay c chn l ngt theo sn xung.
B nh thi/B m (Timer/Counter)
8051 c 2 timer tn l timer0 v timer1. Cc timer ny u l timer 16bit, gi
tr m max do bng 216 = 65536 (m t 0 n 65535).
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Giao thc truyn thng gia cng COM ca my tnh v cng ni tip UART ca vi
iu khin AT89 l tng thch. Tuy nhin v mt in hc th c s khc bit v
mc lgic gia my tnh v vi iu khin. Vi mch MAX232CPE c s dng
to ra s tng thch v mt in hc, t ng chuyn i mc lgic gia vi iu
khin v my tnh.
V d: Thit k thit b t ng truyn tr li PC nhng d liu nhn c.
// Khai bao cac file header
#include
<AT89X52.H>
#include
<Kit8051.h>
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<Kit8051.h>
File header cho ton b cc chng trnh mu trn bao gm file AT89X52.H c
sn ca trnh bin dch Keil. Ngoi ra cn c thm mt file header khc tn l
Kit8051.h do ngi s dng t to ra nhm nh ngha cc hng s, cc tn gi
khc ca cc tn hiu giao tip, iu khin. Chi tit xin tham kho trong a CD km
theo.
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