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CHNG 1: GII THIU PLC S7-1200 1.1. Tng quan v PLC S7-1200 PLC vit tt ca Programmable Logic Controller l thit b iu khin lp trnh c cho php thc hin linh hot cc thc ton iu khin logic thong qua mt ngn ng lp trnh. ngi s dng c th lp trnh thc hin mt lot trnh t cc s kin. Cc s kin ny c kch hot bi tc nhn kch thch tc ng vo plc hoc qua cc hot ng c tr nh thi gian nh k hay thi gian c m. Mt khi s kin c kch hot tht s, n bt ON hay OFF cc thit b iu khin bn ngoi c gi l thit b vt l. Mt b iu khin lp trnh s lin tc lp trong chng trnh do ngi s dng lp ra ch tn hiu ng vo v xut tn hiu ng ra ti cc thi im lp trnh. khc phc nhng nhc im ca b iu khin dung dy ni, ngi ta ch tao b iu khin plc nhm tho mn cc yu cu sau: +Lp trnh d dng, ngn ng lp trnh d hc +Gn nh, d bo qun, sa cha +Dung lng b nh ln c th cha c nhng chng trnh phc tp +Hon ton tin cy trong mi trng cng nghip +Giao tip c vi cc thit b thng minh khc nh my tnh, ni mng, cc module m rng Cc thit k u tin l nhm thay cho cc phn cng Relay dy ni v cc logic thi gian. Tuy nhin bn canh vic i hi tng cng dung lng nh v tnh d dng cho PLC m vn m bo tc x l cng nh gi c. Chnh iu ny to ra s quan tm su sc n vic s dng PLC trong cng nghip, cc tp lnh nhanh chng i t cc lnh logic n gin n cc lnh m, nh thi, thanh ghi dchS pht trin cc my tnh dn n cc b PLC c dung lng ln, s lng I/O nhiu hn. Trong PLC phn cng CPU v chng trnh l n v c bn cho qu trnh iu khin v s l h thng, chc nng m b iu khin cn thc hin s c xc nh bng mt chng trnh. Chng trnh ny s c np sn vo b nh ca

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PLC, PLC s thc hin vic iu khin da vo chng trnh ny. Nh vy nu mun thay i hay m rng chc nng ca quy trnh cng ngh. Ta ch cn thay i chng trnh bn trong b nh PLC. Vic thay i hay m rng chc nng s c thc hin mt cch d dng m khng cn mt s can thip vt l no so vi cc b dy ni hay Relay.

1.2.

Cc dng sn phm ca SIEMENS

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1.3.

Cu hnh v iu hnh SIMATIC S7-1200 1.3.1. Signal boards

Signal Board Kt ni h thng dy dn

1.3.2. Signal modules

Trng thi n LED ca I / O module tn hiu Bus kt ni Kt ni h thng dy

1.3.3. Cc moun truyn thng

Trng thi n LED cho cc module giao tip Truyn thng kt ni

1.4.

Nhng c im ni bt ca Simatic S7 1200. 1.4.1.Thit k dng Module.

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+ Tch hp cng truyn thng Profinet (Ethernet) to s d dng trong kt ni. + Simatic S7 1200 vi Simatic HMI Basic c lp trnh chung trn mt nn phn mm l TIA Portal V10.5 (Simatic Step 7 Basic, WinCC Basic) hoc version cao hn. Cc thao tc lp trnh thc hin theo cch ko th, do to s d dng cho ngi s dng, lp trnh nhanh chng, n gin, chnh xc trong s truyn thng kt ni theo tags. + Tch hp sn cc u vo ra, cng vi cc board tn hiu, khi cn m rng ng dng vi s lng u vo ra t s tit kim c chi ph, khng gian v phn cng. + D dng cho ngi s dng sn phm trong vic mua gi thit b. 1.4.2 Phm vi ng dng ca Simatic S2 1200: + S7 1200 bao gm cc h CPU 1211C, 1212C, 1214C. Mi loi CPU c nhng tnh nng khc nhau, thch hp cho tng loi ng dng.

+ Cc kiu cp ngun v u vo ra c th l DC/DC/DC hay DC/DC/Rly + u c khe cm th nh, dng cho khi m rng b nh cho CPU, copy chng trnh ng dng hay cp nht firmware. + Chn on li online/offline. + Mt ng h thi gian thc cho cc ng dng thi gian thc 2.4.1. Cc chc nng ni bt ca CPU 1214C + C 6 b m tc cao HSC dng cho cc ng dng m v o lng. + C 2 ng ra PTO 100kHz iu khin tc , ng c bc hay servo. + C ng ra PWM iu ch rng xung cho cc ng dng iu khin tc ng c, valve, nhit . + C 16 b iu khin PID vi tnh nng t ng xc nh thng s cho b iu khin (Autotuning)

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1.4.2 S u dy PLC CPU 1214C DC/DC/DC

1.4.3.Board tn hiu ca S7-1200 + Board tn hiu mt dng module m rng tn hiu vo/ra vi s lng tn hiu t, gip tit kim chi ph cho cc ng dng yu cu m rng s lng tn hiu t Gm cc board: 1 cng tn hiu ra analog 12 bit (0-10VDC, 0-20mA)

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1.4.4. Modules m rng tn hiu vo/ra Cc module m rng tn hiu vo/ra c gn trc tip vo pha bn phi ca CPU. Vi di rng cc loi module tn hiu vo/ra s v analog, gip linh hot trong s dng S7-1200. Tnh a dng ca cc module tn hiu vo/ra s c tip tc pht trin.

1.4.2 Module Analog + SM tn hiu module cho cc u vo v u ra Analog (cho CPU 1212C ti a ca 2 SM c th s dng, cho 1214C ti a l 8)

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1.4.2.Module truyn thng + Giao tip vi RS 232/RS 485

1.4.3.Th nh + SIMATIC th nh 2MB hoc 24MB cho cc chng trnh lu tr d liu v thay th CPU n gin bo tr

Module ngun + S dng module ngun PM 1207 c cc thng s: Input: 120/230V AC 50/60Hz, 1.2A/0.7A Output: 24V DC / 2.5A

Switch + Module CSM1277 c 4 cng cm RJ45, tc 10/100Mb/s

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1.5 Cu trc v nguyn l hot ng 1.5.1.Cu trc Tt c PLC u c thnh phn chnh l mt b nh chng trnh RAM bn trong, mt b vi x l c cng giao tip dng cho vic ghp ni vi PLC, cc module I/O. Bn cnh , mt s PLC hon chnh cn i km theo mt n v lp trnh bng tay hay bng my tnh. Hu ht cc n v lp trnh n gin u c RAM cha ng chng trinh di dng hon thin hay b sung. Nu n v lp trnh l n v sch tay, RAM thng l loi CMOS c pin d phng, ch khi no chng trnh c kim tra v sn sang s dng th n mi truyn sang b nh PLC. i vi cc PLC ln thng lp trnh trn my tnh nhm h tr cho vit, c v kim tra chng trnh. Cc n v lp trnh ni vi PLC qua cng RS232, RS422, RS458. 1.5.2 Nguyn l hot ng ca PLC CPU iu khin cc hot ng bn trong PLC. B x l s c v kim tra chng trnh c cha trong b nh, sau s thc hin tng lnh trong chng trnh, s ng hay ngt cc u ra. Cc trng thi ng ra y c pht ti cc thit b lin kt thc thi v ton b cc hoat ng thc thi u ph thuc vo chng trnh iu khin c gi trong b nh. H thng bus l tuyn dng truyn tn hiu, h thng gm nhiu ng tn hiu song song: +Address bus:bus a ch dng truyn a ch ti cc module khc nhau +Data bus:bus dng truyn d liu

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+Control bus:bus iu khin dung truyen cc tn hiu nh th v iu khin ng b cc hot ng trong PLC H thng Bus s lm nhim v trao i thng tin gia CPU, b nh v I/O. Bn cnh CPU c cung cp mt xung clock c tn s t 1, 8 Mhz. Xung ny quyt nh tc hot ng ca PLC v cung cp cc yu t v nh thi, ng h ca h thng. 1.5.3. n tn hiu PLC C 3 loi n bo hot ng: Run/stop: n xanh/n vng bo hiu PLC ang hot ng/dng hot ng Error: n bo li Maint: n bo khi ta buc (Force) a ch no ln 1 C 2 loi n ch th: Ix.x: ch trng thi logic ng vo. Qx.x: ch trng thi logic ng ra. 1.5.4. B nh PLC PLC thng yu cu b nh trong cc trng hp: lm b nh thi cho cc knh trng thi I/O. Lm b m trng thi cc chc nng trong PLC nh nh thi, m, gi cc Relay. Mi lnh ca chng trnh c mt v tr ring trong b nh, tt c cc v tr trong b nh u c nh s, nhng s ny chnh l a ch trong b nh. a ch ca tng nh s c tr n bi mt b m a ch nm bn trong b vi x l. B vi x l s c gi tr trong b m ny thm mt trc khi x l lnh tip theo. Vi mt a ch mi, ni dung ca nh tng ng s xut hin u ra, qu trnh ny gi l qu trnh c. B nh bn trong ca PLC c to bi vi mch bn dn, mi vi mch ny c kh nng cha 2000-16000 dng lnh tu theo loi vi mch trong PLC cc b nh nh RAM v EPROM u c s dng +RAM c th np chng trnh, thay i hay xo b ni dung bt k lc no, ni dung ca RAM s b mt nu ngun in nui b mt. trnh tnh trng ny cc PLC u c trang b pin kh c kh nng cung cp nng lng d tr cho

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RAM t vi thng n vi nm. Trong thc t RAM c dung khi to v kim tra chng trnh. Khuynh hng hin nay dung CMOSRAM do kh nng tiu th thp v tui th cao +EPROM l b nh m ngi s dng bnh thng c th c ch khng ghi ni dung vo c, ni dung ca EPROM khng b mt khi mt ngun, n c gn sn trong my, dc nh sn xut np v cha sn h iu hnh. Nu ngi s dng khng mun s dng b nh th ch dng EPROM gn bn trong PLC. Trn PG c sn ch ghi v xo EPROM +EEEPROM lin kt vi nhng truy xut linh ng ca RAM v c tnh n nh. Ni dung ca n c th xo v lp trnh bng in tuy nhin s ln l c gii hn 1.6. H thng v b nh ng h

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Bin nh to xung clock M10. 0 M10. 1 M10. 2 M10. 3 M10. 4 M10. 5 M10. 6 M10. 7 (Clock_10Hz) (Clock_5Hz) (Clock_2. 5Hz) (Clock_2Hz) (Clock_1. 25Hz) (Clock_1Hz) (Clock_0. 625Hz) (Clock_0. 5Hz

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CHNG 2: GII THIU PHN MM TIA PORTAL V11 2.1. Kt ni CPU qua giao thc TCP/IP

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2.2.

Cu hnh CPU

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2.3.

a ch IP mc nh ca PLC S7 1200

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2.4.

Cp a ch IP cho PC hoc Laptop lp trnh SIMATIC S7-1200 t PC, PG hay Laptop, cn mt kt ni TCP/IP. PC v SIMATIC S7-1200 c th giao tip vi nhau, iu quan trng l cc a ch IP ca c hai thit b iu phi ph hp vi nhau. Cc bc thit lp IP cho my tnh: Chn Network connections/ Properties ca kt ni mng LAN (Start Setting System control Network connections Local Area Connection Properties) Chn Properties t Internet Protocol (TCP/IP) (Internet Protocol (TCP/IP) Properties). Thit lp IP address v Subnet screen form, v chp nhn vi OK ( Use the following IP address IP address: 192. 168. 0. 99 Subnet screen 255. 255. 255. 0 OK Close).

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2.5.

Kt ni my tnh vi PLC

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2.6.

Kt ni Profinet

2.7.

Mt khu bo v cho CPU S7-1200

2.8.

Khi to bng tag mi C 2 cch: 1.To bng tag

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1. Ko th vo a ch plc

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2.9.

Khi chng trnh

2.10. Khi t chc OB Oganization Blocks 1. Oganization blocks (Obs): l giao din gia hot ng h thng v chng trnh ngi dng. Chng c gi ra bi h thng hot ng v iu khin theo qu trnh: X l chng trnh theo chu k. Bo ng kim sot x l chng trnh. X l li. 2. Ty chn khc nhau s dng khi OB trong chng trnh: Startup OB, Cycle OB, Timing Error OB and Diagnosis OB. Process Alarm OB and Time Interrupt OB. Time Delay Interrupt OB. 3. Hm chc nng Function 4. Functions (FCs) l cc khi m khng cn b nh. D liu ca cc bin tm thi b mt sau khi FC c x l. Cc khi d liu ton cu c th c s dng lu tr d liu FC.

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5. Functions c th c s dng vi mc ch: Tr li gi tr cho hm chc nng c gi. Thc hin cng ngh chc nng, v d: iu khin ring vi cc hot ng nh phn. Ngoi ra, FC c th c gi nhiu ln ti cc thi im khc nhau trong mt chng trnh. iu ny to iu kin cho lp trnh chc nng lp i lp li phc tp.

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CHNG 3: TP LNH C BN CA PLC S7-1200 3.1. Cc tp lnh c bn

3.1.1. Cng tc v cun coil Tham Kiu d K hiu Miu t s liu Cng tc Cng tc thng ng hay thng m. Cc vng nh c th s dng la I, Q, M, D. IN BOOL c th c ngay lp tc ng vo c th s ng vo vt l thay v bin qu trnh.

Lnh logic NOT IN/OUT BOOL Cun coil OUT OUT BOOL BOOL Trng thi ng ra l kt qu x l ca php ton logic o kt qu ng ra ca php ton logic. o trng thi ng vo/ra

3.1.2.

Lnh Set v Reset Tham s Kiu d liu

K hiu

Miu t

Lnh Set v Reset 1 bit OUT BOOL Khi lnh Set c tc ng th a ch ng ra s c t ln 1.

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OUT

BOOL

Khi lnh Reset c tc ng th a ch ng ra s c tr v 0.

Lnh Set v Reset nhiu bit Khi lnh SET_BF c tc ng, mt OUT BOOL chui gm n bit s c t ln 1 bt u ti a ch OUT. Khi lnh RESET_BF c tc ng, mt OUT BOOL chui gm n bit s c tr v 1 bt u ti a ch OUT. Lnh SR v RS fliplop S1, R OUT R,S1 OUT BOOL BOOL BOOL BOOL Mch cht SR u tin Reset Mch cht RS u tin Set

3.1.3.

Lnh nhn bit xung cnh ln P v xung cnh xung N Tham s Kiu d liu

K hiu

Miu t

Nhn bit xung cnh ln v cnh xung Pht hin s thay i trng thi ca 1 tn hiu vn hnh (IN) t 0->1 (Thay i trng thi tn IN BOOL hiu pha trc khng nh hng g n IN). Khi ng ra mc 1, tt c trng hp cn li u mc 0. trng thi ca IN s c lu tr trong M_BIT

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Pht hin s thay i trng thi ca 1 tn hiu vn hnh (IN) t 1->0 (Thay i trng thi tn IN BOOL hiu pha trc khng nh hng g n IN). Khi ng ra mc 1, tt c trng hp cn li u mc 0. trng thi ca IN s c lu tr trong M_BIT Nu c s thay i ti RLO t 0->1 th bin nh OUT BOOL OUT s c set ln 1 cho 1 chu k chng trnh cc trng hp cn li OUT u bng 0, M_BIT lu li trng thi ca OUT Nu c s thay i ti RLO t 1->0 th bin nh OUT BOOL OUT s c set ln 1 cho 1 chu k chng trnh cc trng hp cn li OUT u bng 0, M_BIT lu li trng thi ca OUT Lnh P_TRIG v N_TRIG Khi ng vo clk c s thay i trng thi logic BOOL t 0->1 s pht ra 1 xung ng thi trng thi ca tn hiu lc ny s c lu li vo M_BIT Khi ng vo clk c s thay i trng thi logic BOOL t 1->0 s pht ra 1 xung ng thi trng thi ca tn hiu lc ny s c lu li vo M_BIT 3.2. LNH TIMER S dng lnh Timer to 1 chng trnh tr nh thi. S lng ca Timer ph thuc vo ngi s dng v s lng vng nh ca CPU. Mi timer s dng 16 byte IEC_Timer d liu kiu cu trc DB. Setp 7 t ng to khi DB khi ly khi Timer. Kch thc v tm ca kiu d liu Time 32bit, lu tr l d liu Dint.

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Tham s IN R PT Q ET

Kiu d liu Bool Bool Time Bool Time

Miu t Ng vo cho php timer hot ng Reset timer Thi gian t trc Ng ra Thi gian thc hin

3.2.1.Timer TP-Timer to xung Timer TP to mt chui xung vi rng xung t trc. Thay i PT, IN khng nh hng khi timer ang chy. Khi u vo IN c tc ng vo Timer s to ra 1 xung c rng bng thi gian t PT.

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3.2.2.Timer TON Timer tr sn ln c nh. Khi ng vo IN c tc ng v duy tr trng thi lin tc vi thi gian hn thi gian t th ng ra Q s chuyn ln mc 1. Khi ng vo ngng tc ng th reset v dng hot ng Timer. Thay i PT khi Timer ang chy khng nh hng ti Timer

Tham s IN PT

Khai bo Input Input

kiu d liu BOOL TIME

Vng nh I, Q, M, D, L I, Q, M, D, L or constant I, Q, M, D, L I, Q, M, D, L

M t Ng vo Gi tr ca tham s PT phi l tch cc u ra c thit lp khi thi gian PT ht. Gi tr thi gian hin ti

Q ET

Output Output

BOOL TIME

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3.2.3.Timer TOF Timer tr sn xung Khi ng vo tc ng th timer s tc ng v tip im thng h ca timer s chuyn trng thi ln 1. Khi ng vo ngng tc ng th sau khong thi gian PT th timer s ngng tc ng

3.2.4 Timer TONR Timer tr sn ln c nh Khi tng th tc ng ca ng vo ln hn hay bng thi gian t PT th Timer s c tc ng v tip im thng m ca Timer s chuyn ln mc 1. V khi trng thi Reset ca Timer b tc ng th Timer ngng hot ng v b Reset li. V d:

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3.3 Counter Lnh c dng im cc s kin ngoi hay cc s kin qu trnh trong PLC. Mi Counter s dng cu trc lu tr ca khi d liu DB lm d liu ca Counter. Step 7 t ng to DB khi ly lnh. Tham s CU, CD R LOAD (CTD, CTUD) PV Q, QU QD CV . 3.3.1 Counter m ln CTU Gi tr b m CV tng ln 1 khi tnh hiu ng vao CU chuyn t 0->1. Ng ra Q tc ng ln 1 khi CV>=PV. Nu trng thi R = reset c tc ng th b m CV=0 V d : Kiu d liu Bool Bool Bool SInt, Int, DInt, Int, UInt, UDInt Bool Bool SInt, Int, DInt, Int, UInt, UDInt Miu t m ln hay m xung Reset gi tr m v 0 Load gi tr t trc Gi tr m t trc Mc 1 nu CV>=PV Mc 1 nu CV<=0 Gi tr m hin hnh

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3.3.2 Counter m xung CTD Gi tr b m CV c gim 1 khi tnh hiu ng vo CD chuyn t 0->1. Ng ra Q tc ng ln 1 khi CV<=0. Nu trng thi Load c tc ng th CV = PV.

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3.3.3 Counter m ln xung CTUD Gi tr b m CV c tng ln 1 khi tn hiu ng vo CU chuyn t 0->1. Ng vo QU c tc ng ln 1 khi CV>=PV. Nu trng thi R = Reset c tc ng th b m CV = 0. Gi tr b m CV c gim 1 khi tn hiu ng vo CD chuyn t 0->1. Ng ra QD c tc ng ln 1 khi CV<=0. Nu trng thi Load c tc ng th CV = PV.

3.4 SO SNH 3.4.1. Lnh CMP So snh 2 kiu d liu ging nhau, nu lnh so snh tha th ng ra s l mc 1 = TRUE. Kiu d liu so snh l: Sint, Int, Dint, USInt, UDInt, Real, Lreal, String, Char, Time, DTL, Constant.

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Cc kiu so snh: == <> >= <= > < 3.4.2 Ton hc 3.4.1 Lnh ton hc IN1 = IN2 IN1 IN2 IN1 >= IN2 IN1 <= IN2 IN1 > IN2 IN1 < IN2

Cng dng: thc hin php ton t cc ng vo IN1, IN2, IN(n) theo cng thc OUT=(do mnh nhp vo bng cch nhp vo chnh gia khi) ri xut kt qu ra ng ra OUT. Cc thng s ng vo dung trong khi phi chung dnh dng. 3.4.2 Lnh Cng, Tr, Nhn, Chia Cu trc tp lnh Cng, Tr, Nhn, Chia: Lnh Cng ADD Lnh Tr SUB :OUT = INT1 + IN2 : OUT = INT1 - IN2

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Lnh Nhn MUL Lnh Chia DIC Real, LReal, constant).

: OUT = INT1 * IN2 : OUT = INT1 / IN2

Tham s IN1, IN2 phi cng kiu d liu ( SInt, Int, DInt, USInt, UInt, UDInt, Tham s OUT c kiu d liu l SInt, Int, DInt, USInt, UInt, UDInt, Real. Tham s ENO = 1 nu khng c li xy ra trong qu trnh thc thi. ENO = 0 nu c li xy ra. Trng thi 1 0 0 0 0 0 0 0 Miu t Khng c li Ku qu ton hc nm ngoi phm vi ca kiu d liu. Chia cho 0. (IN2 = 0) Real/LReal: nu mt trong nhng gi tr u vo l NaN (not a number khng phi l s) sau c tr v NaN. ADD Real/lReal: nu c hai gi tr IN v INF c du khc nhau, y l mt khai bo khng hp l v c tr v NaN. SUB Real/LReal: nu c hai tr IN v INF cng du, y l mt khai bo khng hp l v c tr v NaN MUL Real/LReal: nu mt trong 2 gi tr l 0 hoc l INF, y l khai bo khng hp l v c tr v NaN. DIV Real/LReal: nu c hai gi tr IN bng khng INF, y l khai bo khng hp l v c tr v NaN.

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3.4.3 Lnh ph nh Lnh NEG o ngc du hiu s hc ca gi tr trong tham s v lu tr cc kt qu trong tham s OUT.

Tham s EN ENO IN

Kiu d liu Bool Bool SInt, Int, DInt, Real, LReal, constant.

Miu t Cho php ng vo Cho php ng ra Ton t u vo

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OUT

SInt, Int, DInt, Real, LReal.

Ton t u ra

Trng thi ca ENO Nu ENO = 1 : khng c li Nu ENO = 0 : kt qu gi tr nm ngoi tm gi tr ca kiu d liu. 3.4.4 Lnh tng, gim

Tng gi tr kiu s interger ln mt n v. IN_OUT + 1 = IN_OUT

Gim gi tr kiu s interger xung mt n v. IN_OUT - 1 = IN_OUT Tham s EN IN/OUT Kiu d liu I, Q, M, L, D SInt, Int, DInt, USInt, UDInt I, Q, M, L, D ENO 1 0 Miu t Cho php ng vo Ton t ng vo v ra Cho php ng ra Khng c li Kt qu gi tr nm ngoi tm gi tr ca kiu d liu

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3.4.5. Lnh gi tr tuyt i Tnh gi tr tuyt i ca mt s nguyn hoc s thc ca tham s IN v lu tr kt qu vo tham s OUT

K hiu

Tham s EN IN OUT ENO

Kiu d liu I, Q, M, L, D SInt, Int, DInt, Real, LReal SInt, Int, DInt, Real, LReal I, Q, M, L, D

Miu t Cho php ng vo Ton t ng vo Ton t ng ra Cho php ng ra

3.5.

Di chuyn Move Lnh di chuyn Move

4.5.1.

EN ENO

I, Q, M, D, L I, Q, M, D, L

Cho php ng vo Cho php ng ra

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IN OUT1

I, Q, M, D, L or constant I, Q, M, D, L

Ngun gi tr Ni chuyn n

Bn c th s dng lnh Move chuyn cc ni dung ca mt ton hng IN u vo cho hot ng ca OUT1 u ra. 3.5. 2Lnh Block Move:

Bn c th s dng lnh MOVE_BLK hot ng sao chp cc ni dung ca mt vng nh (vng nh ngun) n mt khu vc b nh xc nh khc. S lng cc gi tr c sao chp vo khu vc mc tiu c quy nh trong tham s COUNT.Tham s IN quy nh gi tr bt u sao chp ca vng nh ngun. cc hot ng sao chp c thc hin theo hng tng dn cc a ch. 4.6. Lnh CONV

Chuyn i t kiu d liu ny sang kiu d liu khc.

Tham s Kiu d liu IN Byte, Word, DWord, SInt, USInt, Int, DInt, UDInt, Real, LReal, Bcd16, Bcd23

Miu t Gi tr ng vo

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OUT

Byte, Word, DWord, SInt, USInt, Int, DInt, UDInt, Real, LReal, Bcd16, Bcd23

Gi tr sau chuyn i

3.6 Lnh ton t word logic 3.6.1 . Lnh AND:

Cng dng:lnh AND kt hp cc gi tr ng vo IN2 theo cc bit tng ng vi nhau bi AND logic v xut kt qu ti OUT. 3.6.2 Lnh OR:

Cng dng: lnh OR kt hp cc gi tr ng vo IN1 v gi tr ng vo IN2 theo cc bit tng ng vi nhau bi OR logic v xut kt qu ti OUT. Bng trng thi ca logic OR: X1 0 0 1 1 X2 0 1 0 1 Y 0 1 1 1

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3.6.2 Lnh XOR:

Cng dng: lnh XOR kt hp cc gi tr ng vo IN1 v gi tr ng vo IN2 theo cc bit tng ng vi nhau bi XOR logic v xut kt qu ti OUT. 3.7 B m tc cao (High Speed Counter) CPU cho php bn cu hnh ln n 6 b m tc cao

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3. 8. c tn hiu Analog. 3.10.1. NORM_X: Normalize

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3SCALE_X: Scale

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CHNG 4: LP TRNH PLC V LU GRAFCET 4.1 Gii thiu lp trnh lader 4.1.1 Ladder Logic (LAD) : l phng php lp trnh hnh thang, thch hp trong ngnh in cng nghip.
LAD

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4.1.2 Gii thiu lp trnh FBD (Flowchart Block Diagram) L phng php lp trnh theo s d khi, thch hp cho ngnh in t s.

4.2 Lu thut gii

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CHNG 6: MT S NG DNG N GIN 5.1. iu khin m my ng c khng ng b 3 pha roto lng sc.

a. S ng lc:

b. Thit b s dng trong mch iu khin gm c - 1 ptomt - 1 Nt m my - 1 nt dng - 1 rle nhit

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c. Bng quy nh cc a ch:

d. S kt ni PLC:

Chng trnh iu khin:

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5.2.

o chiu trc tip ng c 3 pha roto roto lng sc a. S ng lc

b. Thit b s dng 1 ptomt 1 Nt m my chiu thun 1 Nt m my chiu ngc 1 nt dng 1 rle nhit

Bng quy nh cc a ch Vo/Ra

P a g e | 46

c. S kt ni PLC:

d. Chng trnh iu khin

P a g e | 47

5.3.

Khi ng sao-tam gic

a. Mch ng lc

P a g e | 48

b. S u ni PLC

c. Bng quy nh cc a ch vo/ra

d. Chng trnh iu khin

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5.4.

Vit chng trnh thc hin bt n Q0. 0 sau khi cng tc I0. 0 bt sau

khong thi gian T0=10s.

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5.5.

Vit chng trnh n giao thng vi n xanh 20s, vng 3s, n 10s.

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5.6.

Lp trnh cho bng ti

e. M t hot ng ca h thng bng ti n ON BT1 chy a thng vo. Khi thng n S2 th BT1 dng. BT2 chy a to ri vo thng. To c m bi mt cm bin hng ngoi S1. Khi s to a vo thng 24 qu th bng ti 2 dng. Tip tc bng ti 1 chy li a

P a g e | 52

thng to thnh phm ra ngoi v ngthng to mi. H thng t ng hot ng nh trn cho n khi n OFF th dng.

f. Lu thut gii

g. s u ni plc

P a g e | 53

h. Bng tags

i. Chng trnh

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57.

Bi tp iu khin n giao thng. Gi s cn iu khin n giao thng ti ng t giao l bng 1 cng tc gt

I0.0. Trong n X1 sng 4 giy, V1 sng 2 giy, X2 sng 5 giy v V2 sng 2 giy. Quy tc chung: 1 sng (giy) = X2 sng + V2 sng = 7 (giy) 2 sng (giy) = X1 sng + V1 sng = 6 (giy) C nhng trng hp khc do yu cu thc t ca tng ng t.

P a g e | 55

Chng trnh ch hot ng khi gt SW1 ln mc 1. Vit chng trnh iu khin cc n trn chy theo gin , dng cc lnh so snh. C th thay i thi gian hot ng cc n v thc hin li chng trnh. Code :

P a g e | 56

P a g e | 57

5.8.

m sn phm t I0.0 v bo s lng sn phm theo yu cu sau: 1. Khng c sn phm n A sng. 2. T 1 n10 sn phm, n B sng. 3. T 11 n 20 sn phm, n C sng. 4. T 21 sn phm tr ln n D sng.

P a g e | 58

Bng tags

Chng trnh

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6.9.

So snh iu khin n A(Q0.0) sng t in p 3VDC n 7VDC 3VDC =>9600 7VDC=>22400

0-10VDC qui i thnh 0-32000

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5.10.
- n Start cha.

M t hot ng ca h thng trn sn

tc ng m Valve 1 v Valve 2 cho php 2 cht lng bt u vo bnh

- S nguyn l c m t trn bn v 04

- Khi bnh cha c y, cng tc d mc di chuyn ln chm S1, lm ngt 2 Valve 1 v 2, v khi ng Motor hot ng trn ln 2 cht lng. - Motor hot ng nh sau: Chy thun 5 giy, chy ngc 5 giy; chy 5 chu k thun ngc nh vy ri t ng dng. - Sau khi trn xong th Valve X m x cht lng trn ra ngoi. - Khi bnh cha x ht th cng tc d mc di chuyn xung chm S2, tc ng ng Valve X. - H thng t ng hot ng li t u cho n ht 3 m trn th t ng dng. Nu thc hin li ta phi n nt Reset. - Ngi ta c th dng h thng bt k lc no bng nt Stop.

P a g e | 61

a. Mch ng lc.

b. Mch iu khin

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c. chng trnh.

P a g e | 63

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