Giao Trinh VDK - Moi

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Gio trnh: K thut Vi iu Khin
Mc lc
Trang Li gii thiu Chng 1: Kin trc h Vi x l (VXL). 1.1. n v x l trung tm (CPU). 1.2. Qu trnh tm np lnh v thc thi lnh ca CPU. 1.3. B nh trung tm ca h VXL. 1.3.1. B nh ch c. 1.3.2. B nh truy cp ngu nhin. 1.4. Cc thit b xut/nhp. 1.5. Cu trc knh chung ca h VXL. Chng 2. B Vi iu khin AT89C51 (80C51). 2.1. Gii thiu chung. 2.2. S khc nhau gia b VXL v b Vi iu khin (VK). 2.3. S khi. 2.4. S chn tn hiu ca 80C51/AT89C51. 2.5. Chc nng cc thnh phn ca AT89C51. 2.5.1. Cc thanh ghi chc nng c bit. 2.5.1.1. Thanh ghi ACC. 2.5.1.2. Thanh ghi B. 2.5.1.3. Thanh ghi SP. 2.5.1.4. Thanh ghi DPTR . 2.5.1.5. Cc cng vo/ ra d liu (Ports 0 to 3). 2.5.1.6. Thanh ghi SBUF. 2.5.1.7. Cc Thanh ghi Timer. 2.5.1.8. Cc thanh ghi iu khin. 2.5.1.9. Thanh ghi PSW. 2.5.1.10. Thanh ghi PCON. 2.5.1.11. Thanh ghi IE. 2.5.1.12. Thanh ghi IP. 2.5.1.13. Thanh ghi TCON. 2.5.1.14. Thanh ghi TMOD. 2.5.1.15. Thanh ghi SCON. 2.5.2. Khi to thi gian v b m (Timer/Counter). 2.5.3. B nh chng trnh v b nh d liu ni tr.
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Gio trnh: K thut Vi iu Khin 29 30 30 31 31 34 34 35 38 38 39 40 40 42 42 43 43 44 45 45 46 48 50 54 57 58 59
2.5.3.1. B nh chng trnh ni tr. 2.5.3.2. B nh d liu ni tr. 2.5.3.2.1. Vng nh 128 Byte thp. 2.5.3.2.2. Vng nh dnh cho SFR. 2.5.3.2.3. Cc lnh truy cp b nh d liu ni tr. 2.5.4. B nh chng trnh v b nh d liu ngoi tr. 2.5.4.1. B nh chng trnh ngoi tr. 2.5.4.2. B nh d liu ngoi tr. 2.5.5. C ch ngt trong On-chip AT89C51. 2.5.5.1. Phn loi ngt trong On-chip. 2.5.5.2. Cc bc thc hin ngt. 2.5.5.3. Mc ngt u tin trong on-chip. 2.5.5.4. Nguyn l iu khin ngt ca AT89. 2.5.5.4.1.Cc ngt ngoi. 2.5.5.4.2. Vn hnh Single-Step. 2.5.6. Nguyn l truyn tin ni tip ca AT89C51. 2.5.6.1. Phng thc truyn tin ni tip. 2.5.6.2. Lin lc a x l . 2.5.6.3. Cc tc Baud. 2.5.6.4. S dng Timer 1 to ra cc tc Baud . 2.5.6.5. Hot ng ca ch 0. 2.5.6.6. Hot ng ca ch 1. 2.5.6.7. Hot ng ca ch 2 v 3. 2.5.7. Nguyn l khi ng ca On-chip AT89C51. 2.5.8. Mch dao ng. 2.5.9. Ch ngun gim v ch ngh. 2.5.11. Bo v chng trnh. Chng 3: Tp lnh ca h VK AT89/80C51. 3.1. Nhm lnh di chuyn d liu. 3.1.1. Lnh MOV dng Byte. 3.1.2. Lnh MOV dng Bit. 3.1.3. Lnh MOV dng Word. 3.1.4. Lnh chuyn byte m lnh. 3.1.5. Lnh chuyn d liu ra ngoi. 3.1.6. Lnh chuyn s liu vo ngn xp. 3.1.7. Lnh chuyn s liu ra khi ngn xp .
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61 61 62 63 63 64 64 65
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Gio trnh: K thut Vi iu Khin 65 66 66 66 67 68 68 69 69 70 70 71 71 72 72 73 73 74 75 75 75 76 76 77 77 78 79 79 80 81 81 82 83 83 84 84 85
3.1.8. Hon chuyn d liu. 3.1.9. Hon chuyn 4 bit thp. 3.2. Nhm lnh tnh ton s hc. 3.2.1. Lnh thc hin php cng. 3.2.2. Lnh cng c nh. 3.2.3. Lnh tr c mn. 3.2.4. Lnh tng ln 1 n v. 3.2.5. Lnh gim 1 n v. 3.2.6. Lnh tng con tr d liu. 3.2.7. Lnh thc hin php nhn. 3.2.8. Lnh thc hin php chia . 3.2.9. Hiu chnh s thp phn. 3.3. Nhm lnh tnh ton logic. 3.3.1. Lnh AND cho cc bin 1 byte. 3.3.2. Lnh AND cho cc bin 1 bit. 3.3.3. Lnh OR cho cc bin 1 byte. 3.3.4. Lnh OR cho cc bin 1 bit. 3.3.5. Lnh X-OR cho cc bin 1 byte. 3.3.6. Lnh dch tri thanh ghi A. 3.3.7. Lnh dch tri thanh ghi A cng vi c nh. 3.3.8. Lnh dch phi thanh ghi A. 3.3.9. Lnh dch phi thanh ghi A cng vi c nh. 3.3.10. Lnh tro i ni dung hai na byte ca A. 3.4. Nhm lnh r nhnh chng trnh. 3.4.1. Lnh gi tuyt i . 3.4.2. Lnh gi di. 3.4.3. Lnh quay tr li t chng trnh con. 3.4.4. Lnh quay tr li t ngt. 3.4.5. Lnh nhy gin tip. 3.4.6. Lnh nhy nu 1 bit c thit lp. 3.4.7. Lnh nhy nu 1 bit khng c thit lp. 3.4.8. Lnh nhy nu 1 bit c thit lp v xo bit . 3.4.9. Lnh nhy nu c nh c thit lp. 3.4.10. Lnh nhy nu c nh khng c thit lp. 3.4.11. Lnh nhy nu thanh ghi A bng 0. 3.4.12. Lnh nhy nu thanh ghi A khc 0. 3.4.13. Lnh nhy khi so snh 2 ton hng.
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Gio trnh: K thut Vi iu Khin 86 87 88 88 88 88 89 89
3.4.14. Lnh gim v nhy. 3.4.15. Lnh tm ngng hot ng. 3.5. Nhm lnh iu khin bin logic. 3.5.1. Lnh xo bit. 3.5.2. Lnh xo thanh ghi tch lu. 3.5.3. Lnh thit lp bit. 3.5.4. Lnh ly b ca bit. 3.5.5. Lnh ly b ca thanh ghi tch lu. Chng 4: lp trnh ng dng. 4.1. Truy cp d liu vi RAM. 4.1.1. Truy cp d liu vi RAM ni tr 4.1.2. Truy cp d liu vi RAM ngoi tr 4.2. Hm ch. 4.3. Lp trnh vi cc B Timer 4.4. Lp trnh vi cc ngt 4.4.1. Lp trnh vi cc ngt ngoi 4.4.2. Lp trnh vi cc ngt Timer 4.5. iu khin ng c 1 chiu. Ph lc A : Tra cu nhanh tp lnh Bng 1. Cc lnh ton hc ca b VK h ATMEL. Bng 2. Cc lnh chuyn i d liu truy cp vng nh d liu trong. Bng 3. Cc lnh s hc. Bng 4. Cc lnh i s. Bng 5. Cc lnh chuyn i d liu truy cp RAM ngoi. Bng 6. Cc lnh chuyn Byte m lnh. Bng 7. Cc lnh nhy khng iu kin trong Flash Microcontrollers. Bng 8. Cc lnh nhy c iu kin. Ph lc B : cc h thng s 1. Bng chuyn i h thp phn/nh phn 2. Bng m thp lc phn 3. H thng s c du TI liu tham kho.
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Li gii thiu
Khoa hc k thut ang ngy cng pht trin rt mnh m, cc cng ngh mi thuc cc lnh vc khc nhau cng nh ra i nhm p ng nhu cu ca x hi v k thut Vi iu khin cng nm trong s . Hin nay k thut Vi iu khin c ging dy rng ri cc trng i hc v Cao ng trong c nc nhm p ng nhu cu v iu khin, o lng v iu chnh ca cc dy chuyn cng nghip. Qua qu trnh tham gia ging dy ti trng i hc SPKT Hng yn, tc gi tp trung nghin cu, tng hp v bin son gio trnh k thut Vi iu khin nhm phc v cng vic ging dy lnh vc ny ti trng. Ton b ni dung gio trnh c chia lm 2 phn. Phn 1 bao gm cc kin thc c bn v phn cng v cc tp lnh ca h Vi iu khin 80C51/ AT89C51. phn 2 tc gi tp trung trnh by phn cng h Vi iu khin 80C52/ AT89S8252 v k thut lp trnh bng hp ng. i tng ca quyn gio trnh ny l cc sinh vin ngnh in, in t, C in t, Cng ngh thng tin. Tuy nhin tip thu tt ni dung t quyn gio trnh ny, ngi hc cn c kin thc v k thut s, k thut mch in t v bit qua mt ngn ng lp trnh cp cao nh Pascal, C Mc d rt c gng trong qu trnh bin son, nhng do trnh v thi gian cn b hn ch nn chc chn quyn gio trnh ny khng trnh khi nhng thiu st, rt mong nhn c nhng kin ng gp, ph bnh ca bn c.
Hng yn, thng 10 nm 2005
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Chng 1. Kin trc h VXL

CPU Registers CU
INPUT
PC
Interface
OUTPUT
ALU
IR
Interface
ROM RAM
Program Memory Data Memory
Hnh1.1. Khi qut chung v h VXL
1.1. CPU(Central Processing Unit):

B vi x l (VXL) l thut ng c bt ngun t tn gi ting Anh l Microprocessor (MP) hoc central procesing unit (CPU). Trong mi h VXL, CPU lun l thnh phn quan trng nht, n qun l tt c cc hot ng ca h VXL v thc hin cc thao tc trn d liu. Hu ht cc CPU ch bao gm mt tp cc mch Logic thc hin lin tc 2 thao tc: tm np lnh v thc thi lnh. CPU c kh nng hiu v thc thi cc lnh da trn mt tp cc m nh phn, trong mi mt m thc hin mt thao tc no . Cc lnh ny bao gm: - Nhm lnh di chuyn d liu (Mov,...). - Nhm lnh s hc (Mul, Div, Add, Subb,...). - Nhm lnh Logic (ANL, ORL, CPL, XRL,...). - Nhm lnh r nhnh chng trnh (Jmp, Call, ...). - Nhm lnh iu khin bin Logic (Setb, Clr,...).... Cc nhm lnh trn c biu th bi 1 tp cc m nh phn v gi l tp lnh. Mi b VXL (CPU) thng bao gm: - Cc thanh ghi ni (Registers): c nhim v lu gi tm thi cc thng tin, d liu. - n v s hc logic (Arithmetic Logic Unit - ALU): Thc hin cc thao tc trn cc thng tin hay d liu c lu gi tm thi trong thanh ghi ni.
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- n v iu khin (Control Unit - CU): C nhim v gii m lnh v iu khin vic thc hin cc thao tc, ng thi thit lp cc hot ng cn thit thc hin cc thao tc . - Thanh ghi lnh (Instruction Register - IR): Lu gi m nh phn ca lnh c thc thi. - B m chng trnh (Program Counter - PC): Lu gi i ch ca lnh k tip trong b nh cn c thc thi.
1.2. Qu trnh tm np lnh v thc thi lnh ca CPU:

+ Vic tm np mt lnh t RAM h thng l mt trong nhng thao tc c bn nht m CPU thc hin. Qu trnh tm np c thc hin theo cc bc sau: Ni dung ca PC c gi ln knh a ch. Tn hiu iu khin READ c xc lp (chuyn sang trng thi tch cc). D liu (m lnh) c c t RAM v gi i trn knh d liu. M lnh c cht vo thanh ghi lnh bn trong CPU. Ni dung ca PC c tng ln chun b tm np lnh k tip t b nh.
Address Bus
CPU
PC
IR opcode
Data Bus RAM n+2 n+1 opcode n n-1
Clock Read
Control Bus
Hnh 1.2. Hot ng ca Bus cho chu k tm np lnh
+ Giai on thc thi lnh bao gm vic gii m cc m lnh v to ra cc tn hiu iu khin vic xut nhp gia cc thanh ghi ni vi ALU, ng thi thng bo ALU thc hin thao tc c xc nh.
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1.3. B nh trung tm ca h Vi x l:
B nh trung tm l b phn rt quan trng i vi mi h VXL, n l tp hp cc thanh ghi thng tin vi s lng ln. Chc nng c bn ca b nh l trao i v lu tr thng tin.
1.3.1. B nh ch c (Read Only Memory - ROM): 1.3.1.1. ROM c bn:

ROM dng lu tr chng trnh iu hnh (Monitor) ca h VXL. Chng trnh ny s quy nh mi hot ng ca h VXL. B VXL s cn c vo cc lnh cha trong chng trnh iu khin h VXL thc hin cc chc nng, nhim v c n nh trong lnh. Ni cch khc, h VXL s thc hin mt cch trung thc thut ton m ngi thit k phn mm xy dng v ci t vo ROM ca h. Ngoi ra, ROM trong h VXL cn dng lu tr cc bng biu, tham s ca h thng m trong qu trnh hot ng khng c thay i nh: bng a ch cng giao tip, cc bng tra cu s liu, cc b m cn s dng trong h. ROM cng c qun l theo phng thc ma trn im, n c nhiu chng loi khc nhau: ROM, PROM, EPROM, EEPROM, ROM l b nh c nh c cu trc n gin nht. Ni dung ca n do nh sn xut ch to, ngi s dng khng th thay i ni dung ny c na.
1.3.1.2. PROM (Programmable ROM - ROM c kh nng lp trnh c):

c im chung: Ni dung ca PROM do nh sn xut hoc ngi thit k h VXL np vo nhng ch oc 1 ln. Sau khi np xong ni dung ny khng th thay i c na.
1.3.1.3. EPROM (Eraseable PROM ROM np/xo c nhiu ln):

EPROM l b nh c nh c cu trc c bit. Ni dung ca n do nh sn xut hay ngi thit k h VXL np vo v c th np/xo nhiu ln. Ngi ta to ra 1 bit thng tin trong EPROM da trn nguyn tc lm vic ca Transistor trng c cc ca cch ly knh cm ng (MOSFET knh cm ng).
1.3.1.4. EEPROM (Electrical EPROM ROM c kh nng lp trnh v xo c bng in).
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1.3.2. B nh truy cp ngu nhin (Random Acess Memory - RAM):

RAM l b nh c th ghi v c c, thng tin trn RAM s b mt khi mt ngun cung cp. Theo phng thc lu tr thng tin, RAM c chia thnh 2 loi c bn: RAM tnh v RAM ng. RAM tnh: C th lu tr thng tin lu tu min l c cung cp in nng - tt c cc loi phn t nh bng Trig u thuc loi ny. RAM ng: Ch lu c thng tin trong 1 khong thi gian nht nh. Mun ko di thi gian ny cn c phng thc lm ti li thng tin trong phn t nh RAM. Phn t nh ca RAM ng n gin nht l mt linh kin in dung - t din. S dng RAM ng c phc tp nhng v cu trc nh li n gin, tiu tn t nng lng, tng mt b nh v i khi cn lm tng c tc lm vic ca b nh. Cu trc mch in ca cc b nh RAM rt a dng c v cng ngh ch to chng (TTL, MOS, ) v cc yu cu s dng chng nh cc yu cu v ghp ni, tc lm vic, mt linh kin v dung lng cn thit
1.4. Cc thit b xut/nhp:

Cc thit b xut/nhp hay cc thit b ngoi vi kt hp vi cc mch giao tip (Interface) s to ra cc ng truyn thng gia h VXL vi th gii bn ngoi. Tuy nhin trao i thng tin gia h VXL vi cc thit b ngoi vi, cn c cc phng php iu khin thch hp nh: - iu khin vo/ra bng chng trnh. - iu khin vo/ra bng ngt. - iu khin vo/ra bng phn cng. Ni dung ny s c xt k cc chng sau.
1.5. Cu trc knh chung ca h VXL:

Knh (Bus) l tp hp cc ng thng tin c cng mc ch. CPU c th giao tip c vi cc b phn khc trong h VXL theo yu cu, mi h VXL cn s dng 3 knh nh sau: - Knh a ch (Adress Bus). - Knh d liu (Daten Bus). - Knh iu khin (Control Bus). thc hin thao tc c hoc ghi, CPU xc nh r v tr (a ch) ca d liu (hoc lnh) bng cch t a ch ln knh a ch, sau kch hot tn hiu Read hoc Write trn knh iu khin ch ra thao tc l c hay ghi.
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Nu kch hot tn hiu iu khin Read, thao tc c ly 1 byte d liu t b nh v tr xc nh v t byte ny ln knh d liu. CPU s c d liu v ct d liu vo 1 trong cc thanh ghi ni ca CPU. Nu kch hot tn hiu iu khin Write, CPU s thc hin thao tc ghi bng cch xut d liu ln knh d liu. Nh vo tn hiu iu khin, b nh nhn bit c y l thao tc ghi v lu d liu vo v tr c xc nh. Knh d liu cho php trao i thng tin gia CPU v b nh, cng nh gia CPU vi thit b ngoi vi. Thng thng cc h VXL dnh hu ht thi gian cho vic di chuyn d liu, a s cc thao tc di chuyn d liu xy ra gia 1 thanh ghi ca CPU vi ROM v RAM ngoi. Do ln ca knh d liu nh hng rt ln ti hiu sut ca h VXL. Nu b nh ca h thng rt ln v CPU c kh nng tnh ton cao, nhng vic truy xut d liu di chuyn d liu gia b nh v CPU thng qua knh d liu li b nghn th hin tng nghn c chai ny chnh l hu qu ca rng knh d liu khng ln. khc phc hin tng ny, cn tng ng tn hiu cho knh d liu.
D A T E N B U S 8 Bit
CPU
Control Bus
ROM
A D R E S S B U S 16 Bit
RAM
I/O
Hnh 1.3. Cu trc knh chung ca h thng VXL Nh hnh 1.3, knh d liu l knh 2 chiu, cn knh a ch l knh 1 chiu. Cc thng tin v a ch lun c cung cp bi CPU, trong khi cc d liu di chuyn theo c 2 hng tu thuc vo thao tc thc hin l c hay ghi. Thut ng d liu c s dng theo ngha tng qut: thng tin di chuyn trn knh d
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liu c th l lnh ca chng trnh, a ch theo sau lnh hoc d liu c s dng bi chng trnh. Knh iu khin l tp hp cc tn hiu, mi tn hiu c mt vai tr ring trong vic iu khin c trt t hot ng ca h thng. Cc tn hiu iu khin c cung cp bi CPU ng b vic di chuyn thng tin trn cc knh a ch v d liu. Cc b VXL thng c 3 tn hiu iu khin: Read, Write, Clock. Tuy nhin tu vo yu cu c th cng nh cu trc phn cng ca tng h VXL m s lng tn hiu iu khin c th khc nhau.
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Chng 2: B Vi iu khin AT89C51 2.1. Gii thiu chung:

Vi iu khin (VK) l mt h Vi x l (VXL) c t chc trong mt chip. N bao gm: B VXL B nh chng trnh (ROM/EPROM/EEPROM/FLASH). B nh d liu (RAM). Cc thanh ghi chc nng, cc cng I/O, c ch iu khin ngt v truyn tin ni tip. Cc b thi gian dng trong lnh vc chia tn v to thi gian thc. ... B VK c th c lp trnh iu khin cc thit b thng tin, vin thng, thit b o lng, thit b iu chnh cng nh cc ng dng trong cng ngh thng tin v k thut iu khin t ng. C th xem b VK nh mt h VXL On-chip, i vi AT89C51, n c y chc nng ca mt h VXL 8 bit, oc iu khin bi mt h lnh, c s lnh mnh, cho php lp trnh bng hp ng (Assembly).
2.2. S khc nhau gia b VXL v b VK.

VXL Phn cng CPU n chp. VK CPU, RAM, ROM, Timers, SFR, mch giao tip, h thng ngt v c ch iu khin ngt.. S dng cc lnh iu khin xut nhp, c th truy xut d liu dng Bit hoc Byte. Cc nhm lnh chnh: Chuyn d liu, iu khin bin logic, r nhnh chng trnh, tnh ton s hc v logic. Trong cc h thng iu khin, o lng v iu chnh
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Tp lnh
S dng cc tp lnh bao qut, mnh v kiu nh a ch. Cc lnh ny c th truy xut d liu ln, thc hin dng 1/2 Byte, Byte, Word, Double Word.
ng dng
Trong cc h my vi tnh.
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2.3. S khi.
External Interrupts Interrupt Control 4K FLASH 128 Bytes RAM Timer 1 Timer 0 Counter Inputs
CPU
OSC
Bus Control /WR /RD
4 I/O Ports
Serial Ports TxD RxD
P0 P2 P1 P3 Address/Data
Hnh 2.1. S khi h VK AT89C51 B VK 8 bit AT89C51 hot ng tn s 12 MHz, vi b nh ROM 4Kbyte, b nh RAM 128 Byte c tr bn trong v c th m rng b nh ra ngoi. b VK ny cn c 4 cng 8 bit (P0P3) vo/ ra 2 chiu giao tip vi thit b ngoi vi. Ngoi ra, n cn c: - CPU - 2 b inh thi 16 bit (Timer 0 v Timer 1) - Mch giao tip ni tip. - B x l bit (thao tc trn cc bit ring r). - H thng iu khin v x l ngt. - Cc knh iu khin/ d liu/ a ch. - Cc thanh ghi chc nng c bit (SFR). Tuy nhin, tu thuc vo tng h VK ca tng hng sn xut khc nhau m tnh nng cng nh phm vi ng dng ca mi b VK l khc nhau, v chng c th hin trong cc bng thng k sau:
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ROMLESS 4K ROM 4K ROM 4K EPROM 4K EPROM ROMLESS 8K ROM 8K EPROM ROMLESS 4K ROM 4K ROM 4K EPROM ROMLESS 8K ROM 8K EPROM 16K ROM 16K EPROM

Tc (MHz)
12 12 12 12 12 12 12 12 12,16 12,16 12,16 12,16,20,24 12,16,20,24 12,16,20,24 12,16,20,24 12,16,20,24 12,16,20,24
RAM (bytes)
128 128 128 128 128 256 256 256 128 128 128 128
Chn I/O
32 32 32 32 32 32 32 32 32 32 32 32 32
Timer/ Counter
2 2 2 2 2 3 3 3 2 2 2 2
UART
Ngun ngt
5 5 5 5 5 6 6 6 5 5 5 5
8051
8031AH 8051AH 8051AHP 8751H 8751BH
1 1 1 1 1 1 1 1 1 1 1 1
8052
8032AH 8052AH 8752BH
80C51
80C31BH 80C51BH 80C31BHP 87C51 8xC52/54/58 80C32 80C52 87C52 80C54 87C54 H VK 80C58 87C58 8xL52/54/58 80L52 87L52 80L54 87L54 80L58 87L58
ROM (bytes)
32K ROM 32K EPROM
256 256 256 256 256 RAM (bytes) 256 256 256 256 256 256 256 256
Tc (MHz)
12,16,20,24 12,16,20,24 12,16,20 12,16,20 12,16,20 12,16,20 12,16,20 12,16,20
32 32 32 32 32 Chn I/O 32 32 32 32 32 32 32 32
3 3 3 3 3 Timer/ Counter 3 3 3 3 3 3 3 3
1 1 1 1 1
6 6 6 6 6 Ngun UART ngt 1 6 1 6 1 1 1 1 1 1 6 6 6 6 6 6
8K ROM 8K OTP ROM 16K ROM 16K OTP ROM 32K ROM 32K OTP ROM
Bng 2.1. Cc thng s ca cc h VK thuc hng Intel (MSC 51)

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Gio trnh: K thut Vi iu Khin B nh d liu (Bytes) 64 RAM 128 RAM 128 RAM 256 RAM 256 RAM 256 RAM + 2K EEPROM 256 RAM Timer 16 bit 1 2 2 3 3 3 3 Cng ngh CMOS CMOS CMOS CMOS CMOS CMOS CMOS
H VK AT89C1051 AT89C2051 AT89C51 AT89C52 AT89C55 AT89S8252 AT89S53
B nh chng trnh(Bytes) 1K Flash 2K Flash 4K Flash 8K Flash 20K Flash 8K Flash 12K Flash
Bng 2.2. Cc thng s ca cc h VK thuc hng Atmel Trong khun kh ti liu ny, tc gi s tp trung trnh by cu trc phn cng ca h VK AT89C51 thuc hng Atmel.
2.4. S chn tn hiu ca 80C51/AT89C51.

P1.0 -P1.1-P1.2-P1.3-P1.4-P1.5-P1.6-P1.7-RST-(RxD) P3.0-(TxD) P3.1-(/INT0) P3.2-(/INT1) P3.3-(T0) P3.4-(T1) P3.5-(/Wr) P3.6-(/Rd) P3.7-XTAL2-XTAL1-GND-1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 24 23 22 21 --Vcc --P0.0 (AD0) --P0.1 (AD1) --P0.2 (AD2) --P0.3 (AD3) --P0.4 (AD4) --P0.5 (AD5) --P0.6 (AD6) --P0.7 (AD7) --/EA/Vpp --ALE/(/PROG) --/PSEN --P2.7 (A15) --P2.6 (A14) --P2.5 (A13) --P2.4 (A12) --P2.3 (A11) --P2.2 (A10) --P2.1 (A9) --P2.0 (A8)
Hnh 2.2. S chn IC 80C51/AT89C51
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Chc nng ca cc chn tn hiu nh sau: - P0.0 n P0.7 l cc chn ca cng 0. - P1.0 n P1.7 l cc chn ca cng 1. - P2.0 n P2.7 l cc chn ca cng 2 - P3.0 n P3.7 l cc chn ca cng 3 - RxD: Nhn tn hiu kiu ni tip. - TxD: Truyn tn hiu kiu ni tip. - /INT0: Ngt ngoi 0. - /INT1: Ngt ngoi 1. - T0: Chn vo 0 ca b Timer/Counter 0. - T1: Chn vo 1 ca b Timer/Counter 1. - /Wr: Ghi d liu vo b nh ngoi. - /Rd: c d liu t b nh ngoi. - RST: Chn vo Reset, tch cc mc logic cao trong khong 2 chu k my. - XTAL1: Chn vo mch khuych a dao ng - XTAL2: Chn ra t mch khuych a dao ng. - /PSEN : Chn cho php c b nh chng trnh ngoi (ROM ngoi). - ALE (/PROG): Chn tn hiu cho php cht a ch truy cp b nh ngoi, khi On-chip xut ra byte thp ca a ch. Tn hiu cht c kch hot mc cao, tn s xung cht = 1/6 tn s dao ng ca b VK. N c th c dng cho cc b Timer ngoi hoc cho mc ch to xung Clock. y cng l chn nhn xung vo np chng trnh cho Flash (hoc EEPROM) bn trong On-chip khi n mc thp. - /EA/Vpp: Cho php On-chip truy cp b nh chng trnh ngoi khi /EA=0, nu /EA=1 th On-chip s lm vic vi b nh chng trnh ni tr (trng hp cn truy cp vng nh ln hn dung lng b nh chng trnh ni tr, th b nh chng trnh ngoi cng c s dng). Khi chn ny c cp ngun in p 12V (Vpp) th On-chip m nhn chc nng np chng trnh cho Flash bn trong n. - Vcc: Cung cp dng ngun cho On-chip (+ 5V). - GND: ni Mass.
2.5. Chc nng cc thnh phn ca AT89C51:

2.5.1. Cc thanh ghi chc nng c bit.
SFR m nhim cc chc nng khc nhau trong On-chip. Chng nm RAM bn trong On-chip, chim vng khng gian nh 128 Byte c nh a ch t 80h n FFh. Cu trc ca SFR bao gm cc chc nng th hin bng 2.3 v bng 2.4.
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Gio trnh: K thut Vi iu Khin Ni dung LSB

ET1 PT1 RS0 GATE IE1 TB8 GF1 /SS T0 EX1 PX1 OV C/(/T) IT1 RB8 GF0 MOSI T1 ET0 PT0 M1 IE0 TI PD MISO /WR EX0 PX0 P M0 IT0 RI IDL SCK /RD
Thanh ghi
IE IP PSW TMOD TCON SCON PCON P1 P3
MSB
EA CY GATE TF1 SM0 SMOD T2 RXD AC C/(/T) TR1 SM1 T2EX TXD /INT0 /INT1 ET2 PT2 FO M1 TF0 SM2 ES PS RS1 M0 TR0 REN -
Bng 2.3. Chc nng ring ca tng thanh ghi trong SFR
Hnh 2.3. S khi ca AT89xx

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Gio trnh: K thut Vi iu Khin Address 0E0h 0F0h 0D0h 81h 82h 83h 80h 90h Address 0A0h 0B0h 0B8h 0A8h 89h 88h 8Ch 8Ah 8Dh 8Bh 98h 99h 87h Reset Values 00000000b 00000000b 00000000b 00000111b 00000000b 00000000b 11111111b 11111111b Reset Values 11111111b 11111111b xxx00000b 0xx00000b 00000000b 00000000b 00000000b 00000000b 00000000b 00000000b 00000000b indeterminate 0xxx0000b
Symbol Name * ACC Thanh ghi tch lu *B Thanh ghi B * PSW T trng thi chng trnh SP Con tr ngn xp DP0L Byte cao ca con tr d liu 0 DP0H Byte thp ca con tr d liu 0 * P0 Cng 0 * P1 Cng 1 Symbol Name * P2 Cng 2 * P3 Cng 3 * IP TG iu khin ngt u tin * IE TG iu khin cho php ngt TMOD iu khin kiu Timer/Counter * TCON TG iu khin Timer/Counter TH0 Byte cao ca Timer/Counter 0 TL0 Byte thp ca Timer/Counter 0 TH1 Byte cao ca Timer/Counter 1 TL1 Byte thp ca Timer/Counter 1 * SCON Serial Control SBUF Serial Data Buffer PCON Power Control * : c th nh a ch bit, x: khng nh ngha
Bng 2.4. a ch, ngha v gi tr ca cc SFR sau khi Reset 2.5.1.1. Thanh ghi ACC: l thanh ghi tch lu, dng lu tr cc ton hng v kt qu ca php tnh. Thanh ghi ACC di 8 bits. Trong cc tp lnh ca On-chip, n thng c quy c n gin l A. 2.5.1.2. Thanh ghi B : Thanh ghi ny c dng khi thc hin cc php ton nhn v chia. i vi cc lnh khc, n c th xem nh l thanh ghi m tm thi. Thanh ghi B di 8 bits. N thng c dng chung vi thanh ghi A trong cc php ton nhn hoc chia.
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2.5.1.3. Thanh ghi SP: Thanh ghi con tr ngn xp di 8 bit. SP cha a ch ca d liu hin ang hin hnh nh ca ngn xp hay ni khc l SP lun tr ti ngn nh s dng cui cng (gi l nh ngn xp). Gi tr ca n c t ng tng ln khi thc hin lnh PUSH trc khi d liu c lu tr trong ngn xp. SP s t ng gim xung khi thc hin lnh POP. Ngn xp c th t bt c ni no trong RAM on-chip, nhng sau khi khi ng li h thng th con tr ngn xp mc nh s tr ti a ch khi u l 07h, v vy ngn xp s bt u t a ch 08h. Ta cng c th nh con tr ngn xp ti a ch mong mun bng cc lnh di chuyn d liu thng qua nh a ch tc thi. Ni thm v ngn xp: Ngn xp l mt vng ca b nh RAM dng lu tr thng tin tm thi (c th l d liu hoc a ch), l do cn c khng gian lu tr ny l v s lng thanh ghi c hn. Ngn xp chim 1 vng nh c a ch t 08h 1Fh tc l ton b 3 bank thanh ghi1,2,3 (gm24 Byte). Nu trong 1 chng trnh m cn phi c ngn xp > 24 Byte th phi gn a ch cho ngn xp ln vng nh c a ch t 30h tr ln. Nh rng khi reset h thng th gi tr ca SP = 07h. 2.5.1.4. Thanh ghi DPTR: Thanh ghi con tr d liu (16 bit) bao gm 1 thanh ghi byte cao (DPH-8bit) v 1 thanh ghi byte thp (DPL-8bit). DPTR c th c dng nh thanh ghi 16 bit hoc 2 thanh ghi 8 bit c lp. Thanh ghi ny c dng truy cp RAM ngoi. 2.5.1.5. Ports 0 to 3: P0, P1, P2, P3 l cc cht ca cc cng 0, 1, 2, 3 tng ng. Mi cht gm 8 bit. Khi ghi mc logic 1 vo mt bit ca cht, th chn ra tng ng ca cng mc logic cao. Cn khi ghi mc logic 0 vo mi bit ca cht th chn ra tng ng ca cng mc logic thp. Khi cc cng m nhim chc nng nh cc u vo th trng thi bn ngoi ca cc chn cng s c gi bit cht tng ng. Tt c 4 cng ca on-chip u l cng I/O hai chiu, mi cng u c 8 chn ra, bn trong mi cht bit c b Pullup-tng cng do nng cao kh nng ni ghp ca cng vi ti (c th giao tip vi 4 n 8 ti loi TTL). 2.5.1.6. Thanh ghi SBUF: m d liu ni tip gm 2 thanh ghi ring bit, mt thanh ghi m pht v mt thanh ghi m thu. Khi d liu c chuyn ti SBUF, n s i vo b m pht, v c gi y ch bin thnh dng truyn tin ni tip. Khi d liu c truyn i t SBUF, n s i ra t b m thu. 2.5.1.7. Cc Thanh ghi Timer: Cc i thanh ghi (TH0, TL0), (TH1, TL1) l cc thanh ghi m 16 bit tng ng vi cc b Timer/Counter 0 v 1.
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2.5.1.8. Cc thanh ghi iu khin: Cc thanh ghi chc nng c bit: IP, IE, TMOD, TCON, SCON, v PCON bao gm cc bit trng thi v iu khin i vi h thng ngt, cc b Timer/Counter v cng ni tip. Chng s c m t phn sau. 2.5.1.9. Thanh ghi PSW: T trng thi chng trnh dng cha thng tin v trng thi chng trnh. PSW c di 8 bit, mi bit m nhim mt chc nng c th. Thanh ghi ny cho php truy cp dng mc bit. CY AC FO RS1 RS0 OV P * CY: C nh. Trong cc php ton s hc, nu c nh t php cng bit 7 hoc c s mn mang n bit 7 th CY c t bng 1. * AC: C nh ph (i vi m BCD). Khi cng cc gi tr BCD, nu c mt s nh c to ra t bit 3 chuyn sang bit 4 th AC c t bng 1. Khi gi tr c cng l BCD, lnh cng phi c thc hin tip theo bi lnh DA A (hiu chnh thp phn thanh cha A) a cc kt qu ln hn 9 v gi tr ng. * F0: C 0 (C hiu lc vi cc mc ch chung ca ngi s dng) * RS1: Bit 1 iu khin chn bng thanh ghi. * RS0: Bit 0 iu khin chn bng thanh ghi. Lu : RS0, RS1 c t/xo bng phn mm xc nh bng thanh ghi ang hot ng (Chn bng thanh ghi bng cch t trng thi cho 2 bit ny) RS1 (PSW. 4) RS0 (PSW. 3) 0 0 Bank 0 0 1 Bank 1 1 0 Bank 2 1 1 Bank 3 Bng 2.5. Chn bng thanh ghi * OV: C trn. Khi thc hin cc php ton cng hoc tr m xut hin mt trn s hc, th OV c t bng 1. Khi cc s c du c cng hoc c tr, phn mm c th kim tra OV xc nh xem kt qu c nm trong tm hay khng. Vi php cng cc s khng du, OV c b qua. Kt qu ln hn +128 hoc nh hn -127 s t OV=1. * -: Bit dnh cho ngi s dng t nh ngha(Nu cn).
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* P: C chn l. c t ng t/ xo bng phn cng trong mi chu trnh lnh ch th s chn hay l ca bit 1 trong thanh ghi tch lu. S cc bit 1 trong A cng vi bit P lun lun l s chn. 2.5.1.10. Thanh ghi PCON: Thanh ghi iu khin ngun. GF1 GF0 PD IDL SMOD * SMOD: Bit to tc Baud gp i. Nu Timer 1 c s dng to tc baud v SMOD=1, th tc Baud c tng ln gp i khi cng truyn tin ni tip c dng bi cc kiu 1, 2 hoc 3. * -: Khng s dng, cc bit ny c th c dng cc b VXL trong tng lai. Ngi s dng khng c php t nh ngha cho cc bit ny. * GF0, GF1: C dng cho cc mc ch chung (a mc ch). * PD: bit ngun gim. t bit ny mc tch cc vn hnh ch ngun gim trong AT89C51. Ch c th ra khi ch bng Reset. * IDL: bit chn ch ngh. t bit ny mc tch cc vn hnh kiu Idle (Ch khng lm vic) trong AT89C51. Lu : Nu PD v IDL cng c kch hot cng 1 lc mc tch cc, th PD c u tin thc hin trc. Ch ra khi ch bng 1 ngt hoc Reset li h thng. 2.5.1.11. Thanh ghi IE: Thanh ghi cho php ngt EA ET2 ES ET1 EX1 ET0 EX0
* EA: Nu EA=0, khng cho php bt c ngt no hot ng. Nu EA=1, mi ngun ngt ring bit c php hoc khng c php hot ng bng cch t hoc xo bit Enable ca n. * -: Khng dng, ngi s dng khng nn nh ngha cho Bit ny, bi v n c th c dng cc b AT89 trong tng lai. * ET2: Bit cho php hoc khng cho php ngt b Timer 2. * ES: Bit cho php hoc khng cho php ngt cng ni tip (SPI v UART). * ET1: Bit cho php hoc khng cho php ngt trn b Timer 1 * EX1: Bit cho php hoc khng cho php ngt ngoi 1. * ET0: Bit cho php hoc khng cho php ngt trn b Timer 0
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* EX0: Bit cho php hoc khng cho php ngt ngoi 0. 2.5.1.12. Thanh ghi IP: Thanh ghi u tin ngt. PT2 PS PT1 PX1 PT0
PX0
* - : Khng dng, ngi s dng khng nn ghi 1 vo cc Bit ny. * PT2: Xc nh mc u tin ca ngt Timer 2. * PS: nh ngha mc u tin ca ngt cng ni tip. * PT1: nh ngha mc u tin ca ngt Timer 1. * PX1: nh ngha mc u tin ca ngt ngoI 1. * PT0: nh ngha mc u tin ca ngt Timer 0. * PX0: nh ngha mc u tin ca ngt ngoI 0. 2.5.1.13. Thanh ghi TCON : Thanh ghi iu khin b Timer/Counter TF1 TR1 TF0 TR0 IE1 IT1 IE0 IT0 * TF1: C trn Timer 1. c t bi phn cng khi b Timer 1 trn. c xo bi phn cng khi b vi x l hng ti chng trnh con phc v ngt. * TR1: Bit iu khin b Timer 1 hot ng. c t/xo bi phn mm iu khin b Timer 1 ON/OFF * TF0: C trn Timer 0. c t bi phn cng khi b Timer 0 trn. c xo bi phn cng khi b vi x l hng ti chng trnh con phc v ngt. * TR0: Bit iu khin b Timer 0 hot ng. c t/xo bi phn mm iu khin b Timer 0 ON/OFF. * IE1: C ngt ngoi 1. c t bi phn cng khi sn xung ca ngt ngoi 1 c pht hin. c xo bi phn cng khi ngt c x l. * IT1: Bit iu khin ngt 1 to ra ngt ngoi. c t/xo bi phn mm. * IE0: C ngt ngoi 0. c t bi phn cng khi sn xung ca ngt ngoi 0 c pht hin. c xo bi phn cng khi ngt c x l. * IT0: Bit iu khin ngt 0 to ra ngt ngoi. c t/xo bi phn mm. 2.5.1.14. Thanh ghi TMOD: Thanh ghi iu khin kiu Timer/Counter GATE C/(/T) M1 M0 GATE C/(/T) M1 M0 Dnh cho Timer 1 Dnh cho Timer 0 * GATE: Khi GATE=1 v TRx =1, b TIMER/COUTERx hot ng ch khi chn INTx mc cao. Khi GATE=0, b TIMER/COUNTERx s hot ng ch khi TRx=1.
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* C/(/T): Bit ny cho php chn chc nng l Timer hay Counter. - Bit ny =0 th thc hin chc nng Timer - Bit ny =1 th thc hin chc nng Counter * M0, M1: Bit chn Mode, xc nh trng thi v kiu Timer/Counter: - M1=0, M0=0: Chn kiu b Timer 13 bit. Trong THx di 8 bit, cn TLx di 5 bit. - M1=0, M0=1: Chn kiu b Timer 16 bit. THx v TLx di 16 bit c ghp tng. - M1=1, M0=0: 8 bit Auto reload. Cc thanh ghi t ng np li mi khi b trn. Khi b Timer b trn, THx di 8 bit c gi nguyn gi tr, cn gi tr np li c a vo TLx. - M1=1, M0=1: Kiu phn chia b Timer. TL0 l 1 b Timer/Counter 8 bit, c iu khin bng cc bit iu khin b Timer 0, Cn TH0 ch l b Timer 8 bit, c iu khin bng cc bit iu khin Timer 1. - M1=1, M0=1: Timer/Counter 1 Stopped 2.5.1.15. Thanh ghi SCON: SM0 SM1 SM2
REN
TB8
RB8
TI
RI
SCON l thanh ghi trng thi v iu khin cng ni tip. N khng nhng cha cc bit chn ch , m cn cha bit d liu th 9 dnh cho vic truyn v nhn tin (TB8 v RB8) v cha cc bit ngt cng ni tip. * SM0, SM1: L cc bit cho php chn ch cho cng truyn ni tip. SM0 0 0 1 1 SM1 0 1 0 1 Mode 0 1 2 3 c im Thanh ghi dch 8 bit UART 9 bit UART 9 bit UART Tc Baud Fosc /12 C th thay i (c t bi b Timer) Fosc /64 hoc Fosc /32 C th thay i (c t bi b Timer)
Bng 2.6. Chn Mode trong SCON * SM2: Cho php truyn tin a x l, th hin Mode 2 v 3. ch 2 hoc 3, nu t SM2 = 1 th RI s khng c kch hot nu bit d liu th 9 (RB8) nhn
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c gi tr bng 0. Mode 1, nu SM2=1 th RI s khng c kch hot nu bit dng c hiu lc khng c nhn. ch 0, SM2 nn bng 0 * REN: Cho php nhn ni tip. c t hoc xo bi phn mm cho php hoc khng cho php nhn. * TB8: L bit d liu th 9 m s c truyn Mode 2 v 3. c t hoc xo bi phn mm. * RB8: L bit d liu th 9 c nhn Mode 2 v 3. Mode 1, nu SM2=0 th RB8 l bit dng c nhn. Mode 0, RB8 khng c s dng. * TI: C ngt truyn. c t bi phn cng ti cui thi im ca bit th 8 trong Mode 0, hoc u thi im ca bit dng trong cc Mode khc. bt k qu trnh truyn ni tip no, n cng phi c xo bng phn mm. * RI: C ngt nhn. c t bi phn cng ti cui thi im ca bit th 8 trong Mode 0, hoc gia thi im ca bit dng trong cc Mode khc. bt k qu trnh nhn ni tip no (tr trng hp ngoi l, xem SM2), n cng phi c xo bng phn mm.
2.5.2. Khi to thi gian v b m (Timer/Counter).

On-chip AT89C51 c 2 thanh ghi Timer/Counter di 16 bit, l: Timer 0 v Timer 1. Trong On-chip AT89C52, ngoi Timer 0 v Timer 1 n cn c thm b Timer 2. C 3 b Timer ny u c th c iu khin thc hin chc nng thi gian hay b m, thng qua thanh ghi TMOD. Khi thanh ghi Timer/Counter lm vic kiu Timer, th sau mi chu k my ni dung trong thanh ghi c gia tng thm 1 n v. V vy thanh ghi ny m s chu k my. Mt chu k my c 12 chu k dao ng, do tc m ca thanh ghi l 1/12 tn s dao ng. Khi thanh ghi Timer/Counter lm vic kiu Counter, xung nhp bn ngoi c a vo m T0 hoc T1. Ni dung thanh ghi c tng ln khi c s chuyn trng thi t 1 v 0 ti chn u vo ngoi T0 hoc T1. Xung nhp cc u vo ngoi c ly mu ti thi im S5P2 ca mi chu k my. Khi qu trnh ly mu pht hin ra mc cao 1 chu k v mc thp chu k tip theo, th b m c tng ln. Gi tr mi ca b m xut hin trong thanh ghi ti thi im S3P1 ca chu k my sau khi s chuyn trng thi c pht hin. V vy ni dung ca thanh ghi tng ln 1 n v phi mt 2 chu k my, nn tc m ti a l 1/24 tn s b dao ng. Khng c s gii hn s vng thc hin ca tn hiu u vo ngoi, nhng n s gi t nht 1 chu k my y m bo chc chn rng mt mc cho c ly mu t nht 1 ln na trc khi n thay i.
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Do xung nhp bn ngoi c tn s bt k nn cc b Timer (0 v 1) c 4 ch lm vic khc nhau lu chn: (13 bit Timer, 16 bit Timer, 8 bit auto-reload, split Timer).
Timer 0 v Timer 1:
Trong AT89C51 v AT89C52 u c cc b Timer 0 v 1. Chc nng Timer hay Counter c chn la bi cc bit iu khin C/(/T) trong thanh ghi TMOD. Hai b Timer/Counter ny c 4 ch hot ng, c la chn bi cp bit (M0, M1) trong TMOD. Ch 0, 1 v 2 ging nhau cho cc chc nng Timer/Counter, nhng ch 3 th khc. Bn ch hot ng c m t nh sau: + Ch 0: C 2 b Timer 0 v 1 ch 0 c cu hnh nh mt thanh ghi 13 bit, bao gm 8 bit ca thanh ghi THx v 5 bit thp ca TLx. 3 bit cao ca TLx khng xc nh chc chn, nn c lm ng. Khi thanh ghi c xo v 0, th c ngt thi gian TFx c thit lp. B Timer/Counter hot ng khi bit iu khin TRx c thit lp (TRx=1) v, hoc Gate trong TMOD bng 0, hoc /INTx=1. Nu t GATE=1 th cho php iu khin Timer/ Counter bng ng vo ngoi /INTx, d dng xc nh rng xung. Khi hot ng chc nng thi gian th bit C/(/T)=0, do vy xung nhp t b dao ng ni, qua b chia tn cho ra tn s f=fosc/12 c a vo m trong
OS T1 PIN GATE
/12 C/ C/ TR1 Control TL1 TH1 5 bits 8 bits TF 1 Interrupt
& 1
Hinh 2.4: Ch 0 ca Timer 1
/INT1 PIN
thanh ghi Timer/Counter. Khi hot ng chc nng b m th bit C/(/T)=1, lc xung nhp ngoi a vo s c m. + Ch 1: hot ng tng t nh ch 0, ch khc l thanh ghi Timer/Counter c s dng c 16 bit. Xung nhp c dng kt hp vi cc thanh ghi thi gian byte thp v byte cao (TH1 v TL1). Khi xung Clock c nhn, b Timer s m tng ln: 0000h, 0001h, 0002, Khi hin tng trn xy ra, c trn s chuyn FFFFh v 0000h, v b Timer tip tc m. C trn ca Timer 1 l bit TF1 trong TCON, n c c hoc ghi bi phn mm, xem hnh 2.5 (Timer/Counter 1 Mode 1: 16 bit Counter).
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Timer Clock
TL1 TH1 8 bits 8 bits
TF1
Overlow Flag
2.5 : Ch ghi 1 ca Timer + Ch 2: Ch Hinh ny c a thanh Timer cng 1 hot ng tng t nh 2 ch trn, nhng n c t chc nh b m 8 bit (TL1) vi ch t ng np li, nh hnh 2.6. Khi xy ra hin tng trn TL1, khng ch thit lp bit TF1 m cn t ng np li cho TL1 bng ni dung ca TH1, c thit lp bi phn mm. Qu trnh np li cho php ni dung ca TH1 khng b thay i. Ch 2 ca Timer/Counter 0 cng tng t nh Timer/Counter 1. OSC /12
C/ T=0
T1 PIN GATE TR1
C/ T=1
TL1 8 bits
TF 1 Interrupt Reload
Control
& 1
TH1 8 bits
/INT1 PIN
+ Ch 3: ch ny, chc nng Timer/Counter 0 v chc nng Timer/Counter 1 khc nhau. B Timer 1 ch 3 ch cha chc nng m ca n, kt qu ging khi t TR1=0. B Timer 0 ch 3 thit lp TH0, TL0 nh l 2 b m ring bit. Mch Logic i vi ch 3 ca Timer 0 th hin hnh 2.7. B m TL0 c iu khin bi cc bit: C/(/T), GATE, TR0, /INT0 v khi m trn n thit lp c ngt TF0. B m TH0 ch c iu khin bi bit TR1, v khi m trn n thit lp c ngt TF1. Vy, TH0 iu khin ngt Timer/Counter 1. Ch 3 thng c dng khi yu cu cn c b thi gian hoc b m ngoi 8 bit. i vi Timer 0 ch 3, AT89C51 c th c 3 b Timer/Counter, cn AT89C52 c th c 4 b. Khi Timer 0 hot ng ch 3, th Timer 1 c th c bt hoc tt bng chuyn mch ngoi. ch ny, Timer 1 c th c s dng bi cng ni tip nh mt b to tc Baud, hoc trong bt k ng dng no m khng yu cu mt ngt. OSC T0 PIN GATE
/12
C/ C/
TL0 8 bits
TF 0
Interrupt Interrupt
TR0
& 1
Control
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/INT0 PIN
TH0 8 bits
TF1
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2.5.3. B nh chng trnh v b nh d liu ni tr.

Tt c cc b Flash Microcontrollers ca Atmel u t chc cc vng a ch tch bit i vi b nh chng trnh v b nh d liu, c m t hnh di y. Cc vng nh chng trnh v d liu tch bit cho php b nh d liu c truy cp bi a ch 8 bit, c th c lu tr vi tc cao v c vn hnh bi mt b CPU 8 bit. Tuy nhin, a ch b nh d liu 16 bit cng c th c to ra thng qua thanh ghi con tr d liu (DPTR). B nh chng trnh c th ch c c. Chng c th l b nh chng trnh 64 Kbyte c kh nng nh a ch trc tip. c ni dung t b nh chng trnh ngoi, cn xc nh trng thi ph hp cho chn /PSEN. B nh d liu chim 1 vng a ch ring bit so vi b nh chng trnh. 64 Kbyte b nh ngoi c th c nh a ch trc tip trong vng b nh d liu ngoi. CPU to ra tn hiu c v ghi (/RD, /WR) truy cp b nh d liu ngoi. B nh chng trnh ngoi v b nh d liu ngoi c th c kt hp bi cc tn hiu /RD v /PSEN a vo 1 cng AND v s dng u ra ca cng ny c ni dung t b nh d liu/chng trnh ngoi. Program Memory (Read Only)
FFFFh
Data Memory (Read/ Write)

FFFFh
External External Internal

FFh 0FFF
89C52 Only SFR
/EA=0 External
0000
/EA=1 Internal
7Fh 00 0000
/PSEN
Hnh 2.8. Cu trc b nh ca AT89C51
/RD /WR
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2.5.3.1. B nh chng trnh ni tr.

B nh chng trnh ca AT89C51 c t chc nh th hin hnh trn. Khng gian nh cc i ca b nh ny chim 64 Kbyte, c nh a ch t 0000h n FFFFh, trong c 4 Kbyte Flash ni tr bn trong n v c nh a ch t 0000h n 0FFFh. Do c th m rng thm 60 Kbyte b nh chng trnh bn ngoi, c nh a ch t 1000h n FFFFh. Tuy nhin b VK ny cng c th s dung ton b b nh chng trnh ngoi bao gm 64 Kbyte c nh a ch t 0000h n FFFFh. Cng t hnh trn ta thy, thng qua vic chn mc logic cho bit /EA c th la chn truy cp b nh chng trnh ni tr (4Kb), b nh chng trnh m rng ngoi tr (60Kb), hoc ton b b nh chng trnh ngoi tr bn ngoi Onchip (64Kb). C th, khi /EA = 1 th b VK s dng c b nh chng trnh ni tr v ngoi tr. Ngc li, khi /EA = 0 th b VK ch s dng b nh chng trnh ngoi tr. Mi khi c Reset, b VK s truy cp b nh chng trnh ti a ch khi u l 0000h, sau nu c ch ngt c s dng th n s truy cp ti a ch quy nh trong bng vecter ngt. Khi truy cp b nh chng trnh, b VK s dng xung chn /PSEN iu khin. Nu on-chip lm vic vi b nh chng trnh ni tr th chn pht ra xung chn /PSEN khng s dng. Nu b VK lm vic vi b nh chng trnh ngoi tr th chn pht ra xung chn /PSEN c s dng. Khi nu /PSEN = 0 th cho php b VK c b nh chng trnh ngoi, ngc li nu /PSEN = 1 th b VK ch lm vic vi b nh chng trnh ni tr.
2.5.3.2. B nh d liu ni tr.

FFh
128 Byte cao

80h 7Fh
C th truy cp bng a ch gin tip C th truy cp bng a ch trc tip v gin tip
C th truy cp bng a ch trc tip (SFR)
FFh
80h
128 Byte thp

0
Hinh 2.9. B nh d liu trong
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AT89C51 c b nh d liu chim mt khong khng gian b nh c lp vi b nh chng trnh. Dung lng ca RAM ni tr h VK ny l 128 Byte, c nh a ch t 00h n 7Fh. Phm vi a ch t 80h n FFh dnh cho SFR. Tuy nhin b VK cng c th lm vic vi RAM ngoi tr c dung lng cc i l 64 Kbyte c nh a ch t 0000h n FFFFh.
2.5.3.2.1. Vng nh 128 Byte thp

Vng nh 128 Byte thp c nh a ch t 00h n 7Fh, c chia thnh 3 vng con nh th hin hnh 2.10. - Vng th nht c ln 32 Byte c nh a ch t 00h n 1Fh bao gm 4 bng thanh ghi ( bng 0...bng 3), mi bng c 8 thanh ghi 8 bit. Cc thanh ghi trong mi bng c tn gi t R0 n R7. Vng RAM ny c truy cp bng a ch trc tip mc Byte, v qu trnh chn s dung bng thanh ghi no l ty thuc vo vic la chon gi tr cho RS1 v RS0 trong PSW. - Vng th 2 c ln 16 Byte c nh a ch t 20h n 2Fh, cho php truy cp trc tip bng a ch mc bit. B VK cung cp cc lnh c kh nng truy cp ti vng nh 128 bit ny (nu truy cp dng mc bit th vng ny c a ch c nh t 00h n 7Fh) mc bit. vng nh ny, a ch c truy xut di dng Byte hay Bit tu vo lnh c th. Chng hn, t bit ti a ch 5Fh c mc logic 1, ta thc hin lnh: SETB 5Fh . Sau khi thc hin lnh ny, mc du 5Fh l a ch bit cao nht trong Byte c a ch 2Bh, nhng n khng lm nh hng ti cc bit khc trong Byte ny. Trong khi , cc b VXL thc hin chc nng nh trn cn dng nhng lnh sau: MOV A,2Bh ORL A,#10000000b MOV 2Bh,A y l u im r nt ca cc b VK khi thc hin vic truy xut cc bit ring r thng qua phn mm. Cc bit c th c t, xo, hay thc hin chc nng AND, OR...ch thng qua 1 lnh. Ngoi ra cc cng xut/nhp cng c th c nh a ch dng bit, iu ny lm n gin vic giao tip bng phn mm vi cc thit b xut/nhp n bit. - Vng nh cn li gm 80 Byte c a ch t 30h n 7Fh c dnh ring cho ngi s dng lu tr d liu. y c th xem l vng RAM a mc ch. C th truy cp vng nh ny bng a ch trc tip hoc gin tip thng qua cc thanh ghi (R0 hoc R1) dng mc Byte.
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2.5.3.2.2. Vng nh 128 Byte cao (dnh cho SFR)

Vng nh ny c nh a ch t 80h n FFh, v c truy cp bng a ch trc tip.
2.5.3.2.3. Cc lnh truy cp b nh d liu ni tr.

- MOV A, <src>: Chuyn d liu t ton hng ngun (cc nh, thanh ghi c a ch trc tip hoc gin tip trong on chip, cc gi tr trc hng cha trong cu lnh) vo thanh ghi tch lu. - MOV <dest>, <src>: Chuyn d liu t ton hng ngun vo ton hng ch (cc nh, thanh ghi c a ch trc tip hoc gin tip trong on chip). - MOV <dest>, A : Chuyn d liu t A vo ton hng ch. - MOV DPTR, #data16: Chuyn gi tr hng 16 bit vo thanh ghi con tr d liu. - PUSH <src>: Chuyn gi tr t ton hng ngun vo ngn xp. - POP <dest>: Chuyn gi tr t ngn xp vo ton hng ch. - XCH A, <byte>: Chuyn i d liu gia ton hng ngun dng byte viA. - XCHD A, @Ri: Chuyn i na thp ca A vi ni dung trong RAM ti a ch l ni dung ca Ri.
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Gio trnh: K thut Vi iu Khin Bit Address
Byte Address
7F
Bit addressable locations

30
General purpose RAM

2F 2E 2D 2C yy 2B 2A 29 28 27 26 25 24 23 22 21 20 1F 18 17 10 0F 08 07 00
7F 77 6F 67 5F 57 4F 47 3F 37 2F 27 1F 17 0F 07 7E 76 6E 66 5E 56 4E 46 3E 36 2E 26 1E 16 0E 06 7D 75 6D 65 5D 55 4D 45 3D 35 2D 25 1D 15 0D 05 7C 74 6C 64 5C 54 4C 44 3C 34 2C 24 1C 14 0C 04 7B 73 6B 63 5B 53 4B 43 3B 33 2B 23 1B 13 0B 03 7A 72 6A 62 5A 52 4A 42 3A 32 2A 22 1A 12 0A 02 79 71 69 61 59 51 49 41 39 31 29 21 19 11 09 01 78 70 68 60 58 50 48 40 38 30 28 20 18 10 08 00 yyyy
Bank 3 Bank 2 Bank 1
Reset value of stack pointer
Default register bank for R0-R7
Hnh 2.10. 128 Byte thp ca RAM trong
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Byte address
FF F0 E0 D0 B8 B0 A8 A0 99 98 90 8D 8C 8B 8A 89 88 87 83 82 81 80 87 8F 8E F7 E7 D7 B7 AF A7 F6 E6 D6 B6 -
Bit address
B ACC PSW IP P3 IE P2 SBUF SCON P1 TH1 TH0 TL1 TL0 TMOD TCON PCON DPH DPL SP P0
F5 E5 D5 B5 -
F4 E4 D4
F3 E3 D3
F2 E2 D2
F1 E1 -
F0 E0 D0 B8 B0 A8 A0
BC BB BA B9 B4 B3 B2 B1 A9 A1
AC AB AA A4 A3 A2
A6 A5
Not bit addressable

9F 97 9E 96 9D 95 9C 94 9B 93 9A 92 99 91 98 90
Not bit addressable Not bit addressable Not bit addressable Not bit addressable Not bit addressable
8D 8C 8B 8A 89 88
Not bit addressable Kh ng cho ph p truy xu t bit Khng cho php truy xut bit Kh ng cho ph p truy xu t bit
86 85 84 83 82 81 80
Hnh 2.11. Cc thanh ghi chc nng c bit (SFR)
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2.5.4. B nh chng trnh v b nh d liu ngoi tr.

tng kh nng ng dng trong cc lnh vc iu khin, o lng B VK cho php m rng khng gian nh RAM ngoi n 64 Kbyte v ROM ngoi n 64 Kbyte khi cn thit. Cc IC giao tip ngoi vi cng c th c thm vo m rng kh nng xut/nhp v chng tr thnh 1 phn ca khng gian nh d liu ngoi. Khi b nh ngoi c s dng, cng P0 khng cn m nhn chc nng xut/nhp na, m n tr thnh knh a ch (A0A7) v knh d liu a hp (D0D7). Ng ra ALE cht byte thp ca a ch thi im bt u ca mi 1 chu k b nh ngoi. Cng P2 thng c dng lm byte cao ca knh a ch. Hot ng ca cc b nh ngoi thng c thc hin theo kiu sp xp a hp, ngha l: trong na chu k u ca chu k b nh, byte thp ca a ch c cung cp bi cng P0 v c cht nh tn hiu ALE. Mch cht gi cho byte thp ca a ch n nh trong c chu k b nh. Trong na chu k sau ca b nh, cng P0 c s dng lm knh d liu, lc ny d liu c th c c hoc ghi.
2.5.4.1. B nh chng trnh ngoi tr. AT89C51 P1 P0 /EA ALE P3 P2 /PSEN A8...A15 /0E Latch D Q EPROM AD0...AD7 A0...A7
Hnh 2.12. Truy cp b nh chng trnh ngoi
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Hnh 2.13. th thi gian qu trnh nhn lnh t ROM ngoi
B nh chng trnh ngoi l b nh ch c, c cho php bi tn hiu /PSEN. Khi c mt EPROM ngoi c s dng, c P0 v P2 u khng cn l cc cng I/O na. Khi b VK truy cp b nh chng trnh ngoi tr, n lun s dng knh a ch 16 bit thng qua P0 v P2. Mt chu k my ca b VK c 12 chu k dao ng. Nu b dao ng trn chip c tn s 12 MHz, th 1 chu k my di 1s. Trong mt chu k my in hnh, ALE c 2 xung v 2 Byte ca lnh c c t b nh chng trnh (nu lnh ch c 1 byte th byte th 2 c loi b). Khi truy cp b nh chng trnh ngoi tr, b VK pht ra 2 xung cht a ch trong mi chu k my. Mi xung cht tn ti trong 2 chu k dao ng t P2-S1 n P1-S2, v t P2-S4 n P1-S5. a ch ho b nh chng trnh ngoi tr, byte thp ca a ch (A0A7) t b m chng trnh ca b VK c xut qua cng P0 ti cc trng thi S2 v S5 ca chu k my, byte cao ca a ch (A8A15) t b m chng trnh c xut qua cng P2 trong khong thi gian ca c chu k my. Tip theo xung cht, b VK pht ra xung chn /PSEN. Mi chu k my ca chu k lnh gm 2 xung chn, mi xung chn tn ti trong 3 chu k dao ng t P1-S3 n ht P1-S4 v t P1-S6 n ht P1-S1 ca chu k my tip theo. Trong khong thi gian pht xung chn th byte m lnh c c t b nh chng trnh nhp vo On chip.
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2.5.4.2. B nh d liu ngoi tr. AT89C51

With internal FLASH
RAM P0 DATA Vcc Latch D Q A0...A7 A8...A15
/EA ALE P1 P2 /RD P3 /WR
I/O
Page Bits
/OE /WE
Hnh 2. 14. Truy cp b nh d liu ngoi
Hnh 2.15. th thi gian chu k c d liu t RAM ngoi
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Hnh 2.16. th thi gian chu k ghi d liu vo RAM ngoi
B nh d liu ngoi tr c cho php bi cc tn hiu /WR v /RD cc chn P3.6 v P3.7. VK truy cp b nh d liu ngoi bng a ch 2 byte (thng qua cng P0 v P2) hoc 1 byte (thng qua cng P0). Lnh dng truy xut b nh d liu ngoi l MOVX, s dng hoc DPTR hoc Ri (R0 v R1) lm thanh ghi cha a ch. hnh 2.14 ta thy: - /EA c ni vi +Vcc cho php VK lm vic vi b nh chng trnh ni tr. - /RD ni vi ng cho php xut d liu (/OE-Output Data Enable) ca RAM. - /WR ni vi ng cho php ghi d liu (/WE-Write Data Enable) ca RAM. Nguyn l truy cp b nh d liu ngoi tr c th hin bng cc th thi gian trn. Tuy nhin, tu thuc vo nhim v c d liu t b nh hay ghi d liu vo b nh m nguyn l truy cp b nh d liu l khc nhau. * Qu trnh c d liu t b nh ngoi tr: Khi truy cp b nh d liu ngoi tr, b VK pht ra 1 xung cht a ch (ALE) cho b cht bn ngoi
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(Latch) trong mi chu k my, tn ti trong 2 chu k dao ng t P2-S4 n P1S5. a ch ho b nh d liu ngoi, byte thp ca a ch t thanh ghi con tr d liu (DPL) hoc t Ri ca VK c xut qua cng P0 trong khong cc trng thi S5 ca chu k my trong chu k lnh. Tip theo byte thp ca a ch t b m chng trnh (PCL) cng c xut ra qua cng P0 a ti b m chng trnh thc hin lnh tip theo. Byte cao ca a ch t DPTR (DPH) ca VK c xut qua cng P2 trong khong thi gian t S5 n S4 ca chu k my tip theo. Sau byte cao ca a ch t PC (PCH) cng c xut qua cng P2 a n b nh chng trnh. Nu a ch c di 1 byte th n c xut qua cng P0 t DPL hoc Ri. Tip theo xung cht, VK xut ra tn hiu iu khin /RD cho php c d liu t b nh ngoi. Xung /RD tn ti trong 3 trng thi ca mi chu k my t P1-S1 n P2-S3, v trong khong thi gian ny d liu t b nh ngoi c c vo VK . * Qu trnh ghi d liu vo b nh ngoi tr: Tng t nh qu trnh c d liu, nhng y dng tn hiu iu khin ghi /WR. * Cc lnh truy cp b nh d liu ngoi tr: - MOVX A, @Ri: Chuyn (c) d liu 8 bit t nh ca RAM ngoi ti a ch c xc inh trong thanh ghi ca bng thanh ghi hin hnh vo A. - MOVX @Ri, A: Chuyn (ghi) d liu 8 bit t A vo nh ca RAM ngoi ti a ch c xc nh trong thanh ghi ca bng thanh ghi hin hnh. - MOVX A,@DPTR: Chuyn (c) d liu 16 bit t nh ca RAM ngoi ti a ch c xc inh trong thanh ghi con tr d liu vo A. - MOVX @DPTR, A: Chuyn (ghi) d liu 16 bit t A vo nh ca RAM ngoi ti a ch c xc nh trong thanh ghi con tr d liu. V d: MOV R0, #4Fh MOVX A,@R0 S chuyn ni dung RAM ngoi ti a ch 4Fh vo A.
2.5.5. C ch ngt trong On-chip AT89C51: 2.5.5.1- Phn loi ngt trong On-chip:
B AT89C51 c tt c 5 Vectors ngt bao gm: 2 ngt ngoi (/INT0 v /INT1), 2 ngt ca khi thi gian (Timer 0, 1), v ngt cng truyn tin ni tip. Mi ngun ngt c th c kch hot hoc khng kch hot bng cch t hoc xo Bit trong IE. IE cng cha bit c th khng cho tt c cc ngt hot ng EA (Nu EA=0). Cc ngt ngoi c th c kch hot theo mc hoc theo sn xung, tu thuc vo gi tr ca cc bit IT0, IT1 trong TCON. Ngt ngoi c 2 c ngt tng ng l IE0, IE1 cng nm trong TCON. Khi mt ngt c thc
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hin th c ngt tng ng ca n b xo bng phn cng. Chng trnh con phc v ngt hot ng ch khi ngt c kch hot theo sn xung. Nu ngt c kch hot theo mc th ngun yu cu ngt t bn ngoi iu khin c ngt.
Hnh 2.17. Cc ngun ngt ca AT89C51 Cc ngt trong, vi ngt Timer/Counter 0, 1 c pht sinh bi c ngt TF0, TF1. Hai c ngt ny c thit lp khi thanh ghi Timer/Counter thc hin quay vng, ti thi im S5P2 ca chu trnh my. Khi mt ngt c thc hin th c ngt tng ng pht sinh ra ngt s b xo bng phn cng trong On-chip. Ngt cng ni tip c pht sinh bi cc ngt RI, TI, SPIF thng qua phn t Logic OR, khi chng trnh con phc v ngt c kch hot th cc c ngt pht sinh tng ng c xo bng phn mm. Cc ngt trong c th c php hoc khng uc php kch hot bng cch t hoc xo mt bit trong IE.
2.5.5.2.Cc bc thc hin ngt.

Theo ng trnh t, s dng cc ngt trong Flash Microcontroller, cn thc hin cc bc nh sau:
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- t bit EA trong IE mc logic 1. - t bit cho php ngt tng ng trong IE mc logic 1. - Bt u chng trnh con phc v ngt ti a ch ca ngt tng ng . (Xem bng a ch Vector ca cc ngun ngt) Ngoi ra, i vi cc ngt ngoi, cc chn /INT0, /INT1 phi c t mc 1. V tu thuc vo ngt c kch hot bng mc hay sn xung, m cc bit IT0, IT1 trong TCON c th cn phi t mc 1. ITx=0: Kch hot bng mc ITx=1: Kch hot bng sn xung.
2. 5.5.3. Mc ngt u tin trong on-chip:

Mi ngun ngt c th c lp trnh ring cho 1 hoc 2 mc u tin bng cch t hoc xo 1 bit trong IP ca SFR. Mi ngt u tin mc thp c th c ngt bng ngt u tin mc cao hn nhng khng th ngt bng ngt c mc u tin mc thp hn c. Mt ngt u tin mc cao c th c ngt bi bt k ngun ngt no khc. Nu c yu cu ngt ca 2 mc u tin cng nhau (cng 1 lc), yu cu ca mc u tin cao hn s c phc v (Ngt no c mc u tin cao hn s c phc v). Nu cc yu cu ngt c cng mc u tin, th th t quay vng bn trong s quyt nh ngt no c phc v. Th t u tin ngt t cao xung thp ca AT89C51 nh sau: IE0, TF0, IE1, TF1, RI hoc TI.
2.5.5.4. Nguyn l iu khin ngt ca AT89:

Cc c ngt c thit lp ti thi im S5P2 ca mi chu k my. Chu k my tip theo sau chu k my c c ngt c thit lp, th chng trnh con c thit lp khi c lnh gi LCALL. Lnh LCALL pht sinh nhng li b cm hot ng khi gp cc tnh hung sau: a- ng thi c ngt vi mc u tin cao hn hoc bng ngt ang phc v. (Mt ngt c mc u tin bng hoc cao hn ang sn sng c phc v) b- Chu k my hin hnh khng phi l chu k my cui cng ca lnh ang thc hin. c- Lnh ang thc hin l RETI hoc bt k lnh no ghi vo thanh ghi IE hoc IP.
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Hnh 2.18. H thng ngt ca AT89C51 Bt k mt trong 3 iu kin ny xut hin s cn tr vic to ra LCALL i vi chng trnh phc v ngt. iu kin 2 m bo rng, lnh ang thc hin s c hon thnh trc khi tr ti bt k chng trnh phc v no. iu kin 3 m bo rng, nu lnh ang thc hin l RETI hoc bt k s truy cp no vo IE hoc IP, th t nht mt lnh na s c thc hin trc khi bt k ngt no c tr ti. Chu trnh kim tra vng c lp li vi mi chu trnh my, v cc gi tr c kim tra l cc gi tr m xut hin thi im S5P2 ca chu trnh my trc . Nu mt ch th ngt c hiu lc nhng khng c p ng v cc iu kin trn v nu ch th ny vn cha c hiu lc khi iu kin cn tr c loi b, th ngt b t chi ny s khng c phc v na. LCALL do phn cng to ra s chuyn ni dung ca b m chng trnh vo ngn xp (Nhng khng ghi vo PSW) v np li cho PC mt a ch ph thuc vo ngun gy ngt ang c phc v, nh bng di y:
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Gio trnh: K thut Vi iu Khin Ngun ngt IE0 TF0 IE1 TF1 RI hoc TI TF2 hoc EXF2 RST a ch Vc t 0003h 000Bh 0013h 001Bh 0023h 002Bh 0000h
Ngt External 0 Timer 0 External 1 Timer 1 Serial Port Timer 2 (AT89C52) System Reset
Bng 2.7. a ch vc t ngt Lnh RETI thng bo cho b VXL rng th tc ngt ny kt thc, sau ly ra 2 Byte t ngn xp v np li cho PC tr li quyn iu khin cho chng trnh chnh.
2.5.5.4.1.Cc ngt ngoi:

V cc cht ngt ngoi c to mu mi ln trong mi chu trnh my, nn mt gi tr cao hoc thp ca u vo s duy tr trong t nht l 12 chu k xung nhp ca b dao ng m bo to mu. Nu ngt ngoi c kch hot bng sn xung , th ngun ngt ngoi phi duy tr cht yu cu gi tr cao t nht 1 chu k my v sau duy tr gi tr thp t nht 1 chu k my na. Vic ny c thc hin m bo rng qu trnh chuyn tip cho thy ch th yu cu ngt IEx s c xc lp. IEx s t ng c xo bi CPU khi th tc ngt p ng c gi. Nu ngt ngoi c kch hot theo mc, th ngun ngt bn ngoi phi duy tr cho yu cu ny c hi lc cho n khi ngt c yu cu thc s c to ra. Sau ngun ngt ngoi phi hu yu cu trc khi th tc phc v ngt hon thnh, nu khng ngt khc s c to ra.
2.5.5.4.2. Vn hnh Single-Step:

Cu trc ngt AT89C51 cho php thc hin cc bc n vi s tham gia ca rt t phn mm. Nh lu trc y, mt yu cu ngt s khng c p ng khi mt ngt khc c cng mc u tin vn ang hot ng, n cng khng c p ng sau khi c lnh RETI cho n khi c t nht mt lnh khc c thc hin. Do mi khi mt th tc ngt c a vo, th n khng th c a vo ln na cho n khi t nht mt lnh ca chng trnh ngt c thc hin. Mt
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cch s dng c im ny i vi hot ng theo bc n l l lp trnh cho 1 trong nhng ngt ngoi(chng hn /INT0) c kch hot theo mc. Nu chn /INT0 c duy tr mc thp, th CPU s chuyn ngay n th tc ngt ngoi 0 v dng cho ti khi INT0 c nhn xung t thp ln cao ri xung thp. Sau n s thc hin lnh RETI, tr li nhim v chng trnh, thc hin mt lnh, v ngay sau nhp li th tc ngft ngoi 0 i xung nhp tip theo ca P3.2. Mi bc ca nhim v chng trnh c thc hin vo mi thi im chn P3.2 c nhn xung.
2.5.6. Nguyn l truyn tin ni tip ca AT89C51:

2.5.6.1. Phng thc truyn tin ni tip(Serial Interface):
H VXL on-chip ny truyn tin ni tip bng cng RxD v TxD, d liu xut nhp truyn qua cng ni tip bng tc Baud v u qua vng m ni tip SBUF. Cng truyn ni tip l cng truyn tin 2 chiu, ngha l n c th ng thi truyn v nhn thng tin cng 1 lc. N cng c kh nng va thc hin chc nng nhn va thc hin chc nng m, tc l n c th nhn byte k tip trc khi byte c nhn trc c c t thanh ghi m. (Tuy nhin, nu byte u tin vn cha c c ti thi im nhn ca byte th 2, th mt trong 2 byte ny s b mt). iu khin cng ni tip bng thanh ghi SCON, trng thi ca 2 bit SM0 v SM1 trong thanh ghi ny thit lp nn 4 ch hot ng giao tip ni tip chun nh sau: + Ch 0: D liu ni tip vo v ra s thng qua chn RxD. Chn TxD a ra xung nhp ng h. 8 bit d liu c truyn/nhn ni tip, vi bit LSB c thc hin u tin. Tc Baud c c nh bng 1/12 tn s ca b dao ng. + Ch 1: 10 bit c truyn (thng qua TxD) hoc nhn (thng qua RxD), trong gm c: 1 bit khi ng (c gi tr 0), 8 bit d liu (u tin l LSB), v 1 bit dng (c gi tr l 1). Khi nhn, bit dng c chuyn vo RB8 ca thanh ghi SCON. Tc Baud c th thay i c. + Ch 2: 11 bit c truyn (thng qua TxD) hoc nhn (thng qua RxD) bao gm: bit khi ng (c gi tr 0), 8 bit d liu (u tin l LSB), mt bit d liu th 9 c th lp trnh c, v mt bit dng (c gi tr 1). Khi truyn, bit d liu th 9 (TB8 trong SCON) c th c gn gi tr 0 hoc 1. Chng hn nh bit chn l (P trong PSW) c th c chuyn vo TB8. Khi nhn, bit d liu th 9
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c chuyn vo RB8 thanh ghi SCON, trong khi bit dng c lc b. Tc Baud c th lp trnh c bng 1/32 hoc 1/64 tn s b dao ng. + Ch 3: 11 bit c truyn (thng qua TxD) hoc c nhn (thng qua RxD) bao gm: 1 bit khi ng (c gi tr 0), 8 bit d liu (u tin l LSB), 1 bit d liu th 9 c th lp trnh c, v 1 bit dng (c gi tr 1). Trn thc t, ch 3 ging ch 2 mi gc tr tc Baud. Tc Baud ch 3 l kh bin v c xc nh theo b Timer 1. Trong c 4 ch trn, vic truyn c bt u bi bt k mt lnh no m s dng thanh ghi SBUF nh l mt thanh ghi ch. Vic nhn c bt u ch 0 khi RI=0 v REN=1. i vi cc ch khc, vic nhn c bt u khi bit REN=1.
2.5.6.2. Lin lc a x l (Multiprocessor Communications):

Ch 2 v 3 c mt d tr (chun b) c bit cho cc lin lc a x l. Trong cc ch ny 9 bit d liu c s dng. Bit th 9 s chuyn vo RB8, sau l 1 bit dng. Cng ni tip c th c lp trnh tho mn iu kin: khi bit dng c nhn th ngt ca cng ni tip c kch hot ch khi RB8=1. c im ny c th thc hin c bng cch t bit SM2 trong SCON. V d di y cho thy, cch thc s dng ngt cng truyn ni tip to lin lc a x l. Khi b x l ch (Master) mun truyn 1 khi d liu ti mt trong nhng b x l (Slave) khc, u tin n gi i 1 byte a ch xc nh a ch ca b x l ch (Slave). Mt byte a ch khc vi mt byte d liu ch: bit th 9 bng 1 byte a ch v bng 0 byte d liu. Vi SM2=1, khng c b x l (Slave) no c ngt bi 1 byte d liu. Tuy nhin 1 byte a ch s ngt tt c cc b x l (Slave) khc, cho mi b x l (slave) khc c th kim tra byte nhn c v xem c phi n ang c tr ti khng. B x l (slave) no c tr ti s xo (clear) bit SM2 ca n v chun b nhn cc byte d liu s a n. Cc b x l (Slave) khc nu khng c tr ti, th s thit lp (set) bit SM2 ca chng v tip tc hot ng ca mnh m khng cn quan tm ti d liu trn knh. Bit SM2 khng c tc dng ch 0, nhng n c th c s dng kim tra bit dng trong ch 1. Trong qu trnh nhn tin ch 1, nu SM2=1 th ngt nhn tin s khng c kch hot tr khi bit dng c nhn vo.
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I HC SPKT HNG YN
2.5.6.3. Cc tc Baud:
+ Tc Baud ch 0 c c nh, v bng Tn s b dao ng/12 + Tc Baud ch 2 ph thuc vo gi tr ca bit SMOD trong thanh ghi PCON. Nu SMOD=0 (gi tr sau khi reset), th tc Baud =1/64 tn s ca b dao ng. Nu SMOD=1 th tc Baud =1/32 tn s ca b dao ng. Tc Baud ch 2 = (2SMOD*Tn s b dao ng)/64 Trong AT89C51, cc tc Baud ch 1 v 3 do Timer 1 quyt nh, Trong AT89C52 tc Baud ca cc ch ny c th c quyt nh bi Timer 1 hoc Timer 2, hoc c hai (mt b timer xc nh tc truyn, b kia xc nh tc nhn).
2.5.6.4. S dng Timer 1 to ra cc tc Baud :

Khi b Timer 1 c dng to tc Baud, th cc tc Baud cc ch 1 v 3 do tc trn ca timer 1 v gi tr ca SMOD quyt nh: Tc Baud ch 1 v 3 = (2SMOD*(Tc trn ca timer 1))/32 Ngt ca Timer 1 s mt tc dng trong ng dng ny. Bn thn b Timer c th c thit lp thc hin chc nng thi gian hay b m bt k mt trong 3 ch hot ng. Trong hu ht cc kiu ng dng, n thng c thit lp thc hin chc nng thi gian, hot ng ch Auto-reload (na byte cao ca TMOD = 0010b). Trong trng hp ny, tc baud c tnh bng cng thc: Tc Baud ch 1 v 3 = (2SMOD*Tn s b dao ng)/(32*(12*[256-(TH1)]) Ta c th nhn c cc tc Baud rt thp vi b Timer 1 bng cch lm cho ngt ca timer 1 c tc dng, v thit lp Timer 1 hot ng nh mt b m thi gian 16 bit (Na byte cao ca TMOD=0001b). Bng 2.8 lit k cc tc Baud khc nhau thng c s dng v cch chng c th nhn c t Timer 1.
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I HC SPKT HNG YN
Tn s d.ng (MHz) Mode 0 Max: 1M 12 Mode 2 Max: 375K 12 Mode 1,3 12 Max:62,5K 19,2K 11,059 9,6K 11,059 4,8K 11,059 2,4K 11,059 1,2K 11,059 137,5 11,966 110 6 110 12
Tc Baud (Hz)
SMODE C/(/T) x 1 1 1 0 0 0 0 0 0 0 X X 0 0 0 0 0 0 0 0 0
Timer 1 Mode Gi tr np li X X 2 2 2 2 2 2 2 2 1 X X FFh FDh FDh FAh F4h E8h 1Dh 72h FEEBh
Bng 2.8. Cc tc Baud c to ra khi s dng Timer 1
2.5.6.5. Hot ng ca ch 0:
D liu ni tip vo v ra thng qua RxD. TxD cho ra ng h xung nhp. 8 bit d liu c truyn/nhn (vi LSB u tin) c thc hin ch ny. Tc Baud c c nh bng 1/12 tn s b dao ng. Hnh 2.19 (Seriel Port Mode 0) m t s chc nng ca cng ni tip ch 0 v cc mc thi gian c lin quan. Qu trnh truyn c bt u bng bt k lnh no m s dung SBUF nh l mt thanh ghi ch. Tn hiu ghi vo SBUF ti thi im S6P2 cng np gi tr 1 vo v tr th 9 ca thanh ghi dch trong qu trnh truyn v bt c bo cho khi iu khin pht (Tx Control) v yu cu truyn tin. Thi gian c xc lp bn trong cho 1 chu trnh my y s bt u t thi im ghi vo SBUF cho ti khi SEND c kch hot. SEND cho php ni dung ca thanh ghi dch a ti u ra P3.0 v cho php tn hiu SHIFT CLOCK n u ra P3.1. SHIFT CLOCK c gi tr thp trong cc trng thi S3, S4 v S5 ca mi chu trnh my, v c gi tr cao trong cc trng thi S6, S1 v S2. Ti thi im S6P2 ca mi chu trnh my khi SEND c mc tch cc, th ni dung ca thanh ghi dch pht c dch sang bn phi mt bit.
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I HC SPKT HNG YN
Hnh 2.19.
Khi cc bit d liu dch sang bn phi i ra ngoi th cc gi tr 0 c gn vo bn tri. Khi bit c trng s ln nht MSB ca Byte d liu v tr u ca thanh ghi dch, th gi tr 1 ( c np t u vo v tr th 9) c t vo bn tri ca MSB, v tt c cc v tr bn tri cn li ca MSB u cha gi tr 0. iu kin ny s ch th cho khi iu khin pht thc hin mt php dch cui
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I HC SPKT HNG YN
cng v sau hu tc dng ca SEND v thit lp c ngt truyn TI. C 2 tc ng ny xy ra ti thi im S1P1 ca chu trnh my th 10 k t thi im ghi vo SBUF. Qu trnh nhn tin c khi u bng iu kin REN=1 v RI=0. Ti thi im S6P2 ca chu trnh my tip theo, khi iu khin nhn (Rx Control) s ghi cc bit 11111110 (Xa RI) vo thanh ghi dch nhn, v s kch hot RECEIVE trong pha xung nhp tip theo. RECEIVE cho php SHIFT CLOCK (ng h xung nhp) a n u ra P3.1. SHIFT CLOCK s to ra vic pht tin ti thi im S3P1 v S6P1 ca mi chu trnh my. Ti giai on S6P2 ca mi chu trnh my khi RECEIVE c mc tch cc th ni dung ca thanh ghi dch nhn tin c dch sang tri mt v tr. Gi tr a vo t bn phi l gi tr c to mu chn P3.0 ti thi im S5P2 ca cng chu trnh my. Khi cc bit d liu c a vo t bn phi, th cc gi tr 1 s i ra bn tri. Khi gi tr 0 ( c np ban u vo v tr tn cng bn phi) dch n v tr tn cng bn tri trong thanh ghi dch, th n ch th cho khi iu khin nhn thc hin php dch cui cng v np vo SBUF. Ti thi im S1P1 ca chu trnh my th 10 sau thi im ghi vo SCON ( xo RI), th RECEIVE c xo v RI c thit lp.
2.5.6.6. Hot ng ca ch 1:
ch ny 10 bit c truyn (thng qua TxD) hoc nhn (thng qua RxD) bao gm: 1 bit khi u(c gi tr 0), 8 bit d liu (LSB u tin) v 1 bit dng (C gi tr 1). Khi nhn tin, bit dng chuyn vo RB8 trong SCON. Trong AT89C51, tc Baud c xc nh bng tc trn ca Timer 1. Trong AT89C52, tc Baud c xc nh bng tc trn ca Timer 1 hoc tc trn ca Timer 2 hoc bng tc trn ca c 2 b Timer ny. Trong trng hp ny, khi c 2 b Timer c s dng th mt b Timer s xc nh tc truyn tin, cn b Timer kia xc nh tc nhn tin. Hnh 2.20 (Seriel Port Mode 1) l s chc nng ca cng ni tip ch 1 v th thi gian lin quan ti qu trnh truyn v nhn tin ca ch ny. Qu trnh truyn tin c khi u bi bt k lnh no c s dng SBUF nh 1 thanh ghi ch. Tn hiu ghi vo SBUF s np gi tr 1 vo bit th 9 ca thanh ghi dch truyn v bt c bo cho khi iu khin pht (Tx Control) v yu cu cn truyn tin. Qu trnh truyn thc t bt u ti thi im S1P1 ca chu k my theo sau qu trnh quay vng (rollover) k tip trong b m /16 (-:-16). Do , cc
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I HC SPKT HNG YN
thi im ca bit truyn c ng b vi nhp b m chia16, ch khng phi vi tn hiu ghi vo SBUF. Qu trnh truyn tin bt u khi /SEND c kch hot m cng OR v bit khi u c t ti TxD. Sau tn hiu DATA c kch hot m tip cng AND. iu ny cho php m thng ng truyn t thanh ghi dch truyn n u ra TxD. Xung nhp u tin dch cc bit trong thanh ghi dch truyn s xut hin ngay sau .
Hnh 2.20
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I HC SPKT HNG YN
Khi cc bit d liu dch sang phi, th cc gi tr 0 c a vo t bn tri. Khi MSB ca Byte d liu v tr u ra ca thanh ghi dch th gi tr 1(ban u c np vo bit th 9) s c in vo ngay bn tri ca bit MSB, cn cc bit k t n sang tri u c gi tr 0. iu kin ny s ch th cho khi iu khin pht thc hin ln dch cui cng v sau a tr /SEND v mc th ng, ng thi thit lp c ngt TI. Thi im ny ri vo chu k th 10 ca b m chia 16, sau thi im ghi vo SBUF. Qu trnh nhn tin c khi u bng vic pht hin c s chuyn trng thi t 1 v 0 ng thu ni tip RxD. pht hin chnh xc, tn hiu trn RxD c ly mu tc gp 16 ln tc Baud ca ng truyn. Khi s chuyn trng thi (t 1 v 0) c pht hin th b m chia 16 c ti xc lp ngay v gi tr 1FFh c ghi vo thanh ghi dch u vo (Input shift register). Vic ti thit lp b m chia 16 s ng nht thi im trn ca n vi cc bin (ranh gii) thi gian ca bit ang i ti u thu. Mi bit c chia thnh 16 phn (States) thi gian bng nhau (16 phn ca b m). Ti cc phn thi gian th 7, 8, 9 ca mi bit, b pht hin bit (Bit Detector) s trch mu gi tr ca RxD. Gi tr c chp nhn l gi tr c t nht 2 trong 3 mu. Phng php ny c thc hin chng nhiu ng truyn. Nu gi tr c chp nhn i vi bit u tin khng phI l 0 (khng phI bit START), th cc mch thu c ti xc lp quay li ch mt t bin t 1 v 0 khc. Nu bit khi u (START) c gi tr hp l th d liu c dch vo thanh ghi dch u vo, v qu trnh nhn tin c tip tc. Khi cc bit d liu i vo t bn phi ca thanh ghi dch, th cc gi tr 1 c dch ra bn tri ca n. Khi bit khi u n v tr tn cng bn tri ca thanh ghi dch ( ch 1, n l thanh ghi 9 bit), n s ch th cho khi iu khin nhn (Rx Control) thc hin php dch chuyn cui cng, ri np SBUF v RB8, v thit lp RI. Tn hiu np SBUF v RB8, v thit lp RI s c to ra khi v ch khi cc iu kin sau y c tho mn thi im xung nhp cui cng c to ra: 1. RI=0, v 2. Hoc SM2=0, hoc bit STOP nhn c =1. Nu mt trong hai iu kin ny khng c tho mn, th Byte tin nhn c s b mt. Nu c 2 iu kin c tho mn, th bit dng chuyn vo RB8, 8 bit d liu chuyn vo SBUF, v RI c kch hot. Ti thi im ny, bt k cc iu kin trn c tho mn hay khng, th khi iu khin vn quay tr li tip tc chc nng pht hin t bin mi t 1 v 0 trn ng thu tin RxD.
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I HC SPKT HNG YN
2.5.6.7. Hot ng ca ch 2 v 3:
ch ny 11 bit c truyn i (thng qua TxD) hoc nhn vo (thng qua RxD), bao gm: 1 bit khi u (0), 8 bit d liu (LSB u tin), 1 bit d liu th 9 c th lp trnh c v 1 bit dng (1). Khi truyn tin i, bit d liu th 9 (TB8) c th c gn gi tr 0 hoc 1. Khi nhn tin, bit d liu th 9 chuyn vo RB8 trong SCON. Tc Baud c th lp trnh c bng 1/32 hoc 1/64 tn s ca b dao ng ch 2. Ch 3 c th c tc Baud kh bin do Timer 1 hoc Timer 2 to ra, tu thuc vo trng thi ca cc bit TCLK v RCLK. Hnh 2.21 (Seriel Port Mode 2) v Hnh 2.22 (Seriel Port Mode 3) l cc s chc nng v th thi gian ca cc ch 2 v 3. Phn nhn tin c t chc ging nh ch 1. Phn truyn tin khc vi ch 1 ch bit th 9 ca thanh ghi dch truyn. Qu trnh truyn tin c khi u bng bt k lnh no m c s dng SBUF nh mt thanh ghi ch. Tn hiu ghi vo SBUF cng np bit TB8 vo v tr bit th 9 ca thanh ghi dch truyn v ch th cho khi iu khin truyn (Tx Control) rng c yu cu phi truyn tin. Qu trnh truyn c bt u ti S1P1 ca chu k my ngay sau thi im trn ca b m chia 16. Do , cc bit c ng b i vi chu k b m chia 16, ch khng phi vi tn hiu ghi vo SBUF. Qu trnh truyn bt u khi tn hiu /SEND c kch hot, v bit khi u c t ti TxD. Sau n tn hiu DATA c kch hot. iu ny cho php m thng ng truyn t thanh ghi dch truyn n u ra TxD. Xung nhp u tin chuyn gi tr 1 (Bit dng) vo v tr bit th 9 ca thanh ghi dch. Cn sau ch cc gi tr 0 c a vo. V vy, khi cc bit d liu dch ra sang phi, th cc gi tr 0 c a vo t bn tri. Khi TB8 v tr u ra ca thanh ghi dch, th bit dng chuyn n bn tri ca TB8, v tt c cc gi tr bn tri ca n u l gi tr 0. iu kin ny ch th cho khi iu khin pht (Tx Control) thc hin php dch cu cng v sau tr SEND v trng thi th ng, ng thi thit lp TI. Thi im ny ng vi chu k ln th 11 (s quay vng ln th 11) ca b m chia 16 sau khi c tn hiu ghi vo SBUF.
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I HC SPKT HNG YN
Hnh 2.21
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I HC SPKT HNG YN
Hnh 2.22
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I HC SPKT HNG YN
Qu trnh nhn tin c khi u bng s pht hin t bin (chuyn trng thi) t 1 v 0 RxD. Vi mc ch m bo tin cy khi trch mu trn RxD, th tc trch mu c ly gp 16 ln tc Baud ca ng truyn (Tn hiu trn RxD c ly mu vi tc gp 16 ln tc Baud ca ng truyn). Khi s chuyn trng thi t 1 v 0 c pht hin, b m chia 16 c ti xc lp (reset) li ngay, v gi tr 1FFh c ghi vo thanh ghi dch u vo. cc phn thi gian th 7, 8 v 9 ca mi bit, b pht hin bit (Bit Detector) s trch mu gi tr ca RxD. Gi tr c chp nhn l gi tr thy t nht 2 trong 3 mu. Phng php ny c thc hin chng nhiu ng truyn. Nu gi tr c chp nhn i vi bit u tin khng phi l 0 (khng phi bit START), th cc mch thu c ti xc lp quay li ch mt t bin t 1 v 0 khc. Nu bit khi u (START) c gi tr hp l th d liu c dch vo thanh ghi dch u vo, v qu trnh nhn tin c tip tc. Khi cc bit d liu thu c i vo t bn phi ca thanh ghi dch, th cc gi tr 1 c dch ra bn tri ca n. Khi bit khi u n v tr tn cng bn tri ca thanh ghi dch ( ch 2 v 3, n l thanh ghi 9 bit), n s ch th cho khi iu khin nhn (Rx Control) thc hin php dch chuyn cui cng, ri np SBUF v RB8, v thit lp RI. Tn hiu np SBUF v RB8, v thit lp RI s c to ra khi v ch khi cc iu kin sau y c tho mn thi im xung nhp cui cng c to ra: 1. RI=0, v 2. Hoc SM2=0, hoc bit STOP nhn c =1 Nu mt trong hai iu kin ny khng c tho mn, th Byte tin nhn c s b mt v RI cng khng c xc lp. Nu c 2 iu kin c tho mn, th bit dng chuyn vo RB8, 8 bit d liu chuyn vo SBUF, v RI c kch hot. Ti thi im ny, bt k cc iu kin trn c tho mn hay khng, th khi iu khin vn quay tr li tip tc chc nng pht hin t bin mi t 1 v 0 trn ng thu tin RxD.
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I HC SPKT HNG YN
2.5.7. Nguyn l khi ng ca On-chip AT89C51:

RST l chn Reset, chnh l u vo ca Trigger Schmitt. Vic Reset c thc hin bng cch gi chn RST mc cao t nht 2 chu k my(24 chu k dao ng), trong khi b dao ng ang lm vic. Khi on-chip s c khi ng li (nh mch reset bn trong n) theo th thi gian (Hnh 2.23. Reset Timing).
Hnh 2.23. t li thi gian cho AT89C51 Tn hiu khi ng li bn ngoi a vo chn RST khng ng b vi xung Clock bn trong. Chn RST c ly mu ti thi im P2S5 ca mi chu k my. Cc chn ca cng s gi hot ng hin hnh ca chng cho 19 chu k dao ng sau khi gi tr logic 1 c ly mu chn RST. Trong khi chn RST mc cao, ALE v /PSEN c y dn ln mc cao. Sau RST c y xung, n s gi 1 n 2 chu k my i vi ALE v /PSEN khi ng xung Clock. V l do ny m cc dch v khc(a t ngoi vo) khng th ng b c vi b thi gian bn trong ca AT89C51. Khi Reset c hiu lc th gi tr ca cc SFR, c m t (Table -Reset Values of SFRs ). Trong thanh ghi SBUF, v mt s bit ca PCON, T2MOD, IE, IP c gi tr bt nh. Cc cht cng t P0P3 c gi tr FFh, SP c gi tr 07h. Cc thanh ghi cn li c gi tr 00h. Ring i vi RAM bn trong On-chip AT89S8252 khi cp ngun hay Reset li khng b tc ng, m ni dung trong RAM c gi tr ngu nhin. Khi ng li cho On-chip c th hot ng trng thi t ng hoc bn t ng .
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I HC SPKT HNG YN
Hnh 2.24. Khi ng t ng cho AT89C51.
Hnh 2.25. Khi ng bn t ng cho.AT89C51
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I HC SPKT HNG YN
Khi ng t ng c th c to ra khi cp ngun in +Vcc cho on-chip bng mch in RC. Sau khi cp ngun, mch RC gi cho chn RST trng thI cao trong thi gian tu thuc vo hng s thi gian ca mch RC. m bo khi ng c on-chip, thi gian chn RST trng thi cao phi ln (Khong ln hn 2 chu k my) mch dao ng chuyn sang trng thi dao ng n nh Nu khi ng bn t ng, sau khi cp ngun mch s t ng Reset nh khi ng t ng. Khi cn khi ng li phi nhn cng tc thng ngt K, thi gian nhn cng tc chn RST phi trng thi cao.
2.5.8. Mch dao ng.
Hnh 2.26. S dng mch dao ng trn On chip
Hnh 2.27. Kt ni mch dao ng

C2=33P
C1=33P
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I HC SPKT HNG YN
Hnh 2.28. Kt ni xung Clock t bn ngoi
Hnh 2.29. Mch dao ng bn trong On chip AT89C51
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I HC SPKT HNG YN
2.5.9. Ch ngun gim v ch ngh

Hnh 2.30. Phn cng phc v ch ngun gim v ch ngh
2.5.11. Bo v chng trnh.

H VK AT89C51 AT89C52 AT89C2051 AT89C1051 Cc bit kho LB1, LB2, LB3 LB1, LB2, LB3 LB1, LB2 LB1, LB2
Kho b nh chng trnh cho h VK AT89C51: Ch 1 2 Loi bo v Khng c c trng kho chng trnh. Cc lnh MOVC c thc thi t b nh chng trnh ngoi, khng c php tm np lnh t b nh ni. EA c ly mu v cht khi reset. Vic lp trnh trn Flash b cm. 3 P P U Nh ch 2, ngoi ra cn cm vic kim tra chng trnh. 4 P P P Nh ch 3, ngoi ra cn cm vic thc thi chng trnh ngoi. Lu : P=Programmed, U = Unprogrammed
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LB1 U P
LB2 U U
LB3 U U
I HC SPKT HNG YN
Chng 3: Tp lnh ca h VK AT89/80C51

B VK c tp lnh c ti u ho ng dng trong cc h thng iu khin, o lng 8 bit. tng kh nng truy xut RAM ni trn cc d liu nh, cc kiu nh a ch c bit c p dng. Ngoi ra tp lnh ca VK cn h tr cc bin 1 bit, cho php qun l bit trc tip trong cc h logic v iu khin bit c yu cu x l bit. Do h VK AT89/80C51 c cc m lnh 8 bit, nn s lnh c th ln n 256 lnh (thc t c 255 lnh, cn 1 lnh cha c nh ngha). Trong 255 byte th bao gm: - 139 lnh 1 byte - 92 lnh 2 byte - 24 lnh 3 byte Mi lnh u c c trng bi m lnh hay cn gi l m my, m gi nh, s byte ca lnh v s chu k my cn thc thi lnh. Cc lnh ca AT89/80C51 chia thnh 5 nhm lnh: - Nhm lnh di chuyn d liu. - Nhm lnh s hc. - Nhm lnh logic. - Nhm lnh r nhnh chng trnh. - Nhm lnh iu khin bin logic.
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I HC SPKT HNG YN
Cc quy c trong cu lnh v a ch:

+ Rn: Thanh ghi R0-R7 ca bng thanh ghi hin hnh ang c chn nh a ch thanh ghi. + Direct: a ch 8 bit ca nh d liu ni tr, n c th l nh trong RAM ni hoc SFR. (00h-FFh) + @Ri: nh 8 bit ca RAM ni c nh a ch gin tip thng qua thanh ghi R0 hc R1. + Source (Src): ton hng ngun, c th l Rn hoc direct hoc @Ri. + Dest: Ton hng ch, c th l Rn hoc direct hoc @Ri. + #Data: Hng s 8 bit cha trong lnh. + #Data16: Hng s 16 bit cha trong lnh. + Bit: Bit c nh a ch trc tip trong RAM ni tr hoc SFR. + Rel: Offset 8 bit c du (t -128 n +127). N c lnh SJMP v cc lnh nhy c iu kin s dng. + Addr11: a ch 11 bit ca b nh chng trnh , c lnh ACALL v AJMP s dng. + Addr16: a ch 16 bit ca 64Kb b nh chng trnh, c lnh LCALL v LJMP s dng.
Mt s ch dn thng gp: ORG (Origin): Ch dn Org bo a ch bt u ca chng trnh. S sau

ca Org c th vit dng m Hexa, nh phn hay thp phn...
EQU (Equate): N c dng nh ngha mt hng s, ngi ta gn cho

nhn bng mt gi tr hng s no v khi nhn xut hin trong chng trnh th nhn s thay cho gi tr hng s . Vy u im ca vic s dng ch dn EQU l khi trong chng trnh m gi tr ca hng s c s dng nhiu ch khc nhau, nay mun thay i gi tr ny th ta ch vic thay mt ln gi tr cho nhn l xong.
END: Ch dn END s bo cho trnh dch bit kt thc mt tp ngun ASM,

tt c nhng lnh sau ch dn END u v ngha v b trnh dch b qua.
Quy nh tn nhn: Tn ca nhn thng dng cc t gi nh v phi l

duy nht khng c trng. C th dng cc ch ci vit hoa hay vit thng, cc du ghch chn, du chm, cc s 0, 1 , 2 , 3 vv... nhng khng c dng cc t kho trng vi cc cu lnh, pha sau ca nhn bao gi cng phi c du 2 chm.
Cc li ch gii: Trong chng trnh m mun c li ch gii th pha

trc li ch gii phi c du chm phy. Tng t nh trong mt chng trnh m
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mun b qua mt cu lnh no pha trc ca cu lnh cng phi c du chm phy.
Cc k hiu dng trong m t lnh: K hiu

<() (( )) rrr dddddddd aaaaaaaa bbbbbbbb i eeeeeeee
ngha
c thay th bi Ni dung ca D liu c tr bi 1 trong 8 thanh ghi (R0-R7) ca cc bng thanh ghi Cc bit d liu Cc bit a ch a ch ca 1 bit nh a ch gin tip thng qua R0 hoc R1 a ch tng i 8 bit
3.1. Nhm lnh di chuyn d liu 3.1.1. Lnh MOV dng Byte:
C php cu lnh: MOV <dest-byte>, <src-byte> Chc nng: Sao chp ni dung ca ton hng ngun vo ton hng ch, ni dung ca ton hng ngun khng thay i. Lnh ny khng lm nh hng ti cc c v cc thanh ghi khc. Cu lnh MOV A, Rn MOV A, direct MOV A, @Ri MOV A, #data MOV Rn, A MOV Rn, direct MOV Rn, #data MOV direct, A MOV direct, Rn MOV direct, direct MOV direct, @Ri MOV direct, #data S byte 1 2 1 2 1 2 2 2 2 3 2 3 Schuk 1 1 1 1 1 2 1 1 2 2 2 2 M lnh 11101rrr 11100101 aaaaaaaa 1110111i 01110100 dddddddd 11111rrr 10101rrr aaaaaaaa 01111rrr dddddddd 11110101 aaaaaaaa 10001rrr aaaaaaaa 10000101 aaaaaaaa aaaaaaaa 1000011i aaaaaaaa 01110101 aaaaaaaa dddddddd
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Hot ng (A)<-(Rn) (A)<-(direct) (A)<-((Ri)) (A)<-#data (Rn)<-(A)) (Rn)<-(direct) (Rn)<-#data (direct)<-(A) (direct)<-(Rn) (direct)<-(direct) (direct)<-((Ri)) (direct)<-#data
I HC SPKT HNG YN
MOV @Ri, A 1 1 1111011i ((Ri))<-(A) MOV @Ri, direct 2 2 1010011i ((Ri))<-(direct) MOV @Ri, #data 2 1 0111011i dddddddd ((Ri))<-#data V d 1: Chuyn ni dung ca R1 vo RAM trong ti a ch 30h. - Cch 1: nh a ch kiu thanh ghi v trc tip MOV 30h, R1 ; (30h) = (R1) - Cch 2: nh a ch kiu trc tip MOV 30h, 01h ; (30h) = (01h) - Cch 3: nh a ch kiu gin tip MOV R0, #30h ; (R0) = 30h MOV @R0, 01h ; ((R0)) = (01h) V d 2: Chuyn ni dung 35h vo RAM trong ti a ch 20h. - Cch 1: nh a ch kiu d liu tc thi v trc tip MOV 20h, #35h ; (20h) = 35 - Cch 2: nh a ch kiu d liu tc thi v gin tip MOV R1,#20h ; (R1) = 20h MOV @R1,#35h ; ((R1)) = 35h
3.1.2. Lnh MOV dng Bit:

C php cu lnh: MOV <dest-bit>, <scr-bit> Chc nng: Chuyn bit d liu dng sao chp ton hng ngun vo ton hng ch. Mt trong 2 ton hng phi l c nh (C), ton hng cn li s l bit bt k c nh a ch trc tip. Lnh khng lm nh hng ti cc thanh ghi khc hoc cc c khc. Cu lnh MOV C, bit MOV bit, C S byte S chu k 2 1 2 2 M lnh 10100010 bbbbbbbb 10010010 bbbbbbbb Hot ng (C)<-(bit) (bit)<-(C)
V d: Thit lp c nh bng lnh MOV MOV A, #80h ; (A) = 80h MOV C, Acc.7 ; (C) =(Acc.7) = 1
3.1.3. Lnh MOV dng Word:

C php cu lnh: MOV DPTR, #data16 Chc nng: Gi tr 16 bit ton hng th 2 trc tip trong cu lnh c np vo thanh ghi DPTR. Hng s 16 bit ny c t byte 2 v byte 3 ca lnh. Byte 2 l byte cao c np cho thanh ghi DPH, byte 3 l byte thp c np vo thanh ghi DPL. Lnh ny khng nh hng ti cc c.
62
I HC SPKT HNG YN
S byte Schu M lnh Hot ng k MOV DPTR,#data16 3 2 10010000 dddddddd (C)<-(bit) V d: Tr DPTR ti vng d liu c a ch bt u l 1020h ` - Cch 1: MOV DPTR,#1020h ; (DPTR) = 1020h - Cch 2: MOV DPH,#10h ; (DPH) = 10h MOV DPL, #20h ; (DPL) = 20h
Cu lnh
3.1.4. Lnh chuyn byte m lnh:

C php cu lnh: MOVC A, @A + <thanh ghi c s> Chc nng: Np cho thanh ghi tch lu byte m lnh t b nh chng trnh. a ch ca byte c tm np trong b nh l tng ni dung ca thanh ghi A 8 bit vi ni dung ca thanh ghi c s 16 bit (c th l DPTR hoc PC - thanh ghi m chng trnh). Trong trng hp sau, PC c tng tr n a ch ca lnh tip theo ((PC)<-(PC+1)) trc khi c cng vi ni dung ca thanh ghi A, cn thanh ghi DPTR khng b thay i. Lnh khng nh hng ti cc c. Cu lnh MOVC A,@A+DPTR MOVC A,@A+PC S S chu byte k 1 2 1 2 M lnh 10010011 10000011 Hot ng (A)<-((A)+(DPTR)) (A)<-((A)+(PC))
V d: Chuyn ni dung ti a ch 1234h trong b nh chng trnh ra cng P1 MOV A, #0 ; (A) = 0 MOV DPTR, #1234h ; (DPTR) = 1234h MOVC A, @A+DPTR ; (A) = ((DPTR)) MOV P1, A ; (P1) = (A)
3.1.5. Lnh chuyn d liu ra ngoi:

C php cu lnh: MOVX <dest-byte>, <src-byte> Chc nng: Chuyn d liu gia thanh ghi tch lu vi b nh ngoi. Cc lnh ny c chia lm 2 loi, mt loi cung cp a ch 8 bit v 1 loi cung cp a ch 16 bit. Nu d liu c chuyn l 8 bit, ni dung ca R0 hoc R1 trong bng thanh ghi hin hnh s cung cp a ch 8 bit a hp vi d liu trn P0. 8 bit a ch ny m ho cho cc cng I/O m rng bn ngoi chip hoc cho 1 dy RAM kch
63
I HC SPKT HNG YN
thc tng i nh. Vi cc dy RAM c kch thc ln hn mt cht, mt vi chn ca cng bt k no c th c s dng to ra cc bit a ch cao. Cc chn ny nn c iu khin bi 1 lnh xut t trc lnh MOVX. Nu d liu c chuyn l 16 bit, th DPTR to ra a ch 16 bit. P2 xut ra 8 bit a ch cao (ni dung ca DPH), cn P0 xut ra 8 bit a ch thp a hp vi d liu.Thanh ghi chc nng c bit P2 duy tr ni dung trc trong khi cc b m xut ca P2 ang pht cc ni dung ca DPH. Dng ny nhanh hn v hiu qu hn khi truy xut nhiu dy d liu rt ln (ln n 64 Kb) do ta khng cn thm lnh thit lp cc cng khc. S S chu M lnh Hot ng Cu lnh byte k MOVX A, @Ri 1 2 11100011 (A)<-((Ri)) MOVX @Ri, A 1 2 11110011 ((Ri))<(A) MOVX A, @DPTR 1 2 11100000 (A)<-((DPTR)) MOVX @DPTR, A 1 2 11110000 ((DPTR))<-(A) V d: Chuyn ni dung 34h vo a ch 1234h RAM ngoi MOV A, #34h ; (A) = 34h MOV DPTR, #1234h ; (DPTR) = 1234h MOVX @DPTR, A ; ((DPTR)) = (A)
3.1.6. Lnh chuyn d liu vo ngn xp:

C php cu lnh: PUSH direct Chc nng: Chuyn s liu c trong cu lnh vo ngn xp. Trc tin, con tr ngn xp (SP) c tng ln 1, sau s liu s c chuyn vo nh ca ngn xp m a ch nh ny c tr bi SP. Ngn xp nm RAM ni tr. Cu lnh PUSH direct S byte 2 S chu k 2 M lnh 11000000 aaaaaaaa Hot ng (SP)<-(SP+1) ((SP))<-(direct)
V d: Ghi gi tr 55h vo a ch 35h ca ngn xp MOV SP,#34h ; (SP) = 34h MOV A, #55h ; (A) = 55h PUSH 0E0h ; (SP) = (SP) + 1 = 35h
64
I HC SPKT HNG YN
; ((SP)) = (A) Ta thy rng, khi lnh PUSH c thc hin th gi tr m SP ang tr s t ng tng ln 1 n v.
3.1.7. Lnh chuyn s liu ra khi ngn xp:

C php cu lnh: POP direct Chc nng: Chuyn ni dung ca ngn xp RAM trong, c a ch c SP tr ti n ni c a ch trc tip trong cu lnh. Sau , con tr ngn xp (SP) c gim i 1. Lnh khng nh hng ti cc c. Cu lnh POP direct S byte 2 S chu k 2 M lnh 11010000 aaaaaaaa Hot ng (direct)<-((SP)) (SP)<-(SP-1)
V d: Chuyn ni dung ti nh ngn xp (c a ch 20h) ra A MOV SP,#20h ; (SP) = 20h POP 0E0h ; (A) = ((SP)) ; (SP) = (SP) -1= 1Fh Sau khi thc hin lnh POP th gi tr ca SP s gim i 1 n v.
3.1.8.Hon chuyn d liu:

C php cu lnh: XCH A, <byte> Chc nng: Hon chuyn ni dung gia thanh ghi A vi thanh ghi hoc b nh c a ch cha trong ton hng th 2 ca cu lnh. Ton hng th 2 c th c nh a ch kiu thanh ghi, thanh ghi trc tip hoc thanh ghi gin tip. Cu lnh XCH A, Rn XCH A, direct XCH A, @Ri S S chu M lnh byte k 1 1 11001rrr 2 1 11000101 aaaaaaaa 1 1 1100011i Hot ng (A)<-->(Rn) (A) <-->(direct) (A) <-->((Ri))
V d: Hon chuyn ni dung ca A vi ni dung ca R1 XCH A, R1 ; (A)<-->(R1)

65
I HC SPKT HNG YN
Sau khi thc hin lnh XCH th ni dung ca A trc y s nm trong thanh ghi R1 cn ni dung ca R1 s c chuyn vo A.
3.1.9.Hon chuyn 4 bit thp:

C php cu lnh: XCHD A, @Ri Chc nng: Hon chuyn 4 bit thp ni dung trong thanh ghi A vi nh ca RAM bn trong, c a ch c nh gin tip qua thanh ghi c ch ra trong lnh. Lnh ny khng nh hng ti trng thi cc c v na cao ca cc thanh ghi trong lnh. Cu lnh XCHD A, @Ri S S chu byte k 1 1 M lnh 1101011i Hot ng (A3-A0)<-->((Ri3-Ri0))
V d: Hon chuyn 4 bit thp ca A vi 4 bit thp ca R5 MOV 30h, R5 ; (30h) = (R5) MOV R0, #30h ; (R0) = 30h XCHD A, @R0 ; (A3-A0)<-->((R0.3-R0.0))
3.2. Nhm lnh tnh ton s hc. 3.2.1. Lnh thc hin php cng.
C php ca cu lnh: ADD A, <scr-byte> Chc nng: Cng gi tr 1 byte a ch c ch ra cu lnh vi ni dung trong thanh ghi tch lu, kt qu c lu vo thanh ghi tch lu. Nu c nh t bit s 7 hoc bit s 3 th c nh hoc c nh ph c thit lp, ngc li cc c nu trn c xo. Khi cng 2 s nguyn khng du m b trn th c nh cng c thit lp cho ta bit php ton b trn. Trng hp thc hin lnh ADD m c nh t bit s 6 nhng khng c nh t bit s 7, hoc c nh t bit s 7 nhng khng c nh t bit s 6 th c trn s c thit lp, ngc li th OV b xo. Khi cng 2 s nguyn c du m tng l 1 s m th OV c thit lp. Cu lnh ADD ADD ADD ADD A, Rn A, direct A, @Ri A, #data S byte 1 2 1 2 S chu k 1 1 1 1 M lnh 00101rrr 00100101 aaaaaaaa 0010011i 00100100 dddddddd
66
Hot ng (A)<- (A) + (Rn) (A)<- (A) + (direct) (A)<- (A) + ((Ri)) (A)<- (A) + #data
I HC SPKT HNG YN
V d: Thc hin php tnh F = 25h + 34h MOV A, #25h ; (A) = 25h ADD A, #34h ; (A) = (A) + 34h = 59h ; (PSW) = 00h
3.2.2. Lnh cng c nh.

C php ca cu lnh: ADDC A, <scr-byte> Chc nng: Cng ng thi ni dung ca 1 byte a ch c ch ra trong cu lnh vi ni dung cha trong thanh ghi tch lu v c nh. Nu c nh t bit s 7 hoc s 3 th c nh hoc c nh ph c thit lp bng 1, ngc li cc c nu trn b xo. Khi cng cc s nguyn khng du m b trn th c nh cng c thit lp. Trng hp thc hin lnh ADDC m c nh t bit s 6 nhng khng nh t bit s 7, hoc c nh t bit s 7 nhng khng nh t bit s 6 th c trn s c thit lp, ngc li c ny b xo. Khi cng cc s nguyn c du m tng l 1 s m th OV c thit lp. S byte S chu k ADDC A, Rn 1 1 ADDC A, direct 2 1 ADDC A, @Ri ADDC A, #data 1 2 1 1 Cu lnh M lnh 00110rrr 00110101 aaaaaaaa 0011011i 00110100 dddddddd Hot ng (A)<- (A) + (C) + (Rn) (A)<- (A) + (C) + (direct) (A)<- (A) + (C) + ((Ri)) (A)<- (A) + (C) + #data
V d: Thc hin php tnh F = 25h + 34h + (C) MOV A, #25h ; (A) = 25h SETB C ; (C) = 1 ADDC A, #34h ; (A) = (A) + 34h + (C) = 5Ah ; (PSW) = 00h
3.2.3. Lnh tr c mn.

C php ca cu lnh: SUBB A, <scr-byte> Chc nng: Tr thanh ghi tch lu cho ton hng th 2 v c nh, kt qu c lu vo thanh ghi tch lu. C nh c t bng 1 nu c s mn c cn n cho bit s 7, ngc li th c nh b xo. C nh ph c thit lp nu c nh cho bit 3. Trng hp thc hin lnh SUBB m c s mn c cn n cho bit
67
I HC SPKT HNG YN
7(khng phi cho bit 6), hoc cho bit 6 (khng phi cho bit 7) th c trn s c thit lp, ngc li th OV b xo. Khi tr cc s nguyn c du m kt qu l 1 s m th OV c thit lp. Cu lnh SUBB A, Rn SUBB A, direct SUBB A, @Ri SUBB A, #data S byte 1 2 1 2 S chu k 1 1 1 1 M lnh 10011rrr 10010101 aaaaaaaa 1001011i 10010100 dddddddd Hot ng (A)<- (A) - (C) - (Rn) (A)<- (A) - (C) - (direct) (A)<- (A) - (C) - ((Ri)) (A)<- (A) - (C) - #data
V d: Thc hin php tnh F = 95h - 34h MOV A, #95h ; (A) = 95h SUBB A, #34h ; (A) = (A) - (C) - 34h = 61h ; (PSW) = 05h
3.2.4. Lnh tng ln 1 n v.

C php ca cu lnh: INC <byte> Chc nng: Tng gi tr ca byte trong cu lnh ln 1 n v. Nu gi tr ban u ca byte l 0FFh, th sau khi thc hin lnh INC ni dung ca byte s l 00h. Lnh ny khng lm nh hng ti trng thi cc c. Cu lnh INC A INC Rn INC direct INC @Ri V d: S byte 1 1 2 1 S chu k 1 1 1 1 M lnh 00000100 00001rrr 00000101 aaaaaaaa 0000011i Hot ng (A)<- (A) + 1 (Rn)<- (Rn) + 1 (direct)<- (direct) + 1 ((Ri))<- ((Ri)) + 1
Tng ni dung ti a ch FEh ca RAM ni ln 2 n v MOV INC R1,#0FEh @R1

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; (R1) = 0FEh ; (0FEh) = (0FEh) +1
I HC SPKT HNG YN
Gio trnh: K thut Vi iu Khin @R1 ; (0FEh) = (0FEh) +1
INC
3.2.5. Lnh gim 1 n v.

C php ca cu lnh: DEC <byte> Chc nng: Gim gi tr ca byte trong cu lnh xung 1 n v. Nu gi tr ban u ca byte l 00h, th sau khi thc hin lnh DEC ni dung ca byte s l 0FFh. Lnh ny khng lm nh hng ti trng thi cc c. Cu lnh DEC A DEC Rn DEC direct DEC @Ri V d: S byte 1 1 2 1 S chu k 1 1 1 1 M lnh 00010100 00011rrr 00010101 aaaaaaaa 0001011i Hot ng (A)<- (A) - 1 (Rn)<- (Rn) - 1 (direct)<- (direct) - 1 ((Ri))<- ((Ri)) - 1
Gim ni dung ti a ch 7Eh ca RAM ni i 2 n v DEC DEC 7Eh 7Eh ; (7Eh) = (7Eh) -1 ; (0FEh) = (7Eh) -1
3.2.6. Lnh tng con tr d liu.

C php ca cu lnh: INC DPTR Chc nng: Tng con tr d liu ln 1 n v. Khi byte thp ca con tr d liu b trn, th byte cao ca con tr d liu tng ln 1 n v. Lnh ny khng nh hng ti trng thi cc c. Cu lnh INC DPTR S byte 1 S chu k 2 M lnh 10100011 Hot ng (DPTR)<- (DPTR) + 1
V d: Tng ni dung ca DPTR ln 2 n v INC DPTR ; (DPTR) = (DPTR) +1 INC DPTR ; (DPTR) = (DPTR) +1
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I HC SPKT HNG YN
3.2.7. Lnh thc hin php nhn.

C php ca cu lnh: MUL AB Chc nng: Nhn cc s nguyn khng du 8 bit trong thanh ghi tch lu vi thanh ghi B. Byte thp ca kt qu 16 bit c lu trong thanh ghi tch lu, cn byte cao c lu trong thanh ghi B. Nu kt qu ln hn 0FFh th c trn c thit lp, c nh lun b xo. Cu lnh S byte S chu k MUL AB 1 4 M lnh 10100100 Hot ng (B)<- byte cao ca (A)x(B) (A)<- byte thp ca (A)x(B)
V d: Thc hin php tnh F = 80h x 90h MOV A, #80h ; (A) = 80h = 128 MOV B,#90h ; (B) = 90h = 144 MUL AB ; (A) = 00h v (B) = 48h ; F = 4800h = 18432 ; (PSW) = 04h
3.2.8. Lnh thc hin php chia.

C php ca cu lnh: DIV AB Chc nng: Chia s nguyn khng du 8 bit trong thanh ghi tch lu cho s nguyn khng du 8 bit trong thanh ghi B. Thng s c lu trong thanh ghi tch lu, cn s d c lu trong thanh ghi B. C trn v c nh b xo. Cu lnh DIV AB S byte S chu k 1 4 M lnh 10000100 Hot ng (A)<- thng ca (A)/(B) (B)<- s d ca (A)/(B)
V d: Thc hin php tnh F = 65 : 15 MOV A, #65 ; (A) = 65 = 41h MOV B,#15 ; (B) = 15 = 0Fh DIV AB ; (A) = 04h v (B) = 05h ; F = 4 d 5 ; (PSW) = 01h
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I HC SPKT HNG YN
3.2.9. Hiu chnh s thp phn.

C php ca cu lnh: DA A Chc nng: Hiu chnh thp phn ni dung 8 bit trong thanh ghi A sau khi thc hin php cng. Nu 4 bit thp trong thanh ghi A c gi tr ln hn 9 hoc c nh ph c thit lp th phi cng thm 6 vo thanh ghi A cho ch s thp phn c chnh xc. Php cng ny s t c nh nu s nh t 4 bit thp chuyn n tt c 4 bit cao, ngc li php ton khng xo c nh. Nu 4 bit cao trong thanh ghi A c gi tr ln hn 9 hoc c nh (CF) c thit lp, th cng phi cng thm 6 vo thanh ghi A. Cu lnh DA A M t hot ng: - Nu [[(A3-A0)>9]hoc[(AC)=1]] th (A3-A0)<-( A3-A0) + 6 - Nu [[(A7-A4)>9]hoc[(C)=1]] th (A7-A4)<-( A7-A4) + 6 V d: Hiu chnh s thp phn sau khi thc hin php cng c nh. MOV A,#56h ; (A) = 56h SETB C ; (C) = 1 ADDC A,#67h ; (A) = 56h + (C) + 67h = 0BEh DA A ; Eh+6= 4 nh 1 ; Bh+6+1 (gi nh) = 2 nh 1 ; (C) = 1 ; (A) = 24h v ch ra cc digit dng BCD ca s thp phn 24 S byte S chu k 1 1 M lnh 11010100
3.3. Nhm lnh tnh ton logic. 3.3.1. Lnh AND cho cc bin 1 byte.
C php cu lnh: ANL <dest-byte>, <src-byte> Chc nng: Thc hin php ton logic AND theo mc bit gia cc bin di 1 byte cho, kt qu c lu vo ton hng ch. Ton hng ngun cho php 6 ch a ch ho. Khi ton hng ch l thanh ghi tch lu th ton hng ngun c th l thanh ghi, trc tip, thanh ghi-gin tip hoc tc thi. Khi ton hng ch l a ch trc tip th ton hng ngun c th l thanh ghi tch lu hoc d liu tc thi. Lnh ny khng lm nh hng ti trng thi cc c.
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I HC SPKT HNG YN
Gio trnh: K thut Vi iu Khin M lnh 01011rrr 01010101 aaaaaaaa 0101011i 01010100 dddddddd 01010010 aaaaaaaa 01010011 aaaaaaaa dddddddd Hot ng (A)<-(A) AND (Rn) (A)<-(A) AND (dir.) (A)<- (A) AND ((Ri)) (A)<- (A) AND #data (dir.)<-(dir.)AND (A) (dir.)<(dir.)AND#data
Cu lnh ANL ANL ANL ANL ANL ANL
S S chu byte k A, Rn 1 1 A, direct 2 1 A, @Ri 1 1 A, #data 2 1 direct, A 2 1 direct, #data 3 2
V d: Thc hin php AND logic gia 2 Byte 54h v 67h MOV A, #54h ; (A) = 54h ANL A, #67h ; (A) = 54h AND 67h = 44h
3.3.2. Lnh AND cho cc bin 1 bit

C php cu lnh: ANL C, <src-bit> Chc nng: Thc hin php tnh logic AND cho cc bin mc bit. Nu gi tr logic ca ton hng ngun bng 0, th c nh b xo. Du / ng trc 1 ton hng cho bit bit ngun c ly b trc khi thc hin AND vi c nh nhng gi tr ca bit ngun khng b thay i bi thao tc ly b. Lnh ny khng lm nh hng ti trng thi cc c khc. Ton hng ngun ch c s dng kiu nh a ch trc tip. Cu lnh ANL C, bit ANL C, /bit S byte 2 2 S chu M lnh Hot ng k 2 10000010 bbbbbbbbb (C)<-(C) AND (bit) 2 10110000 bbbbbbbbb (C)<-(C) AND NOT (bit)
V d: Thc hin cng AND Logic vi 2 u vo (P1.0 v P1.1) v 1 u ra (P1.2) MOV ANL MOV C, P1.0 C, P1.1 P1.2, C ; (C) = (P1.0) ; (C) = (P1.0) AND (P1.1) ; (P1.2) = (C)
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I HC SPKT HNG YN
3.3.3. Lnh OR cho cc bin 1 byte

C php cu lnh: ORL <dest-byte>, <src-byte> Chc nng: Thc hin php ton logic OR theo mc bit gia cc bin di 1 byte cho, kt qu c lu vo ton hng ch. Ton hng ngun cho php 6 ch a ch ho. Khi ton hng ch l thanh ghi tch lu th ton hng ngun c th l thanh ghi, trc tip, thanh ghi-gin tip hoc tc thi. Khi ton hng ch l a ch trc tip th ton hng ngun c th l thanh ghi tch lu hoc d liu tc thi. Lnh ny khng lm nh hng ti trng thi cc c. Cu lnh ORL ORL ORL ORL ORL ORL S S chu byte k A, Rn 1 1 A, direct 2 1 A, @Ri 1 1 A, #data 2 1 direct, A 2 1 direct, #data 3 2 M lnh 01001rrr 01000101 aaaaaaaa 0100011i 01000100 dddddddd 01000010 aaaaaaaa 01000011 aaaaaaaa dddddddd Hot ng (A)<-(A) OR (Rn) (A)<-(A) OR (dir.) (A)<- (A) OR ((Ri)) (A)<- (A) OR #data (dir.)<-(dir.) OR (A) (dir.)<(dir.) OR #data
V d: Thc hin php OR logic gia 2 Byte 55h v 0A5h MOV A, #55h ; (A) = 55h ORL A, #0A5h ; (A) = 55h OR 0A5h = 0F5h
3.3.4. Lnh OR cho cc bin 1 bit

C php cu lnh: ORL C, <src-bit> Chc nng: Thc hin php tnh logic OR cho cc bin mc bit. Nu gi tr logic ca ton hng ngun bng 1, th c nh c thit lp. Du / ng trc 1 ton hng cho bit bit ngun c ly b trc khi thc hin OR vi c nh nhng gi tr ca bit ngun khng b thay i bi thao tc ly b. Lnh ny khng lm nh hng ti trng thi cc c khc. Cu lnh ORL C, bit ORL C, /bit S byte 2 2 S chu M lnh Hot ng k 2 01110010 bbbbbbbbb (C)<-(C) OR (bit) 2 10100000 bbbbbbbbb (C)<-(C) OR NOT (bit)
73
I HC SPKT HNG YN
V d: Thc hin cng OR Logic vi 2 u vo (P1.0 v P1.1) v 1 u ra (P1.2) MOV C, P1.0 ; (C) = (P1.0) ORL C, P1.1 ; (C) = (P1.0) OR (P1.1) MOV P1.2, C ; (P1.2) = (C)
3.3.5. Lnh X-OR cho cc bin 1 byte

C php cu lnh: XRL <dest-byte>, <src-byte> Chc nng: Thc hin php ton logic X-OR theo mc bit gia cc bin di 1 byte cho, kt qu c lu vo ton hng ch. Ton hng ngun cho php 6 ch a ch ho. Khi ton hng ch l thanh ghi tch lu th ton hng ngun c th l thanh ghi, trc tip, thanh ghi-gin tip hoc tc thi. Khi ton hng ch l a ch trc tip th ton hng ngun c th l thanh ghi tch lu hoc d liu tc thi. Lnh ny khng lm nh hng ti trng thi cc c. Cu lnh S S chu M lnh Hot ng byte k XRL A, Rn 1 1 01101rrr (A)<-(A) XOR (Rn) XRL A, direct 2 1 01100101 aaaaaaaa (A)<-(A) XOR (dir.) XRL A, @Ri 1 1 0110011i (A)<- (A) XOR ((Ri)) XRL A, #data 2 1 01100100 (A)<- (A) XOR #data dddddddd XRL direct, A 2 1 01100010 aaaaaaaa (dir.)<-(dir.)XOR (A) XRL direct, #data 3 2 01100011 aaaaaaaa (dir.)<(dir.) XOR #data dddddddd V d: Thc hin hm khc du gia 2 Byte 67h v 78h MOV A, #67h ; (A) = 67h XRL A, #78h ; (A) = 67h XOR 78h = 1Fh
3.3.6. Lnh dch tri thanh ghi A

C php cu lnh: RL A Chc nng: Ni dung trong thanh ghi A c dch tri 1 bit. Bit 7 c quay n v tr ca bit 0. Cc c khng b nh hng. Cu lnh RL A S S chu byte k 1 1 M lnh Hot ng
00100011 (An+1) <- (An), vi n = 06 (A0) <- (A7)

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I HC SPKT HNG YN
V d: MOV RL A, #11111110b A ; (A) = 11111110b ; (A) = 11111101b
3.3.7. Lnh dch tri thanh ghi A cng vi c nh

C php cu lnh: RLC A Chc nng: Ni dung trong thanh ghi A v c nh cng c dch tri 1 bit. Bit 7 c chuyn n c nh v trng thi ban u ca c nh c a v bit 0. Cc c khc khng b nh hng. Cu lnh RLC A S S chu byte k 1 1 M lnh Hot ng
00110011 (An+1) <- (An), vi n = 06 (A0) <- (C) (C) <- (A7)
V d: MOV MOV RLC A, #11111110b C, ACC.0 A ; (A) = 11111110b ; (C) = 0 ; (A) = 11111100b ; (C) = 1
3.3.8. Lnh dch phi thanh ghi A.

C php cu lnh: RR A Chc nng: Ni dung trong thanh ghi A c dch sang phi 1 bit. Bit 0 c quay n v tr ca bit 7. Cc c khng b nh hng. Cu lnh RR A S S chu byte k 1 1 M lnh Hot ng
00000011 (An) <- (An+1), vi n = 06 (A7) <- (A0)
V d: MOV RR A, #01111111b A ; (A) = 01111111b ; (A) = 10111111b
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I HC SPKT HNG YN
3.3.9. Lnh dch phi thanh ghi A cng vi c nh

C php cu lnh: RRC A Chc nng: Ni dung trong thanh ghi A v c nh cng c dch phi 1 bit. Bit 0 c chuyn n c nh v trng thi ban u ca c nh c a v bit 7. Cc c khc khng b nh hng. Cu lnh RRC A S S chu byte k 1 1 M lnh Hot ng
00010011 (An) <- (An+1), vi n = 06 (A7) <- (C) (C) <- (A0)
V d: MOV MOV RRC A, #01111111b C, ACC.7 A ; (A) = 01111111b ; (C) = 0 ; (A) = 00111111b ; (C) = 1
3.3.10. Lnh hon chuyn ni dung hai na byte ca A

C php cu lnh: SWAP A Chc nng: hon chuyn ni dung 2 na thp v cao (mi na 4 bit) ca thanh ghi A (cc bit t 0 n 3 v cc bit t 4 n 7). Thao tc ny cn c hiu l quay thanh ghi A 4 bit. Cc c khng b nh hng. Cu lnh SWAP A S S chu byte k 1 1 M lnh 11000100 Hot ng (A3-A0) <- (A7-A4)
V d: Tro i ni dung 2 na thp v cao ca Byte 56h MOV A, #56h ; (A) = 56h = 01010110b SWAP A ; (A) = 65h = 01100101b
3.4. Nhm lnh r nhnh chng trnh. 3.4.1. Lnh gi tuyt i.

C php cu lnh: ACALL
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addr11
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Chc nng: Gi khng iu kin mt chng trnh con t ti a ch c ch ra trong cu lnh. Lnh ny tng b m chng trnh thm 2 n v PC cha a ch ca lnh k lnh ACALL, sau ct ni dung 16 bit ca PC vo ngn xp (byte thp ct trc) v tng con tr ngn xp ln 2 n v. a ch ch s c hnh thnh bng cch ghp 5 bit cao ca thanh ghi PC (sau khi c tng), 3 bit cao ca byte m lnh v byte th 2 ca lnh. Do chng trnh con c gi phi nm trong on 2 Kbyte ca b nh chng trnh ch it phi cha lnh u tin ca chng trnh con ny. Lnh khng lm nh hng ti cc c. Cu lnh S byte S chu k M lnh Hot ng (PC) <- (PC) + 2 (SP) <- (SP) + 1 ((SP)) <- (PC7-PC0) (SP) <- (SP) + 1 ((SP)) <- (PC15-PC8) (PC10-PC0) <- (page address)
ACALL addr11
aaa10001 aaaaaaaa
V d:
.Ch M lnh 0000 0000 0003 0005 Chng trnh $INCLUDE(REG51.INC) ORG 0000H MOV SP,#07H MOV R1,#01H ACALL GIAM_R1 ; (PC) = (PC) +2 = 0007h ; (SP) = (SP) + 1 = 08h ; (08h) = (PCL) = 07h ; (SP) = (SP) + 1 = 09h ; (09h) = (PCH) = 00h ; (PC) = 0030h STOP: JMP STOP
758107 7901 1130
; Bt u ch.trnh ti /c 0000h ; (SP) = 07h ; (R1) = 01h ; Gi ch.trnh con GIAM_R1
0007 0030 0030 0031
80FE 19 22
; Nhy ti ch
ORG 0030H GIAM_R1: DEC R1 ; Gim R1 i 1 n v RET ; Quay tr li ch.trnh chnh ; (PCH) = ((SP)) = (09h) = 00h ; (SP) = (SP) - 1 = 08h ; (PCL) = ((SP)) = (08h) = 07h ; (SP) = (SP) - 1 = 07h END
3.4.2. Lnh gi di.

C php cu lnh: LCALL
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addr16
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Chc nng: Gi mt chng trnh con t ti a ch c ch ra trong cu lnh. Lnh ny tng b m chng trnh thm 3 n v PC cha a ch ca lnh k lnh LCALL, sau ct ni dung 16 bit ca PC vo ngn xp (byte thp ct trc) v tng con tr ngn xp ln 2 n v. Tip theo n s chuyn byte th 2 v byte th 3 trong cu lnh LCALL vo byte cao v byte thp ca PC. Vic thc thi chng trnh tip tc vi lnh a ch ny. Nh vy chng trnh con c th bt u bng bt c ni no trong khng gian b nh chng trnh 64 Kbyte. Lnh khng lm nh hng ti cc c. Cu lnh LCALL addr16
S byte S chu k
Hot ng (PC) <- (PC) + 3 00010010 aaaaaaaa (SP) <- (SP) + 1 aaaaaaaa ((SP)) <- (PC7-PC0) (SP) <- (SP) + 1 ((SP)) <- (PC15PC8) (PC) <- addr15addr0
M lnh
V d:
.Ch M lnh 0000 0000 0003 0005 Chng trnh $INCLUDE(REG51.INC) ORG 0000H MOV SP,#07H MOV R1,#01H LCALL GIAM_R1 ; (PC) = (PC) +3 = 0008h ; (SP) = (SP) + 1 = 08h ; (08h) = (PCL) = 08h ; (SP) = (SP) + 1 = 09h ; (09h) = (PCH) = 00h ; (PC) = 1130h STOP: JMP STOP
758107 7901 121130
; Bt u ch.trnh ti /c 0000h ; (SP) = 07h ; (R1) = 01h ; Gi ch.trnh con GIAM_R1
0008 1130 1130 1131
80FE 19 22
ORG 1130H GIAM_R1: DEC R1 ; Gim R1 i 1 n v RET ; Quay tr li ch.trnh chnh ; (PCH) = ((SP)) = (09h) = 00h ; (SP) = (SP) - 1 = 08h ; (PCL) = ((SP)) = (08h) = 08h ; (SP) = (SP) - 1 = 07h END ; Kt thc chng trnh 78
I HC SPKT HNG YN
3.4.3. Lnh quay tr li t chng trnh con.

C php cu lnh: RET Chc nng: Tr v t chng trnh con. Lnh ny c thc hin sau khi thc hin xong lnh ACALL hoc LCALL. RET ly li byte cao v byte thp ca PC t ngn xp, gim SP I 2 n v. Chng trnh tip tc c thc hin vi lnh c a ch trong PC. Cc c khng b nh hng. Cu lnh RET S S chu byte k 1 2 M lnh 00100010 Hot ng (PC15-PC8) <- ((SP)) (SP) <- (SP) - 1 (PC7-PC0) <- ((SP)) (SP) <- (SP) - 1
V d: Xem cc phn 3.4.1 v 3.4.2
3.4.4. Lnh quay tr li t ngt.

C php cu lnh: RETI Chc nng: Tr v t chng trnh con. RETI ly li byte cao v byte thp ca PC t ngn xp, phc hi logic ngt c th nhn cc ngt khc c cng mc u tin ngt vi ngt c x l, sau gim SP i 2 n v. Chng trnh tip tc c thc hin vi lnh trc khi x l ngt vi a ch trong PC. Cc c khng b nh hng. Cu lnh RETI S S chu byte k 1 2 M lnh 00110010 Hot ng (PC15-PC8) <- ((SP)) (SP) <- (SP) - 1 (PC7-PC0) <- ((SP)) (SP) <- (SP) - 1
V d: Tng t nh lnh RET
3.4.5. Lnh nhy gin tip.

C php cu lnh: JMP @A+DPTR Chc nng: Cng gi tr khng du 8 bit ca thanh ghi A vi con tr d liu 16 bit v np kt qu vo b m chng trnh, kt qu ny chnh l a ch np
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I HC SPKT HNG YN
lnh k tip. Vic cng 16 bit c thc hin: S nh t 8 bit thp c truyn n tt c cc bit cao. C 2, thanh ghi A v DPTR u khng b thay i. Lnh ny khng nh hng ti trng thi cc c. S S chu byte k JMP @A+DPTR 1 2 Cu lnh M lnh 01110011 Hot ng (PC)<-(A)+(DPTR)
V d: Nhy ti cu lnh c a ch 1002h trong chng trnh

ORG MOV MOV JMP ORG MOV MOV END 0000h DPTR,#1000h A, #2 @A+DPTR 1000h R1,#55h R1,#45h ; (DPTR) = 1000h ; (A) = 2 ; (PC) = 1002h
1000h: 1002h:
; (R1) = 55h ; Dng lnh ny khng c thc thi ; (R1) = 45h
3.4.6. Lnh nhy nu 1 bit c thit lp.

C php cu lnh: JB bit, rel Chc nng: Nu bit cho c gi tr bng 1 th n nhy ti a ch xc nh trong cu lnh, ngc li th lnh ny c b qua v n s tip tc thc hin lnh k tip. a ch ch c tnh bng cch cng thm lch c du (tng i) trong byte th 3 ca lnh vi ni dung trong PC (sau khi c tng n a ch ca byte u tin ca lnh k tip). Bit c kim tra khng b thay i, lnh khng nh hng ti cc c. Cu lnh JB bit, rel S S chu M lnh Hot ng byte k 3 2 00100000 bbbbbbbbb (PC)<-(PC)+3 eeeeeeee Nu (bit)=1 th: (PC)<-(PC) + rel
V d: Thay i ni dung ca cng P1 theo trng thi ca bit P0.0, nh sau: - Nu P0.0 = 0 th P1 = 00h - Nu P0.0 = 1 th P1 = 0FFh ORG 0000h
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I HC SPKT HNG YN
Gio trnh: K thut Vi iu Khin P0.0, nhan1 P1,#00h lap P1,#0FFh lap
Lap:
JB MOV JMP MOV JMP END
Nhan1:
3.4.7. Lnh nhy nu 1 bit khng c thit lp.

C php cu lnh: JNB bit, rel Chc nng: Nu bit cho c gi tr bng 0 th n nhy ti a ch xc nh trong cu lnh, ngc li th lnh ny c b qua v n s tip tc thc hin lnh k tip. a ch ch c tnh bng cch cng thm lch c du (tng i) trong byte th 3 ca lnh vi ni dung trong PC (sau khi c tng n a ch ca byte u tin ca lnh k tip). Bit c kim tra khng b thay i, lnh khng nh hng ti cc c. Cu lnh JNB bit, rel S S chu M lnh Hot ng byte k 3 2 00110000 bbbbbbbbb (PC)<-(PC)+3 eeeeeeee Nu (bit)=0 th: (PC)<-(PC) + rel
V d: Thay i ni dung ca cng P1 theo trng thi ca bit P0.0, nh sau: - Nu P0.0 = 0 th P1 = 00h - Nu P0.0 = 1 th P1 = 0FFh ORG JNB MOV JMP MOV JMP END 0000h P0.0, nhan1 P1,#0FFh lap P1,#00h lap
Lap:
Nhan1:
3.4.8. Lnh nhy nu 1 bit c thit lp v xo bit .

C php cu lnh: JBC bit, rel
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I HC SPKT HNG YN
Chc nng: Nu bit cho c gi tr bng 1 th n nhy ti a ch xc nh trong cu lnh v xo bit ny, ngc li n s tip tc thc hin lnh tip theo. a ch ch c tnh bng cch cng thm lch c du (tng i) trong byte th 3 ca lnh vi ni dung trong PC (sau khi c tng n a ch ca byte u tin ca lnh k tip). Lnh khng nh hng ti cc c. Cu lnh JBC bit, rel M lnh S S chu Hot ng byte k 3 2 00010000 bbbbbbbbb (PC)<-(PC)+3 eeeeeeee Nu (bit)=1 th: (bit)<- 0 (PC)<- (PC) + rel ORG MOV JBC MOV JMP MOV JMP END 0000h A,#10101010b ACC.1, nhan1 P1,#02h $ P1,#01h $
V d: ; (A) = 0AAh ; So snh v nhy ; (P1) = 02h ; Nhy ti ch ; (P1) = 01h ; Nhy ti ch ; Kt thc chng trnh
Nhan1:
Do (ACC.1) = 1 nn (P1) = 01h v (A) = 10101000b 3.4.9. Lnh nhy nu c nh c thit lp.
C php cu lnh: JC rel Chc nng: Nu c CF c gi tr bng 1 th n nhy ti a ch xc nh trong cu lnh, ngc li th lnh ny c b qua v n s tip tc thc hin lnh k tip. a ch ch c tnh bng cch cng thm lch c du (tng i) trong byte th 2 ca lnh vi ni dung trong PC (sau khi c tng bi 2). Lnh khng nh hng ti cc c. Cu lnh JC rel S S chu byte k 2 2 M lnh 01000000 eeeeeeee Hot ng (PC)<-(PC)+2 Nu (C)=1 th: (PC)<- (PC) + rel
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V d: tng t nh lnh JB bit,rel. Tuy nhin lnh ny ch dng so snh vi gi tr ca c nh.
3.4.10. Lnh nhy nu c nh khng c thit lp.

C php cu lnh: JNC rel Chc nng: Nu c CF c gi tr bng 0 th n nhy ti a ch xc nh trong cu lnh, ngc li th lnh ny c b qua v n s tip tc thc hin lnh k tip. a ch ch c tnh bng cch cng thm lch c du (tng i) trong byte th 2 ca lnh vi ni dung trong PC (sau khi c tng bi 2). Lnh khng nh hng ti cc c. Cu lnh JNC rel S S chu byte k 2 2 M lnh 01010000 eeeeeeee Hot ng (PC)<-(PC)+2 Nu (C)=0 th: (PC)<- (PC) + rel
V d: tng t nh lnh JNB bit,rel. Tuy nhin lnh ny ch dng so snh vi gi tr ca c nh.
3.4.11. Lnh nhy nu thanh ghi A bng 0.

C php cu lnh: JZ rel Chc nng: Nu tt c cc bit ca thanh ghi A c gi tr bng 0 th n nhy ti a ch xc nh trong cu lnh, ngc li n s tip tc thc hin lnh tip theo. a ch ch c tnh bng cch cng thm lch c du (tng i) trong byte th 2 ca lnh vi ni dung trong PC (sau khi c tng bi 2). Lnh khng nh hng ti cc c. Ni dung thanh ghi A khng b thay i. Cu lnh JZ rel S S chu byte k 2 2 M lnh 01100000 eeeeeeee Hot ng (PC)<-(PC)+2 Nu (A)=0 th: (PC)<- (PC) + rel
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V d: ORG MOV MOV JZ DEC JMP INC JMP END 0000h A, #0 R1,#5 nhan1 R1 $ R1 $ ; Bt u chng trnh ti /c 0000h ; (A) = 00h ; (R1) = 5 ; Nhy ti nhan1 nu (A) = 0 ; Gim R1 i 1 n v ; Nhy ti ch ; Tng ni dung R1 ln 1 n v ; Nhy ti ch ; Kt thc chng trnh
Nhan1:
Kt qu: Do (A) = 0 nn (R1) = 6. 3.4.12. Lnh nhy nu thanh ghi A khc 0.

C php cu lnh: JNZ rel Chc nng: Nu c 1 hoc nhiu bit ca thanh ghi A c gi tr bng 1 th n nhy ti a ch xc nh trong cu lnh, ngc li n s tip tc thc hin lnh tip theo. a ch ch c tnh bng cch cng thm lch c du (tng i) trong byte th 2 ca lnh vi ni dung trong PC (sau khi c tng bi 2). Lnh khng nh hng ti cc c. Ni dung thanh ghi A khng b thay i. Cu lnh S S chu M lnh Hot ng byte k JNZ rel 2 2 01110000 eeeeeeee (PC)<-(PC)+2 Nu (A) < > 0 th: (PC)<- (PC) + rel V d: ORG MOV MOV JNZ DEC JMP INC JMP END 0000h A, #0 R1,#5 nhan1 R1 $ R1 $ ; Bt u chng trnh ti /c 0000h ; (A) = 00h ; (R1) = 5 ; Nhy ti nhan1 nu (A) khc 0 ; Gim R1 i 1 n v ; Nhy ti ch ; Tng ni dung R1 ln 1 n v ; Nhy ti ch ; Kt thc chng trnh
Nhan1:
Kt qu: Do (A) khc 0 nn (R1) = 4. 3.4.13. Lnh nhy khi so snh 2 ton hng.
C php cu lnh: CJNE
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<dest-byte>, <src-byte>, rel
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Chc nng: So snh gi tr ca 2 ton hng u tin, nu 2 ton hng khng bng nhau th chng trnh c r nhnh. a ch ch r nhnh c tnh bng cch cng lch tng i (c du) trong byte sau cng ca lnh vi ni dung ca PC (sau khi ni dung ca PC c tng n a ch bt u ca lnh k tip CJNZ). C nh (CF) s c thit lp nu nh gi tr nguyn khng du ca ton hng ch nh hn gi tr nguyn khng du ca ton hng ngun, ngc li th c ny b xo. Lnh ny khng lm thay i gi tr ca cc ton hng Cu lnh CJNE A, direct, rel S S M lnh Hot ng byte chu k 3 2 10110101 (PC)<-(PC)+3 aaaaaaaa Nu (A) < > (dir.) th: eeeeeeee (PC)<- (PC) + offset Nu (A) < (dir.) th: (C) <- 1, ngc li: (C) <- 0 3 2 10110100 (PC)<-(PC)+3 dddddddd Nu (A) < > #data th: (PC)<- (PC) + offset eeeeeeee Nu (A) < #data th: (C) <- 1, ngc li: (C) <- 0 3 2 10111rrr (PC)<-(PC)+3 dddddddd Nu (Rn)< >#data th: eeeeeeee (PC)<- (PC) + offset Nu (Rn) < #data th: (C) <- 1, ngc li: (C) <- 0 3 2 1011011i (PC)<-(PC)+3 dddddddd Nu ((Ri))< >#data th: (PC)<- (PC) + offset eeeeeeee Nu ((Ri)) < #data th: (C) <- 1, ngc li: (C) <- 0
CJNE A, #data, rel
CJNE Rn, #data, rel
CJNE @Ri, #data, rel
V d: Dch tri thanh ghi A 7 ln. MOV R1,#0

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; t gi tr ban u cho bin m
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Gio trnh: K thut Vi iu Khin A,#01h A R1 R1,#7,lap ; t gi tr ban u cho A ; Dch tri A ; Tng bin m ln 1 n v ; Kim tra s ln dch tri A ; Kt thc chng trnh
MOV Lap: RL INC CJNE END
3.4.14. Lnh gim v nhy.

C php cu lnh: DJNZ <byte>, <rel-address> Chc nng: Gim nh i 1 v nhy ti a ch cho bi ton hng th 2 nu nh kt qu khc 0. Nu kt qu ban u l 00h th n chuyn qua 0FFh. a ch ch c tnh bng cch cng thm lch c du trong byte lnh cui cng vi ni dung ca PC (sau khi tng PC ti byte u tin ca lnh tip theo). Ngn nh c gim gi tr c th l 1 thanh ghi hoc 1 byte a ch trc tip. Lnh ny khng nh hng ti trng thi cc c. Cu lnh DJNZ Rn, rel S S M lnh byte chu k 2 2 11011rrr eeeeeeee Hot ng
DJNZ Direct, rel
(PC)<-(PC)+2 (Rn)<- (Rn) - 1 Nu (Rn) < > 0 th: (PC) <- (PC) + rel 11010101 (PC)<-(PC)+2 aaaaaaaa (dir.)<- (dir.) - 1 eeeeeeee Nu (dir.) < > 0 th: (PC) <- (PC) + rel
V d: Dch tri thanh ghi A 7 ln. MOV R1,#7 MOV A,#01h Lap: RL A DJNZ R1,lap END
; t gi tr ban u cho bin m ; t gi tr ban u cho A ; Dch tri A ; Kim tra s ln dch tri A ; Kt thc chng trnh
3.4.15. Lnh tm ngng hot ng.

C php cu lnh: NOP Chc nng: Tm ngng hot ng khi c lnh ny v chng trnh s tip tc c thc hin lnh tip theo. Lnh ny khng nh hng ti trng thi cc thanh ghi v cc c.
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Cu lnh NOP
S S M lnh byte chu k 1 1 00000000
Hot ng (PC)<-(PC)+2
V d: To ra mt xung c mc thp ti bit P1.0 chnh xc 4 chu k my. CLR P1.0 ; (P1.0) = 0 NOP ; tm ngng hot ng NOP NOP SETB P1.0 ; (P1.0) = 1
3.5. Nhm lnh iu khin bin logic. 3.5.1. Lnh xo bit

C php cu lnh: CLR bit Chc nng: Xo bit c ch ra trong cu lnh v 0. Lnh ny c th thao tc trn c nh, hoc trn 1 bit bt k c nh a ch trc tip. Lnh khng lm nh hng ti trng thi cc c. Cu lnh CLR C CLR bit S S chu byte k 1 1 2 1 M lnh 11000011 11000010 bbbbbbbb Hot ng (C) <- 0 (bit) <- 0
3.5.2. Lnh xo thanh ghi tch lu

C php cu lnh: CLR A Chc nng: Xo tt c cc bit ca thanh ghi tch lu v 0. Cc c khng b nh hng. Cu lnh S byte S chu k M lnh Hot ng CLR A 1 1 11100100 (A) <- 0 V d: MOV A,#12h ; (A) = 12h CLR A ; (A) = 00h
3.5.3. Lnh thit lp bit

C php cu lnh: SETB bit Chc nng: Thit lp bit c ch ra trong cu lnh ln mc logic 1. Lnh ny c th thao tc trn c nh, hoc trn 1 bit bt k c nh a ch trc tip. Lnh khng lm nh hng ti trng thi cc c.
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I HC SPKT HNG YN
Gio trnh: K thut Vi iu Khin M lnh 11010011 11010010 bbbbbbbb Hot ng (C) <- 1 (bit) <- 1
Cu lnh SETB C SETB bit
S S chu byte k 1 1 2 1
V d: Xem v d mc 3.4.15
3.5.4. Lnh ly b ca bit

C php cu lnh: CPL <bit> Chc nng: Ly b bit c ch ra trong cu lnh. Mt bit c gi tr 1 c i thnh 0 v ngc li. Lnh ny c th thao tc trn c nh, hoc trn 1 bit bt k c nh a ch trc tip. Lnh khng lm nh hng ti trng thI cc c. Cu lnh CPL C CPL bit S S chu byte k 1 1 2 1 M lnh 10110011 10110010 bbbbbbbb Hot ng (C) <- NOT (C) (bit) <- NOT (bit)
V d: To ra 4 xung xut hin bit 7 ca cng P1. Mi mt xung chim 3 chu k my. MOV R1, #8 Lap: CPL P1.7 DJNZ R1, lap
3.5.5. Lnh ly b ca thanh ghi tch lu

C php cu lnh: CPL A Chc nng: Ly b tt c cc bit ca thanh ghi A. Lnh khng lm nh hng ti trng thi cc c. Cu lnh CPL A V d: S S chu byte k 1 1 MOV CPL M lnh 11110100 Hot ng (A) <- NOT (A)
A,#01010101b A
; (A) = 01010101b ; (A) = 10101010b
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I HC SPKT HNG YN
Chng 4: Lp trnh ng dng

4.1. Truy cp d liu vi RAM.
4.1.1. Truy cp d liu vi RAM ni tr V d 1: Chuyn gi tr 56h vo vng nh c a ch t 10h n 40h ca RAM ni tr.
; Chng trnh: ORG 0000H MOV R1,#10h MOV @R1,#56h INC R1 CJNE R1,#41h,Lap END
Lap:
; Xc nh a ch ban u ca vng nh ; Chuyn d liu vo tng a ch trong vng nh ; Tng i ch ; Kim tra iu kin ; Kt thc chng trnh
Kt qu:
Bi tp 1: Thc hin V d 1 bng phng php khc. (s dng cu lnh DEC Byte ). Bi tp 2: Vit chng trnh chuyn ni dung ca vng nh c a ch t 10h n 30h vo vng nh c a ch t 40h n 60h ca RAM ni tr. 4.1.2. Truy cp d liu vi RAM ngoi tr V d 2: Chuyn gi tr 32h vo vng nh c a ch t 1000h n 1020h ca RAM ngoi tr.
ORG 0000H MOV A,#32h MOV DPTR,#1000h MOVX @DPTR,A INC DPL MOV R1,DPL CJNE R1,#21h,Lap END 89
Lap:
Kt qu:
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Bi tp 3: Vit chng trnh chuyn ni dung ca vng nh c a ch t 1000h n 1020h vo vng nh c a ch t 1040h n 1060h ca RAM ngoi tr. C bao nhiu phng php thc hin nhim v ny? Bi tp 4: Vit chng trnh chuyn ni dung ti a ch 1010h ca RAM ngoi tr vo vng nh c a ch t 20h n 60h ca RAM ni tr. Bi tp 5: Vit chng trnh chuyn ni dung ca vng nh c a ch t 20h n 50h ca RAM ni tr vo vng nh c a ch bt u l 1000h ca RAM ngoi tr. (Lu : c th thc hin bng nhiu phng php khc nhau)
4.2. Hm ch.
V d 3a: Vit hm ch 1 ms Cho_1ms: Lap: mov r2,#249 nop nop djnz r2, lap ret ; 2s ; 1s ; 1s ; 2s ; 249*(1s +1s +2s) = 996 s ; 2s ; Tng thi gian l: (2+996+2) s = 1ms
Bi tp 6: Hy xc nh thi gian ch ca chng trnh sau. wait: mov r2,#10 w3: w2: w1: mov mov djnz djnz djnz ret r1,#200 r0,#248 r0,w1 r1,w2 r2,w3
4.3. Lp trnh vi cc B Timer

V d 4: Vit hm ch khong 1 s s dng Timer 0 ch 1 ; 50000 = C350h ; FFFFh-C350h= 3CAFh ; Gi tr ban u l 3CAFh+1=3CB0h
90
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wait: mov mov lap: clr mov mov setb jnb djnz ret
r1,#20 TMOD,#01h TF0 TL0, #0B0h TH0, #03Ch TR0 TF0,$ r1,lap
; Chn Timer 0, ch 1 ; Xa c ngt Timer 0 ; t gi tr ban u cho TL0 ; t gi tr ban u cho TH0 ; Khi ng Timer 0 ; Kim tra c trn Timer 0 ; m ri th thot
Bi tp 7: Hy vit li chng trnh trn c thi gian ch chnh xc 1 s. V d 5: Vit chng trnh to sng vung c tn s 1 KHz ti chn P1.7 ;65535(0FFFFh) 500 (01F4h) = 65035 (0FE0Bh) ; Chn Timer 1, ch 1 mov TMOD,#10h Lap: mov TH1,#0FEh ; TH1 cha gi tr 0FEh mov TL1,#0Bh ; TL1 cha gi tr 0Bh ; B Timer 1 hot ng setb TR1 Cho: jnb TF1,cho ; Ch trn clr TR1 ; B Timer 1 ngng hot ng clr TF1 ; Xo c trn cpl P1.7 ; i trng thi bit P1.7 sjmp Lap ; Lp li Bi tp 8: Hy vit chng trnh to sng vung c tn s 10 KHz ti chn P1.0.
4.4. Lp trnh vi cc ngt

4.4.1. Lp trnh vi cc ngt ngoi V d 6: Chng trnh m sn phm vi s lng ti a l 255. Lu kt qu vo thanh ghi R0. Cm bin c kt ni vi chn P3.3 ca VK. Org Ljmp Org Ljmp main: setb setb setb EX1 IT1 EA
91 ; Thit lp cc thng s ngt hot ng
0000h main 0013h ngat1
; Bt u chng trnh chnh
; S dng ngt ngoi 1
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Mov Jmp Ngat1: Inc Cjne Clr Tiep: reti end
R0,#0 $
; t gi tr ban u cho bin m
R0 R0,#255,tiep EX1
; Tng bin m s lng sn phm ; So snh bin m vi gi tr ti a ; Ngt ngng hot ng ; Thot khi chng trnh con phc v ngt
Bi tp 9: Vit chng trnh m sn phm vi s lng ti a l 250, s dng ngt ngoi 0. Hin th kt qu trn 3 LED 7 thanh. Trong : - LED 7 l loi chung Ant - 3 LED 7 thanh c kt ni vi cc cng P0, P1, P2. 4.4.2. Lp trnh vi cc ngt Timer V d 7: To tn hiu di dng xung vung c tn s 10 KHz ti chn P1.0 ca b VK. S dng ngt Timer 0. org ljmp org ljmp main: mov mov mov setb mov jmp Timer0: cpl reti TMOD,#02h TL0,#-50 TH0,#-50 TR0 IE,#82h $ P1.0
; La chn Timer 0 , ch 2. ; Xc nh gi tr ban u cho TL0. ; Xc nh gi tr ban u cho TH0. ; Khi to Timer 0. ; Khi to ngt Timer 0.
0000h main 000Bh Timer0
; Chng trnh con phc v ngt Timer 0. ; o trng thi to xung. ; Thot khi chng trnh con phc v ngt.
92
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Bi tp 10: To tn hiu di dng xung vung c tn s 5 KHz ti chn P1.0 ca b VK. S dng ngt Timer 1.
4.5. iu khin ng c 1 chiu.

Bi ton: La chn phn cng, lp lu thut ton v vit chng trnh iu khin 2 ng c mt chiu (M1, M2) theo yu cu: K1 M ng M ng K2 M M ng ng Chc nng M1 M2 Dng Dng Tin Dng Dng Tin Tin Tin Ch 1 2 3 4
(K1, K2 l cc cng tc thng m)
93
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Ph lc A : Tra cu nhanh tp lnh

Bng 1 : Cc lnh ton hc ca b VK h ATMEN:
Cu lnh Chc nng Cc kiu Gin tip x x x vi x vi vi x vi vi vi nh Thanh ghi x x x A x DPTR A x A&B A&B A /ch Tc thi x x x Thi gian Thc hin(us) 1 1 1 1 1 2 1 1 4 4 1
ADD ADDC SUBB INC INC INC DEC DEC MUL DIV DA
A,<byte> A,<byte> A,<byte> A <byte> DPTR A <byte> AB AB A
Trc tip A = A + <byte> x A = A + <byte> + C x A = A - <byte> x A=A+1 Ch <byte> = <byte>+1 x DPTR = DPTR + 1 Ch A=A-1 Ch <byte> = <byte>+1 x BA = A*B Ch A=Int(A/B); Ch B=Mode(A/B) Hiu chnh s thp Ch phn
Bng 2. Cc lnh chuyn i d liu truy cp vng nh d liu trong:

Cu lnh Chc nng Cc kiu nh a ch Trc Gin Thanh Tc tip thi tip ghi x x x x x x x x x x x x Thi gian Thc hin(us) 1 1 2 2 2 2 x x x 1 1
MOV A,<scr> MOV <dest>,A MOV <dest>,<scr> MOV <DPTR>, #data16 PUSH <scr> POP XCH <dest> a,<byte>
A = <scr> <dest> = A <dest> = <scr>
XCHD A,@Ri
DPTR = h/s tc thi 16 bit INC SP; x Mov @SP, <scr> Mov <dest>,@SP x ;DEC SP i d liu gia x A&byte i na bit thp gia A&@Ri
94
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Bng 3. Cc lnh s hc:

Cu lnh Chc nng Cc kiu nh a ch Trc tip ANL A,<byte> A=A AND <byte> <byte>= ANL <byte>,A <byte> AND A <byte>= ANL <byte>,#data <byte> AND #data ORL A, <byte> A=A OR <byte> <byte>= ORL <byte>,A <byte> OR A <byte>= ORL <byte>,#data <byte> OR #data XRL A, <byte> A=A XOR <byte> <byte>= XRL <byte>,A <byte> XOR A <byte>= XRL <byte>,#data <byte> XOR #data CLR A A = 00h CPL A A = NOT A Dch A sang tri 1 RL A bit Dch A sang tri RLC A thng qua C Dch A sang phi 1 RR A bit Dch A sang phi RRC A thng qua C SWAP A i na bit trong A x x x x x x x x x Ch Ch Ch Ch Ch Ch Ch vi vi vi vi vi vi vi A A A A A A A x x x x x x Gin tip x Thanh ghi x Thi gian Tc Thc thi hin(us) x 1 1 2 1 1 2 1 1 2 1 1 1 1 1 1 1
95
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Bng 4. Cc lnh i s:
Cu lnh ANL C,bit ANL C,/bit ORL C,bit ORL C,/bit MOV C,bit MOV bit,C CLR C CLR bit SETB C SETB bit CPL C CPL bit JC rel JNC rel JB bit,rel JNB bit,rel JBC bit,rel Chc nng C = C AND bit C = C AND NOT bit C = C ORL bit C = C ORL NOT bit C = bit Bit = C C=0 Bit = 0 C=1 Bit = 1 C = NOT C Bit = NOT bit Nhy nu C = 1 Nhy nu C = 0 Nhy nu bit = 1 Nhy nu bit = 0 Nhy nu bit=1, sau xo bit Thi gian Thc hin(us) 2 2 2 2 1 2 1 1 1 1 1 1 2 2 2 2 2
Bng 5. Cc lnh chuyn i d liu truy cp RAM ngoi:

ln Cu lnh a ch 8 bits MOVX A,@Ri 8 bits MOVX @Ri,A 16 bits MOVX A,@DPTR 16 bits MOVX @DPTR,A Chc nng c RAM ngoi ti @Ri Ghi vo RAM ngoi ti @Ri c RAM ngoi ti @DPTR Ghi vo RAM ngoi ti @DPTR Th.gian thc hin (us) 2 2 2 2
96
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Bng 6. Cc lnh chuyn Byte m lnh:

Cu lnh MOVC A,@A+DPTR MOVC A,@A+PC Chc nng c ROM ti (A+DPTR) c ROM ti (A+PC) Thi gian thc hin 2 us 2 us
Bng 7. Cc lnh nhy khng iu kin trong Flash Microcontrollers:

Cu lnh JMP addr JMP @A+DPTR CALL addr RET RETI Chc nng Nhy ti addr. Nhy ti A+DPTR. Gi C.trnh con ti addr. Quay tr v t C.trnh con. Quay tr v t ngt. Thi gian thc hin(us) 2 2 2 2 2
Bng 8. Cc lnh nhy c iu kin:

Cc kiu nh a ch Cu lnh JZ rel JNZ rel DJNZ <byte>,rel CJNE A,<byte>,rel CJNE <byte>,#data,rel Chc nng Nhy nu A=0 Nhy nu A0 Gim & nhy nu 0 Nhy nu A <byte> Nhy nu <byte> #data Trc tip Gin tip Th/ ghi Tc thi Thi gian Thc hin(us) 2 2 2 2 2
x x
Ch vi A Ch vi A x x x x
97
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Ph lc B : cc h thng s
1. Bng chuyn i h thp phn / nh phn. H thp H thp H nh phn phn phn 0 00000000 32 1 00000001 33 2 00000010 . 3 00000011 . 4 00000100 . 5 00000101 . 6 00000110 . 7 00000111 . 8 00001000 . 9 00001001 63 10 00001010 64 11 00001011 65 12 00001100 . 13 00001101 . 14 00001110 . 15 00001111 . 16 00010000 . 17 00010001 . . . . 127 . 128 . 129 . . . . . . . . . . . . . . . . . 254 31 00011111 255
98
H nh phn 00100000 00100001
00111111 01000000 01000001
01111111 10000000 10000001
11111110 11111111
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2. bng M thp lc phn: H thp phn 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 3. H thng s c du: H nh phn 0111 1111 0111 1110 0111 1101 . . . 0001 0000 0000 1111 . . . . H thp lc phn 7F 7E 7D . . . 10 0F . . . .
99
H nh phn 0000 0001 0010 0011 0100 0101 0110 0111 1000 1001 1010 1011 1100 1101 1110 1111
H thp lc phn 0 1 2 3 4 5 6 7 8 9 A B C D E F
H thp phn + 127 + 126 + 125 . . . + 16 + 15 . . . .
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Gio trnh: K thut Vi iu Khin 02 01 00 FF FE FD . . . 90 8F . . . . . 82 81 80 +2 +1 0 -1 -2 -3 . . . - 112 - 113 . . . . . - 126 - 127 - 128
0000 0010 0000 0001 0000 0000 1111 1111 1111 1110 1111 1101 . . . 1001 0000 1000 1111 . . . . . 1000 0010 1000 0001 1000 0000
Ti liu tham kho:
1. 2. 3. 4. 5. 6. 7. 8.
The 8051 Microcontroller - I. Scott Mackenzie. The MCS*51 Microcontroller Family Users Manuel - INTEL - 1994. The AT89 Family of Microcontrollers - ATMEL - 2003. Microcomputer Components SAB80C515 8 bit Single-chip Microcontroller Family - SIEMENS - 1995. Mikrocomputertechnik Prof.Dr.Ing. G.Schnell Fachhochschule Frankfurt am Main - 2001. K thut Vi x l - Vn Th Minh - NXB GD - 1997. K thut VXL & lp trnh ASSEMBLY cho h VXL - Xun Tin NXB KH&KT - 2001. H VK 8051 - Tng Vn On & Hong c Hi - NXB LXH - 2001
100

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I HC SPKT HNG YN

Gio trnh: K thut Vi iu Khin

Gio trnh: K thut Vi iu Khin 29 30 30 31 31 34 34 35 38 38 39 40 40 42 42 43 43 44 45 45 46 48 50 54 57 58 59

Gio trnh: K thut Vi iu Khin 65 66 66 66 67 68 68 69 69 70 70 71 71 72 72 73 73 74 75 75 75 76 76 77 77 78 79 79 80 81 81 82 83 83 84 84 85

Gio trnh: K thut Vi iu Khin 86 87 88 88 88 88 89 89

99 100 101 102

Gio trnh: K thut Vi iu Khin

Hng yn, thng 10 nm 2005

Gio trnh: K thut Vi iu Khin

Chng 1. Kin trc h VXL

Program Memory Data Memory

Hnh1.1. Khi qut chung v h VXL

1.1. CPU(Central Processing Unit):

Gio trnh: K thut Vi iu Khin

1.2. Qu trnh tm np lnh v thc thi lnh ca CPU:

Data Bus RAM n+2 n+1 opcode n n-1

Hnh 1.2. Hot ng ca Bus cho chu k tm np lnh

Gio trnh: K thut Vi iu Khin

1.3.1. B nh ch c (Read Only Memory - ROM): 1.3.1.1. ROM c bn:

1.3.1.2. PROM (Programmable ROM - ROM c kh nng lp trnh c):

1.3.1.3. EPROM (Eraseable PROM ROM np/xo c nhiu ln):

1.3.1.4. EEPROM (Electrical EPROM ROM c kh nng lp trnh v xo c bng in).

Gio trnh: K thut Vi iu Khin

1.3.2. B nh truy cp ngu nhin (Random Acess Memory - RAM):

1.4. Cc thit b xut/nhp:

1.5. Cu trc knh chung ca h VXL:

Gio trnh: K thut Vi iu Khin

Gio trnh: K thut Vi iu Khin

Gio trnh: K thut Vi iu Khin

Chng 2: B Vi iu khin AT89C51 2.1. Gii thiu chung:

2.2. S khc nhau gia b VXL v b VK.

Gio trnh: K thut Vi iu Khin

Bus Control /WR /RD

Serial Ports TxD RxD

I HC SPKT HNG YN H VK ROM (bytes)

Gio trnh: K thut Vi iu Khin

6 6 6 6 6 Ngun UART ngt 1 6 1 6 1 1 1 1 1 1 6 6 6 6 6 6

Bng 2.1. Cc thng s ca cc h VK thuc hng Intel (MSC 51)

H VK AT89C1051 AT89C2051 AT89C51 AT89C52 AT89C55 AT89S8252 AT89S53

2.4. S chn tn hiu ca 80C51/AT89C51.

Hnh 2.2. S chn IC 80C51/AT89C51

Gio trnh: K thut Vi iu Khin

2.5. Chc nng cc thnh phn ca AT89C51:

Gio trnh: K thut Vi iu Khin Ni dung LSB

Hnh 2.3. S khi ca AT89xx

Gio trnh: K thut Vi iu Khin

Gio trnh: K thut Vi iu Khin

Gio trnh: K thut Vi iu Khin

Gio trnh: K thut Vi iu Khin

Gio trnh: K thut Vi iu Khin

Gio trnh: K thut Vi iu Khin

2.5.2. Khi to thi gian v b m (Timer/Counter).

Gio trnh: K thut Vi iu Khin

/12 C/ C/ TR1 Control TL1 TH1 5 bits 8 bits TF 1 Interrupt

Gio trnh: K thut Vi iu Khin

TL1 TH1 8 bits 8 bits

T1 PIN GATE TR1

Hinh 2.6: Ch 2 ca Timer 1

Hinh 2.7: Ch 3 ca Timer 0

Gio trnh: K thut Vi iu Khin

2.5.3. B nh chng trnh v b nh d liu ni tr.

Data Memory (Read/ Write)

External External Internal