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TM HIU PHN MM PROTEUS ISIS

A.

GII THU PHN MM Proteus ISIS l phn mm dng cho cc nh thit k mch in t chuyn nghip v

nghip d. N va c kh nng v s nguyn l, v mch in, va c kh nng m phng lm tha mn i vi hu ht cc yu cu ca nh thit k khi s dng n. V ISIS c nhiu loi cng c dng chuyn cho thit k - m phng v khng kh chng ta tm cch s dng, cho nn khng i hi bn phi tn nhiu thi gian hc hay m mm.Tuy nhin, ISIS cng c nhng phn m rng ch dnh ring cho cc chuyn gia trnh cao m chng ta cha th bn n. B. CCH CI T

Nhp p vo file Setup tin hnh ci t. Sau ch cn click vo ch c du mi tn ch xung cho n khi click vo ch Finish l ci t xong. Nu mun ngng li th ch cn click vo nt Cancel bt k lc no v s thot khi qu trnh ci t ngay lp tc.

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C. I.

NI DUNG CHNH GIAO DIN CHNH CA CHNG TRNH

Hnh dng ca linh kin

Vng tn cc loi linh kin ly ra t th vin Vng v s nguyn l

II. CC MENU LNH: chn cc menu lnh trn thanh menu chnh ca chng trnh xem tn, cc icon lnh v cc phm tt tng ng. Cc lnh c thi hnh khi ta dng chut click vo lnh . 1. MENU FILE

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New Design: m mt bn thit k mi. Load Design: m mt bn thit k c. Save Design: lu li bn thit k hin hnh. Save Design as: lu li bn thit k hin hnh mt th mc khc. Export Section: to ra mt file mi ly t mt phn ca file hin hnh m cc bn thit k khc c th s dng c. Import Section: nhp mt file c xut(export) ra t mt file khc vo file hin hnh s dng.

Export Graphic: xut ra mt file c mt trong 5 dng : Bitmap, Meta, DXF, EPS Vector s dng cho sau ny.

Import Bitmap: nhp mt file loi Bitmap(l loi file nh) vo bn thit k hin hnh. Print/Printer setup: in v nh dng trang in. Mail to: gi bn thit k bng Email n mt ni khc. Set Area: t en vng c chn. Exit: thot khi chng trnh.

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2. VIEW Redraw: Grid: tt m li trn bn v. Origin: nh du cho cc linh kin gc. X cursor: hin th con tr trn u mi tn c du x nh hoc di ra. Pan: nh v con tr chut v tr tm ca bn v. Zoom In: phng to mn hnh Zoom Out: thu nh mn hnh. Zoom All: thu nh ton mn hnh. Zoom to Area: phng to mt vng ca mn hnh. Toolbar: tt m cc thanh cng c trn mn hnh.

3. EDIT Undo: b thao tc va mi thc hin. Redo: ly li thao tc va b. Cut/Copy/Paste to Clipboar: ct/copy/dn vo clipboar Send to back: mang v pha sau. Bring to front: mang ln pha trc. Tidy: lm sch bn v. Find and Edit Component: tm v thay i linh kin trong bn v. Edit Object Under Cursor: thay i i tng nm di con tr.

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4. LIBRARY

Pick Device/Symbol: t mt device ca linh kin hoc mt Symbol vo bn v.

Chn loi Device hay Symbol hay mt loi khc trong khung Type.

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Trong khung Match Names: nn chn Containing text tm c nhiu loi hn. Tn ca loi tm kim c nh trong Name of text to seach for. Ta chn tn ca loi mong mun hin ra trong khung bn tri ri bm OK. Tr v giao din chnh ca chng trnh, click chut tri vo vng v s nguyn l, linh kin xut hin ngay v tr ta click chut. Mi ln click chut ta c thm mt linh kin na, tn ca linh kin s t ng tng ln theo s th t trnh b trng. Hy s dng con ln trn chut phng to hay thu nh vng t linh kin thy r v tr cn t.

Make Device: to mt Device mi t mt Device c chn. Chn Opamp 1458: Package c 8 chn, Device gm 2 Symbol (1 symbol c 5chn v mt cn li c 3 chn) c chung hai chn ngun s 8 v 4. Gi s ta c th to ra Opamp c tn l NEW : Package 14 chn, hai chn ngun chung l 1 v 14, cc chn cn li l chn ca 4 symbol (A/B/C/D) th cch lm nh sau: Click phi chn mt Device ca 1458 trn bn v; Chn make Device trong menu Library;

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nh NEW vo Device Name, bm Next ri bm Add/Edit;

Bm Add ri chn th vin Package trong ca s Pick Packages, click p vo DIL14 trong khung Objects.

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Bng Package Device li hin ra:

nh s 4 vo No. Of Gates ri ln lt nhp tn cho cc chn nh trn hnh. Sau bm nt Assign Package(s) bn di. Tip tc bm Next cho n khi xut hin ca s bn

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di th chn USERDVC ri bm OK lu Device mi vo th vin ring ca ngi s dng.

Sau khi to xong, t Device NEW vo bn v th ta s c kt qu bn di:

Make Symbol: to mt Symbol mi. Packaging Tool: cng c chnh sa hnh dng chn ca linh kin trong s mch in.

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Cch lm tng t nh to mt Device mi nhng y l to ra 1 device thay th cho device c. Decompose: tch cc mi lin kt gia cc phn t ca mt Device ra chnh sa, thm bt cc phn t mi ri to thnh mt Device mi bng Make Device. V d: t 74ALS00 vo bn v ri dng lnh Decompose:

74ALS00 c 14 chn, gm 4 cng logic NAND hp li thnh. Gi s ta cn to ra 1 IC mi cng c 14 chn v gm 4 cng logic OR th phi i chn ng ra (chn s 3) thnh chn khng o ging chn ng vo(chn 1 v 2) ca mi cng v i hnh cng NAND thnh hnh c dng nh cng OR mi c. thc hin vic ta dng cc Icon lnh:

Pin Device: cha cc loi chn dng thm vo phn thn ca linh kin (loi Graphics) to thnh linh kin mi. N c dng chn mc nh l chn khng o, cc dng chn khc gm: chn o INVERT chn clock cnh ln POSCLK Chn clock cnh xung NEGCLK Chn ngn SHORT Chn BUS

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2D Graphics Symbol: cha cc Symbol thun tin cho vic v cc linh kin. ly hnh cng OR ta click vo Icon ny ri nhp p vo OR. Ta c hnh dng mi bn di:

Lu : cc tn ca chn A, B, Y phi c t li v thy c khi dng lnh Bring to front (mang ln pha trc). Xong thao tc ny tip tc thc hin thao tc to Device nh xem trn. Compile to Library: bin dch cc linh kin ly ra t nhiu th vin khc nhau sang mt th vin mi c chn. Autoplace Library: t ng t cac linh kin ca mt th vin c chn vo bn v. Library Manager (qun l cc th vin): to th vin mi, to th vin d phng, xa th vin bt k, tm v nhp th vin dng m ASCII

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5. TOOLS

Real Time Annotation: ng m cc ch thch trn linh kin lm s th t ca n c thay bng du ? Real Time Snap: chc nng ny c bt ln gip ta d dng thc hin vic ni dy hn nh con tr chut xut hin du x khi n gn chn linh kin hay dy dn. Wire Auto Router: tt m s ni dy t ng. Property Assignment Tool: cng c thay i tnh cht ca cc i tng trong bn v. Global Annotator: cho php ghi ch thch li cho cc tn linh kin bng cch nh li cc s th t. Chn Whole Design ghi ch thch ln tt c linh kin trong bn thit k. Nu ch ch thich ln trang hin hnh th chn Current Sheet trong khung Scope. Trong khung Mode chn kiu ch thch ton b hoc ch ch thch cho nhng linh kin c t sau. Chn s bt u ch thch trong Initial Count.

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ASCII Data Import: nhp file d liu vit bng m ASCII. Bill of Material: cho php xut ra mt file mang thng tin v cc linh kin trong bn v hin hnh(s lng, tn, gi tr, loi) di 1 trong 4 dng bn di.

Electrical Ruler Check: kim tra cc li trong bn v. Netlist Compiler: to 1 file Netlist vi cc nh dng ty chn trong khung format. Chn dng xut ra trong khung Output. Chn loi vt l hay logic trong khung Mode. Chn phm vi v chiu su trong khung Scope v Depth.

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Netlist to ARES: to file netlist cho chng trnh ARES. Back Annotation from ARES: ch thch li t ARES.

6. DESIGN Edit Design Properties: thay i thuc tnh ca bn thit k. Edit Sheet Properties: thay i thuc tnh cho mt trang v. Edit Design Notes: ghi ch thch cho bn thit k. New Sheet: to mt trang v mi. Remove Sheet: xa trang ang v. Goto Sheet: di chuyn n cc trang khc trong bn thit k. Zoom to child: chuyn n cc trang nhnh ca mt trang ln. Exit to Parent: thot khi trang nhnh chuyn ti trang gc

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7. GRAPH

Edit Graph: thay i cc thuc tnh ca mt biu . Add Trace: thm cc ng vo biu . Simulate Graph: chy m phng trn biu . View log: xem cc ghi chp. 8. SOURCE

Add/Remove Source files: thm hoc b cc file ngun vit bng cc m ca my tnh. Define Code Generation Tool: Setup External Text Editor:

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9. DEBUG

Start/Restart Debugging: bt u hoc bt u li vic chy m phng. Execute: chy m phng ngay. Execute Without Breakpoint: chy m phng khng cn c im dng. Execute for Specified Time: chy m phng trong 1 khong thi gian nh trc. 10. TEMPLATE

Set Design Defaults:

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Thay i cc mu sc ca trang giy, li mn hnh v mu hin th trn ca s chnh ca chng trnh trong khung Colour. Trong khung Animation: thay i cc mu ca cc mc logic v mu ca cc mc in p. Set Graph Colours: thay i mu sc hin th trn cc biu phn tch bao gm mu ca tn hiu s, tn hiu tng t v mu ca biu ..

Set Graphics Stypes: thay i thuc tnh cc loi ca phn ha

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Set Graphics Text: thay i font v c ch hin th ca cc loi thuc phn ha.

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Set Juntion Dots: thay i hnh dng v kch tht ca im ni mch.

Apply Template from Design: ng dng cc thay i trn trong menu Template ca mt bn thit k khc vo bn thit k hin hnh. Apply Default Template: xa cc thay i trn v tr v mc nh ca chng trnh. Save Default Template: lu cc thay i trn nh mc nh ca chng trnh. 11. SYSTEM

Set Environment: thit lp cc iu kin lm vic ca chng trnh bao gm: thi gian t ng sao lu, s bc c th Undo, thi gian tr ch gii cng c, s tn file c t trong menu File, t ng ng b hoc sao lu vi ARES, lu v hin th trng thi ca bn thit k trong ISIS cng vi cc chn la cc lnh trn thanh cng c khi mi m chng trnh.

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Set Paths: chn cc ng dn t cc th vin, cc Model m phng v cc kt qu m phng ca chng trnh v chn dung lng gii hn trn a cng dng cho kt qu m phng.

Set Property Definitions: nh ngha cc thuc tnh mi cho linh kin.

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Set Sheet Sizes: thay i cc kch tht ca trang giy, c cc c t A4-A0 hoc chn c bt k.

Set Text Editor: thay i cc font v c ch. Set Keyboard Mapping: thit lp cc phm tt ng dng cho cc lnh trong cc nhm lnh bng cch chn nhm lnh trong Command Groups, chn lnh mun dng bng phm tt di, nhp tn phm tt vo cui cng.

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Set Animation Opions:

Chn tc m phng trong khung Simulation Speed; chn gii hn in p hoc dng in trong khung Voltage/Current Ranges; chn cc hiu ng hot hnh cho dng in, in p, cc trng thi logic khung bn phi. Set Simulator Options: chn la cc thng s trong m phng(sai s, nhit , thi gian,..) Save Preferences: lu li cc thay i trn. III. CCH NI DY V V BUS: Mun ni dy gia hai i tng: ta click tri vo im ni ca i tng u ri di chuyn chut ti im ni ca i tng th hai (dy ni s t ng theo sau) ri click tri ln na th y dn s c ni. Nu c 2 ng ct nhau ti mt im th im s c ni vi nhau khi ta t vo im du chm Junction Dot Mun chnh li dy ni v ta c th click phi chn n ri click chut tri vo on cn sa ko i.

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trc khi chnh. Mun v Bus chn Bus Icon

ang ko t tri vo gia. click tri vo im bt u, di chuyn chut v.

Click tri ti v tr m ng Bus phi qua, click p ti v tr mun kt thc. t tn cho ng dn Bus: chn Wire Label click tri vo ng dn cn t

tn. Bng Edit Wire Label hin ra, trong nhn Label nh tn bus vo String. Trong nhn Styles c th i ng Bus thnh mt loi ng khc, cc loi ng chn trong Global Style. Ngoi ra c th thay i cc thng s khc trong Edit Wire Label. Chn xong bm OK. Lu : t tn cho ng Bus nh l D [0..7] th c ngha l ng Bus ny gm c 8 ng D0,D1,..,D7. Cc ng khc ni vi Bus nu c cng tn vi nhau tc l chng s ni nhau.

IV. CCH M PHNG MCH IN SAU KHI V XONG 1. Thanh Animation Control Panel

Bm nt Play (nt u tin) bt u m phng Bm nt Pause (nt th ba) tm dng, mun thc hin tip th bm n mt ln na. Bm nt Step (nt th hai) thc hin vic m phng trong mt bc - mt khong thi gian nh trc trong Simulation Speed Bm nt Stop (nt cui cng) kt thc vic m phng.

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2. Tm d in p(Voltage Probe) v dng in(Curent Probe) t tm d vo s mch th click tri vo Voltage Probe hay Curent Probe ri click tri vo dy dn mun t.

Ch : khi t tm d dng in th mi tn trong vng trn phi song song vi dy dn.

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3. Ngun pht sng: (Genarators)

chn Icon c tn l Generator nh hnh trn Bng cc loi ngun hin ra: C cc ngun to sng sin, vung, tam gic,...Cch t vo s mch ging nh cch t cc tm d in p hay dng in.

Ta c th Edit thit lp cc thng s cho tng loi ngun(bng bn phi)

chc nng ca tng loi: Loi tng t: c 8 loi DC Genarators: to ra in p mt chiu cung cp cho mch, ln thay i ty

c.

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Sine Genarators: to ra sng hnh Sin; c th thay i c tn s, pha, bin v c m t bng hm s: V=V0+VAe-(t-TD)H Sin(2f(t+TD)) V0: ln in p mt chiu VA: bin nh TD: thi gian tr ca tn hiu, tng t nh gc pha() H: h s tt dn. Pulse Genarators: c th to ra sng vung, sng rng ca, sng tam gic v thay i c cc thng s: ln in p mc cao v thp, thi gian bt u chy, thi gian cnh ln v cnh xung, tn s, rng xung. Exponential Genarators: to ra sng c dng nh dng sng ca mch RC. C th iu chnh cc thng s nh: thi gian ca cnh ln v xung, thi gian bt u xut hin cnh ln v xung. Single Frequency FM Genarators: to ra sng Sin c dng c m t bng hm sau: V= V0+ VASIN(2fct + mSin(2fst)) V0: ln in p mt chiu VA: bin in p sng mang fc: tn s sng mang fs: tn s tn hiu iu ch m: h s iu ch. Pieces Wise Linear Genarator: to ra dng sng c hnh dng do ta v nh cc im ta c sn File Genarator: dng cc file vit bng m ASCII to ra chui thi gian v cng

tng ng m phng dng sng cn thit. Audio Genarator: dng mt file m thanh c ui l .WAV m phng to ra tn hiu

m thanh Loi s: c 4 loi

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Single Edge: to ra tn hiu ch thay i trng thi t thp n cao hoc ngc li, iu

chnh c thi im chuyn trng thi. Single Pulse: to ra mt xung trong mt khong thi gian xc nh Clock: to ra chui xung ng h c trng thi thay i t thp ln cao hay cao xung

thp, iu chnh c tn s. Pattern: to ra chui xung vung c rng bng nhau hoc thay i c theo mun

ca ta. V c dng xung nh bng Edit Pattern.

4. Cc cng c o: Dao ng k (Virtual Osscilloscope): dng hin th dng sng tng t.

S dng Oscillocope th click vo Icon Virtual Instruments

Chn Osscilloscope(OSC)

Ni dy cc ng vo A(Chanel 1), B(Chanel 2) ca OSC ti cc im cn xem dng sng ca tn hiu trong mch. Bm nt Play trong Animation Control Panel, ca s VSM OSC xut hin:

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C 2 loi nt iu chnh trn bng VSM Osscilloscope l nt bm vung v nt xoay trn v cc n mu xanh ch ch ang hot ng. Cc nt vung dng chn knh hin th (knh1- knh2-c hai knh), thay i ch AC, DC, GND Cc nt xoay trn dng iu chnh li (nt ), iu chnh Ofset, iu chnh tc thay i ca dng sng cho tng knh mt(cc nt tm v xanh) V d 1: m phng dng sng ra ca mch bt n dng IC 555

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T mch bt n IC 555 .ng ra chn 3 cho ta dng sng hin th trn mn hnh ca my OSC. Ta thy dng sng ra trn mn hnh osc d l s tng hp sng vo OSC tc tn hiu ra chn 3 ca IC 555.nh hnh sau.

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9 My pht tn hiu(Virtual Signal Genarator) c cc c tnh sau:

Pht ra c cc dng: sng vung, sng rng ca, sng tam gic, sng sin. To ra dy tn s t 0~12MHz. Bin t o~12V. iu ch bin v tn s ng vo.

9 S dng Signal Genarator: Chn Signal Genarator trong Virtual Instrument t vo s . Bm nt Play thay i thng s cho tn hiu c pht ra.

Xem bng trn: thay i tn s dng hai nt trn bn tri, thay i bin dng hai nt trn k tip, thay i dng sng dng hai nt vung ct bn phi. Nt Centre thay i t 0~12, nt Range c 3 cp n v l Hz/KHz/MHz thay i t 0.1~10. Tn s thay i trn hnh c gi tr l 10.3 = 10.3(centre) x 1Hz(range). Tng t, bin trn hnh c gi tr 700m(V) = 0.7 (level) x 1V(range). Mun iu ch bin (hoc tn s) th ni tn hiu ng vo vo chn AM (hoc chn FM). Tn hiu ng ra ly chn +,-

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V d 2: dng OSC o tn hiu ng ra ca Signal Genarator vi tn hiu vo l AM y ta iu ch tn hiu AM cn tn hiu ng ra ti cc + th ni vi knh A ca OSC ,cn cc - ca Signal Genarator ni vi knh B ca OSC.

Trn mn hnh OSC hin th dng sng iu ch AM vi c hai bn k m v dng nh hnh sau. Cn trn VSM Signal Genarator c cc nt iu khin p ng bin sng ra.

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9 Counter Timer: dng o thi gian, m xung v tn s. N c 3 chn ng vo v hin th ng ra ti 99.999.999 Chn CLK: ni vi ng tn hiu cn o. Chn CE: chn cho php tc ng mc cao. Chn RST : chn Reset. Khi c tc ng mc cao th cc s hin th u tr v 0.

Dng Edit Component chn Mode m v thay i cc mc tch cc ca cc chn CE, RST. Bm nt Play m phng. V d 3: o rng xung ca mt mch n n dng IC 555 nh hnh v sau:

Trong bng Edit Component chn Mode o thi gian l Times [hms], chn CE c mc tc ng cao, khi ta nhn nt bm chn s 2 th ng ra ca IC chn s 3 lp tc ln cao tc ng vo chn CE ca Counter Timer lm thi gian tng ln (ta c th tnh c la:

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T=1.1RC) cho n khi chn s 3 xung mc thp th thi gian dng li, chn RST c mc tc ng cnh xung a thi gian m tr v 0 khi bt u m li.

9 AC-DC Voltmeter or Ampemeter: l cc Votl k v Ampe k o in xoay chiu hay mt chiu vi cc la chn n v l micro volt, mili volt, volt. N c ni vo mch ging nh cc linh kin khc v c th thay i ni tr trong Edit Component (gi tr mc nh l 100M).

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V d 4: T mch in di y cho chng ta bit c cc thng s v in p , cng dng in , v c chiu ca dng in chy trong mch nh hnh m phng .

5. Cc loi phn tch dng s : 9 Phn tch tng t (Analogue Analysis): S dng Analogue Graphs trong Icon Simulation Graphs hin th. t Analogue Graph vo s mch: Click chn icon Simulation Graph chn Analogue trong GRAPHS ri click-r chut ln vng trng trong vng v s to ra bng Analogue Analysis. t cc tm d v ngun pht sng( Genarators and Probes) vo trong bng va to ra bng cch dng chut ko v th vo. Lu : Cc cch ny lm tng t nh trong cc loi phn tch khc. Dng Edit Graph trong menu GRAPH thay i thuc tnh cho bng, dng Add Trace thm cc thnh phn cn hin th trong bng vi thuc tnh c m t bng mt hm trong Expression. Thnh phn mi c tn l SUM, c m t bng hm P1+P2 (xem cc hnh bn di)

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a) bng t tn v thuc tnh.

b) bng hin th kt qu. Mt s mch c th c phn tch nhiu thnh phn v nhiu loi phn tch. Dng phm SPACEBAR cho php hin th kt qu trn cc s .

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9 Phn tch s (Digital Analysis): S dng Digital Graph hin th kt qu. Cch t vo s v thay i cc thng s ging nh trn. V d 5: m phng dng xung ng ra Q0, Q1, Q2 v 2 ng vo I0, I1.

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Dng kt qu hin th nh sau:

(trc honh l trc thi gian, tnh bng Micro giy) 9 Phn tch Tng t - s (Mixed Analysis): c dng khi m phng cho dng chuyn i gia tng t v s nh: ADC(analog to digital convert), DAC (Digital to Analog Convert). Cch s dng s m phng ging nh cc loi trn. V d 6: m phng mch VCO c ng vo l Vin_dng Sin v ng ra Vout_dng xung vung c cc thng s c bn bn di.

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9 Phn tch Tn s (Frequency Analysis): dng phn tch cc p ng ca cc mch lc RC, LC. Trc X ca s hin th tn s, trc Y hin th li. V d 7: m phng p tuyn tn s ca thch anh 1MHz trong dy tn s 950KHz n 1.1MHz

(s p ng tn s ca thch anh. Ti tn s 1MHz ng ra c bin ln nht, li gim t nht.)

9 Kho st dng phn cc xc nh iu kin phn cc cho mch in. V d 8: V mch nh hnh sau:

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in p trn cc nt ni Nhn vo hnh ta c th xc nh cc mc in p t trn cc cc ca transistor c th xc nh c nh im Q (IC,VCE ) d dng

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Dng chy qua cc nhnh Sau khi v mch v t tm d in p, dng in xong an bm nt play bt u m phng.Khi bn c th c trc tip cc gi tr in p dng in phn cc cho transistor. Kho st ng t tuyn ng ra. V d 9:V mch nh hnh sau:

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Tip theo chn biu tng Simulation Graph trn thanh cng c . Trong hp thoi chn cc dng th cn phn tch . mch ny dung Transfer e phan tch. Transfer la dung cu dung e phan tch tn hieu theo s thay oi cua nhieu tham so

Sau khi lay c o th ban vao Edit Transfer Function Graph va chon cac thong so nh hnh.Sau o ban an phm space xuat hien ket qua nh hnh sau:

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Gii tch mch in t

Phn mm PROTEUS ISIS

Sau o ban an phm Spacebar xuat hien ket qua nh hnh sau:

ng vi truc nam ngang bieu th cho ien ap VCE ,truc thang ng ng vi dong ien IC. T o th tren ban co the thay c dang at tuyen ngo ra cua transistor. Khao sat dang phan tch theo truc ngang la bien thi gian. V d 10: Cho mach nh hnh ve sau: Trong mach khuech ai nay dung nguon kch dang sin, co bien o thay oi t ov en 10mv, tan so cua tn hieu lay khong oi la 1kz

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Gii tch mch in t

Phn mm PROTEUS ISIS

Khi ve xong an play e tien hanh mo phong.ISIS bat au tnh toan va cho ra ket qua dang song va dang song ngo vao nh hnh sau:

Tren trang o th ban thay tn hieu ngo ra ln hn ngo vao va mach khuech ai co tnh ao pha.

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Gii tch mch in t

Phn mm PROTEUS ISIS

Bay gi ban gi nguyen cac num chnh va mat tu bypass va quan sat dang song ngo ra:

Tren trang o th,ban thay tn hieu ngo ra luc nay b meo dang. Bay gi phan tch tn hieu theo tan so. thanh cong cu chon Simulation Graph sau o chon Frequency nh hnh.

Sau khi lay c o th ban at tam do ien ap vao va tien hanh mo phong. Sau khi chay mo phong ban co o th nh sau:

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Gii tch mch in t

Phn mm PROTEUS ISIS

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Gii tch mch in t

Phn mm PROTEUS ISIS

Nhn vao 3 o th tren ban co the oc c tan so cat tren va cat di cua mach FL=2.92hz,FH=32.5Mz

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