N IN T NG DNG

TI:
THIT K B PID S IU
KHIN TC NG C DC



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Trang - 2 -


PHN 1: L THUYT ......................... 3
CHNG 1: NG C IN MT CHIU................................................... 3
1.1 Gii thiu ng c DC: .............................................................................. 3
1.2 M hnh ha ng c DC: .......................................................................... 3
1.3 Phng php iu khin tc ng c: .................................................. 4
1.4 Kho st hm truyn: ................................................................................ 5
1.4.1 Hm truyn l tng:.......................................................................... 5
1.4.2 Hm truyn gn ng tm c bng thc nghim: .......................... 6
1.5 Phng php n nh tc ng c dng PID:...................................... 7
1.5.1 Thut ton PID: .................................................................................. 7
1.5.2 Phng php hiu chnh thng s b PID Ziegler-Nichols: .............. 9
Chng 2 TNG QUAN V PSoC IC CA HNG CYPRESS ......................10
2.1. Gii thiu: ................................................................................................10
2.2. Gii thiu IC kh trnh PSoC ca hng CYPRESS................................10
2.2.1 Khi nim PSoC .................................................................................10
2.2.2 Tng quan v ti nguyn chip PSoC ..................................................10
2.2.3 Cu trc chi tit bn trong chip PSoC ...............................................13
3.3 Gii thiu phn mm PSoC Designer ca hng CYPRESS ....................27
3.3.1 Tng quan v PSoC Designer ............................................................27
3.3.2 Xy dng kin trc phn cng( Device Editor) ................................27
3.3.3 Ca s vit ng dng(Application Editor) ........................................36
CHNG 3: L THUYT V MOSFET ........................................................38
3.1 Gii thiu v MOSFET .............................................................................38
3.2 Cu trc c bn ca NMOS kiu tng cng : .......................................38
3.3 u nhc im v cc thng s quan trng ca MOSFET: ...................40
3.3.1 Nhng u im ca mosfet : ..............................................................40
3.3.2 Cc nhc im ca mosfet. ..............................................................40
3.3.3 Cc thng s quan trng ca mosfet : ...............................................40
PHN 2: THIT K V THI CNG 43
CHNG 4: THIT K V THI CNG PHN CNG ............................43
4.1 S nguyn l: ........................................................................................43
4.2 Tnh ton cc thng s ca mch: ............................................................44
4.2.1. Mch o chiu ng c: ..................................................................44
4.2.2 Tnh ton cho FET: ............................................................................45
4.2.3 Tnh ton mch Driver cho MOSFET: .............................................47
4.3 Tnh ton cc tham s ca b iu khin PID s: ....................................49
5.1 Cu hnh bn trong PSOC:.......................................................................52
5.2 Gii thut phn mm: ...............................................................................57
Trang - 3 -

PHN 1: L THUYT

CHNG 1: NG C IN MT CHIU

1.1 Gii thiu ng c DC:
ng c in mt chiu l ng c in hot ng vi dng in mt
chiu. ng c in mt chiu ng dng rng ri trong cc ng dng dn
dng cng nh cng nghip
Cu to ca ng c gm c 2 phn: stato ng yn v rto quay so vi
stato. Phn cm (phn kch t-thng t trn stato) to ra t trng i
trong mch t, xuyn qua cc vng dy qun ca phn ng (thng t trn
rto). Khi c dng in chy trong mch phn ng, cc thanh dn phn ng
s chu tc ng bi cc lc in t theo phng tip tuyn vi mt tr rto,
lm cho rto quay.
Ty theo cch mc cun dy roto v stato m ngi ta c cc loi ng
c sau:
- ng c kch t c lp: Cun dy kch t (cun dy stato) v
cun dy phn ng (roto) mc ring r nhau, c th cp ngun ring
bit.
- ng c kch t ni tip: Cun dy kch t mc ni tip vi cun
dy phn ng:
i vi loaj ng c kch t c lp, ngi ta c th thay th cun dy
kch t bi nam chm vnh cu, khi ta c loi ng c in 1 chiu dng
nam chm vnh cu. y l loi ng c c s dng trong n ny.
1.2 M hnh ha ng c DC:
M hnh tng ng ca phn ng ng c nh sau:
Trang - 4 -


A
-
+
1
2
Ra
La
Eg
Ua
Ia

g
a
a a a a
e
dt
di
L i R u (1.1)
n k e
v g
(1.2)
Trong l t thng do nam chm vnh cu gy ra. n l tc ng
c.
Momen in t:
T
d
= K
t
i
a
(1.3)
Phng trnh ca ng c:
L d
T B
dt
d
J T

(1.4)
B: h s ma st
T: monen ti.
ch xc lp:

g a a a
e i R u (1.5)

a t L d
i K T nB T 2 (1.6)
Ta c c tc ng c ch xc lp:

v
a a a
K
R I U
n (1.7)
1.3 Phng php iu khin tc ng c:
i vi loi ng c kch t c lp dng nam chm vnh cu, thay
i tc , ta thay i in p cung cp cho roto. Vic cp p 1 chiu
Trang - 5 -

thay i thng kh khn, do vy ngi ta dng phng php iu xung
(PWM):

Hnh 1.1: PWM
Phng php iu xung s gi tn s khng i, thay i chu k nhim
v (Duty cycle) thay i in p trung bnh t ln ng c.
in p trung bnh:
in
on
dk
V
T
T
V
Do c tnh cm khng ca ng c, dng qua ng c l dng lin tc,
gn sng nh sau:


Hnh 1.2: Dng sng dng v p trn ng c.
1.4 Kho st hm truyn:
1.4.1 Hm truyn l tng:
Bin i Laplace cc cng thc t (1.1) (1.4 ) ta c:
U
dk
t

Ia

t

Trang - 6 -

) ( ) ( ) ( ) ( a E p I pL p I R p U
g a a a a a
(1.9)
) ( ) ( p n k p E
v g
(1.10)
T
d
(p) = K
t
I
a
(p) (1.11)
) ( ) ( 2 ) ( 2 ) ( p T p Bn p pJn p T
L d
(1.12)
T 1.12 tnh c:

) 1 ( 2
) ( ) (
) (

m
L d
p B
p T p T
p n

(1.13)

) 1 (
) ( ) (
) (

p R
p E p U
p I
a a
a a
a

(1.14)
Trong :
a
=L
a
/R
a
Hng s thi gian ca mch phn ng

m
=J/B Hng s thi gian c.
Vy ta c m hnh h thng nh sau:

Hnh 1.3: M hnh ng c in DC
Khi momen ti khng i, ta c:

v m a
t
a
a
K p p
K
BR
p U p n
) 1 )( 1 (
2
1
) ( ) (

Vy hm truyn ca ng c lc ny c dng khu dao ng.
1.4.2 Hm truyn gn ng tm c bng thc nghim:
tm hm truyn bng thc nghim ta tm p ng xung ca ng c.
Ta t p bng p nh mc vo ng c v v th vn tc theo thi gian.
V thi gian ly mu vn tc nh do ta khng thy c cc im un
ca th, do y ta xp x hm truyn ng c l khu qun tnh bc
1 c dng nh sau.
I
a
(p)

v
k
) 1 (
1
p R
a a


t
k
) 1 ( 2
1
p B
m


U
a
(p)
E
g
(p
)
T
d
(p)
T
L
(p)
n(p)
Trang - 7 -


1

Tp
k
G
p ng xung ca ng c:
n(p)=
p Tp
kU
) 1 (

Bin i Laplace ngc ta c:
n=kU(1-e
-t/T
)
Khi t = T, n = kU(1-e
-1
)=0.63kU=0.63n
max

Vy trn th ta xc nh im ti n=0.63n
max
sau tm c T
Da vo th tm c bng thc nghim ta tm c cc thng s kU v T

kU = 150 vng/s
T = 30ms=0.03s
Vy hm truyn gn ng:

1 03 . 0
5 . 37
1 03 . 0
24 / 150
1

p p Tp
k
G
1.5 Phng php n nh tc ng c dng PID:
1.5.1 Thut ton PID:

d
de
K d e K K G
d i p
) (
) (


Trong :
- K
p
: H s khu t l (khu khuch i)
Trang - 8 -

- K
i
: H s tch phn
- K
d
: h s vi phn

Lut iu khin PID:

Da vo bng trn ta thy rng lut t l (P) c c im tc ng nhanh
nhng khng trit tiu c sai lch, ng thi lm vt l ca h thng
tng. Khu tch phn cho php trit tiu sai lch nhng tc ng chm.
Khu vi phn phn ng vi tc bin thin ca sai lch. Ta cn xc nh
cc thng s K
p
, K
i
, K
d
c h thng c cht lng mong mun.
Thut ton ca b iu khin PID s:
Khu t l P (Proportional): G
P
(z) = K
P

Khu tch phn I (Integrate):

1
1
1
) (

z
T K z G
I I
vi

kT
k
n
nT Te dt t e
0
0
) ( ) (
Trong T l chu k ly mu vn tc. Cng thc tch phn
gn ng theo thut ton xp x hnh ch nht ti.
Khu vi phn D (Derivative):
Trang - 9 -

) 1 (
1
) (
1

z K
Tz
z
K z G
d D D
vi thnh phn vi phn xp x bi:

T
T n e nT e
dt
t de ) ) 1 (( ) ( ) (

Vy ta c hm truyn khu PID ri rc:
) 1 (
1
1
) (
) (
1
1

z K
z
K K
z E
z U
G
d i p
dk

U
dk
(z)(1-z
-1
) = E(z)(K
p
(1-z
-1
) + K
i
+ K
d
(1-z
-1
)
2

Suy ra:
u
k
u
k-1
= K
p
(e
k
e
k-1
) + K
i
e
k
+ K
d
(e
k
2e
k-1
e
k-2
)
1.5.2 Phng php hiu chnh thng s b PID Ziegler-Nichols:
Thng thng vic chn cc thng s P, I, D c xc nh bng thc
nghim da vo p ng xung ca h thng. Ziegler Nichols a ra
phng php chn tham s PID cho m hnh qun tnh bc nht c tr.
y ta xp x hm truyn ca ng c dng phng php ny, tuy khng
hon ton chnh xc nhng c th cho p ng tng i tt.
Phng php ny i hi phi tnh c gi tr gii hn ca ca khu t
l K
gh
v chu k gii hn ca h kn T
gh
. Sau tm cc thng s khc theo
bng sau:

tm c K
gh
v T
gh
, ban u ta chnh K
i
, K
d
bng 0 sau tng t t
K
p
h thng bin gii n nh (dao ng vi bin v chu k khng i),
ti y ta xc nh c K
gh
v T
gh
sau tnh cc thng s khc ty theo b
iu khin nh bng trn.
Ki = Kp/Ti
Kd = KxTd
thun tin trong qu trnh iu chnh v quan st p ng ca ng
c, trong n ny chng ti xy dng chng trnh vit bng VB trn my
tnh giao tip vi mch iu khin.
Trang - 10 -

Chng 2 TNG QUAN V PSoC IC CA HNG
CYPRESS
2.1. Gii thiu:
Trong chng ny s gii thiu chi tit chip PSoC ca hng CYPRESS
gm cc ni dung nh sau:
Trnh by kin trc bn trong chip PSoC: Tng quan v ti nguyn chip,
chi tit kin trc bn trong ca mt chip PSoC.
Gii thiu phn mm tht k PSoC Designer dnh cho chip PSoC ca
hng CYPRESS, phng php lp trnh phn cng (Device Editor) v
lp trnh ng dng (Application Editor). ng thi gii thiu tt c cc
module (embedded cores) trong th vin API m hng ny h tr.
2.2. Gii thiu IC kh trnh PSoC ca hng CYPRESS
2.2.1 Khi nim PSoC
PSoC hay PSoC Mixed-Signal Arrays l t vit tt ca Programmable
system-on-chips. PSoC l chip m c th tch hp c vi iu khin cc thnh
phn tng t v thnh phn s xung quanh vi iu khin nhng vo mt h
thng. Mt chip n PSoC c th tch hp ln n 100 chc nng ngoi vi vi
1 vi iu khin, lm gim thi gian thit k, khng gian board, nng lng tiu
hao v gim 5% gi thnh sn phm t nht 10$ cho mi h thng.
2.2.2 Tng quan v ti nguyn chip PSoC
PSoC khc vi cc vi iu khin 8 bit thng thng l c cc khi s v
cc khi tng t c th lp trnh c cho php thc hin nhiu giao tip
ngoi vi.
Khi s gm c nhiu khi kh trnh nh c th c cu hnh cho cc
ng dng khc nhau. Khi tng t c s dng cho cc cng c Analog nh
b lc, b so snh tn hiu tng t, cc b khuych i o, khng o nh
AD, DA.
C mt s h PSoC khc nhau m ta c th la chn xy dng cho ph
hp vi yu cu d n. im khc nhau gia c h PSoC l s lng cc khi
Trang - 11 -

kh trnh cho php nhng vo chip v s chn I/O. Mi chip PSoC c t 4-16
khi s v 3-12 khi tng t kh trnh ph thuc vo cc h khc nhau.






Hnh 2.1 V tr ca PSoC
Mt s im ni bt ca PSoC l:
Khi MAC, b nhn 8x8 hardware 32 bit.
in p hot ng c th thay i 3.3V hoc 5V
Kh nng hot ng vi in p cung cp thp hn yu cu 1V
C th la chn tn s hot ng cho chip
Microcontroller

ASIC
Standard
Product
Cn mc tch hp cao
hn v t thnh phn
hn (lower BOM)
Cn kh nng
thch nghi v linh
hot hn
Cn s tch hp
cao v linh hot
hn

PSoC
PSoC p ng tt c cc yu cu trn
Trang - 12 -


Hnh 2.2 Tng quan kin trc PSoC
Nhng ti nguyn h tr ngi dng xy dng kin trc PSoC:
32 KBytes ROM (FLASH) cho vic lp trnh vi 50000 ln xa ghi.
H tr ln n 2KByte SRAM, b nh ng EEPROM
B chuyn i AD vi phn gii ti a ln n 14 bits
B chuyn i DA vi phn gii ti a 9bits
B khuch i in p kh trnh
B lc v so snh tn hiu tng t kh trnh
Timer v Counter 8, 16 ,24hoc 32 bits.
Chui gi v b pht m CRC.
Trang - 13 -

Hai b UART song cng.
B SPI nhiu thit b (SPI master v SPI slaver).
Truyn thng gia tt c cc chn
Truyn thng gia cc khi.
Bo v cho vic lp trnh cho vng nh ring v bo v trnh ghi chng
ln.
Mi chn PSoC c th t cc trng thi Pull up, Pull down, High Z,
Strong, hoc Open
Kh nng to ngt ti bt k chn no ca PSoC
I2C Slaver v master hoc nhiu master vi tc ln n 400KHz
Tch hp b gim st mch bn trong (Watchdog, Sleep)
Xy dng cc mc in p chnh xc.
Lp trnh trc tip trn h thng ISSP
Vi s h tr a dng nh vy s ra i ca PSoC c v nh l bin
gic m thnh s tht i vi cc k s thit k. Trn cng 1 chip PSoC ta c
th thit lp nhng chc nng khc nhau rt linh hot cho mi d n. Khng c
1 vi iu khin no khc c in p kh trnh, khuch i o v khng o, b
pht chui serial gi v b pht m CRC cng nh b m ha. MAC (Multiply-
accumulate) cn thit cho phn x l tn hiu s, vi s cho php x l y
cc thut ton x l tn hiu s. Mt iu ng quan tm l b nhn bng phn
cng ny l 32 bit ch khng phi 8 bit nh vi iu khin. in p lm vic c
th thay i v c bit loi tr kh nng phi thit k li mch PCB v ch cn
cu hnh li bn trong chip. in p cung cp c th dao ng mc 1V l mt
thun li ht sc to ln cho ngun hot ng h thng. Timer, Counter v
PWM hot ng linh hot hn.

2.2.3 Cu trc chi tit bn trong chip PSoC
Tng quan v cu trc bn trong PSoC
Trang - 14 -


Hnh 2.3Kin trc PSoC IC
PSoC xy dng trn c s kin trc vi x l 8 bit CISC vi cu trc
Harvard (cu trc m bus d liu, bus a ch v tn hiu iu khin b nh
chng trnh, b nh d liu c lp nhau). Cu trc chung l cc khi:
CPU unit, Frequency generator, Reset controller, Watch Dog timer, Sleep
timer, Input-Output pins, Digital programmable blocks, Analog
programmable blocks, I2C controller, Voltage, MAC unit, SMP. Chng ta
tin hnh phn tch tng khi.
c im CPU

Hnh 2.4 CPU
Trang - 15 -

Chng trnh c lu trong b nh FLASH. CPU tm kim theo ch
dn t b nh chng trnh, gii m v thi hnh lnh. Khi CPU cha cc
thanh ghi PC, SP, A, X v F, khi ALU, khi gii m, kt hp vi nhau
trong qu trnh x l lnh.
Cc thanh ghi trong CPU:
Program counter (PC) l con tr PC, thanh ghi b m chng
trnh thc hin chng trnh ti v tr gi tr con tr.
Stack pointer (SP) tr n a ch SRAM ni data c ghi hoc
c trong trng hp ca PUSH v POP theo ch dn tng ng.
Khi hot ng ny xy ra gi tr con tr SP t ng tng hoc gim.
Accumulator register (A) l thanh cha A.
Index register (X) c th c xem nh thanh ghi A v cng c
s dng trong trng hp ca a ch ch s.
Flag register (F) l thanh ghi c cha bit m t hot ng trc .
Thanh ghi c cng ng vai tr chn trang nh RAM khi PSoC c
nhiu hn 256 Byte RAM. Thanh ghi c cha bit c Zero (Z) v c
Carry (C).
Arithmetic logic unit (ALU) l 1 phn chun ca CPU c s
dng trong cc php ton s hc nh php cng, tr dch tri phi,v
cc php ton logic. D liu sau tnh ton c th c lu tr trong
thanh ghi A, X hoc RAM data.
c im tn s hot ng
B pht tn s l s sng ca CPU v cc khi kh trnh. Mi thnh
phn kh trnh i hi mt tc hot ng khc nhau. PSoC c 1 h
thng pht ra cc tn s khc nhau.
Trang - 16 -


Hnh 2.5 B to tn s.
SYSCLK l b to dao ng nhip clock ni vi tc 24MHz, c
s dng nh l 1 ngun clock chun cho hu ht c tn hiu. T
c th la chn cc tn s mong mun nh : SYSCLKx2(48MHz),
24V1=SYSCLK/N1 (N1=1-16), 24V2=SYSCLK/N1N2,....
CPU_CLK c s dng cho CPU. CPU_CLK c th c mt s ca
8 tn s trong gii han t 93.75MHz n 24MHz.
CLK32K l tn hiu chm vi tn s 32kHz. Tn hiu SYSCLK c
th c yu cu s dng b dao ng ni IMO (internal main
oscillator), trong khi tn hiu CLK32K c c thng qua ILO
(internal local oscillator).
PSoC cung cp b dao ng ni vi chnh xc 2.5% v c th m
rng b dao ng thch anh bn ngoi.
Reset: C 3 ch Reset: POR, XRES v WDR
POR Trong qu trnh lm vic ngun cung cp PSoC c th thay
i,rt nguy him nu in p vt gi hn cho php v PSoC c th
thc hin nhng hot ng ngoi d on. Trong trng hp nay
PSoC cung cp mode Reset POR (Power on Reset) chuyn PSoC vo
trng thi ny cho n khi in p n nh gii hn cho php.
Trang - 17 -

XRES L mode Reset bn ngoi bng cng tc Switch nh cc vi
iu khin thng thng khc.

Hnh 2.6 Mch Reset
WDR Watch dog reset (WDR) c s dng mang h thng ra
khi ch vng lp cht hoc cc hot ng ngoi d on.
Digital Inputs and Outputs
IO s kt ni PSoC vi bn ngoi qua 8 chn mi Port. Lm vic vi
port l lm vic vi cc thanh ghi PRT0DR (port 0), PRT1DR (port 1),
PRT2DR, PRT3DR, PRT4DR v PRT5DR.

Hnh 2.7 Digital Inputs and Outputs
Drive Mode: Chn cch m thanh ghi PRTxDR c ni vi chn
PSoC. C 8 phng thc thit lp trng thi ca chn m khng cn
cc thit b h tr bn ngoi. Mode lm vic ca chn c nh
ngha theo bng bn di ng vi cc bit ca cc thanh ghi DM2,
DM1 v DM0. C th tc ng trc tip vo cc thanh ghi ny hoc
trong Device Editor.
DM2
bit
DM1
bit
DM0
bit
Mode Data = 0 Data = 1
Trang - 18 -

DM2
bit
DM1
bit
DM0
bit
Mode Data = 0 Data = 1
0 0 0 Resistive Pull Down Resistive Strong
0 0 1 Strong Drive Strong Strong
0 1 0 High Impedance Hi-Z Hi-Z
0 1 1 Resistive Pull Up Strong Resistive
1 0 0
Open Drain, Drives
High
Hi-Z
Strong
(Slow)
1 0 1 Slow Strong Drive
Strong
(Slow)
Strong
(Slow)
1 1 0
High Impedance
Analog
Hi-Z Hi-Z
1 1 1
Open Drain, Drives
Low
Strong
(Slow)
Hi-Z
Mode Strong: c s dng khi ni trc tip trng thi thanh ghi
PRTxDR vi chn PSoC. Phng thc ny c s dng khi chn
c s dng nh u vo.

Hnh 2.8 Mode Strong
Mode Analog Hi-Z: c dng khi pin l u vo tn hiu analog
nh u vo ADC. Trong trng hp ny thanh ghi PRTxDR c
cch ly vi chn PSoC v vy khng nh hng n gi tr in p
trn chn.

Hnh 2.9 Mode Analog High-Z
Trang - 19 -

Pull-up hoc pull-down l mode in tr ko ln hay ko xung bn
trong. Gi trng thi chn 1 mc nht nh khi khng c tc dng
bn ngoi.
Mode Open drain c dng khi mang 1 vi thit b trn 1 line, lc
ny cn thm in tr treo bn ngoi. Cn cho vic chuyn trng thi
nhanh nh trng hp ngt.

Hnh 2.10 Mode Open Drain
Tng quan cc lin kt ca khi kh trnh s.

Hnh 2.11 Tng quan khi s
GIO v GIE l Global input chn (P1,P3,P5) v l (P0,P2,P4,P6):
Input multiplexers ca block lines
Input multiplexer chn 1 trong cc global lines v ni n cc line tn
hiu pha trn cc khi kh trnh. Phn ny s c trnh by k trong
mc 3.3 (PSoC Designer).
Khi kh trnh s: M t chi tit hnh bn di. Khi kh trnh s
c chia lm 2 loi: Digital Basic block (DBB) v Digital
communication block (DCB) :
Digital Basic block nh: 8,16,24,32 bit Timer. 8,16,24,32 bit
Counter, 8,16 bit PWM. 8,16 dead band Generator. 8,16,24,32 bit
Trang - 20 -

Pseudo random sources (PRS). Cc b m v o s, b pht m CRC.
Cc khi ny c th t vo bt k khi s no trong PSoC m cn trng
(DBB hoc DCB).
Digital communication block: ch c th t vo cc khi kh trnh
hai ct bn phi (DCB). V d: I2C master v Slaver, SPI Master v
Slaver, UART, Hng ngoi IrDA.

Hnh 2.12 Khi s
Frequency signal (CLK)
Ly t b pht tn s bn trong VC1, VC2, VC3, SYSCLKx2,
CPU_32
T u ra khi khc (Counter, Timer, PWM)
T dy chung Broadcast line (BC)
u vo (RI) hoc u ra (RO) block lines

Hnh 2.13 Clock
Logic circuit sa i tn hiu ra: cho php qua 1 ca 2 tn hiu, o
tn hiu v thc hin cc php ton logic AND, OR, XOR,...
Trang - 21 -


Hnh 2.14 Logic circuit
Cc khi kh trnh Analog
Cc khi kh trnh Analog c chia lm cc ct mi ct 3 khi, ty vo
cc h khc nhau m c 1, 2, hoc 4 ct Analog. Mi ct c b Mux u
vo, 1 dy tn s, u ra analog hoc u ra so snh. Cc khi tng t c
th lin kt vi cc khi s so snh hoc ly tn s Clock. u vo v
u ra tn hiu Analog ch cho php 1 s chn gm P0 v 4 chn thp ca
P2.

Hnh 2.15 Tng quan khi analog
Trang - 22 -

Analog multiplexers of port P0 Tn hiu t Port 0 c ni n
khi analog ACB.
Analog columns Mi ct c 3 loi khi block: ACB, ASC v ASD.
u ra ca nhngkhi ny c ni n cc khi k bn hoc u ra
Analog hoc u ra so snh.

Hnh 2.16 Mt ct ca khi analog
Khi ACB s dng cho cc b khuch i. Ph thuc cc lin kt
ni bn trong khi m c th l khuch i o, khng o hoc so
snh. u vo khi ny c ly t b Analog multiplexer hoc t
cc khi k bn.
Khi ASC and ASD l loi switched capacitor (SC). Chng cha b
khuch i vi rail-to-rail IO v b MUX ni. ADC, DAC v b lc
thi hnh ty thuc vo cu hnh bn trong khi. u vo khi SC ly
t nhng khi khc nhng tn hiu t b MUX analog khng th a
trc tip vo khi SC m phi qua khi ACB
u ra Analog Mi ct analog c chung ng 1 ng
AnalogOutBus ni ra b m ra 4 chn gia P0 (P0_2 - P0_5).
Comparator outputs Mi ct c 1 ng so snh goi l compare
line c th ni n cc khi s hoc khi tng t khc.
Frequency signal Nhng khi ADC, DAC v b lc cn nhng tn
s c bit hot ng, tn s ny c chn qua b MUX: t
VC1, VC2, u ra ca 1 s khi clock (Counter, timer, PWM)

Trang - 23 -


Hnh 2.17 Tn s tn hiu cho khi Ananlog
Cc mc in p tham chiu:
Trong PSoC c 3 mc in p tham chiu: AGND, RefH, RefLo.
c m t hnh bn di.



Hnh 2.18 Cc mc in p tham chiu
Switch Mode Pump

Hnh 2.19 Mode Pump
Ref Mux AGND [V] RefLo [V] RefHi [V]
Vdd/2 Vbg 2.5/1.65 1.2/0.35 3.8/2.95
Vdd/2 Vdd/2 2.5/1.65 0 5.0/3.3
Vbg Vbg 1.3 0 2.6
1.6Vbg 1.6Vbg 2.08 0 4.16
2Vbg Vbg 2.6 1.3 3.9
2Vbg P2[6] 2.6 1.6 3.6
P2[4] Vbg 2.2 0.9 3.5
P2[4] P2[6] 2.2 1.2 3.2
Trang - 24 -

Trong mode Pump ngun cung cp ly t Pin, hot ng trn nguyn tc
ca chuyn i BOOSTDC/DC. BOOSTDC/DC to ra in p cao hn
1.5V lm ngun nui cho PSoC .
Khi MAC
MAC l 1 khi thit b phn cng dng tnh ton nh nhn cc s 8 bit
cng nh php cng. Vic thc hin rt n gin, vic chng ta lm l c
v ghi cc gi tr vo cc thanh ghi
Hardware multiplication
Thc hin bng cch ghi 8 bit u vo X v Y vo thanh ghi
MUL_X v MUL_Y v c gi tr u ra 16 bit t thanh ghi
MUL_DH v MUL_DL.

Hnh 2.20 Hardware multiplication
Sum of products
Trong php nhn, kt qu c th c cng dn v lu trong b
tch ly 32 bit. l cch to nn hot ng tnh tng ng thi l
m t ht sc quan trng trong x l tn hiu s. Bn cnh khi
MAC cho php thc hin php nhn nhiu BYTE rt n gin.

Hnh 2.21 Sum of products
Trang - 25 -

Qu trnh tnh c thc hin khi nhp d liu X v Y vo thanh
ghi MAC_X hoc MAC_Y hoc cng c th ghi vo cc thanh ghi
MUL_X v MUL_Y, trng hp kt qu cha c c th gi tr
tnh ton c lu trong cc thanh ghi ACC_DR3, ACC_DR2,
ACC_DR1 v ACC_DR0. bt u php tnh gi tr phi tr v 0
bng cch ghi gi tri 0 vo thanh ghi MAC_CL1 hoc MAC_CL0.
Interrupt Controller
Ngt l b my bn trong vi iu khin cho php phn ng nhanh vi 1
s s kin khi xy ra s kin . Nhng nguyn nhn xy ra ngt bn trong
nh: Timer, ADC,... v nguyn nhn bn ngoi nh kt thc nhn 1 chui,
thay i trng thi chn (cnh ln hoc cnh xung). Khi ngt xy ra,
chng trnh chnh tm dng v thi hnh chng trnh ngt. Thc hin 1
ngt gm cc bc:
Khi 1 ngt xy ra, iu khin ngt ct gi loi ngt.
Dng thc hin chng trnh chnh
Nu ngt c cho php hoc bit ngt ton cc c set bng 1(GIE
= 1), qu trnh thc hin chng trnh ngt bt u. Stack ct gi gi
tr ca PCH, PCL v thanh ghi F.
Mt ngt mi xy ra khng cho php bng cch t gi tr thanh ghi
F bng 0 (GIE = 0).
B m chng trnh nhy n a ch ngt c nh ngha.
Thc hin chng trnh ngt.
Gp lnh RETI th quay tr v chng trnh chnh gi tr thanh ghi F
c khi phc t stack, b m chng trnh c tr v gi tr c.

Hnh 2.22 Ngt
Thanh ghi PRTxIF c s dng th hin ngt GPIO trn port, trong khi
PRTxIC1v PRTxIC0 l cc thanh ghi iu khin ngt thch hp. Mi
Trang - 26 -

ngt c th giu hoc xa vi s h tr ca thanh ghi INT_MSK v
INT_CLR .
Khng gian a ch b nh
PSoC c 3 khng gian a ch b nh: ROM, RAM, registers. V trong
kin trc vi x l Harvard truy cp vo b nh ROM vi 1 ng c
bit. V vy PSoC c th c ch n v truy cp d liu cng 1 lc.

Hnh 2.23 Khng gian a ch b nh
Program memory B nh chng trnh l 1 phn ca ROM, c
s dng cha m chng trnh. M chng trnh c ghi vi s
h tr phn cng bn ngoi. B nh chng trnh l cng c trong
cng ngh FLASH, n tht n gin cho vic thay i chng trnh.
Ty vo cc h PSoC m h tr cc b nh chng trnh khc nhau:
2, 4, 8, 16 v 32 kB.
Supervisory ROM (ROM gim st) Supervisory ROM l 1 phn
ca ROM, c s dng o, kim tra cc thnh phn. Vi kin
trc c bit SSC c th truy cp nh 1 phn b nh.
RAM c th lu tr cc bin s v stack m c s dng trong qu
trnh lm vic ca PSoC. Vi cc h PSoC CY8C29xx c nhiu hn
256 byte . RAM c qun l trong cc page vi stack c lu
trang cui cng.
Thanh ghi PSoC c 512 thanh ghi trong 2 bank 256. truy cp
vo thanh ghi bn cnh tn ca n ngi s dng phi bit tn bank.
truy cp c bank bng cch s dng macros M8C_SetBank0
Trang - 27 -

and M8C_SetBank1, vi vic xa hoc set bit XIO trong thanh ghi
CPU_F.
3.3 Gii thiu phn mm PSoC Designer ca hng CYPRESS
3.3.1 Tng quan v PSoC Designer
PSoC Designer l phn mm do hng CYPRESS cung cp min ph
lp trnh cho PSoC. Nhn chung PSoC Designer c chia l 2 phn:
Device Editor : xy dng kin trc phn cng cho PSoC
Application Editor: vit cc chng trnh ng dng.
Ngoi ra cn ra cn c phn debugger dch ra file Hex, v PSoC
Programmer l chng trnh np vo chip PSoC s dng mch np ca hng
CYPRESS. la chn ca s lm vic click chut vo cc nt c biu trng
trn hnh:



Hnh 2.24 Chn ca s lm vic
3.3.2 Xy dng kin trc phn cng( Device Editor)
Cc mc datasheet ca PSoC
PSoC c 3 mc datasheet: Device datasheet, Datasheet tng module
(embedded core) v datasheet do ngi s dng xy dng
Device datasheet l datasheet do nh sn xut a ra chung cho c h
PSoC v d: CY8C29xx66 hoc CY8C27xx43. Cung cp nhng thng
tin:
Cc thanh ghi
c im nhiu
Loi v kch thc package
Nhng thng tin chung chung v thng tin v nh sn xut
xem Device datasheet vo PSoC Designer mc
Help/Documentation hoc vo trang web ca nh sn xut:
www.cypress.com
Device Editor
Application Editor Debugger User module selection view
Interconnect View
Trang - 28 -

Datasheet ca tng module: Cung cp biu USER Module, chi tit
c im ca USER Module, lu ni t module trong cc khi kh
trnh PSoC, v code mu. Chi tit s c trnh by trong phn PSoC
Designer.

Hnh 2.25User module
Trong :
(1): Th vin Module: Chn cc module s dng ph vi vi project
ca ngi dng bng cch click p chut.
(2): S khi user module
(3): Datasheet user module (ti nguyn,m t c im, tng quan,
s khi, m t chc nng, cc thng s c im k thut, ni t
n, thc o ti nguyn chim dng, th vin API, code mu v cc
thanh ghi).
(4):Thc o ti nguyn (Khi s, analog, ROM, RAM, Decimator,
I2C controller s dng)
1


3

4
2
Trang - 29 -


Hnh 2.26: Thc o ti nguyn
Cc Module m PSoC Designer h tr:
ADCs: ADCINC, ADCINC12, ADCINC14, ADCINCVR,
DELSIG8, DELSIG11, DUALADC, DUALADC8, DelSig,
SAR6, TRIADC, TRIADC8
AMPLIFIERS: AMPINV, CMPPRG, CmpLP, INSAP,PGA
Analog Comm: DTMFdialer (bn phm tng t)
Counters: Counter8, Counter16, Counter24, Counter32
DACs: DAC6, DAC8, DAC9, MDAC6, MDAC8
Digital Comm: CRC16, EzI2Cs, I2CHW, I2Cm, IrDARX,
IrDATX, RX8, SD Card, SPIM, SPIS, TX8, UART.
Filters: BPF2, LPF2
Generic: SCBLOCK
Misc Digital: DigBuf, DigInv, E2PROM, LCD, LED,
LED7SEG, Sleep Timer.
MUX: AMUX4, AMUX8, RefMux
Protocols: BootldrI2C
PWMs: PWM8, PWM16, PWMDB8, PWMDB16.
Random Seq: PRS8, PRS16, PRS24, PRS32.
Temperature: FlashTemp
Timers: Timer8, Timer16, Timer24, Timer32.





Trang - 30 -





Datasheet do ngi s dng xy dng: trong PSoC Designer, chn
View/datasheet.

Hnh 2.27 Datasheet do ngi s dng xy dng .
Interconnection View
Thi gian to
datasheet
Cc module
s dng
Trang - 31 -


Hnh 2.28 Interconnection View
Mi s lin kt cha c php nu cha t cc khi s hoc tng
t vo cc khi kh trnh v ch thc o ti nguyn set xong. y l
phn cng vic quan trng c th c thc hin ca s Interconnection
View. phn trung tm l hnh m t cc khi kh trnh v cc line lin
kt.Cng vic xy dng kin trc line ging nh routing PCB nhng n
gin hn. Quan trng l vic thit lp cc thng s Global s c trnh
by phn tip theo.
Global Parameters: Cc thng s Global tab bn tri ca s
Interconnection View c th hnh bn di.
Trang - 32 -


Hnh 2.29 Global Parameters
Cc thng s ny c mc nh 1 s gi tr hp l m ngi
dng ch cn la chn. V d in p cung cp mc nh chn 1 trong 2
gi tr 5V hoc 3.3V nhng vi 1 s thng s ngi s dng c th nhp
vo. V d nhp gi tr VC3 Divider.
Component Parameters
thit lp cc thng s cho User Module. Cc thit b ngoi vi
ca PSoC ht sc linh hot n hot ng ph thuc vo cc thng s
ngi dng thit lp.in hnh l chn tn s ca tn hiu, cc kt ni
vi cc khi khc v cc lin kt bn trong.V vy thit lp cc thng s
ny l iu kin bt but. Hnh bn di th d cho module PWM16

Hnh 2.30 Component Parameters
Pin Parameters
Trang - 33 -

L bng thit lp thng s trng thi chn. Cc kiu chn PSoC
c trnh by phn trc.T t c c mc nh l Analog Hi-Z,
ngi s dng c th chn mode hot ng cho chn PSoC ph hp vi
yu cu. y cng l 1 trong nhng u im vt tri ca PSoC so vi
vi iu khin thng thng. Chn mode drive cho pin c 2 cch hoc
thit lp cc thng s trong bng ny hoc lp trnh bng phn mm
bng cch t cc gi tr thanh ghi thch hp.
Trong ct Select nu chn l StdCPU th chn chc nng chun
IO v khng kt ni n bt k khi no.
Ct Drive thit lp mode hot ng ca chn PSoC nh pull-
up, pull-down, Strong, Strong low, Open drain high, Open drain
low, High Z, High Z Analog . Trng hp cn tr khng cao chn
High Z Analog.
Ct th 3 s dng thit lp chn ngt. Mc nh l khng c
ngt (Disable), c 3 nguyn nhn ngt l cnh ln (Rising Edge), cnh
xung (Falling Edge) v thay i trng thi t vic c (Change from
read).

Hnh 2.31 Pin Parameters
Placement
Nhng trng t cc khi kh trnh c mu xm, khi c
module khc thi c mu c trng ca module . Click vo biu tng
Place hoc click chut phi chn Place. Ch phi tun th nguyn tc
v v tr cc khi Communication Digital v cc khi Analog nh
Trang - 34 -

trnh by phn trc. Ni cc u ra du vo ca khi bng cch click
chut tri ta s thy 1 danh sch im ch c th ni nh hnh v bn
di.

Hnh 2.32 Placement
Digital Components Interconnection
Lin kt cc khi s trc ht yu cu ngi dng phi bit c bn
v cc khi kh trnh.

Hnh 2.33 Digital Components Interconnection
pha trn c 4 line u vo khi digital c mu v bn di
cc khi l 4 line u ra khi digital c mu xanh. Khi Digital khng
th ni trc tip ra chn PSoC nhng qua b MUX v input line v
output line ton cc (GIO, GIE, GOO, GOE).
Trang - 35 -


Hnh 2.34 Digital MUX
Global input lines (GIO v GIE) bn tri mn hnh v global
output lines (GOO v GOE) bn phi mn hnh. Click chut biu
tng MUX PSoC Designer s hin ra cc Global input lines cho php
ni ng vi cc digital line u vo khc nhau.

Hnh 2.35 Global Line In
PSoC Designer h tr cho bn rt nhiu, bn d dng to ra cc
lin kt n gin bng cch click chut v chn.di y l mt s hnh
minh ha thc hin ni u ra cc khi vi chn PSoC.

Hnh 2.36Output
Trang - 36 -


Hnh 2.37 Global line out
Analog Components Interconnection
Chi tit hnh bn di . Nguyn tc tng t khi s nhng gii
hn mt s chn Analog vo v ra ch khng phi chn no cng c
nh khi s. Mc khc n tun theo qui nh t cc khi Analog vo
ACB, ASC v ASD c trnh by phn trc.

Hnh 2.38 Analog Components Interconnection
3.3.3 Ca s vit ng dng(Application Editor)
Trang - 37 -

Application Editor l giao din cho ngi dng lp trnh ng dng bng
1 trong 2 ngn ng C hoc ASEMBLY.

Hnh 2.39 Application Editor
Trong Application Editor c cc file t ng to ra trn c s nhng
khi m bn chn bng cch click vo biu tng Generate Application.
Debugger dch ra file hex: click chut vo biu tng Debugger dch
chng trnh ra file Hex.
Trang - 38 -

CHNG 3: L THUYT V MOSFET

3.1 Gii thiu v MOSFET
Transistor hiu ng trng gi tt l FETs [Fiel-Effect Transistors]
bao gm hai loi chnh l: Transistor hiu ng trng c cu trc cng
bng bn dn-oxide-kim loai, gi tt l MOSFET [Metal-Oxide-
Semiconductor FET], v transistor hiu ng trng c cu trc cng
bng tip gip pn, thng gi l JFET [Junction FET]. Transistor
MOSFET tr thnh mt trong nhng dng c bn dn quan trng nht
trong vic thit k ch to cc mch tch hp (ICs) do tnh n nh nhit
v nhiu c tnh thng dng khc ca n. C MOSFET v JFET u dn
in theo cc knh dn, nn mi loi u c dng knh dn bng
bn dn n hoc p, gi l MOSFET knh n (gi tt l NMOS),
MOSFET knh p (gi tt l PMOS) v JFET knh n v JFET knh p
tng ng. Ngoi ra, i vi MOSFET da theo nguyn tc hnh thnh
knh dn m c MOSFET cm ng knh hay tng cng knh; giu
knh (knh khng c sn) v MOSFET ngho knh (knh c sn).
3.2 Cu trc c bn ca NMOS kiu tng cng :



Trang - 39 -



Nguyn l hot ng :
Khi V
GS
>0, mt in trng c to ra vng cng. Do cng mang
in tch dng nn ht cc in t trong nn bn dn p n tp trung mt
i din ca vng cng. Khi V
GS
ln, lc ht mnh, cc in t n tp
trung nhiu v to thnh mt thng l tm thi ni lin hai vng ngun S v
thot D. in th V
GS
m t dng in thot I
D
bt u tng c gi l
in th thm cng ngun (gate to sourse threshold voltage) V
GS(th)
. Khi
V
GS
tng ln hn V
GS(th)
, dng in thot I
D
tip tc tng nhanh.
Ngi ta chng minh c rng :

2
GS GS(th)
[V -V ]
D
I K
Trong : I
D
l dng thot ca E-Mosfet
K l hng s vi n v A/V
2

V
GS
l in th phn cc cng ngun.
V
GS(th)
l in th thm cng ngun.
Hng s K thng c tm mt cch gin tip t cc thng s do nh
sn xut cung cp.
c tuyn truyn t v c tuyn dng mng :



Trang - 40 -

3.3 u nhc im v cc thng s quan trng ca MOSFET:
3.3.1 Nhng u im ca mosfet :
- Tc chuyn mch nhanh, tn hao chuyn mch nh hn BJT
v IGBT.
- Tn hao dn b hn BJT v IGBT vng dng in nh v va.
- Khng tn cng sut iu khin nh BJT, cc mc cng sut
khc nhau th mch iu khin khng khc nhau nhiu,gip n
gin ho vic thit k.
- C tui th rt cao nu c tnh ton tt.
- Vi vng in p thp(di 50V) v dng ln( c trm Ampe) th
mosfet l s la chn tt nht.
3.3.2 Cc nhc im ca mosfet.
- B hn ch v in p (<1000V) v dng in( c vi trm Ampes
li).
- Khi dng in tng th tn hao tng nhanh hn BJT v IGBT.
- Chu qu ti km, nhy cm vi nhit .
- Gi thnh cao hn BJT v IGBT cng in p v dng in nh
mc.
V nhng l do trn m mosfet thng c s dng cp in p
320VDC( 220VAC sau chnh lu) v dng in vi trm Ampes tr li.
3.3.3 Cc thng s quan trng ca mosfet :
- Drain-to-Source Breakdown Voltage: y l in p mt chiu ln
nht cho php trn cc Drain v Source. Khi tnh ton thng ly h
s an ton v in p l1.5 tr ln.
- Continuous Drain Current dng in mt chiu lin tc ln nht chy
qua mosfet, gii hn bi tn hao dn , thng cho 25C v 100C .
- Pulsed Drain Current: Dng in xung ln nht chy qua mosfet,
ph thuc vo rng xung,gii hn bi din tch an ton(Safe
Operating Area-SOA).
- Gate-to-Source Voltage: in p iu khin gia cc Gate v Souce,
thng ln nht l 20V,thc t hay t khong 10V,khi mosfet hot
Trang - 41 -

ng xy ra hin tng in p iu khin b tng cao do nh hng
ca in dung k sinh gia cc Drain v Gate,khi tnh ton nu thy
in p ny tng cao cn thm mt diode zener mc gia cc Gate v
Souce.
- Max. Power Dissipation:Cng sut tiu tn ln nht trong iu kin
lm mt tt nht v mt nhit nht nh, thng cho 25C ,
da vo Linear Derating Factor c th tnh ra cng sut tiu tn nhit
cc nhit khc. Cng sut tiu tn trn thc t ph thuc ch
yu vo dng ng v v iu kin lm mt, v b hn nhiu gi tr
nh mc.
Vd: Loi IRF-540N, dng v TO-220, datasheet cho Max. Power
Dissipation =130W ti 25C,nhng trong iu kin lm mt cnh tn
nhit v qut cng bc tt nht th thng ch nn ly ti a 50W.
Tt c cc loi van khc c cng dng ng v ny cng khng c
chn qu 50W.
- Linear Derating Factor: H s suy gim cng sut to nhit theo
nhit , khong 0.7-2.5W/C.
- Operating Junction and Storage Temperature Range: gii hn nhit
ca lp tip gip,thng l -55 n +175C. Qu thang nhit
ny van s hng.
- Peak Diode Recovery dv/dt: Gii hn tc tng in p trn diot
mc gia cc Drain v Souce,thng <5V/ns, khi qu gi tr ny van
s hng. S d c thng s ny l v trong van tn ti cc gi tr in
dung v in cm k sinh. Khi c bin thin in p ,cc yu t ny
s tng tc, to ra mt s ln ph hng cc lp tip gip
trong van.
- Static Drain-to-Source On-Resistance: in tr biu kin trng thi
dn, y l thng quyt nh n tn hao dn, thng s ny ph
thuc nhiu vo in p chu ng ca van v nhit lp tip gip
,tng khi nhit lp tip gip tng , v tng nhanh khi in p nh
Trang - 42 -

mc tng. C l y l l do ti sao mosfet t c ch to cp in
p trn 1000V.
- Rise Time v Fall Time: thi gian chuyn mch ca van tng ng
t trng thi kho sang trng thi dn v ngc li , c trnh by
trong gin di y.y l thng s quyt nh n tn hao
chuyn mch , l thng s quan trng khi nh gi cht lng ca
van, khi tnh ton mch iu khin th Rise Time v Fall Time ca
xung iu khin phi b hn cc thng s ny ca van.
- Total Gate Charge: in tch tng cng ca cc t in k sinh trn
cc Gate ti mt gi tr Uk nht nh, thng cho 10V, y chnh
l in tch m mch iu khin(gate driver) phi np hoc x cho
cc t ny trong qu trnh ng hay m van.Bi vy m mch iu
khin i khi cn c gi l Gate charge.
Thng s ny quyt nh n gi tr Ipgeak ca mch iu khin,
in tch ny cng ln th Ipgeak cng phi ln m bo cc t
ny c np trong thi gian xc nh. Thng Ipgeak trong khong
0.5-2A.
Trang - 43 -

PHN 2: THIT K V THI CNG

CHNG 4: THIT K V THI CNG PHN CNG

4.1 S nguyn l:
J9
CON2
1
2
L
C
D
_
R
S
12V
J7
1
2
3
4
5
J14
CON2
1
2
GND
U16
LM7805C/TO220
IN
1
OUT
3
G
N
D
2
D5
DIODE
VCC
Q3
2SA1013
J11
CON4
1
2
3
4
C6
CAP
J13
CON4
1
2
3
4
C7
CAP
C8
CAP
Q5
2SC1815
XRES
R14
1k8
R15
1K
L
C
D
_
D
7
L
C
D
_
D
6
L
C
D
_
E
L
C
D
_
W
R
L
C
D
_
D
5
L
C
D
_
D
4
J10
CON3
1
2
3
J5
LCD 16x2
123456789
1
0
1
1
1
2
1
3
1
4
1
5
1
6
VCC
GND
J8
CON2
1
2
Encoder
KHOI NGUON CUNG CAP
P2.3
R17
3K9
D6
LED
VCC
R5
RESISTOR
JACK NAP ISP
P1
CONNECTOR DB9
594837261
C2 10u
C3 10u
C4
10u
CY29566
U4
CY29566
P2[5]
1
P2[3]
2
P2[1]
3
P4[7]
4
P4[5]
5
P4[3]
6
P4[1]
7
SMP
8
P3[7]
9
P3[5]
10
P3[3]
11 P
3
[
1
]
1
2
P
1
[
7
]
1
3
P
1
[
5
]
1
4
P
1
[
3
]
1
5
P
1
[
1
]
1
6
V
S
S
1
7
P
1
[
0
]
1
8
P
1
[
2
]
1
9
P
1
[
4
]
2
0
P
1
[
6
]
2
1
P
3
[
0
]
2
2
P3[2]
23
P3[4]
24
P3[6]
25
XRES
26
P4[0]
27
P4[2]
28
P4[4]
29
P4[6]
30
P2[0]
31
P2[2]
32
P2[4]
33
P
2
[
6
]
3
4
P
0
[
0
]
3
5
P
0
[
2
]
3
6
P
0
[
4
]
3
7
P
0
[
6
]
3
8
V
D
D
3
9
P
0
[
7
]
4
0
P
0
[
5
]
4
1
P
0
[
3
]
4
2
P
0
[
1
]
4
3
P
2
[
7
]
4
4
C5
10u
U15
MAX232
C1+
1
C1-
3
C2+
4
C2-
5
V
+
2
V
-
6
R1OUT
12
R2OUT
9
T1IN
11
T2IN
10
R1I N
13
R2I N
8
T1OUT
14
T2OUT
7
Q1
IRF540N/TO
R6
4K7
R8
1k
R9
10k
Encoder
VCC
VCC
LCD_RS
12V
J1
CON2
1
2
LCD_D7
JACK NOI ENCODER
LCD_D6
R11
2K7
Q2
2SC1815
MACH DAO CHIEU DONG CO
MACH DRIVER CHO FET
VCC
C9
CAP
D3 D4
L
C
D
_
D
5
0 91
SW2
SW THWHEEL-DEC
LS1
RELAY DPDT
3
4
5
6
8
7
1
2
L
C
D
_
D
4
12V
VCC
GND
LCD_E
XRES
F
E
T
LCD_WR
SCL
SDA
SW3
RESET
R13 1K
S
C
L
S
D
A
C1
104
G
N
D
Q4
2SC2383
D2
LED
DC motor
P2.5
VCC

Nguyn l hot ng:
Chip PSOC CY29566 iu khin trung tm lm nhim v tnh ton, xut
ra xung iu khin cho khi iu khin ng c, iu khin o chiu ng
c. iu khin hin th LCD v giao tip vi my tnh.
Khi giao tip my tnh gm Max232 chuyn mc tn hiu RS232 vi
mc logic 0 (+3V n +15V) sang TTL 0V, v mc logic 1 (-15V n -3V)
thnh 5V. Nh khi ny, vn tc hin thi ca ng c s c cp nht ln
my tnh v cc t my tnh ta c th iu khin tc ng c, thay i
cc thng s ca b iu khin PID. Gi tr ca cc t trn s mch l
10u c chn theo datasheet ca nh sn xut.
Khi iu khin cng sut (mch Drive cho FET) kch cho FET hot
ng theo tn hiu PWM t PSOC. m bo cho FET chuyn mch
Trang - 44 -

nhanh y ta dng mch kch kiu totem-pole gm 2 BJT 2SC2383 v
2SA1013.
Khi o chiu ng c dng relay o in p t vo ng c.
Khi hin th dng LCD 16x2 hin th thng s Ki, Kp, Kd tc
hin thi, tc ci t.
Khi ngun cung cp: mch n p dng IC 7805 cp in p 5V cho
mch hot ng.
4.2 Tnh ton cc thng s ca mch:
4.2.1. Mch o chiu ng c:
P2.3
J1
CON2
1
2
R11
2K7
Q2
2SC1815
MACH DAO CHIEU DONG CO
D3 D4
LS1
RELAY DPDT
3
4
5
6
8
7
1
2
12V
F
E
T
R13 1K
C1
104

iu khin chiu quay ca ng c in 1 chiu, ta c th dng mch
cu H, hoc c th dng Relay. V dng relay chi ph thp hn nn trong
n ny chng ti la chn gii php ny. Nguyn l ca mch ny n
gin nh sau:
Khi chn P2.3 mc thp, BJT Q2 tt, tip im 3 ni n 4, tip im
6 ni n 8, khi Vcc ni ti chn 2 ca CON2, cc D ca FET ni ti
chn 2 ca CON2 ng c chy theo chiu thun(chiu quy c). Khi c tn
hiu kch 5V ti chn P2.3, BJT Q2 dn, tip im 3 ni n 5, tip im 6
ni n 7, lc ngun cung cp cho ng c o ngc so vi trng hp
trn, do ng c quay theo chiu ngc li.
Ta tnh chn vi dng cc i qua ng c l 5A, Chn Relay 10A.
Cng sut ca relay 530mW, -> dng qua relay 0.530/12 = 44mA. Cng
sut tn hao trn BJT Q2 ch yu l cng sut dn: P = V
cesat
xI
csat
=
0.25x44mA = 11mW.
Trang - 45 -

Vy chn BJT 2SC1815 c: I
c
= 150mA, V
ce
= 50V, cng sut 400mW,
hfemin = 70.
BJT dn bo ha th Ibmin = I
c
/h
femin
= 44/70 = 0.63mA.
Chn dng qua R13 khong 0.7mA, => R13 = 0.7V/0.7mA = 1k.
Chn dng Ib ~ 1.5Ibmin => chn Ib = 1mA
Dng qua R11 = I
b
+ I
R13
= 1.7mA
R
11
= (5V-0.7V)/1.7 = 2.53k =>chn R
11
= 2k2.
4.2.2 Tnh ton cho FET:
Tnh dng ti a qua ng c:
Ta c phng trnh ca ng c trng thi xc lp:
a m L e
I K B T T

m
L
a
K
B T
I

ng vi ti c th ta c th xc nh c TL t ta c th xc nh
c dng Ia cc i qua ng c.
Gi s ta tnh vi dng ti a qua ng c l 5 A
Ta phi chn MOSFET c VDS >2Vng c, dng >1.5 -> 2ln Imax,
khong10A, cng sut tiu tn trn MOSFET ty thuc vo tng loi FET,
y ta chn cc thng s ca IRF540 tham kho sau kim tra li
cng sut c m bo hay khng..
Cng sut tiu tn trn MOSFET bao gm 2 thnh phn: cng sut tiu
tn khi FET dn v cng sut chuyn mch:
Ptt = Pd + Psw
Cng sut tiu tn khi FET dn c tnh theo cng thc:

T
T
R I P
on
DSon d
. .
2

Theo datasheet ca IRF540, R
DsonMax
= 2.5 (Tj=150
o
C), Imax = 2.5 A,
T
T
on
max = 1
Pdmax = 5
2
x2.5 = 62.5W
Cng sut tiu tn khi MOSFET hot chuyn mch:

Trang - 46 -



Dng sng Vds v Vgs



Tn hao trong qu trnh chuyn t off sang on
E
1
=
r DS cc
tr r
DS
DS DS
tr
ds ds
t I V dt t
t
V
V I dt t i t v . .
2
1
). .( . ) ( ). (


Tng t nh trn tn hao khi t on sang off:
E
2
=
f DS cc
tf
ds ds
t I V dt t i t v . .
2
1
. ) ( ). (

P
sw
=
sw f r DS cc
f t t I V ). .( .
2
1

Tn s iu xung c s dng y l 24khz, trong phn mm s
dng 2000 mc iu xung, tuy nhin, ta ch cn mch p ng 100 mc
Trang - 47 -

iu xung (v thi gian p ng cng nhanh th gi tr dng nh np cho t
ng vo ca FET cng ln, ta khng mun dng nh ny qu ln). Thi
gian ca 1 mc iu xung lc ny l: 1/(24.1000.100) = 0.417s =417ns.
Tng thi gian np v x t ng vo ti cc G phi nh hn gi tr ny. Ta
chn t
r
+ t
f
=200ns
P
sw
= 30.5. 200.10
-9
.24.10
3
= 720 mW.
Trong f
sw
l tn s chuyn mch.
Cng sut tng cng ln nht: 63.2W
Vy MOSFET IRF540 c cc thng s: V
DSS
= 100V, I
DS
= 33A, P
max
=
130W tha mn cc yu cu ra.
4.2.3 Tnh ton mch Driver cho MOSFET:
S mch Driver:

Q3
2SA1013
Q5
2SC1815
R14
1k8
R15
1K
Q1
IRF540N/TO
R6
4K7
12V
MACH DRIVER CHO FET
Q4
2SC2383
DC motor


Mch Diver c mc theo kiu totem-pole gm 2 BJT 2SC2383 v
2SA1013 m bo tn s chuyn mch nhanh cho FET.
Tnh cng sut ca Q3 v Q4:
Ta tnh da vo in tch cn np cho t C
GS
.
P
DRI
= V.Q
G
.f
sw
= 12.72.10
-9
.24.
3
= 21mW.
Q
G
:tng in tch np hoc x cho cc G. Theo datasheet, Q
G
= 72nC
M: t
x
= Q
G
/I
G
=> I
G
= Q
G
/tx
T
x
thi gian np hoc x t ng vo, 2.t
x
=200ns=(t
r
+ t
f
)
I
G
> 72.2/200 = 720mA
Trang - 48 -

Chn BJT Q3,Q4: c V
ce
> 2Vcc, P>2.21mW.
chn BJT 2SC2383 v 2SA1013.
Tnh R14: R
14
= (24V-0.7V).60/720mA = 1.94k -> chn 1k8
Tnh chn Q5 v Q6:
Dng sng chuyn mch ca BJT c dng nh sau:


Cng sut tn hao trong BJT ch chuyn mch gm cng sut tn
hao khi dn bo ha v cng sut tn hao chuyn mch.
P = P
sw
+ P
dn

*
Ton
es.Icsat.
T
Pon Vc
T
T
I V P
on
CEs CEs dan

(1)
*Da vo th ta thy : trong qu trnh chuyn i trng thi lm vic,
dng in cc gp ic(t) v thi gian t c quan h tuyn tnh :
I
c
= Kt
Vi K=
Icsat-Icoff
Tsw

Icoff c th b qua => K=
Icsat
Tsw

=> ic=
Icsat
Tsw
t
Trong qu trnh ca mi ln chuyn i trng thi lm vic, nng lng
tiu hao ca BJT c th tnh theo cng thc :
Tsw Tsw
0 0
Icsat w.Icsat.Vcc
E= icVc tVc
Tsw 2
Ts
cdt cdt


t
sw
t
off
t
sw
t
on
I
c


V
ce

t
t
Icoff
Icsat
Vcc
Vcesat
Trang - 49 -

Trong mi chu k, BJT chuyn i trng thi lm vic 2 ln, trong 2 ln
chyn i , nng lng tiu hao l nh nhau. Nh vy nng lng tiu
hao trong qu trnh chuyn mch l :
Esw= 2E =Tsw.Icsat.Vcc
Cng sut tiu tn trong qu trnh chuyn mch :
Psw=Icsat.Vcc.
w
T
Ts
(2)
T (1) v (2) ta c :
Ptt=
Ton
es.Icsat.
T
Vc + Icsat.Vcc.
w
T
Ts

Yu cu thi gian chuyn mch Tsw ca BJT phi nh hn thi gian
chuyn mch ca kha in t.
Thi gian t
sw
ca BJT thng thng khong vi chc n vi
trm ns, y ta ly t
sw
=100ns
Vi BJT Q6, i
csat
= Vcc/R14 = 12/1k8= 6.7mA
Ton/T max =1, 1/T = f =24kHz thay vo cng thc trn ta c :
P
ttmax
= 0.2x6.7 + 6.7x12x100x10
-9
x24x10
-3
= 1.36mW
Chn BJT Q6 c Vce > 12x2 =24V, Ic>6.7x2, Ptt>1.36mW, chn
BJT Q6 l C1815
Q6 dn bo ha dng i
bQ6
> i
cQ6
/
min
= 6.7/70 ~0.1mA
Chn i
bQ6
= 0.2mA
R15 c tc dng gim thi gian tt ca BJT.
Chn dng qua R15 khong 0.7mA
R15 = Vbe/I
r15
= 0.7V/0.7mA =1k
R6 = (5V-0.7V)/(0.7mA+0.2mA) = 4k78
Chn R6 = 4k7
4.3 Tnh ton cc tham s ca b iu khin PID s:
Tng dn Kp, ti bin gii n nh ta c c th vn tc
Trang - 50 -


(Trc honh tnh theo n v l 0.05s do chu k ly mu l 50ms)
Khi vn tc ng c bin gii n nh ny, ta c c Kgh = 12.3,
Tgh = 7x0.05s = 0.35s
Vy Kp = 0.6x12.3 = 7.4
Ti = 0.5x0.35 = 0.175 =>K
I
= K/Ti = 7.4/0.175 = 42.3
Td = 0.125x0. 35 = 0.04375 => K
D
= KxTd
K
i
(ca b PID s) = K
I
xT = 42.3x0.05 = 2.1
K
d
(ca b PID s) = K
D
/T
= 7.4x0.04375/0.05= 6.475
p ng vn tc ca ng c lc ny:
Trang - 51 -


Tuy nhin, phng php Ziegler Nichols l phng php lm xp x hm
truyn, do p dng vi ng c c th p ng cha c nh mong mun,
ta c th hiu chnh cc thng s ny c p ng mong mun da theo
th.
Trang - 52 -

CHNG 5: THIT K PHN MM.

5.1 Cu hnh bn trong PSOC:
Vic cu hnh cho PSOC gm cc bc:
- Cu hnh cho cc ti nguyn ton cc: in p, tn s hot ng, cc b
chia Clock bn trong. Cc thng s ny c cu hnh nh hnh v:


y chn CPU_Clock l 24Mhz, b chia tn s VC1 v VC2 c Set
c tn s VC2 l 1M phc v cho cc khi nh thi v iu xung. B
chia VC3 c chn l 26 chn tc baud cho khi UART.
- Cu hnh cc khi s:
Khi iu xung:chn b iu xung PWM 16bit c th d dng thay
i tn s iu xung,. t ti block DB00 v DB01.
u ra ca khi PWM ni n Row_0_output_1 sau ni n chn
P2.5

Trang - 53 -



Cu hnh cc thng s khc cho khi PWM nh hnh v:


Tn s clock u vo l 48MHz, chu k l 2000 xung tng ng vi
tn s u ra l 48MHz/2000 = 24KHz.
Khi giao tip UART:
Khi UART c t ti block DCB02 v DCB03, i vi cc khi
chc nng giao tip nh UART, I2C, SPI phc v cho truyn thng
th ta phi t ti cc block s DCBxx (khc vi DBBxx).
Trang - 54 -

nh tc baud:
Tc baud = tn s xung clock/8
Ta cn tc baud l 115200, tn s clock l: 8.115200 = 921600
Clock chnh l 24MHz, ta dung b chia tn c c tn s 921600
H s chia = 24MHz/921600 = 26.04 => chn VC3 l 26.



u vo c ni n Row_0_Input_2 sau ni n chn P4.2
u ra ni n Row_0_Output_0 -> n chn P4.4
Kch thc b m nhn 16byte.
K t kt thc lnh 13 (ng vi Enter, k t CR)
K t phn cch cc tham s trong dng lnh 32 (k t Space).
Cc thng s khc nh hnh v:
Trang - 55 -





Khi nh thi: dng inh thi gian ly mu tc . Ta chn b inh
thi 16 bit d dng thay i tc ly mu, nh thi gian linh hot
hn.


Thit lp cc thng s cho khi ny nh sau:
Trang - 56 -




y chu k ly mu vn tc l 50ms, tn s clock u vo l 1MHz
nn chn chu k l 50000.
Khi counter 16 bit: dung m s xung t Encoder:
Khi ny c t block DBB20 v DBB21 nh hnh v


Thit lp cc thng s: xung clock ng vo l tn hiu t Encoder, do
ta ni ti Row_2_Input_1 -> chn P2.1.
ng thi ta phi thit lp chn P2.1 l ng vo, chn Mode l High Z.
Cc thng s khc c chn nh hnh sau:

Trang - 57 -



Gi tr Period s gim mi khi c 1 clock ng vo, do ta thit lp gi
tr ny ban u l 65535.
Khi giao tip LCD:
Khi ny thit lp bng phn mm, do khng cn block s no.
thit lp ta ch cn chn cng ni ti LCD. Giao tip LCD y hot
ng theo ch 4 bit nn ch cn 4 ng d liu. Chn Port giao tip
LCD l P3.
5.2 Gii thut phn mm:
Lu thut ton chng trnh chnh:



Trang - 58 -





Gii thch:
- Phn khi ng cc module bao gm:
o Khi ng Module LCD
o Khi ng Module UART
o Khi ng khi PWM.
o Khi ng Timer dng nh thi gian ly mu vn tc v
Counter m xung t Encoder.
o Enable ngt ton cc v ngt do timer
- Mi ln c ngt timer (kt thc chu k ly mu), VDK s c gi tr b
m (Counter), Reset b m bt u li t u. Sau VDK tnh
Khi ng
cc Modul
Begin
Ngt
timer?
D liu
t PC?
c b m,
Reset b m
Nhn d liu
t PC
Tnh gi tr
K theo PID
Hin th
Gi vn tc
ln PC
Trang - 59 -

ton cc gi tr iu khin PWM theo thut ton PID nh hm
pid_control().
- Chng trnh gi d liu ln PC gi vn tc hin thi ln PC.
- Nu c d liu t PC (cc thng s vn tc, h s Ki, Kp,).
Chng trnh con iu khin PID:
p dng thut ton PID s, thay gi tr u
k
bi gi tr iu xung (v
in p trung bnh ra t l vi chu k nhim v (Duty Cycle)), ta c chng
trnh iu khin nh sau:


Chng trnh con nhn d liu t my tnh:
D liu t PC gi xung VDK qua cng RS232 s c lu trong b
m 16 byte., khi gi hm UART_1_bCmdCheck(), nu kt thc 1 chui
lnh t my tnh (k t ASCII CR 0DH) th h tr v gi tr 1, cn khng
hm tr v gi tr 0. Ta dng hm ny kim tra d liu t my tnh
nhn xong hay cha. Nu nhn d liu, ta gi hm
UART_1_szGetParam() c gi tr trc du phn cch ly m lnh
(m lnh y l S, P, I, D, R), sau gi tip hm ny ly gi tr tip
theo:
void pid_control(){
e1=v_set-save_count;
P_Term=(kp*e1)/10; //K'p = 0.1 -> 5 khi kp = 1-50,
tranh truong hop tinhs toan vuot khoi nguong cua integer

D_Term=(kd*((e1-e0)))/10; //K'd = 0.1 -> 5 khi kd = 1-
50 (e1-2*e00 +e0))

e00=e0;
e0=e1;
I_state=(I_state+e1)/10;
I_Term=(ki*I_state)/10;//k'i = 0.01,0.02 ...1

PWM_set=PWM_set + P_Term + D_Term + I_Term;
if (PWM_set>2000) PWM_set=2000;
if (PWM_set<0) PWM_set=0;
PWM16_1_WritePeriod (2000);
PWM16_1_WritePulseWidth(PWM_set);
}
Trang - 60 -

VD: lnh t my tnh l P 10 (k t kt thc: (Enter))
(Ch du phn cch (Space) gia P v 10)
Gi ln 1: UART_1_szGetParam()-> tr v chui P
Gi ln 2: UART_1_szGetParam()-> tr v chui 10
Trang - 61 -





c gi tr
u tin str[0]
Begin
Str[0]=
S
Str[0]=
P
Vn tc = D
liu t PC
Str[0]=
I
Str[0]=
D
Str[0]=
D
Kp = D liu t
PC
Ki = D liu t
PC
Kd = D liu t
PC
ng Relaay o
chiu ng c
End
Trang - 62 -

Chng trnh con hin th:
Chng trnh hin th s chuyn i cc gi tr vn tc, cc h s Ki, Kp,
Kd ra gi tr thch hp hin th.
Chng trnh hin th dng cc hm API:
LCD_1_Position(byte i,byte j); Dch chuyn con tr ti v tr hng I ct j
LCD_1_PrHexByte(byte); Hin th 1 byte dng Hexa ln LCD
LCD_1_PrString(BYTE *s); hin th chui s.
Chng trnh gi vn tc ln my tnh

Trc khi gi d liu ln PC ta convert sang dng chui dng hm
itoa(sp,tem1,10).
void send_data_pc(){
int tem1;
tem1=save_count*3;
itoa(sp,tem1,10);
UART_1_PutString(sp);
}

Trang - 63 -

5.3 Chng trnh giao tip trn my tnh:
Giao din chng trnh:










M ngun chng trnh:
Dim mang(1 To 50000) As Double
Dim i As Double
Dim str As String
Dim even As Integer
Dim direction As Integer

Private Sub Command1_Click()
MSComm1.Output = "O"
MSComm1.Output = Chr(32)
MSComm1.Output = "1"
MSComm1.Output = Chr(13)
End Sub

Private Sub Command2_Click()
MSComm1.Output = "O"
MSComm1.Output = Chr(32)
MSComm1.Output = "0"
MSComm1.Output = Chr(13)
End Sub

Private Sub Check1_Click()
MSComm1.Output = "R"
MSComm1.Output = Chr(32)
If (direction = 1) Then 'Neu dang quay theo chieu thuan
direction = 0
MSComm1.Output = "1"
MSComm1.Output = Chr(13)
Else
direction = 1
MSComm1.Output = "0"
MSComm1.Output = Chr(13)
End If
Trang - 64 -

End Sub

Private Sub Command3_Click()
If MSComm1.PortOpen Then
MSComm1.PortOpen = False
End If
End
End Sub

Private Sub Command4_Click()
MyChart.Series(0).Clear
i = 1


End Sub

Private Sub Command5_Click()
frmsetting.Show
End Sub

Private Sub Exit_Click()
End
End Sub

Private Sub Form_Load()
MSComm1.Settings = "115200,N,8,1"
MSComm1.CommPort = 1
MSComm1.PortOpen = True
' frmsetting.Show
str = "00"
i = 1
direction = 1
End Sub

Private Sub KP_Click()

End Sub

Private Sub MSComm1_OnComm()
If (MSComm1.CommEvent = comEvReceive) Then
' Text2.Text = MSComm1.Input
str = MSComm1.Input
mang(i) = Val(str)
MyChart.Series(0).AddXY i, mang(i), "", vbRed
Label8.Caption = str
'Text1.Text = str
Trang - 65 -

'mang(i) = Asc(MSComm1.Input)
'MyChart.Series(0).AddXY i, mang(i), "", vbRed
'MyChart.Series(0).AddXY i, Val(Text6.Text), "",
vbGreen
i = i + 1
End If
End Sub


Private Sub Setting_Click()
frmsetting.Show
End Sub

Private Sub Slider1_MouseUp(Button As Integer, Shift As
Integer, X As Single, Y As Single)
Dim kp As String
kp = Slider1.Value
MSComm1.Output = "P"
MSComm1.Output = Chr(32)
MSComm1.Output = kp
MSComm1.Output = Chr(13)
End Sub

Private Sub Slider1_Scroll()
Text3.Text = Slider1.Value


End Sub

Private Sub Slider2_MouseUp(Button As Integer, Shift As
Integer, X As Single, Y As Single)
Dim ki As String
ki = Slider2.Value
MSComm1.Output = "I"
MSComm1.Output = Chr(32)
MSComm1.Output = ki
MSComm1.Output = Chr(13)
End Sub

Private Sub Slider2_Scroll()
Text4.Text = Slider2.Value
End Sub

Private Sub Slider3_MouseUp(Button As Integer, Shift As
Integer, X As Single, Y As Single)
Dim kd As String
Trang - 66 -

kd = Slider3.Value
MSComm1.Output = "D"
MSComm1.Output = Chr(32)
MSComm1.Output = kd
MSComm1.Output = Chr(13)
End Sub

Private Sub Slider3_Scroll()
Text5.Text = Slider3.Value
End Sub

Private Sub Slider4_MouseUp(Button As Integer, Shift As
Integer, X As Single, Y As Single)
Dim speed As String
speed = Slider4.Value
MSComm1.Output = "S"
MSComm1.Output = Chr(32)
MSComm1.Output = speed
MSComm1.Output = Chr(13)
'MSComm1.Output = Chr((Val(speed) \ 6) \ 256)
' MSComm1.Output = Chr((Val(speed) \ 6) Mod 256)
'