Professional Documents
Culture Documents
Compal Confidential
2
2010-06-17
LA5912P REV: 1.0
2009/10/06
Issued Date
Security Classification
2010/03/12
Deciphered Date
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
B
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date:
SCHEMATICS, MB A5912
Document Number
Rev
C
401829
Sheet
of
45
Danube
Compal Confidential
Memory BUS(DDR3)
uPGA-638 Package
Champlain page 6,7,8,9
204pin DDRIII-SO-DIMM X2
Dual Channel
BANK 0, 1, 2, 3
page 10,11
LVDS
page 16
Thermal Sensor
ADM1032
ATI RS880M
Clock Generator
ICS9LPRS488
page 8
CRT
page 15
uFCBGA-528
page 18
page 12,13,14
HDMI Conn.
page 28
USB
conn
X3
A link Express2
Gen1
page 17
page 16
CMOS
Camera
ATI SB820M
MINI Card 1
Broadcom
BCM57780
WLAN
page 36
GPP1
3.3V 48MHz
S-ATA
page 19,20,21,22,23
Bluetooth
Conn
Mini
card
(WL)X1
USB port 12
page 28
page 28
3G/GPS
WWAN
Card
Reader
<Option>
USB port 8
USB port 9
USB port 6
2
USB
3.3V 24.576MHz/48Mhz
uFCBGA-605
LAN(GbE)
page 27
<Option>
page 28
HD Audio
Gen2
page 25
HDA Codec
ALC272X
page 31
GPP0
RJ45
LPC BUS
page 26
SATA HDD
Conn. page 24
SATA ODD
Conn. page 24
port 0
port 1
Audio AMP
page 32
LED
3
ENE KB926
Fan Control
page 30
page 29
page 33
Phone Jack x2
page 32
RTC CKT.
page 19
LID SW / MEDIA/B
page 30
Int.KBD
Touch Pad
Extend Card/B
page 30
1. USB X2
2. Cardreader
RTS5160
page 30
EC I/O Buffer
PCB
BIOS
page 30
NEWX5
ZZZ
page 30
w/ 5IN1 Conn.
w/ 2IN1 Conn.
page 33
ZZZ1
PEW56
LA-5912P MB Rev1: DA60000FZ10
LA-5912P MB DAZ0GJ00100
page 34
Power Circuit
2009/10/06
Issued Date
Security Classification
page 35,36,37,38,39,40,
41,42,43
2010/03/12
Deciphered Date
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
B
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date:
SCHEMATICS, MB A5912
Document Number
Rev
C
401829
Sheet
of
45
14.31818MHz
CLK_SBLINK_BCLK
MEM_MA_CLK1_P/N
MEM_MA_CLK7_P/N
A_SODIMM
MEM_MB_CLK1_P/N
MEM_MB_CLK7_P/N
B_SODIMM
100MHz
AMD
1066MHz
S1G4
CPU SOCKET
1066MHz
AMD
CLK_NBGFX
CPU_CLKP/N
200MHz
100MHz
EXTERNAL
CLK GEN.
SLG8SP626 / ICS9LPRS488
ATI
NB
RS880M
CLK_NBHT
100MHz
CLK_NB_14.318M
CLK_PCIE_WWAN
100MHz
CLK_PCIE_MINI1
48MHz
48MHz
100MHz
CLK_48M_SD
CLK_48M_USB
CLK_SBSRC_BCLK
14.318MHZ
100MHz
CLK_PCIE_LAN
100MHz
CardReader
WWAN
Mini PCI Socket
WLAN
Mini PCI Socket
GbE LAN
BCM
57780
AMD
ATI
SB
SB820M
RTC
SATA
32.768K Hz
Security Classification
2009/10/06
Issued Date
25MHz
2010/03/12
Deciphered Date
Title
SCHEMATICS, MB A5912
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Custom 401829
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date:
Rev
C
Sheet
of
45
SIGNAL
STATE
Voltage Rails
+VALW
+V
+VS
Clock
HIGH
HIGH
HIGH
HIGH
ON
ON
ON
ON
Power Plane
Description
S1
S3
S5
S1(Power On Suspend)
LOW
HIGH
HIGH
HIGH
ON
ON
ON
LOW
VIN
N/A
N/A
N/A
S3 (Suspend to RAM)
LOW
LOW
HIGH
HIGH
ON
ON
OFF
OFF
B+
N/A
N/A
N/A
S4 (Suspend to Disk)
LOW
LOW
LOW
HIGH
ON
OFF
OFF
OFF
S5 (Soft OFF)
LOW
LOW
LOW
LOW
ON
OFF
OFF
OFF
Full ON
+CPU_CORE
ON
OFF
OFF
+CPU_CORE_NB
OFF
OFF
+CPU_VDDR
ON
OFF
OFF
+0.75V
ON
ON
OFF
+1.1VS
ON
OFF
OFF
+1.5V
ON
ON
OFF
Vcc
Ra/Rc/Re
+1.5VS
ON
OFF
OFF
Board ID
+1.8VS
ON
OFF
OFF
OFF
0
1
2
3
4
5
6
7
+2.5VS
ON
OFF
+3VALW
ON
ON
ON*
+3VS
ON
OFF
OFF
+3V_LAN
ON
ON
ON
+5VALW
ON
ON
ON*
+5VS
ON
OFF
OFF
+VSB
ON
ON
ON*
+RTCVCC
RTC power
ON
ON
ON
V AD_BID min
0 V
0.216 V
0.436 V
0.712 V
1.036 V
1.453 V
1.935 V
2.500 V
V AD_BID typ
0 V
0.250 V
0.503 V
0.819 V
1.185 V
1.650 V
2.200 V
3.300 V
V AD_BID max
0 V
0.289 V
0.538 V
0.875 V
1.264 V
1.759 V
2.341 V
3.300 V
BOARD ID Table
Note : ON* means that this power plane is ON only with AC power available, otherwise it is OFF.
Board ID
0
1
2
3
4
5
6
7
IDSEL#
REQ#/GNT#
EC SM Bus1 address
Interrupts
Address
HEX
Smart Battery
0001 011X b
16H
Device
ADI ADM1032 (CPU)
Address
HEX
1001 100X b
98H
SB-Temp Sensor
SB820
SM Bus 0 address
Address
HEX
Clock Generator
(SILEGO SLG8SP626)
1101 001Xb
D2
DDR DIMM1
1001 000Xb
90
DDR DIMM2
1001 010Xb
94
Device
Board ID
0
1
2
3
4
5
6
7
98H
SB820
SM Bus 1 address
Device
PCB Revision
Project ID Table
EC SM Bus2 address
Device
BOM Structure
INT@
EXT@
VB@
UNVB@
HDMI@
NEWX5@
PEW56@
7585@
9556@
BT@
3G@
3
PCB Revision
NEWX5
PEW56
Address
Mini card
4
2009/10/06
Issued Date
Security Classification
2010/03/12
Deciphered Date
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
B
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date:
SCHEMATICS, MB A5912
Document Number
Rev
C
401829
Sheet
of
45
BATT+
PU5
CHARGER
ISL6261AHAZ-T
PU15
ISL6265IRZ-T
PU16
APL5508-25DC
AC ADAPTOR
19V 90W
+CPU_CORE
0.7~1.3V
+CPU_CORE_NB
0.8~1.2V
VDDNB 4A
2.5V
VDDA 250mA
1.5V
VDDIO 3A
1.05V
VDDR 1.5A
1.1V
VLDT 1.5A
+CPU_CORE_NB
+2.5VS
+1.05VS
+1.05VS
PU12
APL5915
VIN
+1.1VS
PU7
RT8209BGQW
B+
+1.5V
1.5V
VDD_MEM 4A
0.75V
VTT_MEM 0.5A
+0.75VS
PU10
APL5913
PU8
RT8209BGQW
PU6
RT8209BGQW
1.0~1.1V
1.1V_S0
VDDHTRX+HT 0.68A
VDDPCIE 1.1A
VDDHTTX 0.68A
PLLs 0.23A
1.8V_S0
VDDA18 0.64A
VDDG18 0.005A
VDDLT18 0.22A
PLLs 0.1A
3.3V_S0
VDDG33 0.06A
AVDD 0.125A
VDDLT33 0A
No Use
+NB_CORE
+1.1VS
+1.1VALW
+1.1VALW
U36
SI4800BDY
+1.1VS
+1.5V
+1.5VS
PU19
TSP51117RGYR
U35
SI4800BDY
+GPU_CORE
+VDDCI
0.85~1.1V
+1VSG
PU10
APL5913
+1.8VS
PU14
APL5913
PU11
MP2121DQ
+1.8VSP2
1.0V
PCIE_VDDC 2 A
DP[F:A]_VDD10 230 mA
DPLL_VDDC 125 mA
SPV10 100 mA
1.5V
VDDR1 TBD A
1.8V
PCIE_PVDD 40 mA
PCIE_VDDR 400 mA
TSVDD 5 mA
VDDR4 TBD mA
VDD_CT 17 mA
DP[F:A]_PVDD 20 mA
DP[F:A]_VDD18 330 mA
AVDD 70 mA
VDD1DI 45 mA
A2VDDQ 1.5 mA
VDD2DI 50 mA
DPLL_PVDD 75 mA
MPV18 150 mA
SPV18 50 mA
3.3V
VDDR3 60 mA
A2VDD 130 mA
+1.8VSP1
PU4
SN0806081 RHBR
+5VALW
U37
SI1800BDY
+3VS
LCD panel
15.6"
Delay
+3VS_DELAY
U34
SI4800BDY +5VS
B+ 300mA
VRAM 1GB
64Mx16 (K4B1G1646E) * 8
+1.5VS
+3VALW
+INVPWR_B+
VDDC 29 A
VDDCI 4 A
+3.3 350mA
1.5V
2.4 A
1.1V_S0
+1.1VALW
FAN Control
APL5607
1.1V_S5
+5VS 500mA
3.3V_S0
+3VALW
U25/U40
TPS2061DRG4 +USB_VCCA
3.3V_S5
+USB_VCCB
Audio AMP
TPA6017A2
USB X3
+5V
Dual+1
2.5A
+5V 25mA
SATA
Audio Codec
ALC272
+5V 3A
+5V 45mA
+3.3V
+3.3VS 25mA
Realtek
RTS5159
EC
ENE KB926
+3.3VS 300mA
+3.3VALW 30mA
+3.3VS 3mA
LAN
BCM 57780
ICS9LPRS488B
+3.3VALW 500mA
+3.3V 400mA
Mini Card
No Use
RTC
Bettary
+1.5VS 500mA
+3.3VS 1A
+3.3VALW 330mA
+1.1V
VDDCR_11_S 113mA
VDDAN_11_USB_S 200mA
VDDCR_11_USB_S 197mA
VDDPL_11_SYS_S
VDDIO_33_PCIGP 0.020A
VDDPL_33_PCIE 0.030A
VDDPL_33_SATA 0.020A
VDDPL_33_SYS
VDDIO_33_S
VDDPL_33_USB_S
VDDAN_33_USB_S 0.2A
VDDAN_33_S
VDDXL_33_S
VDDIO_AZ_S
VDDCR_11_GBE_S
VDDRF_GBE_S
VDDIO_33_GBE_S
VDDIO_GBE_S
VDDIO_18_FC
VDDBT_RTC_G
Security Classification
Issued Date
2.5~3.6V
BAT
2009/10/06
Deciphered Date
2010/03/12
Title
SCHEMATICS, MB A5912
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Custom 401829
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date:
Rev
C
Sheet
of
45
VLDT CAP.
+1.1VS
250 mil
2
[12] H_CADIP[0..15]
[12] H_CADIN[0..15]
H_CADIP[0..15]
H_CADOP[0..15]
H_CADIN[0..15]
H_CADOP[0..15]
H_CADON[0..15]
H_CADON[0..15]
[12]
1
[12]
C1
10U_0805_10V4Z
C2
10U_0805_10V4Z
C3
0.22U_0603_16V4Z
C4
0.22U_0603_16V4Z
C5
180P_0402_50V8J
C6
180P_0402_50V8J
+1.1VS
JCPU1A
TBD
H_CADIP0
H_CADIN0
H_CADIP1
H_CADIN1
H_CADIP2
H_CADIN2
H_CADIP3
H_CADIN3
H_CADIP4
H_CADIN4
H_CADIP5
H_CADIN5
H_CADIP6
H_CADIN6
H_CADIP7
H_CADIN7
H_CADIP8
H_CADIN8
H_CADIP9
H_CADIN9
H_CADIP10
H_CADIN10
H_CADIP11
H_CADIN11
H_CADIP12
H_CADIN12
H_CADIP13
H_CADIN13
H_CADIP14
H_CADIN14
H_CADIP15
H_CADIN15
C7
HT LINK
D1
D2
D3
D4
VLDT_A0
VLDT_A1
VLDT_A2
VLDT_A3
E3
E2
E1
F1
G3
G2
G1
H1
J1
K1
L3
L2
L1
M1
N3
N2
E5
F5
F3
F4
G5
H5
H3
H4
K3
K4
L5
M5
M3
M4
N5
P5
L0_CADIN_H0
L0_CADIN_L0
L0_CADIN_H1
L0_CADIN_L1
L0_CADIN_H2
L0_CADIN_L2
L0_CADIN_H3
L0_CADIN_L3
L0_CADIN_H4
L0_CADIN_L4
L0_CADIN_H5
L0_CADIN_L5
L0_CADIN_H6
L0_CADIN_L6
L0_CADIN_H7
L0_CADIN_L7
L0_CADIN_H8
L0_CADIN_L8
L0_CADIN_H9
L0_CADIN_L9
L0_CADIN_H10
L0_CADIN_L10
L0_CADIN_H11
L0_CADIN_L11
L0_CADIN_H12
L0_CADIN_L12
L0_CADIN_H13
L0_CADIN_L13
L0_CADIN_H14
L0_CADIN_L14
L0_CADIN_H15
L0_CADIN_L15
VLDT_B0
VLDT_B1
VLDT_B2
VLDT_B3
AE2
AE3
AE4
AE5
L0_CADOUT_H0
L0_CADOUT_L0
L0_CADOUT_H1
L0_CADOUT_L1
L0_CADOUT_H2
L0_CADOUT_L2
L0_CADOUT_H3
L0_CADOUT_L3
L0_CADOUT_H4
L0_CADOUT_L4
L0_CADOUT_H5
L0_CADOUT_L5
L0_CADOUT_H6
L0_CADOUT_L6
L0_CADOUT_H7
L0_CADOUT_L7
L0_CADOUT_H8
L0_CADOUT_L8
L0_CADOUT_H9
L0_CADOUT_L9
L0_CADOUT_H10
L0_CADOUT_L10
L0_CADOUT_H11
L0_CADOUT_L11
L0_CADOUT_H12
L0_CADOUT_L12
L0_CADOUT_H13
L0_CADOUT_L13
L0_CADOUT_H14
L0_CADOUT_L14
L0_CADOUT_H15
L0_CADOUT_L15
AD1
AC1
AC2
AC3
AB1
AA1
AA2
AA3
W2
W3
V1
U1
U2
U3
T1
R1
AD4
AD3
AD5
AC5
AB4
AB3
AB5
AA5
Y5
W5
V4
V3
V5
U5
T4
T3
10U_0805_10V4Z
H_CADOP0
H_CADON0
H_CADOP1
H_CADON1
H_CADOP2
H_CADON2
H_CADOP3
H_CADON3
H_CADOP4
H_CADON4
H_CADOP5
H_CADON5
H_CADOP6
H_CADON6
H_CADOP7
H_CADON7
H_CADOP8
H_CADON8
H_CADOP9
H_CADON9
H_CADOP10
H_CADON10
H_CADOP11
H_CADON11
H_CADOP12
H_CADON12
H_CADOP13
H_CADON13
H_CADOP14
H_CADON14
H_CADOP15
H_CADON15
[12]
[12]
[12]
[12]
H_CLKIP0
H_CLKIN0
H_CLKIP1
H_CLKIN1
J3
J2
J5
K5
L0_CLKIN_H0
L0_CLKIN_L0
L0_CLKIN_H1
L0_CLKIN_L1
L0_CLKOUT_H0
L0_CLKOUT_L0
L0_CLKOUT_H1
L0_CLKOUT_L1
Y1
W1
Y4
Y3
H_CLKOP0
H_CLKON0
H_CLKOP1
H_CLKON1
[12]
[12]
[12]
[12]
[12]
[12]
[12]
[12]
H_CTLIP0
H_CTLIN0
H_CTLIP1
H_CTLIN1
N1
P1
P3
P4
L0_CTLIN_H0
L0_CTLIN_L0
L0_CTLIN_H1
L0_CTLIN_L1
L0_CTLOUT_H0
L0_CTLOUT_L0
L0_CTLOUT_H1
L0_CTLOUT_L1
R2
R3
T5
R5
H_CTLOP0
H_CTLON0
H_CTLOP1
H_CTLON1
[12]
[12]
[12]
[12]
FOX_PZ63823-284S-41F_Champlian
2009/10/06
Issued Date
Security Classification
2010/03/12
Deciphered Date
Title
SCHEMATICS, MB A5912
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Custom
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date:
Rev
C
401829
Sheet
of
45
MEM:DATA
+1.5V
R1
1K_0402_1%
C8
1000P_0402_50V7K
C9
0.01U_0402_25V7K
MEM_VREF
1
R2
1K_0402_1%
+CPU_VDDR
+CPU_VDDR
JCPU1B
AMD suggest
2
Place them
close to CPU
within 1"
+1.5V
R4
1
1
R5
R410 0_0603_5%
2
1
1
C95
@
10U_0805_10V4Z
[10] MEM_MA_RST#
[10] DDRA_ODT0
[10] DDRA_ODT1
[10] DDRA_SCS0#
[10] DDRA_SCS1#
[10] DDRA_CKE0
[10] DDRA_CKE1
[10] DDRA_CLK0
[10] DDRA_CLK0#
[10] DDRA_CLK1
[10] DDRA_CLK1#
[10] DDRA_SMA[15..0]
[10] DDRA_SBS0#
[10] DDRA_SBS1#
[10] DDRA_SBS2#
[10] DDRA_SRAS#
[10] DDRA_SCAS#
[10] DDRA_SWE#
1.5A
D10
C10
B10
AD10
39.2_0402_1%
MEMZP AF10
2
MEMZN AE10
2
39.2_0402_1%
MEM_MA_RST#
H16
DDRA_ODT0
DDRA_ODT1
DDRA_SCS0#
DDRA_SCS1#
DDRA_CKE0
DDRA_CKE1
DDRA_CLK0
DDRA_CLK0#
VDDR1 MEM:CMD/CTRL/CLK
VDDR5
VDDR2
VDDR6
VDDR3
VDDR7
VDDR4
VDDR8
VDDR9
MEMZP
MEMZN
VDDR_SENSE
W10
AC10
AB10
AA10
A10
MA_RESET_L
MEMVREF
W17
MEM_VREF
MB_RESET_L
B18
MEM_MB_RST#
MB0_ODT0
MB0_ODT1
MB1_ODT0
W26
W23
Y26
DDRB_ODT0
DDRB_ODT1
MB0_CS_L0
MB0_CS_L1
MB1_CS_L0
V26
W25
U22
DDRB_SCS0#
DDRB_SCS1#
MB_CKE0
MB_CKE1
J25
H26
DDRB_CKE0
DDRB_CKE1
DDRB_CLK0
DDRB_CLK0#
T19
V22
U21
V19
MA0_ODT0
MA0_ODT1
MA1_ODT0
MA1_ODT1
T20
U19
U20
V20
MA0_CS_L0
MA0_CS_L1
MA1_CS_L0
MA1_CS_L1
J22
J20
MA_CKE0
MA_CKE1
Y10
VTT_SENSE
N19
N20
E16
F16
Y16
AA16
P19
P20
MA_CLK_H5
MA_CLK_L5
MA_CLK_H1
MA_CLK_L1
MA_CLK_H7
MA_CLK_L7
MA_CLK_H4
MA_CLK_L4
MB_CLK_H5
MB_CLK_L5
MB_CLK_H1
MB_CLK_L1
MB_CLK_H7
MB_CLK_L7
MB_CLK_H4
MB_CLK_L4
P22
R22
A17
A18
AF18
AF17
R26
R25
DDRA_SMA0
DDRA_SMA1
DDRA_SMA2
DDRA_SMA3
DDRA_SMA4
DDRA_SMA5
DDRA_SMA6
DDRA_SMA7
DDRA_SMA8
DDRA_SMA9
DDRA_SMA10
DDRA_SMA11
DDRA_SMA12
DDRA_SMA13
DDRA_SMA14
DDRA_SMA15
N21
M20
N22
M19
M22
L20
M24
L21
L19
K22
R21
L22
K20
V24
K24
K19
MA_ADD0
MA_ADD1
MA_ADD2
MA_ADD3
MA_ADD4
MA_ADD5
MA_ADD6
MA_ADD7
MA_ADD8
MA_ADD9
MA_ADD10
MA_ADD11
MA_ADD12
MA_ADD13
MA_ADD14
MA_ADD15
MB_ADD0
MB_ADD1
MB_ADD2
MB_ADD3
MB_ADD4
MB_ADD5
MB_ADD6
MB_ADD7
MB_ADD8
MB_ADD9
MB_ADD10
MB_ADD11
MB_ADD12
MB_ADD13
MB_ADD14
MB_ADD15
P24
N24
P26
N23
N26
L23
N25
L24
M26
K26
T26
L26
L25
W24
J23
J24
DDRB_SMA0
DDRB_SMA1
DDRB_SMA2
DDRB_SMA3
DDRB_SMA4
DDRB_SMA5
DDRB_SMA6
DDRB_SMA7
DDRB_SMA8
DDRB_SMA9
DDRB_SMA10
DDRB_SMA11
DDRB_SMA12
DDRB_SMA13
DDRB_SMA14
DDRB_SMA15
DDRA_SBS0#
DDRA_SBS1#
DDRA_SBS2#
R20
R23
J21
MA_BANK0
MA_BANK1
MA_BANK2
MB_BANK0
MB_BANK1
MB_BANK2
R24
U26
J26
DDRB_SBS0#
DDRB_SBS1#
DDRB_SBS2#
DDRA_SRAS#
DDRA_SCAS#
DDRA_SWE#
R19
T22
T24
MA_RAS_L
MA_CAS_L
MA_WE_L
MB_RAS_L
MB_CAS_L
MB_WE_L
U25
U24
U23
DDRB_SRAS#
DDRB_SCAS#
DDRB_SWE#
DDRA_CLK1
DDRA_CLK1#
DDRB_CLK1
DDRB_CLK1#
PAD
T1
MEM_MB_RST# [11]
DDRB_ODT0 [11]
DDRB_ODT1 [11]
DDRB_SCS0# [11]
DDRB_SCS1# [11]
DDRB_CKE0 [11]
DDRB_CKE1 [11]
DDRB_CLK0 [11]
DDRB_CLK0# [11]
DDRB_CLK1 [11]
DDRB_CLK1# [11]
[11] DDRB_SDM[7..0]
DDRB_SMA[15..0] [11]
DDRB_SBS0# [11]
DDRB_SBS1# [11]
DDRB_SBS2# [11]
DDRB_SRAS# [11]
DDRB_SCAS# [11]
DDRB_SWE# [11]
[11]
[11]
[11]
[11]
[11]
[11]
[11]
[11]
[11]
[11]
[11]
[11]
[11]
[11]
[11]
[11]
DDRB_SDQS0
DDRB_SDQS0#
DDRB_SDQS1
DDRB_SDQS1#
DDRB_SDQS2
DDRB_SDQS2#
DDRB_SDQS3
DDRB_SDQS3#
DDRB_SDQS4
DDRB_SDQS4#
DDRB_SDQS5
DDRB_SDQS5#
DDRB_SDQS6
DDRB_SDQS6#
DDRB_SDQS7
DDRB_SDQS7#
DDRB_SDQ0
DDRB_SDQ1
DDRB_SDQ2
DDRB_SDQ3
DDRB_SDQ4
DDRB_SDQ5
DDRB_SDQ6
DDRB_SDQ7
DDRB_SDQ8
DDRB_SDQ9
DDRB_SDQ10
DDRB_SDQ11
DDRB_SDQ12
DDRB_SDQ13
DDRB_SDQ14
DDRB_SDQ15
DDRB_SDQ16
DDRB_SDQ17
DDRB_SDQ18
DDRB_SDQ19
DDRB_SDQ20
DDRB_SDQ21
DDRB_SDQ22
DDRB_SDQ23
DDRB_SDQ24
DDRB_SDQ25
DDRB_SDQ26
DDRB_SDQ27
DDRB_SDQ28
DDRB_SDQ29
DDRB_SDQ30
DDRB_SDQ31
DDRB_SDQ32
DDRB_SDQ33
DDRB_SDQ34
DDRB_SDQ35
DDRB_SDQ36
DDRB_SDQ37
DDRB_SDQ38
DDRB_SDQ39
DDRB_SDQ40
DDRB_SDQ41
DDRB_SDQ42
DDRB_SDQ43
DDRB_SDQ44
DDRB_SDQ45
DDRB_SDQ46
DDRB_SDQ47
DDRB_SDQ48
DDRB_SDQ49
DDRB_SDQ50
DDRB_SDQ51
DDRB_SDQ52
DDRB_SDQ53
DDRB_SDQ54
DDRB_SDQ55
DDRB_SDQ56
DDRB_SDQ57
DDRB_SDQ58
DDRB_SDQ59
DDRB_SDQ60
DDRB_SDQ61
DDRB_SDQ62
DDRB_SDQ63
C11
A11
A14
B14
G11
E11
D12
A13
A15
A16
A19
A20
C14
D14
C18
D18
D20
A21
D24
C25
B20
C20
B24
C24
E23
E24
G25
G26
C26
D26
G23
G24
AA24
AA23
AD24
AE24
AA26
AA25
AD26
AE25
AC22
AD22
AE20
AF20
AF24
AF23
AC20
AD20
AD18
AE18
AC14
AD14
AF19
AC18
AF16
AF15
AF13
AC12
AB11
Y11
AE14
AF14
AF11
AD11
MB_DATA0
MB_DATA1
MB_DATA2
MB_DATA3
MB_DATA4
MB_DATA5
MB_DATA6
MB_DATA7
MB_DATA8
MB_DATA9
MB_DATA10
MB_DATA11
MB_DATA12
MB_DATA13
MB_DATA14
MB_DATA15
MB_DATA16
MB_DATA17
MB_DATA18
MB_DATA19
MB_DATA20
MB_DATA21
MB_DATA22
MB_DATA23
MB_DATA24
MB_DATA25
MB_DATA26
MB_DATA27
MB_DATA28
MB_DATA29
MB_DATA30
MB_DATA31
MB_DATA32
MB_DATA33
MB_DATA34
MB_DATA35
MB_DATA36
MB_DATA37
MB_DATA38
MB_DATA39
MB_DATA40
MB_DATA41
MB_DATA42
MB_DATA43
MB_DATA44
MB_DATA45
MB_DATA46
MB_DATA47
MB_DATA48
MB_DATA49
MB_DATA50
MB_DATA51
MB_DATA52
MB_DATA53
MB_DATA54
MB_DATA55
MB_DATA56
MB_DATA57
MB_DATA58
MB_DATA59
MB_DATA60
MB_DATA61
MB_DATA62
MB_DATA63
DDRB_SDM0
DDRB_SDM1
DDRB_SDM2
DDRB_SDM3
DDRB_SDM4
DDRB_SDM5
DDRB_SDM6
DDRB_SDM7
A12
B16
A22
E25
AB26
AE22
AC16
AD12
MB_DM0
MB_DM1
MB_DM2
MB_DM3
MB_DM4
MB_DM5
MB_DM6
MB_DM7
DDRB_SDQS0
DDRB_SDQS0#
DDRB_SDQS1
DDRB_SDQS1#
DDRB_SDQS2
DDRB_SDQS2#
DDRB_SDQS3
DDRB_SDQS3#
DDRB_SDQS4
DDRB_SDQS4#
DDRB_SDQS5
DDRB_SDQS5#
DDRB_SDQS6
DDRB_SDQS6#
DDRB_SDQS7
DDRB_SDQS7#
C12
B12
D16
C16
A24
A23
F26
E26
AC25
AC26
AF21
AF22
AE16
AD16
AF12
AE12
MB_DQS_H0
MB_DQS_L0
MB_DQS_H1
MB_DQS_L1
MB_DQS_H2
MB_DQS_L2
MB_DQS_H3
MB_DQS_L3
MB_DQS_H4
MB_DQS_L4
MB_DQS_H5
MB_DQS_L5
MB_DQS_H6
MB_DQS_L6
MB_DQS_H7
MB_DQS_L7
MA_DATA0
MA_DATA1
MA_DATA2
MA_DATA3
MA_DATA4
MA_DATA5
MA_DATA6
MA_DATA7
MA_DATA8
MA_DATA9
MA_DATA10
MA_DATA11
MA_DATA12
MA_DATA13
MA_DATA14
MA_DATA15
MA_DATA16
MA_DATA17
MA_DATA18
MA_DATA19
MA_DATA20
MA_DATA21
MA_DATA22
MA_DATA23
MA_DATA24
MA_DATA25
MA_DATA26
MA_DATA27
MA_DATA28
MA_DATA29
MA_DATA30
MA_DATA31
MA_DATA32
MA_DATA33
MA_DATA34
MA_DATA35
MA_DATA36
MA_DATA37
MA_DATA38
MA_DATA39
MA_DATA40
MA_DATA41
MA_DATA42
MA_DATA43
MA_DATA44
MA_DATA45
MA_DATA46
MA_DATA47
MA_DATA48
MA_DATA49
MA_DATA50
MA_DATA51
MA_DATA52
MA_DATA53
MA_DATA54
MA_DATA55
MA_DATA56
MA_DATA57
MA_DATA58
MA_DATA59
MA_DATA60
MA_DATA61
MA_DATA62
MA_DATA63
G12
F12
H14
G14
H11
H12
C13
E13
H15
E15
E17
H17
E14
F14
C17
G17
G18
C19
D22
E20
E18
F18
B22
C23
F20
F22
H24
J19
E21
E22
H20
H22
Y24
AB24
AB22
AA21
W22
W21
Y22
AA22
Y20
AA20
AA18
AB18
AB21
AD21
AD19
Y18
AD17
W16
W14
Y14
Y17
AB17
AB15
AD15
AB13
AD13
Y12
W11
AB14
AA14
AB12
AA12
DDRA_SDQ0
DDRA_SDQ1
DDRA_SDQ2
DDRA_SDQ3
DDRA_SDQ4
DDRA_SDQ5
DDRA_SDQ6
DDRA_SDQ7
DDRA_SDQ8
DDRA_SDQ9
DDRA_SDQ10
DDRA_SDQ11
DDRA_SDQ12
DDRA_SDQ13
DDRA_SDQ14
DDRA_SDQ15
DDRA_SDQ16
DDRA_SDQ17
DDRA_SDQ18
DDRA_SDQ19
DDRA_SDQ20
DDRA_SDQ21
DDRA_SDQ22
DDRA_SDQ23
DDRA_SDQ24
DDRA_SDQ25
DDRA_SDQ26
DDRA_SDQ27
DDRA_SDQ28
DDRA_SDQ29
DDRA_SDQ30
DDRA_SDQ31
DDRA_SDQ32
DDRA_SDQ33
DDRA_SDQ34
DDRA_SDQ35
DDRA_SDQ36
DDRA_SDQ37
DDRA_SDQ38
DDRA_SDQ39
DDRA_SDQ40
DDRA_SDQ41
DDRA_SDQ42
DDRA_SDQ43
DDRA_SDQ44
DDRA_SDQ45
DDRA_SDQ46
DDRA_SDQ47
DDRA_SDQ48
DDRA_SDQ49
DDRA_SDQ50
DDRA_SDQ51
DDRA_SDQ52
DDRA_SDQ53
DDRA_SDQ54
DDRA_SDQ55
DDRA_SDQ56
DDRA_SDQ57
DDRA_SDQ58
DDRA_SDQ59
DDRA_SDQ60
DDRA_SDQ61
DDRA_SDQ62
DDRA_SDQ63
MA_DM0
MA_DM1
MA_DM2
MA_DM3
MA_DM4
MA_DM5
MA_DM6
MA_DM7
E12
C15
E19
F24
AC24
Y19
AB16
Y13
DDRA_SDM0
DDRA_SDM1
DDRA_SDM2
DDRA_SDM3
DDRA_SDM4
DDRA_SDM5
DDRA_SDM6
DDRA_SDM7
MA_DQS_H0
MA_DQS_L0
MA_DQS_H1
MA_DQS_L1
MA_DQS_H2
MA_DQS_L2
MA_DQS_H3
MA_DQS_L3
MA_DQS_H4
MA_DQS_L4
MA_DQS_H5
MA_DQS_L5
MA_DQS_H6
MA_DQS_L6
MA_DQS_H7
MA_DQS_L7
G13
H13
G16
G15
C22
C21
G22
G21
AD23
AC23
AB19
AB20
Y15
W15
W12
W13
DDRA_SDQS0
DDRA_SDQS0#
DDRA_SDQS1
DDRA_SDQS1#
DDRA_SDQS2
DDRA_SDQS2#
DDRA_SDQS3
DDRA_SDQS3#
DDRA_SDQS4
DDRA_SDQS4#
DDRA_SDQS5
DDRA_SDQS5#
DDRA_SDQS6
DDRA_SDQS6#
DDRA_SDQS7
DDRA_SDQS7#
DDRA_SDQ[63..0]
[10]
1
DDRA_SDM[7..0]
DDRA_SDQS0
DDRA_SDQS0#
DDRA_SDQS1
DDRA_SDQS1#
DDRA_SDQS2
DDRA_SDQS2#
DDRA_SDQS3
DDRA_SDQS3#
DDRA_SDQS4
DDRA_SDQS4#
DDRA_SDQS5
DDRA_SDQS5#
DDRA_SDQS6
DDRA_SDQS6#
DDRA_SDQS7
DDRA_SDQS7#
[10]
[10]
[10]
[10]
[10]
[10]
[10]
[10]
[10]
[10]
[10]
[10]
[10]
[10]
[10]
[10]
[10]
FOX_PZ63823-284S-41F_Champlian
FOX_PZ63823-284S-41F_Champlian
2009/10/06
Issued Date
Security Classification
2010/03/12
Deciphered Date
Title
SCHEMATICS, MB A5912
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Custom
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date:
Rev
C
401829
Sheet
of
45
FBMA-L11-201209-221LMA30T_0805 1
C11
VDDA=0.25A
3300P_0402_50V7K
4.7U_0805_10V4Z
1
C12
220U_6.3V_M
LDT_RES# / MEMHOT#
no support in S1g4
1
C13
+1.5V
C14
0.22U_0603_16V4Z
R6
10K_0402_5%
<BOM Structure>
+2.5VS
Champlain: C1E
C1E: LDT_REQ# no connect
CLMC: LDT_REQ# connect to NB
+2.5VDDA
L1
R7
1K_0402_5%
1
JCPU1D
2 2
LDT_RST#
H_PWRGD
LDT_STOP#
R10
169_0402_1%
[15] CLK_CPU_BCLK#
C15
T2
2
3900P_0402_50V7K
+1.5V
+1.5V
+1.5VS
R12
R14
2
1
2
2 1K_0402_5%
1K_0402_5%
R15
R16
+1.1VS
R17
300_0402_5%
LDT_RST#
[19] LDT_RST#
1
1
1
+1.5VS [13,19] LDT_STOP#
2
R21
300_0402_5%
HT_REF0
HT_REF1
PAD
THERMDC
THERMDA
W7
W8
THERMDC_CPU
THERMDA_CPU
T3
VDD0_FB_H
VDD0_FB_L
VDDIO_FB_H
VDDIO_FB_L
W9
Y9
VDD1_FB_H
VDD1_FB_L
VDDNB_FB_H
VDDNB_FB_L
H6
G6
CPU_VDDNB_FB_H
CPU_VDDNB_FB_L
DBREQ_L
E10
CPU_DBREQ#
TDO
AE9
CPU_TDO
CPU_DBRDY
CPU_TMS
CPU_TCK
CPU_TRST#
CPU_TDI
LDT_STOP#
G10
AA9
AC9
AD9
AF9
CPU_TEST23
AD7
CPU_TEST18
CPU_TEST19
H10
G9
CPU_TEST25H
CPU_TEST25L
C18
0.01U_0402_25V4Z
@
CPU_TEST21
CPU_TEST20
CPU_TEST24
CPU_TEST22
CPU_TEST12
CPU_TEST27
1
R24
+3VS
2
0_0402_5%
E9
E8
AB8
AF7
AE7
AE8
AC8
AF8
DBRDY
TMS
TCK
TRST_L
TDI
TEST28_H
TEST28_L
TEST18
TEST19
TEST25_H
TEST25_L
TEST21
TEST20
TEST24
TEST22
TEST12
TEST27
TEST9
TEST6
A3
A5
B3
B5
C1
RSVD1
RSVD2
RSVD3
RSVD4
RSVD5
H_THERMTRIP# [20]
1
R9
2
0_0402_5%
1
R11
MAINPWON [36,37,41]
2
300_0402_5%
PAD
PAD
H_PROCHOT#
1
R13
2
0_0402_5%
H_PROCHOT_R# [19]
PROCHOT:
Input: For HTC Function
Output: Over Temperature Condition
T4
T11
CPU_VDDNB_FB_H [43]
CPU_VDDNB_FB_L [43]
+1.5V
TEST23
C2
AA6
2
0_0402_5%
CPU_THERMTRIP#_R
H_PROCHOT#
AF6
AC7
AA8
CPU_VDD1_FB_H
Y6
CPU_VDD1_FB_L AB6
C19
0.01U_0402_25V4Z
@
SIC
SID
ALERT_L
R6
P6
CPU_SVC [43]
CPU_SVD [43]
+1.5V
THERMTRIP_L
PROCHOT_L
MEMHOT_L
1
R8
MMBT3904_NL_SOT23-3
CPU_SVC
CPU_SVD
[43] CPU_VDD1_FB_H
[43] CPU_VDD1_FB_L
H_PWRGD
[19] H_PWRGD
RESET_L
PWROK
LDTSTOP_L
LDTREQ_L
A6
A4
F6
E6
R18
300_0402_5%
AF4
AF5
AE6
SVC
SVD
[43] CPU_VDD0_FB_H
[43] CPU_VDD0_FB_L
C17
0.01U_0402_25V4Z
@
PAD
CPU_SIC
CPU_SID
VSS
RSVD11
CPU_VDD0_FB_H
CPU_VDD0_FB_L
+1.5VS
CLKIN_H
CLKIN_L
B7
A7
F10
C6
2 44.2_0402_1% CPU_HTREF0
2 44.2_0402_1% CPU_HTREF1
1
1
VDDA1
VDDA2
A9
A8
C16
CPU_CLKIN_SC_P
CPU_CLKIN_SC_N
2 3900P_0402_50V7K
CPU_THERMTRIP#_R
M11
W18
Q1
1
[15] CLK_CPU_BCLK
F8
F9
TEST17
TEST16
TEST15
TEST14
D7
E7
F7
C7
TEST7
TEST10
C3
K8
TEST8
C4
TEST29_H
TEST29_L
C9
C8
RSVD10
RSVD9
RSVD8
RSVD7
RSVD6
J7
H8
CPU_SVC
CPU_TEST17
CPU_TEST16
CPU_TEST15
CPU_TEST14
PAD
PAD
PAD
PAD
T5
T6
T7
T8
1
R19
1
R20
CPU_SVD
2
1K_0402_5%
2
1K_0402_5%
+1.5V
CPU_TEST29_H_FBCLKOUT_P
CPU_TEST29_L_FBCLKOUT_N
2
R25
CPU_TEST25H
1
R22
1
R23
CPU_TEST25L
1
R26
1
R27
1
80.6_0402_1%
H18
H19
AA7
D5
C5
2
510_0402_5%
2
510_0402_5%
+1.5V
2
510_0402_5%
2
510_0402_5%
NEWX5@
0.1U_0402_16V4Z
+1.5V
FOX_PZ63823-284S-41F_Champlian
1
C20
CPU_TEST27
NEWX5@
U1
C21
VDD
THERMDA_CPU
D+
THERMDC_CPU
D-
2
100P_0402_50V8J
@
THERM#
EC_SMB_CK2
SDATA
EC_SMB_DA2
ALERT#
CPU_TEST12
GND
CPU_TEST18
SCLK
CPU_TEST19
+1.5V
CPU_TEST20
@
CPU_SID 3
1
D
S
PEW56@
Q2
FDV301N_NL_SOT23-3
1
2
R44
0_0402_5%
1
2
R45
0_0402_5%
PEW56@
SB_SID
SB_SID [20]
EC_SMB_DA2
T0 SB
1
3
5
7
9
11
13
15
17
19
21
23
TO EC
2
4
6
8
10
12
14
16
18
20
22
24
26
R43
@
2
0_0402_5%
+3VS
@
U2
HDT_RST#
CONN@ SAMTEC_ASP-68200-07
LDT_RST#
SB_PWRGD [13,20,29]
NC7SZ08P5X_NL_SC70-5
EC_SMB_DA
2
1K_0402_5%
2
1K_0402_5%
2
1K_0402_5%
2
1K_0402_5%
2
1K_0402_5%
2
1K_0402_5%
2
1K_0402_5%
2
1K_0402_5%
@
CPU_DBREQ#
CPU_DBRDY
CPU_TCK
CPU_TMS
CPU_TDI
CPU_TRST#
CPU_TDO
1
PEW56@
30K_0402_5%
CPU_TEST23
1
R29
1
R30
1
R31
1
R32
1
R33
1
R34
1
R35
1
R265
JP2
R42
2
+3VS
2
1
PEW56@
31.6K_0402_1%
CPU_TEST24
C22
R41
2
PEW56@
0.1U_0402_16V4Z
CPU_TEST22
2
1
220_0402_5% R36
2
1
220_0402_5% R37
2
1
220_0402_5% R38
2
1
300_0402_5% R39
1
2
300_0402_5% R40
CPU_TEST21
2
1K_0402_5%
EC_SMB_DA2 [29]
ADM1032ARMZ_MSOP8
For MP
1
R28
EC_SMB_CK2 [29]
CPU_SIC 3
EC_SMB_CK
S
PEW56@
Q3
FDV301N_NL_SOT23-3
@
SB_SIC
1
2
R46
0_0402_5%
EC_SMB_CK2
1
2
R47
0_0402_5%
PEW56@
SB_SIC [20]
T0 SB
TO EC
2009/10/06
Issued Date
Security Classification
2010/03/12
Deciphered Date
Title
SCHEMATICS, MB A5912
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Custom
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date:
Rev
C
401829
Sheet
of
45
JCPU1F
VDD(+CPU_CORE) decoupling.
JCPU1E
+CPU_CORE
+CPU_CORE
C23
C24
C25
+ C27
@
330U_D2_2V_Y
2
C26
330U_D2_2V_Y
2
330U_D2_2V_Y
2
330U_D2_2V_Y
2
330U_D2_2V_Y
2
+CPU_CORE
+CPU_CORE
+CPU_CORE_NB
C28
22U_0805_6.3V6M
C29
22U_0805_6.3V6M
C30
22U_0805_6.3V6M
C35
22U_0805_6.3V6M
C31
22U_0805_6.3V6M
+CPU_CORE
C32
22U_0805_6.3V6M
C33
22U_0805_6.3V6M
4A
C34
22U_0805_6.3V6M
+1.5V
+CPU_CORE
C36
0.22U_0603_16V4Z
C37
0.01U_0402_25V4Z
C38
180P_0402_50V8J
C39
0.22U_0603_16V4Z
C40
0.01U_0402_25V4Z
C41
180P_0402_50V8J
G4
H2
J9
J11
J13
J15
K6
K10
K12
K14
L4
L7
L9
L11
L13
L15
M2
M6
M8
M10
N7
N9
N11
VDD0_1
VDD0_2
VDD0_3
VDD0_4
VDD0_5
VDD0_6
VDD0_7
VDD0_8
VDD0_9
VDD0_10
VDD0_11
VDD0_12
VDD0_13
VDD0_14
VDD0_15
VDD0_16
VDD0_17
VDD0_18
VDD0_19
VDD0_20
VDD0_21
VDD0_22
VDD0_23
K16
M16
P16
T16
V16
VDDNB_1
VDDNB_2
VDDNB_3
VDDNB_4
VDDNB_5
H25
J17
K18
K21
K23
K25
L17
M18
M21
M23
M25
N17
VDDIO1
VDDIO2
VDDIO3
VDDIO4
VDDIO5
VDDIO6
VDDIO7
VDDIO8
VDDIO9
VDDIO10
VDDIO11
VDDIO12
AA4
AA11
AA13
AA15
AA17
AA19
AB2
AB7
AB9
AB23
AB25
AC11
AC13
AC15
AC17
AC19
AC21
AD6
AD8
AD25
AE11
AE13
AE15
AE17
AE19
AE21
AE23
B4
B6
B8
B9
B11
B13
B15
B17
B19
B21
B23
B25
D6
D8
D9
D11
D13
D15
D17
D19
D21
D23
D25
E4
F2
F11
F13
F15
F17
F19
F21
F23
F25
H7
H9
H21
H23
J4
+CPU_CORE
VDD1_1
VDD1_2
VDD1_3
VDD1_4
VDD1_5
VDD1_6
VDD1_7
VDD1_8
VDD1_9
VDD1_10
VDD1_11
VDD1_12
VDD1_13
VDD1_14
VDD1_15
VDD1_16
VDD1_17
VDD1_18
VDD1_19
VDD1_20
VDD1_21
VDD1_22
VDD1_23
VDD1_24
VDD1_25
VDD1_26
P8
P10
R4
R7
R9
R11
T2
T6
T8
T10
T12
T14
U7
U9
U11
U13
U15
V6
V8
V10
V12
V14
W4
Y2
AC4
AD2
VDDIO27
VDDIO26
VDDIO25
VDDIO24
VDDIO23
VDDIO22
VDDIO21
VDDIO20
VDDIO19
VDDIO18
VDDIO17
VDDIO16
VDDIO15
VDDIO14
VDDIO13
Y25
V25
V23
V21
V18
U17
T25
T23
T21
T18
R17
P25
P23
P21
P18
36A
+1.5V
TBD
FOX_PZ63823-284S-41F_Champlian
Athlon 64 S1
Processor Socket
VDDIO decoupling.
+CPU_CORE_NB
decoupling.
+1.5V
+CPU_CORE_NB
1
C44
22U_0805_6.3V6M
C45
22U_0805_6.3V6M
C46
0.22U_0603_16V4Z
2
C47
0.22U_0603_16V4Z
2
C48
C50
180P_0402_50V8J 180P_0402_50V8J
2
2
C42
22U_0805_6.3V6M
C43
22U_0805_6.3V6M
C49
22U_0805_6.3V6M
VSS1
VSS2
VSS3
VSS4
VSS5
VSS6
VSS7
VSS8
VSS9
VSS10
VSS11
VSS12
VSS13
VSS14
VSS15
VSS16
VSS17
VSS18
VSS19
VSS20
VSS21
VSS22
VSS23
VSS24
VSS25
VSS26
VSS27
VSS28
VSS29
VSS30
VSS31
VSS32
VSS33
VSS34
VSS35
VSS36
VSS37
VSS38
VSS39
VSS40
VSS41
VSS42
VSS43
VSS44
VSS45
VSS46
VSS47
VSS48
VSS49
VSS50
VSS51
VSS52
VSS53
VSS54
VSS55
VSS56
VSS57
VSS58
VSS59
VSS60
VSS61
VSS62
VSS63
VSS64
VSS65
J6
J8
J10
J12
J14
J16
J18
K2
K7
K9
K11
K13
K15
K17
L6
L8
L10
L12
L14
L16
L18
M7
M9
AC6
M17
N4
N8
N10
N16
N18
P2
P7
P9
P11
P17
R8
R10
R16
R18
T7
T9
T11
T13
T15
T17
U4
U6
U8
U10
U12
U14
U16
U18
V2
V7
V9
V11
V13
V15
V17
W6
Y21
Y23
N6
VSS66
VSS67
VSS68
VSS69
VSS70
VSS71
VSS72
VSS73
VSS74
VSS75
VSS76
VSS77
VSS78
VSS79
VSS80
VSS81
VSS82
VSS83
VSS84
VSS85
VSS86
VSS87
VSS88
VSS89
VSS90
VSS91
VSS92
VSS93
VSS94
VSS95
VSS96
VSS97
VSS98
VSS99
VSS100
VSS101
VSS102
VSS103
VSS104
VSS105
VSS106
VSS107
VSS108
VSS109
VSS110
VSS111
VSS112
VSS113
VSS114
VSS115
VSS116
VSS117
VSS118
VSS119
VSS120
VSS121
VSS122
VSS123
VSS124
VSS125
VSS126
VSS127
VSS128
VSS129
FOX_PZ63823-284S-41F_Champlian
Athlon 64 S1
Processor Socket
+1.5V
C355
0.22U_0603_16V4Z
C354
0.22U_0603_16V4Z
C56 +
220U_6.3V_M
C55
22U_0805_6.3V6M
2
2
+1.5V
+1.5V
C64
0.01U_0402_25V4Z
C65
0.01U_0402_25V4Z
For PVT
C66
0.1U_0402_16V7K
C67
0.1U_0402_16V7K
C68
180P_0402_50V8J
C69
1
180P_0402_50V8J C57
4.7U_0805_10V4Z
2
C58
4.7U_0805_10V4Z
+1.5V
Change as SF000002N00(H4.4)
+CPU_VDDR
0.1U_0402_16V7K
C54
0.22U_0603_16V4Z
C96
C101 0.1U_0402_16V7K
C53
0.22U_0603_16V4Z
0.1U_0402_16V7K
C52
0.22U_0603_16V4Z
0.1U_0402_16V7K
C51
0.22U_0603_16V4Z
0.1U_0402_16V7K
C100 0.1U_0402_16V7K
+CPU_VDDR
VDDR decoupling.
C99
+1.5V
3
C98
C97
C59
0.22U_0603_16V4Z
C60
0.22U_0603_16V4Z
C61
1000P_0402_50V7K
C62
1000P_0402_50V7K
C63
180P_0402_50V8J
C70
180P_0402_50V8J
+CPU_VDDR
1
1
1
C71
4.7U_0805_10V4Z
1
C72
4.7U_0805_10V4Z
1
C73
4.7U_0805_10V4Z
+
C74
4.7U_0805_10V4Z
C75
330U_D2_2V_Y
C76
4.7U_0805_10V4Z
C77
4.7U_0805_10V4Z
C78
0.22U_0603_16V4Z
C79
0.22U_0603_16V4Z
C80
1000P_0402_50V7K
C81
1000P_0402_50V7K
C82
180P_0402_50V8J
C83
180P_0402_50V8J
2009/10/06
Issued Date
Security Classification
2010/03/12
Deciphered Date
Title
SCHEMATICS, MB A5912
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Custom
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date:
Rev
C
401829
Sheet
of
45
+VREF_DQ
+1.5V
+1.5V
JDIMM1
DDRA_SDQS2#
DDRA_SDQS2
[7] DDRA_SDQS2#
[7] DDRA_SDQS2
DDRA_SDQ18
DDRA_SDQ19
DDRA_SDQ24
DDRA_SDQ25
DDRA_SDM3
DDRA_SDQ26
DDRA_SDQ27
DDRA_SDQ[0..63]
[7]
DDRA_SDM[0..7]
[7]
DDRA_SMA[0..15]
[7]
DDRA_SDQ12
DDRA_SDQ13
DDRA_SMA[0..15]
DDRA_SDM1
MEM_MA_RST#
MEM_MA_RST# [7]
DDRA_SDQ14
DDRA_SDQ15
DDRA_SDQ20
DDRA_SDQ21
DDRA_SDM2
DDRA_SDQ22
DDRA_SDQ23
DDRA_SDQ28
DDRA_SDQ29
DDRA_SDQS3#
DDRA_SDQS3
+VREF_CA
+VREF_DQ
DDRA_SDQ30
DDRA_SDQ31
DDRA_SMA3
DDRA_SMA1
[7] DDRA_CLK0
[7] DDRA_CLK0#
[7] DDRA_SBS0#
[7] DDRA_SWE#
[7] DDRA_SCAS#
[7] DDRA_SCS1#
DDRA_CLK0
DDRA_CLK0#
DDRA_SMA10
DDRA_SBS0#
DDRA_SWE#
DDRA_SCAS#
DDRA_SMA13
DDRA_SCS1#
DDRA_SDQ32
DDRA_SDQ33
DDRA_SDQS4#
DDRA_SDQS4
[7] DDRA_SDQS4#
[7] DDRA_SDQS4
DDRA_SDQ34
DDRA_SDQ35
DDRA_SDQ40
DDRA_SDQ41
DDRA_SDM5
DDRA_SDQ42
DDRA_SDQ43
DDRA_SDQ48
DDRA_SDQ49
DDRA_SDQS6#
DDRA_SDQS6
[7] DDRA_SDQS6#
[7] DDRA_SDQS6
DDRA_SDQ50
DDRA_SDQ51
DDRA_SDQ56
DDRA_SDQ57
DDRA_SDM7
DDRA_SDQ58
DDRA_SDQ59
R50
10K_0402_5%
1
2
+3VS
R51
+3VS
2
10K_0402_5%
C90
2
2.2U_0805_10V6K
C91
206
DDRA_CKE1 [7]
DDRA_SMA15
DDRA_SMA14
DDRA_SMA11
DDRA_SMA7
DDRA_SMA6
DDRA_SMA4
C84
@
C85
G2
DDRA_CKE1
C10
R49
1K_0402_1%
C235
@
2
C351
1
C680
R315
1K_0402_1%
DDRA_SMA2
DDRA_SMA0
DDRA_CLK1
DDRA_CLK1#
DDRA_SBS1#
DDRA_SRAS#
DDRA_SCS0#
DDRA_ODT0
DDRA_ODT1
DDRA_CLK1 [7]
DDRA_CLK1# [7]
DDRA_SBS1# [7]
DDRA_SRAS# [7]
DDRA_SCS0# [7]
DDRA_ODT0 [7]
DDRA_ODT1 [7]
+1.5V
+VREF_CA
DDRA_SDQ36
DDRA_SDQ37
DDRA_SDM4
DDRA_SDQ38
DDRA_SDQ39
DDRA_SDQ44
DDRA_SDQ45
DDRA_SDQS5#
DDRA_SDQS5
0.1U_0402_16V4Z
2
C87
0.1U_0402_16V4Z
2
C643
1
0.1U_0402_16V4Z
C88
0.1U_0402_16V4Z
2
C644
1
0.1U_0402_16V4Z
C640
C645
1
0.1U_0402_16V4Z
0.1U_0402_16V4Z
2
C641
1
0.1U_0402_16V4Z
C646
1
0.1U_0402_16V4Z
2
C642
1
0.1U_0402_16V4Z
C647
1
3
DDRA_SDQS5# [7]
DDRA_SDQS5 [7]
+0.75VS
DDRA_SDQ46
DDRA_SDQ47
0.1U_0402_16V4Z
2
DDRA_SDQ52
DDRA_SDQ53
C665
1
0.1U_0402_16V4Z
DDRA_SDM6
C664
1
1
C961
2
4.7U_0805_10V4Z
DDRA_SDQ54
DDRA_SDQ55
DDRA_SDQ60
DDRA_SDQ61
DDRA_SDQS7#
DDRA_SDQS7
DDRA_SDQS7# [7]
DDRA_SDQS7 [7]
+1.5V
DDRA_SDQ62
DDRA_SDQ63
+1.5V
PAD
C690
T9
SB_SMDAT0 [11,15,20,27]
SB_SMCLK0 [11,15,20,27]
+0.75VS
+0.75VS
2
C691
2
C692
2
C693
0.1U_0402_16V4Z
0.01U_0402_16V7K
4
0.01U_0402_16V7K
0.01U_0402_16V7K
FOX_AS0A626-U8SN-7F
CONN@
0.1U_0402_16V4Z
2
2009/10/06
Issued Date
Security Classification
<Address: 00>
2010/03/12
Deciphered Date
Title
SCHEMATICS, MB A5912
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Custom
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date:
G1
74
76
78
80
82
84
86
88
90
92
94
96
98
100
102
104
106
108
110
112
114
116
118
120
122
124
126
128
130
132
134
136
138
140
142
144
146
148
150
152
154
156
158
160
162
164
166
168
170
172
174
176
178
180
182
184
186
188
190
192
194
196
198
200
202
204
1000P_0402_50V7K
205
CKE1
VDD2
A15
A14
VDD4
A11
A7
VDD6
A6
A4
VDD8
A2
A0
VDD10
CK1
CK1#
VDD12
BA1
RAS#
VDD14
S0#
ODT0
VDD16
ODT1
NC2
VDD18
VREF_CA
VSS28
DQ36
DQ37
VSS30
DM4
VSS31
DQ38
DQ39
VSS33
DQ44
DQ45
VSS35
DQS#5
DQS5
VSS38
DQ46
DQ47
VSS40
DQ52
DQ53
VSS42
DM6
VSS43
DQ54
DQ55
VSS45
DQ60
DQ61
VSS47
DQS#7
DQS7
VSS50
DQ62
DQ63
VSS52
EVENT#
SDA
SCL
VTT2
0.01U_0402_25V7K
DDRA_SMA8
DDRA_SMA5
CKE0
VDD1
NC1
BA2
VDD3
A12/BC#
A9
VDD5
A8
A5
VDD7
A3
A1
VDD9
CK0
CK0#
VDD11
A10/AP
BA0
VDD13
WE#
CAS#
VDD15
A13
S1#
VDD17
NCTEST
VSS27
DQ32
DQ33
VSS29
DQS#4
DQS4
VSS32
DQ34
DQ35
VSS34
DQ40
DQ41
VSS36
DM5
VSS37
DQ42
DQ43
VSS39
DQ48
DQ49
VSS41
DQS#6
DQS6
VSS44
DQ50
DQ51
VSS46
DQ56
DQ57
VSS48
DM7
VSS49
DQ58
DQ59
VSS51
SA0
VDDSPD
SA1
VTT1
4.7U_0805_10V4Z
DDRA_SMA12
DDRA_SMA9
73
75
77
79
81
83
85
87
89
91
93
95
97
99
101
103
105
107
109
111
113
115
117
119
121
123
125
127
129
131
133
135
137
139
141
143
145
147
149
151
153
155
157
159
161
163
165
167
169
171
173
175
177
179
181
183
185
187
189
191
193
195
197
199
201
203
C89
1000P_0402_50V7K
[7] DDRA_SBS2#
DDRA_SBS2#
+VREF_CA
0.01U_0402_25V7K
DDRA_CKE0
[7] DDRA_CKE0
R310
1K_0402_1%
R48
1K_0402_1%
+VREF_DQ
+1.5V
+1.5V
DDRA_SDQS3# [7]
DDRA_SDQS3 [7]
DDRA_SDQ16
DDRA_SDQ17
DDRA_SDQ[0..63]
DDRA_SDM[0..7]
DDRA_SDQ10
DDRA_SDQ11
DDRA_SDQS0# [7]
DDRA_SDQS0 [7]
DDRA_SDQ6
DDRA_SDQ7
DDRA_SDQS1#
DDRA_SDQS1
[7] DDRA_SDQS1#
[7] DDRA_SDQS1
DDRA_SDQS0#
DDRA_SDQS0
DDRA_SDQ8
DDRA_SDQ9
DDRA_SDQ4
DDRA_SDQ5
1000P_0402_50V7K
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
54
56
58
60
62
64
66
68
70
72
4.7U_0805_10V4Z
DDRA_SDQ2
DDRA_SDQ3
VSS1
DQ4
DQ5
VSS3
DQS#0
DQS0
VSS6
DQ6
DQ7
VSS8
DQ12
DQ13
VSS10
DM1
RESET#
VSS12
DQ14
DQ15
VSS14
DQ20
DQ21
VSS16
DM2
VSS17
DQ22
DQ23
VSS19
DQ28
DQ29
VSS21
DQS#3
DQS3
VSS24
DQ30
DQ31
VSS26
DDRA_SDM0
VREF_DQ
VSS2
DQ0
DQ1
VSS4
DM0
VSS5
DQ2
DQ3
VSS7
DQ8
DQ9
VSS9
DQS#1
DQS1
VSS11
DQ10
DQ11
VSS13
DQ16
DQ17
VSS15
DQS#2
DQS2
VSS18
DQ18
DQ19
VSS20
DQ24
DQ25
VSS22
DM3
VSS23
DQ26
DQ27
VSS25
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51
53
55
57
59
61
63
65
67
69
71
DDRA_SDQ0
DDRA_SDQ1
Rev
C
401829
Sheet
E
10
of
45
+VREF_DQ
+1.5V
+1.5V
JDIMM2
[7] DDRB_SDQS1#
[7] DDRB_SDQS1
DDRB_SDQS1#
DDRB_SDQS1
DDRB_SDQ10
DDRB_SDQ11
DDRB_SDQ16
DDRB_SDQ17
[7] DDRB_SDQS2#
[7] DDRB_SDQS2
DDRB_SDQS2#
DDRB_SDQS2
DDRB_SDQ18
DDRB_SDQ19
DDRB_SDQ24
DDRB_SDQ25
DDRB_SDM3
DDRB_SDQ26
DDRB_SDQ27
[7] DDRB_CKE0
2
[7] DDRB_SBS2#
DDRB_CKE0
DDRB_SBS2#
DDRB_SMA12
DDRB_SMA9
DDRB_SMA8
DDRB_SMA5
DDRB_SMA3
DDRB_SMA1
[7] DDRB_SWE#
[7] DDRB_SCAS#
[7] DDRB_SCS1#
DDRB_SWE#
DDRB_SCAS#
DDRB_SMA13
DDRB_SCS1#
DDRB_SDQ32
DDRB_SDQ33
[7] DDRB_SDQS4#
[7] DDRB_SDQS4
DDRB_SDQS4#
DDRB_SDQS4
DDRB_SDQ34
DDRB_SDQ35
DDRB_SDQ40
DDRB_SDQ41
DDRB_SDM5
DDRB_SDQ42
DDRB_SDQ43
DDRB_SDQ48
DDRB_SDQ49
[7] DDRB_SDQS6#
[7] DDRB_SDQS6
DDRB_SDQS6#
DDRB_SDQS6
DDRB_SDQ50
DDRB_SDQ51
DDRB_SDQ56
DDRB_SDQ57
DDRB_SDM7
DDRB_SDQ58
DDRB_SDQ59
R52
10K_0402_5%
1
2
+3VS
R53
205
10K_0402_5%
CKE1
VDD2
A15
A14
VDD4
A11
A7
VDD6
A6
A4
VDD8
A2
A0
VDD10
CK1
CK1#
VDD12
BA1
RAS#
VDD14
S0#
ODT0
VDD16
ODT1
NC2
VDD18
VREF_CA
VSS28
DQ36
DQ37
VSS30
DM4
VSS31
DQ38
DQ39
VSS33
DQ44
DQ45
VSS35
DQS#5
DQS5
VSS38
DQ46
DQ47
VSS40
DQ52
DQ53
VSS42
DM6
VSS43
DQ54
DQ55
VSS45
DQ60
DQ61
VSS47
DQS#7
DQS7
VSS50
DQ62
DQ63
VSS52
EVENT#
SDA
SCL
VTT2
74
76
78
80
82
84
86
88
90
92
94
96
98
100
102
104
106
108
110
112
114
116
118
120
122
124
126
128
130
132
134
136
138
140
142
144
146
148
150
152
154
156
158
160
162
164
166
168
170
172
174
176
178
180
182
184
186
188
190
192
194
196
198
200
202
204
G2
206
G1
DDRB_SDQS0# [7]
DDRB_SDQS0 [7]
DDRB_SDQ[0..63]
DDRB_SDQ6
DDRB_SDQ7
DDRB_SDQ[0..63]
DDRB_SDM[0..7]
DDRB_SDM[0..7]
[7]
[7]
1
DDRB_SDQ12
DDRB_SDQ13
DDRB_SMA[0..15]
DDRB_SDM1
MEM_MB_RST#
DDRB_SMA[0..15]
[7]
MEM_MB_RST# [7]
DDRB_SDQ14
DDRB_SDQ15
DDRB_SDQ20
DDRB_SDQ21
DDRB_SDM2
DDRB_SDQ22
DDRB_SDQ23
DDRB_SDQ28
DDRB_SDQ29
DDRB_SDQS3#
DDRB_SDQS3
DDRB_SDQS3# [7]
DDRB_SDQS3 [7]
DDRB_SDQ30
DDRB_SDQ31
DDRB_CKE1
DDRB_CKE1 [7]
DDRB_SMA15
DDRB_SMA14
DDRB_SMA11
DDRB_SMA7
+VREF_DQ
DDRB_SMA6
DDRB_SMA4
+VREF_CA
DDRB_SMA2
DDRB_SMA0
DDRB_CLK1
DDRB_CLK1#
DDRB_SBS1#
DDRB_SRAS#
DDRB_SCS0#
DDRB_ODT0
DDRB_ODT1
+VREF_DQ
DDRB_CLK1 [7]
DDRB_CLK1# [7]
DDRB_SBS1# [7]
DDRB_SRAS# [7]
DDRB_SCS0# [7]
DDRB_ODT0 [7]
C92
C93
+VREF_CA
C682
C352
0.1U_0402_16V4Z
[7] DDRB_SBS0#
DDRB_SMA10
DDRB_SBS0#
CKE0
VDD1
NC1
BA2
VDD3
A12/BC#
A9
VDD5
A8
A5
VDD7
A3
A1
VDD9
CK0
CK0#
VDD11
A10/AP
BA0
VDD13
WE#
CAS#
VDD15
A13
S1#
VDD17
NCTEST
VSS27
DQ32
DQ33
VSS29
DQS#4
DQS4
VSS32
DQ34
DQ35
VSS34
DQ40
DQ41
VSS36
DM5
VSS37
DQ42
DQ43
VSS39
DQ48
DQ49
VSS41
DQS#6
DQS6
VSS44
DQ50
DQ51
VSS46
DQ56
DQ57
VSS48
DM7
VSS49
DQ58
DQ59
VSS51
SA0
VDDSPD
SA1
VTT1
DDRB_SDQS0#
DDRB_SDQS0
0.1U_0402_16V4Z
[7] DDRB_CLK0
[7] DDRB_CLK0#
DDRB_CLK0
DDRB_CLK0#
73
75
77
79
81
83
85
87
89
91
93
95
97
99
101
103
105
107
109
111
113
115
117
119
121
123
125
127
129
131
133
135
137
139
141
143
145
147
149
151
153
155
157
159
161
163
165
167
169
171
173
175
177
179
181
183
185
187
189
191
193
195
197
199
201
203
DDRB_SDQ4
DDRB_SDQ5
C353
1000P_0402_50V7K
DDRB_SDQ8
DDRB_SDQ9
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
54
56
58
60
62
64
66
68
70
72
4.7U_0805_10V4Z
VSS1
DQ4
DQ5
VSS3
DQS#0
DQS0
VSS6
DQ6
DQ7
VSS8
DQ12
DQ13
VSS10
DM1
RESET#
VSS12
DQ14
DQ15
VSS14
DQ20
DQ21
VSS16
DM2
VSS17
DQ22
DQ23
VSS19
DQ28
DQ29
VSS21
DQS#3
DQS3
VSS24
DQ30
DQ31
VSS26
1000P_0402_50V7K
DDRB_SDQ2
DDRB_SDQ3
VREF_DQ
VSS2
DQ0
DQ1
VSS4
DM0
VSS5
DQ2
DQ3
VSS7
DQ8
DQ9
VSS9
DQS#1
DQS1
VSS11
DQ10
DQ11
VSS13
DQ16
DQ17
VSS15
DQS#2
DQS2
VSS18
DQ18
DQ19
VSS20
DQ24
DQ25
VSS22
DM3
VSS23
DQ26
DQ27
VSS25
4.7U_0805_10V4Z
DDRB_SDM0
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51
53
55
57
59
61
63
65
67
69
71
C683
DDRB_ODT1 [7]
+VREF_CA
DDRB_SDQ36
DDRB_SDQ37
DDRB_SDM4
DDRB_SDQ38
DDRB_SDQ39
DDRB_SDQ44
DDRB_SDQ45
DDRB_SDQS5#
DDRB_SDQS5
DDRB_SDQS5# [7]
DDRB_SDQS5 [7]
+1.5V
DDRB_SDQ46
DDRB_SDQ47
0.1U_0402_16V4Z
2
DDRB_SDQ52
DDRB_SDQ53
C677
0.1U_0402_16V4Z
2
C670
1
0.1U_0402_16V4Z
DDRB_SDM6
C666
C671
1
0.1U_0402_16V4Z
0.1U_0402_16V4Z
2
C667
1
0.1U_0402_16V4Z
C672
1
0.1U_0402_16V4Z
2
C668
C673
1
0.1U_0402_16V4Z
0.1U_0402_16V4Z
2
C669
C674
1
0.1U_0402_16V4Z
DDRB_SDQ54
DDRB_SDQ55
DDRB_SDQ60
DDRB_SDQ61
DDRB_SDQS7#
DDRB_SDQS7
+1.5V
+0.75VS
DDRB_SDQS7# [7]
DDRB_SDQS7 [7]
DDRB_SDQ62
DDRB_SDQ63
PAD
0.1U_0402_16V4Z
2
C676
1
0.1U_0402_16V4Z
T10
C675
1
1
+
C925
2
4.7U_0603_6.3V6K
SB_SMDAT0 [10,15,20,27]
SB_SMCLK0 [10,15,20,27]
C86
330U_X_2VM_R6M
+0.75VS
4
FOX_AS0A626-U4SN-7F
CONN@
2009/10/06
Issued Date
Security Classification
2010/03/12
Deciphered Date
Title
SCHEMATICS, MB A5912
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Custom
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date:
C94
1000P_0402_50V7K
DDRB_SDQ0
DDRB_SDQ1
Rev
C
401829
Sheet
11
of
45
U3B
1
2 GPP0P AE3
R54 1 0_0402_5%
2 GPP0N AD4
R55
0_0402_5%
AE2
AD3
AD1
AD2
PCIE_PTX_C_IRX_P0 1
PCIE_PTX_C_IRX_P3V5
@
2
PCIE_PTX_C_IRX_N0 1R56 @ 0_0402_5%
PCIE_PTX_C_IRX_N3
W6
2
R57
0_0402_5%
U5
U6
R56,R57 close to R54,R55
U8
U7
[25] PCIE_PTX_C_IRX_P0
[25] PCIE_PTX_C_IRX_N0
[27] PCIE_PTX_C_IRX_P1
[27] PCIE_PTX_C_IRX_N1
[19]
[19]
[19]
[19]
[19]
[19]
[19]
[19]
SB_RX0P
SB_RX0N
SB_RX1P
SB_RX1N
SB_RX2P
SB_RX2N
SB_RX3P
SB_RX3N
AA8
Y8
AA7
Y7
AA5
AA6
W5
Y5
GPP_RX0P
GPP_RX0N
GPP_RX1P
GPP_RX1N
GPP_RX2P
GPP_RX2N
GPP_RX3P
GPP_RX3N
GPP_RX4P
GPP_RX4N
GPP_RX5P
GPP_RX5N
SB_RX0P
SB_RX0N
SB_RX1P
SB_RX1N
SB_RX2P
SB_RX2N
SB_RX3P
SB_RX3N
GFX_TX0P
GFX_TX0N
GFX_TX1P
GFX_TX1N
GFX_TX2P
GFX_TX2N
GFX_TX3P
GFX_TX3N
GFX_TX4P
GFX_TX4N
GFX_TX5P
GFX_TX5N
GFX_TX6P
GFX_TX6N
GFX_TX7P
GFX_TX7N
GFX_TX8P
GFX_TX8N
GFX_TX9P
GFX_TX9N
GFX_TX10P
GFX_TX10N
GFX_TX11P
GFX_TX11N
GFX_TX12P
GFX_TX12N
GFX_TX13P
GFX_TX13N
GFX_TX14P
GFX_TX14N
GFX_TX15P
GFX_TX15N
A5
B5
A4
B4
C3
B2
D1
D2
E2
E1
F4
F3
F1
F2
H4
H3
H1
H2
J2
J1
K4
K3
K1
K2
M4
M3
M1
M2
N2
N1
P1
P2
GPP_TX0P
GPP_TX0N
GPP_TX1P
GPP_TX1N
GPP_TX2P
GPP_TX2N
GPP_TX3P
GPP_TX3N
GPP_TX4P
GPP_TX4N
GPP_TX5P
GPP_TX5N
AC1
AC2
AB4
AB3
AA2
AA1
Y1
Y2
Y4
Y3
V1
V2
SB_TX0P
SB_TX0N
SB_TX1P
SB_TX1N
SB_TX2P
SB_TX2N
SB_TX3P
SB_TX3N
AD7
AE7
AE6
AD6
AB6
AC6
AD5
AE5
PCE_CALRP(PCE_BCALRP)
PCE_CALRN(PCE_BCALRN)
AC8
AB8
PART 2 OF 6
PCIE I/F SB
GMCH_HDMI_TXD2+ [17]
GMCH_HDMI_TXD2- [17]
GMCH_HDMI_TXD1+ [17]
GMCH_HDMI_TXD1- [17]
GMCH_HDMI_TXD0+ [17]
GMCH_HDMI_TXD0- [17]
GMCH_HDMI_TXC+ [17]
GMCH_HDMI_TXC- [17]
PCIE_ITX_PRX_P0
PCIE_ITX_PRX_N0
PCIE_ITX_PRX_P1
PCIE_ITX_PRX_N1
C127 1
C128
1
C129 1
C130
1
PCIE_ITX_PRX_P3 C131 1@
PCIE_ITX_PRX_N3 C132 @1
2
2
2
2
0.1U_0402_16V7K
0.1U_0402_16V7K
0.1U_0402_16V7K
0.1U_0402_16V7K
0.1U_0402_16V7K
2
2 0.1U_0402_16V7K
PCIE_ITX_C_PRX_P0
PCIE_ITX_C_PRX_N0
PCIE_ITX_C_PRX_P1
PCIE_ITX_C_PRX_N1
PCIE_ITX_C_PRX_P0
PCIE_ITX_C_PRX_N0
[25]
[25]
[27]
[27]
GLAN
2
WLAN
[6] H_CADOP[0..15]
[6] H_CADON[0..15]
SB_TX0P_C
SB_TX0N_C
SB_TX1P_C
SB_TX1N_C
SB_TX2P_C
SB_TX2N_C
SB_TX3P_C
SB_TX3N_C
R59
R58
C133
C134
C135
C136
C137
C138
C139
C140
1
1
1
1
1
1
1
1
1
1
2
2
2
2
2
2
2
2
2
2
0.1U_0402_16V7K
0.1U_0402_16V7K
0.1U_0402_16V7K
0.1U_0402_16V7K
0.1U_0402_16V7K
0.1U_0402_16V7K
0.1U_0402_16V7K
0.1U_0402_16V7K
1.27K_0402_1%
2K_0402_1%
SB_TX0P
SB_TX0N
SB_TX1P
SB_TX1N
SB_TX2P
SB_TX2N
SB_TX3P
SB_TX3N
[19]
[19]
[19]
[19]
[19]
[19]
[19]
[19]
H_CADIP[0..15]
H_CADIN[0..15]
+1.1VS
RS880 A11(SA000032710)
[6]
[6]
[6]
[6]
H_CLKOP0
H_CLKON0
H_CLKOP1
H_CLKON1
[6]
[6]
[6]
[6]
H_CTLOP0
H_CTLON0
H_CTLOP1
H_CTLON1
1
R60
H_CADOP0
H_CADON0
H_CADOP1
H_CADON1
H_CADOP2
H_CADON2
H_CADOP3
H_CADON3
H_CADOP4
H_CADON4
H_CADOP5
H_CADON5
H_CADOP6
H_CADON6
H_CADOP7
H_CADON7
Y25
Y24
V22
V23
V25
V24
U24
U25
T25
T24
P22
P23
P25
P24
N24
N25
H_CADOP8
H_CADON8
H_CADOP9
H_CADON9
H_CADOP10
H_CADON10
H_CADOP11
H_CADON11
H_CADOP12
H_CADON12
H_CADOP13
H_CADON13
H_CADOP14
H_CADON14
H_CADOP15
H_CADON15
AC24
AC25
AB25
AB24
AA24
AA25
Y22
Y23
W21
W20
V21
V20
U20
U21
U19
U18
HT_RXCAD8P
HT_RXCAD8N
HT_RXCAD9P
HT_RXCAD9N
HT_RXCAD10P
HT_RXCAD10N
HT_RXCAD11P
HT_RXCAD11N
HT_RXCAD12P
HT_RXCAD12N
HT_RXCAD13P
HT_RXCAD13N
HT_RXCAD14P
HT_RXCAD14N
HT_RXCAD15P
HT_RXCAD15N
T22
T23
AB23
AA22
HT_RXCLK0P
HT_RXCLK0N
HT_RXCLK1P
HT_RXCLK1N
M22
M23
R21
R20
H_CTLOP0
H_CTLON0
H_CTLOP1
H_CTLON1
2
HT_RXCALP
HT_RXCALN
301_0402_1%~D
C23
A24
[6]
HT_TXCAD0P
HT_TXCAD0N
HT_TXCAD1P
HT_TXCAD1N
HT_TXCAD2P
HT_TXCAD2N
HT_TXCAD3P
HT_TXCAD3N
HT_TXCAD4P
HT_TXCAD4N
HT_TXCAD5P
HT_TXCAD5N
HT_TXCAD6P
HT_TXCAD6N
HT_TXCAD7P
HT_TXCAD7N
D24
D25
E24
E25
F24
F25
F23
F22
H23
H22
J25
J24
K24
K25
K23
K22
H_CADIP0
H_CADIN0
H_CADIP1
H_CADIN1
H_CADIP2
H_CADIN2
H_CADIP3
H_CADIN3
H_CADIP4
H_CADIN4
H_CADIP5
H_CADIN5
H_CADIP6
H_CADIN6
H_CADIP7
H_CADIN7
HT_TXCAD8P
HT_TXCAD8N
HT_TXCAD9P
HT_TXCAD9N
HT_TXCAD10P
HT_TXCAD10N
HT_TXCAD11P
HT_TXCAD11N
HT_TXCAD12P
HT_TXCAD12N
HT_TXCAD13P
HT_TXCAD13N
HT_TXCAD14P
HT_TXCAD14N
HT_TXCAD15P
HT_TXCAD15N
F21
G21
G20
H21
J20
J21
J18
K17
L19
J19
M19
L18
M21
P21
P18
M18
H_CADIP8
H_CADIN8
H_CADIP9
H_CADIN9
H_CADIP10
H_CADIN10
H_CADIP11
H_CADIN11
H_CADIP12
H_CADIN12
H_CADIP13
H_CADIN13
H_CADIP14
H_CADIN14
H_CADIP15
H_CADIN15
HT_TXCLK0P
HT_TXCLK0N
HT_TXCLK1P
HT_TXCLK1N
H24
H25
L21
L20
HT_RXCTL0P
HT_RXCTL0N
HT_RXCTL1P
HT_RXCTL1N
HT_TXCTL0P
HT_TXCTL0N
HT_TXCTL1P
HT_TXCTL1N
M24
M25
P19
R18
H_CTLIP0
H_CTLIN0
H_CTLIP1
H_CTLIN1
HT_RXCALP
HT_RXCALN
HT_TXCALP
HT_TXCALN
B24
B25
HT_TXCALP
HT_TXCALN
HT_RXCAD0P
HT_RXCAD0N
HT_RXCAD1P
HT_RXCAD1N
HT_RXCAD2P
HT_RXCAD2N
HT_RXCAD3P
HT_RXCAD3N
HT_RXCAD4P
HT_RXCAD4N
HT_RXCAD5P
HT_RXCAD5N
HT_RXCAD6P
HT_RXCAD6N
HT_RXCAD7P
HT_RXCAD7N
PART 1 OF 6
[6]
[6]
[6]
[6]
H_CTLIP0
H_CTLIN0
H_CTLIP1
H_CTLIN1
[6]
[6]
[6]
[6]
R61
301_0402_1%~D
Deciphered Date
Title
SCHEMATICS, MB A5912
Date:
H_CLKIP0
H_CLKIN0
H_CLKIP1
H_CLKIN1
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Custom
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
A
RS880 A11(SA000032710)
2009/10/06
[6]
RS780M_FCBGA528
Security Classification
H_CADIP[0..15]
H_CADIN[0..15]
U3A
RS780M_FCBGA528
Issued Date
H_CADOP[0..15]
H_CADON[0..15]
GFX_RX0P
GFX_RX0N
GFX_RX1P
GFX_RX1N
GFX_RX2P
GFX_RX2N
GFX_RX3P
GFX_RX3N
GFX_RX4P
GFX_RX4N
GFX_RX5P
GFX_RX5N
GFX_RX6P
GFX_RX6N
GFX_RX7P
GFX_RX7N
GFX_RX8P
GFX_RX8N
GFX_RX9P
GFX_RX9N
GFX_RX10P
GFX_RX10N
GFX_RX11P
GFX_RX11N
GFX_RX12P
GFX_RX12N
GFX_RX13P
GFX_RX13N
GFX_RX14P
GFX_RX14N
GFX_RX15P
GFX_RX15N
D4
C4
A3
B3
C2
C1
E5
F5
G5
G6
H5
H6
J6
J5
J7
J8
L5
L6
M8
L8
P7
M7
P5
M5
R8
P8
R6
R5
P4
P3
T4
T3
Rev
C
401829
Sheet
12
of
45
FBMA-L11-160808-221LMT 0603
C143
1
2.2U_0603_6.3V4Z
2
2
2
1U_0402_6.3V4Z
+1.8VS
C147
1U_0402_6.3V4Z
+1.8VS
20mA
L6
1
+1.8VS
4mA
+AVDDQ
FBMA-L11-160808-221LMT 0603
C148
2.2U_0603_6.3V4Z
+VDDA18HTPLL
L7
1
C149
1U_0402_6.3V4Z
FBMA-L11-160808-221LMT 0603
C150
2.2U_0603_6.3V4Z
C151
1U_0402_6.3V4Z
20mA
+VDDA18HTPLL
R66
[14,19,29] A_RST#
[20] NB_PWRGD
close NB
CLK_NB_14.318M
1
R8401 EXT@
R1101 INT@
R107 INT@
+1.1VS
+3VS
+1.8VS
R68
R67
2
2 0_0402_5%
2 0_0402_5%
0_0402_5%
1
2
R69 EXT@
4.7K_0402_5%
R78
R79
R80
2 4.7K_0402_5%
2 4.7K_0402_5%
1
2
R70 EXT@
4.7K_0402_5%
CLK_NBGFX
CLK_NBGFX#
[15] CLK_NBGFX
[15] CLK_NBGFX#
R83 1
R106 1 INT@
INT@
2
2
4.7K_0402_5%
4.7K_0402_5%
close NB
[15] CLK_SBLINK_BCLK
[15] CLK_SBLINK_BCLK#
GMCH_LCD_CLK
GMCH_LCD_CLK
GMCH_LCD_DATA
GMCH_HDMI_DATA
GMCH_HDMI_CLK
[16] GMCH_LCD_CLK
[16] GMCH_LCD_DATA
[17] GMCH_HDMI_DATA
[17] GMCH_HDMI_CLK
GMCH_CRT_CLK
2 4.7K_0402_5% GMCH_CRT_DATA
NB_RESET#
NB_PWRGD_R
NB_LDTSTOP#
NB_ALLOW_LDTSTOP
NB_DISP_CLKP_R
NB_DISP_CLKN_R
2 4.7K_0402_5% GMCH_LCD_DATA
@
0_0402_5%
2
2
0_0402_5%
1
1
1
300_0402_5%
R77
E17
F17
F15
C_Pr(DFT_GPIO5)
Y(DFT_GPIO2)
COMP_Pb(DFT_GPIO4)
G18
G17
E18
F18
E19
F19
RED(DFT_GPIO0)
REDb(NC)
GREEN(DFT_GPIO1)
GREENb(NC)
BLUE(DFT_GPIO3)
BLUEb(NC)
A11
B11
F8
E8
DAC_HSYNC(PWM_GPIO4)
DAC_VSYNC(PWM_GPIO6)
DAC_SCL(PCE_RCALRN)
DAC_SDA(PCE_TCALRN)
[40] POWER_SEL
1
2
R82
2K_0402_5%
POWER_SEL
1
R85
H17
120mA
+VDDA18PCIEPLL
[15] CLK_NB_14.318M
[19] NB_DISP_CLKP
[19] NB_DISP_CLKN
AVDD1(NC)
AVDD2(NC)
AVDDDI(NC)
AVSSDI(NC)
AVDDQ(NC)
AVSSQ(NC)
+NB_PLLVDD
+NB_HTPVDD
C155
1U_0402_6.3V4Z
5
A
U4
NC7SZ08P5X_NL_SC70-5
4NB_PWRGD_R
@
1
2
0_0402_5%
U3C
F12
E12
F14
G15
H15
H14
DAC_RSET
G14
2
715_0402_1%
65mA
+NB_PLLVDD
A12
+NB_HTPVDD 20mA
D14
B12
1
R65
GMCH_CRT_HSYNC
GMCH_CRT_VSYNC
GMCH_CRT_CLK
GMCH_CRT_DATA
[14,18] GMCH_CRT_HSYNC
[14,18] GMCH_CRT_VSYNC
[18] GMCH_CRT_CLK
[18] GMCH_CRT_DATA
2
1
GMCH_CRT_B
[18] GMCH_CRT_B
L9
1
GMCH_CRT_G
[18] GMCH_CRT_G
+VDDA18PCIEPLL
FBMA-L11-160808-221LMT 0603
C154
2.2U_0603_6.3V4Z
GMCH_CRT_R
[18] GMCH_CRT_R
+1.8VS
[8,20,29] SB_PWRGD
NC7SZ08P5X_NL_SC70-5
2
150_0402_1%
A22
B22
A21
B21
B20
A20
A19
B19
TXOUT0+ [16]
TXOUT0- [16]
TXOUT1+ [16]
TXOUT1- [16]
TXOUT2+ [16]
TXOUT2- [16]
TXOUT_U0P(NC)
TXOUT_U0N(NC)
TXOUT_U1P(PCIE_RESET_GPIO3)
TXOUT_U1N(PCIE_RESET_GPIO2)
TXOUT_U2P(NC)
TXOUT_U2N(NC)
TXOUT_U3P(PCIE_RESET_GPIO5)
TXOUT_U3N(NC)
B18
A18
A17
B17
D20
D21
D18
D19
TZOUT0+
TZOUT0TZOUT1+
TZOUT1TZOUT2+
TZOUT2-
TXCLK_LP(DBG_GPIO1)
TXCLK_LN(DBG_GPIO3)
TXCLK_UP(PCIE_RESET_GPIO4)
TXCLK_UN(PCIE_RESET_GPIO1)
B16
A16
D16
D17
TXCLK+
TXCLKTZCLK+
TZCLK-
VDDLTP18(NC)
VSSLTP18(NC)
A13
B13
VDDLT18_1(NC)
VDDLT18_2(NC)
VDDLT33_1(NC)
VDDLT33_2(NC)
A15
B15
A14
B14
VSSLT1(VSS)
VSSLT2(VSS)
VSSLT3(VSS)
VSSLT4(VSS)
VSSLT5(VSS)
VSSLT6(VSS)
VSSLT7(VSS)
C14
D15
C16
C18
C20
E20
C22
LVDS_DIGON(PCE_TCALRP)
LVDS_BLON(PCE_RCALRP)
LVDS_ENA_BL(PWM_GPIO2)
E9
F7
G12
DAC_RSET(PWM_GPIO1)
PLLVDD(NC)
PLLVDD18(NC)
PLLVSS(NC)
VDDA18HTPLL
D7
E7
VDDA18PCIEPLL1
VDDA18PCIEPLL2
D8
A10
C10
C12
SYSRESETb
POWERGOOD
LDTSTOPb
ALLOW_LDTSTOP
C25
C24
HT_REFCLKP
HT_REFCLKN
E11
F11
REFCLK_P/OSCIN(OSCIN)
REFCLK_N(PWM_GPIO3)
T2
T1
GFX_REFCLKP
GFX_REFCLKN
U1
U2
GPP_REFCLKP
GPP_REFCLKN
V4
V3
GPPSB_REFCLKP(SB_REFCLKP)
GPPSB_REFCLKN(SB_REFCLKN)
B9
A9
B8
A8
B7
A7
I2C_CLK
I2C_DATA
DDC_DATA0/AUX0N(NC)
DDC_CLK0/AUX0P(NC)
DDC_CLK1/AUX1P(NC)
DDC_DATA1/AUX1N(NC)
B10
STRP_DATA
G11
RSVD
C8
TXOUT_L0P(NC)
TXOUT_L0N(NC)
TXOUT_L1P(NC)
TXOUT_L1N(NC)
TXOUT_L2P(NC)
TXOUT_L2N(DBG_GPIO0)
TXOUT_L3P(NC)
TXOUT_L3N(DBG_GPIO2)
PART 3 OF 6
15mA
AUX_CAL(NC)
TMDS_HPD(NC)
HPD(NC)
D9
D10
SUS_STAT#(PWM_GPIO5)
D12
THERMALDIODE_P
THERMALDIODE_N
AE8
AD8
TESTMODE
D13
L8
+VDDLTP18
1
[16]
[16]
[16]
[16]
1
1
+1.8VS
L10
1
2
BLM18AG601SN1D_2P
+VDDLT18
1
C156
0.1U_0402_16V4Z
+VDDLT18
FBMA-L11-160808-221LMT 0603
C153
2.2U_0603_6.3V4Z
2
+VDDLTP18
300mA
+1.8VS
C157
4.7U_0805_10V4Z
GMCH_ENVDD [16]
VARY_ENBKL
R73
MIS.
[16]
[16]
[16]
[16]
[16]
[16]
C152
1U_0402_6.3V4Z
R74
2
1
4.7K_0402_5%
NB_LDTSTOP#
AMD suggest
125mA
FBMA-L11-160808-221LMT 0603
C146
2.2U_0603_6.3V4Z
R64
NB_PWRGD
U8
+AVDDDI
FBMA-L11-160808-221LMT 0603
C145
0.1U_0402_16V4Z
2
1
2
1
4.7K_0402_5%
L5
1
L4
+NB_HTPVDD
1
2
1
4.7K_0402_5%
+1.8VS
[8,19] LDT_STOP#
C144
1
CRT/TVOUT
4.7U_0603_6.3V6K
PLL PWR
LVTM
4.7U_0603_6.3V6K
L3
C142
1U_0402_6.3V4Z
+1.8VS
R63
2.2K_0402_5%
+3VS
PM
C684
+AVDD1
FBMA-L11-160808-221LMT 0603
C141
2.2U_0603_6.3V4Z
C679
C696
2
+1.8VS
+NB_PLLVDD
L2
1
CLOCKs
+1.1VS
R417
@
300_0402_5%
+1.8VS
0.1U_0402_16V4Z
1
2
5
+1.8VS
ENBKL [29]
R72 1 VB@
2 0_0402_5%
GMCH_INVT_PWM [16]
R76 1 VB@
2 0_0402_5%
3
R75
GMCH_HDMI_DET [17]
@
1
R81
2
0_0402_5%
SUS_STAT# [20]
To SB
SUS_STAT_R# [14]
Strap pin
1
2
R84
1.8K_0402_5%
RS780M_FCBGA528
RS880
HIGH
LOW
EMI
@
1
CLK_NB_14.318M
R86
2
100_0402_5%
POWER_SEL
RS880 A11(SA000032710)
0.95V
1.1V
1
R87
1
R88
1
R89
@C158
@
C158
1
2
100P_0402_25V8K
GMCH_CRT_R
2
140_0402_1%
GMCH_CRT_G
2
150_0402_1%
GMCH_CRT_B
2
150_0402_1%
+1.8VS
R90
1K_0402_5%
2
[19] ALLOW_LDTSTOP
R91
1
2009/10/06
Issued Date
Security Classification
0_0402_5%
NB_ALLOW_LDTSTOP
2
2010/03/12
Deciphered Date
Title
SCHEMATICS, MB A5912
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Custom
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date:
Rev
C
401829
Sheet
13
of
45
+VDDHT
C261
@
10U_0805_10V4Z
C174
1
C175
4.7U_0603_6.3V6K
C178
C202
2
2
2
2
0.1U_0402_16V4Z 1U_0402_6.3V4Z
0.1U_0402_16V4Z
C179
2
C177
1
C192
1
C185
1
C190
2
2
0.1U_0402_16V4Z
AE25
AD24
AC23
AB22
AA21
Y20
W19
V18
U17
T17
R17
P17
M17
700mA
J10
P10
K10
M10
L10
W9
H9
T10
R10
Y9
AA9
AB9
AD9
AE9
U10
1
C186
2
0.1U_0402_16V4Z
4.7U_0603_6.3V6K
10mA
F9
G9
AE11
AD11
+1.8VS
C197
1U_0402_6.3V4Z
5mA
VDDHTTX_1
VDDHTTX_2
VDDHTTX_3
VDDHTTX_4
VDDHTTX_5
VDDHTTX_6
VDDHTTX_7
VDDHTTX_8
VDDHTTX_9
VDDHTTX_10
VDDHTTX_11
VDDHTTX_12
VDDHTTX_13
VDDA18PCIE_1
VDDA18PCIE_2
VDDA18PCIE_3
VDDA18PCIE_4
VDDA18PCIE_5
VDDA18PCIE_6
VDDA18PCIE_7
VDDA18PCIE_8
VDDA18PCIE_9
VDDA18PCIE_10
VDDA18PCIE_11
VDDA18PCIE_12
VDDA18PCIE_13
VDDA18PCIE_14
VDDA18PCIE_15
VDD18_1
VDD18_2
VDD18_MEM1(NC)
VDD18_MEM2(NC)
K12
J14
U16
J11
K15
M12
L14
L11
M13
M15
N12
N14
P11
P13
P14
R12
R15
T11
T15
U12
T14
J16
VDDC_1
VDDC_2
VDDC_3
VDDC_4
VDDC_5
VDDC_6
VDDC_7
VDDC_8
VDDC_9
VDDC_10
VDDC_11
VDDC_12
VDDC_13
VDDC_14
VDDC_15
VDDC_16
VDDC_17
VDDC_18
VDDC_19
VDDC_20
VDDC_21
VDDC_22
AE10
AA11
Y11
AD10
AB10
AC10
VDD_MEM1(NC)
VDD_MEM2(NC)
VDD_MEM3(NC)
VDD_MEM4(NC)
VDD_MEM5(NC)
VDD_MEM6(NC)
H11
H12
VDD33_1(NC)
VDD33_2(NC)
+NB_CORE
10A
23mA
1
+
2
220U_C6_6.3V_M_R15
C181
2
2 0.1U_0402_16V4Z
0.1U_0402_16V4Z
C189
L15
2
1
FBMA-L11-201209-221LMA30T_0805
1
1
C176
4.7U_0603_6.3V6K
+1.8VS
680mA
1
1
C172
C173
C196
L14
2
+1.1VS
FBMA-L11-201209-221LMA30T_0805
2 1U_0402_6.3V4Z
2 1U_0402_6.3V4Z
C184
2
0.1U_0402_16V4Z
VDDHTRX_1
VDDHTRX_2
VDDHTRX_3
VDDHTRX_4
VDDHTRX_5
VDDHTRX_6
VDDHTRX_7
2 4.7U_0805_10V4Z
1
1
10U_0805_10V4Z
2
2
2
2
4.7U_0805_10V4Z 0.1U_0402_16V4Z
H18
G19
F20
E21
D22
B23
A23
C168
C171
C195
700mA
C201
C163
10U_0805_10V4Z
C161
2 10U_0805_10V4Z
2 10U_0805_10V4Z
C183
1
1
0.1U_0402_16V4Z
C170
C160
C162
C188
C169
+VDDHTRX
1
+VDDA11PCIE
0.1U_0402_16V4Z
C164
2.5A
C180
A6
B6
C6
D6
E6
F6
G7
H8
J9
K9
M9
L9
P9
R9
T9
V9
U9
VDDPCIE_1
VDDPCIE_2
VDDPCIE_3
VDDPCIE_4
VDDPCIE_5
VDDPCIE_6
VDDPCIE_7
VDDPCIE_8
VDDPCIE_9
VDDPCIE_10
VDDPCIE_11
VDDPCIE_12
VDDPCIE_13
VDDPCIE_14
VDDPCIE_15
VDDPCIE_16
VDDPCIE_17
0.1U_0402_16V4Z
0.1U_0402_16V4Z
FBMA-L11-201209-221LMA30T_0805
PART 5/6
C194
1U_0402_6.3V4Z
L13
VDDHT_1
VDDHT_2
VDDHT_3
VDDHT_4
VDDHT_5
VDDHT_6
VDDHT_7
0.1U_0402_16V4Z
U3E
J17
K16
L16
M16
P16
R16
T16
C193
2
0.1U_0402_16V4Z
+1.1VS
0.1U_0402_16V4Z
2
2
2
0.1U_0402_16V4Z
1
2
FBMA-L11-201209-221LMA30T_0805
C187
C200
0.1U_0402_16V4Z
C167
L12
C182
2
4.7U_0805_10V4Z
U3F
0.1U_0402_16V4Z
C159
C191
C166
0.1U_0402_16V4Z
C165
600mA
0.1U_0402_16V4Z
FBMA-L11-201209-221LMA30T_0805
1U_0402_6.3V4Z
POWER
A25
D23
E22
G22
G24
G25
H19
J22
L17
L22
L24
L25
M20
N22
P20
R19
R22
R24
R25
H20
U22
V19
W22
W24
W25
Y21
AD25
VSSAHT1
VSSAHT2
VSSAHT3
VSSAHT4
VSSAHT5
VSSAHT6
VSSAHT7
VSSAHT8
VSSAHT9
VSSAHT10
VSSAHT11
VSSAHT12
VSSAHT13
VSSAHT14
VSSAHT15
VSSAHT16
VSSAHT17
VSSAHT18
VSSAHT19
VSSAHT20
VSSAHT21
VSSAHT22
VSSAHT23
VSSAHT24
VSSAHT25
VSSAHT26
VSSAHT27
L12
M14
N13
P12
P15
R11
R14
T12
U14
U11
U15
V12
W11
W15
AC12
AA14
Y18
AB11
AB15
AB17
AB19
AE20
AB21
K11
VSS11
VSS12
VSS13
VSS14
VSS15
VSS16
VSS17
VSS18
VSS19
VSS20
VSS21
VSS22
VSS23
VSS24
VSS25
VSS26
VSS27
VSS28
VSS29
VSS30
VSS31
VSS32
VSS33
VSS34
60mA
RS880 A11(SA000032710)
C198
0.1U_0402_16V4Z
VSSAPCIE1
VSSAPCIE2
VSSAPCIE3
VSSAPCIE4
VSSAPCIE5
VSSAPCIE6
VSSAPCIE7
VSSAPCIE8
VSSAPCIE9
VSSAPCIE10
VSSAPCIE11
VSSAPCIE12
VSSAPCIE13
VSSAPCIE14
VSSAPCIE15
VSSAPCIE16
VSSAPCIE17
VSSAPCIE18
VSSAPCIE19
VSSAPCIE20
VSSAPCIE21
VSSAPCIE22
VSSAPCIE23
VSSAPCIE24
VSSAPCIE25
VSSAPCIE26
VSSAPCIE27
VSSAPCIE28
VSSAPCIE29
VSSAPCIE30
VSSAPCIE31
VSSAPCIE32
VSSAPCIE33
VSSAPCIE34
VSSAPCIE35
VSSAPCIE36
VSSAPCIE37
VSSAPCIE38
VSSAPCIE39
VSSAPCIE40
VSS1
VSS2
VSS3
VSS4
VSS5
VSS6
VSS7
VSS8
VSS9
VSS10
A2
B1
D3
D5
E4
G1
G2
G4
H7
J4
R7
L1
L2
L4
L7
M6
N4
P6
R1
R2
R4
V7
U4
V8
V6
W1
W2
W4
W7
W8
Y6
AA4
AB5
AB1
AB7
AC3
AC4
AE1
AE4
AB2
AE14
D11
G8
E14
E15
J15
J12
K14
M11
L15
RS780M_FCBGA528
+3VS
1
RS780M_FCBGA528
PART 6/6
GROUND
0.1U_0402_16V4Z
L11
1.3A
+1.1VS
RS880 A11(SA000032710)
1
C199
0.1U_0402_16V4Z
U3D
DFT_GPIO5:STRAP_DEBUG_BUS_GPIO_ENABLEb
Debug Mode
2
R92
2
R93
1
3K_0402_5%
1
3K_0402_5%
+3VS
DFT_GPIO1: LOAD_EEPROM_STRAPS
[13] SUS_STAT_R#
2
R264 @
A_RST# [13,19,29]
1
3K_0402_5%
[13,18] GMCH_CRT_HSYNC
2
R94
2
R95
1
3K_0402_5%
1
3K_0402_5%
RS880: HSYNC#
0:
Enable
1 : Disable
+3VS
MEM_A0(NC)
MEM_A1(NC)
MEM_A2(NC)
MEM_A3(NC)
MEM_A4(NC)
MEM_A5(NC)
MEM_A6(NC)
MEM_A7(NC)
MEM_A8(NC)
MEM_A9(NC)
MEM_A10(NC)
MEM_A11(NC)
MEM_A12(NC)
MEM_A13(NC)
AD16
AE17
AD17
MEM_BA0(NC)
MEM_BA1(NC)
MEM_BA2(NC)
W12
Y12
AD18
AB13
AB18
V14
MEM_RASb(NC)
MEM_CASb(NC)
MEM_WEb(NC)
MEM_CSb(NC)
MEM_CKE(NC)
MEM_ODT(NC)
V15
W14
MEM_CKP(NC)
MEM_CKN(NC)
AE12
AD12
MEM_DQ0/DVO_VSYNC(NC)
MEM_DQ1/DVO_HSYNC(NC)
MEM_DQ2/DVO_DE(NC)
MEM_DQ3/DVO_D0(NC)
MEM_DQ4(NC)
MEM_DQ5/DVO_D1(NC)
MEM_DQ6/DVO_D2(NC)
MEM_DQ7/DVO_D4(NC)
MEM_DQ8/DVO_D3(NC)
MEM_DQ9/DVO_D5(NC)
MEM_DQ10/DVO_D6(NC)
MEM_DQ11/DVO_D7(NC)
MEM_DQ12(NC)
MEM_DQ13/DVO_D9(NC)
MEM_DQ14/DVO_D10(NC)
MEM_DQ15/DVO_D11(NC)
AA18
AA20
AA19
Y19
V17
AA17
AA15
Y15
AC20
AD19
AE22
AC18
AB20
AD22
AC22
AD21
MEM_DQS0P/DVO_IDCKP(NC)
MEM_DQS0N/DVO_IDCKN(NC)
MEM_DQS1P(NC)
MEM_DQS1N(NC)
Y17
W18
AD20
AE21
MEM_DM0(NC)
MEM_DM1/DVO_D8(NC)
W17
AE19
IOPLLVDD18(NC)
IOPLLVDD(NC)
AE23
AE24
IOPLLVSS(NC)
AD23
MEM_VREF(NC)
AE18
MEM_COMPP(NC)
MEM_COMPN(NC)
+1.8VS
+1.1VS
2010/03/12
Deciphered Date
Title
SCHEMATICS, MB A5912
Date:
26mA
RS880 A11(SA000032710)
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Custom
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
A
15mA
RS780M_FCBGA528
Security Classification
Issued Date
SBD_MEM/DVO_I/F
PAR 4 OF 6
AB12
AE16
V11
AE15
AA12
AB16
AB14
AD14
AD13
AD15
AC16
AE13
AC14
Y14
Rev
C
401829
Sheet
14
of
45
+VDDCLK_IO
EXT@ L54
+1.1VS
0.1U_0402_16V4Z
1
1
C516
FBMA-L11-201209-221LMA30T_0805 C515
EXT@
EXT@
1
0.1U_0402_16V4Z
1
1
C517
C518
EXT@
EXT@
2
22U_0805_6.3V6M
2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
1
1
C519
C520
EXT@
EXT@
2
0.1U_0402_16V4Z
+3VS_CLK
EXT@ L55
0.1U_0402_16V4Z +3VS
1
2
1
1
C521
C522
FBMA-L11-201209-221LMA30T_0805
EXT@
EXT@
2
2
22U_0805_6.3V6M
C523
EXT@
0.1U_0402_16V4Z
1
C524
EXT@
2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
1
C526
EXT@
C525
EXT@
2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
1
C528
EXT@
C527
EXT@
2
0.1U_0402_16V4Z
C529
EXT@
0.1U_0402_16V4Z
1
C530
EXT@
2
0.1U_0402_16V4Z
C531
EXT@
2
0.1U_0402_16V4Z
C532
EXT@
1U_0402_6.3V4Z
1U CLOSE PIN 69
+3VS
L56 EXT@
2
+3VS_CLKVDDA
+3VS_CLK
FBMA-L11-201209-221LMA30T_0805
U17
EXT@
C534
0.1U_0402_16V4Z
ICS 9LPRS488
49
48
VDDA
GNDA
62
66
VDDREF
GNDREF
SB_SRC_SLOW#
12
18
28
37
53
VDDSRC_IO
VDDSRC_IO
VDDATIG_IO
VDDSB_SRC_IO
VDDCPU_IO
CPUKG0T_LPRS
CPUKG0C_LPRS
56
55
HTT0T_LPRS / 66 M
HTT0C_LPRS / 66 M
60
59
SMBCLK
SMBDAT
1
2
R236
8.2K_0402_5%
EXT@
SB_SMCLK0 [10,11,20,27]
SB_SMDAT0 [10,11,20,27]
22U_0805_6.3V6M
C533
EXT@
LAN
EXT@
3
17
29
38
44
54
L57
61
69
1
2
BLM18AG601SN1D_2P
EXT@
[25] LAN_CLKREQ#
Mini Card1
[27] MINI1_CLKREQ#
[20] LAN_CLKREQ#_I
[20] MINI1_CLKREQ#_I
R111
1 INT@
0_0402_5%
1 INT@
0_0402_5%
R112
1
2
R243
90.9_0402_1%
EXT@
[13] CLK_NB_14.318M
VDDDOT
VDDSRC
VDDATIG
VDDSB_SRC
VDDSATA
VDDCPU
VDDHTT
VDD48
24
CLKREQ0 #
51
CLKREQ1#
50
CLKREQ2#
43
CLKREQ3#
42
CLKREQ4#
27M_SEL
63
REF2/SEL_27
SEL_SATA
64
REF1/SEL_SATA
CLK_14.318M
1
2
R244 EXT@ 158_0402_1%
0_0402_5%
0_0402_5%
CPU_HT_CLKP [19]
CPU_HT_CLKN [19]
CLK_CPU_BCLK [8]
CLK_CPU_BCLK# [8]
CPU
CLK_NBHT [13]
CLK_NBHT# [13]
NB HT
R237
8.2K_0402_5%
INT@
SB_SRC0T_LPRS
SB_SRC0C_LPRS
40
39
SB_SRC1T_LPRS
SB_SRC1C_LPRS
35
34
ATIG0T_LPRS
ATIG0C_LPRS
33
32
ATIG1T_LPRS
ATIG1C_LPRS
31
30
ATIG2T_LPRS
ATIG2C_LPRS
26
25
SRC0T_LPRS
SRC0C_LPRS
23
22
SRC1T_LPRS
SRC1C_LPRS
21
20
R96
R97
1 INT@
1
INT@
2
2
0_0402_5%
0_0402_5%
NB_HT_CLKP [19]
NB_HT_CLKN [19]
+3VS_CLK
R239 8.2K_0402_5%
1
2
EXT@
R238 8.2K_0402_5%
1
2
+3VS_CLK
SRC_SLOW
2
2
CLK_NBGFX [13]
CLK_NBGFX# [13]
+3VS_CLK
C
SRC_SLOW
R98
1 INT@
R108 1
INT@
R240
8.2K_0402_5%
INT@
NB GFX
R241
8.2K_0402_5%
EXT@
1
+VDDCLK_IO
41
1
0.1U_0402_16V4Z
SEL_SATA
R100 1 INT@
R101 1
INT@
2
2
0_0402_5%
0_0402_5%
GPP_CLK1P [19]
GPP_CLK1N [19]
27M_SEL
EXT@ 2
C535
CLK_PCIE_LAN [25]
CLK_PCIE_LAN# [25]
CLK_PCIE_MINI1 [27]
CLK_PCIE_MINI1# [27]
R242
8.2K_0402_5%
EXT@
GLAN
+3VS_CLK
MiniCard_1
CLK_XTAL_OUT
65
REF0/SEL_HTT66
SRC2T_LPRS
SRC2C_LPRS
16
15
71
48MHz_0
14
13
70
SRC3T_LPRS
SRC3C_LPRS
48MHz_1
SRC4T_LPRS
SRC4C_LPRS
10
9
SRC5T_LPRS
SRC5C_LPRS
8
7
R102 1 INT@
R103 1
INT@
2 0_0402_5%
2 0_0402_5%
GPP_CLK3P [19]
GPP_CLK3N [19]
CLK_XTAL_IN
[20] CLK_48M_USB
CLK_48M
2
1
R246 EXT@ 33_0402_5%
CLK_XTAL_IN
67
X1
CLK_XTAL_OUT
68
X2
6
11
19
27
36
47
52
58
72
73
GNDDOT
GNDSRC
GNDSRC
GNDATIG
GNDSB_SRC
GNDSATA
GNDCPU
GNDHTT
GND48
GNDPAD
change to SJ100009R00
Y2
SRC6T/SATAT_LPRS
SRC6C/SATAC_LPRS
SRC7T_LPRS/27MHz_SS
SRC7C_LPRS/27MHz_NS
CLK_SBLINK_BCLK [13]
CLK_SBLINK_BCLK# [13]
NB A LINK
22P_0402_50V8J
2
46
45
CLK_SBSRC_BCLK [19]
CLK_SBSRC_BCLK# [19]
22P_0402_50V8J
SB RCLK
5
4
CLK_NB_14.318M
RS880
PD#
57
2
R249
1
8.2K_0402_5%
INT@
R104 2
1.1V 158R/90.0R
+3VS_CLK
EXT@
SLG8SP626VTR_QFN72_10x10
EXT@
14.318MHZ_16PF_7A14300003
EXT@ 1
1
EXT@ C536
C537 EXT@
1 0_0402_5%
CLK_SBLINK_BCLK
1 0_0402_5%
CLK_SBLINK_BCLK#
27M_SEL
INT@
SEL_HTT66
R113 2
R114 2
INT@
INT@
1 0_0402_5%
CLK_SBSRC_BCLK#
0*
1 0_0402_5%
CLK_SBSRC_BCLK
1*
SEL_SATA
* default
2009/10/06
Issued Date
Security Classification
2010/03/12
Deciphered Date
Title
SCHEMATICS, MB A5912
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Custom
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date:
Rev
C
401829
Sheet
15
of
45
JLVDS1
+LCDVDD
1
W=60mils
1
R250
300_0603_5%
41
42
43
44
45
46
+3VS
+3VALW
R251
100K_0402_5%
C538
G1
G2
G3
G4
G5
G6
4.7U_0805_10V4Z
1
1K_0402_5%
1
C539
1
GMCH_ENVDD
Q23
[13] GMCH_ENVDD
S
2N7002_SOT23
2N7002_SOT23
+LCDVDD
W=60mils
0.047U_0402_16V7K
2
2
G
1 R507
2
100K_0402_5%
AO3413_SOT23-3
Q13
2
R252
2
G
Q11
2
D
C540
4.7U_0805_10V4Z
2
<NCQD0 use>
C541
0.1U_0402_16V4Z
+3VS
+LCDVDD
B+
1
+INVPWR_B+
L59 2
1
FBMA-L11-201209-221LMA30T_0805
C544
BKOFF#
[29] BKOFF#
C545
680P_0402_50V7K 68P_0402_50V8J
2
2
D9
CH751H-40PT_SOD323-2
@
1
2
R121
@
4.7K_0402_5%
2
L58 2
1
FBMA-L11-201209-221LMA30T_0805
W=40mils
R172 1
2 0_0402_5%
R171 1
2 10K_0402_5%
C546
C547
10U_0805_10V4Z
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
+INVPWR_B+
+LCDVDD_L
INVT_PWM
DISPOFF#
GMCH_LCD_CLK
GMCH_LCD_DATA
TXOUT1TXOUT1+
TXOUT2TXOUT2+
TXCLKTXCLK+
TZOUT0TZOUT0+
TZOUT1TZOUT1+
TZOUT2TZOUT2+
TZCLKTZCLK+
USB20_CMOS_N5
USB20_CMOS_P5
DISPOFF#
TXOUT1- [13]
TXOUT1+ [13]
TXOUT2- [13]
TXOUT2+ [13]
TXCLK- [13]
TXCLK+ [13]
TZOUT0- [13]
TZOUT0+ [13]
TZOUT1- [13]
TZOUT1+ [13]
R842 2
1 0_0402_5%
LOCAL_DIM [29]
R843 2
1 0_0402_5%
COLOY_ENG_EN [29]
TZOUT2- [13]
TZOUT2+ [13]
TZCLK- [13]
TZCLK+ [13]
+3VS
R256 2
R257 2
1 0_0402_5%
1 0_0402_5%
USB20_N5 [20]
USB20_P5 [20]
0.1U_0402_16V4Z
INVT_PWM
1
C542
1
C543
1
C548
2
2
2
CH3
Vp
USB20_CMOS_P54
220P_0402_50V7K
CH4
CH2
Vn
CH1
USB20_CMOS_N5
CM1293-04SO_SOT23-6
220P_0402_50V7K
220P_0402_50V7K
VB@ 2
1
R262
0_0402_5%
R319
10K_0402_5%
@
2
[13] GMCH_INVT_PWM
GMCH_INVT_PWM
GMCH_LCD_CLK [13]
GMCH_LCD_DATA [13]
DAC_BRIG [29]
TXOUT0- [13]
TXOUT0+ [13]
INVT_PWM
1 UNVB@ 2
R260
0_0402_5%
+LCDVDD
D14 @
DAC_BRIG
EC_INVT_PWM
1
0_0603_5%
+3VS
TXOUT0TXOUT0+
+3VS
[29] EC_INVT_PWM
@
2
+LCDVDD R841
IPEX_20143-040E-20F
CONN@
DISPOFF#
2
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
2009/10/06
Issued Date
Security Classification
2010/03/12
Deciphered Date
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
B
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date:
SCHEMATICS, MB A5912
Document Number
Rev
C
401829
Sheet
16
of
45
+3VS
+3VS
+HDMI_5V_OUT
3
2
<5V tolerant>
3
[13] GMCH_HDMI_DATA
W=40mils
2
1
1.1A_6VDC_FUSE
HDMI@
C549
0.1U_0402_16V4Z
HDMI@
JHDMI1
HDMI_SCLK
HDMI_HPD
1
@
Q16
BSH111 1N_SOT23-3
[13] GMCH_HDMI_CLK
F1
1+HDMI_5V_OUT_1 1
RB491D_SC59-3
HDMI@
HDMI@
R277
4.7K_0402_5%
1
2
4.7K_0402_5%
HDMI@
R276
2
10K_0402_5%
R275
1
2
R274
1
+5VS
10K_0402_5%
+HDMI_5V_OUT
D3
+HDMI_5V_OUT
HDMI_SDATA
HDMI_SCLK
HDMI_SDATA
@
Q17
BSH111 1N_SOT23-3
HDMI_R_CKHDMI_R_CK+
HDMI_R_D0-
2 HDMI@ 1
R278
0_0402_5%
HDMI_R_D0+
HDMI_R_D1-
2 HDMI@ 1
R279
0_0402_5%
HDMI_R_D1+
HDMI_R_D2-
Check 5V tolerant
HDMI_R_D2+
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
HP_DET
+5V
DDC/CEC_GND
SDA
SCL
Reserved
CEC
CKGND
CK_shield GND
CK+
GND
D0GND
D0_shield
D0+
D1D1_shield
D1+
D2D2_shield
D2+
20
21
22
23
SUYIN_100042MR019S153ZL
CONN@
<NAV70 use>
+3VS
HDMI@
R280
0_0402_5%
+HDMI_5V_OUT
C
2
1
R303 0_0402_5%
GMCH_HDMI_DET
GMCH_HDMI_DET
[13] GMCH_HDMI_DET
2
2
1
R282
0_0402_5%
HDMI@
HDMI@
HDMI_HPD
2
1
2
B
R281
150K_0402_5%
E HDMI@
HDMI@
Q18
R283
MMBT3904_NL_SOT23-3
365K_0402_1%
1
1 1
R284
10K_0402_5%
HDMI@
U40
@
R411
100K_0402_5%
@
+3VS
4.7K_0402_5%
C687
0.1U_0402_16V7K
@
2
0.1U_0402_16V7K
P
OE#
5
1
@
1 R304
C681
@
HDMI_HPD
SN74AHCT1G125GW_SOT353-5
Reserve
HDMI@
HDMI_C_CLK-
1 0.1U_0402_16V7K
1 0.1U_0402_16V7K
HDMI_C_TX2HDMI_C_TX2+
C552 HDMI@2
C553 HDMI@2
1 0.1U_0402_16V7K
1 0.1U_0402_16V7K
C554 HDMI@2
C555 HDMI@2
C556 HDMI@2
C557 HDMI@2
R286 1 HDMI@ 2
R287 1 HDMI@ 2
715_0402_1%
715_0402_1%
HDMI_C_TX1HDMI_C_TX1+
R289 1 HDMI@ 2
R290 1 HDMI@ 2
715_0402_1%
715_0402_1%
1 0.1U_0402_16V7K
1 0.1U_0402_16V7K
HDMI_C_TX0HDMI_C_TX0+
R292 1 HDMI@ 2
R293 1 HDMI@ 2
715_0402_1%
715_0402_1%
1 0.1U_0402_16V7K
1 0.1U_0402_16V7K
HDMI_C_CLKHDMI_C_CLK+
R294 1 HDMI@ 2
R295 1 HDMI@ 2
715_0402_1%
715_0402_1%
1
R298
HDMI_C_TX0-
10mil
2
G
2N7002_SOT23
Q19
HDMI@
HDMI_C_TX1-
10mil
HDMI_C_TX1+
100K_0402_5%
HDMI_C_TX2-
3
HDMI_R_CK+
R291 1 HDMI@ 2
0_0402_5%
HDMI_R_D0-
HDMI@
R296 1
3
HDMI@
R297 1 HDMI@ 2
R299
R300
L63
WCM-2012-900T_0805
@
4
HDMI_C_TX2+
HDMI_R_CK-
0_0402_5%
1
L62
WCM-2012-900T_0805
@
4
HDMI@
0_0402_5%
R288 1
1
L61
WCM-2012-900T_0805
@
4
10mil
HDMI_C_TX0+
0_0402_5%
2
HDMI@
HDMI_C_CLK+
R302 1
+HDMI_5V_OUT
L60
WCM-2012-900T_0805
@
4
C550 HDMI@2
C551 HDMI@2
R285 1
2
3
0_0402_5%
HDMI_R_D0+
0_0402_5%
HDMI_R_D1-
2
3
0_0402_5%
HDMI_R_D1+
1 HDMI@ 2
0_0402_5%
HDMI_R_D2-
HDMI@
R301 1
3
HDMI@
2
3
0_0402_5%
HDMI_R_D2+
2009/10/06
Issued Date
Security Classification
2010/03/12
Deciphered Date
Title
SCHEMATICS, MB A5912
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Custom
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date:
Rev
C
401829
Sheet
17
of
45
CRT Connector
W=40mils
+R_CRT_VCC
+5VS
D7
2
RB491D_SC59-3
D5
PJDLC05C_SOT23-3
@
W=40mils
2
1.1A_6VDC_FUSE
1
C558
0.1U_0402_16V4Z
D4
PJDLC05C_SOT23-3
@
+CRT_VCC
F2
CRT_R_1
GMCH_CRT_G
2
R408
1
0_0402_5%
CRT_G_1
L65 1
2 FCM2012CF-800T06_2P
CRT_G_2
GMCH_CRT_B
2
R409
1
0_0402_5%
CRT_B_1
L66 1
2 FCM2012CF-800T06_2P
CRT_B_2
[13] GMCH_CRT_B
1
0_0402_5%
R305
L64 1
R307
R308
C559
C560
2
10P_0402_50V8J
150_0402_1%
140_0402_1%
2 FCM2012CF-800T06_2P
CRT_R_2
JCRT1
6
11
1
7
12
2
8
13
3
9
14
4
10
15
5
[13] GMCH_CRT_G
2
R407
GMCH_CRT_R
[13] GMCH_CRT_R
150_0402_1%
C561
C562
2
10P_0402_50V8J
C563
2
10P_0402_50V8J
C564
2
10P_0402_50V8J
10P_0402_50V8J
10P_0402_50V8J
C565
<NAL00 use>
16
17
G
G
C-H_13-12201513CP
CONN@
100P_0402_50V8J
+CRT_VCC
A
3
CRT_HSYNC_1
C566
10P_0402_50V8J
CRT_VSYNC_2
1
C567
10P_0402_50V8J
74AHCT1G125GW_SOT353-5
R311
100K_0402_5%
C568 2
68P_0402_50V8J 1
+CRT_VCC
2
C570
68P_0402_50V8J
+CRT_VCC
P
2
1
OE#
GMCH_CRT_VSYNC
U19
Y
CRT_VSYNC_1
[13,14] GMCH_CRT_VSYNC
DSUB_15
2 0.1U_0402_16V4Z
5
C571 1
DSUB_12
L68 1
2
FCM2012CF-800T06_2P
U18
CRT_DET# [20]
CRT_HSYNC_2
P
GMCH_CRT_HSYNC
L67 1
2
FCM2012CF-800T06_2P
1 10K_0402_5%
[13,14] GMCH_CRT_HSYNC
R312 2
5
2 0.1U_0402_16V4Z
OE#
C569 1
74AHCT1G125GW_SOT353-5
2
G
R318
4.7K_0402_5%
2
R317
4.7K_0402_5%
@
D
GMCH_CRT_DATA
3
S
DSUB_12
GMCH_CRT_DATA [13]
2
G
Q53
BSH111 1N_SOT23-3
1
@
DSUB_15
GMCH_CRT_CLK
GMCH_CRT_CLK [13]
Q65
BSH111 1N_SOT23-3
2
R321
1
0_0402_5%
2
R323
1
0_0402_5%
2009/10/06
Issued Date
Security Classification
2010/03/12
Deciphered Date
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
B
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date:
SCHEMATICS, MB A5912
Document Number
Rev
C
401829
Sheet
18
of
45
R370
GPP_TX0P
GPP_TX0N
GPP_TX1P
GPP_TX1N
GPP_TX2P
GPP_TX2N
GPP_TX3P
GPP_TX3N
AA22
Y21
AA25
AA24
W23
V24
W24
W25
GPP_RX0P
GPP_RX0N
GPP_RX1P
GPP_RX1N
GPP_RX2P
GPP_RX2N
GPP_RX3P
GPP_RX3N
AA28
AA29
Y29
Y28
Y26
Y27
W28
W29
1
D
[13] NB_DISP_CLKP
[13] NB_DISP_CLKN
[15] NB_HT_CLKP
[15] NB_HT_CLKN
[15] CPU_HT_CLKP
[15] CPU_HT_CLKN
LAN
MINI
[15] GPP_CLK1P
[15] GPP_CLK1N
[15] GPP_CLK3P
[15] GPP_CLK3N
25M_CLK_X1
PCIE_RCLKP/NB_LNK_CLKP
PCIE_RCLKN/NB_LNK_CLKN
U29
U28
NB_DISP_CLKP
NB_DISP_CLKN
T26
T27
NB_HT_CLKP
NB_HT_CLKN
V21
T21
CPU_HT_CLKP
CPU_HT_CLKN
V23
T23
SLT_GFX_CLKP
SLT_GFX_CLKN
L29
L28
GPP_CLK0P
GPP_CLK0N
N29
N28
GPP_CLK1P
GPP_CLK1N
M29
M28
GPP_CLK2P
GPP_CLK2N
T25
V25
GPP_CLK3P
GPP_CLK3N
L24
L23
GPP_CLK4P
GPP_CLK4N
P25
M25
GPP_CLK5P
GPP_CLK5N
P29
P28
GPP_CLK6P
GPP_CLK6N
N26
N27
GPP_CLK7P
GPP_CLK7N
T29
T28
GPP_CLK8P
GPP_CLK8N
L25
14M_25M_48M_OSC
1
2
C689
27P_0402_50V8J
M23
P23
Y6
R426
1M_0603_5%
25MHZ_20PF_7A25000012
25M_CLK_X2
1
2
C688
27P_0402_50V8J
INTE#/GPIO32
INTF#/GPIO33
INTG#/GPIO34
INTH#/GPIO35
CLOCK GENERATOR
[15] CLK_SBSRC_BCLK
[15] CLK_SBSRC_BCLK#
LPCCLK0
LPCCLK1
LAD0
LAD1
LAD2
LAD3
LFRAME#
LDRQ0#
LDRQ1#/CLK_REQ6#/GPIO49
SERIRQ/GPIO48
ALLOW_LDTSTP/DMA_ACTIVE#
PROCHOT#
LDT_PG
LDT_STP#
LDT_RST#
@ R332 20M_0402_5%
@R332
1
2
L27
PCI_AD23
PCI_AD24
PCI_AD25
PCI_AD26
PCI_AD27
PCI_AD28
PCI_AD29
PLT_RST#
H24
H25
J27
J26
H29
H28
G28
J25
AA18
AB19
LPCCLK0
[23]
[21,23]
[23]
[23]
[23]
[23]
[23]
LPC_CLK0_EC
2
22_0402_5%
1
R330
LPC_CLK0_EC [23,29]
LPC_CLK1 [23]
LPC_AD0 [29]
LPC_AD1 [29]
LPC_AD2 [29]
LPC_AD3 [29]
LPC_FRAME# [29]
SERIRQ [29]
G21
H21
K19
G22
J24
ALLOW_LDTSTOP [13]
H_PROCHOT_R# [8]
H_PWRGD [8]
LDT_STOP# [8,13]
LDT_RST# [8]
32K_X2
C2
SB_32KHO
RTCCLK
INTRUDER_ALERT#
VDDBT_RTC_G
D2
B2
B1
PAD
R331
1K_0402_5%
T21
+RTCVCC
D8
OSC
NC
OSC
NC
Close to SB
1 C585
2
510_0402_5%
W=20mils
R334
C583
@
0_0603_5%
0.1U_0402_16V4Z
C584 1
1
2
BAS40-04_SOT23-3
+CHGRTC
32.768KHZ_12.5PF_Q13MC14610002
SB_32KHO
2009/10/06
Issued Date
Security Classification
18P_0402_50V8J
2010/03/12
Deciphered Date
Title
SCHEMATICS, MB A5912
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Custom
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date:
PLT_RST# [25,27]
NC7SZ08P5X_NL_SC70-5
CLKRUN# [29]
Y3
U21
Y
AJ6
AG6
AG4
AJ4
SB_32KHI
C586
SB820M_FCBGA605
R335
20M_0603_5%
PCI_AD23
PCI_AD24
PCI_AD25
PCI_AD26
PCI_AD27
PCI_AD28
PCI_AD29
1
R333
18P_0402_50V8J
C582
1
4
R328
8.2K_0402_5%
@
SB_32KHI
25M_X1
25M_X2
0.1U_0402_16V4Z
+RTCBATT
RTC
25M_CLK_X2
L26
2
@ 0_0402_5%
2
0_0402_5%
A_RST#
C1
32K_X1
25M_CLK_X1
1
R427
1
R425
0.1U_0402_16V4Z
H_PWRGD_L [43]
FDV301N_NL_SOT23-3
3
Q21
C581
1
2
1U_0402_6.3V4Z
H_PWRGD
R329
4.7K_0402_5%
+3VALW
+3VS
+1.5VS
PCIE_CALRP
PCIE_CALRN
AA1
AA4
AA3
AB1
AA5
AB2
AB6
AB5
AA6
AC2
AC3
AC4
AC1
AD1
AD2
AC6
AE2
AE1
AF8
AE3
AF1
AG1
AF2
AE9
AD9
AC11
AF6
AF4
AF3
AH2
AG2
AH3
AA8
AD5
AD8
AA10
AE8
AB9
AJ3
AE7
AC5
AF5
AE6
AE4
AE11
AH5
AH4
AC12
AD12
AJ5
AH6
AB12
AB11
AD7
T26
590_0402_1% AD29
2K_0402_1% AD28
AD0/GPIO0
AD1/GPIO1
AD2/GPIO2
AD3/GPIO3
AD4/GPIO4
AD5/GPIO5
AD6/GPIO6
AD7/GPIO7
AD8/GPIO8
AD9/GPIO9
AD10/GPIO10
AD11/GPIO11
AD12/GPIO12
AD13/GPIO13
AD14/GPIO14
AD15/GPIO15
AD16/GPIO16
AD17/GPIO17
AD18/GPIO18
AD19/GPIO19
AD20/GPIO20
AD21/GPIO21
AD22/GPIO22
AD23/GPIO23
AD24/GPIO24
AD25/GPIO25
AD26/GPIO26
AD27/GPIO27
AD28/GPIO28
AD29/GPIO29
AD30/GPIO30
AD31/GPIO31
CBE0#
CBE1#
CBE2#
CBE3#
FRAME#
DEVSEL#
IRDY#
TRDY#
PAR
STOP#
PERR#
SERR#
REQ0#
REQ1#/GPIO40
REQ2#/CLK_REQ8#/GPIO41
REQ3#/CLK_REQ5#/GPIO42
GNT0#
GNT1#/GPO44
GNT2#/GPO45
GNT3#/CLK_REQ7#/GPIO46
CLKRUN#
LOCK#
PAD
A_RX0P
A_RX0N
A_RX1P
A_RX1N
A_RX2P
A_RX2N
A_RX3P
A_RX3N
V2
[23]
[23]
[23]
[23]
AE24
AE23
AD25
AD24
AC24
AC25
AB25
AB24
PCIRST#
PCI_CLK1
PCI_CLK2
PCI_CLK3
PCI_CLK4
1
1
A_TX0P
A_TX0N
A_TX1P
A_TX1N
A_TX2P
A_TX2N
A_TX3P
A_TX3N
+1.1VS_PCIE
2
2
AD26
AD27
AC28
AC29
AB29
AB28
AB26
AB27
W2
W1
W3
W4
Y1
R326
R327
SB_RX0P_C
SB_RX0N_C
SB_RX1P_C
SB_RX1N_C
SB_RX2P_C
SB_RX2N_C
SB_RX3P_C
SB_RX3N_C
PCICLK0
PCICLK1/GPO36
PCICLK2/GPO37
PCICLK3/GPO38
PCICLK4/14M_OSC/GPO39
2
2
2
2
2
2
2
2
Part 1 of 5
PCI INTERFACE
SB_TX0P
SB_TX0N
SB_TX1P
SB_TX1N
SB_TX2P
SB_TX2N
SB_TX3P
SB_TX3N
1
1
1
1
1
1
1
1
SB800
PCIE_RST#
A_RST#
LPC
[12]
[12]
[12]
[12]
[12]
[12]
[12]
[12]
C579
C573
C574
C575
C576
C580
C577
C578
U20A
33_0402_5%
P1
1
1 33_0402_5%L1
CPU
SB_RX0P
SB_RX0N
SB_RX1P
SB_RX1N
SB_RX2P
SB_RX2N
SB_RX3P
SB_RX3N
@
2
2
R325
0.1U_0402_16V7K
0.1U_0402_16V7K
0.1U_0402_16V7K
0.1U_0402_16V7K
0.1U_0402_16V7K
0.1U_0402_16V7K
0.1U_0402_16V7K
0.1U_0402_16V7K
PCI CLKS
A_RST#
[13,14,29] A_RST#
[12]
[12]
[12]
[12]
[12]
[12]
[12]
[12]
2 150P_0402_50V8J
C572 1
Rev
C
401829
Sheet
19
of
45
+3VALW
@
R340 1
R341 1
R415 1
2 2.2K_0402_5%
SKU_ID
[8] H_THERMTRIP#
[13] NB_PWRGD
2 2.2K_0402_5%
R416 1
2 100K_0402_5%
R418 1 VB@
2 2.2K_0402_5%
EC_RSMRST#
[29] EC_RSMRST#
2 100K_0402_5%
CLK_MODE
PX_FN
VB_EN
[15] MINI1_CLKREQ#_I
[19] SB_GPIO_A_RST#
[31] SB_SPKR
[10,11,15,27] SB_SMCLK0
[10,11,15,27] SB_SMDAT0
2 2.2K_0402_5%
1 100K_0402_5%
R846 1
2 2.2K_0402_5%
R406
R847
CLK_MODE
MUXLESS_SEL
SB_GPIO_A_RST#
SKU_ID
MUXLESS_SEL
PX_FN
SB_SMCLK0
SB_SMDAT0
SB_SMCLK1
SB_SMDAT1
VB_EN
[15] LAN_CLKREQ#_I
100K_0402_5%
[29] EC_LID_OUT#
EC_LID_OUT#
T27
[31] HDA_BITCLK_AUDIO
R345 1
2 33_0402_5%
R346 1
2 33_0402_5%
[28] USB_OC#2
[28] USB_OC#1
[28] USB_OC#0
[23] HDA_SDOUT
[31] HDA_SDOUT_AUDIO
[31] HDA_SDIN0
[31] HDA_SYNC_AUDIO
[31] HDA_RST_AUDIO#
PAD
USB_OC#2
USB_OC#1
USB_OC#0
HDA_BITCLK
HDA_SDOUT
HDA_SDIN0
HDA_SDIN1
R347 1
2 33_0402_5%
HDA_SYNC
R348 1
2 33_0402_5%
HDA_RST#
GBE_COL
GBE_CRS
GBE_MDIO
+3VS
GBE_RXERR
@
1
R349
@
1
R350
@
1
R351
HDA_BITCLK
2
10K_0402_5%
HDA_SDIN0
2
10K_0402_5%
HDA_SDIN1
2
10K_0402_5%
R342 1
2 2.2K_0402_5% SB_SMCLK0
R343 1
2 2.2K_0402_5% SB_SMDAT0
R344 1
2 4.7K_0402_5%
SUS_STAT#
GBE_PHY_INTR
T28
T29
+3VALW
+3VALW
R352 1
1
R355
@
1
R357
1
R359
1
R360
1
R361
1
R362
1
R363
SB_PCIE_WAKE#
2
10K_0402_5%
EC_LID_OUT#
2
100K_0402_5%
SB_SIC
2
2.2K_0402_5%
SB_SID
2
2.2K_0402_5%
H_THERMTRIP#
2
10K_0402_5%
SB_SMCLK1
2
2.2K_0402_5%
SB_SMDAT1
2
2.2K_0402_5%
2 10K_0402_5%
R420 1
2 10K_0402_5%
R3531
2 10K_0402_5%
R428 1
R354 1
2 10K_0402_5%
GBE_COL
H9
J8
USB_FSD0P/GPIO185
USB_FSD0N
CLK_REQ4#/SATA_IS0#/GPIO64
CLK_REQ3#/SATA_IS1#/GPIO63
SMARTVOLT1/SATA_IS2#/GPIO50
CLK_REQ0#/SATA_IS3#/GPIO60
SATA_IS4#/FANOUT3/GPIO55
SATA_IS5#/FANIN3/GPIO59
SPKR/GPIO66
SCL0/GPIO43
SDA0/GPIO47
SCL1/GPIO227
SDA1/GPIO228
CLK_REQ2#/FANIN4/GPIO62
CLK_REQ1#/FANOUT4/GPIO61
IR_LED#/LLB#/GPIO184
SMARTVOLT2/SHUTDOWN#/GPIO51
DDR3_RST#/GEVENT7#
GBE_LED0/GPIO183
GBE_LED1/GEVENT9#
GBE_LED2/GEVENT10#
GBE_STAT0/GEVENT11#
CLK_REQG#/GPIO65/OSCIN
BLINK/USB_OC7#/GEVENT18#
USB_OC6#/IR_TX1/GEVENT6#
USB_OC5#/IR_TX0/GEVENT17#
USB_OC4#/IR_RX0/GEVENT16#
USB_OC3#/AC_PRES/TDO/GEVENT15#
USB_OC2#/TCK/GEVENT14#
USB_OC1#/TDI/GEVENT13#
USB_OC0#/TRST#/GEVENT12#
M3
N1
L2
M2
M1
M4
N2
P2
AZ_BITCLK
AZ_SDOUT
AZ_SDIN0/GPIO167
AZ_SDIN1/GPIO168
AZ_SDIN2/GPIO169
AZ_SDIN3/GPIO170
AZ_SYNC
AZ_RST#
GBE_COL
GBE_CRS
GBE_MDCK
GBE_MDIO
GBE_RXCLK
GBE_RXD3
GBE_RXD2
GBE_RXD1
GBE_RXD0
GBE_RXCTL/RXDV
GBE_RXERR
GBE_TXCLK
GBE_TXD3
GBE_TXD2
GBE_TXD1
GBE_TXD0
GBE_TXCTL/TXEN
GBE_PHY_PD
GBE_PHY_RST#
GBE_PHY_INTR
E23
E24
F21
G29
PS2_DAT/SDA4/GPIO187
PS2_CLK/SCL4/GPIO188
SPI_CS2#/GBE_STAT2/GPIO166
FC_RST#/GPO160
D27
F28
F29
E27
PS2KB_DAT/GPIO189
PS2KB_CLK/GPIO190
PS2M_DAT/GPIO191
PS2M_CLK/GPIO192
SB820M_FCBGA605
2
R338
OHCI4
USB20_P14
USB20_N14
USB_HSD13P
USB_HSD13N
B12
A12
USB_HSD12P
USB_HSD12N
F11
E11
USB_HSD11P
USB_HSD11N
E14
E12
USB_HSD10P
USB_HSD10N
J12
J14
USB_HSD9P
USB_HSD9N
A13
B13
USB20_P9
USB20_N9
USB_HSD8P
USB_HSD8N
D13
C13
USB20_P8
USB20_N8
USB_HSD7P
USB_HSD7N
G12
G14
USB20_P7
USB20_N7
USB_HSD6P
USB_HSD6N
G16
G18
USB20_P6
USB20_N6
USB_HSD5P
USB_HSD5N
D16
C16
USB20_P5
USB20_N5
USB_HSD4P
USB_HSD4N
B14
A14
USB_HSD3P
USB_HSD3N
E18
E16
USB_HSD2P
USB_HSD2N
J16
J18
USB20_P2
USB20_N2
USB_HSD1P
USB_HSD1N
B17
A17
USB20_P1
USB20_N1
USB_HSD0P
USB_HSD0N
A16
B16
USB20_P0
USB20_N0
SCL2/GPIO193
SDA2/GPIO194
SCL3_LV/GPIO195
SDA3_LV/GPIO196
EC_PWM0/EC_TIMER0/GPIO197
EC_PWM1/EC_TIMER1/GPIO198
EC_PWM2/EC_TIMER2/GPIO199
EC_PWM3/EC_TIMER3/GPIO200
D25
F23
B26
E26
F25
E22
F22
E21
KSI_0/GPIO201
KSI_1/GPIO202
KSI_2/GPIO203
KSI_3/GPIO204
KSI_4/GPIO205
KSI_5/GPIO206
KSI_6/GPIO207
KSI_7/GPIO208
G24
G25
E28
E29
D29
D28
C29
C28
KSO_0/GPIO209
KSO_1/GPIO210
KSO_2/GPIO211
KSO_3/GPIO212
KSO_4/GPIO213
KSO_5/GPIO214
KSO_6/GPIO215
KSO_7/GPIO216
KSO_8/GPIO217
KSO_9/GPIO218
KSO_10/GPIO219
KSO_11/GPIO220
KSO_12/GPIO221
KSO_13/GPIO222
KSO_14/GPIO223
KSO_15/GPIO224
KSO_16/GPIO225
KSO_17/GPIO226
B28
A27
B27
D26
A26
C26
A24
B25
A25
D24
B24
C24
B23
A23
D22
C22
A22
B22
RSMRST#
H3
D1
E4
D4
E8
F7
E7
F8
T1
T4
L6
L5
T9
U1
U3
T2
U2
T5
V5
P5
M5
P9
T7
P7
M7
P4
M9
V7
J10
H11
CLK_48M_USB [15]
USB_RCOMP 1
11.8K_0402_1%
USB20_P14 [28]
USB20_N14 [28]
BT
EHCI13 / OHCI3
USB20_P9 [28]
USB20_N9 [28]
WWAN
USB20_P8 [27]
USB20_N8 [27]
Mini1-WLAN
USB20_P7 [28]
USB20_N7 [28]
USB20_P6 [28]
USB20_N6 [28]
CardReader
USB20_P5 [16]
USB20_N5 [16]
Camera
USB20_P2 [28]
USB20_N2 [28]
Ext USB3
USB20_P1 [28]
USB20_N1 [28]
Ext USB2
USB20_P0 [28]
USB20_N0 [28]
Ext USB1
EHCI2 / OHCI2
Port7 and Port9 is disable for
2009 AMD platform
EHCI1 / OHCI1
<Wake Up support>
Check SW:
Cinfigure to output or Internal PU/PD
SB_SIC [8]
SB_SID [8]
GPIO199 [23]
GPIO200 [23]
STRAP PIN
GBE_CRS
2 10K_0402_5%
@
2 10K_0402_5%
R430 1
2 10K_0402_5%
R358 1
2 10K_0402_5%
R431 1
2 10K_0402_5%
GBE_RXERR
2009/10/06
Issued Date
Security Classification
GBE_PHY_INTR
2010/03/12
Deciphered Date
Title
SCHEMATICS, MB A5912
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Custom
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date:
2 100P_0402_25V8K
2 10K_0402_5%
R429 1
R356 1
GBE_MDIO
PAD
PAD
G1
AD19
AA16
AB21
AC18
AF20
AE19
AF19
AD22
AE22
F5
F4
AH21
AB18
E1
AJ21
H4
D5
D7
G5
K3
AA20
USB_FSD1P/GPIO186
USB_FSD1N
USB 2.0
[25,27] SB_PCIE_WAKE#
+3VS
EC_RSMRST#
2
2.2K_0402_5%
G19
GPIO
[29] EC_GA20
[29] EC_KBRST#
[29] EC_SCI#
[29] EC_SMI#
SB800
A10
USB_RCOMP
EMBEDDED CTRL
2N7002_SOT23
PM_SLP_S3#
PM_SLP_S5#
PBTN_OUT#
SB_PWRGD
SUS_STAT#
USBCLK/14M_25M_48M_OSC
EMBEDDED CTRL
1
R339
[29]
[29]
[29]
[8,13,29]
[13]
PCI_PME#/GEVENT4#
RI#/GEVENT22#
SPI_CS3#/GBE_STAT1/GEVENT21#
SLP_S3#
SLP_S5#
PWR_BTN#
PWR_GOOD
SUS_STAT#
Part 4 of 5
TEST0
TEST1/TMS
TEST2
GA20IN/GEVENT0#
KBRST#/GEVENT1#
LPC_PME#/GEVENT3#
LPC_SMI#/GEVENT23#
GEVENT5#
SYS_RESET#/GEVENT19#
WAKE#/GEVENT8#
IR_RX1/GEVENT20#
THRMTRIP#/SMBALERT#/GEVENT2#
NB_PWRGD
USB OC
CRT_DET
HD AUDIO
1
3
J2
K1
D3
F1
H1
F2
H5
SUS_STAT#
G6
B3
T24
PAD
C4
T22
PAD
F6
T23
PAD
AD21
AE21
K2
J29
H2
J1
H6
F3
H_THERMTRIP#
J6
NB_PWRGD
AC19
[29] EC_SWI#
Q22
@
C587 1
2
100_0402_5%
U20D
CRT_DET
D
2
G
[18] CRT_DET#
1
R337
GBE LAN
R336
100K_0402_5%
Rev
C
401829
Sheet
20
of
45
U20B
[24] SATA_DTX_C_SRX_N0
[24] SATA_DTX_C_SRX_P0
AJ8
AH8
SATA_RX0N
SATA_RX0P
AH10
AJ10
SATA_TX1P
SATA_TX1N
AG10
AF10
SATA_RX1N
SATA_RX1P
AG12
AF12
SATA_TX2P
SATA_TX2N
AJ12
AH12
SATA_RX2N
SATA_RX2P
AH14
AJ14
SATA_TX3P
SATA_TX3N
AG14
AF14
SATA_RX3N
SATA_RX3P
AG17
AF17
SATA_TX4P
SATA_TX4N
AJ17
AH17
SATA_RX4N
SATA_RX4P
AJ18
AH18
SATA_TX5P
SATA_TX5N
AH19
AJ19
SATA_RX5N
SATA_RX5P
[24] SATA_STX_DRX_P1
[24] SATA_STX_DRX_N1
ODD
[24] SATA_DTX_C_SRX_N1
[24] SATA_DTX_C_SRX_P1
+1.1VS_SATA
R364
2
2
R365
1K_0402_1%
SATA_CALRP
1
SATA_CALRN
1
931_0402_1%
[30] SATA_LED#
+3VS
R367 1
SATA_X2
SATA_ACT#/GPIO67
AC16
FC_OE#/GPIOD145
FC_AVD#/GPIOD146
FC_WE#/GPIOD148
FC_CE1#/GPIOD149
FC_CE2#/GPIOD150
FC_INT1/GPIOD144
FC_INT2/GPIOD147
AF28
AG29
AG26
AF27
AE29
AF29
AH27
FC_ADQ0/GPIOD128
FC_ADQ1/GPIOD129
FC_ADQ2/GPIOD130
FC_ADQ3/GPIOD131
FC_ADQ4/GPIOD132
FC_ADQ5/GPIOD133
FC_ADQ6/GPIOD134
FC_ADQ7/GPIOD135
FC_ADQ8/GPIOD136
FC_ADQ9/GPIOD137
FC_ADQ10/GPIOD138
FC_ADQ11/GPIOD139
FC_ADQ12/GPIOD140
FC_ADQ13/GPIOD141
FC_ADQ14/GPIOD142
FC_ADQ15/GPIOD143
AJ27
AJ26
AH25
AH24
AG23
AH23
AJ22
AG21
AF21
AH22
AJ23
AF23
AJ24
AJ25
AG25
AH26
SATA_X1
SATA_X2
SPI_DI/GPIO164
SPI_DO/GPIO163
SPI_CLK/GPIO162
SPI_CS1#/GPIO165
ROM_RST#/GPIO161
FANOUT0/GPIO52
FANOUT1/GPIO53
FANOUT2/GPIO54
W5
W6
Y9
FANIN0/GPIO56
FANIN1/GPIO57
FANIN2/GPIO58
W7
V9
W8
TEMPIN0/GPIO171
TEMPIN1/GPIO172
TEMPIN2/GPIO173
TEMPIN3/TALERT#/GPIO174
TEMP_COMM
B6
A6
A5
B5
C7
VIN0/GPIO175
VIN1/GPIO176
VIN2/GPIO177
VIN3/GPIO178
VIN4/GPIO179
VIN5/GPIO180
VIN6/GBE_STAT3/GPIO181
VIN7/GBE_LED3/GPIO182
A3
B4
A4
C5
A7
B7
B8
A8
NC1
NC2
@R366
@
R366
1
2
0_0402_5%
EC_THERM# [29]
Check SW:
Cinfigure to output or Internal PU/PD
MEM_1V5
G27
Y2
SB820 A12(SA00003IW10)
AD11
AD16
AH28
AG28
AF26
SB820M_FCBGA605
@
Y4
R368
25MHZ_20PF_7A25000012 10M_0402_5%
1
2
C589
27P_0402_50V8J
SATA_CALRP
SATA_CALRN
J5
E2
K4
K9
G2
SATA_X1
1
1
2
C588
27P_0402_50V8J
AB14
AA14
2 10K_0402_5%
SATA_X1
FC_CLK
FC_FBCLKOUT
FC_FBCLKIN
Part 2 of 5
FLASH
SATA_TX0P
SATA_TX0N
SERIAL ATA
AH9
AJ9
HW MONITOR
HDD
SB800
[24] SATA_STX_DRX_P0
[24] SATA_STX_DRX_N0
SPI ROM
SATA_X2
C685
2
2
0_0402_5%
1 @
R423
PCI_AD24
1 : VDDR=1.05V
0 : VDDR=0.9V
U22
Y
1
R422
MEM_1V5
[19,23] PCI_AD24
0.1U_0402_16V4Z
1
R424
2
33_0402_5%
VDDR_SW [40]
2
NC7SZ08P5X_NL_SC70-5
2
0_0402_5%
C686
150P_0402_50V8J
2009/10/06
Issued Date
Security Classification
2010/03/12
Deciphered Date
Title
SCHEMATICS, MB A5912
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Custom
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date:
Rev
C
401829
Sheet
21
of
45
U20E
+1.1VS_VDDC
510mA
1
R369
U20C
71mA
AF22
AE25
AF24
AC22
2
0_0402_5%
VDDIO_18_FC_1
VDDIO_18_FC_2
VDDIO_18_FC_3
VDDIO_18_FC_4
POWER
43mA
AE28
+VDDPL_3V_PCIE
+1.1VS_PCIE
L70
2
1
FBMA-L11-201209-221LMA30T_0805
+1.1VS
C604
C605
C606
C607
1
1
1
1
2
2
2
2
600mA
+VDDPL_3V_SATA
+1.1VS
1
1
1
1
1
2
2
2
2
2
VDDAN_11_PCIE_1
VDDAN_11_PCIE_2
VDDAN_11_PCIE_3
VDDAN_11_PCIE_4
VDDAN_11_PCIE_5
VDDAN_11_PCIE_6
VDDAN_11_PCIE_7
VDDAN_11_PCIE_8
22U_0805_6.3V6M
1U_0402_6.3V4Z
1U_0402_6.3V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
AD14
VDDPL_33_SATA
AJ20
AF18
AH20
AG19
AE18
AD18
AE16
VDDAN_11_SATA_1
VDDAN_11_SATA_4
VDDAN_11_SATA_2
VDDAN_11_SATA_3
VDDAN_11_SATA_5
VDDAN_11_SATA_6
VDDAN_11_SATA_7
10U_0805_10V4Z
10U_0805_10V4Z
1U_0402_6.3V4Z
1U_0402_6.3V4Z
0.1U_0402_16V4Z
+1.1V_USB
L74
2
1
FBMA-L11-160808-221LMT 0603
+1.1VALW
C625 2
C626 2
VDDAN_33_USB_S_1
VDDAN_33_USB_S_2
VDDAN_33_USB_S_3
VDDAN_33_USB_S_4
VDDAN_33_USB_S_5
VDDAN_33_USB_S_6
VDDAN_33_USB_S_7
VDDAN_33_USB_S_8
VDDAN_33_USB_S_9
VDDAN_33_USB_S_10
VDDAN_33_USB_S_11
VDDAN_33_USB_S_12
200mA
C11
D11
CORE S0
1
2
2
2
2
22U_0805_6.3V6M
1U_0402_6.3V4Z
1U_0402_6.3V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
V1
M10
C590
1
1
1
1
C596
C594
C597
C598
L69
2
1
FBMA-L11-201209-221LMA30T_0805
1
R372
1
R373
2
0_0402_5%
2
0_0402_5%
L7
L9
1
R374
2
0_0402_5%
VDDIO_GBE_S_1
VDDIO_GBE_S_2
M6
P8
1
R375
2
0_0402_5%
VDDAN_11_USB_S_1
VDDAN_11_USB_S_2
VDDIO_33_S_1
VDDIO_33_S_2
VDDIO_33_S_3
VDDIO_33_S_4
VDDIO_33_S_5
VDDIO_33_S_6
VDDIO_33_S_7
VDDIO_33_S_8
A21
D21
B21
K10
L10
J9
T6
T8
VDDCR_11_S_1
VDDCR_11_S_2
F26
G26
VDDIO_AZ_S
M8
VDDCR_11_USB_S_1
VDDCR_11_USB_S_2
A11
B11
VDDPL_33_SYS
M21
VDDPL_11_SYS_S
L22
VDDPL_33_USB_S
F19
VDDAN_33_HWM_S
VDDXL_33_S
1 2.2U_0603_6.3V4Z
1 0.1U_0402_16V4Z
+1.1VS_CKVDD
400mA
VDDCR_11_GBE_S_1
VDDCR_11_GBE_S_2
CORE S5
2
2
2
2
2
A18
A19
A20
B18
B19
B20
C18
C20
D18
D19
D20
E19
PLL
1
1
1
1
1
658mA
USB I/O
+AVDD_USB
L72
2
1
FBMA-L11-201209-221LMA30T_0805
C617
C618
C619
C620
C621
K28
K29
J28
K26
J21
J20
K21
J22
10U_0805_10V4Z
+1.1VS
1
2
2
2
2
+1.1VS
C595
1
1
1
1
C600
C601
C602
C603
D6
L20
32mA
2.2U_0603_6.3V4Z
2.2U_0603_6.3V4Z
1
1
2
2
C608
C609
+1.1VALW
C615 2
C616 2
113mA
1 1U_0402_6.3V4Z
1 1U_0402_6.3V4Z
TBD
+VDDIO_AZ
2
1
L73 FBMA-L11-160808-221LMT 0603
C622
1
2 10U_0805_10V4Z
47mA
62mA
17mA
+VDDPL_3V
C623
C624
+VDDPL_11V
2
2
1 0.1U_0402_16V4Z
1 0.1U_0402_16V4Z
+VDDPL_3V_USB
5mA
197mA
+3V_HWM
SB800
VSSIO_SATA_1
VSSIO_SATA_2
VSSIO_SATA_3
VSSIO_SATA_4
VSSIO_SATA_5
VSSIO_SATA_6
VSSIO_SATA_7
VSSIO_SATA_8
VSSIO_SATA_9
VSSIO_SATA_10
VSSIO_SATA_11
VSSIO_SATA_12
VSSIO_SATA_13
VSSIO_SATA_14
VSSIO_SATA_15
VSSIO_SATA_16
VSSIO_SATA_17
VSSIO_SATA_18
VSSIO_SATA_19
VSSIO_USB_1
VSSIO_USB_2
VSSIO_USB_3
VSSIO_USB_4
VSSIO_USB_5
VSSIO_USB_6
VSSIO_USB_7
VSSIO_USB_8
VSSIO_USB_9
VSSIO_USB_10
VSSIO_USB_11
VSSIO_USB_12
VSSIO_USB_13
VSSIO_USB_14
VSSIO_USB_15
VSSIO_USB_16
VSSIO_USB_17
VSSIO_USB_18
VSSIO_USB_19
VSSIO_USB_20
VSSIO_USB_21
VSSIO_USB_22
VSSIO_USB_23
VSSIO_USB_24
VSSIO_USB_25
VSSIO_USB_26
VSSIO_USB_27
VSSIO_USB_28
Y4
EFUSE
D8
VSSAN_HWM
VSS_1
VSS_2
VSS_3
VSS_4
VSS_5
VSS_6
VSS_7
VSS_8
VSS_9
VSS_10
VSS_11
VSS_12
VSS_13
VSS_14
VSS_15
VSS_16
VSS_17
VSS_18
VSS_19
VSS_20
VSS_21
VSS_22
VSS_23
VSS_24
VSS_25
VSS_26
VSS_27
VSS_28
VSS_29
VSS_30
VSS_31
VSS_32
VSS_33
VSS_34
VSS_35
VSS_36
VSS_37
VSS_38
VSS_39
VSS_40
VSS_41
VSS_42
VSS_43
VSS_44
VSS_45
VSS_46
VSS_47
VSS_48
VSS_49
VSS_50
VSS_51
VSS_52
M19
VSSXL
P21
P20
M22
M24
M26
P22
P24
P26
T20
T22
T24
V20
J23
VSSIO_PCIECLK_1
VSSIO_PCIECLK_2
VSSIO_PCIECLK_3
VSSIO_PCIECLK_4
VSSIO_PCIECLK_5
VSSIO_PCIECLK_6
VSSIO_PCIECLK_7
VSSIO_PCIECLK_8
VSSIO_PCIECLK_9
VSSIO_PCIECLK_10
VSSIO_PCIECLK_11
VSSIO_PCIECLK_12
VSSIO_PCIECLK_13
VSSPL_SYS
AJ2
A28
A2
E5
D23
E25
E6
F24
N15
R13
R17
T10
P10
V11
U15
M18
V19
M11
L12
L18
J7
P3
V4
AD6
AD4
AB7
AC9
V8
W9
W10
AJ28
B29
U4
Y18
Y10
Y12
Y11
AA11
AA12
G4
J4
G8
G9
M12
AF25
H7
AH29
V10
P6
N4
L4
L8
M20
+1.1VALW
+VDDCR_USB
197mA
Y14
Y16
AB16
AC14
AE12
AE14
AF9
AF11
AF13
AF16
AG8
AH7
AH11
AH13
AH16
AJ7
AJ11
AJ13
AJ16
A9
B10
K11
B9
D10
D12
D14
D17
E9
F9
F12
F14
F16
C9
G11
F18
D9
H12
H14
H16
H18
J11
J19
K12
K14
K16
K18
H19
+3VALW
+3VALW
VDDAN_11_CLK_1
VDDAN_11_CLK_2
VDDAN_11_CLK_3
VDDAN_11_CLK_4
VDDAN_11_CLK_5
VDDAN_11_CLK_6
VDDAN_11_CLK_7
VDDAN_11_CLK_8
2
0_0805_5%
1U_0402_6.3V4Z
1U_0402_6.3V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
93mA
+1.1VS_SATA
L71
2
1
FBMA-L11-201209-221LMA30T_0805
567mA
C610
C611
C612
C613
C614
N13
R15
N17
U13
U17
V12
V18
W12
W18
VDDIO_33_GBE_S
VDDPL_33_PCIE
U26
V22
V26
V27
V28
V29
W22
W26
22U_0805_6.3V6M
1U_0402_6.3V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
VDDCR_11_1
VDDCR_11_2
VDDCR_11_3
VDDCR_11_4
VDDCR_11_5
VDDCR_11_6
VDDCR_11_7
VDDCR_11_8
VDDCR_11_9
VDDRF_GBE_S
3.3V_S5 I/O
1
R371
PCI/GPIO I/O
22U_0805_6.3V6M
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
CLKGEN I/O
2
2
2
GBE LAN
1
1
1
FLASH I/O
VDDIO_33_PCIGP_1
VDDIO_33_PCIGP_2
VDDIO_33_PCIGP_3
VDDIO_33_PCIGP_4
VDDIO_33_PCIGP_5
VDDIO_33_PCIGP_6
VDDIO_33_PCIGP_7
VDDIO_33_PCIGP_8
VDDIO_33_PCIGP_9
VDDIO_33_PCIGP_10
VDDIO_33_PCIGP_11
VDDIO_33_PCIGP_12
SERIAL ATA
C591
C592
C593
C599
Part 3 of 5
SB800
AH1
V6
Y19
AE5
AC21
AA2
AB4
AC8
AA7
AA9
AF7
AA19
PCI EXPRESS
131mA
+3VS
GROUND
+3VALW
+VDDLX_3V
2
1
L75 FBMA-L11-160808-221LMT 0603
C627 1
2 2.2U_0603_6.3V4Z
SB820M_FCBGA605
VSSIO_PCIECLK_14
VSSIO_PCIECLK_15
VSSIO_PCIECLK_16
VSSIO_PCIECLK_17
VSSIO_PCIECLK_18
VSSIO_PCIECLK_19
VSSIO_PCIECLK_20
VSSIO_PCIECLK_21
VSSIO_PCIECLK_22
VSSIO_PCIECLK_23
VSSIO_PCIECLK_24
VSSIO_PCIECLK_25
VSSIO_PCIECLK_26
VSSIO_PCIECLK_27
H23
H26
AA21
AA23
AB23
AD23
AA26
AC26
Y20
W21
W20
AE26
L21
K20
Part 5 of 5
SB820M_FCBGA605
+VDDPL_11V
+VDDPL_3V_PCIE
+3VS
+VDDPL_3V
+VDDPL_3V_USB
L76
2
1
FBMA-L11-160808-221LMT 0603
L80
2
1
FBMA-L11-160808-221LMT 0603
+1.1VALW
0.1U_0402_16V4Z
2
1
FBMA-L11-160808-221LMT 0603
1
C634
2.2U_0603_6.3V4Z
+VDDPL_3V_SATA
+3VS
+3V_HWM
+3VALW
R414 0_0603_5%
2
1
1
C628
+3VALW
+3VS
L79
C635
2.2U_0603_6.3V4Z
+VDDIO_AZ
C630
C629
2.2U_0603_6.3V4Z
0.1U_0402_16V4Z
AMD
L78
2
1
FBMA-L11-160808-221LMT 0603
C632
C631
2.2U_0603_6.3V4Z
0.1U_0402_16V4Z
C633
2.2U_0603_6.3V4Z
+3VALW
L81
4
2
1
FBMA-L11-160808-221LMT 0603
C636
0.1U_0402_16V4Z
1
R376
0_0402_5%
1
C637
2.2U_0603_6.3V4Z
C638
2.2U_0603_6.3V4Z
For 3V AZ device
2009/10/06
Issued Date
Security Classification
2010/03/12
Deciphered Date
Title
SCHEMATICS, MB A5912
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Custom
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date:
Rev
C
401829
Sheet
22
of
45
REQUIRED STRAPS
USE
DEBUG
STRAP
Performance
MODE
PULL
LOW
FORCE PCIE
GEN1
DEFAULT
WATCHDOG
TIMER
DISABLE
IGNORE
DEBUG
STRAP
PCI_CLK4
Inter CLK
Gen Mode
+3VS
+3VS
R380
10K_0402_5%
2
1
+3VS
R379
10K_0402_5%
2
1
+3VS
R378
10K_0402_5%
2
1
DEFAULT
GPIO200
CLOCKGEN
ENABLE
GPIO199
H,H = Reserved
EC
DISABLE
CLOCKGEN
DISABLE
Disable
DEFAULT
LCP_CLK1
EC
ENABLE
Inter CLK
Gen Mode
DEFAULT
LPC_CLK0
Enable
DEFAULT
R377
10K_0402_5%
2
1
+VDDIO_AZ
INT@
DEFAULT
+3VALW
DEFAULT
+3VALW
+3VALW
INT@
+3VALW
R385
2.2K_0402_5%
2
1
PCI_CLK3
R384
10K_0402_5%
2
1
PCI_CLK2
R383
10K_0402_5%
2
1
PCI_CLK1
R382
10K_0402_5%
2
1
AZ_SDOUT
PULL
HIGH
R381
10K_0402_5%
2
1
[20] HDA_SDOUT
[19] PCI_CLK1
[19] PCI_CLK2
[19] PCI_CLK3
[19] PCI_CLK4
[19,29] LPC_CLK0_EC
[19] LPC_CLK1
[20] GPIO200
[20] GPIO199
+3VS
R395
10K_0402_5%
2
1
DEBUG STRAPS
SB800 HAS 15K INTERNAL PU FOR PCI_AD[27:23]
USE PCI
PLL
DISABLE ILA
AUTORUN
USE FC PLL
USE DEFAULT
PCIE STRAPS
DISABLE PCI
MEM BOOT
DEFAULT
PULL
LOW
BYPASS
PCI PLL
PCI_AD23
DEFAULT
DEFAULT
DEFAULT
DEFAULT
ENABLE ILA
AUTORUN
BYPASS
FC PLL
USE EEPROM
PCIE STRAPS
ENABLE PCI
MEM BOOT
[19]
[19]
[19]
[19]
[19]
[19,21]
[19]
R394
2.2K_0402_5%
2
1
PCI_AD29
PCI_AD28
PCI_AD27
PCI_AD26
PCI_AD25
PCI_AD24
PCI_AD23
check default
R401
2.2K_0402_5%
2
1
PCI_AD24
R400
2.2K_0402_5%
2
1
PCI_AD25
R399
2.2K_0402_5%
2
1
PCI_AD26
R398
2.2K_0402_5%
2
1
PULL
HIGH
PCI_AD27
+3VS
R397
2.2K_0402_5%
2
1
R393
2.2K_0402_5%
2
1
EXT@
R396
10K_0402_5%
2
1
EXT@
R392
10K_0402_5%
2
1
R391
10K_0402_5%
2
1
R390
10K_0402_5%
2
1
R389
10K_0402_5%
2
1
R388
10K_0402_5%
2
1
R387
10K_0402_5%
2
1
R386
10K_0402_5%
2
1
2009/10/06
Issued Date
Security Classification
2010/03/12
Deciphered Date
Title
SCHEMATICS, MB A5912
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Custom
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date:
Rev
C
401829
Sheet
23
of
45
JHDD1
[21] SATA_STX_DRX_P0
[21] SATA_STX_DRX_N0
[21] SATA_DTX_C_SRX_N0
[21] SATA_DTX_C_SRX_P0
C656 1
C658 1
2 0.01U_0402_16V7K
2 0.01U_0402_16V7K
SATA_STX_C_DRX_P0
SATA_STX_C_DRX_N0
C657 1
C659 1
2 0.01U_0402_16V7K
2 0.01U_0402_16V7K
SATA_DTX_SRX_N0
SATA_DTX_SRX_P0
1
2
3
4
5
6
7
GND
A+
AGND
BB+
GND
+3VS
1
+5VS
R405 1
+3VS
C639
0.1U_0402_16V4Z
+5VS_HDD
2 0_0805_5%
10U_0805_10V4Z
1
C660
C661
0.1U_0402_16V4Z
1
C662
C663
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
GND
GND
24
23
SANTA_192301-1
CONN@
1U_0402_6.3V4Z
V33
V33
V33
GND
GND
GND
V5
V5
V5
GND
Reserved
GND
V12
V12
V12
1000P_0402_50V7K
<NAV70 use>
[21] SATA_STX_DRX_P1
[21] SATA_STX_DRX_N1
C648 1
C649 1
2 0.01U_0402_16V7K
2 0.01U_0402_16V7K
SATA_STX_C_DRX_P1
SATA_STX_C_DRX_N1
[21] SATA_DTX_C_SRX_N1
[21] SATA_DTX_C_SRX_P1
C650 1
C651 1
2 0.01U_0402_16V7K
2 0.01U_0402_16V7K
SATA_DTX_SRX_N1
SATA_DTX_SRX_P1
R403 1
R404 1
+5VS
2 0_0805_5%
10U_0805_10V4Z
C652
2 1K_0402_1%
+5VS_ODD
1
2
3
4
5
6
7
GND
A+
AGND
BB+
GND
8
9
10
11
12
13
DP
+5V
+5V
MD
GND
GND
GND
GND
NC
NC
0.1U_0402_16V4Z
C653
C654
1U_0402_6.3V4Z
C655
17
16
15
14
OCTEK_SLS-13SB1G_RV
CONN@
2
1000P_0402_50V7K
Issued Date
Security Classification
2009/10/06
2010/03/12
Deciphered Date
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
B
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
SCHEMATICS, MB A5912
Document Number
Date:
Rev
C
401829
Wednesday, June 30, 2010
G
Sheet
24
H
of
45
+3V_LAN
+3VALW
R800
60mil
0_1206_5%
2
C902
C901
4.7U_0805_10V4Z
U70
+3V_LAN
2
0.1U_0402_16V4Z
+LAN_BIASVDDH
42
VDDC
BIASVDDH
25
6
15
41
VDDC
VDDC
VDDC
XTALVDDH
14
AVDDH
30
AVDDH
36
TRD3_N
37
LAN_MIDI3-
TRD3_P
38
LAN_MIDI3+
TRD2_N
35
LAN_MIDI2-
TRD2_P
34
LAN_MIDI2+
TRD1_N
31
LAN_MIDI1-
TRD1_P
32
LAN_MIDI1+
TRD0_N
29
LAN_MIDI0-
TRD0_P
28
LAN_MIDI0+
LINKLED#
48
SPD100LED#
47
2
0.1U_0402_16V4Z
+LAN_AVDDL
+LAN_GPHYPLLVDDL
24
AVDDL
AVDDL
AVDDL
LAN_MIDI3- [26]
LAN_MIDI3+ [26]
LAN_MIDI2- [26]
SPROM_CLK
(EECLK)
SPROM_DOUT
(EEDATA)
On chip
AT24C02
+3V_LAN
LAN_MIDI2+ [26]
C906 1
GPHY_PLLVDDL
18
PCIE_PLLVDDL
21
PCIE_PLLVDDL
LAN_MIDI1- [26]
LAN_MIDI0- [26]
LAN_MIDI0+ [26]
C9071
C9081
PCIE_PTX_C_IRX_P0
PCIE_PTX_C_IRX_N0
PCIE_ITX_C_PRX_P0
PCIE_ITX_C_PRX_N0
[20,27] SB_PCIE_WAKE#
[29] EC_PME#
+3V_LAN
R806 1
R807 1
R808 1
2 0.1U_0402_16V7K PCIE_PTX_IRX_P0 17
2 0.1U_0402_16V7K PCIE_PTX_IRX_N0 16
22
23
LAN_PME#
4
LAN_RESET# 2
20
@
2 0_0402_5%
19
2 0_0402_5%
2 4.7K_0402_5%
R809 1
[19,27] PLT_RST#
PCIE_TXD_P
PCIE_TXD_N
PCIE_RXD_P
PCIE_RXD_N
WAKE#
REST#
PCIE_REFCLK_P
PCIE_REFCLK_N
SPD1000LED#
46
TRAFFICLED#
45
2
R805
0_0402_5%
U71 @
8
7
6
5
R812
1K_0402_1%
@
LAN_ACTIVITY# [26]
20mil
+LAN_XTALVDDH 1
C909
+3VS
R810 1
2 1K_0402_5%
40
R813 1
2 10K_0402_5%
SPROM_DOUT
EECLK
44
SPROM_CLK
VMAIN_PRSINT
SR_LX
T12 PAD
T13 PAD
LAN_XTALO_R
LAN_XTALI
13
XTALO
12
XTALI
SR_VFB
11
+1.2V_LAN_OUT
1
2
4.7UH_PG031B-4R7MS_1.1A_20%
+1.2V_LAN
C913
0.1U_0402_16V4Z
26
RDAC
SR_VDDP
1.24K_0402_1%
0.1U_0402_16V4Z
2
NC
0.1U_0402_16V4Z
20mil
+LAN_GPHYPLLVDDL
1
2
C919
0.1U_0402_16V4Z
49
BCM57780A0KMLG_QFN48_7X7
L104
1
2
BLM18AG601SN1D_2P
+1.2V_LAN
C916
4.7U_0805_10V4Z
C918
2
2
4.7U_0603_6.3V6K 0.1U_0402_16V4Z
CLKREQ#
0.1U_0402_16V4Z
+LAN_PCIEPLLVDD
1
C915
PAD
[15] LAN_CLKREQ#
C917
20mil
+3V_LAN
1
L102
1
2
BLM18AG601SN1D_2P
C914
10U_0805_10V4Z
10
SR_VDD
0.1U_0402_16V4Z
+LAN_AVDDH
1
1
C911
C912
R814
LAN_RDAC
20mil
LOW_PWR
+3V_LAN
L101
1
2
BLM18AG601SN1D_2P
+LAN_BIASVDDH 1
C910
L103
L100
1
2
BLM18AG601SN1D_2P
0.1U_0402_16V4Z
20mil
43
1
2
3
4
AT24C02_SO8
R811
1K_0402_1%
[15] CLK_PCIE_LAN
[15] CLK_PCIE_LAN#
EEDATA
A0
A1
NC
GND
LAN_LINK# [26]
2 0_0402_5%
MODE
VCC
WP
SCL
SDA
[12]
[12]
[12]
[12]
2
R801
0_0402_5%
R803
1K_0402_1%
SPROM_CLK
SPROM_DOUT
2 0.1U_0402_16V4Z
@
R802
1K_0402_1%
@
LAN_MIDI1+ [26]
+LAN_PCIEPLLVDD
27
33
39
+LAN_AVDDH
2
2
0.1U_0402_16V4Z
+LAN_XTALVDDH
C903
0.1U_0402_16V4Z
1
1
C904
C905
4.7U_0805_10V4Z
C900
+1.2V_LAN
20mil
+LAN_AVDDL
1
C921
LAN_XTALI
0.1U_0402_16V4Z
L105
1
2
BLM18AG601SN1D_2P
+1.2V_LAN
C920
4.7U_0805_10V4Z
L106
1
2
BLM18AG601SN1D_2P
+1.2V_LAN
C922
4.7U_0805_10V4Z
LAN_XTALO_R
R815
200_0402_1%
Y5
C923
33P_0402_50V8K
2 LAN_XTALO
25MHZ_20PF_7A25000012
Issued Date
Security Classification
C924
33P_0402_50V8K
2009/10/06
Deciphered Date
2010/03/12
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Custom
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date:
SCHEMATICS, MB A5912
Rev
C
401829
Sheet
25
of
45
LAN Connector
BH GS5009-D <SP050006B00>
JRJ45
T25
[25] LAN_ACTIVITY#
[25] LAN_MIDI0+
[25] LAN_MIDI0-
LAN_MIDI0+
LAN_MIDI0-
1
2
3
TCT1
TD1+
TD1-
MCT1
MX1+
MX1-
24
23
22
RJ45_MIDI0+
RJ45_MIDI0-
[25] LAN_MIDI1+
[25] LAN_MIDI1-
LAN_MIDI1+
LAN_MIDI1-
4
5
6
TCT2
TD2+
TD2-
MCT2
MX2+
MX2-
21
20
19
RJ45_MIDI1+
RJ45_MIDI1-
[25] LAN_MIDI2+
[25] LAN_MIDI2-
LAN_MIDI2+
LAN_MIDI2-
7
8
9
TCT3
TD3+
TD3-
MCT3
MX3+
MX3-
18
17
16
RJ45_MIDI2+
RJ45_MIDI2-
[25] LAN_MIDI3+
[25] LAN_MIDI3-
LAN_MIDI3+
LAN_MIDI3-
10
11
12
TCT4
TD4+
TD4-
MCT4
MX4+
MX4-
15
14
13
RJ45_MIDI3+
RJ45_MIDI3-
2
R823
1
C938
+3V_LAN
1
1K_0402_5%
2
220P_0402_50V7K
12
Yellow LED-
11
Yellow LED+
RJ45_MIDI3-
PR4-
RJ45_MIDI3+
PR4+
RJ45_MIDI1-
PR2-
RJ45_MIDI2-
PR3-
RJ45_MIDI2+
PR3+
RJ45_MIDI1+
PR2+
RJ45_MIDI0-
PR1-
RJ45_MIDI0+
0.1U_0402_16V4Z
2
2
R819
75_0402_1%
C931
0.1U_0402_16V4Z
2
R821
75_0402_1%
0.1U_0402_16V4Z
2
R824
1
C942
+3V_LAN
1
1K_0402_5%
2
220P_0402_50V7K
Green LED-
R412
0_0805_5%
@
Green LED+
SANTA_130451-K
CONN@
R822
75_0402_1%
RJ45_GND
RJ45_GND
2
R820
75_0402_1%
0.1U_0402_16V4Z
C930
C929
C928
PR1+
10
[25] LAN_LINK#
@
0_0805_5%
1
350UH_IH-037-2
R413
2
13
14
SHLD2
SHLD1
LANGND
2
C940
1000P_1206_2KV7K
40mil
1
C941
0.1U_0402_16V4Z
LAN_ACTIVITY#
LAN_LINK#
40mil
C939
4.7U_0805_10V4Z
D40
PJDLC05_SOT23-3
@
LAN_ACTIVITY#
1
C943
2
220P_0402_50V7K
LAN_LINK#
1
C944
2
220P_0402_50V7K
B
Security Classification
2009/10/06
Issued Date
Deciphered Date
2010/03/12
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
B
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date:
SCHEMATICS, MB A5912
Document Number
Rev
C
401829
Wednesday, June 30, 2010
Sheet
1
26
of
45
+1.5VS
C705
4.7U_0805_10V4Z
C706
0.1U_0402_16V4Z
C707
0.1U_0402_16V4Z
C708
4.7U_0805_10V4Z
C709
0.1U_0402_16V4Z
C710
0.1U_0402_16V4Z
JMINI1
SB_PCIE_WAKE#
[20,25] SB_PCIE_WAKE#
R440 1
2 0_0402_5%
[15] MINI1_CLKREQ#
[15] CLK_PCIE_MINI1#
[15] CLK_PCIE_MINI1
[12] PCIE_PTX_C_IRX_N1
[12] PCIE_PTX_C_IRX_P1
[12] PCIE_ITX_C_PRX_N1
[12] PCIE_ITX_C_PRX_P1
+3VS
R445 1
0_0402_5%
2
E51TXD_P80DATA_R
E51RXD_P80CLK
1
3
5
7
9
11
13
15
2
4
6
8
10
12
14
16
2
4
6
8
10
12
14
16
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
+3VS
+1.5VS
WL_OFF#
PLT_RST#
+3V_WLAN
1
R441 1
R442
@
@
MINI1_SMBCLK
1
MINI1_SMBDAT R443
@
1
R444
2
2 0_0603_5%
0_0603_5%
2
0_0603_5%
2
0_0603_5%
WL_OFF# [29]
PLT_RST# [19,25]
+3VS
+3VALW
Peak
Normal
+3VS
1000
750
Normal
+3V
330
250
+1.5VS
500
375
SB_SMDAT0 [10,11,15,20]
SB_SMCLK0 [10,11,15,20]
USB20_N8 [20]
USB20_P8 [20]
WIMAX_LED#
WLAN_LED#_L
(MINI1_LED#)
R492
100K_0402_5%
@
53
54
55
56
G1
G2
G3
G3
[29] E51TXD_P80DATA
[29] E51RXD_P80CLK
1
3
5
7
9
11
13
15
ACES_88910-5204
CONN@
<NAV70 use>
Height : 4mm
+3VS
1
0_0402_5%
2
R848
100K_0402_5%
2
+3VS
3
WIMAX_LED#
@
1
R836
2
10K_0402_5%
WLAN_LED#_L
2
1
MINI1_LED# [29]
3
CHP202UPT_SOT323-3
D44 @
1
2
R837
0_0402_5%
(9~16mA)
2009/10/06
Issued Date
Security Classification
2010/03/12
Deciphered Date
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
B
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date:
SCHEMATICS, MB A5912
Document Number
Rev
C
401829
Sheet
27
of
45
+USB_VCCA
+USB_VCCA
1
+
+USB_VCCA
C713
GND VOUT
VIN VOUT
VIN VOUT
EN
FLG
8
7
6
5
C712
2
80mil
R447 1
2 10K_0402_5%
4.7U_0805_10V4Z
2
R448
C714
0.1U_0402_16V4Z
C715
GND VOUT
VIN VOUT
VIN VOUT
EN
FLG
8
7
6
5
USB20_P0
[20] USB20_P0
0_0402_5%
1
4
JUSB1
1
4
1
2
3
4
5
6
7
8
USB20_N0_R
USB20_P0_R
WCM2012F2S-900T04_0805
80mil
R449
0_0402_5%
1
2
R450
100K_0402_5%
USB_OC#2 [20]
R451
0_0402_5%
1
2
R452
10K_0402_5%
RT9715BGS_SO8
1
2
3
4
GND
GND
GND
GND
<NAL00 use>
SUYIN_020133MB004S580ZL-C
CONN@
U25
1
2
3
4
USB20_N0
[20] USB20_N0
+3VALW
+USB_VCCB
L83
[34] SYSON#
2
470P_0402_50V7K
USB_OC#0 [20]
RT9715BGS_SO8
+5VALW
C711
220U_6.3V_M
W=80mils
1
2
3
4
R446
100K_0402_5%
2
U24
+5VALW
USB_OC#1 [20]
1
4.7U_0805_10V4Z
2
C716
0.1U_0402_16V4Z
D10
SYSON#
USB20_N0_R
+USB_VCCA
USB20_P0_R
To USB/B Connector
To CardReader/B Connector
PJUSB208_SOT23-6
(Port 1,2)
JUSB2
USB20_N1
USB20_P1
GND
GND
8
7
6
5
4
3
2
1
USB20_N1 [20]
USB20_P1 [20]
USB20_N2
USB20_P2
USB20_N2 [20]
USB20_P2 [20]
10
9
8
7
6
5
4
3
2
1
C717
4.7U_0805_10V4Z
1
2
Bluetooth Conn.
5IN1_LED# [30]
CLK_CR_48M
USB20_N6
USB20_P6
USB20_N6 [20]
USB20_P6 [20]
+3VALW
+3VS
ACES_85201-08051
CONN@
C782
0_0402_5%
C718
BT@
0.1U_0402_16V4Z
33P_0402_50V8K
BT@ 2
1
R453
10K_0402_5%
+BT_VCC
+3VS_WWAN
(Port 9)
1
2
3
4
5
6
7
8
9
10
11
12
WWAN_OFF#
1
2
3
4
5
6
7
8
9
10
GND
GND
+3VS_WWAN
C723
WWAN_OFF# [29]
WWAN_LED# [29]
10
1
9
USB20_N9 [20]
USB20_P9 [20]
220U_C6_6.3V_M_R15
BT@
C722
BT@
GND 8
7
6
5
4
3
2
GND 1
BT@
R454
300_0603_5%
4.7U_0805_10V4Z
2
0.1U_0402_16V4Z
2
JBT1
Peak: 2.75A
Normal: 1.1A
3G@ 2
1
R455
0_1206_5%
R457
100K_0402_5%
JP4
+BT_VCC
C721
+3VS
AO3413_SOT23-3
W=40mils
BT@
0.1U_0402_16V4Z
+3VS_WWAN
1U_0402_6.3V4Z
3
C720
To 3G Module Connect
BT@
C719
[29] BT_ON#
BT@
Q24
@
1
8
7
6
5
4
3
2
1
USB20_P14 [20]
USB20_N14 [20]
R504
@
2
CLK_CR_48M
<NEW70 use>
<NAL00 use>
ACES_85201-1205N
CONN@
GND
GND
1
2
3
4
5
6
7
8
9
10
11
12
13
14
+3VS
JCR1
1
2
3
4
5
6
7
8
9
10
11
12
BT@
Q25
2N7002_SOT23
2
G
ACES_87213-0800G
CONN@
2
3G@
<NAL00 use>
USB20_N7 [20]
USB20_P7 [20]
ACES_87036-1001-CP
CONN@
<NAV70 use>
11/25 for DVT
2009/10/06
Issued Date
Security Classification
2010/03/12
Deciphered Date
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
B
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date:
SCHEMATICS, MB A5912
Document Number
Rev
C
401829
Sheet
28
of
45
+3VALW
KSO[0..17]
KSO[0..17] [30]
KSI[0..7]
2
2
0.1U_0402_16V4Z
C727
2
2
0.1U_0402_16V4Z
C728
1000P_0402_50V7K
1
1
C729
1000P_0402_50V7K
C730
KSI[0..7] [30]
JP7
1
2
3
4
1
2
3
4
E51RXD_P80CLK
E51TXD_P80DATA
ACES_85205-0400
@
65W/90W#
R458
VR_ON
R459
[19] CLKRUN#
[20] EC_SCI#
2
@
R99
0_0402_5%
+5VS
TP_CLK
2
4.7K_0402_5%
TP_DATA
2
4.7K_0402_5%
1
R465
1
R466
R489
4.7K_0402_5%
+3VALW +3VS
R852
0_0402_5%
NEWX5@
R851
0_0402_5%
PEW56@
1
R467
1
R468
+3VALW
1
R471
1
R472
1
R473
1
R474
2
R475
1
R476
2
R497
EC_SMB_CK1
2
2.2K_0402_5%
EC_SMB_DA1
2
2.2K_0402_5%
KSO1
2
47K_0402_5%
KSO2
2
47K_0402_5%
LID_SW#
1
100K_0402_5%
EC_PME#
2
10K_0402_5%
PBTN_OUT#
1
100K_0402_5%
[36]
[36]
[8]
[8]
[20] PM_SLP_S3#
[20] PM_SLP_S5#
[20] EC_SMI#
[16] LOCAL_DIM
[27] MINI1_LED#
2
R488
2
R844
2
R845
EC_SMB_CK1
EC_SMB_DA1
EC_SMB_CK2
EC_SMB_DA2
[16] COLOY_ENG_EN
[16] EC_INVT_PWM
[33] FAN_SPEED1
[28] BT_ON#
[33] ON/OFF
[30] PWR_SUSP_LED
[30] WLAN_LED#
@
C
KSI0
KSI1
KSI2
KSI3
KSI4
KSI5
KSI6
KSI7
KSO0
KSO1
KSO2
KSO3
KSO4
KSO5
KSO6
KSO7
KSO8
KSO9
KSO10
KSO11
KSO12
KSO13
KSO14
KSO15
KSO16
KSO17
EC_SMB_CK1
EC_SMB_DA1
EC_SMB_CK2
EC_SMB_DA2
77
78
79
80
PM_SLP_S3#
PM_SLP_S5#
EC_SMI#
LOCAL_DIM
MINI1_LED#
6
14
15
16
17
18
19
25
28
29
30
31
32
34
36
COLOY_ENG_EN
EC_INVT_PWM
FAN_SPEED1
BT_ON#
E51TXD_P80DATA
E51RXD_P80CLK
ON/OFF
PWR_SUSP_LED
WLAN_LED#
DAC_BRIG/DA0/GPIO3C
EN_DFAN1/DA1/GPIO3D
IREF/DA2/GPIO3E
DA3/GPIO3F
68
70
71
72
DAC_BRIG
EN_DFAN1
IREF
CALIBRATE#
PSCLK1/GPIO4A
PSDAT1/GPIO4B
PSCLK2/GPIO4C
PSDAT2/GPIO4D
TP_CLK/PSCLK3/GPIO4E
TP_DATA/PSDAT3/GPIO4F
83
84
85
86
87
88
EC_MUTE#
97
98
99
109
3S/4S#
65W/90W#
VLDT_EN
LID_SW#
DA Output
55
56
57
58
59
60
61
62
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
81
82
KSI0/GPIO30
KSI1/GPIO31
KSI2/GPIO32
KSI3/GPIO33
KSI4/GPIO34
KSI5/GPIO35
KSI6/GPIO36
KSI7/GPIO37
KSO0/GPIO20
KSO1/GPIO21
KSO2/GPIO22
KSO3/GPIO23
KSO4/GPIO24
KSO5/GPIO25 Int. K/B
KSO6/GPIO26 Matrix
KSO7/GPIO27
KSO8/GPIO28
KSO9/GPIO29
KSO10/GPIO2A
KSO11/GPIO2B
KSO12/GPIO2C
KSO13/GPIO2D
KSO14/GPIO2E
KSO15/GPIO2F
KSO16/GPIO48
KSO17/GPIO49
SCL1/GPIO44
SDA1/GPIO45
SCL2/GPIO46
SDA2/GPIO47
PS2 Interface
SDICS#/GPXOA00
SDICLK/GPXOA01
SDIDO/GPXOA02
SDIDI/GPXID0
X1
C740
15P_0402_50V8J
WWAN_OFF#
EC_RSMRST#/GPXO03
EC_LID_OUT#/GPXO04
EC_ON/GPXO05
EC_SWI#/GPXO06
ICH_PWROK/GPXO06
GPO
BKOFF#/GPXO08
WL_OFF#/GPXO09
GPXO10
GPXO11
100
101
102
103
104
105
106
107
108
EC_RSMRST#
EC_LID_OUT#
EC_ON
EC_SWI#
EC_PWROK
BKOFF#
WL_OFF#
EC_REV
PM_SLP_S4#/GPXID1
ENBKL/GPXID2
GPXID3
GPXID4
GPXID5
GPXID6
GPXID7
110
112
114
115
116
117
118
VGATE
ENBKL
EAPD
EC_THERM#
SUSP#
PBTN_OUT#
EC_PME#
V18R
124
GPIO
SM Bus
PM_SLP_S3#/GPIO04
PM_SLP_S5#/GPIO07
EC_SMI#/GPIO08
LID_SW#/GPIO0A
SUSP#/GPIO0B
PBTN_OUT#/GPIO0C
GPIO
EC_PME#/GPIO0D
EC_THERM#/GPIO11
FAN_SPEED1/FANFB1/GPIO14
FANFB2/GPIO15
EC_TX/GPIO16
EC_RX/GPIO17
ON_OFF/GPIO18
PWR_LED#/GPIO19
NUMLED#/GPIO1A
GPI
AD_PID0
KB926QFB1_LQFP128_14X14
20mil
ECAGND 2
L85
BLM18AG601SN1D_2P
WWAN_OFF#
BATT_AMB_LED#
PWR_LED
SYSON
VR_ON
ACIN
0.1U_0402_16V4Z
EC_SPICLK [30]
R469
@
100K_0402_5%
Ra
C783
33P_0402_50V8K
@
[28]
AD_BID0
R470
Rb
8.2K_0402_5%
BATT_AMB_LED# [30]
PWR_LED [30]
Reserve
SYSON [34,39]
VR_ON [40,43]
ACIN [30,34,35]
C735
0.1U_0402_16V4Z
+3VS
EC_RSMRST# [20]
EC_LID_OUT# [20]
EC_ON [33]
EC_SWI# [20]
EC_REV
BKOFF# [16]
WL_OFF# [27]
VGA_ON [34,42]
C734
C
18K_0402_5%
FSTCHG [38]
BATT_BLUE_LED# [30]
BATT_BLUE_LED#
R464
Rb
EC_SI_SPI_SO [30]
EC_SO_SPI_SI [30]
1
EC_SPICS#/FSEL# [30]
AGND
XCLK1
XCLK0
EC_REV : 1-> D3
0-> E0
2 PEW56@1
R838
100K_0402_5%
2
1
R839NEWX5@100K_0402_5%
VGATE [43]
ENBKL [13]
EAPD [31]
EC_THERM# [21]
SUSP# [34,38]
PBTN_OUT# [20]
EC_PME# [25]
EC_PWROK 1
R254
2
0_0402_5%
SB_PWRGD [8,13,20]
U26
C736
C737
BATT_TEMP
2
C738
KB926QFB1_LQFP128_14X14
NEWX5@
BATT_OVP
2
C741
ACIN
2
4.7U_0805_10V4Z
KB926 Rev:D3(SA00001J580)
KB926 Rev:E0(SA00001J5A0)
100P_0402_50V8J
1
100P_0402_50V8J
1
100P_0402_50V8J
1
<BOM Structure>
32.768KHZ_12.5PF_Q13MC14610002
Security Classification
2009/10/06
Issued Date
Deciphered Date
2010/03/12
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
B
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date:
R463
PEW56@
100K_0402_5%
Ra
3S/4S# [38]
65W/90W# [38]
VLDT_EN [34,40]
LID_SW# [30]
73
74
89
90
91
92
93
95
121
127
11
24
35
94
113
4
OSC
NC
1
OSC
NC
+3VALW
WWAN_LED# [28]
3G_LED# [30]
TP_CLK [30]
TP_DATA [30]
CIR_RX/GPIO40
CIR_RLC_TX/GPIO41
FSTCHG/SELIO#/GPIO50
BATT_CHGI_LED#/GPIO52
CAPS_LED#/GPIO53
BATT_LOW_LED#/GPIO54
SUSP_LED#/GPIO55
SYSON/GPIO56
VR_ON/XCLK32K/GPIO57
AC_IN/GPIO59
C739
15P_0402_50V8J
EC_MUTE# [32]
WWAN_LED#
3G_LED#
TP_CLK
TP_DATA
119
120
126
128
69
EC_CRY2
BATT_TEMP [36]
DAC_BRIG [16]
EN_DFAN1 [33]
IREF [38]
CALIBRATE# [38]
SPIDI/RD#
SPIDO/WR#
SPICLK/GPIO58
SPICS#
GND
GND
GND
GND
GND
EC_CRY1
122
123
ECAGND
2
1
C731 0.01U_0402_16V7K
BATT_OVP [38]
ADP_I [38]
ACOFF [38,41]
BATT_TEMP
BATT_OVP
ADP_I
AD_BID0
AD_PID0
MB_SL
EC_SCI#
PCICLK
PCIRST#/GPIO05
ECRST#
SCI#/GPIO0E
CLKRUN#/GPIO1D
ACOFF
2
1
R462
47K_0402_5%
2
1
C733
0.1U_0402_16V4Z
+3VALW
AD
BATT_TEMP/AD0/GPIO38
BATT_OVP/AD1/GPIO39
ADP_I/AD2/GPIO3A
Input
AD3/GPIO3B
AD4/GPIO42
SELIO2#/AD5/GPIO43
63
64
65
66
75
76
BEEP# [31]
[13,14,19] A_RST#
12
13
37
20
38
PWM Output
BEEP#
LPC_CLK0_EC
[19,23] LPC_CLK0_EC
21
23
26
27
1
33_0402_5%
INVT_PWM/PWM1/GPIO0F
BEEP#/PWM2/GPIO10
FANPWM1/GPIO12
ACOFF/FANPWM2/GPIO13
2
R461
GA20/GPIO00
KBRST#/GPIO01
SERIRQ#
LFRAME#
LAD3
LAD2
LAD1
LAD0 LPC & MISC
R460
1
2
3
4
5
7
8
10
1
100K_0402_5%
1
100K_0402_5%
2
4.7K_0402_5%
C732
@ 22P_0402_50V8J
2
1
[20] EC_GA20
[20] EC_KBRST#
[19] SERIRQ
[19] LPC_FRAME#
[19] LPC_AD3
[19] LPC_AD2
[19] LPC_AD1
[19] LPC_AD0
+3VALW
4.7K_0402_5%
3S/4S#
EC_GA20
EC_KBRST#
SERIRQ
LPC_FRAME#
LPC_AD3
LPC_AD2
LPC_AD1
LPC_AD0
E51RXD_P80CLK [27]
E51TXD_P80DATA [27]
R491
AVCC
VCC
VCC
VCC
VCC
VCC
VCC
U26 NEWX5@
0.1U_0402_16V4Z
67
9
22
33
96
111
125
MB_SL
+3VALW
R109
0_0402_5%
@
C726
1
2+EC_VCCA
BLM18AG601SN1D_2P
1
0.1U_0402_16V4Z
1
2
ECAGND
0.1U_0402_16V4Z
1 C725
1
C724
For EC Tools
+3VS
L84
SCHEMATICS, MB A5912
Document Number
Rev
C
401829
Wednesday, June 30, 2010
Sheet
1
29
of
45
To TP/B Conn.
+5VS
JTP1
2 0.1U_0402_16V4Z
+SPI_VCC
U27
1
3
7
4
CS#
WP#
HOLD#
GND
VCC
SCLK
SI
SO
8
6
5
2
EC_SPICLK_R
EC_SO_SPI_SI_R
EC_SI_SPI_SO_R
R481 1
R483 1
R484 1
2 0_0402_5%
2 0_0402_5%
2 0_0402_5%
EC_SPICLK [29]
EC_SO_SPI_SI [29]
EC_SI_SPI_SO [29]
RIGHT_BTN#
SW1
SMT1-05-A_4P
3
1
LEFT_BTN#
4
8
6
5
2
TP_DATA
D11
5
6
+SPI_VCC
EC_SPICLK_R
EC_SO_SPI_SI_R
EC_SI_SPI_SO_R
TP_CLK
LEFT_BTN#
D13
PJDLC05C_SOT23-3
PJDLC05C_SOT23-3
VDD
SCK
SI
SO
SW2
SMT1-05-A_4P
3
1
CE#
WP#
HOLD#
VSS
RIGHT_BTN#
U28 @
1
3
7
4
0.1U_0402_16V4Z
ACES_85201-0605N
CONN@
MX25L1605DM2I-12G SOP 8P
SA00002TO00
EC_SPICS#/FSEL#
SPI_WP#
SPI_HOLD#
C745
EC_SPICS#/FSEL#
2 4.7K_0402_5% SPI_WP#
2 4.7K_0402_5% SPI_HOLD#
+5VS
TP_CLK [29]
TP_DATA [29]
LEFT_BTN#
RIGHT_BTN#
R480 1
R482 1
1
2
3
4
5
6
MX25L1005AMC-12G_SOP8
[29] EC_SPICS#/FSEL#
+3VALW
7
8
1
2
3
4
5
6
GND
GND
C742 1
2
0_0603_5%
1
R479
5
6
+3VALW
@
R485
1
0_0402_5%
@
C746
33P_0402_50V8K
Left side
Right side
For NEW95
JLED2
INT_KBD Conn.
28
27
KSI[0..7] [29]
KSO[0..17]
KSO[0..17] [29]
+3VALW
LID_SW# [29]
LID_SW#
ACIN_LED#
3G_LED#
WLAN_LED#
MEDIA_LED#
3G_LED# [29]
WLAN_LED# [29]
PWR_LED#
ON/OFFBTN#
1
2
3
4
5
6
7
8
9
10
11
12
1
2
3
4
5
6
7
8
9
10
GND
GND
+3VS
ON/OFFBTN# [33]
ACES_85201-1005N
CONN@
LID_SW#
ACIN_LED#
3G_LED#
WLAN_LED#
MEDIA_LED#
PWR_LED#
ON/OFFBTN#
+3VALW
+3VS
ACES_85201-1005N
CONN@
MEDIA_LED#
100P_0402_50V8J
KSO17
C748 1
100P_0402_50V8J
KSO15
C749 1
100P_0402_50V8J
KSO7
C750 1
100P_0402_50V8J
KSO14
C751 1
100P_0402_50V8J
KSO6
C752 1
100P_0402_50V8J
KSO13
C753 1
100P_0402_50V8J
KSO5
C754 1
100P_0402_50V8J
KSO12
C755 1
100P_0402_50V8J
KSO4
C756 1
100P_0402_50V8J
KSI0
C757 1
100P_0402_50V8J
KSO3
C758 1
100P_0402_50V8J
KSO11
C759 1
100P_0402_50V8J
KSI4
C760 1
100P_0402_50V8J
KSO10
C761 1
100P_0402_50V8J
KSO2
C762 1
100P_0402_50V8J
KSI1
C763 1
100P_0402_50V8J
KSO1
C764 1
100P_0402_50V8J
Y
3
C747 1
100K_0402_5%
U29
2
2N7002_SOT23
For MP Add @
KSO16
2
R486
+3VS
@
Q73
2
G
[29,34,35] ACIN
+3VS
ACIN_LED#
5IN1_LED# [28]
SATA_LED# [21]
NC7SZ08P5X_NL_SC70-5
PWR_LED#
R487
100K_0402_5%
100P_0402_50V8J
KSO0
C766 1
100P_0402_50V8J
KSO9
C767 1
100P_0402_50V8J
KSI5
C768 1
100P_0402_50V8J
KSI3
C769 1
100P_0402_50V8J
KSI6
C770 1
100P_0402_50V8J
KSO8
C771 1
100P_0402_50V8J
KSI7
C772 1
100P_0402_50V8J
+3VALW
1 7585@ 2
2
R499
2.2K_0402_5%
+3VALW
1 7585@ 2
2
R498
3.9K_0402_5%
PWR_LED#
LED2
HT-191UD5_AMBER
2 9556@1
R477
680_0402_5%
PWR_SUSP_LED#
LED3
HT-191NB5_BLUE
PWR_SUSP_LED#
3
C765 1
+3VALW
1 7585@ 2
2
R478
3.9K_0402_5%
BATT_BLUE_LED#
BATT_BLUE_LED# [29]
BATT_AMB_LED#
BATT_AMB_LED# [29]
2 9556@1
R478
680_0402_5%
2 9556@1
R499
680_0402_5%
DMN66D0LDW-7_SOT363-6
Q26B
[29] PWR_SUSP_LED
R490
100K_0402_5%
2 9556@1
R498
680_0402_5%
LED4
HT-191UD5_AMBER
KSI2
+3VS
1 7585@ 2
2
R477
2.2K_0402_5%
[29] PWR_LED
LED1
HT-191NB5_BLUE
DMN66D0LDW-7_SOT363-6
Q26A
ACES_88747-2601
CONN@
KSI[0..7]
KSO0
G2
KSO1
G1
KSO2
KSO3
KSO4
KSO5
KSO6
KSO7
KSO8
KSO9
KSO10
KSO11
KSO12
KSO13
KSO14
KSO15
KSO16
KSO17
KSI0
KSI1
KSI2
KSI3
KSI4
KSI5
KSI6
KSI7
For PVT
1
26
25
24
23
22
21
20
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
JLED1
1
2
3
4
5
6
7
8
9
10
11
12
JKB1
KSO0
KSO1
KSO2
KSO3
KSO4
KSO5
KSO6
KSO7
KSO8
KSO9
KSO10
KSO11
KSO12
KSO13
KSO14
KSO15
KSO16
KSO17
KSI0
KSI1
KSI2
KSI3
KSI4
KSI5
KSI6
KSI7
1
2
3
4
5
6
7
8
9
10
GND
GND
Security Classification
Issued Date
2009/10/06
Deciphered Date
2010/03/12
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
B
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date:
SCHEMATICS, MB A5912
Document Number
Rev
C
401829
Wednesday, June 30, 2010
Sheet
30
of
45
+3VS
1
R784
+VDDA
2
0_0805_5%
+5VAMP
FBMA-L11-201209-221LMA30T_0805
MONO_IN
1
R786
2
1
HD Audio Codec
C
2
2.4K_0402_1%
Q72
2
B
0.1U_0402_16V4Z
0.1U_0402_16V4Z
C936
1
1U_0402_6.3V4Z
22U_0805_6.3V6M
C952 1
1U_0402_6.3V4Z
[29] BEEP#
R787
FBMA-L11-201209-221LMA30T_0805
L88 1
2
C947
CH751H-40PT_SOD323-2
1
U81
60mil
2
C899
R789
10K_0402_5%
C678
D38
L87
+5VS
R783
20K_0402_1%
IN
GND
SHDN
40mil
OUT
BYP
+VDDA
4.75V
1
2
C949
0.01U_0402_25V7K
@ G9191-475T1U_SOT23-5
560_0402_5%
2SC2411KT146_SOT23-3
[20] SB_SPKR
R788
560_0402_5%
C946 1
1U_0402_6.3V4Z
D37
CH751H-40PT_SOD323-2
L82
BLM18AG601SN1D_2P
1
2
1
+AVDD_HDA
C794
INT_MIC
2
R523
4.7U_0805_10V4Z
MIC2_C_L
2
1INT_MIC_2
1K_0402_1%
C797
+3VS
MIC2_VREFO
C926
10U_0805_10V4Z
R585
2.2K_0402_5%
2
C945
MIC2_C_R
2
4.7U_0805_10V4Z
35
AMP_LEFT
LOUT_R
36
AMP_RIGHT
LOUT2_L
39
LINE2_L
15
LINE2_R
16
MIC2_L
17
MIC2_R
LOUT2_R
41
LINE1_L
SPDIFO2
45
24
LINE1_R
DMIC_CLK1/2
46
18
LINE1_VREFO
NC
43
20
LINE2_VREFO
DMIC_CLK3/4
19
MIC2_VREFO
AMP_LEFT [32]
1
220P_0402_50V7K
PCBEEP_IN
[20] HDA_RST_AUDIO#
11
RESET#
[20] HDA_SYNC_AUDIO
10
SYNC
[20] HDA_SDOUT_AUDIO
[32] MIC_PLUG#
[32] HP_PLUG#
R794 2
R795 2
1 20K_0402_1%
1 5.11K_0402_1%
1
R796
[29] EAPD
SENSE_A
SENSE_B
2
0_0402_5%
MONO_OUT
37
CBP
29
CPVEE
31
MIC1_VREFO
28
SDATA_OUT
2
3
13
34
GPIO0/DMIC_DATA1/2
GPIO1/DMIC_DATA3/4
SENSE A
SENSE B
47
EAPD
48
4
7
SPDIFO1
HPOUT_R
32
CBN
30
VREF
27
JDREF
40
HPOUT_L
33
AVSS1
AVSS2
26
42
DVSS1
DVSS2
1
R793
C951
2
33_0402_5%
SENSE A
4
SENSE B
Codec Signals
HP_RIGHT
CODEC_VREF
HP_RIGHT
C954
2.2U_0805_10V6K
LOUT2
20K
MIC1
10K
LINE1
5.1K
LOUT1
39.2K
LINE2
20K
MIC2
HP
5.1K
1
HP_LEFT
1
R798
2
0_0805_5%
1
R799
2
0_0805_5%
1
R804
2
0_0805_5%
1
R816
2
0_0805_5%
1
R818
2
0_0805_5%
1
R817
2
0_0805_5%
GND
GNDA
GND
2009/10/06
2010/03/12
Deciphered Date
SCHEMATICS, MB A5912
Document Number
Rev
C
401829
Date:
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
B
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
A
GNDA
Security Classification
Issued Date
HP_LEFT [32]
10mil
AGND
10K
HP_RIGHT [32]
HP_LEFT
Function
39.2K
D27 @
PJDLC05C_SOT23-3
2
MIC1_VREFO
ALC272X
Impedance
G1
G2
ACES_88266-02001
CONN@
2.2U_0805_10V6K
2
10mil
ALC272-VA2-GR_LQFP48_7X7
Sense Pin
3
4
[20]
HDA_SDIN0 [20]
Change to ALC272X
DGND
C980
2
1
2
12
SDATA_IN
C937
MIC1_R
0.1U_0402_16V4Z
MIC1_L
22
C927
C932
MIC1_C_R
2
4.7U_0805_10V4Z
MONO_IN
C979
2
JP1
1
2
For EMI
HDA_BITCLK_AUDIO
10U_0805_10V4Z
BITCLK
2 C948
22P_0402_50V8J
2
1
0_0402_5%
MIC1_R
21
1
R792
20K_0402_1%
[32] MIC1_R
C934 1
44
6
R797
[32] MIC1_L
MIC1_L
4.7U_0805_10V4Z
MIC1_C_L
2
0_0603_5% R849
1
2
1
2
0_0603_5% R850
1
220P_0402_50V7K
INT_MIC
15mil
MIC2_VREFO
C808
220P_0402_50V7K
AMP_RIGHT [32]
23
14
LOUT1_L
Close to Conn
INT_MIC
U82
DVDD
2
0.1U_0402_16V4Z
DVDD_IO
C953
0.1U_0402_16V4Z
38
25
C950
10U_0805_10V4Z
AVDD1
1
2
BLM18AG601SN1D_2P
+VDDA
40mil
AVDD2
0.1U_0402_16V4Z
1
1
C935
C933
L86
+3VS_DVDD
0.1U_0402_16V4Z
10mil
Sheet
31
H
of
45
Ri
90k
70k
45k
25k
+5VAMP
0.1U_0402_16V4Z
1
C959
10U_0805_10V4Z
1
C960
2
+5VAMP
16
15
6
C955 1
[31] AMP_LEFT
C971
2
0.47U_0603_10V7K
1
R828
2 0.47U_0603_10V7K
AMP_C_LEFT
2
0_0603_5%
EC_MUTE#
19
ROUT+
18
SPKR+
ROUT-
14
SPKR-
LOUT+
SPKL+
LOUT-
SPKL-
@ R825
100K_0402_5%
G1
G2
R826
100K_0402_5%
Left
JSPK1
SPKR+
SPKR-
R831 1
R832 1
2 0_0603_5%
2 0_0603_5%
20mil
LIN+
LIN-
3
4
GAIN1
GAIN1
RIN-
AMP_C_RIGHT 17
2
0_0603_5%
1
2
SPK_R+
SPK_R-
1
2
1
2
3
4
G1
G2
1
R830
GAIN0
GAIN0
1
2
ACES_88266-02001
CONN@
PJDLC05C_SOT23-3
2
0.47U_0603_10V7K
RIN+
D39
C957
SPK_L+
SPK_L-
1
[31] AMP_RIGHT
2 0.47U_0603_10V7K
2 0_0603_5%
2 0_0603_5%
@ R829
100K_0402_5%
C958 1
R834 1
R833 1
20mil
R827
100K_0402_5%
VDD
PVDD1
PVDD2
U83
JSPK2
SPKL+
SPKL-
10 dB
D41
PJDLC05C_SOT23-3
Right
ACES_88266-02001
CONN@
For PVT
12
10
SHUTDOWN
GND5
GND1
GND2
GND3
GND4
[29] EC_MUTE#
NC
BYPASS
C956
0.47U_0603_10V7K
21
20
13
11
1
TPA6017A2_TSSOP20
C779
330P_0402_50V7K
[31] HP_LEFT
R686 1
2 56.2_0603_1%
HPOUT_L_1
[31] HP_RIGHT
R685 1
2 56.2_0603_1%
HPOUT_R_1
1
L94
1
L93
C774
Headphone Out
330P_0402_50V7K
1
JHP1
1
2
HPOUT_L_2
2
FBMA-L11-160808-700LMT_2P
HPOUT_R_2
2
FBMA-L11-160808-700LMT_2P
3
4
[31] HP_PLUG#
HP_PLUG#
6
SINGA_2SJ-0960-C01
CONN@
MIC_PLUG#
<NAL00 use>
1 1
2
MIC1_R_R
1
C780
220P_0402_50V7K
1
2
MIC1_L_R
R695 1
JMIC1
4.7K_0402_5%
L89 1
2
FBMA-L11-160808-700LMT_2P
L90 1
2
FBMA-L11-160808-700LMT_2P
[31] MIC1_R
MIC1_L_1
2
1K_0603_1%
MIC1_R_1
2
1K_0603_1%
MIC JACK
R693
2
R692
4.7K_0402_5%
R694 1
@
D24
PJDLC05C_SOT23-3
D42
CH751H-40PT_SOD323-2
1 1
D43
CH751H-40PT_SOD323-2
[31] MIC1_L
HP_PLUG#
MIC1_VREFO MIC1_VREFO
C781
220P_0402_50V7K
@
D29
[31] MIC_PLUG#
4
MIC_PLUG#
PJDLC05C_SOT23-3
6
SINGA_2SJ-A960-C01
CONN@
<NAL00 use>
2009/10/06
Issued Date
Security Classification
2010/03/12
Deciphered Date
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
B
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date:
SCHEMATICS, MB A5912
Document Number
Rev
C
401829
Sheet
32
of
45
ON/OFF switch
FAN1 Conn
R494
2
@ 10K_0603_5%
R495
C823
10U_0805_10V4Z
1
2
51ON# [35]
DAN202UT106_SC70-3
For MP
C773
ON/OFFBTN# [30]
C824
1000P_0402_50V7K
1
2
R568
10K_0402_5%
2
10K_0402_5%
1
CONN@
ACES_85205-03001
LDO FAN
H18
H_3P4
H21
H_4P2
2009/10/06
H22
H_4P2
H17
H_3P0X3P5N
H23
H_4P2
H13
H_3P0N
FD4
FD3
FIDUCIAL_C40M80
FIDUCIAL_C40M80
FIDUCIAL_C40M80
FIDUCIAL_C40M80
Deciphered Date
H10
H_3P0
H9
H_3P0
H20
H_4P2
Security Classification
Issued Date
FD2
H8
H_3P0
FD1
H7
H_3P0
H24
H_3P0
H6
H_3P0
H19
H_3P0
H5
H_3P0
H12
H_3P0
H4
H_3P0
H11
H_3P0
H2
H_3P0
H1
H_3P0
C825
1000P_0402_50V7K
S 2N7002_SOT23
Q27
2
G
R496
[29] FAN_SPEED1
1
2
3
+VCC_FAN1
EC_ON
[29] EC_ON
JFAN1
40mil
1000P_0402_50V7K
1
ON/OFF [29]
+3VS
ON/OFFBTN#
APL5607KI-TRG_SO8
0.01U_0402_25V4Z
8
7
6
5
C822
@
2
GND
GND
GND
GND
2
0_0402_5% 1
EN
VIN
VOUT
VSET
D12
6
5
1
2
3
4
@
SW3
SMT1-05-A_4P
1
3
@ D26 BAS16_SOT23-3
1
2
U35
100K_0402_5%
Bottom Side
D25
1SS355_SOD323-2
+VCC_FAN1
1
R567
2
@ 10K_0603_5%
10U_0805_10V4Z
2
R493
R566
0_0603_5%
@
[29] EN_DFAN1
+3VALW
TOP Side
+5VS
+5VS
C821
1
Power Button
2010/03/12
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
B
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date:
SCHEMATICS, MB A5912
Document Number
Rev
C
401829
Wednesday, June 30, 2010
Sheet
33
of
45
+5VALW TO +5VS
+5VALW
+1.1VALW TO +1.1VS
+5VS
+1.1VALW
+5VALW
+1.1VS
R570
100K_0402_5%
U36
@
D
ACIN 2
G
[29,30,35] ACIN
+3VALW
0.1U_0603_25V7K
R576
100K_0402_5%
Q48
@
2N7002_SOT23
1
D
1
2
3
4
C832
SI4800BDY_SO8
2
10U_0805_10V4Z
2
G
Q34
S
2N7002_SOT23
1
C848
0.22U_0603_16V4Z2
R583
100K_0402_5%
ACIN 2
G
VLDT_EN#
[29,40] VLDT_EN
1
1
@
2 VGA_ON#
G
Q32
2N7002_SOT23
C835
Q40
2N7002_SOT23
2
G
R584
10K_0402_5%
0.1U_0603_25V7K
2
1
R503 47K_0402_5%
470_0603_5%
VGA_ON#
+5VALW
R572
1.5VSG_GATE
2
100K_0402_5%
1
R575
+VSB
C833
2
10U_0805_10V4Z
0.1U_0603_25V7K
C843
10U_0805_10V4Z
2
2
1U_0402_6.3V4Z
S
S
S
G
D
D
D
D
R596
C831
8
7
6
5
Q35
2N7002_SOT23
U37
2 SUSP
G
Q36
2N7002_SOT23
C830
+1.5VS
510K_0402_5%
+1.5V
2
G
R580
10K_0402_5%
+1.5V to +1.5VS
R579
470_0603_5%
SUSP
2
Q38G
2N7002_SOT23
3VS_GATE
1
200K_0402_5%
1
2
R582
10U_0805_10V4Z
C836
2
2
1U_0402_6.3V4Z
10U_0805_10V4Z
2
2
10U_0805_10V4Z
+VSB
SUSP
[41] SUSP
2
C842
SI4800BDY_SO8
C841
1
2
3
4
S
S
S
G
+5VALW
[29,38] SUSP#
1 1
C840
D
D
D
D
C844
U39
8
7
6
5
Q30
2N7002_SOT23
2
G
R573
100K_0402_5%
2 VLDT_EN#
G
Q37
2N7002_SOT23
[29,39] SYSON
R595
VLDT_EN# 2
Q39G
2N7002_SOT23
+3VALW TO +3VS
+3VS
510K_0402_5%
0.1U_0603_25V7K
1 2
1.1VS_GATE
2
47K_0402_5%
1
R581
+VSB
SYSON#
[28] SYSON#
470_0603_5%
C834
1
2
10U_0805_10V4Z
2 SUSP
G
Q31
2N7002_SOT23
R578
1
SUSP
2
Q33G
2N7002_SOT23
5VS_GATE
2
100K_0402_5%
1
R574
C839
10U_0805_10V4Z
2
2
1U_0402_6.3V4Z
C838
SI4800BDY_SO8
R577
C837
1K_0402_5%
R571
470_0603_5%
10U_0805_10V4Z
2
2
10U_0805_10V4Z
1
2
3
4
S
S
S
G
10U_0805_10V4Z
C829
2
2
1U_0402_6.3V4Z
D
D
D
D
2
C827
SI4800BDY_SO8
+VSB
8
7
6
5
U38
1
2
3
4
S
S
S
G
C828
D
D
D
D
C826
8
7
6
5
Q49
@
2N7002_SOT23
+5VALW
R587
100K_0402_5%
+CPU_VDDR
+NB_CORE
+1.8VS
1
1
+0.75VS
Q42
2N7002_SOT23
2
G
R586
10K_0402_5%
+1.5V
2
2
S
+5VS
1
1
1
S
R605
470_0603_5%
D
VGA_ON#
2
G
Q46
2N7002_SOT23
D
2 VLDT_EN#
G
Q69
2N7002_SOT23
R592
470_0603_5%
D
2 VLDT_EN#
G
Q56
2N7002_SOT23
D
2 SUSP
G
2N7002_SOT23
Q45
R610
470_0603_5%
1
1
R604
470_0603_5%
D
2 SUSP
G
Q44
2N7002_SOT23
R591
470_0603_5%
R590
470_0603_5%
+2.5VS
VGA_ON#
[29,42] VGA_ON
2 SYSON#
G
Q57
2N7002_SOT23
C972
C973
C974
C975
C976
C977
C978
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
2 0.1U_0402_16V4Z
2
2 0.1U_0402_16V4Z
2
2 0.1U_0402_16V4Z
2
2 0.1U_0402_16V4Z
2009/10/06
Issued Date
Security Classification
2010/03/12
Deciphered Date
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
B
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date:
SCHEMATICS, MB A5912
Document Number
Rev
C
401829
Sheet
34
of
45
PR1
1M_0402_1%
1
2
VIN
VIN
VIN
PC1
1000P_0402_50V7K
PR7
20K_0402_1%
PC2
0.1U_0603_25V7K
GLZ4.3B_LL34-2
PR8
10K_0402_5%
PC6
1000P_0402_50V7K
LM393DR_SO8
1
PC5
100P_0402_50V8J
PD1
PC4
100P_0402_50V8J
1
PC3
1000P_0402_50V7K
PJP1
P
PACIN
<BOM Structure>
[29,30,34] ACIN
PR4
22K_0402_5%
1
2
PU1A
PR5
10K_0402_1%
1
2
DC_IN_S1
1
2
3
4
5
6
PR3
84.5K_0402_1%
PL1
SMB3025500YA_2P
1
2
1
2
3
4
GND
GND
PR2
10K_0402_5%
SP02000GC00
ACES_50305-00441-001
VS
PR9
10K_0402_5%
1
2
RTCVREF
[38,41] PACIN
Vin Dectector
Min.
H-->L 16.976V
L-->H 17.430V
Typ
17.525V
17.901V
Max.
17.728V
18.384V
PJ29
+RTCBATT
@ PC130
@PC130
0.1U_0402_16V7K
+RTCBATT
+1.8VSP2
+1.8VS
JUMP_43X118
PBJ1
PJ1
2
+3VALWP
PJ22
+3VALW
JUMP_43X118
@ PC71
@PC71
0.1U_0402_16V7K
VIN
+1.8VS
+5VALW
+1.1VALWP
+1.1VALW
JUMP_43X118
@ PC8
@PC8
0.1U_0402_16V7K
PJ26
1
JUMP_43X118
PD2
PJ3
2
+5VALWP
@ PC9
@PC9
0.1U_0402_16V7K
JUMP_43X118
+1.8VSP1
@ PC7
@PC7
0.1U_0402_16V7K
ML1220T13RE
45@
LL4148_LL34-2
[33] 51ON#
JUMP_43X39
+0.75VSP
@ PC10
@PC10
0.1U_0402_16V7K
+0.75VS
3
@ PC15
@PC15
0.1U_0402_16V7K
+1.5VP
1
+NB_CORE
JUMP_43X118
@PC12
@
PC12
0.1U_0402_16V7K
+NB_COREP
+1.5V
PJ19
2
PC14
0.1U_0603_25V7K
JUMP_43X118
JUMP_43X118
TP0610K-T1-E3_SOT23-3
GND
PC17
G920AT24U_SOT89-3
1
10U_0805_10V4Z
2
2
2
+CPU_VDDRP
@PC70
@
PC70
0.1U_0402_16V7K
PC18
1U_0805_25V4Z
+CPU_VDDR
JUMP_43X39
Issued Date
Security Classification
2007/09/20
Deciphered Date
2010/03/12
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Custom
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date:
+2.5VS
IN
N2
OUT
PJ21
PU2
3.3V
JUMP_43X39
PR15
200_0603_5%
PR17
560_0603_5%
1
2
@PC16
@
PC16
0.1U_0402_16V7K
RTCVREF
+CHGRTC
+2.5VSP
PR16
560_0603_5%
1
2
JUMP_43X118
+VSB
PJ8
VS
PJ6
PC13
0.22U_0603_25V7K
PR14
22K_0402_1%
1
2
PR13
100K_0402_1%
PC11
0.1U_0402_25V6
PQ1
N1
PR12
200_0603_5%
1
2
PR11
68_1206_5%
CHGRTCP
+VSBP
2
PR10
68_1206_5%
LL4148_LL34-2
PJ11
PJ5
1
1
PD3
BATT+
SCHEMATICS, MB A5912
Rev
C
401829
Sheet
35
of
45
OT1 TMSNS2
OT2 RHYST2
PR169
G718TM1U_SOT23-8
1
PR261
1K_0402_5%
PR24
6.49K_0402_1%
2
1
1
2
PR30
9.53K_0402_1%
+3VALWP
PH1
100K_0402_1%_NCP15WF104F03RC
MAINPWON [8,37,41]
PC19
0.01U_0402_25V7K
1
2
PC20
1000P_0402_50V7K
1
7
GND RHYST1
4
EC_SMB_CK1 [29]
PR28
21K_0402_1%
2
VCC TMSNS1
<40,41>
BATT+
PL2
SMB3025500YA_2P
1
2
BATT_S1
EC_SMB_DA1 [29]
PR32
100_0402_1%
PR21 @
100K_0402_1%
CONN@
PU3
13.7K_0402_1%
PJP2
SUYIN_200275GR008G13GZR
PR27
26.7K_0402_1%
<40,41>
VMB
PC21
0.1U_0603_25V7K
PR29
100_0402_1%
EC_SMCA
TH
PI
VL
EC_SMDA
10
9
8
7
6
5
4
3
2
1
GND
GND
8
7
6
5
4
3
2
1
PH2
PR33
1K_0402_1%
100K_0402_1%_NCP15WF104F03RC
BATT_TEMP [29]
+VSBP
TP0610K-T1-E3_SOT23-3
1
PC25
0.1U_0603_25V7K
VL
1
PR34
100K_0402_1%
PC24
0.22U_0603_25V7K
PQ3
B+
PR36
22K_0402_1%
PR39
0_0402_5%
2
PQ4
2N7002W-T/R7_SOT323-3
2
G
[37,39] SPOK
PC27
0.1U_0402_16V7K
PR38
100K_0402_1%
Issued Date
Security Classification
2007/09/20
Deciphered Date
2010/03/12
Title
SCHEMATICS, MB A5912
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Custom
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date:
Rev
C
401829
Sheet
36
of
45
TPS51427_B+
TPS51427_B+
PC29
4.7U_0603_6.3V6M
2
1
18
DL5
PGND
22
VOUT1
10
FB1
11
VSW
23
DRVL2
30
VOUT2
32
REFIN2
3
2
1
LL2
DL3
FB3
@ PR44
@PR44
10K_0402_1%
VL
2VREF_TPS51427
1
PC47
20
LDOREFIN
@PR59
@
PR59
2
29
PGOOD1
13
TRIP1
12
TRIP2
31
2
1
GND
0_0402_5%
1
VL
0_0402_5%
2
SPOK [36,39]
PR60
330K_0402_1%
2
1
ILIM2
SN0806081RHBR_QFN32_5X5
PR57
294K_0402_1%
B
PR53
0_0402_5%
2VREF_TPS514272
1
2
PC38
0.047U_0402_16V7-K
21
EN2
TONSE
EN1
27
VREF3
14
@ PR55
@PR55
47K_0402_5%
1
2
PR54
0_0402_5%
2
EN_LDO
PC143
1U_0603_10V6K
1
2
2
2
28
@ PR56
@PR56
0_0402_5%
PR52
806K_0603_1%
[8,36,41] MAINPWON
PGOOD2
2
PR51
0_0402_5%
2
VL
NC
2
PC44
0.22U_0603_25V7K
2VREF_TPS514271
PD16
1SS355_SOD323-2
PR58
200K_0402_5%
1
2
PR46
100K_0402_1%
2
VS
FB5
PR45
1
+ PC35
220U_6.3V_M
VREF2
SKIPSEL
PD17
GLZ5.1B_LL34-2
1
2
0.22U_0603_10V7K
8
DRVL1
25
LX5
PC42
0.1U_0603_25V7K
LX3
PQ8
AO4712_SO8
PR49
63.4K_0402_1%
LL1
16
DH5
PR47 2.2_0603_5%
BST5A 2
1
PR48
10K_0402_1%
1
2
17
PR43
4.7_1206_5%
2
1
15
VBST1
PL4
4.7UH_SIL1045R-4R7PF_6.3A_30%
2
1
PC34
680P_0402_50V7K
2
1
3
2
1
DRVH1
VBST2
5
6
7
8
7
LDO
3
V5FILT
VIN
DRVH2
24
PC41
1U_0603_10V6K
1
2
2
1
26
PC43
0.1U_0603_25V7K
1
2
3
PC37
680P_0402_50V7K
TP
DH3
PR40
2
1 BST3A
2.2_0603_5%
19
PC36
1U_0603_10V6K
1
2
33
V5DRV
+5VALWP
PR42
0_0402_5%
PC39
220U_6.3V_M
PQ7
AO4712_SO8
PR41
4.7_1206_5%
1
1
8
7
6
5
PU4
PL3
4.7UH_SIL1045R-4R7PF_6.3A_30%
1
2
+3VALWP
PC40
0.1U_0603_25V7K
PQ6
AO4466_SO8
4
PC30
2200P_0402_50V7K
2
1
8
7
6
5
PQ5
AO4466_SO8
4
VL
1
2
3
PC31
10U_1206_25V6M
PC120
2200P_0402_25V7K
PC122
2200P_0402_25V7K
HCB4532KF-800T90_1812
5
6
7
8
PC45
2200P_0402_50V7K
2
1
PC28
10U_1206_25V6M
PR50
0_0805_5%
1
2
PL26
1
B+
@ PC46
@PC46
0.047U_0402_16V7K
PQ37
TP0610K-T1-E3_SOT23-3
2007/09/20
Issued Date
Security Classification
Deciphered Date
2010/03/12
Title
SCHEMATICS, MB A5912
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Custom
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date:
Rev
C
401829
Sheet
1
37
of
45
B+
Iada=0~4.74A(90W/19V=4.736A)
CP = 85%*Iada ; CP = 4.03A
24
ACSET ACPRN
23
EN
CSON
22
CELLS
CSOP
21
ICOMP
CSIN
20
CSIP
19
PHASE
UGATE
17
CHLIM
BOOT
16
10
ACLIM
VDDP
15
11
VADJ
LGATE
14
PGND
13
DH_CHG
PR82
0_0603_5%
BST_CHG 1
PC59
0.1U_0603_25V7K
2 BST_CHGA 2
1
PD12
PQ54
2
G
12
GND
DL_CHG
1
3
2
1
20K_0402_1%
PR87
BATT+
PR78
1
3
0.02_1206_1%
PQ57
@
AO4466_SO8
RB751V-40_SOD323-2
1
26251VDD
2
12.1K_0402_1%
[29] 65W/90W#
2
1 1
<40,41>
PL5
10UH_PCMB104T-100MS_6A_20%
CHG
1
2
6251VDDP
6251aclim
VREF
2 PACIN
2N7002W-T/R7_SOT323-3
G
S
PQ23D
PQ55
AO4466_SO8
PR84
6251VREF 1
PC61
2200P_0402_25V7K
2
1
PC48
0.1U_0603_25V7K
2
1
PC51
10U_1206_25V6M
2
1
PC50
10U_1206_25V6M
2
1
2
1
18
ICM
CSOP
.1U_0402_16V7K
PR83
100K_0402_1%
6251VREF
PC58
1
2
[29] IREF
VCOMP
CSON
5
6
7
8
1
2
PC57
@ 100P_0402_50V8J
PR81
80.6K_0402_1%
2
1
PR77
100_0402_1%
1
2
ACOFF
2 10K_0402_1%
PR85
2.55K_0402_1%
[29,41] ACOFF
1 PR75
[29] ADP_I
PR79
22K_0402_5%
PACIN 1
2
PQ53
PDTC115EU_SOT323
PC55
0.01U_0402_25V7K
2
1
PC60
0.01U_0402_25V7K
2
1
[35,41] PACIN
6800P_0402_25V7K
2
ACON
[41] ACON
D
2N7002W-T/R7_SOT323-3
PQ56
2
G
PC54
1
PR72
20_0402_5%
1
2
PC53
0.047U_0603_16V7K
1
2
PR73
20_0402_5%
2
1
PR74
20_0402_5%
PC129
0.1U_0603_25V7K
1
2
PR76
2_0402_5%
LX_CHG
[29] 3S/4S#
DCIN
PR86
4.7_0603_5%
PC64
4.7U_0805_6.3V6K
PC63
10U_1206_25V6M
2
1
DCIN
PC68
10U_1206_25V6M
2
1
VDD
PD11
2
1SS355_SOD323-2
6251_EN
2N7002W-T/R7_SOT323-3
PQ20
PDTC115EU_SOT323
wrong Value
PC127
0.1U_0603_25V7K
2
1
ACOFF
1SS355_SOD323-2
PR67
200K_0402_1%
1
2 VIN
PR80
4.7_1206_5%
PU5
PD8
1
FSTCHG [29]
SUSP# [29,34]
VIN
5
6
7
8
PQ24
PDTC115EU_SOT323
SUSP#
3
2
1
1
2
PC67
.1U_0402_16V7K
FSTCHG
BAS40CW_SOT323-3
3
1SS355_SOD323-2
PR68 10K_0402_5%
2
1
2
1
100K_0402_1%
PC49
2.2U_0603_6.3V6K
2
1
PR63
47K_0402_1%
1
2
PC128
680P_0402_50V7K
6251VDD
8
7
6
5
PR65
10K_0402_1%
PD9
PR66
2
PR71
PQ18
PDTC115EU_SOT323
PR70 47K_0402_5%
2
DCIN
100K_0402_1%
PR69
150K_0402_1%
1
2
3
CSIN
JUMP_43X118
P3
FSTCHG
PQ17 TP0610K-T1-E3_SOT23-3
3
CSIP
PD10
6251VDD
PQ22
2
G
PR61
3 0.02_2512_1%
47K
PQ21
PDTC115EU_SOT323
PR94
200K_0402_1%
PC56
5600P_0402_25V7K
1
2
4
1
2
PC62
0.1U_0603_25V7K
2
1
PQ19
PDTA144EU_SOT323-3
47K
PQ16
AO4407_SO8
PJ23
1
PR62
47K_0402_1%
CHG_B+
B+
P3
8
7
6
5
PQ15
AO4407_SO8
1
2
3
1
2
3
P2
8
7
6
5
PR64
100K_0402_1%
2
1
PQ14
AO4407_SO8
VIN
PC52
0.1U_0603_25V7K
2
1
ISL6251AHAZ-T_QSOP24
2N7002W-T/R7_SOT323-3
VMB
<40,41>
VS
BATT-OVP=0.1112*VMB
ADP_I = 19.9*3.42*0.95*0.02=1.29V
IREF=1.016*Icharge
PR93
105K_0402_1%
2
IREF=0.43V~3.24V
BATT Type
Charging Voltage
(0x15)
12600mV
CV mode
12.60V
Issued Date
Security Classification
PU18B
LM358DT_SO8
7 0
PR92
10K_0402_1%
1
2
[29] BATT_OVP
CC=0.6~4.48A
PR91
499K_0402_1%
2
Per cell=3.5V
CP mode
Iinput=(1/0.02)(0.05*Vaclm/2.39+0.05)
where Vaclm=1.464V (90W), Iinput=4.03A
PR84=12.1K;PR87=20K
where Vaclm=0.391(65W), Iinput=2.91A
PR84=12.1K;PR85=2.55K
PR89
340K_0402_1%
LI-3S :13.5V----BATT-OVP=1.5012V
PC66
0.01U_0402_25V7K
PR90
31.6K_0402_1%
[29] CALIBRATE#
PC65
0.01U_0402_25V7K
Iada=0~3.42A(65W)
Iada=0~4.74A(90W)
PR88
15.4K_0402_1%
1
2
2007/09/20
Deciphered Date
2010/03/12
Title
SCHEMATICS, MB A5912
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Custom
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date:
Rev
C
401829
Sheet
38
of
45
PL31
FBMA-L11-322513-151LMA50T_1210
PQ25
PR96
255K_0402_1%
1
2
11
VDDP
10
PQ26
LGATE
DL_1.1VALW
4
1
PGND
RT8209BGQW_WQFN14_3P5X3P5
2
<Vo=1.1V> VFB=0.75V
V=0.75*(1+4.7K/10K)=1.1V
Fsw=280KHz
PGOOD
GND
6
PC79
@ 47P_0402_50V8J
1
2
PR100
4.7_1206_5%
+5VALW
2
PR102
7.32K_0402_1%
+1.1VALWP
LX_1.1VALW
1
1
+ PC76
330U_6.3V_M
FB
12
CS
PHASE
0.1U_0603_25V7K
VDD
DH_1.1VALW
13
5
6
7
8
VOUT
UGATE
PC80
4.7U_0805_10V6K
3
2
1
BOOT
TON
14
NC
1
EN/DEM
PL6
1UH_FDUE1040D-1R0M-P3_21.3A_20%
1
2
PC75
BST_1.1VALW-11
2
PR101
100_0603_1%
1
2
15
PU6
PC74
@0.1U_0402_16V7K
PC77
4.7U_0603_6.3V6K
2
PC78
680P_0603_50V7K
AO4456_SO8
PR103
4.7K_0402_1%
1
2
PR104
8.87K_0402_1%
PL32
FBMA-L11-322513-151LMA50T_1210
PR106
226K_0402_1%
1
2
B+
PC83
2200P_0402_50V7K
1
5
6
7
8
PR105 0_0402_5%
1
2
PC82
10U_1206_25V6M
1.5V_B+
PQ27
[29,34] SYSON
PR99
30K_0402_5%
@
+5VALW
B+
AO4466_SO8
[36,37] SPOK
PR98
2.2_0603_5%
BST_1.1VALW
1
2
3
2
1
PR97
0_0402_5%
1
2
PC72
10U_1206_25V6M
5
6
7
8
PC139
2200P_0402_50V7K
1.1VALW_B+
AO4466_SO8
11
VDDP
10
2
PR112
13K_0402_1%
FB
DL_1.5V
LGATE
+5VALW
RT8209BGQW_WQFN14_3P5X3P5
PC88
680P_0603_50V7K
PC90
4.7U_0805_10V6K
AO4456_SO8
PR113
10K_0402_1%
1
2
PR114
10K_0402_1%
2
<Vo=1.5V> VFB=0.75V
Vo=0.75*(1+10K/10K)=1.5V
Fsw=335KHz
1
+ PC86
330U_2.5V_M
2
4
1
PGND
8
PGOOD
GND
6
PC89
@ 47P_0402_50V8J
1
2
PC87
4.7U_0603_6.3V6K
PQ28
1
+1.5VP
14
12
CS
PHASE
PR110
4.7_1206_5%
VDD
LX_1.5V
VOUT
DH_1.5V
5
6
7
8
13
UGATE
PL7
1UH_MMD-10DZ-1R0M-X1A_18A_20%
1
2
<BOM Structure>
3
2
1
+5VALW
TON
PC84
0.1U_0603_25V7K
BST_1.5V-1
1
2
BOOT
NC
PU7
PR111
100_0603_1%
1
2
15
@PC85
@PC85
0.1U_0402_16V7K
@ PR109
@PR109
30K_0402_5%
EN/DEM
3
2
1
PR108
2.2_0603_5%
BST_1.5V 1
2
Issued Date
Security Classification
2007/09/20
Deciphered Date
2010/03/12
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Custom
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date:
SCHEMATICS, MB A5912
Rev
C
401829
Sheet
D
39
of
45
FB1_NB_COREP
POWER_SEL
+5VALW
0.95V
PR158
11.8K_0402_1%
PR117
2.2_0603_5%
BST_NB_CORE
1
2
PC218
100U_25V_M
+
2
14
VDDP
10
2
PR121
7.5K_0402_1%
FB
DL_NB_CORE
PQ30
4
1
PGND
LGATE
+ PC95
330U_6.3V_M
2
PC97
680P_0603_50V7K
2
RT8209BGQW_WQFN14_3P5X3P5
2
PGOOD
PC98
@ 47P_0402_50V8J
1
2
GND
PC96
4.7U_0603_6.3V6K
PR119
4.7_1206_5%
+5VALW
+NB_COREP
BOOT
11
15
EN/DEM
12
CS
PHASE
LX_NB_CORE
VDD
DH_NB_CORE 0.1U_0603_25V7K
5
6
7
8
VOUT
NC
13
UGATE
FB1_NB_COREP
TON
PL8
1UH_FDUE1040D-1R0M-P3_21.3A_20%
1
2
PC93
BST_NB_CORE-1
1
2
PC99
4.7U_0805_10V6K
3
2
1
PR120
100_0603_1%
1
2
<Vo=1.1V> VFB=0.75V
V=0.75*(1+4.7K/10K)=1.1V
Fsw=280KHz
AO4466_SO8
PU8
PC94
.1U_0402_16V7K
2
@ PR118
@PR118
30K_0402_5%
+5VALW
B+
3
2
1
PR116
100K_0402_5%
1
2
[29,34] VLDT_EN
1
PR115
255K_0402_1%
1
2
PC91
10U_1206_25V6M
PC125
0.1U_0402_25V6
PQ29
PC140
2200P_0402_50V7K
PQ44
SSM3K7002F_SC59-3
5
6
7
8
1
3
NB_CORE_B+
PC126
0.01U_0402_25V7K
2
G
1
[13] POWER_SEL
2
PR157
0_0402_5%
10K_0402_5%
PR159
1
2
2
G
SSM3K7002F_SC59-3
PQ43
PL33
FBMA-L11-322513-151LMA50T_1210
PR131
10K_0402_1%
1.1V
LOW
HIGH
AO4456_SO8
PR122
2.37K_0402_1%
1
2
PR123
8.87K_0402_1%
+1.5V
PU16
APL5508-25DC-TRL_SOT89-3
1
+5VALW
PC118
0.01U_0402_25V7K
PR154
31.6K_0402_1%
1
1
SSM3K7002F_SC59-3
PQ58
1
2
VDDR_SW
HIGH
+CPU_VDDRP
PR156
249K_0402_1%
PR161
165K_0402_1%
1
@PR152
@
PR152
10K_0402_1%
LOW
1.05V
0.9V
2
G
[21] VDDR_SW
VIN
APL5915KAI-TRL_SO8
@ PR153
@PR153
150_1206_5%
PC119
22U_0805_6.3V6M
FB
+5VALW
2
1
VOUT
+2.5VSP
PC116
4.7U_0805_6.3V6K
PR188 @
47K_0402_5%
EN
PC121
.1U_0402_16V7K
5
4
10K_0402_1%
1
2
PC114
1U_0402_6.3V6K
@PR155
@
PR155
VLDT_EN
VIN
VOUT
GND
2
POK
OUT
PU12
7
VCNTL
10K_0402_1%
1
2
GND
[29,43] VR_ON
PC115
1U_0402_6.3V6K
IN
PC113
4.7U_0805_6.3V6K
PR162
+3VS
PJ24
@ JUMP_43X79
PR160
10K_0402_1%
2007/09/20
Deciphered Date
2010/03/12
Title
Issued Date
Security Classification
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Custom
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date:
SCHEMATICS, MB A5912
Rev
C
401829
Sheet
40
of
45
PR124
1K_1206_5%
1
2
VOUT
PC101
1U_0603_6.3V6M
NC
TP
1
1
PR132
100K_0402_5%
PQ33
DTC115EUA_SC70-3
PC103
22U_0805_6.3V6M
[29,38] ACOFF
1 2
S
2N7002W-T/R7_SOT323-3
+0.75VSP
2
PQ34
DTC115EUA_SC70-3
2
1
PR134
1K_0402_1%
PC104
0.22U_0402_10V4Z
PQ32
2
G
PC102
.1U_0402_16V7K
2
1
[34] SUSP
APL5336KAI-TRL_SOP8P8
PR133
300K_0402_5%
1
2
B+
1
VREF VCNTL
PR127
1K_1206_5%
1
2
+3VALW
NC
NC
GND
PR129
2
2
2
PR130
1K_0402_1%
PC100
4.7U_0805_6.3V6K
VIN
PR126
1K_1206_5%
1
2
LL4148_LL34-2
PU9
1
100K_0402_5%
PR128
1
PJ17
JUMP_43X79
PQ31
TP0610K-T1-E3_SOT23-3
PR125
1K_1206_5%
1
2
PD13
VIN
100K_0402_5%
+1.5V
VL
B+
PR135
2.2M_0402_5%
1
PR136
499K_0402_1%
VS
RTCVREF
1
2
PR139
PR140
34K_0402_1%
2
1
PC107
0.01U_0402_25V7K
1
PR138
191K_0402_1%
PRG++ 2
1
2
PC105
0.1U_0603_25V7K
499K_0402_1%
PQ35
2
G
PR141
47K_0402_5%
1
PACIN [35,38]
LM393DR_SO8
1
2
BAS40CW_SOT323-3
32.4
PC106
1000P_0402_50V7K
[38] ACON
PU1B
PD14
2
[8,36,37] MAINPWON
PR137
100K_0402_1%
PQ36
DTC115EUA_SC70-3
+5VALW
1
@ PR142
@PR142
66.5K_0402_1%
Precharge detector
Min.
typ.
Max.
H-->L 14.589V 14.84V 15.243V
L-->H 15.562V 15.97V 16.388V
SSM3K7002FU_SC70-3
ACIN
BATT ONLY
Precharge detector
Min.
typ.
Max.
H-->L 6.138V 6.214V 6.359V
L-->H 7.196V 7.349V 7.505V
Security Classification
2007/09/20
Issued Date
Deciphered Date
2010/03/12
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date:
SCHEMATICS, MB A5912
Rev
C
401829
Sheet
1
41
of
45
PR144
200K_0402_1%
1
2
11
TP
MP2121DQ-LF-Z_QFN10_3X3
PR143
4.7_1206_5%
POK
+1.8VSP1
PC124
22U_0805_6.3V6M
BS
IN
PL9
2.2UH_MSCDRI-74A-2R2M-E_6.5A_20%
1
2
IN
SW
SW
GND
2
PR148
0_0402_5%
10
EN/SYNC
GND
JUMP_43X79
FB
PD15
2
PC154
10U_0805_10V4Z
PC123
10U_0805_10V4Z
1
2
PC157
0.1U_0402_25V6
2
1
B340A_SMA2
PJ28
+5VALW
PU11
PC153
.1U_0402_16V7K
1
+1.8VSP1
VGA_ON [29,34]
PC156
0.22U_0402_10V4Z
316K_0402_1%
PR145
PR147
402K_0402_1%
2
1
PC117
22U_0805_6.3V6M
PC155
680P_0603_50V7K
+5VALW
PC109 @
1U_0402_6.3V6K
+3VALW
@PJ18
@
PJ18
JUMP_43X79
APL5913-KAC-TRL_SO8
@
PC108 @
0.01U_0402_25V7K
+1.8VSP2
@ PR149
@PR149
15K_0402_1%
FB
3
4
PC111 @
22U_0805_6.3V6M
EN
POK
@PC112
@
PC112
4.7U_0603_6.3V6K
VOUT
VOUT
8
7
VCNTL
VIN
VIN
GND
2
1
PU14
6
5
9
PR150 @
12K_0402_1%
@
PR146
47K_0402_5%
@PC150
@
PC150
0.1U_0402_10V7K
@ PR151
200K_0402_1%
1
2
1
VGA_ON
2008/08/10
Issued Date
Security Classification
Deciphered Date
2010/03/12
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Custom
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date:
SCHEMATICS, MB A5912
Rev
C
401829
Sheet
1
42
of
45
CPU_B+
3
2
1
PC211
180P_0402_50V8J
PR255
1K_0402_5%
2
1
PR256
2
PC216
2
1
3
2
1
VW1
PR254
PC213
255_0402_1% 4700P_0402_25V7K
FB_1
2
1 2
1
COMP1
PC214
180P_0402_50V8J
PR258
1K_0402_5%
2
1
PR259
2
PC217
2
1
PC198
2200P_0402_50V7K
2
1
PC196
10U_1206_25V6M
2
1
1
1 2
PR247
16.2K_0402_1%
PR248
4.7_1206_5%
PC208
680P_0603_50V7K
1 PR249 2
4.02K_0402_1%
PC209
2
1
.1U_0402_16V7K
PC215
1000P_0402_50V7K
PR260
6.81K_0402_1%
2
1
54.9K_0402_1% 1200P_0402_50V7K
54.9K_0402_1% 1200P_0402_50V7K
3
2
1
VSEN1
PR251
10_0402_5%
1
+CPU_CORE
2
4
PC212
1000P_0402_50V7K
PR257
6.81K_0402_1%
2
1
PQ52 @
1 2
@ PR252 1K_0402_1%
2
1
DIFF_1
PQ49
TPCA8028-H_SOP-ADVANCE8-5
ISP1
COMP0
PC207
0.22U_0603_10V7K
+CPU_CORE_0
Design Current: 25A
Max current: 35A
OCP_min:42A
PL18
0.36UH_PCMC104T-R36MN1R17_30A_20%
1
2
3
2
1
PR243
2.2_0603_1%
BOOT1 1<BOM Structure>
2 1
TPCA8028-H_SOP-ADVANCE8-5
3
2
1
PC201
2
1
PHASE1
LGATE1
PC195
10U_1206_25V6M
2
1
UGATE1
RTN1
PR246 10K_0402_1%
2
1
+CPU_CORE
PR253
PC210
255_0402_1% 4700P_0402_25V7K
FB_0
2
1 2
1
5
3
2
1
5
TPCA8030-H_SOP-ADV8-5
PQ51
1 PR235 2
4.02K_0402_1%
.1U_0402_16V7K
CPU_B+
49
24
ISN1
VW1
FB1
ISP1
23
ISP1
22
21
20
LGATE0
PC200
680P_0603_50V7K
ISN0
BOOT1
ISP0
UGATE1
25
+CPU_CORE
PR232
16.2K_0402_1%
PR233
4.7_1206_5%
PC206
2200P_0402_50V7K
2
1
26
BOOT1
PQ47@
PC205
0.01U_0402_25V7K
2
1
UGATE1
VW0
PC202
1U_0603_16V6K
TP
COMP0
12
ISN1
11
COMP1
PHASE1
VDIFF1
FB0
27
PL17
0.36UH_PCMC104T-R36MN1R17_30A_20%
1
2
PC204
10U_1206_25V6M
2
1
PHASE1
10
PQ48
PC203
10U_1206_25V6M
2
1
28
VSEN1
PC199
0.22U_0603_10V7K
TPCA8028-H_SOP-ADVANCE8-5
29
PGND1
[8] CPU_VDD1_FB_H
PC343
220U_25V_M
1
5
LGATE1
VDIFF0
TPCA8030-H_SOP-ADV8-5
2
TPCA8028-H_SOP-ADVANCE8-5
LGATE1
OCSET
19
PR229
2.2_0603_1%
BOOT0 1
2 1
+5VS
14
LGATE0
10_0402_5%
1
UGATE0
ISL6265AHRTZ-T_TQFN48_6X6
0_0402_5%
PR240
2
PQ46
30
[8]
37
PHASE_NB
UGATE_NB
40
LGATE_NB
38
41
39
PGND_NB
OCSET_NB
43
42
RTN_NB
VSEN_NB
45
44
FSET_NB
46
FB_NB
PVCC
RBIAS
RTN0
VW0
33
PHASE0
LGATE0
ENABLE
+1.5VS
DIFF_0
UGATE0
32
[8] CPU_VDD0_FB_L
PR245
2
BOOT0
31
PR241
2
1
10_0402_5%
[8] CPU_VDD1_FB_L
35
34
PGND0
VSEN0
+CPU_CORE
BOOT0
UGATE0
SVC
13
[8] CPU_VDD0_FB_H
BOOT_NB
ISP0
ISN0
COMP_NB
VCC
47
48
VIN
PR239
1
95.3K_0402_1%
36
BOOT_NB
PHASE0
+VDDNB
Design Current: 2.8A
Max current: 4A
OCP_min:5A
PHASE0
SVD
ISP0
CPU_VDDNB_FB_L
RTN1
1
0_0402_5%
PWROK
RTN0
2
PR236
PGOOD
VSEN0
[8] CPU_SVC
15
PR242 0_0402_5%
16
2
1
0_0402_5%
17
2 PR244 1
0_0402_5%
18
2 PR250 1
1
0_0402_5%
OFS/VFIXEN
ISN0
2
PR234
[29,40] VR_ON
PR238
2
1
21.5K_0402_1%
[8] CPU_SVD
PC192
220U_D2_4VM
CPU_B+
PR226
10_0402_5%
2
PR237 0_0402_5%
1
2
1
2
PR231 0_0402_5% @
[19] H_PWRGD_L
PC197
0.01U_0402_25V7K
2
1
1
[29] VGATE
LGATE_NB
PR224
0_0402_5%
PU15
[8]
PC193
680P_0603_50V7K
UGATE_NB
PR228
@ 105K_0402_1%
PR227
105K_0402_1%
PHASE_NB
PR223
@ 105K_0402_1%
+CPU_CORE_NB
PR217
4.7_1206_5%
PHASE_NB
2
PR225
@ 10K_0402_1%
+
2
CPU_VDDNB_FB_H
PR221
13.7K_0402_1%
2
1
PR220
0_0402_5%
PC194
0.1U_0603_16V7K
PR222
0_0402_5%
1 2
PR219
2_0603_5%
+3VS
PC191
0.22U_0603_10V7K
+CPU_CORE_NB
+5VS
PL16
3.3UH_SIQB74B-3R3PF_5.9A_20%
1
2
PR230
2.2_0603_5%
BOOT_NB 1
2 1
PR218
10_0402_5%
1
2
+3VS
1
2
3
4
D2
D2
G1
S1
PHASE_NB
PR216
22K_0402_1%
2
1
2
CPU_B+
G2
S2/D1
S2/D1
S2/D1
AO4932_SO8
PC189
1000P_0402_50V7K
2
1
PC190
0.1U_0603_16V7K
8
7
6
5
ISN1
PR215
2_0603_5%
1
2
+5VS
UGATE_NB
PC184
1200P_0402_50V7K
PC222
0.01U_0402_25V7K
2
1
B+
PC188
100U_25V_M
PR214
44.2K_0402_1%
PC187
2200P_0402_50V7K
2
1
PC186
0.01U_0402_25V7K
2
1
PC185
10U_1206_25V6M
2
1
PQ50
PL15
HCB4532KF-800T90_1812
1
2
LGATE_NB
PC183
33P_0402_50V8K
2
1
PC221
0.01U_0402_25V7K
2
1
PC220
2200P_0402_50V7K
2
1
PC219
2200P_0402_50V7K
2
1
PR263 @
1K_0402_5%
PR262 @
1K_0402_5%
4
2008/04/16
Issued Date
Security Classification
Deciphered Date
2010/03/12
Title
SCHEMATICS, MB A5912
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
C
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date:
Document Number
Rev
C
NAV71
Wednesday, June 30, 2010
Sheet
43
H
of
45
Fixed Issue
Rev.
PG#
0.1
52
0.1
44
0.1
51
0.1
43
0.1
46
0.1
48
0.1
41
0.1
39
Modify List
8
9
10
0.1
41
0.2
39
Page 1 of 2
for PWR
Date
Phase
2009/08/21
EVT_NAV71
2009/08/27
EVT_NEW75
2009/09/04
EVT_NEW75
2009/09/10
EVT_NEW75
2009/09/22
EVT_NEW75
2009/09/22
EVT_NEW75
2009/10/02
EVT_NEW75_6L
2009/10/06
EVT_NEW75
2009/10/15
EVT_NEW75_6L
2009/11/23
EVT_NEW75_6L
11
Add bead
0.2
37,39,40
12
Change chock
0.2
37,39,40
13
0.2
14
ADD capacitance
15
16
2009/11/23
EVT_NEW75_6L
to SH000009Q00
2009/11/23
EVT_NEW75_6L
39
2009/12/01
EVT_NEW75_6L
0.2
43
2009/12/01
EVT_NEW75_6L
0.2
40
2009/12/01
EVT_NEW75_6L
0.2
2009/12/01
EVT_NEW75_6L
2007/09/20
Issued Date
Security Classification
Deciphered Date
2010/03/12
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Custom
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date:
SCHEMATICS, MB A5912
Rev
C
401829
Sheet
1
44
of
45
11/20
1. P.21 unstuff Y4, C588, C589, R368 for AMD suggest
2. P.19 Modify Y3 net connect
3. P.25 Change C923, C924 as 33pF for Y5
11/24
D
1. P.13, P.15, P.20, P.23 Add Ext@ & Int@ option ; Modify CLK_SBLINK_BCLK net connect
2. P.13, P.16, P.20 Add VB@ & UNVB@ option
3. P.34 Change U38 as 4430(SB000007O10)
4. P.27 Add
R835, R837 unstuff D44, R836 for WiMax/Wlan LED request ; change R492 as 100Komh for EC request
5. P.30 Change R477, R499 as 680ohm ; R478, R498 as 3.9kohm for LED brightness
11/25
1. P.19, P20 update SB GPIO PIN
2. P.29 Add R838, R839 for EC RevD3, E0
3. P.34 Add C972, C973, C974, C975, C976, C977, C978 for EMI Request
4. P.15 Remove R245, R247 for unSD CLK
5. P.13 Add R840 for CLK_NB_14.318
11/28
C
PVT
01/18
1. P.17 Add HDMI@
2. P.19 Change C56 as SF000002N00(H4.4)
3. P.13 stuff R67, unstuff U4 for NB_PWRGD
5. P.30 Change LED1, LED3 as SC591NB5A30 ; Change Resistance value for NEW75/85/95
B
01/25
1. P.30 Change Q26 as SB00000DH00
2. P.29 Define U26 Pin 36, Pin 17, Pin 85, Pin86 for WWAN & WLAN
3. P.31 Reserve C979, C980, R849, R850 for EMI solution
4. P.9 Change C23, C24, C25, C26, C75 as SGA19331D10 (ESR 9 ohm)
03/02
1. P.29 Add R851, unstuff R852
A
03/30 For MP
Security Classification
2009/10/06
Deciphered Date
2010/03/12
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
B
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date:
SCHEMATICS, MB A5912
Document Number
Rev
C
401829
Wednesday, June 30, 2010
Sheet
1
45
of
45