1

MOT SO BAI TAP CAN CHU Y !!!

Round-Robin, SJFS, B nh o, Bng FAT, Thut gii Nh bng, Sn xut-
Tiu th (semFull-semEmpty), Dining-Philosopers (deadlock, khng
deadlock).

Thut gii Nh bng .............................................................................................. 1
Round-Robin, SJFS, ............................................................................................. 4
bi tp phn on, tnh a ch vt l cho a ch logic .......................................... 7
bi tp phn on, tnh a ch vt l cho a ch logic c trng hp khng
hp l ................................................................................................................ 9
Bng FAT, ........................................................................................................... 11
RAG .................................................................................................................... 13
B nh o ........................................................................................................... 15
Sn xut-Tiu th (semFull-semEmpty), ............................................................. 19
Dining-Philosopers (deadlock, khng deadlock). ................................................ 22

BI TP H IU HNH

Thut gii Nh bng
Cu 1:
Mt h thng c 3 bng t v 3 tin trnh P1, P2, P3 vi trng thi cp
pht ti nguyn thi im Ti th hin bng vc-t Allocation = (1, 0, 1) v
Max = (1, 2, 2):
Dng thut gii nh bng :
a. Chng minh trng thi ny an ton. (1 im)
b. Xc nh c nn p ng hay khng yu cu xin thm 1 na ca ca
P3 ? (1 im)
Gii:
a. Xt ti thi im Ti m 3 tin trnh c cp pht nh bi ta c:


Vi: Need[i] = Max[i] Allocation[i] v Available = 3 (1 + 0 + 1) = 1
Tm chui an ton:


Vy ti thi im T0 tn ti chui an ton {P1, P2, P3}. Suy ra, h thng ti thi
im Ti trng thi an ton.

2
b. Ta thy, yu cu thm 1 na ca P3 tho cc iu kin:
o Request3 <= Need3 v Request1 <= Available
o Hn na vic cp pht thm 1 na cho P3 th h thng vn trng thi an
ton v tn ti chui an ton {P1, P3, P2} trong khi ti nguyn trong h thng
khng cn na. Tht vy:


Do vy ta c th cp thm cho yu cu xin thm 1 ca P3 ti thi im ny.


Cu 2
Mt h thng c 3 bng t v 3 tin trnh P1, P2, P3 vi trng thi cp pht ti
nguyn ti thi im Ti th hin bng cc vc-t Allocation=(0, 2, 1) v Max=(2,
2, 2).
Dng thut gii Nh bng :
a. Chng minh trng thi ny an ton (1,0 im)
b. Xc nh c p ng c hay khng yu cu xin thm 1 na ca P2 (1,0
im)

Tr li:
a. Chng minh trng thi ti thi im Ti an ton:
- Tnh Need = Max Allocation = (2, 0, 1)
- Tnh Available=3-(0+2+1)=0
- Theo thut gii Nh bng, tm c 2 chui an ton l:


Do tn ti t nht 1 chui an ton (chui no cng c), trng thi h thng ti
thi im Ti l an ton.
b. Xc nh c p ng c hay khng yu cu xin thm 1 na ca P2:
Khng c v:
- Need2=(2-2)=0, ngha l ht hn mc n nh cho P2.
- Mt khc, Available=0, ngha l h khng cn bng no.

Cu 3.
Mt h thng c 5 tin trnh vi tnh trng ti nguyn nh sau:
3
Process
Allocation Max Available
A B C D A B C D A B C D
P0 0 0 1 2 0 0 1 2 1 5 2 0
P1 1 0 0 0 1 7 5 0
P2 1 3 5 4 2 3 5 6
P3 0 6 3 2 0 6 5 2
P4 0 0 1 4 0 6 5 6
Dung thuat giai Nha bang e:
a. Chng minh trng thi ny an ton. (1
im)
b. Xc nh c nn p ng yu cu (0, 4, 3, 0) ca P1 ?
(1 im)
Gii:
a. Xt ti thi im T0 m 5 tin trnh c cp pht nh bi ta c:
Need[i] = Max[i] Allocation[i]
Process
Need
A B C D
P0 0 0 0 0
P1 0 7 5 0
P2 1 0 0 2
P3 0 0 2 0
P4 0 4 4 2

Tm chui an ton:
Work >= Need[i] P[i] Allocation[i]
A B C D A B C D A B C D
1 5 2 0 0 0 0 0 P0 0 0 1 2
1 5 3 2 1 0 0 2 P2 1 3 5 4
2 8 8 6 0 0 2 0 P3 0 6 3 2
2 14 11 8 0 4 4 2 P4 0 1 1 4
2 15 12 12 0 7 5 0 P1 1 0 0 0
Vy ti thi im T0 tn ti chui an ton {P0, P2, P3, P4, P1}. Suy
ra, h thng ti thi im T0 trng thi an ton.

b. Ta thy, yu cu thm (0, 4, 3, 0) ca P1 tho iu kin Request1
Need1, nhng khng tho iu kin: Request1 Available v ti nguyn C
trong h thng ch cn 2 m yu cu 3. Do vy, khng th cp pht thm
(0, 4, 3, 0) cho P1 c.





4
Round-Robin, SJFS,
Cu 2
Mt h thng c 3 tin trnh vi thi im n v thi gian s dng CPU nh
sau:


Tin trnh

Thi im n
(ms)

CPU-Burst
(ms)

P1

3

37

P2

10

20

P3

24

14


Dng thut gii Round-Robin vi thi lng 10 ms iu phi CPU:
a. Th hin bng biu Gantt (1,0 im)
b. Tnh thi gian ch trung bnh ca cc tin trnh (1,0 im)

Tr li:
a. Th hin bng biu Gantt:


b. Thi gian ch trung bnh ca cc tin trnh:
(34+13+29)/3 = 76/3 = 25,3 ms
Cu 4


Mt h thng c 3 tin trnh vi thi im n v thi gian s dng CPU nh
sau:

Tin trnh

Thi im n
(ms)

CPU-Burst
(ms)

P1 5 47
5

P2

23

15

P3

45

28




Dng thut gii Round-Robin vi thi lng bng 20 ms iu phi CPU:

a. Th hin bng biu Gantt (0,5 im)

b. Tnh thi gian ch trung bnh ca cc tin trnh (0,5 im)

Tr li:

a. Th hin bng biu Gantt:





b. Tnh thi gian ch trung bnh ca cc tin trnh:

- Thi gian ch ca cc tin trnh:

P1 = 35 ms

P2 = 2 ms

P3 = 22 ms

- Thi gian ch trung bnh = ( 35 + 2 + 22 ) / 3 = 59 / 3 = 19,66 ms

6


7



bi tp phn on, tnh a ch vt l cho a ch logic

sau khi tm hiu v bi tp ny, mnh post ln cho mi ngi cng trao i

GII
1. V vng b nh Vt l dng cc on segment
T bng d liu bi

Ta v c vng b nh vt l nh sau:
8


Cc bn nhn vo hnh mnh hng dn cch tnh v cch v, cc bn ch
phn mu ch mnh s dng nhn ra d hn.
Vi segment 0: ta c
+ a ch vt l c s (basic) l 300
+ Limit l 700
==> a ch vt l ca segment 0 l t 300 -> 1000
Vi segment 1:
+ a ch vt l c s (basic) l 1200, nn ta s v bt u t 1200, nh vy t
1000->1200 l trng, khng c segment no
+ Limit l 500
==> a ch vt l ca segment 1l t 1200 -> 1700

v segment 2 cc bn tnh tng t

2. Cch tnh a ch logic
9


Tnh a ch vt l
+ Vi d liu bi cho l (1,200), ta xc nh: tnh a ch vt l ca segment 1,
a ch logic l 200 (lu : gi tr X tnh c ny nm trong segment 1 hay ko
(1200<= X<= 1700))
===> (1,200) = 1200 + 200 = 1400 (hp l v < 1700)
+ (1,0) = 1200 + 0 = 1200 (hp l)
+ (0,700) = 300 + 700 = 1000 (hp l)
+ (2,0) = 2000 + 0 = 2000 (hp l)
+ (2, 600) = 2000 + 600 = 2600 (hp l)
Nhn xt: tnh a ch vt l cho cc a ch logic th cc a ch logic ny
hok c vt qu gii hn (limit) ca segment tng ng ang xt
Mong cc bn trao i chng ta n tp c tt hn nha

Mt s trng hp khng hp l mnh a ra nh sau:
+ (0,800) --> khng hp l v 800 > 700 (limit ca segment 0)
+ (2,650) --> khng hp l v 650 > 600 (limit ca segment 2)
+ (1,501) --> khng hp l v 501 > 500 (limit ca segment 1)
Tm li nu nhn thy a ch logic m bi cho > limit ca segment th kt
lun ngay l khng hp l


bi tp phn on, tnh a ch vt l cho a ch logic c trng hp khng
hp l
Gi s c Bng on sau:

Hy tnh a ch vt l cho mi a ch l-gic sau:
10
a. 0430
b. 1010
c. 2500
d. 3400
e. 4112
gii

Tnh a ch vt l
+ Vi d liu bi cho l (0,430) = 219 +430 = 649 ( hp l) V n nm trong
on Segment 0.
+ (1,010) = 2300+ 10 = 2310 (hp l)
+ (2,500) = 90 + 500 = 1400 (khng hp l)
+ (3,400) = 1327+ 400 = 1727 (hp l)
+ (4,112) = 1952 + 112 = 2064 (khng hp l)



=>Vi cc a ch logic (0,430); (1,010); (1,500); (3,400); (4,112) ta c cc a
ch vt l tng ng l 649; 2310; khng hp l;1727; khng hp l.
11

Bng FAT,

Trn mt h tp tin FAT32, tp tin Lp HC08TH2.jpg c ni dung tri trn
cc lin cung 5, 6, 9, 10; trong khi Icon1.ico ch cn lin cung 8. Hy th
hin bng hnh v cu trc bng FAT v cc Directory Entry.
Gii:



Cn n 2 Directory Entry cho Lp HC08TH2.jpg

2 . j p g A 0
C
K
0
1 Lp A 0
C
K
H C 0 8 T 0
H
2
L
o p H C 0 ~ 1 A
N
T
S
Creation
time
Last
acc
Upp
Last
write
Low Size


Ghi ch: Lp gm 5 k t Lowps.
H C 0 8 T c 5 k t + 1 k t khong trng ( _ ) pha trc l 6.
jpg
File Lp HC08TH2.jpg
Bytes
12

8 3 1 1 1 4 2 2 4 2
4
Icon1.ico Ext
N
T

Creation
date/time
Last
acces

Last
write
date/time

File
Size

Cu 7 (1 im)
Trn mt h tp tin FAT32, tp tin DeThi1.pdf c ni dung ti lin cung 5,
trong khi DapAn1.pdf cn cc lin cung 8, 6, 7. Hy th hin bng hnh v
cu trc bng FAT v cc Directory Entry.
Gii:









Bytes
13

RAG
Mt h thng c 1 my in laser v 1 bng t. Hai tin trnh P1 v P2 ang
vn hnh vi trng thi cp pht ti nguyn nh sau:

Hy:
a. Th hin bng RAG
b. Xc nh v gii thch trng thi ny.
Gii:
a. th cp pht ti nguyn RAG:


b. Trng thi ny l trng thi Deadlock .v mi ti nguyn ch c mt phin bn
v tn ti chu trnh hay vng trn khp kn cc yu cu ti nguyn.



















14



15
B nh o




16
Vi bi v cch gii trn th mnh xin lm v gii thch theo cch hiu ca
mnh
Bn no c cch gii thch r hn, chnh xc hn th b sung nh
+ Hnh 1: Logical Memory

+ Hnh 2: Page table

+ Hnh 3: Physical memory
17

+ Hnh 4: Backstore



18
Mt h thng c B nh trong chia thnh 8 khung trang vi Khung 0 dnh cho
H iu hnh v cc khung cn li dnh cho 2 tin trnh ang vn hnh l P0
(gm cc trang C, D, E, F) v P1 (gm cc trang O, P, Q, R). Bng hnh v, vi
k thut t chc b nh o dng phn trang, hy tm cch:
a. Phn b ngu nhin cc trang ca P0 v P1 vo B nh trong k trn
b. T chc li cc bng trang sao cho trang cha np (do ht ch) by gi c
np


19




Sn xut-Tiu th (semFull-semEmpty),
Pht biu bi ton Sn xut-Tiu th vi thut gii ng b ho bng 2
n hiu semFull v semEmpty.
Gii:
Bi ton ngi sn xut-ngi tiu th (Producer-Consumer) thng
c dng hin th sc mnh ca cc hm c s ng b ho. Hai
qu trnh cng chia s mt vng m c kch thc gii hn n. Bin
semaphore mutex cung cp s loi tr h tng truy xut vng m
v c khi to vi gi tr 1. Cc bin semaphore empty v full m s
khe trng v y tng ng. Bin semaphore empty c khi to ti
gi tr n; bin semaphore full c khi to ti gi tr 0.
D liu chia s:
SEMAPHORE full, empty, mutex;
Khi to:
full = 0;
20
empty = BUFFER_SIZE;
mutex = 1;



















Cu 2 (1 im)

Pht biu bi ton Sn xut-Tiu th vi thut gii ng b ho bng 3 n hiu
semFull, semEmpty v Mutex.

Tr li:

- Tin trnh sn xut (Producer) to ra dng thng tin tin trnh tiu th
(Consumer) s dng.

- V d: Compiler v Assembler va l nh sn xut va l nh tiu th.
Compiler to ra m dng cho Assembler, tip theo Assembler sn sinh m my
lm u vo cho Loader hoc Linkage Editor.

- Pht biu bi ton: B nh m Buffer bao gm mt s hu hn cc khoang
cha (Items). Producer ln lt a cc sn phm S1, S2,vo cc khoang
ca Buffer. Consumer ly sn phm ra theo ng th t. Cng vic ca cc tin
trnh phi ng b vi nhau: khng a ra sn phm khi ht ch trng, khng ly
c sn phm khi cha c.

out i
n

Buffer xoay vng
while (1)
{
wait(full)
wait(mutex);

nextC = get_buffer_item(out);

signal(mutex);
signal(empty);

consume_item (nextC);

}
while (1)
{

nextP = new_item();

wait(empty);
wait(mutex);

insert_to_buffer(nextP);

signal(mutex);
signal(full);
}
PRODUCER CONSUMER
21
- Thut gii ng b ho bng 3 n hiu: semFull (qun l s sn phm c
trong b m, gi tr ban u bng 0), semEmpty (qun l s khoang cn trng,
gi tr ban u bng s khoang ca b m) v Mutex (m bo tnh loi tr
tng h, ngha l mi thi im ch c 1 tin trnh sn xut hay tiu th c
truy cp/cp nht ti nguyn dng chung, gi tr ban u bng 1).

o Thut gii cho Producer:

wait(semEmpty);

wait(Mutex);

// a sn phm vo Buffer

..........................

signal(semFull);

signal(Mutex);


o Thut gii cho Consumer:

wait(semFull);

wait(Mutex);

// Ly sn phm t Buffer

..........................

signal(semEmpty);
signal(Mutex);
4.1. Pht biu bi ton Sn xut-Tiu th v trnh by Thut gii vi B
m thc thi bng mng xoay vng.
Gii:
Pht biu bi ton:
Gi s c B nh m (Buffer) bao gm nhiu khoang (Items) c
tin trnh Producer ln lt a cc sn phm S1, S2,... vo.
Tin trnh Consumer ln lt ly sn phm ra theo ng th t.
Cng vic ca Producer phi ng b vi Consumer: Khng c
a sn phm vo khi Buffer y, Khng c ly ra khi cha c.
Trnh by gii thut:
22
















Dining-Philosopers (deadlock, khng deadlock).
7.1. Phn tch thut gii sai bi ton Dining-Philosophers (dn n
Deadlock).
Gii:
D liu chia s:
semaphore chopstick[5];
Khi u cc bin u l: 1.
while (1)
{
wait(chopstick[i])
wait(chopstick[(i+1) % 5 ] )

eat

signal(chopstick[i]);
signal(chopstick[(i+1) % 5] );

think

}
Gii php trn c th gy ra deadlock
Khi tt c trit gia i bng cng lc v ng thi cm mt chic
a bn tay tri deadlock
out i
n

Buffer xoay vng
item nextConsumed;
while (1)
{
while(in==out); //qu n khi buffer r ng
nextConsumed = buffer[out];
out = (out+1)%BUFFER_SIZE;
}
item nextProduced;
while (1)
{
while(((in+1)%BUFFER_SIZE)==out); //qu n
t i y khi buffer y.
buffer[in] = nextProduced;
in = (in+1)%BUFFER_SIZE;
}
PRODUCER CONSUMER
23
C th xy ra trng hp ch v hn nh (starvation).
7.2. Phn tch thut gii ng bi ton Dining-Philosophers (dng n hiu).
Gii:
D liu chia s:
semaphore chopstick[5];
Khi u cc bin u l: 1.
HANDLE cs[2]
while (1)
{
cs[0] = chopstick[i];
cs[0] = chopstick[(i+1) % 5 ]
WaitForMultipleObjects(2, cs, TRUE, INFINITE);

eat

ReleaseMutex(chopstick[i];
ReleaseMutex(chopstick[(i+1) % 5 ])

think

}