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IRFP460A, SiHFP460A
Vishay Siliconix

Power MOSFET
FEATURES

PRODUCT SUMMARY
VDS (V)

Low Gate Charge Qg Results in Simple Drive


Requirement
Improved Gate, Avalanche and Dynamic dV/dt
Ruggedness
Fully
Characterized
Capacitance
and
Avalanche Voltage and Current
Effective Coss Specified
Lead (Pb)-free Available

500

RDS(on) ()

VGS = 10 V

0.27

Qg (Max.) (nC)

105

Qgs (nC)

26

Qgd (nC)

42

Configuration

Single
D

Available

RoHS*
COMPLIANT

APPLICATIONS

TO-247

Switch Mode Power Supply (SMPS)


Uninterruptable Power Supply
High Speed Power Switching

TYPICAL SMPS TOPOLOGIES


S
D

Full Bridge
PFC Boost

N-Channel MOSFET

ORDERING INFORMATION
Package

TO-247
IRP460APbF
SiHFP460A-E3
IRP460A
SiHFP460A

Lead (Pb)-free
SnPb

ABSOLUTE MAXIMUM RATINGS TC = 25 C, unless otherwise noted


PARAMETER

SYMBOL

LIMIT

Drain-Source Voltage

VDS

500

Gate-Source Voltage

VGS

30

Continuous Drain Current


Pulsed Drain

VGS at 10 V

TC = 25 C
TC = 100 C

Currenta

ID
IDM

Linear Derating Factor

UNIT
V

20
13

80
2.2

W/C
mJ

Single Pulse Avalanche Energyb

EAS

960

Repetitive Avalanche Currenta

IAR

20

Repetitive Avalanche Energya

EAR

28

mJ

Maximum Power Dissipation

TC = 25 C

Peak Diode Recovery dV/dtc


Operating Junction and Storage Temperature Range
Soldering Recommendations (Peak Temperature)
Mounting Torque

for 10 s
6-32 or M3 screw

PD

280

dV/dt

3.8

V/ns

TJ, Tstg

- 55 to + 150
300d

10

lbf in

1.1

Nm

Notes
a. Repetitive rating; pulse width limited by maximum junction temperature (see fig. 11).
b. Starting TJ = 25 C, L = 4.3 mH, RG = 25 , IAS = 20 A (see fig. 12).
c. ISD 20 A, dI/dt 125 A/s, VDD VDS, TJ 150 C.
d. 1.6 mm from case.
* Pb containing terminations are not RoHS compliant, exemptions may apply

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IRFP460A, SiHFP460A
Vishay Siliconix
THERMAL RESISTANCE RATINGS
PARAMETER

SYMBOL

TYP.

MAX.

Maximum Junction-to-Ambient

RthJA

40

Case-to-Sink, Flat, Greased Surface

RthCS

0.24

Maximum Junction-to-Case (Drain)

RthJC

0.45

UNIT

C/W

SPECIFICATIONS TJ = 25 C, unless otherwise noted


PARAMETER

SYMBOL

TEST CONDITIONS

MIN.

TYP.

MAX.

UNIT

VDS

VGS = 0 V, ID = 250 A

500

VDS/TJ

Reference to 25 C, ID = 1 mA

0.61

V/C

VGS(th)

VDS = VGS, ID = 250 A

2.0

4.0

V
nA

Static
Drain-Source Breakdown Voltage
VDS Temperature Coefficient
Gate-Source Threshold Voltage
Gate-Source Leakage
Zero Gate Voltage Drain Current
Drain-Source On-State Resistance
Forward Transconductance

IGSS
IDSS
RDS(on)
gfs

VGS = 30 V

100

VDS = 500 V, VGS = 0 V

25

VDS = 400 V, VGS = 0 V, TJ = 125 C

250

0.27

11

ID = 12 Ab

VGS = 10 V

VDS = 50 V, ID = 12

Ab

Dynamic
Input Capacitance

Ciss

Output Capacitance

Coss

Reverse Transfer Capacitance

Crss

Output Capacitance

Coss

Effective Output Capacitance


Total Gate Charge

VGS = 0 V,
VDS = 25 V,
f = 1.0 MHz, see fig. 5

VGS = 0 V

Coss eff.

3100

480

18

VDS = 1.0 V, f = 1.0 MHz

4430

VDS = 400 V, f = 1.0 MHz

130

VDS = 0 V to 400

Vc

Qg
ID = 20 A, VDS = 400 V,
see fig. 6 and 13b

105

Qgs

26

Gate-Drain Charge

Qgd

42

Turn-On Delay Time

td(on)

18

tr

55

45

39

20

80

Turn-Off Delay Time


Fall Time

td(off)

VDD = 250 V, ID = 20 A,
RG = 4.3 , RD = 13 , see fig. 10b

tf

pF

140
-

Gate-Source Charge

Rise Time

VGS = 10 V

nC

ns

Drain-Source Body Diode Characteristics


Continuous Source-Drain Diode Current

IS

Pulsed Diode Forward Currenta

ISM

Body Diode Voltage

VSD

Body Diode Reverse Recovery Time

trr

Body Diode Reverse Recovery Charge

Qrr

Forward Turn-On Time

ton

MOSFET symbol
showing the
integral reverse
p - n junction diode

A
G

TJ = 25 C, IS = 20A, VGS = 0 Vb
TJ = 25 C, IF = 20 A, dI/dt = 100 A/sb

1.8

480

710

ns

5.0

7.5

Intrinsic turn-on time is negligible (turn-on is dominated by LS and LD)

Notes
a. Repetitive rating; pulse width limited by maximum junction temperature (see fig. 11).
b. Pulse width 300 s; duty cycle 2 %.
c. Coss eff. is a fixed capacitance that gives the same charging time as Coss while VDS is rising from 0 to 80 % VDS.

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IRFP460A, SiHFP460A
Vishay Siliconix
TYPICAL CHARACTERISTICS 25 C, unless otherwise noted

102

VGS
Top

10

15 V
10 V
8.0 V
7.0 V
6.0 V
5.5 V
5.0 V
Bottom 4.5 V

4.5 V

20 s Pulse Width
TC = 25 C

0.1
0.1

VDS, Drain-to-Source Voltage (V)

91234_01

150 C
10
25 C

4.0

10

15 V
10 V
8.0 V
7.0 V
6.0 V
5.5 V
5.0 V
Bottom 4.5 V

4.5 V

20 s Pulse Width
TC = 150 C

1
10

1
91234_02

Fig. 2 - Typical Output Characteristics

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3.0
2.5

7.0

8.0

9.0

ID = 20 A
VGS = 10 V

2.0
1.5
1.0
0.5
0.0
- 60 - 40 - 20

102

VDS, Drain-to-Source Voltage (V)

6.0

Fig. 3 - Typical Transfer Characteristics

RDS(on), Drain-to-Source On Resistance


(Normalized)

ID, Drain-to-Source Current (A)

VGS
Top

5.0

VGS, Gate-to-Source Voltage (V)

91234_03

Fig. 1 - Typical Output Characteristics

102

20 s Pulse Width
VDS = 50 V

0.1

102

10

ID, Drain-to-Source Current (A)

ID, Drain-to-Source Current (A)

102

91234_04

20 40 60 80 100 120 140 160

TJ, Junction Temperature (C)

Fig. 4 - Normalized On-Resistance vs. Temperature

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IRFP460A, SiHFP460A
Vishay Siliconix

VGS = 0 V, f = 1 MHz
Ciss = Cgs + Cgd, Cds Shorted
Crss = Cgd
Coss = Cds + Cgd

Capacitance (pF)

104

Ciss

103

102

Coss

10
Crss

102

ISD, Reverse Drain Current (A)

105

102

10

103

VDS, Drain-to-Source Voltage (V)

91234_05

0.2

103

ID, Drain Current (A)

12

VDS = 100 V

4
For test circuit
see figure 13

0
0

20

40

60

80

Fig. 6 - Typical Gate Charge vs. Gate-to-Source Voltage

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1.0

1.2

1.4

1.6

102
10 s
100 s
10
1 ms

TC = 25 C
TJ = 150 C
Single Pulse
10

100

QG, Total Gate Charge (nC)

0.8

Operation in this area limited


by RDS(on)

VDS = 400 V
VDS = 250 V

0.6

Fig. 7 - Typical Source-Drain Diode Forward Voltage

ID = 20 A

16

0.4

VSD, Source-to-Drain Voltage (V)

91234_07

Fig. 5 - Typical Capacitance vs. Drain-to-Source Voltage

VGS, Gate-to-Source Voltage (V)

VGS = 0 V

0.1
1

91234_06

25 C

20

150 C

10

91234_08

10 ms
102

103

104

VDS, Drain-to-Source Voltage (V)


Fig. 8 - Maximum Safe Operating Area

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IRFP460A, SiHFP460A
Vishay Siliconix
RD
VDS
VGS

ID, Drain Current (A)

20

D.U.T.

RG

+
- VDD
10 V

15

Pulse width 1 s
Duty factor 0.1 %

10

Fig. 10a - Switching Time Test Circuit


VDS

90 %

0
25

50

75

100

125

150

10 %
VGS

TC, Case Temperature (C)

91234_09

td(on)

Fig. 9 - Maximum Drain Current vs. Case Temperature

td(off) tf

tr

Fig. 10b - Switching Time Waveforms

Thermal Response (ZthJC)

0 0.5
0.1

0.2
0.1
0.05

PDM

0.02
0.01

10-2

t1

Single Pulse
(Thermal Response)

t2
Notes:
1. Duty Factor, D = t1/t2
2. Peak Tj = PDM x ZthJC + TC

10-3
10-5

10-4

10-3

10-2

0.1

t1, Rectangular Pulse Duration (S)

91234_11

Fig. 11 - Maximum Effective Transient Thermal Impedance, Junction-to-Case

VDS

15 V

tp
L

VDS

D.U.T.

RG

IAS
20 V
tp

Driver

+
A
- VDD

IAS
0.01

Fig. 12a - Unclamped Inductive Test Circuit

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Fig. 12b - Unclamped Inductive Waveforms

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IRFP460A, SiHFP460A

2400
ID
Top
8.9 A
13 A
Bottom 20 A

2000
1600
1200
800
400
0

620

VDSav, Avalanche Voltage (V)

EAS, Single Pulse Avalanche Energy (mJ)

Vishay Siliconix

600

580

560

540
25

50

75

100

125

Starting TJ, Junction Temperature (C)

91234_12c

150

Fig. 12c - Maximum Avalanche Energy vs. Drain Current

16

12

20

IAV, Avalanche Current (A)

91234_12d

Fig. 12d - Typical Drain-to-Source Voltage vs.


Avalanche Current

Current regulator
Same type as D.U.T.
50 k

QG

10 V

12 V

0.2 F
0.3 F

QGS

QGD

D.U.T.

VG

VDS

VGS
3 mA

Charge
IG
ID
Current sampling resistors

Fig. 13a - Basic Gate Charge Waveform

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Fig. 13b - Gate Charge Test Circuit

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IRFP460A, SiHFP460A
Vishay Siliconix

Peak Diode Recovery dV/dt Test Circuit


+

D.U.T.

Circuit layout considerations


Low stray inductance
Ground plane
Low leakage inductance
current transformer

+
-

RG

dV/dt controlled by RG
Driver same type as D.U.T.
ISD controlled by duty factor "D"
D.U.T. - device under test

Driver gate drive


P.W.

Period

D=

+
-

VDD

P.W.
Period
VGS = 10 V*

D.U.T. ISD waveform


Reverse
recovery
current

Body diode forward


current
dI/dt
D.U.T. VDS waveform
Diode recovery
dV/dt

Re-applied
voltage

VDD

Body diode forward drop


Inductor current
Ripple 5 %

ISD

* VGS = 5 V for logic level devices


Fig. 14 - For N-Channel

Vishay Siliconix maintains worldwide manufacturing capability. Products may be manufactured at one of several qualified locations. Reliability data for Silicon
Technology and Package Reliability represent a composite of all qualified locations. For related documents such as package/tape drawings, part marking, and
reliability data, see http://www.vishay.com/ppg?91234.

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