Module3:IntroductiontoPICMicrocontrollers

Lecture23:AnalogtoDigitalConvertorModule
ADCModule
Ananalogtodigitalconverter(ADC)convertsananalogsignalintoanequivalentdigitalnumber.PIC16C74AhasaninbuiltADC
withthefollowingfeatures
8bitconversion
8analoginputchannels
Ananalogmultiplexer
Asampleandholdcircuitforsignalontheselectedinputchannel
Alternativeclocksourcesforcarryingoutconversion
Adjustablesamplingrate
Choiceofaninternalorexternalreferencevoltage
Interrupttomicrocontrolleronendofconversion
Port A and Port E pins are used for analog inputs/reference voltage for ADC. In A/D conversion, the input analog voltage is
digitizedandanequivalentdigitaloutputisgeneratedasshowninthefigure.

Fig23.1Digitaloutputversusanaloginput
PortApins(Alternatefunctions)
RA0/AN0canbeusedasanaloginput0
RA1/AN1canbeusedasanaloginput1
RA2/AN2canbeusedasanaloginput2
RA3/AN3/Vrefcanbeusedasanaloginput3oranalogreferencevoltage
RA4/TOCKIclockinputtoTimer0
RA5//AN4canbeusedforanaloginput4orslaveselectforthesynchronizedserialport.
PortEpins(Alternatefunctions)
RE0/
RE1/
RE2/

/AN5canbeusedasanaloginput5
/AN6canbeusedasanaloginput6
/AN7canbeusedasanaloginput7

PIC microcontroller has internal sample and hold circuit. The input signal should be stable across the capacitor before the
conversionisinitiated.

Fig23.2SampleandHoldCircuit
Afterwaitingforthesamplingtime,aconversioncanbeinitiated.TheADCCircuitwillopenthesamplingswitchandcarryoutthe
conversionoftheinputvoltageasitwasatthemomentofopeningoftheswitch.Uponcompletionoftheconversion,thesampling
switchisagainclosedandVHold onceagaintracksVSource .
UsingtheA/DConverter
RegistersADCON1,TRISA,andTRISEmustbeinitializedtoselectthereferencevoltageandinputchannels.Thefirststepselects
theADCclockfromamongthefourchoices(fosc/2,fosc/8,fosc/32,andRC).Theconstraintforselctingclockfrequencyisthatthe
ADCclockperiodmustbe1.6microsecondsorgreater.
TheA/Dmodulehas3registers.Theseregistersare:
A/Dresultregister(ADRES)
A/Dcontrolregister0(ADCON0)
A/Dcontrolregister1(ADCON1)
TheADCON0register,whichisshownbelow,controlstheoperationofA/Dmodule.

Fig23.3ADCON0register
Bit76A/DClockselectbits
ADCS1:ADCS0
00=fosc/2
01=fosc/8
10=fosc/32
11=fRCclockderivedfromaninternalRCoscillator
Bit53A/DChannelSelect
CHS2:CHS0
000Channel0AN0
001Channel1AN1
010Channel2AN2
011Channel3AN3
100Channel4AN4
101Channel5AN5
110Channel6AN6
111Channel7AN7
Bit2A/Dconversionstatusbit
GO/
ifA/DConverterisenabled(ie.ADON=1)then
IfGO/
=1,A/Dconversionisinprogress
(settingthisbitstartsA/Dconversion)
IfGO/
=0,A/Dconversionisnotinprogress
(ThisbitisautomaticallyclearedbyhardwarewhenA/Dconversioniscomplete)
Bit1Unimplemented
Bit0ADON:A/DOnbit
1. A/DConvertermoduleisON
2. A/DConvertermoduleisOFF
ADCON1Register
Thisregisterspecifiestheanaloginputs

Fig23.4ADCON1register
PCFG2:PCFG0

RA0

RA1

RA2

RA5

RA3

RE0

RE1

RE2

VREF

000

VDD

001

VREF

RA3

010

VDD

011

VREF

RA3

100

VDD

101

VREF

RA3

11X

Fig23.5PCFG2:PCFG0=A/DPortconfigurationcontrolbits
A=Analoginput
D=DigitalI/O

Fig23.6SchematicdiagramofA/Dconvertoranaloginputsandreferencevoltage
StepsforA/Dconversion
1. ConfigureA/Dmodule
Configureanaloginputs/voltagereferenceanddigitalI/O(ADCON1)
SelectA/DChannel(ADCON0)
SelectA/DConversionClock(ADCON0)
TurnonA/DModule(ADCON0)
2. ConfigureA/DInterrupt(Optional)
ClearADIFbitinPIR1register
SetADIEbitinPIE1register
SetGIEbit
3. Waitforrequiredacquisitiontime
4. StartConversionsetGO/

bit(ADCON0)

5. WaitforA/Dconversiontocomplete,byeitherpollingGO/
6. ReadA/Dresultregisters(ADRES).ClearADIFifrequired.
ExampleProgram
A/Dconversionwithinterrupt
org000H
gotoMainline
org020H
bsfSTATUS,RP0SelectBank1

bitorbywaitingfortheA/Dinterrupt

clrfADCON1ConfigureA/Dinputs
bsfPIE1,ADIEEnableA/Dinterrupt
bcfSTATUS,RP0SelectBank0
movlw081HSelectfosc/32,channel0,A/Don
movwfADCON0
bcfPIR1,ADIF
bsfINTCON,PEIEEnableperipheralandglobalinterruptbits
bsfINTCON,GIEinterruptbits
Ensurethattherequiredsamplingtimeoftheselectedinputchannelhasbeenelapsed.
Thenconversionmaybestarted.
bsfADCON0,GOStartA/Dconversion.
ADIFbitwillbesetandGO/
bitiscleareduponcompletionofA/Dconversion.
InterruptServiceRoutine
Org004H
MovfADRES,WResultofA/DconversioninW
ConsiderationofSamplingTime
Whenachannelisselected(writingtoADCON0),theswitch'SW'inFig23.8isclosed,changingCHOLDtoVSource .WhenA/D
conversionisstarted(settingGobitinADCON0),SWisopened.Thetimefromtheclosureof'SW'tillthevoltageacrossCHOLD
(Vo )reachesVSource istheminimumsamplingtimeTs.TheactualsamplingtimecanbehigherthanTs.
ThegraphbetweenTsandsourceresistanceRSource isshowninFig23.7.+

Fig23.7Relationbetweensamplingtimeandsourceresistance

Fig23.8SamplingcircuitinthePICC
RssistheresistanceofthesamplingswitchSW'andCHold isthechargeholdingcapacitance.CHold isnearly50pF.RSource isthe
impedanceoftheexternalanalogsourceVsource.OncetheswitchSW'isclosed,thecapacitorCholdtakessometimetocharge
up. This time it is called the sampling time (Ts). This time varies linearly with RSource as shown. The recommended value of
impedanceoftheexternalanalogsource,Vsource,islessthan10k.
ThecircuitinFig23.8isafirstorderRCcircuit.WhenSWisclosed,Vo variesasshowninFig23.9.

Fig23.9

FromFig23.9,
Ts=5 =5(Rsource +Rss)CHOLD
=5RssCHOLD+5Rsource CHOLD
HencesamplingtimeTsvarieslinearlywithRSource asshowninFig23.7.