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7 Adaptive Filtering
In this section we will implement some simple adaptive signal processing. In
particular, issues related to implementation in FPGAs are considered. In the first
exercises we will design a fully parallel adaptive FIR filter. In particular we will
take note of the feedback that is present and how this means that there is a large
critical path.
Exercise
7.1 Standard Parallel Adaptive LMS Filter
Open the system:
\adaptive\lms1\lms1.mdl
This system implements the update equation for the complete adaptive
structure
w0 ( k )
w0 ( k 1 )
x(k)
w1 ( k )
w1 ( k 1 )
=
+ 2e ( k ) x ( k 1 )
x(k 2)
w2 ( k )
w2 ( k 1 )
x(k 3)
w3 ( k )
w3 ( k 1 )
The implementation maps the structure shown below:
x(k)
z-1
z-1
z-1
w0(k-1)
w1(k-1)
w2(k-1)
w3(k-1)
y(k)
d(k)
z-1
z-1
z-1
z-1
e(k)
2
x(k)
z-1
z-1
z-1
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(a) Run the simulation and confirm the filter weights converge to the desired
solution for this system identification.
(b) Change the set of weights in the unknown system and run the simulation.
Does the filter still converge?
ANSWER:
(c) Reduce the step size by a factor of 10 and run the simulation again, what
can you observe? Do the weights converge? You may want to increase
the number of samples in this simulation.
Answer:
(d) In the above LMS signal flow graph indicate the critical path.
(e) Using System Generator, target the XC2VP30 device (available on the
board used in this course). Note that the XC2V40 only has 4 multipliers
and hence is not big enough for this design. Once the HDL has been
generated, synthesise and implement the design using the usual
procedure with the ISE tools. This may take several minutes to complete
so be patient!
(f) Complete the table below.
Report
Result
Value
Number of BUFGXMUXs
Place and Route
Report
Minimum Period
Maximum Frequency
Exercise
7.2 Non canonical LMS implementation
Open the system:
\adaptive\LMS_transpose\LMS_transpose.mdl
This system implements the non canonical LMS structure. Remember that the
reason for using the transpose FIR is because it presented some advantages
when implemented in FPGAs in terms of critical path. However most
importantly note that the integrity of the algorithm has been slightly changed
and is NOT identical to the standard LMS (in fact it is sub-optimal).
In this example we present an LMS implementation in which we have
introduced the transpose FIR structure instead of the canonical. The resulting
implementation of the LMS is called the non-canonical LMS and is shown in
the figure below.
7 Adaptive Filtering
97
x(k)
y(k)
d(k)
w0(k-1)
w1(k-1)
w2(k-1)
z-1
z-1
z-1
w3(k-1)
z-1
z-1
z-1
z-1
e(k)
2
x(k)
z-1
z-1
z-1
(a) Check the configuration in the provided System Generator file and confirm
it implements the structure shown above.
(b) Run the simulation and confirm the filter weights converge to the desired
solution.
(c) Using the ISE tools, complete the table below taking particular note of the
Maximum clock frequency which should be higher than the previous design
due to the reduced critical path.
Report
Result
Value
Number of BUFGXMUXs
Place and Route
Report
Minimum Period
Maximum Frequency
Exercise
7.3 LMS Audio Using Configurable LMS Block
In this exercise a configurable LMS block is presented. The block is then tested
by using it in an audio example to filter out a sine wave.
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Input Width
Adders grow to
accommodate
integer bit growth
z-1
z-1
y(k)
d(k)
Coefficient Width
Error Width
z-1
z-1
z-1
Step Width
Error
-1 + Input Width
-1
z