Professional Documents
Culture Documents
com
FAN8026G3
Description
28-SSOPH-375SG3
Typical application
Ordering information
Device
Package
Operating
temp
FAN8026G3
FAN8026G3Xnote1
Notes:
1. X : Tape&Reel
2. NL : Lead free
Rev. 1.0.0
2004 Fairchild Semiconductor Corporation
FAN8026G3
Pin Assignments
DO5-
DO5+
28
27
DO4-
26
DO4+
25
VM2
MUTE
REF
24
23
22
FIN
IN3
OUT3
21
20
SVCC
DO1+
DO1-
DO2+
18
17
16
19
DO2-
15
FAN8026G3
OPIN+
OPIN-
3
OPOUT
IN5
OUT5
IN4
OUT4
FIN
10
11
12
13
GND
IN2
OUT2
IN1
VM1
DO3+
14
DO3-
FAN8026G3
Pin Definitions
Pin Number
Pin Name
I/O
OPIN+
OP-AMP Input(+)
OPIN-
OP-AMP Input(-)
OPOUT
OP-AMP Output
IN5
OUT5
IN4
OUT4
GND
Ground
IN2
10
OUT2
11
IN1
CH1 Input
12
VM1
13
DO3+
14
DO3-
15
DO2-
16
DO2+
17
DO1-
18
DO1+
19
SVCC
20
OUT3
21
IN3
22
REF
23
MUTE
MUTE(CH2,3,4,5)
24
VM2
25
DO4+
26
DO4-
27
DO5+
28
DO5-
FAN8026G3
OPIN+ 1
OPIN-
3 OPOUT
SVCC
OUT5
IN5
VM2
10K
27 DO5+
10K
Level Shift
28 DO5-
24 VM2
SVCC
VM2
IN4
SGND
10K
25 DO4+
10K
Level Shift
OUT4
26 DO4-
FIN
FIN
TSD
SVCC
VM1
OUT3 20
21
13 DO3+
10K
Level Shift
IN3
10K
14 DO3-
SVCC
VM1
10
IN2
12 VM1
10K
16 DO2+
10K
Level Shift
OUT2
15 DO2MUTE 23
CH2,3,4,5
SVCC
SVCC
22
IN1
11
Level Shift
REF
19 SVCC
10K
18 DO1+
17 DO1-
FAN8026G3
Equivalent Circuits
BTL CH1 Input
SVCC
SVCC
SVCC
11
21
SVCC
1K
100
1K
1K
SVCC SVCC
20K
10 20
17
18
30K
SVCC VM1
SVCC VM2
20K
30K
20K
13 14
25 26
15 16
27 28
30K
FAN8026G3
REF
SVCC
SVCC
50
40K
22
23
Op-amp Input
VM2
VM2 VM2
2
1K
Op-amp Output
VM2
1
1K
40K
40K
40K
VM2
1K
SVCC
FAN8026G3
Symbol
Value
Unit
SVCC
15
VM1
15
VM2
15
2.5
PD
note1,2,3
Operating temperature
TOPR
35 ~ +85
Storge temperature
TSTG
55 ~ +150
Notes:
1. When mounted on glass epoxy PCB (76 114 1.6mm)
2. Power dissipation is reduced at the rate of -20mW/C for TA25C.
3. Do not exceed Pd and SOA(Safe Operating Area).
Pd (mW)
3,000
2,000
SOA
1,000
0
25
50
75
100
125
150
175
Symbol
Min.
Typ.
Max.
Unit
Supply voltage1
SVCC
4.5
13.2
Supply voltage2
VM1
4.5
SVCC
Supply voltage3
VM2
4.5
SVCC
FAN8026G3
Electrical Characteristics
(Unless otherwise specified, Ta=25C, SVCC=8V, VM1=5V, VM2=5V, Vref=1.65V)
Parameter
Symbol
Conditions
Min.
Typ.
Max.
Unit
21
mA
12
mA
2.0
0.5
Pin22=Variation
0.4
Pin22=Variation
1.0
1.0
3.3
-50
+50
mV
6.5
VIN=100mVpp, f=1kHz
10
12
14
dB
VIN=1.65V
-50
+50
mV
3.6
4.0
note1
ICC1
MUTE Off
note1
MUTE on voltage
ICC2
Vmon
Pin23=Variation
Vmoff
Pin23=Variation
Vrmon
Vrmoff
Vrefin1
Quiescent current 1*
Quiescent current 2*
MUTE On
VOF1
Vom1
Gvf1
VIN=1.65V
-
VOF2,3,4,5
Vom2,3,4,5
Gvf2,3,5
VIN=100mVpp, f=1kHz
10.5
12.5
14.5
dB
Gvf4
VIN=100mVpp, f=1kHz
11.5
13.5
15.5
dB
-10
+10
mV
IB1
300
nA
SVCC=8V
VOH1
VOL1
0.5
ISINK1
mA
ISOU1
0.5
mA
Vicm1
-0.3
7.0
75
dB
RR1
65
dB
SR1
f=120Hz, 2Vp-p
V/us
note1
note1
Slew rate1*
Note:
1.Guaranteed field. ( No EDS/ Final test . )
VOF1
GVO1
FAN8026G3
Symbol
Conditions
Min.
Typ.
Max.
Unit
VOF2
IB2
-10
+10
mV
300
nA
4.5
VM2=5V
VOH2
VOL2
0.5
ISINK2
mA
ISOU2
0.5
mA
note1
Slew rate
Vicm1
-0.3
4.0
75
dB
RR2
65
dB
SR2
f=120Hz, 2Vp-p
V/us
GVO2
Note:
1.Guaranteed field. ( No EDS/ Final test . )
FAN8026G3
Application information
1. MUTE Function
When the mute pin is low(GND), the TR Q1 is turned on and the bias
circuit is enabled. On the other hand, when the mute pin is high , the TR
Q1 is turned off and the bias circuit is disabled.
Bias Current
CH2,3,4,5
23
It will make all the circuit blocks except CH1 off, so low power quiescent state can be established.
Truth table is as follows
Pin 23
FAN8026
High
Mute-On
Low
Mute-Off
Q1
2. TSD Function
When the chip temperature reaches to 175C by abnormal condition,
the TSD circuit is activated
This makes the bias current of the output drivers shut down, and all
the output drivers are on cut-off state. Therefore the chip temperature
begins to decrease.
When the chip temperature falls to 155C, the TSD circuit is
deactivated and the output drivers start to operate normally.
SVCC
IREF
R1
Q0
R2
Hysteresis
Ihys
R3
3. Notice
If REF(pin23) is lower than 0.7V, BTL output is off.
Under voltage protecton function. ( If SVcc is lower than 3.8V, Chip is disable. Hysterisis is 0.2V)
Mute on BTL output voltage is as followed:
- Mute on BTL output(CH2,3,4,5) = VM / 2
- Mute on BTL output CH1 = ((PVcc2-0.6) / 2
Each output to output and output to GND short should be kept away.
10
Output driver
Bias
FAN8026G3
15
16
DO2+
DO3+
13
17
DO1-
VM1
12
18
DO1+
IN1
11
19
SVCC
OUT2
10
20
OUT3
IN2
21
IN3
GND
FIN
8V
OUT4
IN4
OUT5
DO4+
IN5
26
DO4-
OPOUT
27
DO5+
OPIN-
28
DO5-
OPIN+
22
REF
23
MUTE
24
VM2
Focus
Actuat
or
25
Trackin
g
Actuato
r
SPINDLE
SLED
FOCUS
TRACKING
MUTE
5V
VREF
S led
Motor
5V
LOADING
Loadin
g
Motor
FIN
14
DO3-
DO2-
FAN8026G3
Spindl
e
Motor
SERVO
11
FAN8026G3
SW2
21
20
19
18
17
16
DO2+
SW3
V
DO4+
VM2
MUTE
REF
DO3+
DO4-
DO1-
DO5+
FIN
VM1
22
DO1+
23
IN1
24
OUT4
25
IN2
26
GND
27
DO5-
28
10
11
12
13
15
DO2-
SVCC
OUT3
IN3
SW4
SW5
Test Circuits
FIN
DO3-
IN5
OUT4
OPOUT
IN4
OPIN-
OUT5
OPIN+
FAN8026G3
14
V
IN-
OP-AMP
OUT
A
IN+
SW6
v
OP-AMP
INSW7
OUT
SW8
SW9
12
SW1
IN+
FAN8026G3
Package Dimension
28-SSOPH-375-SG2
13
FAN8026G3
DISCLAIMER
FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY
PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY
LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER
DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS.
LIFE SUPPORT POLICY
FAIRCHILDS PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES
OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD SEMICONDUCTOR
CORPORATION. As used herein:
1. Life support devices or systems are devices or systems
which, (a) are intended for surgical implant into the body,
or (b) support or sustain life, and (c) whose failure to
perform when properly used in accordance with
instructions for use provided in the labeling, can be
reasonably expected to result in a significant injury of the
user.
www.fairchildsemi.com
3/17/04 0.0m 001
Stock#DSxxxxxxxx
2004 Fairchild Semiconductor Corporation