ANNA UNIVERSITY COIMBATORE-SYLLABUS

SEMESTER –VII

EMBEDDED SYSTEMS

UNIT I ARCHITECTURE OF EMBEDDED SYSTEMS

Categories of Embedded Systems-Specifications of Embedded systems-Resent trends in

Embedded Systems-Hardware Architecture-Software Architecture-Communication software-Process
of generation of executable image-development/testing tools.

UNIT II PROGRAMMING FOR EMBEDDED SYSTEMS

Getting the most of C-data types-manipulating bits in memory and I/O ports-accessing memory
mapped I/O devices – structures-variant access-mixing C to assembly-register usage-use of addressing
options-instruction sequencing –procedure call and return-parameter passing –retrieving parameters
memory management-scope-automatic allocation-static allocation-dynamic allocation-shared memory-
recognizing shared objects-reentrant functions-accessing shared memory device drivers- productivity
tools.

UNIT III HARDWARE PLATFORM

PIC microcontroller- Architecture of PIC 16c6x/7x- FSR- Reset action-Oscillatory

connection- Memory organization- Instructions- Addressing modes- I/O ports- Interrupts-Timers-
ADC- Assembly language programming.

UNIT IVREAL-TIME OPERATING SYSTEM CONCEPTS

Architecture of the Kernel-task and task scheduler-Interrupt Service Routines-Semaphores-Mutex-

Mailboxes-Message Queues-Event Registers-Pipes-Signals-Timers-Memory Management –
Priority Inversion Problem

UNIT V REAL-TIME OPERATING SYSTEM TOOLS

AND CASE STUDIES

Use of µC/OS-II- Case study of coding for an Automatic Chocolate Vending Machine using
MUCOS RTOS- Case study of an Embedded system for an Adaptive Cruise Control Systems in a
Car- Case study of an Embedded Systems for a Smart Card.

REFERENCES:

1.K.V.K.K.Prasad “Embedded /Real-Time Systems:Concepts,Design and

Programming”Dream tech,Wiley 2003.
2. Ajay V Deshmukh “Microcontroller Theory and Applications” Tata McGraw Hill 2005
3. Raj Kamal “Embedded Systems Architecture Programming and Design” 2nd Edition TMH,2008
4.David E Simon “An Embedded Software Primer ” Pearson Education 2003
5.Daniel 5.W Lewis, “Fundamentals of Embedded Software” Pearson Education-2001
6. Peatman “ Designing with PIC Micro Controller”,Pearson 2003
 DEPARTMENT OF ECE
Embedded System

Unit I
Part-A
1. What is an embedded system?
An embedded system can be defined as a computing device that does a
specific focused job. Applications such as the air conditioner, VCD player, printer,
fax achine...Etc are some of the examples of embedded system. Each of these
applications will have a processor and special hardware to meet the specific
requirement of the application along with embedded software that is executed by the
processor for meeting that specific requirement.

2. List the various application areas of embedded systems

Various application areas of embedded systems
 Consumer appliances
 Office automation
 Industrial automation
 Medical electronics
 Computer networking
 Telecommunication
 Wireless technologies
 Instrumentation
 Security
 Finance

3. What are the different categories of embedded system?

Based on the functionality and performance requirements, embedded systems
can be categorized as
 Stand-alone embedded system
 Real-time systems
 Networked information appliances
 Mobile devices

4. What are the specifications in designing embedded systems

As compared to desktop computers, workstations or mainframes, embedded
systems have many specialties. Developers need to keep these specialties in mind
while designing embedded systems
 Reliability
 Performance
 Power consumption
 Cost
  Size
 Limited user interface
 Software upgradation capability

5. List out the recent trends in embedded systems.

 Processor power
 Memory
 Operating systems
 Communication interface and networking capability
 Programming language
 Development tool

6. short notes on networked information appliances

Embedded systems that are provided with network interface and accessed by
network such as local area network or internet are called networked information
appliances. Such embedded systems are connected to a network, typically a network
running TCP/IP protocol suite, such as the internet or a company’s intranet. These
systems have emerged in recent years. These systems run the protocol TCP/IP stack
and get connected either through PPP or Ethernet to a network and communicate with
other nodes in network.

7. List the different types of processor architecture

Based on the number of memory and data buses used , there are three types of
architecture for processor.
 Von Neumann architecture
 Harvard architecture
 Super Harvard architecture

8. Write short notes on Van Neumann Architecture?

The von Neumann architecture is a design model for a stored-program digital
computer that uses a central processing unit (CPU) and a single separate storage
structure ("memory") to hold both instructions and data.
9. Write short notes on Harvard architecture?
In this architecture, there are separate memories blocks, one is program
memory and the other is data memory. Program memory stores only instructions and
data memory stores only data. Two pairs of data buses are used between CPU and the
memory blocks.
 Program memory address bus and program memory data buses are used o
access the program memory
 Data memory address bus and data memory data buses are used o access
the data memory

10. Write short notes on super Harvard architecture

The super Harvard architecture (SHARC) a slight bu significant modification
of the Harvard architecture. In Harvard architecture, the data memory is accessed
more frequently than the program memory. Therefore, in SHARC, provision has been
made to store some secondary data in the program memory to balance the load on
both memory blocks.

11. Explain about CISC

Processors are divided into the following categories
 Complex instruction set computer (CISC)
 Reduced instruction set computer (RISC)
CISC: is characterized by its large instruction set. A large number of
instructions are available to program the processor. So, the number of instruction
required to do a job is very less and hence less memory is required. The number of
registers in CISC processor is very small. The aim of designing CISC processor is to
reduce the software complexity by increasing the complexity of the processor
architecture.

12. Explain about RISC

Processors are divided into the following categories
 Complex instruction set computer (CISC)
 Reduced instruction set computer (RISC)
RISC is characterized by its limited number of instructions. A complex
instruction is obtained as a sequence of simple instructions. So, in RISC processor the
software is complex but the processor architecture is simple. However large numbers
of registers are required in RISC processors, which are of small size and consume less
power.

13. Explain about watchdog timer

Watchdog timer is used to reset the processor automatically if it does not
receive a signal periodically from the processor indicating its healthy status. This
mechanism obviates the need for a reset button on the embedded system

14. Short notes on Chip select

As many peripherals share a common bus, the processor must be able to
uniquely identify a peripheral to communicate with it. The processor performs this
 identification using a signal called chip slect. The chip select signal is available to all
the peripherals connected to the bus.

15. List out the different types of memory

Memory chips are classified as:
 Random Access Memory
 Read – Only Memory
 Hybrid Memory

16. List out the different communication interface used in embedded system
For embedded systems to intract with the external world, a nymber of
communication interface are provided. These are:
 Serial interface
 Universal serial bus
 Infrared
 Ethernet
 Wireless interface on ieee 802.11 wireless lan standard
 Bluetooth radios interface

17. What are the different categories of embedded operating system

Operating system used in embedded system can be broadly divided into the
following categories
 Non-real-time embedded operating system
 Real-time operating system
 Mobile/handheld operating system

18. List out the TCP/IP protocol suite

The TCP/IP protocol suit consist of 5 layer
 Physical layer
 Data link layer(referred also as network layer)
 Internet protocol (IP) layer
 Transport layer
 Application layer
19. Write short note on data link layer
This layer is defined as the protocol to manage the links-establishing a link,
transferring the data received from the upper layers, and disconnecting the link. In
local area networks, the data link layer is divided into two sub layers:
 Medium access control sub layer
 Logical link control sub layer

20. Write short notes on transport layer

This layer provides end-to-end data transfer service between two systems
connected to the internet. Since IP layer does not provide a reliable service, it is the
responsibility of the transport layer to incorporate through acknowledgements,
retransmissions, etc. the transport layer software runs on every end system.
Part B
1. Explain the hardware architecture of an embedded system
2. Explain the internal architecture of a processor
3. List the difference types of memory and explain their differences
4. Explain the TCP/IP protocol suite
5. Explain the process of generating an executable image for embedded system.
6. Explain the software development tools.
7. What are the different categories of embedded system
8. Explain about the communication software.

Unit II
Part A

1. Explain about data types in C

All C Compilers accept the following fundamental data types
1. Integer int
2. Character char
3.
Floating Point float
Double precision floating
4. double
point
5. Void void
The size and range of each data type is given in the table below
Size and Range of Data Types on 16 bit machine.
SIZE (Bits) Range
TYPE
Char or Signed Char 8 -128 to 127

Unsigned Char 8 0 to 255

Int or Signed int 16 -32768 to 32767

Unsigned int 16 0 to 65535

 Short int or Signed short int 8 -128 to 127

Unsigned short int 8 0 to 255

Long int or signed long int 32 -2147483648 to 2147483647

Unsigned long int 32 0 to 4294967295

2. Explain about manipulating bits in memory.

3. How testing a bit will be made?

4. How setting a bit will be made?

5. How clearing of a bit will be made?

6. How inverting a bit will be made?

7. How to extract a bit

8. How to insert a bit

9. Explain about the structures

10. Explain about UNIONS

11. What is life time?

12. Explain about automatic allocation

13. Explain the static allocation

14. Explain about dynamic allocation

15. Short note on fragmentation

 Part B

1. Explain about manipulating the bit in memory

2. Explain about manipulating the bit in I/O ports
3. Explain structures and variant access
4. Explain the instruction sequence.
5. Explain the PROCEDURE CALL/RETURN
6. Explain parameter passing and retrieving parameter
7. How to access the shared memory.

Unit III
Part A

1. Short notes on PIC microcontroller

PIC is a family of Harvard architecture microcontrollers made by Microchip
Technology, derived from the PIC1640 originally developed by General Instrument's
Microelectronics Division. The name PIC initially referred to "Programmable
Interface Controller".

2. Short notes on status register of PIC16c6x controller

0 0 RPO TO PD Z DC C

STATUS register contains the flags and register bank select bits:
RPO – Register bank select, to select 2 banks one bit RPO is sufficient
TO – reset status bit, is only readable (time out bit)
PD – reset status bit, is only readable (Power down bit)
Z – Zero bit
DC – digital carry/borrow bit
C – carry/borrow bit

3. What is FSR
FSR(File Selection register): FSR is the pointer used for indirect memory
addressing in the whole register file. It must be noted that, in PIC,every instruction
that can be used for direct addressing may also be used in a different way for indirect
addressing. The only difference in indirect addressing mode is that one has to write
the address byte in FSR and then use INDF in the instruction. Thus, FSR points to the
desired memory location.

4. List the reset action takes place in PIC

PIC reset action takes place due to difference mechanism. Those are Power –
on – reset (POR), MCLR reset during the normal operation, master clear MCLR reset
 during SLEEP mode, watch dog timer reset during normal operation, brown – out –
reset (BOR).

5. Explain in brief about PIC oscillator connections.

6. Short notes on addressing modes of PIC controller

Direct Addressing: It uses 7 bits of instruction and the 8thbit from RP0.If bit
is 0 then bank 0 otherwise bank 1.
Indirect addressing: In this mode the 8 bit address of the location in register
file to be accessed is written in FSR and use INDF.

7. Short notes on I/O ports of PIC microcontroller

Port A: RA0 to RA4 (5 lines) (Address 05).RA4 has alternate function.
TRISA (85H).is SFR used to configure these lines individually as either inputs or
outputs. Setting bit in TRIS will configure as input and 0 will configure as output.
Port B: RB0 to RB7 (8 lines).TRISB It has weak internal pull up which is to
be enabled.POR disables pull ups.

8. Explain about the interrupts in PIC

We are having 3Interrupt Sources for 16C6x.
External Interrupt–Due to external source. Edge Sensitive RB0/INT
causes this interrupt. This interrupt wakes up processor from SLEEP. This
must be set before going into SLEEP mode.
Timer 0–Timer 0 overflows. FF to 00 overflows.
 Port B Change Interrupt–A change from high to low or low to high on
port B pins RB4 to RB7 causes this interrupt. This interrupt can wake device
from SLEEP.

9. Write short notes on timers

All PIC16C6X devices have three timer modules except for the PIC16C61,
which has one timer module The Timer0 module is a simple 8-bit overflow counter.
The clock source can be either the internal system clock (Fosc/4) or an external clock.
When the clock source is an external clock, the Timer0 module can be selected to
increment on either the rising or falling edge.

10. List out the types of instruction set

Each PIC16CXX instruction is a 14-bit word divided into an OPCODE which
specifies the instruction type and one or more operands which further specify the
operation of the instruction.
 Byte-oriented,
 Bit-oriented,
 Literal and control operations

11. Explain Byte oriented instruction set.

Byte-oriented instructions, 'f' represents a file register designator and’d’
represents a destination designator. The file register designator specifies which file
register is to be used by the instruction. The destination designator specifies where the
result of the operation is to be placed. If’d’ is zero, the result is placed in the W
register. If’d’ is one, the result is placed in the file register specified in the instruction.

12. Explain Bit oriented instruction set.

Bit-oriented instructions, 'b' represents a bit field designator which selects the
number of the bit affected by the operation, while 'f' represents the number of the file
in which the bit is located.
13. Short note on literal and control operation instruction
Literal and control operations, 'k' represents an eight or eleven bit constant or
literal value.

14. Write short notes on INTCON register of PIC16c6x/7x controller

15. Write short notes on OPTION register of PIC16c6x/7x controller

16. Explain about ADC in PIC16c71 controller

The analog-to-digital (A/D) converter module has four analog inputs. The
A/D allows conversion of an analog input signal to a corresponding 8-bit digital
 number. The output of the sample and hold is the input into the converter, which
generates the result via successive approximation. The analog reference voltage is
software selectable to either the device’s positive supply voltage (VDD) or the
voltage level on the RA3/AN3/VREF pin.

17. List the A/D module registers

The A/D module has three registers. These registers are:
 A/D Result Register (ADRES)
 A/D Control Register 0 (ADCON0)
 A/D Control Register 1 (ADCON1)

Part B

1. Draw the block diagram of PIC 16c6x/7x. Explain briefly

2. Explain about the memory organization of PIC
3. Write the classification of instruction set. Explain each.
4. Explain about the timers involved in PIC
5. Explain the interrupts of PIC
6. Explain about the analog –digital converter present in PIC16c71 controller

Unit –IV
Part A

1. What are the objects of an operating system kernel?

The various kernel objects are:
 Tasks
 Task scheduler
 Interrupt
 Semaphores
 Mutexes
 Mailboxes
 Message queues
 Pipes
 Event register
 Signals
 Timers

2. What are the various operations provided by the kernel objects?

The kernel provides various services through operation of the kernel objects.
These services are:
 Memory management
 Device management
 Interrupt handling
 Time management
3. List out the kernel’s own system tasks with priorities
In addition to the tasks required for the application software, the kernel has its
own system tasks with priorities:
 Startup task, which is executed when the operating system starts
 Exception handling task to handle the exception
 Logging task to log the various system messages
 Idle task, which will have the lowest priority and will run there is no other
task to run. This task ensures that the CPU is not idle

4. Short note on shared resource?

A resource which has to be shared by two or more tasks is called a shared
resource. To avoid data corruption, kernel objects such as semaphores and mutexes
are used for accessing shared resources in disciplined way.

5. List the task states?

A task can be in one of the three states:
 Running
 Ready – to – run
 Waiting

6. What is context switching?

The state of the CPU registers when a task has to be preempted is called the
context. Saving the contents of the CPU registers and loading the new task parameter
is called context switching.

7. How does the kernel decide which task has to run?

Various scheduling algorithms have been developed to tackle this problem.
Depending on the requirement of the embedded system, the scheduling algorithm
needs to be chosen. Some of the scheduling algorithms are:
 First in first out
 Round robin algorithm
 Round robin with priority
 Shortest job first
 Non preemptive multitasking
 Preemptive multitasking

8. Explain in brief about round robin algorithm

In round robin algorithm, each task waiting in the queue is given a fixed time
slice. The kernel gives control to the next task if the current task has completed its
work within the time slice or if the current task has completed its allocated time.

9. Explain in brief about shortest job first scheduling algorithm

In shortest job first scheduling algorithm, the task that will take minimum
time to be executed will be given priority. This approach satisfies the maximum
number of tasks, but some time tasks may have to wait forever.
10. Explain in brief about non- preemptive multitasking algorithm
Non-preemptive multitasking is also called cooperative multitasking sas the
tasks have to cooperate with one another to share the CPU time

11. List out the task management function calls

The various function calls provided by the operating system API for task
management are:
 Create a task
 Delete a task
 Suspend a task
 Resume a task
 Change priority of a task
 Query a task

12. Short notes on interrupt latency and interrupt response time.

Interrupt Latency: the maximum time for which interrupts the disabled + time
to start the execution of the first instruction in the ISR is called interrupt latency.
Interrupt Response Time: time between receipt of the interrupt signal and
starting the code that handles the interrupt is called interrupt response time.

13. Explain in brief about mutex

Mutex stands for mutual exclusion. Mutex is the general mechanism used for
both resource synchronization as well as task synchronization. Mutux exclusion can
be achieved through the following mechanisms
 Disabling the scheduler
 Disabling the interrupts
 By test and set operation
 Using semaphore

14. Explain in brief about event registers

1 0 1 0 1 1 1 1 0 1 1 1 0 1 1 1
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16

A task can have an event register in which the bits correspond to different
events. These 16 bit are divided into four portions corresponding to the events of
three tasks and one ISR.

15. List the event register management function calls

For managing the event register, the following function calls are provided:
 Create an event register
 Delete an event register
 Query an event register
 Set an event flag
 Clear an event flag
16. What’s the purpose of using timers?
Timers are used to measure the elapsed time of events. For inst5ance, the
kernel has to keep track of different time:
 A particular task may need to be executed periodically, say; every 10
msec. a timer is used to keep track of this periodicity
 A task may be waiting in a queue for an event to occur. If the event does
not occur for a specified time, it has to take appropriate action
 A task may be waiting in a queue for a shared resource. If the resource is
not available for a specified time, an appropriate action has to be taken.

17. Explain about the memory management

Memory management is the important service provided by the kernel. The
API provides the following function calls to manage memory:
 Create a memory block
 Get data from memory
 Post data in the memory
 Query a memory block
 Free the memory block

18. Short notes on priority inversion problem

Priority inversion problem arises when a high priority task has to wait while a
lower priority task executes. To overcome this problem, priority inheritance protocol
is used.

19. Difference between semaphores and mutex

Semaphores: A semaphore restricts the number of simultaneous users of a
shared resource up to a maximum number. Threads can request access to the resource
(decrementing the semaphore), and can signal that they have finished using the
resource (incrementing the semaphore).
Mutex: Mutexes are typically used to serialise access to a section of re-
entrant code that cannot be executed concurrently by more than one thread. A mutex
object only allows one thread into a controlled section, forcing other threads which
attempt to gain access to that section to wait until the first thread has exited from that
section

20. Explain about mail box

 Mailbox is a kernel object for inter task communication. A task posts a
message in the mailbox and another task will read the message.

Part B

1. What are the objects of an operating system kernel?

2. What is task scheduling? Explain the various scheduling algorithms.
3. Explain how a semaphores can be used for inter – task synchronization
4. Explain the architecture of kernel.
5. Explain the priority inversion problem.

Unit V
Part A

1. what are the inputs for the case study I AVCM

Inputs
 Coins of different denominations through a coin slot
 User commands

2. List out the signals, events and notifications of case study I AVCM

 A mechanical system directs each coin to its appropriate port− Port_1, Port_2
or Port_5.
 Each port generates an interrupt on receiving the coin at input.
 Each port interrupt starts an ISR, which increase value of amount collected by
1 or 2 or 5 and posts an IPC to a waiting task the system
 Each selected menu choice gives a notification to the system

3. what will be the output for case study I AVCM

 Chocolate and signal (IPC) to the system that subtracts the cost from the value
of amount collected
 Display of the menus for GUIs, time and date, advertisements, welcome and
thank messages

4. What are the design metrics of case study I AVCM

 Power Dissipation
 Performance
 Process Deadlines
 User Interfaces
 Engineering Cost
 Manufacturing Cost
5. Draw input and output ports of the AVCM

6. draw the block diagram of AVCM

7. What is cruise control?
Cruise control: a system that takes charge of controlling the throttle from the
driver and cruising the vehicle at preset and constant speed. May also maintain string
stability in case of multiple cars streaming through highway and in case of VIP
convoy.

8. Explain about adaptive cruise control.

Using an adaptive algorithm, ACC system maintains constant speed and can
be added string stability feature in case of multiple cars streaming on highway. String
stability─ maintaining inter-car distances constant. Cruise control relieves the driver
from that duty and the driver hands over the charge to the ACC. When (1) road
conditions are suitable (not wet or icy, or (2) there are no strong winds or fog), or (3)
car is cruising at high speed and when there is no heavy traffic. The driver resumes
the charge in adverse conditions

9. Draw the block diagram of ACC

10. Explain adaptive control.

An adaptive control─ algorithm used to adapt to the current status of control
inputs. Parameters adapt dynamically. In place of a constant set of mathematical
parameters in the algorithm equations, the parameter are continuously adapted to the
status at an instance
11. Draw the model for adaptive control algorithm

12. List out the signals, events and notifications of ACC for car

 User commands given as signals from switches/buttons. User control inputs

for ACC ON, OFF, Coast, resume, set/accelerate buttons
 Brake event (Brake taping to disable the ACC system, as alternative to
"cancel" button at front panel)
 Safe/Unsafe distance notification

13. what will be the output for ACC for car

 Transmitted pulses at regular intervals

 Alarms
 Flashed Messages
 Range and speed messages for other cars (in case of string stability mode)
 Throttle-valve and Brake control
 Output to pedal system for applying emergency brakes and driver
nonintervention for taking charge of cruising from the ACC system
14. Draw the smart card hardware architecture

15. explain the internal signals, events and notifications of smart card

 On power up, radiation-powered charge pump supply of the card activated

and a signal to start the system boot program at reset Task
 Card start request Header message to task_ReadPort from reset Task
 Host authentication request request Start message to task_ReadPort from
resetTask to enable requests for Port_IO
 On power up, radiation-powered charge pump supply of the card activated
and a signal to start the system boot program at resetTask
 Card start request Header message to task_ReadPort from resetTask
 Host authentication request requestStart message to task_ReadPort from
resetTask to
 enable requests for Port_IO

Part B

1. Draw and explain basic system of an Automatic chocolate vending system

2. Explain the case study of an embedded system for a smart card
3. Explain the case study of adaptive cruise control for car
4. Draw the state diagram of AVCM functions
5. Explain the synchronization model of smart card