11AK57

TABLE OF CONTENTS
1. INTRODUCTION .....................................................................................................4
1.1. Purpose ....................................................................................................................................4
1.2. Scope .......................................................................................................................................4
1.3. General Features .......................................................................................................................4
2. GENERAL DESCRIPTION .....................................................................................5

2.1. Introduction ..............................................................................................................................5
2.2. System Building Blocks...............................................................................................................5
2.2.1. AK57 Chassis Block Diagrams 5
2.2.1.1. Genaral ...................................................................................................................5
2.2.1.2. SMPS ......................................................................................................................6
2.2.1.3. DEFLECTION ...........................................................................................................6
2.2.2. AK57 Chassis Main Blocks 7
2.2.2.1. UOC-II (ULTIMATE-ONE-CHIP).................................................................................8
2.2.2.2. Audio ....................................................................................................................16
2.2.2.3. External AV I/O .....................................................................................................18
2.2.2.4. AV Switching .........................................................................................................19
2.2.2.4.1. MC74VHC4052 ..................................................................................................19
2.2.2.4.2. NLAST4599 .......................................................................................................21
2.2.2.5. TUNER..................................................................................................................23
2.2.2.6. SAW FILTERS ........................................................................................................25
2.2.2.6.1. K3958M (IF Filter for Video Applications).............................................................25
2.2.2.6.2. K9656M (IF Filter for Audio Applications) ............................................................25
2.2.2.6.3. K2966 (IF Filter for Intercarrier Applications).......................................................26
2.2.2.6.4. K2962 (IF Filter for Intercarrier Applications).......................................................26
2.2.2.6.5. G1975 (IF Filter for Intercarrier Applications) ......................................................27
2.2.2.7. SMPS ....................................................................................................................27
2.2.2.7.1. PRIMARY BLOCK ...............................................................................................27
2.2.2.7.1.1. SMPS CONTROLLER (NCP1207) ..........................................................................28
2.2.2.7.1.2. MOSFET............................................................................................................31
2.2.2.7.1.2.1. MTP3N60E ......................................................................................................31
2.2.2.7.1.2.2. MTP6N60E ......................................................................................................32
2.2.2.7.2. SECONDARY BLOCK...........................................................................................33
2.2.2.7.3. SMPS Block Diagram ..........................................................................................33
2.2.2.8. DEFLECTION .........................................................................................................34
2.2.2.8.1. HORIZANTAL DEFLECTION ................................................................................34
2.2.2.8.2. MD1803DFX ......................................................................................................34
2.2.2.8.3. FBT...................................................................................................................36
2.2.2.8.4. AN15524A (VERTICAL DEFLECTION OUTPUT).....................................................37
2.2.2.9. CRT BOARD ..........................................................................................................39
2.2.3. AK57 Chassis Scematics 42
2.2.3.1. Part1 ....................................................................................................................42
2.2.3.2. Part2 ....................................................................................................................43
2.2.3.3. Part3 ....................................................................................................................44
2.2.3.4. Part4 ....................................................................................................................45
2.2.4. DVD PLAYER 46
2.2.4.1. General Description ...............................................................................................46
2.2.4.1.1. MT1389D ..........................................................................................................46
2.2.4.1.2. SDRAM Memory Interface ..................................................................................46
2.2.4.1.3. Drive Interfaces.................................................................................................47
2.2.4.2. System Block Diagram and MT1389D Pin Description...............................................47
2.2.4.2.1. MT1389D Pin Description ...................................................................................47
2.2.4.2.2. 2.1 Sytem Block Diagram ...................................................................................56
2.2.4.3. Audio Output.........................................................................................................57
2.2.4.4. Audio DACS...........................................................................................................57
2.2.4.5. Video Interface......................................................................................................57
2.2.4.6. Flash Memory........................................................................................................58
2.2.4.7. Serial Eeprom Memory ...........................................................................................58
2.2.4.8. Audio Interface Audio Sampling Rate and PLL Component Configuration...................58
2.2.4.9. Scematics..............................................................................................................58
2.2.4.9.1. Part1 ................................................................................................................58
2.2.4.9.2. Part2 ................................................................................................................59
2.2.4.9.3. Part3 ................................................................................................................60
2.2.4.9.4. Part4 ................................................................................................................61
2.2.4.9.5. Part 5 ...............................................................................................................62
2.3. AK57 Service Menu ..................................................................................................................64
2.4. TUNER SETTINGS....................................................................................................................75
1. Introduction
1.1. Purpose
This document is prepared for the UOCII TV project and describes the whole system features
and operating principles to be used in hardware design phase.
The document is based on “Device Specification UOCII-Version 1.12” from Philips

Semiconductors.
Prior to hardware design start, all parties involved must agree with the contents of this
document.
1.2. Scope
The document covers detailed descriptions of 11AK56 chassis system building blocks.
1.3. General Features

11AK57 is a 90° / 50 Hz. chassis which is capable of driving 14” superflat and 15” realflat CRT’s .
The chassis will have the following main features;
• Remote Control
• 100 programs
• On Screen Display
• Mono
• Colour Standarts ; PAL, SECAM, NTSC,
• Transmission standarts ; B/G, L/L’ I/I’, DK,
• Teletext ; One pages,
• Multi-standard alignment free PLL tuning,
• DVD or DVIX Player
• DVB-T option
• Europe Scart
• Detachable headphone output option,
• Front or side or back AV input option,
• Back AV output option,
• Coaxial output for IDTV/DVB-T
• 2W (%10 THD),
• 90-270V 50Hz or 170V-270V 50Hz SMPS
• Less than 3W
• DVD-Video, DVD R/RW, CD-R/RW, CD-Audio and MP3 Audio, JPEG (Picture CD), Video CD
and its sub formats like CVD, SVCD, DVCD.
2. General Description
2.1. Introduction
This chapter describes system building blocks and their detailed descriptions.
2.2. System Building Blocks
2.2.1. AK57 Chassis Block Diagrams

2.2.1.1. Genaral
73
P2.0_PWM0 WP
71,72 EEPROM 5VSTB
I2C
SPDIF
SPDIF-OUT
18,19,
75 23,24
NLAST4599 P2.2_PWM1 IF IF
SW0
76
P2.3_PWM2 P0.6
6 SECAM
BLOCK
TUN-IF TUNER
IDTV30V
PORT
DVD12V
DVD3V3
DVD-IR
DVD5V
12V
33V
B+
5V
8V
22
AGC
33V
5V
DVD DVD-ON
80
P0.3_ADC0
16,17
VERTICAL DRIVE EHT
SW0 SW1 30
DVD-MONO HORIZANTAL DRIVE DEFLECTION
31
DVD-CVBS V1 HOR. FB
V2 42
DVD-SPDIF VOUT CVBS2 UOCII
V3
HEATER
V4
V+
A1
A2 28
AOUT AUDIO2
A3 56,57,58
RGB
IDTV30V
IDTV12V
A4 33 55
CRT BOARD RGB
4052 AUDEEM BLKIN
77
P2.4_PWM3
2822M
SW2
48
IDTV-CVBS NLAST4599 AUDOUT1 MONO
IDTV-MONO
78
IDTV-SPDIF P2.5_PWM4 MUTE MUTE
DVB-T
A12V
P3.2_ADC2
69
Rx P1.2_INT0
P3.3_ADC3
P3.1_ADC1
70
P1.0_INT1
Tx P1.3_T1
CVBS1O
P1.1_T0
74
IRQ P2.1_PWM0
P0.5
59,61,66
9,39
50
51
52
53
47
68
67
2
3
5
1
KEYBOARD
RCA-CVBS-IN
STB
LED
3V3STB
NC
TV-IR
8V
B+
RCA-MONO-IN
12V
RCA IN
DVD12V
IDTV12
SC-PIN8 A12V
SMPS
RGB-FB DVD5V
SC-R 5VSTB
Scart1
SC-G 3V3STB
SC-B DVD3V3
SC-CVBS-IN STB
SC-MONO-IN
SC-CVBS-OUT
SC-MONO-OUT
RCA-MONO-OUT
RCA-CVBS-OUT
11AK57
GENERAL BLOCK DIAGRAM
RCA OUT
2.2.1.2. SMPS
5 15
220V B+
50Hz
16
2
13
A12V
IDTV12V
14
1 DMAG VI 8 12
DVD12V
2 CONT_INT
NCP1207
3 6 8 11
I_SENSE VCC 12V
4 5
GND DRIVER
10
9V
TR.REG 3V3STB
7 9
TR.REG 5VSTB
6V
LDO DVD3V3
LDO DVD5V
11AK57
STB
SMPS BLOCK DIAGRAM
2.2.1.3. DEFLECTION
HORIZONTAL 30KV
HORIZONTAL
FOCUS
DRIVE
SCREEN
Horz.
Yoke
+33V
Lin.
Heater
+9V
+8V
+5V
-14V VERTICAL
+14V VERTICAL
30KV
CRT Heater G2 FOCUS

BOARD
TRANSISTORS
RGB
DRIVE
VERTICAL
VERTICAL AMPLIFIER VERTICAL
DRIVE AN5524A YOKE
2.2.2. AK57 Chassis Main Blocks

AK57 chassis main blocks are;
• UOCII : Microcontroller + Video Proccessor + Sound Proccessor + IF + Teletext

• AUDIO : Audio Amp.,
• EXT. AV I/O : Scart , AV input, AV output,
• AV SWITCHING : 4052, 4599
• TUNER : PLL Tuner
• SAW FILTERS
• SMPS : SMPS Controller, SMT, Bridge Rect., Line Filters
• DEFLECTION : FBT, HOT, Vertical Amplifier, Line Driver,
• CRT BOARD : RGB Amp. with transistors,
2.2.2.1. UOC-II (ULTIMATE-ONE-CHIP)
UOCII is composed of microcontroller, video proccessor, sound proccessor and IF blocks.
The various versions of the TDA955X H/N1 series combine the functions of a video processor
together with a microcontroller.The ICs are intended to be used in economy television receivers
with 90 and 110 degree picture tubes.
The ICs have supply voltages of 8V and 3.3V and they are mounted in a QFP 80 envelope.
The features are given in the following feature list.
FEATURES
TV-signal processor
• Multi-standard vision IF circuit with alignment-free PLL demodulator

• Internal (switchable) time-constant for the IF-AGC circuit
• The QSS and mono FM functionality are both available so that an FM/AM TV receiver can
be built without the use of additional ICs
• The mono intercarrier sound circuit has a selective
• FM-PLL demodulator which can be switched to the different FM sound frequencies
(4.5/5.5/6.0/6.5 MHz). The quality of this system is such that the external band-pass
filters can be omitted.
• The FM-PLL demodulator can be set to centre frequencies of 4.74/5.74 MHz so that a
second sound channel can be demodulated. In such an application it is necessary that an
external bandpass filter is inserted.
• The vision IF and mono intercarrier sound circuit can be used for the demodulation of
FM radio signals
• Video switch with 2 external CVBS inputs and a CVBS output. One of the CVBS inputs
can be used as Y/C input.
• 2 external audio inputs. The selection of the various inputs is coupled to the selection of
the CVBS signals
• Integrated chrominance trap circuit
• Integrated luminance delay line with adjustable delay time
• Switchable group delay correction in the CVBS path
• Picture improvement features with peaking (with switchable centre frequency,
depeaking, variable positive/negative overshoot ratio and video dependent coring),
dynamic skin tone control and blue-, black- and white stretching
• Integrated chroma band-pass filter with switchable centre frequency
• Switchable DC transfer ratio for the luminance signal
• Only one reference (12 MHz) crystal required for the m-Controller, Teletext- and the
colour decoder
• PAL/NTSC or multi-standard colour decoder with automatic search system
• Internal base-band delay line
• Indication of the Signal-to-Noise ratio of the incoming CVBS signal
• A linear RGB/YUV/YPBPR input with fast blanking for external RGB/YUV sources. The
synchronisation circuit can be connected to the incoming Y signal. The Text/OSD signals
are internally supplied from the
• m-Controller/Teletext decoder.
• RGB control circuit with ‘Continuous Cathode Calibration’, white point and black level off-
set adjustment so that the colour temperature of the dark and the light parts of the
screen can be chosen independently.
• Contrast reduction possibility during mixed-mode of OSD and Text signals
• Adjustable ‘wide blanking’ of the RGB outputs
• Horizontal synchronization with two control loops and alignment-free horizontal oscillator
• Vertical count-down circuit
• Vertical driver optimized for DC-coupled vertical output stages
• Horizontal and vertical geometry processing
• Horizontal and vertical zoom function for 16 : 9 applications
• Horizontal parallelogram and bow correction for large screen picture tubes
• Low-power start-up of the horizontal drive circuit
Microcontroller
• 80C51 m-controller core standard instruction set and timing

• 1 ms machine cycle
• 32 - 128Kx8-bit late programmed ROM
• 3 - 12Kx8-bit DataRAM (shared between Display, Acquisition and Auxiliary RAM)
• Interrupt controller for individual enable/disable with two level priority
• Two 16-bit Timer/Counter registers
• One 16-bit Timer with 8-bit Pre-scaler
• WatchDog timer
• Auxiliary RAM page pointer
• 16-bit Data pointer
• Stand-by, Idle and Power Down modes
• 14 bits PWM for Voltage Synthesis Tuning
• 8-bit A/D converter with 4 multiplexed inputs
• 5 PWM (6-bits) outputs for control of TV analogue signals
• 18 general I/O ports
Data Capture
• Text memory for 1 or 10 pages

• In the 10 page versions inventory of transmitted Teletext pages stored in the
Transmitted Page Table (TPT) and Subtitle Page Table (SPT)
• Data Capture for US Closed Caption
• Data Capture for 525/625 line WST, VPS (PDC system A) and Wide Screen Signalling
(WSS) bit decoding
• Automatic selection between 525 WST/625 WST
• Automatic selection between 625 WST/VPS on line 16 of VBI
• Real-time capture and decoding for WST Teletext in Hardware, to enable optimized m-
processor throughput
• Automatic detection of FASTEXT transmission
• Real-time packet 26 engine in Hardware for processing accented, G2 and G3 characters
• Signal quality detector for video and WST/VPS data types
• Comprehensive teletext language coverage
• Full Field and Vertical Blanking Interval (VBI) data capture of WST data
Display
• Teletext and Enhanced OSD modes

• Features of level 1.5 WST and US Close Caption
• Serial and Parallel Display Attributes
• Single/Double/Quadruple Width and Height for characters
• Scrolling of display region
• Variable flash rate controlled by software
• Enhanced display features including overlining, underlining and italics
• Soft colours using CLUT with 4096 colour palette
• Globally selectable scan lines per row (9/10/13/16) and character matrix [12x10, 12x13,
12x16 (VxH)]
• Fringing (Shadow) selectable from N-S-E-W direction
• Fringe colour selectable
• Meshing of defined area
• Contrast reduction of defined area
• Cursor
• Special Graphics Characters with two planes, allowing four colours per character
• 32 software redefinable On-Screen display characters
• 4 WST Character sets (G0/G2) in single device (e.g. Latin, Cyrillic, Greek, Arabic)
• G1 Mosaic graphics, Limited G3 Line drawing characters
• WST Character sets and Closed Caption Character set in single device
Optional Used ICs at AK57 chassis are TDA9550 H/N1, TDA9551 H/N1, TDA9552 H/N1.
FUNCTIONALOF TDA9550 H/N1
• TV range is 90°
• Mono intercarrier multi-standard sound demodulator (4.5 - 6.5 MHz) with switchable
centre frequency Audio switch
• Automatic Volume Levelling
• PAL decoder
• NTSC decoder
• ROM size 32 – 64K
• User RAM size 1K
• One page teletext
• Close Captioning
FUNCTIONALOF TDA9551H
• PAL decoder
• SECAM decoder
• NTSC decoder
FUNCTIONALOF TDA9552H
• QSS sound IF amplifier with separate input and AGC circuit
• AM sound demodulator without extra reference circuit
• PAL decoder
• SECAM decoder
• NTSC decoder
BLOCK DIAGRAM
PINING
2.2.2.2. Audio
The TDA2822 is DUAL LOW-VOLTAGE POWER AMPLIFIER.
• Supply voltage down to 1.8V

• Low crossover distorsion
• Low quıescent current
• Bridge or stereo configuration
ELECTRICALCHARACTERISTICS
Figure: Test Circuit (Stereo)

Figure: Test Circuit (Bridge)
Figure: Application in 11AK56

2.2.2.3. External AV I/O
SCART PINING
1. Audio right output 0.5Vrms / 1KΩ

2. Audio right input 0.5Vrms / 10KΩ
3. Audio left output 0.5Vrms / 1KΩ
4. Ground AF
5. Ground Blue
6. Audio left input 0.5Vrms / 10KΩ
7. Blue input 0.7Vpp / 75Ω
8. AV switching input 0-12VDC /10KΩ
9. Ground Green
10. Not Used
11. Green input 0.7Vpp / 75Ω
12. Not Used
13. Ground Red
14. Ground Blanking
15. Red input 0.7Vpp / 75Ω
16. Blanking input 0-0.4VDC, 1-3VDC / 75Ω
17. Ground CVBS output
18. Ground CVBS input
19. CVBS output 1Vpp / 75Ω
20. CVBS input 1Vpp / 75Ω
21. Ground
Front/Side/Back AV Input
Audio 0.5Vrms / 10KΩ
Video 1Vpp / 75Ω
Back AV Output
Audio 0.5Vrms / 1KΩ

Video 1Vpp / 75Ω
2.2.2.4. AV Switching
2.2.2.4.1. MC74VHC4052
The MC74VHC4052 utilize silicon--gate CMOS technology to achieve fast propagation delays,
low ON resistances, and low OFF leakage currents. These analog multiplexers/demultiplexers
control analog voltages that may vary across the complete power supply range (from VCC to
VEE).
The Channel--Select and Enable inputs are compatible with standard CMOS outputs; with pullup
resistors they are compatible with LSTTL outputs.
These devices have been designed so that the ON resistance (Ron) is more linear over input
voltage than Ron of metal--gate CMOS analog switches.
• Fast Switching and Propagation Speeds

• Low Crosstalk Between Switches
• Diode Protection on All Inputs/Outputs
• Analog Power Supply Range (VCC -- VEE) = 2.0 to 12.0 V
• Digital (Control) Power Supply Range (VCC -- GND) = 2.0 to 6.0 V
• Improved Linearity and Lower ON Resistance Than Metal—Gate Counterparts
• Low Noise
2.2.2.4.2. NLAST4599
The NLAST4599 is an advanced high speed CMOS single pole − double throw analog switch
fabricated with silicon gate CMOS technology. It achieves high speed propagation delays and
low ON resistances while maintaining low power dissipation. This switch controls analog and
digital voltages that may vary across the full power−supply range (from VCC to GND).
The device has been designed so the ON resistance (RON) is much lower and more linear over
input voltage than RON of typical CMOS analog switches.
The channel select input structure provides protection when voltages between 0 V and 5.5 V are
applied, regardless of the supply voltage. This input structure helps prevent device destruction
caused by supply voltage − input/output voltage mismatch, battery backup, hot insertion, etc.
Features
• Select Pin Compatible with TTL Levels

• Channel Select Input Over−Voltage Tolerant to 5.5 V
• Fast Switching and Propagation Speeds
• Break−Before−Make Circuitry
• Low Power Dissipation: ICC = 2 _A (Max) at TA = 25°C
• Diode Protection Provided on Channel Select Input
• Improved Linearity and Lower ON Resistance over Input Voltage
• Latch−up Performance Exceeds 300 mA
• ESD Performance: HBM > 2000 V; MM > 200 V
• Chip Complexity: 38 FETs
• Pb−Free Packages are Available
2.2.2.5. TUNER
Channel coverage of PLLTuner for VHF/UHF
OFF-AIR CHANNELS CABLE CHANNELS

BAND FREQUENCY FREQUENCY
CHANNELS RANGE (MHz) CHANNELS RANGE (MHz)
Low Band E2 to C 48.25 to 82.25 (1) S01 to S08 69.25 to 154.25
Mid Band E5 to E12 175.25 to 224.25 S09 to S38 161.25 to 439.25
High Band E21 to E69 471.25 to 855.25 (2) S39 to S41 447.25 to 463.25
(1). Enough margin is available to tune down to 45.25 MHz.
(2). Enough margin is available to tune up to 863.25 MHz.
Noise Typical Max. Gain Min. Typical Max.

Low band : 5dB 9dB All channels : 38dB 44dB 52dB
Mid band : 5dB 9dB Gain Taper (of-air channels): 8dB
High band : 6dB 9dB
Noise is typically 6dB for all channels. Gain is minimum 38dB and maximum 50dB for all
channels.
Terminals for External Connection
Electrical conditions
2.2.2.6. SAW FILTERS
2.2.2.6.1. K3958M (IF Filter for Video Applications)
Standard
• B/G
• D/K
• I
• L/L’
Pin configuration
1 Input
2 Input - ground
3 Chip carrier - ground
4 Output
5 Output
Features
• TV IF video filter with Nyquist slopes at 33.90 MHz and 38.90 MHz
• Constant group delay
2.2.2.6.2. K9656M (IF Filter for Audio Applications)
Standard
• B/G
• D/K
• I
• L/L’
Pin configuration
1 Input
2 Input - ground
4 Output
5 Output
Features
• TV IF audio filter with two channels

• Channel 1 (L’) with one pass band for sound carriers at 40,40 MHz (L’) and 39,75 MHz
(L’- NICAM)
• Channel 2 (B/G, D/K, L, I) with one pass band for sound carriers between 32,35 MHz
and 33,40 MHz
2.2.2.6.3. K2966 (IF Filter for Intercarrier Applications)
Standard
• B/G
• D/K
Pin configuration
1 Input
2 Input - ground
4 Output
5 Output
Features
• TV IF filter with Nyquist slope and sound shelf

• Broad sound shelf for sound carriers at 32,40MHz and 33,40 MHz
• Group delay predistortion
2.2.2.6.4. K2962 (IF Filter for Intercarrier Applications)
Standard
• B/G
• I
• L/L’
Pin configuration
1 Input
2 Input - ground
4 Output
5 Output
Features
• TV IF filter with two Nyquist slope and sound shelf

• Picture carriers at 33,90 MHz and 38,90 MHz
• Broad sound shelf at 15 dB level for sound carriers at 32,90 MHz and 33,40 MHz
• Constant group delay
2.2.2.6.5. G1975 (IF Filter for Intercarrier Applications)
Standard
• B/G
Pin configuration
1 Input
2 Input - ground
4 Output
5 Output
Features
• TV IF filter with Nyquist slope and sound shelf

• Picture carrier at 38.90MHz
• Reduced group delay predistortion as compared with standard B/G, half
2.2.2.7. SMPS
2.2.2.7.1. PRIMARY BLOCK
AC power applied via AC inlet, line filter components prevent chassis from incoming noise of AC
line, also prevents AC line against created noises by TV. Bridge rectifier and bulk capacitor
converts AC voltage to DC voltage. Applied DC voltage to primary winding is then swicthed via
MOSFET by primary controller in a controlled manner.
SMPS controller works on quasi-resonant PWM and gets first supply voltage from AC line (SMPS
Controller supply). Controller drives MOSFET according to feedback information supplied by
shunt regulator and opto-coupler, according to that information adjusts on-time of MOSFET for
required power. After the start-up in normal operation mode SMPS controller is supplied by SMT.
Primary block consist of following main parts,
AC Inlet (PL800),
Fuse (F800),
Varistor (R803),
Line Filter For EMC (C801,L800,C800),
SMPS Controller (IC806),
SMPS Controller supply for first Start-up (R807),
Bridge Rectifier (D820,D821,D822,D823),
Rectifier For SMPS Controller(D803),
Bulk Cap (C809),
Clamping Circuitry (R820, C810, C811, D824),
SMT (Switch Mode Transformer) (TR800),
SMT Driver MOSFET (Q802),
Current Sense Resistor (R828),
Protection Components for MOSFET Failure (D805,D806,R826)
2.2.2.7.1.1. SMPS CONTROLLER (NCP1207)
PWM Current-Mode Controller for Free Running Quasi-Resonant Operation
The NCP1207A combines a true current mode modulator and a demagnetization detector to
ensure full borderline/critical Conduction Mode in any load/line conditions and minimum drain
voltage switching (Quasi−Resonant operation). Due to its inherent skip cycle capability, the
controller enters burst mode as soon as the power demand falls below a predetermined level. As
this happens at low peak current, no audible noise can be heard. An internal 8.0 _s timer
prevents the free−run frequency to exceed 100 kHz (therefore below the 150 kHz CISPR−22
EMI starting limit), while the skip adjustment capability lets the user select the frequency at
which the burst foldback takes place.
The Dynamic Self−Supply (DSS) drastically simplifies the transformer design in avoiding the use
of an auxiliary winding to supply the NCP1207A. This feature is particularly useful in applications
where the output voltage varies during operation (e.g. battery chargers). Due to its
high−voltage technology, the IC is directly connected to the high−voltage DC rail. As a result,
the short−circuit trip point is not dependent upon any VCC auxiliary level.
The transformer core reset detection is done through an auxiliary winding which, brought via a
dedicated pin, also enables fast Overvoltage Protection (OVP). Once an OVP has been detected,
the IC permanently latches off.
Finally, the continuous feedback signal monitoring implemented with an overcurrent fault
protection circuitry (OCP) makes the final design rugged and reliable.
Features
• Free−Running Borderline/Critical Mode Quasi−Resonant Operation
• Current−Mode with Adjustable Skip−Cycle Capability
• No Auxiliary Winding VCC Operation
• Auto−Recovery Overcurrent Protection
• Latching Overvoltage Protection
• External Latch Triggering, e.g. Via Overtemperature Signal
• 500 mA Peak Current Source/Sink Capability
• Undervoltage Lockout for VCC Below 10 V
• Internal 1.0 ms Soft−Start
• Internal 8.0 _s Minimum TOFF
• Adjustable Skip Level
• Internal Temperature Shutdown
• Direct Optocoupler Connection
• SPICE Models Available for TRANsient Analysis
• Pb−Free Package is Available Typical Applications
• AC/DC Adapters for Notebooks, etc.
• Offline Battery Chargers
• Consumer Electronics (DVD Players, Set−Top Boxes, TVs, etc.)
• Auxiliary Power Supplies (USB, Appliances, TVs, etc.)
Typical Application:
Internal Circuit Architecture
2.2.2.7.1.2. MOSFET
The MTP3N60E used for voltage range 170-270V, The MTP6N60E used for voltage range 90 –
270V.
2.2.2.7.1.2.1. MTP3N60E
N–Channel Enhancement–Mode Silicon Gate
This advanced high voltage TMOS E–FET is designed to with stand high energy in the
avalanche mode and switch efficiently. This new high energy device also offers a drain–to–
source diode with fast recovery time. Designed for high voltage, high speed switching
applications such as power supplies, PWM motor controls and other inductive loads, the
avalanche energy capability is specified to eliminate the guesswork in designs where inductive
loads are switched and offer additional safety margin against unexpected voltage transients.
Avalanche Energy Capability Specified at Elevated Temperature

Low Stored Gate Charge for Efficient Switching
Internal Source–to–Drain Diode Designed to Replace External Zener Transient Suppressor —
Absorbs High Energy in the Avalanche Mode
Source–to–Drain Diode Recovery Time Comparable to Discrete Fast Recovery Diode
2.2.2.7.1.2.2. MTP6N60E
N–Channel Enhancement–Mode Silicon Gate
This high voltage MOSFET uses an advanced termination scheme to provide enhanced
voltage–blocking capability without degrading performance over time. In addition, this advanced
TMOS E–FET is designed to withstand high energy in the avalanche and commutation modes.
The new energy efficient design also offers a drain–to–source diode with a fast recovery time.
Designed for high voltage, high speed switching applications in power supplies, converters and
PWM motor controls, these devices are particularly well suited for bridge circuits where diode
speed and commutating safe operating areas are critical and offer additional safety margin
against unexpected voltage transients.
• Robust High Voltage Termination

• Avalanche Energy Specified
• Source–to–Drain Diode Recovery Time Comparable to a Discrete Fast Recovery Diode
• Diode is Characterized for Use in Bridge Circuits
• IDSS and VDS(on) Specified at Elevated Temperature
2.2.2.7.2. SECONDARY BLOCK
Switching primary winding of SMT induces voltages to secondary windings of SMT. Induced
voltages are then rectified by secondary recitification diodes and capacitors.
Output Voltages
+3.3.V_STB : The signal is +3.3VDC and continuous stand-by on/off. Used for digital part of
UOCII.
+5V_STB : The signal is +5VDC and continuos stand-by on/off. Used for port control.
B+ : The voltage needed for FBT. Voltage range 114V – 117V according to CRT.
12V : The voltage needed for horizantal driver circuit.
12V_A : The voltage supply of audio amplifier.
12V_DVD : The voltage needed for DVD.
12V_IDTV : The voltage needed for IDTV.
+5V_DVD : The voltage needed for DVD.
+3.3.V_DVD : The voltage needed for DVD.
2.2.2.7.3. SMPS Block Diagram
5 15
220V B+
50Hz
16
2
13
A12V
IDTV12V
14
1 DMAG VI 8 12
DVD12V
2 CONT_INT
NCP1207
3 6 8 11
I_SENSE VCC 12V
4 5
GND DRIVER
10
9V
TR.REG 3V3STB
7 9
TR.REG 5VSTB
6V
LDO DVD3V3
LDO DVD5V
11AK57
STB
SMPS BLOCK DIAGRAM
2.2.2.8. DEFLECTION
2.2.2.8.1. HORIZANTAL DEFLECTION
Deflection block consist of following main parts,
Horizontal driver transistor (Q600),

Horizontal driver (L600),
HOT (Horizontal Output Transistor) (Q603),
FBT (TR600),
Linearity Coil (L601),
Flyback Capacitors (C611),
S-correction capacitor (C622),
Modulated S-correction capacitor (C623),
Hdrive signal is buffered and applied to line driver transistor by a capacitor.
Line driver produces necessary base currents, parallel diode to base series resistor speeds up
the reverse base current.
UOCII has soft-start and soft-stop features to have more safe operation. There are two base
current adjustment resistors on the circuit. Collector current differs according to CRT sizes .
Tube dependent components are choosen to fit best picture performance by keeping;
11-12usec. Flyback time,
Max. 1300V. collector voltage (peak-detect mode measurement)
2.2.2.8.2. MD1803DFX
HIGH VOLTAGE NPN POWER TRANSISTOR FOR STANDARD DEFINITION CRT DISPLAY
Features
• State-Of-The-Art Technology: – Diffused collector “ENHANCED GENERATION”

• More stable performance versus operating temperature variation
• Low base drive requirement
• Tighter hFE range at operating collector current
• Fully insulated power package U.L. compliant
• Integrated free wheeling diode
• In compliance eith the 2002/93/EC EUROPEAN DIRECTIVE
2.2.2.8.3. FBT
Operating Ampient Temperatue : -10°C..........+60°C

Stroge Ampient Temperature : -20°C..........+80°C
Operating Horizantal Frequency : 15.625KHz ±0.5KHz
INDUCTANCE (Between pin1 to pin3) : 3.02mH ± %8

INTERNAL RESISTANCE : Max. 2.2Ohm Regulation:Max.%10
FLYBACK TIME : 11.5µsec
COLLECTOR VOLTAGE : 1000Vp_p
FOCUS VOLTAGE RANGE % OF EHT: min.≤18.2 max.≥34.6
DEFLECTION CURRENT : 3.1Ap_p max.
AUXLIARY OUTPUTS:
Heater Voltage : 6.3Vrms / max 750mA
RGB Supply : +200V / max 30mA ±%5
Vertical Supply : +14V / max 1A ±%5
Vertical Supply : -14V / max 1A ±%5
Auxliary Voltage : +9V / max 1A ±%5
Tuning Voltage : +33V max 100mA ±%5
2.2.2.8.4. AN15524A (VERTICAL DEFLECTION OUTPUT)
The AN5524A (TV vertical deflection output circuit) is a monolithic integrated circuit designed for
vertical deflection output, such as TV and display.
Features
• Built-in Pump-up circuit

• Built-in Thermal protection circuit
• Maximum deflection current = 1.6Ap-p
• Dimple forming type :
Advantages : a) Withstand repeated movements between the body and the solder joint of the IC
(when a heat-sink is used).
b) Better vibration absorber (eg. CTV installed in the bus/coach).
• VCC operating range : 12V ~ 30V
2.2.2.9. CRT BOARD
Transistors are used for amplifying RGB signals.
2SC2482 For High Voltage Switching And Amplifier Applications:
• High Voltage : V(BR)=300V.

• Small Collector Output Capacitance : Cob=3.0pF (typ.)
2.2.3. AK57 Chassis Scematics
2.2.3.1. Part1
SC_FBLK
SC_G_IN
SC_B_IN
SC_R_IN
C128
VPROT
5 220p 2.2.3. AK57 Chassis Scematics
220R
R159
PL120
L102 50V
5
4 REMOTE +8V
VESTEL ELECTRONICS TV R&D GROUP
BLM21A601S
2.2.3.1. Part1
R124
3 100R
BC858B
PL106
PL102 R126 EHT_INFO 220k
Q107
C204
2 330R R136
001.sht 11AK57 VIDEO&AUDIO
R158
R160
100R
330k
1N4148
IF1 11 IF1 IRQ 1 R125
330R +5V_STB
1
D103
10n
L100
1u
50V RX 2 DATE Author
BC848B
Sheet
C118
C137
100n
220n
Ver. Rev.
16V
C205 C135
BC858B 03 08/10/2007 YALCIN ELIK 01 of 04
AUDIO_OUT
IF2/GND 10 IF2 TX 3 10k 47u
CVBS_OUT
D107
R173
Q104
15k
R127 16V
Q109
10n
100u
50V 4 L108
BC848B
C145
R123 +3V3_STB
100R
Q103 BLM21A601S
VST 9 1k +33V 10k
SEL_CVBS
BC848B C136 C140
C101 R100 100u 100n
Q110
16V 16V C146
R176
100n R128
Q105
50V BC848B 100R LED
NC/ADC 8 KEYBOARD 1 L110 390p
50V
100n 16V
BLM21A601S
2
38.9MHz_TVTUN
C138 C141
Q111
C147
R177
470R
R178
100R
R184
470R
R185
100R
PL103
L101 100u 100n
22u
VS 7 +5V SDA 3 L103 16V 16V
100R
C159 R186
PL107
KEYBOARD PL111
C102 C103 2 BLM21A601S
4
TU100
100u 100n SCL +8V
C130
100n
16V
100n 16V
16V 50V 1
100n C157 50V

1 C139 C142
R161
R162
100R
R174
100R
R175
100R
C148
100n C158 16V

3k9
NC 6 +5V_STB 5 47p 47p C168
D102
C160
220n
16V
16V
50V X100 50V 220n 2
16V R195
220n
2u2
12MHz 4R7 RCA_A_IN 3
+3V3_STB
+5V_STB
SDA 5 100R SDA C187 C193 L122
820R
R215
A
XTALOUT 64
XTALIN 63
OSCGND 62
VDDC 61
VPE 60
VDDA 59
BO 58
GO 57
RO 56
BLKIN 55
BCLIN 54
B2_UIN 53
G2_YIN 52
R2_VIN 51
INSSW2 50
IFVO2 49
AUDOUT1 48
CVBS10 47
WHSTR 46
C 45
CVBS3_Y 44
GNDA1 43
CVBS2 42
GND 41
R101 100n 47u
RACK_RCA_DVB
C100
50V
ESD_20V
39p
4.5MHz_TRAP 16V 50V
D116
L115
3
2
STBY_PR
REMOTE
1u
R137 Z102
STBY
C186 BC848B
SDA
B
SCL
SCL 4 100R SCL 4k7 PL112
TX
Q118
RX
R102 L109 1 3 L124
JK102
2
C104
100R
R198
50V
39p
PL104 C173 270p L118 1
4
BLM21A601S C132 BLM21A601S
C
C131 C172 100u 50V R242
100n 6u8
AS 3 1 100u 65 RESET CVBS1 40 100n 16V R216 R223 RCA_V_IN 100R 2
R130
R131
R138
R139
R140
R141
5
S106
+5V_STB
16V
4k7
4k7
4k7
4k7
4k7
10k
16V 16V 220R 100R
1 3
PL105 66 VDDP VP1 39 2
R244
75R
ESD_20V
R148 4.5MHz_TRAP
D117
220R
R221
180R
R222
47u
2
VT 2 1 100R 67 P1.0_INT1 SVO_IFOUT 38 R197 Z103
1
C105
C110
R112
10n
6k2
R142 1k Q115
C169
16V
50V
100R 68 P1.1_T0 IC2 37 BC858B PL121
D108
1u
5V1
R143
C171
100n
BLM21A601S
16V
AGC 1 12k AGC 100R 69 P1.2_INTO SIFAGC 36 R218
R199
27k
R111
IC100 R144 C175 120k EHT_INFO
R129
L104
10k
100R 70 P1.3_T1 PLLIF 35 390R 10n
R145 R196 50V R217 DVD_CVBS 1
PL113
D101 1 A0 VCC 8 100R 71 P1.6_SCL EHTO 34 100k
1N4148 R146 R254 C174 C176 +8V 2
100R 72 P1.7_SDA IC103 AUDEEM 33 1k R243
R219
R220
680k
6k2
2n7 1u 50V DVD_ON 10k 3
2 A1 WP 7 MUTE 73 P2.0_PMW DECSDEM 32 50V
C170
50V
4u7
R147
R233
R241
75R
10k
24LC02 100R 74 P2.1_PWM0 FBISO 31 27k HFLYBACK RF_MONO
PL101 R114 R154 R202 Q119
L125 3 A2 SCL 6 100R IRQ 100R 75 P2.2_PWM1 HOUT 30 100R
6 1 R157 C177 220n 16V R203 BC848B

BLM21A601S
PL114
SW2 100R 76 P2.3_PWM2 AUDIO3 29 IDTV_CVBS
2
5 2 R115 R156 C178 220n 16V
R225
R226
R245
470k
75R
3k3
4 VSS SDA 5 100R SW1 100R 77 P2.4_PWM3 AUDIO2 28 10k SEL_MONO
1
4 3 R155 R204
SW0 100R 78 P2.5_PWM4 REFOUT_SNDIF 27
R201
30k
3 4
79 NC SNDPLL 26 R246
PL115
2 5 L119 IDTV_MONO 1k
2
DVD_ON 80 P3.0_ADC0 GND2 25 2k7 +5V_STB
BLM21A601S
6
P3.1_ADC1
P3.2_ADC2
P3.3_ADC3
R224
1 1
22 AGCOUT
10 DECDIG
VSSC_P
R149
R150
R151
R152
R153
R200
C179
820p
14 DECBG
50V
4k7
4k7
4k7
4k7
2k2
1k
11 PH2LF
PL100
17 VDRA
12 PF1LF
16 VDRB
13 GND3
VSSA
18 IFIN1
19 IFIN2
ESD_20V
ESD_20V
ESD_20V
20 IREF
15 AVL
DEC
21 VSC
P0.5
P0.6
VP2
24 IC1
D121
D122
D123
S105
23 IC
HOUT
C180
50V
4n7
1
50V
220n
220n
63V
63V
2n2
50V
R249
C155
+3V3_STB
R188 R205 DVD_MONO 1k 1
R164
100R
R166
100R
R168
100R
R169
100R
C149
C150
+5V
4u7
PL116
75R 1k
C152
R187
39k
IC102 C163 C181 L120 2
C164
50V
10n
3 100n 10u
L105 KEYBOARD 63V 50V 3
8 IN12 OUT1 1 2 2 AGC
BLM21A601S
C111 L106 SC_STATUS
C106
C107
50V
50V
6n8
10n
COMMON
10u
C109 BLM21A601S 1 1
R105 50V LED
R179
15k
AUDIO_OUT 10k 7 IN11 SUPPLY_VOLT 2 +12V_A PL108 PL109 R250
1
PL117
OUT1 4
OUT2 5
4u7 SAW_SW C151 C161 DVD_SPDIF 100R
C112
50V
10n
TDA2822M
OUT1 4
OUT2 5
50V 4n7 1n5 50V
R113
R247
10k
1k
D100 50V C154 C156 2

R104
C120
R163
R165
R167
GND
100n
3
25V
SAW_SW
C153
4k7
4k3
10k
K3958M
MUTE 5k6 6 IN22 OUT2 3 100n 2u2
C143
C144
GND
L113
Z100
100n
3
50V
16V
1u
10u
IN1
IN2
1N4148 Q100 16V 50V
50V
IN1
IN2
C108 BC848B C162 R251
R103
R116
R117
4R7
4R7
5k6
PL118
1
2
22u 1n5 50V IDTV_SPDIF 100R
R180
100R
R189
100R
S101
50V
2
5 IN21 GND 4
R248
10k
C113 2
S102
+8V
10n C165 D104
C121
C123
100n
100n
25V
25V
+5V_STB
25V
R209
Q116
1k2
50V 10n 1N4148 BC848B
BA591
OPTIONAL
VERT+
VERT-
D105
R210
1k2
R206
470R
R208
1k
IF1
IF2
R207
+5V
D120 1k
IC101 L116
+5V
ESD_20V
C182
220n
16V
C114 L107
IDTV_CVBS 1 Y0 VCC 16 +5V
C122BLM21A601S
+8V
100n
25V
IC104
R106
10R
C115 R190
4u7 50V 10u +8V 22R
RCA_V_IN 2 Y2 X2 15 50V RCA_A_IN
R108
10k
SC_STATUS
SW0 1 SW IN2 6 DVD_SPDIF
SC_A_OUT
100n C124 R118 C183
SC_FBLK
SC_G_IN
SC_A_IN
SC_R_IN
SC_B_IN
25V 50V 10k 47u
R134
S100
10R
4u7 16V
Q102
R110 NLAST4599
BC848B 47R 3 COM_Y_OUT_IN X1 14 DVD_MONO L111 R191
R132
Q117
10k
C125 R119 +5V 2 VSS OUT 5 SPDIF_OUT CVBS_OUT 100R BC848B

BLM21A601S
10k
R109
2k2
C116 R213
SEL_CVBS R122 +5V_SPDIF
100n 16V
Q106 75R
SC_V_IN 4 Y3 COM_X_OUT_IN 13 47R BC848B
C203
16V
C188
10u
3 GND IN1 4 IDTV_SPDIF

R107
150R
100n
C133
R211
R235
R238
R252
330R
47p
3k3
1k
1k
25V M74HC4052 50V
SC_A_OUT
R133
50V
2k2
SC_V_IN
C117 4u7 SEL_MONO C191 C195
+5V
R170
300R
DVD_CVBS 5 Y1 X0 12 IDTV_MONO 150p 150p C197 C198
+5V_SPDIF
100n C126 R120 C196 150p 4n7
150R
R135
ESD_20V
ESD_20V
25V 50V 10k 50V 50V 100p 50V 50V
D111
D115
4u7
IC105 50V
100R
R227
100R
R234
6 INH X3 11 SC_A_IN
470R
R181
R212
R236
100R
R237
BC848B
75R
10k
C127 R121
Q114
ESD_20V
10k SW2 1 SW IN2 6 SEL_MONO
D124
R214
330R
R229
100R
R231
100R
L121
L123
ESD_20V
ESD_20V
ESD_20V
7 VEE A 10 SW0 NLAST4599 Q112
D114
D112
D113
L112 BC848B
+5V 2 VSS OUT 5
R192
L117
S104
BLM21A601S
10k
B5V1_SOD123
C134
R193
220R
16V
10u
RCA_JACK_1P_90_LONG
8 GND B 9 SW1
D125
D106
R228
R230
R232
R239
R240
33V
75R
75R
75R
75R
75R
SC_A_OUT S103 ESD_20V
C166
3 GND IN1 4 RF_MONO
1
ESD_20V
ESD_20V
ESD_20V
D109
JK100
D118
D119
D110
R182
A
3k3
R183 10n
PL119
SPDIF_OUT 47R BC858B 25V
R172
300R
R194
100R
C167
2
50V
Q113
1n
BLM21A601S
21 19 17 15 13 11 9 7 5 3 1
L114
1 3 2 4 5
20 18 16 14 12 10 8 6 4 2
B C
A
RACK_RCA_DVB
JK101
PL800
2
VESTEL ELECTRONICSTV R&D GROUP
3.15A
F800
002.sht 11AK57 SMPS

VAR-510V
Ver. Rev. DATE Author Sheet

R803 03 08/10/2007 SMPS GROUP 02 of 04
L805
C800 +12V_DVD
1kV 2u2
PL802
100p
C834
C855
16V
16V
3
1u
1u
150n
S817
250V
TR800 C818 +12V_IDTV
4
D807
NC C831
C835
100n
2x27m
50V
L800
1 2200u
TH800
UF5402 16V
9R
IC812
D808 HOR_PR L806 378L05_TO921 +5V_STB
3
1N4148
5 3 DRAIN +112V +12V
D825
C801
C833
S800
220u
2
16V
1 65uH
8 15 BYD33D
1000u
C830
C832
100n
50V
25V
2
6 4 C821
S818
150n
BC327
250V RL800
Q809
+300V GND3 100p 1kV
6 16
R871 R872 R873
680k 680k 680k +3V3_STB
C2V7
D828
C820
+14V
11 STB_SUPPLY 560R
C844
220u
16V
R806 R858 R862
100p
1kV 10k
Q810
2R2
100n 50V
GND1 D809 BC848B
C824
C836
470u
16V
12
10k
BYD33D
150R
R861
R859
Q811
VVC +8V5_1 BC848B 10k
C806 4 10 R860
C802
1N4007
1N4007
1N4007
1N4007
D820
D821
D822
D823
1n 1n
1kV
1N4007
1N4007
1kV NC3 7 DVD_PR

D818
D819
+8V5 UF5402
IC813
NC2 5 9 1 L4931 3 +5V_DVD
C838
100n
16V
50V
D811
2200u
C811
C842
C843
100n
2
6V3
50V
C837
NC1 2
C856
C809
1kV
C825
10n
C810
R820
150u BYD33D 1n1kV

33k
2200u
+22V
400V 47n 220p
630V 13
1kV KA78R12
D810 IC814
BA159 IN OUT 2
50V
1
GND GND2 C822 1n AUDIO_PR VDIS GND IC815
1kV
C826
D824 3 14 4 3 LM1117
R835
+3V3_DVD
1k8
R863
3R3
C823
2W
3 IN OUT 2
100n
1k
1000u 16V GND VOUT
L804
D832 R836
2u2
R864 1 4 C846
SMPS_46
R849
470R
10k 2200u
1N4148 C845 6V3
+12V_A 100n
16V
R821
33k
R807
D814 L807
1k
1N4148
B+
D803
150uH
UF5407 4R7
160V
C803
C848
1kV
33u
1n
160V
C840
IC806
47u
C839
R830
BA159
1k
R853
150k
R850
1n
D815 1kV
R837
BA159
1 DEMAG VI 8
86k
D812
C827
50V
1n
C812 C813
C807
100p
50V
100n 33u
25V 50V MCR_GATE
2 I_SENSE NC 7
PROTECTION
250V
C849
R852
1M
1u
D800
MC44608 MCR22_6
400V +3V3_STB
MTP6N60E/SSP7N60A
3 CONT_IN VCC 6 C817 C847

470p 470p D833
Q802 1kV 1kV 1N4148 STBY_PR
AUDIO_PR
R824 L803 1N4148
R867
MCR_GATE D816
3k3
4 GND DRIVER 5 10R D834 STBY
R851
680R
HOR_PR
R832
C828
1N4148
50V
1k2
22n
D839
1N4148 BC858B
1k5
R826
D835 Q812
10k
BC858B
R866
+12V_IDTV
Q801
1N4148 C2V4_SOD123
Q813
R815 D836 22k BC848B
STBY R831 R868
2k Q803 DVD_PR D838
22k BC848B 1N4148 C853 C854
R869
220k
1N4148
1u 1u
D801
R822
470R
R823
10k
16V 16V
R816
10k
R839
99k
100V
C814
4n7
D802
TL431SAMF2
R827
10k
+5V_DVD 6
D805
1N4148_SOD123 5
1N4148_SOD123
+3V3_DVD
330R 4
R825
D806
R828
0R22
C815
3
50V 2
IC811
47n 1n
R865
50V +12V_DVD
1
1k
R810 4 1
C841
C8V2
D804
C852 PL804
C816
4M7
50V
3 2 75R
1n
ESD_20V
ESD_20V
ESD_20V
R838
D829
D830
D831
C804 68n
R841
1k
TCET110G 50V
R833
33R
R842
4n7 4k7
4kV
PL803 D827
C5V6_SOD123
A D813 K
2
TL431SAMF2
1
C805 Q808
R845
R846
2k2
2k2
BC848B R856
C850
50V
10u
1
5k1
2n2 PL805
4kV
R855
5k1
1
R857
470R
C851
R854
100n
25V
+12V_IDTV
1k
L801
2
R834 R843
Q804
22k 22k STB_SUPPLY
3
BC848B
R844 4
Q805
BC848B 22k STBY
+33V_IDTV 5
N_INVERT_IN
STV9379FA
OUTSUPPLY
FBKSUPPLY
INVERT_IN
IC600 VESTEL ELECTRONICS TV R&D GROUP
GND
VCC
OUT
003.sht 11AK57 DEFLECTION
7
100u
VERT+ 63V
03 08/10/2007 YALCIN ELIK 03 of 04
C600 C602
2n2 -14V
50V +14V
D603 HER107
VERT-
C601 2k2
R604 PL600
R600
R601
2n2
100k
2k2
C603
50V 1 BA159
100p 50V +14V TR600
R612
10R
2 D607 R620
100V
R605
R607
390R
C604
C615
470u
25V
27k
22n
0R22
1/2W 45V
VPROT 5 EHT
100V
C608
100n
D606
-14V
C8V2
15V
D600
R606
5k1
BA159 R621 6
C616
470u
25V
0R22
R608
R609
1/2W
10R
1R
R613 GND1
7
33R
Q601
BC639 200V
9 FOCUS
C5V6
D602
R616
75R
+5V R622
0R22
BY299 1/2W
+9V D608
R614 E_W
C609 4R7 4 G2
100u C617
R617
75R
16V Q602 C618
BC639 100n 220u 150V NC
16V 16V B+ 3 2
R633
C8V2
D601
+8V +33V_IDTV
C610
100u
16V
COLLECTOR EHTINFO BA159 33R

1 10 +33V
D611 R630
C626
100u
50V
0R22
1/2W
BA159_SMD GND2
1.6kV
GND3
C611
7n5
L600 VIDEO_B+ 12 13
R624 D609
250V
C619
10u
0R47
+12V 1/2W 10k +8V
1 3
R602 10V HEATER R632 R634
1R5 C612 C613
5 Q603 47n 47n 11 8 1k EHT_INFO
100R
1/2W C605
R611
100u 250V 250V

R610
100V
C625
2 4
22n
16V 100R
FBT_AK19
C607 BU2508AF 250V PL603

R618
47R
2n2 10u
2kV
2 1
HEATER
C623
+5V
1 2
C606 R631
R603
R627
C624
100n
50V
Q600
5k1
1R
HOUT 22R BC639 PL601 1W 3
C614
1N4148
BA159
D604
D610
47n
4
1N4148
100V VIDEO_B+
D612
1n 500V C622
1/4W
R628
R619 330n
HFLYBACK 250V
10k
1N4148
D605
+200V
R925
75R
+200V
Q908
R907
BF422
10k
C901
180p
PL901
50V
R900
Q900 BF421
1k8 2SC2482 Q903 R
5
R917
100R
R901
3k3
+200V
C905
R909
330R
820p
50V
G
3
R924
75R
B
+200V
8
GND F2 G1 G2 G3
6 7 2 4
Q907 1 9 EHT
R911
BF422
10k
C902
PL900
180p
1 50V
R902
Q901 BF421
2 1k8 2SC2482 Q904 PL902
3 R918
100R
4 C900 R919
R903
C907
R910
330R
820p
50V
R
3k3
220p +200V 1k5

5
5 50V
R920
R926
G
75R
+200V 1k5
3
R923
R912
Q906 B
10k
BF422 1k5
8
C903 GND F2 G1 G2 G3
6 7 2 4
1 9 EHT
180p
50V
R904
Q902 BF421
1k8 2SC2482 Q905
PL904
C913
R922
100R 1
R905
3k3
C909
R914
330R
2n7
820p
50V
1kV
1
PL905
+200V 1
PL907
VESTEL ELECTRONICSTV R&D GROUP
PL903
PL906
1
4
1
004.sht 11AK57 CRT BOARD

03 08/10/2007 YALCIN ELIK 04 of 04
2.2.4. DVD PLAYER
2.2.4.1. General Description
2.2.4.1.1. MT1389D
The MT1389D Progressive Scan DVD-Player Combo Chip is a single-chip MPEG video decoding chip
that integrates audio/video stream data processing, TV encoder, four video DACs with Macrovision. Copy
protection, DVD system navigation, system control and housekeeping functions.
The features of this chip can be listed as follows:
Features
• Progressive scan DVD-player combo chip

• Integrated NTSC/PAL encoder.
• Built-in progressive video output
• DVD-Video, VCD 1.1, 2.0, and SVCD
• Unified track buffer and A/V decoding buffer.
• Direct interface of 32-bit SDRAM.
• Servo controller and data channel processing.
Video Related Features:
• Macrovision 7.1 for NTSC/PAL interlaced video.

• Simultaneous composite video and S-video outputs, or composite and YUV outputs, or composite
and RGB outputs.
• 8-bit CCIR 601 YUV 4:2:2 output.
• Decodes MPEG video and MPEG2 main profile at main level.
• Maximum input bit rate of 15Mbits/sec
Audio Related Features:
• Dolby Digital (AC-3) and Dolby Pro Logic.

• Dolby Digital S/PDIF digital audio output.
• High-Definition Compatible Digital. (HDCD) decoding.
• Dolby Digital Class A and HDCD certified.
• CD-DA.
• MP3.
2.2.4.1.2. SDRAM Memory Interface
The MT1389D provides a glueless 16-bit interface to DRAM memory devices used as OSD, MPEG
stream and video buffer memory for a DVD player. The maximum amount of memory supported is 16MB
of Synchronous DRAM (SDRAM). The memory interface is configurable in depth to support 110-Mb
addressing. The memory interface controls access to both external SDRAM memories, which can be the
sole unified external read/write memory acting as program and data memory as well as various decoding
and display buffers.
2.2.4.1.3. Drive Interfaces
The MT1389D supports the DV34 interface, and other RF and servo interfaces used by many types of DVD
loaders. These interfaces meet the specifications of many DVD loader manufacturers.
2.2.4.2. System Block Diagram and MT1389D Pin Description
2.2.4.2.1. MT1389D Pin Description

2.2.4.2.2. 2.1 Sytem Block Diagram
A sample system block diagram for the MT1389D DVD player board design is shown in the following figurre:
2.2.4.3. Audio Output

The MT1389D supports two-channel and six-channel analog audio output. In a system configuration with six
analog outputs, the front left and right channels can be configured to provide the stereo (2 channel) outputs and
Dolby Surround, or the left and right front channels for a 5.1 channel surround system. The MT1389D also
provides digital output in S/PDIF format. The board supports both optical and coaxial SPDIF outputs.
2.2.4.4. Audio DACS

The MT1389D supports several variations of an I2S type bus, varying the order of the data bits (leading or no
leading zero bit, left or right alignment within frame, and MSB or LSB first) is possible using the MT1389D
internal configuration registers. The I2S format uses four stereo data lines and three clock lines. The I2S data
and clock lines can be connected directly to one or more audio DAC to generate analog audio output. The two-
channel DAC is internal. The six channel DAC is PCM1606. The outputs of the DACs are not differential. The
buffer circuits use National LM833 op-amps to perform the low-pass filtering and the buffering.
2.2.4.5. Video Interface
Video Display Output
The video output section controls the transfer of video frames stored in memory to the internal TV encoder of
the MT1389D. The output section consists of a programmable CRT controller capable of operating either in
Master or Slave mode.
The video output section features internal line buffers which allow the outgoing luminance and chrominance
data to match the internal clock rates with external pixel clock rates, easily facilitating YUV4: 2:2 to YUV4: 2:0
component and sample conversion. A polyphase filter achieves arbitrary horizontal decimation and
interpolation.
Video Bus
The video bus has 8 YUV data pins that transfer luminance and chrominance (YUV) pixels in CCIR601 pixel
format (4:2:2). In this format, there are half as many chrominance (U or V) pixels per line as luminance (Y)
pixels; there are as many chrominance lines as luminance.
Video Post-Processing
The MT1389D video post-processing circuitry provides support for the color conversion, scaling, and filtering
functions through a combination of special hardware and software. Horizontal upsampling and filtering is done
with a programmable, 7-tap polyphase filter bank for accurate non-integer interpolations. Vertical scaling is
achieved by repeating and dropping lines in accordance with the applicable scaling ratio.
Video Timing
The video bus can be clocked either by double pixel clock and clock qualifier or by a single pixel clock. The
double clock typically is used for TV displays, the single for computer displays.
2.2.4.6. Flash Memory

The decoder board supports 70ns Flash memories.
FLASH_512K_8b
The MT1389D permits 8- bit common memory I/O accesses.
2.2.4.7. Serial Eeprom Memory

An I2C serial EEPROM is used to store user configuration (i.e. language preferences, speaker setup, etc.) and
software configuration.. Industry standard EEPROM range in size from 1kbit to 256kbit and share the same IC
footprint and pinout. The default device is 2kbit, 256kx 8, SOIC8 SGS Thomson ST24C02M1 or equivalent.
2.2.4.8. Audio Interface Audio Sampling Rate and PLL Component

Configuration
The MT1389D audio mode configuration is selectable, allowing it to interface directly with low-cost audio DACs
and ADCs. The audio port provides a standard I2S interface input and output and S/PDIF (IEC958) audio
output. Stereo mode is in I2S format while six channels Dolby Digital (5.1 channel) audio output can be
channeled through the S/PDIF. The S/PDIF interface consists of a bi-phase mark encoder, which has low skew.
The transmit I2S interface supports the 112, 128, 192, 256, 384, and 512 sampling frequency formats, where
sampling frequency Fs is usually 32 kHz, 44.1 kHz, 48 kHz, 96 kHz, or 192 kHz. The audio samples for the I2S
transmit interface can be 16, 18, 20, 24, and 32-bit samples.
For Linear PCM audio stream format, the MT1389D supports 48 kHz and 96 kHz. Dolby Digital audio only
upports 48 kHz. The MT1389D incorporates a built-in programmable analog PLL in the device architecture in
order to generate a master audio clock. The MCLK pin is for the audio DAC clock and can either be an output
from or an input to the MT1389D. Audio data out (TSD) and audio frame sync (TWS) are clocked out of the
MT1389D based on the audio transmit bit clock (TBCK). Audio receive bit clock (RBCK) is used to clock in
audio data in (RSD) and audio receive frame sync (RWS).
2.2.4.9. Scematics
2.2.4.9.1. Part1
5 4 3 2 1
VCC
[1,2,4]
VCC
DV33
[1,2,3] DV33
GND
[1,2,3,4] GND
AL
[2] AL AR
[2] AR
+12V
[1] +12V
MUTE_DAC
[2] MUTE_DAC
D D
LCH
LCH [4]
RCH
RCH [4]
R116
24k
C74 100pF
R118
4
C75 R117 5.1k R119
AL 2 - C76 10uF/16v 100
LCH
+
+
1
10k 1/2VCC 3 +
3
10uF/16v C77 U13A
NJM4558 OPA A_MUTE 2 Q14
1000pF 2N3904
8
+12V SOT23
1
MUTE
VCC R120 10K

R122
24k
C C
+12V R123 22k C78 100pF
R124 470 + CE31
100uF/16V R126
2
4
C79 R125 5.1k R127
D17 R121 AR 6 - C80 10uF/16v 100
RCH
+
7
10k 1/2VCC 5 +
3
4.7V 10K 10uF/16v C83 U13B
NJM4558 OPA A_MUTE Q16
1
2
1000pF 2N3904
8
1
+12V SOT23
Q15 2 Q25
1
2
3906 3906
DV33
3
Q28 3906/NC D19 1N4148/NC

1 3 1 2 A_MUTE
R147 1K
2
R134 R171
10K/NC 10K/NC
MUTE_DAC
B B
+12V
R17210k R173100k
1/2VCC
CB57 R174 + CE38
0.1uF 10k 47uF/16V
A A
MediaTek Confidential
MediaTek (ShenZhen) Inc.
Title
COMMON1389E_HD60
Size Document Number Drawn: changqiao Rev
3
C AUDIO OUT Checked: Tom Wang
Date: Saturday, December 09, 2006 Sheet 1 of 5
5 4 3 2 1
5 4 3 2 1
R178 100 R179 75

+5VV +5VV
TP3
[1] +12V +12V C109 C110 C111 R180
2
[1,2,5] VCC VCC R86 D25 0.1UF 100PF 100PF 100/NC
[1,2,3,5] GND GND 75/NC
1N4148/NC VCC
[2] CVBS CVBS R73 33
[2] R R 0 ASPDIF
1
R88 1
[2] G G CVBSO 2 J10
[2] VB VB 3
1
C51 TJC3-3AW
2
D ASPDIF CVBS 2 Q10 D27 + C52 C112 D
[2] ASPDIF
LCH 3906/NC 0.1uF 10uF/16v OPTICAL
[5] LCH P=2.54mm
RCH R90 L28 1.8uH 27PF
[5] RCH 75 C104 C105 1N4148/NC
3
47P 47P
1
J9
CVBSO
+5VV +5VV R/V 1
G/Y 2
B/U 3
4
2
R74 D20 RGB/CVBS# 5
ASPECT 6
75/NC 1N4148/NC 7
LCH 8
0 RCH 9
1
R76 10
G/Y
2
G 2 Q6 D21
3906/NC TJC3-10AW
R78 L27 1.8uH
75 C100 C101 1N4148/NC
3
C 47P 47P C
1
VCC +5VV
+5VV +5VV
L20
+5VV VCC
2
10uH/NC R80 D24 R181 10K
C48 + C50
75/NC 1N4148/NC
47uF/16v/NC
1
0.1uF 0 R182 4.7K Q29
1
R82 2
3
B/U R183 2K 3906
2 Q30
[2] RGB_SWITCH
3
9014
2
VB 2 Q8 D26 RGB/CVBS#
3906/NC
1
L23 1.8uH
R84 C57 C58 1N4148/NC
75 3
B 47P 47P B
1
+12V R184 680
ASPECT
R185
C R186
1k
B E 75
3904 / 3906
3
R187 2k
2 Q31 2 Q32
[2] FS0
2N3904 R188 2k 2N3904
+5VV
1
3906 +5VV
C
[2] FS1
2
B E R87
D28
75/NC
1N4148/NC
0
1
R89
R/V
1
R 2 Q11 D29
L26 1.8uH 3906/NC
R91 C63 C64 1N4148/NC

3
A 75 A
47P 47P
1
Title
COMMON1389E_HD60
Custom 3
VIDEO OUT Checked: Tom Wang
5 4 3 2 1
5 4 3 2 1
[1,2,5] DV33 DV33

[1,2,4,5] GND GND DQ[0..15]
[2] DQ[0..15]
DRAM
[2] MA[0..11] MA[0..11] U8
[2] BA[0..1] BA[0..1]
[2] DQM[0..1] DQM[0..1] MA0 23 2 DQ7 [2] AD[0..7] AD[0..7]
[2] DCLK DCLK MA1 A0 DQ0 DQ6 U7
24 A1 DQ1 4
[2] DCKE DCKE MA2 25 5 DQ5 FLASH
[2] CAS# CAS# MA3 A2 DQ2 DQ4 MA0 DQ0
26 A3 DQ3 7 21 A0 DQ0 2
D [2] RAS# RAS# MA4 DQ3 MA1 DQ1 D
29 A4 DQ4 8 22 A1 DQ1 3
[2] WE# WE# MA5 30 10 DQ2 MA2 23 5 DQ2 [2,3] SCL SCL
[2] CS# CS# MA6 A5 DQ5 DQ1 MA3 A2 DQ2 DQ3 [2,3] SDA SDA
31 A6 DQ6 11 24 A3 DQ3 6
MA7 32 13 DQ0 MA4 27 8 DQ4
DRAM MA8 A7 DQ7 DQ8 MA5 A4 DQ4 DQ5 IIC
33 A8 DQ8 42 28 A5 DQ5 9
MA9 34 44 DQ9 MA6 29 11 DQ6
MA10 A9 DQ9 DQ10 MA7 A6 DQ6 DQ7
22 A10/AP DQ10 45 30 A7 DQ7 12
[2] PCE# PCE# MA11 35 47 DQ11 MA8 31 39 DQ8
[2] PRD# PRD# DBA0 A11 DQ11 DQ12 MA9 A8 DQ8 DQ9
20 BA0/A13 DQ12 48 32 A9 DQ9 40
[2] PWR# PWR# DBA1 21 50 DQ13 MA10 20 42 DQ10
[1] VCC VCC BA1/A12 DQ13 DQ14 DBA0 A10 DQ10 DQ11
DQ14 51 19 BA/A11 DQ11 43
SDCLK 38 53 DQ15 45 DQ12
[2] A[0..20] A[0..20] SDCKE CLK DQ15 SDCLK DQ12 DQ13
37 CKE 35 CLK DQ13 46
SD33 SDCKE 34 48 DQ14
DCS# CKE DQ14 DQ15 DV33 SD33
19 CS VCC 1 DQ15 49
FLASH DRAS# 18 14 DBA1 18 SD33
DCAS# RAS VCC DRAS# CS L29 FB
17 CAS VCC 27 17 RAS VCC 1
DWE# 16 SD33 DCAS# 16 25 SD33
RN1 WE DWE# CAS VCC SD33
VCCQ 3 15 WE
DCS# 7 8 CS# DQM0 15 9 7
DRAS# RAS# DQM1 DQML VCCQ DQM0 VCCQ + CE25 CB38 CB39 CB40 CB41 CB42
5 6 39 DQMH VCCQ 43 14 DQML VCCQ 13
DCAS# 3 4 CAS# 49 DQM1 36 38
DWE# WE# VCCQ DQMH VCCQ 47uF/16v 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF
1 2 36 NC VCCQ 44
C 40 NC VSSQ 6 33 NC C
33x4 12 37 4
VSSQ NC VSSQ
54 VSS VSSQ 46 VSSQ 10
DBA0 R60 33 BA0 41 52 26 41
VSS VSSQ VSS VSSQ
28 VSS 50 VSS VSSQ 47
DBA1 R61 33 BA1
SDCKE R62 33 DCKE ESMT M12L64164A/N.C

TSOP54 ESMT M12L16161A-7
SDCLK R63 33 DCLK
C107
10PF CB43 CB44 CB45 CB46 CB47
0.1uF 0.1uF 0.1uF 0.1uF 0.1uF
16Mb
A20 R64 0/NC AA20
U9
A1 25 29 AD0
A2 A0 D0 AD1
B 24 A1 D1 31 B
A3 23 33 AD2 DV33
A4 A2 D2 AD3
22 A3 D3 35
A5 21 38 AD4
A6 A4 D4 AD5
20 A5 D5 40
A7 19 42 AD6
A8 A6 D6 AD7
18 A7 D7 44
A9 8 30 DV33 R67 R65
A10 A8 D8 1k 1k
7 A9 D9 32
DV33 FVCC FVCC A11 U11
6 A10 D10 34
A12 5 36 1 8
A13 A11 D11 NC VCC GND
4 A12 D12 39 2 NC WP 7
A14 3 41 3 6 SCL
R85 0 A15 A13 D13 FVCC NC SCL SDA
2 A14 D14 43 4 GND SDA 5
R68 R70 A16 1 45 A0
CE26 + CB50 CB52 A17 A15 D15/A-1
48 A16 EEPROM 24C02
A18 17 14
10uF/16v 0.1uF 0.1uF 10k 10k A19 A17 WP/ACC SOP8
16 A18
AA20 9 47
A19 BYTE
10 A20
VCC 37
PCE# 26 CB53
FVCC PRD# CE
28 27
PWR# 11
OE
WE
GND1
GND2 46 0.1uF MediaTek Confidential
A A
12 RESET MediaTek (ShenZhen) Inc.
Title
IC FLASH MX29LV800 8Mb COMMON1389E_HD60
3
B SDRAM&FLASH Checked: Tom Wang
5 4 3 2 1
5 4 3 2 1
JITFO C3 390pF JITFN R10 DV33

RFV33 RFV33 RFVDD3 DV33 10
V1P4
0.1uF
R9 750k L30 10UH APLLVDD3
C4 2200pF C5 DACVDD3 DV33
0.1uF/NC C6
100k
CB10 + CE12
0.47uF/N.C
C9
10uF/16v
20pF
R11 680k OPO R12 0 ADIN DV33 0.1uF CB11 + CE13
0.1uF DC4
OP- C11 C12 C13 C14 CB12 0.1uF 47uF/16v
+
C10
15k
OP+ + 10uF/16v +
1000pF
R13
R19 10uF/16v 1500pF 10uF/16v 0.1uF
0.1uF
R15 R16 R17 6.8
150k 150k C16 L10 PLLVDD3
C15
2200pF 680k
R18
C17
V1P4 1.8uH R14 100k
C20
R20 NC J2 ADACVDD3 R175 R176
0.033uF
0.047uF
0.047uF
ADACVDD3 + CE14 CB13 33 Y1 33
RFVDD3
XO
10uF/16v
0.1uF
SP- R23 1 6 XI XO
XI
VB
D D
ADACVDD3
ADACVDD3
SP+ + 0.1uF
G
5
APLLVDD3
RFVDD3
DACVDD3
DACVDD3
AADVDD3
0.1uF
PLLVDD3
LIMIT 4 CE15 C21
RFVDD3
CVBS
ADVCM
47uF/16v 6800pF C18 27MHz C19
RFV18
3
JITFO
JITFN
C0603/SMD
C22
C24
C25
SL- 2 33pF 33pF
AR
AL
C23
SL+ C26
XTALI
1
0.1uF
C27
DV33 V2P8 V20 V1P4
PH2.0-6AW DV33
CB14 + CE16 CB15 + CE17 CB16 + CE18
216
215
214
213
212
211
210
209
208
207
206
205
204
203
202
201
200
199
198
197
196
195
194
193
192
191
190
189
188
187
186
185
184
183
182
181
180
179
178
177
176
175
174
173
172
171
170
169
168
167
166
165
164
163
R24 10k
0.1uF 47uF/16v 0.1uF 47uF/16v 0.1uF 47uF/16v
JITFO
AVCM
ADVCM
RFGC
OSN
RFGND
IREF
OSP
CRTPLP
HRFZC
RFRPAC
RFRPDC
ADCVSS
LPFOP
LPFIN
LPFIP
LPFON
IDACEXLP
JITFN
XTALO
PLLVSS
XTALI
ALF(CTR)
ARS
ARF(SW)
AADVDD
AADVSS
R/Cr/CVBS/SY
B/Cb/SC
DACVSSA
G/Y/SY/CVBS
DACVDDA
DACVSSB
DACVDDB
CVBS
DACVSSC
AVDD3
RFVDD3
ADCVDD3
PLLVDD3
RFVDD18
RFGND18
AL/SDATA2
AR/SDATA1
ADACVSS2
ADACVSS1
APLLVSS
APLLCAP
APLLVDD
ADACVDD2
ADACVDD1
ALS/SDATA0
AKIN1
AKIN2
V18
0603
L11 10uH
DV33 DV33 AADVDD3 1
C C29 1uF CC AGND FS
2 DVDA FS 162
CE19 + B C30 1uF BB 3 161 VREF R26
47uF/16v C28 A C31 1uF AA DVDB VREF DACVDD3
4 DVDC DACVDDC 160
6800pF D C32 1uF DD 5 159 ASPDIF C34 560 URST#
DV33 C0603/SMD DVDD SPDIF URST# [1]
RFO C33 1uF 6 158 VCC
DVDRFIP MC_DATA MUTE_DAC [1,4,5]
7 157 0.1uF VCC
L37 FB C DVDRFIN ASDATA3 RGB_SWITCH DV33
8 MA ASDATA2 156 DV33 [1,3,5]
RFV33 B 9 155 FS0 GND
MB ASDATA1 FS1 GND [1,3,4,5]
A 10 154
CE36 + C108 D MC ASDATA0 IR
11 MD ALRCK 153 IR [1]
12 SA ACLK 152
V18
47uF/16v 100NF 13
14
15
16
SB
SC
SD
CDFON
MT1389E ABCK
GPIO5
DVSS
GPIO4
151
150
149
148
TROUT
TRIN
VSCK
VSDA
VSCK
VSDA
[1]
[1]
V18 RFV18 17 147 LIMIT VSTB
CDFOP GPIO3 VSTB [1]
CB17 E 18 146 PCE#
F 19
TNI
TPI
Pin Assignment v1.4 DVDD18
RA4 145 MA4 PWR#
PCE#
PWR#
[3]
[3]
0.1uF AVCC1 MDI1 20 144 MA5
MDI1 RA5 MA6
21 MDI2 RA6 143
2N3904 LDO2 22 142 MA7 AL
LDO2 RA7 AL [5]
C LDO1 23 141 MA8 AR C
AVCC1 LDO1 RA8 AR [5]
R32 10k RFVDD3 24 140 MA9
R31 100k CB18 SVDD3 RA9 MA11
25 CSO/RFOP RA11 139
26 138 DCKE MUTE_DAC
RFLVL/RFON CKE MUTE_DAC [5]
3
0.1uF 27 137
R33 10k IOA V2P8 SGND DVDD3 DCLK
2 C 28 V2REFO RCLK 136
V20 29 135 MA3
D 1 V20 RA3
Q1 B E3 V1P4 30 VREFO RA2 134 MA2
2N3904 MA1 RGB_SWITCH
1
31 FEO RA1 133 RGB_SWITCH [4]

2 32 132 FS0
TEZISLV TEO DVDD18 FS0 [4]
33 131 MA0 FS1
TEZISLV RA0 FS1 [4]
1
G 1 3 S 2 2 R35 100k C36 OPO 34 130 MA10

OP- OP_OUT RA10 BA1
35 OP_INN BA1 129
2SK3018 Q2 Q3 0.1uF OP+ 36 128 BA0
VCC DMO OP_INP BA0 CS#
37 DMO RCS# 127
2SK3018 2SK3018 FB FMO RAS#
3
38 FMO RAS# 126

L13 C37 R38 TROPEN 39 125 CAS# CVBS
TROPENPWM CAS# CVBS [4]
V1P4 NC NC 40 124 WE# R
PWMOUT1/ADIN0 RWE# R [4]
C38 + CE34 TRO DQM1 G
26
41 TRO DQM1 123 G [4]

FOO 42 122 DQ8 VB
FOO RD8 VB [4]
0.1uF 100uF/16v ADIN 43 121 DQ9
GND FG/ADIN1 RD9
1 44 GPIO0/VSYNC# DVSS 120
2 LD-DVD 45 119 DQ10
V18 STBY GPIO1/HSYNC# RD10 DQ11 VIDEO INTERFACE
3 46 GPIO2 RD11 118
4 AVCC1 A2 47 117 DQ12 A[0..20]
IOA2 RD12 A[0..20] [3]
5 MDI1 V18 48 116 DQ13
LD-CD A3 DVDD18 RD13 DQ14 AD[0..7]
6 49 IOA3 RD14 115 AD[0..7] [3]
7 A4 50 114 DQ15
A5 IOA4 RD15 DQ0 PRD# PRD# [3]
8 51 IOA5 RD0 113
9 A6 52 112 DQ1 PWR# PWR# [3]
E 2 A7 IOA6 RD1 DQ2 PCE# PCE# [3]
10 53 IOA7 RD2 111
11 AVCC1 A8 54 110 DQ3
V20 HIGHA0 RD3 DQ4 J3 FLASH
12 C RD4 109
DVDD18
GND MA[0..11] MA[0..11] [3]
HIGHA7
HIGHA6
HIGHA5
HIGHA4
HIGHA3
HIGHA2
HIGHA1
13
DQM0#
DVDD3
DVDD3
DVDD3
IOWR#
TOP
PRST#
UP1_2
UP1_3
UP1_4
UP1_5
UP1_6
UP1_7
UP3_0
UP3_1
UP3_4
UP3_5
IOOE#
GPIO6
GPIO7
IOCS#
UWR#
IOA18
IOA19
IOA20
IOA21
INT0#
DVSS
URD#
14 F 4 DQ[0..15]
IOA1
IOA0
DQ[0..15] [3]
RD7
RD6
RD5
AD0
AD1
AD2
AD3
AD4
AD5
AD6
AD7
ALE
A16
A17
ICE
15 B 1 B C E3 TxD 3 BA[0..1]
IR
BA[0..1] [3]
16 A CB19 RxD 2
RFO DQM[0..1]
100
101
102
103
104
105
106
107
108
17 U3 DV33 1 DQM[0..1] [3]
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
B B
18 IOA 0.1uF 2SB1132 MT1389E DCLK
A18 DCLK [3]
19 D LQFP216/SMD
20 C Q4 A19 PH2.0-4AW DCKE
DCKE [3]
21 CAS#
RS-232 CAS# [3]
3
22 8550 RAS#
DV33 RAS# [3]
23 2 LDO2 WE#
WE# [3]
TRCLOSE
24 V18 CS#
CS# [3]
PRD#
URST#
CE21
PWR#
DQM0
VSTB
PCE#
VSCK
VSDA
A1
RXD
+
1
AD0
AD1
AD2
AD3
AD4
AD5
AD6
AD7
SCL
SDA
DQ7
DQ6
DQ5
TXD
47uF/16v
A16
A15
A14
A13
A12
A11
A10
A20
A17
IOA
A9
A0
IR
R40 10 RFV33 MEMORY
25
CB20 CB21 CB22 CB23 CB24
R41 10 V18 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF

Q5
HA1 + CE22 TP4 SCL
SCL [3]
1
8550 SDA
SDA [3]
HEADER 24 SMD0.5 TOP 2 47uF/16v LDO1
J4 DV33
DV33 IIC
LOAD-
3
5
F- LOAD+ 4
F+ R50 10k TROUT 3 CB25 CB26 CB27 CB28 CB30
2 ASPDIF ASPDIF [4]
R54 10k TRIN 1 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF
R42 R43 R44 R45

1 1 1 1 PH2.0-5AW
U4 FOSO R46 20k FOO
T- 15 14 TRSO R47 18k TRO DV33
VOTK+ VOFC+ FMSO R48 15k FMO
16 VOTK- VOFC- 13
SL+ 17 12 SP- DMSO R49 10k DMO
SL- VOLD+ VOSL+ SP+ VCC
18 VOLD- VOSL- 11
19 10 MO_VCC C39 C40 C41 C42 CB31 CB32 CB33
MO_VCC T+ PGND PGND VCC R83 1 MOVCC AUDIO INTERFACE
20 VNFTK PVCC1 9
21 8 use DIP decal 0.1uF 0.1uF 0.1uF
PVCC2 VCC 330pF 330pF 0.1uF 0.015uF
Q24
30 G2 G1 29
A R52 R53 V1P4 R8 2K Q21 R7 2K LOAD- A
22 7 10k 20k 8550 8550
R51 20k FMSO PREGND VNFFC DMSO C45
23 VINLD VOSL 6
24 CTK2 VINSL- 5
25 4 V1P4 0.1UF
TRSO CTK1 VINSL+ R55 20k VCC MO_VCC LOAD+
26 3
C43 V1P4 27
VINTK
BIAS
CF2
CF1 2 MediaTek Confidential
3
150pF CB34 STBY 28 1 FOSO C44 L31 FB
0.1uF
STBY VINFC
150pF TRCLOSE R4 100 2 2 R5 100 TROPEN
Title
CD5954 Q9
R58 CB36 + CE24 8050 Q20 COMMON1389E_HD60
8050 Rev
Size Document Number Drawn: changqiao
10k 0.1uF 47uF/16v
1
3
C MT1389E LQFP 216 Checked: Tom Wang
5 4 3 2 1
5 4 3 2 1
COMMON1389E_HD60_V3
MT1389E (LQFP216) DVD MP Board for SANYO HD60 PUH
1 INDEX & POWER, RESET

2 MT1389E
3 SDRAM & FLASH
D
4 VIDEO OUT & AV-CON D
5 AUDIO OUT - WM8766
NAME TYPE DEVICE

VCC Digital 5V SUPPLY
DV33 Digital 3.3V MT1389E Rev History P# Date
RFV33 Servo 3.3V MT1389E V1 Initial released. Modified from 3-SY1389DP1-V11 2005.01.19
AV33 Laser Diode 3.3V V2 Add SCART and VGA output 2005.03.01
V18 Digital 1.8V MT1389E
V3 Modify Video backend circuit.
SD33 Digital 3.3V SDRAM 2005.03.09
+12V Audio +12V OP AMP.
-12V Audio -12V OP AMP.
AVDD5 Audio 5V Audio DAC
DVDD3 Audio 3.3V Audio DAC
+12V
+12V [4 5 ]
URST#
URST# [ 2 ]
IR
C IR [2] C
DV33
DV33 [ 2,3,5]
VCC
VCC [ 2,4,5 ]
GND
GND [ 2,3,4,5]
CON1
6 +5VCC
5
4 +12VCC +12V
+3.3VCC
3 L35 FB
2
1 +12VCC
[2] VSCK VSCK
CE5 + CB5 [2] VSDA VSDA
TJC3-6AW [2] VSTB VSTB
HEAD6-2.54/H 100uF/25v 0.1uF
P=2.54mm
VCC +3.3VCC
+5VCC U10
L36 FB AZ-1117 3.3V/NC
3 IN OUT 2
DV33 VCC
RESET Circuit
GND
CE10 + +
CB8 CE39
B 0.1uF B
100uF/16v 100uF/16v/NC DV33
1
R2 R3 R1 R177
10K 10k 10k 10

CON2
6 IR
5 IRVCC D3 R6
4 VSDA 10k
3 VSCK 1N4148
2 VSTB +3.3VCC
1 DV33
+ CE1 L32 URST#

TJC3-6AW C1
P=2.54mm 10pF 10uF/16v
FB
CB3
+ CE2
0.1uF + CE9
100uF/16v 10uF/16v
DC4
V18
L33 D11 D9
FB + CE37 1N4007 1N4007 + CE7

CB7
100uF/16v 100uF/16v
0.1uF
A A
FM1
FM2
Title
COMMON1389E_HD60
3
C INDEX Checked: Tom Wang
5 4 3 2 1
2.3. AK57 Service Menu
S-No OSD Tanım Mümkün Ayarlar Varsayılan Değer

( Definition ) ( Possible Settings ) ( Default )
001 FAPS First APS ON = Aktif OFF
OFF = İn-Aktif
ON = Active
OFF = In-active
002 ISPM I2C Modu OFF OFF
( I2C Mode )
003 INIT Yazılım ve donanım resetleme ON = Resetleme aktif OFF
OFF = Resetleme in-aktif
( Resetting software and hardware )
ON = Enable resetting
OFF = Disable resetting
Table 1 Init

004 AGCSPD IF AGC hızı 0 = Yavaş 1
1 = Standart
( IF AGC speed ) 2 = Hızlı
3 = Hız seviyesi 2’ den daha
yüksek
0 = Slow
1 = Standard
2 = Fast
3 = Fastest
005 AGCTO AGC Take over 0..63 31
Table 2 AGC Servis ayarları ( AGC Service settings )

006 COFF Cut – Off Ayarı 0..63 32
( Cut-Off setting )
Table 3 VG2 Alignment Servis ayarları ( VG2 Alignment Service settings )

007 VERT SLOP Dikey eğim (VSL), SBL biti yarı blank’e 0..63 32
anahtarlanmalıdır.
( Vertical slope (VSL), SBL bit should be

keyed to half-blank.)
008 SCORRECTION S-doğrulaması (SC) 0..63 32
( S-correction (SC) )
009 VERT SHIFT 4:3 Wide Screen için dikey kaydırma 0..63 32
( 4:3 vertical shifting for Wide Screen )

010 VERT AMP Dikey genlik (VA) 0..63 32
( Vertical Amplitude (VA) )

011 HOR SHIFT Yatay kaydırma 0..63 32
( Horizontal shifting )
012 VERT SHIFT16 16:9 Wide Screen için dikey kaydırma 0..63 32
( 16:9 vertical shifting for Wide Screen )

013 VERT AMP16 16:9 Dikey genlik 0..63 32
( 16:9 Horizontal amplitude )

014 RGB HSH 50 Hz’lik RGB modunda yatay kaydırma 0..63 37
( In RGB mode with 50 Hz, horizontal

shifting )
015 RGB HSH60 60 Hz’lik RGB modunda yatay kaydırma 0..63 37
( In RGB mode with 60 Hz, horizontal

shifting )
016 60HZ HSH 43 4:3 MODE 60 Hz yatay kaydırma 0..63 31
( In 4:3 MODE with 60 Hz, horizontal

shifting )
017 60HZ VSH 43 4:3 MODE 60 Hz dikey kaydırma 0..63 31
( In 4:3 MODE with 60 Hz, vertical

shifting )
018 60HZ VA 43 4:3 MODE 60 Hz dikey genlik 0..63 31

amplitude )
019 60HZ VSH 169 16:9 MODE 60 Hz dikey kaydırma 0..63 31

shifting )
020 60HZ VA 169 16:9 MODE 60 Hz Dikey genlik 0..63 31

amplitude )
Table 4 Geometri Servis ayarları ( Geometry Service settings )

021 QSS Qss amfi mode değiştirici ON = QSS Aktif ON
OFF = QSS İn-aktif
( Switching the mode of the QSS amplifier )
ON = QSS Active
OFF = QSS In-Active
022 OIF IF-PLL’de DC ofset doğrultması 0..63 29
( DC offset correction at IF-PLL )

023 IF PLL demodulatör frekansı 0 = 58.75 MHz 2
1 = 45.75 MHz
( PLL demodulator frequency ) 2 = 38.90 MHz
3 = 38.00 MHz
4 = 33.40 MHz
5 = 42.00 MHz
6 = 33.90 MHz
7 = 48.00 MHz
8 = EXTERNAL
024 OFR Frekans Girişi Aktivasyonu: Installation ON = Aktif ON
menüsündeki Tuning Mode olan Frekans modunu OFF = İn-aktif
aktif veya pasif hale getirir.
ON = Active
( Frequency Entry Activation: Frequency mode OFF = In-Active
which is value Tuning Mode item on the
Installation menu can be enabled or disabled by
OFR. )
025 FFI IF-PLL Hız filtresi ON =Hızlı zaman OFF
sabiti
( Fast filter IF-PLL ) OFF = Normal zaman
sabiti
ON = Fast time
constant
OFF = Normal time
constant
026 BS1 (Gerekli ayarlamayı yapmak için ilgili Tuner 0..15 1
dökümanına bakılmalıdır.)
( Please look at the related Tuner specification for

necessary adjustments. )


029 CB (Gerekli ayarlamayı yapmak için ilgili Tuner 0..255 142

030 B1-H (Gerekli ayarlamayı yapmak için ilgili Tuner 0..255 12

031 B1-L (Gerekli ayarlamayı yapmak için ilgili Tuner 0..255 32

032 B2-H (Gerekli ayarlamayı yapmak için ilgili Tuner 0..255 30

033 B2-L (Gerekli ayarlamayı yapmak için ilgili Tuner 0..255 2

Table 5 Tuning Servis ayarları ( Tuning Service settings )

034 FRAV AV için Peaking merkezi frekansı 0 = 2.7 Mhz 1
1 = 3.1 Mhz
( For AV, Peaking center frequency ) 2 = 3.5 Mhz
035 YSCM SECAM için Y-delay ayarı 0..15 12
( For SECAM, Y-delay setting )

036 YNTS NTSC için Y-delay ayarı 0..15 2
( For NTSC, Y-delay setting )

037 YPAL PAL için Y-delay ayarı 0..15 2
( For PAL, Y-delay setting )

038 YAV1 AV-1 için Y-delay ayarı 0..15 4
( For AV-1, Y-delay setting )

039 YSVHS SVHS için Y-delay ayarı 0..15 4
( For S-VHS-2, Y-delay setting )
Table 6 Video Servis ayarları ( Video Service settings )

040 WPRC Cold için White point Red 0..63 32
( For Cold, White point Red )
041 WPGC Cold için White point Green 0..63 32
( For Cold, White point Green )

042 WPBC Cold için White point Blue 0..63 31
( For Cold, White point Blue )

043 BLORB Black seviyesi ofset Red – Blue 0..63 32
( Black level offset Red – Blue)
044 BLOG Black seviyesi ofset Green 0..63 32
( Black level offset Green )

045 WPRN Normal için White point Red 0..63 37
( For Normal, White point Red )

046 WPGN Normal için White point Green 0..63 32
( For Normal, White point Green )

047 WPBN Normal için White point Blue 0..63 19
( For Normal, White point Blue )

048 BLRB-RGB RGB için Black seviyesi ofset Red – Blue 0..63 32
( For RGB, Black level offset Red – Blue )

049 BLG-RGB RGB için Black seviyesi ofset Green 0..63 32
( For RGB, Black level offset Green )

050 WPRW Warm için White point Red 0..63 49
( For Warm, White point Red )

051 WPGW Warm için White point Green 0..63 40
( For Warm, White point Green )

052 WPBW Warm için White point Blue 0..63 25
( For Warm, White point Blue )

053 BLRB-YUV YUV için Black seviyesi ofset Red – Blue 0..63 32
( For YUV, Black level offset Red – Blue )

054 BLG-YUV YUV için Black seviyesi ofset Green 0..63 32
( For YUV, Black level offset Green )

055 WPRW-RGB RGB için White point Red 0..63 32
( For RGB, White point Red )

056 WPGW-RGB RGB için White point Green 0..63 40
( For RGB, White point Green )

057 WPBW-RGB RGB için White point Blue 0..63 32
( For RGB, White point Blue )
Table 7 White ton ayarları ( White tone adjustments )

058 OSO Dikey overscan’de Switch-off ON = Aktif Switch-off ON
OFF = İn-aktif Switch-off
( Switch-off at vertical overscan )
ON = Enable Switch-off
OFF = Disable Switch-off
059 FSL Dikey sync için Forced Slicing seviyesi ON = Sync genliği %60’ı OFF
sabit seviyede bulunan
( For vertical sync, Forced Slicing level ) dikey slicing
OFF = Otomatik dikey
slicing seviyesi
ON = Vertical slicing level

fixed to 60% of sync
amplitude
OFF = Automatic vertical
slicing level
060 PN8-STB If option is ON TV can open from stanby OFF = feature is not OFF
when PIN8 is activated avaliable
ON = feature is avaliable
061 PWL Peak white sınırlayıcı 0..15 8
( Peak white limiting )

062 BPS Bypass chroma temel-band ON = Bypass temel-band OFF
kroma gecikme çizgisi
( Bypass chroma base-band ) OFF = Temel-band
kroma gecikme çizgisi
aktif
ON = Bypass baseband
chroma delay line
OFF = Baseband chroma
delay line active
063 CLPL Soft kırpma seviyesi 0 = PWL‘in 0% üstünde 0

1 = PWL’in 5% üstünde
( Soft clipping level ) 2 = PWL’in 10% üstünde
3 = İn-aktif
0 = 0% above PWL
1 = 5% above PWL
2 = 10% above PWL
3 = Off
064 CL Katot drive seviyesi 0..15 10
( Cathode drive level )

065 ST-LMI Option for sleep timer last minute ON = last minute OFF
indicator indicator appears on TV
OFF = last minute
indicator does not appear
on TV
066 DNMENU Dynamic Menu Mode ON = Dynamic Menu OFF
Enable
OFF = Dynamic Menu
Disable
067 UK-EU IDTV UK veya PAN-EU OFF = 0 UK OFF

(IDTV UK)
ON = 1 PAN-EU
(IDTV PAN-EU)
Table 8 Bit Kontrol Servis ayarları ( 8 Bit Control Service settings )

068 FAVI FAV ON = Aktif ON
OFF = İn-aktif
( FAV )
ON = Active
OFF = In-active
069 BAVI BAV ON = Aktif OFF
OFF = İn-aktif
( BAV )
ON = Active
OFF = In-active
070 BSVI SVHS ON = Aktif OFF
OFF = İn-aktif
( SVHS )
ON = Active
OFF = In-active
071 SSTDBG BG ses standardı ON = Aktif ON
OFF = İn-aktif
( BG sound standard )
ON = Active
OFF = In-active
072 SSTDI I ses standardı ON = Aktif ON
OFF = İn-aktif
( I sound standard )
ON = Active
OFF = In-active
073 SSTDDK DK ses standardı ON = Aktif ON
OFF = İn-aktif
( DK sound standard )
ON = Active
OFF = In-active
074 SSTDL L- L prime ses standardı ON = Aktif ON
OFF = İn-aktif
( L- L prime sound standard )
ON = Active
OFF = In-active
Table 9 Kaynak seçimi Servis seçenekleri ( Source Switching Service settings)

075 TXHPOS Teletext tek sayfa başlangıç noktası ayarları 0..20 10
( One page Teletext starting point setting )

076 TXTBRI Teletext parlaklık ayarı 0..63 32
( Teletext brightness setting )

077 TXTCON Teletext contrast ayarı 0..15 0
( Teletext contrast setting )

078 LSEL1 Menü dili seçimi 0..255 255
( Menu language setting )

079 LSEL2 Menü dili seçimi 0..255 255
( Menu language setting )

080 -------
Table 10 Teletext Servis seçenekleri ( Teletext Service settings )

081 PWPRF Açılışta görüntü ve sesin gelmesine göre, fast 0..15 10
startup ve perfect startup. 0 = Fast
15 = Perfect
( According to video and sound, when TV
opening, fast startup and perfect startup )
082 PWRES STANDBY’dan açılır. ON = Son duruma ON
gore açılır
( Opens from STANDBY. ) OFF = STANDBY’dan
açılır
ON = Opens
depending on the
last state
OFF = Opens from

STANDBY
Table 11 Güç Servis seçenekleri ( Power Service settings )

083 MAXCOL Picture menüsündeki maksimum renk ayar 0..63 50
sınırlayıcısı
(Maximum color setting limiter at Picture menu )

084 MAXBRI Picture menüsündeki maksimum parlaklık ayar 0..63 57
sınırlayıcısı
(Maximum brightness setting limiter at Picture

menu )
085 MINBRI Picture menüsndeki minimum parlaklık ayar 0..63 20
sınırlaması
(Minimum brightness setting limiter at Picture

menu)
086 MAXCON Picture menüsündeki maksimum contrast ayar 0..63 50
sınırlayıcısı
(Maximum contrast setting limiter at Picture

menu )
Table 12 Picture Servis seçenekleri ( Picture Service settings )

087 SAVEFS Fabrika Servis ayarlarını saklama OFF OFF
( Saving Factory settings )

088 LOADFS Fabrika Servis ayarlarını yükleme OFF OFF
( Loading Factory setting )

089 OAVL Ses menusunde AVL’i optional yapar 0-63 32
(AVL is optional in sound menu)
OAVL = 0 (AVL is off and AVL line is not

avaliable in sound menu)
OAVL = 1 (AVL line is avaliable in sound menu)
OAVL = 2 (AVL is on and AVL line is not
avaliable in sound menu)
Other values of OAVL work like OAVL =1
090 HTLSRC Selection for hotel mode search 0-63 32
HTLSRC = 0 (TV)
HTLSRC = 1 (AV)
HTLSRC = 2 (FAV)
HTLSRC = 3 (SVHS)
HTLSRC > 3 (HOTEL MODE NOT AVAILABLE)
091 HMAXVOL Maximum volume for hotel mode 0-63 32
092 HDEFVOL Volume level definition for hotel mode when tv 0-63 32
is openning
093 RPO Preover Shoot Ratio 0-3 32
PSYS_RATIO_PRE_OVERSHOOT_MIN =0
PSYS_RATIO_PRE_OVERSHOOT_MAX =3
094 PF Peaking Frequency 0-3 2
PF1-PF0 = 0 (2.7 Mhz)
1 (3.1 Mhz)
2 (3.5 Mhz)
3 (spare)
095 APSSND Default value of sound standard in APS menu 0-3 0
0-> BG
1-> I
2-> DK
3-> L\L’
096 SRCO Control DVD,IDTV, AV2 (Only AK58) sources 0-7 0
0-> DVD, AV2 are OFF
1-> DVD is ON. AV2 is OFF
2-> AV2 is ON. DVD is OFF
3-> DVD, AV2 are ON
Table 13 Fabrika Servis ayarları ( Factory Service settings )
Geometri ayarları : Service menüsündeki 007-011 satırlar arasındaki 50Hz geometri ayarları yapıldıktan sonra, NTSC
offsetlerin belirlenmesi için 016-018 satırlar arasındaki NTSC 60Hz ayarları yapılır. NTSC ayarlarını her tüp çalıması için
bir kez yapılması yeterlidir. Çünkü NTSC ayarları yapılırken, NTSC offset değerleri hesaplanarak EEPROM da saklanır.
16:9 Zoom modu ayarlarıda NTSC ayarları gibi yapılır ve 16:9 offset değerleri hesaplanarak EEPROM’da saklanır. Daha
sonra 50 Hz geometri ayarları değiştirildiğinde, 007-011 veya 016-018 satırlar arasında iken menü tusuna basılarak
geometri ayarları kaydedildiğinde, otomatik olarak 16:9 modu, RGB horizontal shift ve NTSC geometri değerleri
hesaplanır. RGB horizontal shift offset değerleri koda gömülü haldedir. NTSC ve 16:9 modu offset değeri EEPROM’da
saklanmaktadır.
Geometry Adjustment: After adjusting 50Hz geometry items (between 007-011). NTSC 60 Hz geometry items
(between 016-018) should be adjusted to determine NTSC 60Hz offset. NTSC offset is automatically calculated and
stored in NVM. Later on, if we need to change 50Hz geometry settings, NTSC 60Hz geometry settings is automatically
calculated by using NTSC offset. 16:9 mode geometry adjustment works like NTSC 60Hz geometry adjustment.
If press to menu button between 007-011 or 016-018 items. New geometry setting is stored and, 16:9 mode, RGB
shift and NTSC geometry automatically calculated. RGB shift offset value is stored in software. Only NTSC offset and
16:9 mode offset values are stored in EEPROM.
AGC ayarı : Tunere 60db yayın verildikten sonra AGCTO iteminin uzerine gelinip mavi tuşa basıldıgında AGC otomatik
olarak ayarlanır.
AGC adjustment: Connect to tuner 60db broadcast and, press to blue button on AGCTO item. AGC is automatically
adjusted.
Screen Ayarı: Servis menüsünde sarı tuşa basılarak, dikey tarama iptal edilir ve screen ayarının yapılabilmesi için ilgili
registerlar güncellenir. Ekranda ince bir çizgi belirir. Daha sonar bu ince çizgi en ince hale gelene kadar screen
potansiyometrisi ayarlanır. Tekrar sarı tuşa basıldığında eski ayarlar geri yüklenir.
Screen Adjustment: When yellow button is pressed in service menu. Vertical scan is disabled and related registers
are updated. Thin line will be appeared on the screen. Then the screen potentiometer is gently adjusted until the
thin line will be lightly disappeared When press to yellow button again, old register values are reloaded and vertical
scan is enabled.
FOCUS Ayarı : TV de yayın verilir. . FOCUS potansiyometresi en uygun değerede ayarlanır.
FOCUS Adjustment: TV is tuned to the signal. Then focus potantiometer (the upper pot on the rear side of the FBT
transformer) is adjusted for optimum focusing drive.
2.4. TUNER SETTINGS
VHF1-VHF3 VHF3-UHF AK56 SERVICE MENU ITEMS
Frq. (Mhz) Frq. (Mhz) B1-H B1-L B2-H B2-L BS1 BS2 BS3 CB
Philips UV1316S MK3 156,25 MHz 441,25 MHz 012 050 030 02 001 002 004 142
LG TAEW-G002D 140,25 Mhz 431.25 Mhz 011 050 029 098 001 002 008 142
Thomson CTT5020 114,25 MHz 401,25 MHz 009 146 027 130 003 006 133 142
Samsung TECC2949PG28B 170,25 MHz 465,25 MHz 013 018 031 130 001 002 004 142
Alps TEDE9X226A 142,25 MHz 425,25 MHz 011 082 029 002 001 002 008 142
Alps TEDE9-004A 149,25 MHz 424,25 MHz 011 194 028 242 001 002 008 142
Samsung TECC2949PS40B 142,25 MHz 425,25 MHz 011 082 029 002 001 002 008 142
Explanations
B1H High byte of VHF1-VHF3 cross-over frequency
B1L Low byte of VHF1-VHF3 cross-over frequency
B2H High byte of VHF3-UHF cross-over frequency
B2L Low byte of VHF3-UHF cross-over frequency
BS1 Band switching byte for VHF1
BS2 Band switching byte for VHF3
BS3 Band switching byte for UHF
CB Control byte
According to Reference Divider 62.5 Khz apply the following formula
Value = ( Frequency (Mhz) * 1000 ) / ( 62.5 ) + 622 ;

Binary_value ( 2 bytes ) = ToBinary( value );
x can be 1 or 2
Bx-H = MSByte( Binary_value ); ( most significant byte )
Bx-L = LSByte( Binary_value ); ( least significant byte )

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TABLE OF CONTENTS

2. GENERAL DESCRIPTION .....................................................................................5

The document is based on “Device Specification UOCII-Version 1.12” from Philips

1.3. General Features

The chassis will have the following main features;

2.2. System Building Blocks

2.2.1. AK57 Chassis Block Diagrams

CRT Heater G2 FOCUS

2.2.2. AK57 Chassis Main Blocks

• UOCII : Microcontroller + Video Proccessor + Sound Proccessor + IF + Teletext

2.2.2.1. UOC-II (ULTIMATE-ONE-CHIP)

UOCII is composed of microcontroller, video proccessor, sound proccessor and IF blocks.

The features are given in the following feature list.

• Multi-standard vision IF circuit with alignment-free PLL demodulator

• 80C51 m-controller core standard instruction set and timing

• Text memory for 1 or 10 pages

• Teletext and Enhanced OSD modes

FUNCTIONALOF TDA9550 H/N1

The TDA2822 is DUAL LOW-VOLTAGE POWER AMPLIFIER.

• Supply voltage down to 1.8V

Figure: Test Circuit (Stereo)

Figure: Application in 11AK56

1. Audio right output 0.5Vrms / 1KΩ

Audio 0.5Vrms / 1KΩ

• Fast Switching and Propagation Speeds

• Select Pin Compatible with TTL Levels

OFF-AIR CHANNELS CABLE CHANNELS

Low Band E2 to C 48.25 to 82.25 (1) S01 to S08 69.25 to 154.25

Mid Band E5 to E12 175.25 to 224.25 S09 to S38 161.25 to 439.25

Noise Typical Max. Gain Min. Typical Max.

Terminals for External Connection

2.2.2.6.1. K3958M (IF Filter for Video Applications)

2.2.2.6.2. K9656M (IF Filter for Audio Applications)

• TV IF audio filter with two channels

2.2.2.6.3. K2966 (IF Filter for Intercarrier Applications)

• TV IF filter with Nyquist slope and sound shelf

2.2.2.6.4. K2962 (IF Filter for Intercarrier Applications)

• TV IF filter with two Nyquist slope and sound shelf

2.2.2.6.5. G1975 (IF Filter for Intercarrier Applications)

• TV IF filter with Nyquist slope and sound shelf

2.2.2.7.1. PRIMARY BLOCK

Primary block consist of following main parts,

SMPS Controller (IC806),

SMPS Controller supply for first Start-up (R807),

Bridge Rectifier (D820,D821,D822,D823),

Rectifier For SMPS Controller(D803),

Bulk Cap (C809),

Clamping Circuitry (R820, C810, C811, D824),

SMT (Switch Mode Transformer) (TR800),

SMT Driver MOSFET (Q802),

Current Sense Resistor (R828),

Protection Components for MOSFET Failure (D805,D806,R826)

2.2.2.7.1.1. SMPS CONTROLLER (NCP1207)

PWM Current-Mode Controller for Free Running Quasi-Resonant Operation

N–Channel Enhancement–Mode Silicon Gate

Avalanche Energy Capability Specified at Elevated Temperature

N–Channel Enhancement–Mode Silicon Gate

• Robust High Voltage Termination

12V : The voltage needed for horizantal driver circuit.

12V_A : The voltage supply of audio amplifier.

12V_DVD : The voltage needed for DVD.

12V_IDTV : The voltage needed for IDTV.

+5V_DVD : The voltage needed for DVD.

+3.3.V_DVD : The voltage needed for DVD.