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UP

Reset Switch ENT

DWN

12V AC Input
from Transformer

Sensor

Buzzer
HOW TO PROGRAM TEMPERATURE ALARM
At start LCD shows temperature say 25.3 centigrade
This Kit can be programmed for a temperature alarm range upto 100 degree centigrade.
Press ENT Button LCD display get static, press UP button and hold for six seconds and then
release UP button. LCD shows SET Temperature Limit, and displapy 00. By pressing UP button
00 changes to 01 and so on if you want to set Temperature limit to 30 degree centigrade
then press UP button until you get 30 on LCD and then press ENT button.
LCD start showing current teperature say 25.3 centigrade. Now to check alarm hold the
sensor by your hand you can see temperature value on LCD will strt increasing from 25.3
to more and crosses 30 degree and at this point alarm Triggers until tamperature falls below
30 degree centigrade.
Fully Tested Kit
Microcontroller Based
Programmable Temperature
Alarm With LCD Display
MUDIT AGARWAL

The project Programmable Temperature alarm 1 16


GND VCC VLC RS R/W En D0 D1 D2 D3 D4 D5 D6 D7 VA VC
with display can be used at many places were
temperature control is required for example in an 16X2 LCD Module With Back-Light
industry which uses boilers, system can be used
to monitor the temperature of the boiler as Fig. 1 : Pin diagram of 16X2 LCD Module
temperature exceed the user defined
temperature limit this system switches ON the especially easy. It can be used with single power
alarm till boiler is above the user defined supplies, or with plus and minus supplies. As it
temperature limit and automatically switch off draws only 60uA from its supply, it has very low
the alarm as temperature falls below the user self-heating, less than 0.1°C in still air. The LM35
defined limit. is rated to operate over a ?55° to +150°C
temperature range, while the LM35C is rated for
a ?40° to +110°C range (?10° with improved
The Hardware accuracy). The LM35 series is available
LCD Display packaged in hermetic TO-46 transistor
LCD is used for user interaction with the system, packages, while the LM35C, LM35CA, and
16*2 LCD display based on Hitachi HD 44780 LM35D are also available in the plastic TO-92
controller. LCD is interfaced to microcontroller transistor package. The LM35D is also available
by using four Data lines D7, D6, D5, D4 and in an 8-lead surface mount small outline
control signals RS, R/W and En. Pin out of 16X2 package and a plastic TO-220 package. Pin out
LCD is shown in figure. 1 of LM35 temperature sensor is shown in figure 2.
Power Source Intelligent LM35 Handling
5V Regulated power supply is required for The LM35 can be glued or cemented to a surface
microcontroller, LCD, Temperature sensor, and its temperature will be within about 0.01°C of
buzzer and is obtained from 220V AC mains by the surface temperature. This presumes that the
converting it to a lower voltage with the help of ambient air temperature is almost the same as
9V transformer, rectification by diode D1-D4, the surface temperature; if the air temperature
filtering by 1000uf/50V, and finaly regulation is were much higher or lower than the surface
achieved by 7805 regulator IC. temperature, the actual temperature of the LM35
LM35 die would be at an intermediate temperature
LM35 is a integrated-circuit temperature between the surface temperature and the air
sensors, whose output voltage is linearly temperature. This is especially true for the TO-
proportional to the Centigrade temperature. The 92 plastic package, where the copper leads are
LM35 has an benefit over linear temperature the principal thermal path
sensors calibrated in ° Kelvin, as the user is not to carry heat into the TO-92
requisite to subtract a large constant voltage device, so its temperature Plastic Package
from its output to obtain suitable Centigrade might be closer to the air
scaling. The LM35 does not require any outside temperature than to the
calibration to provide typical accuracies of + VS VOUT GND
surface temperature. To
±0.25°C at room temperature and ±0.75°C over minimize this problem, be
a -55°C to +150°C temperature range. The sure that the wiring to the
LM35 has low output impedance, linear output, LM35, as it leaves the
and precise inherent calibration make device, is held at the BOTTOM VIEW
interfacing to read out or control circuitry same temperature as the Fig. 2 : Pin out of LM35DZ
16X2 LCD Module
Temperature
15
036.8 Centigrade VA

D7 D6 D5 D4 D3 D2 D1 D0 En R/W RS VLC VCC VSS VC


14 13 12 11 10 9 8 7 6 5 4 2 1 16
3

C6
PR

11
VDD
32 RB7
40
VDD 39
RB6
38
Rb5
37
R1 RB4
35
RB2
1 RB1
34
MCLR 33
RB0

S1 IC2
+ C4
Buzzer

13 PIC 16F877A
R2 R3
XTAL

R4
-
14 RC2
RC1
17
12 16
C5 GND RC0
31 GND 15 1

UP ENT DWN
RA0
2
Ic3
2
RB3
36 3
R5
Q1

12 V Transformer 500 mA

+5 V DC
D2 D1 IC1
1 3
230V 2
A.C.
D3 D4 C1
C2 C3

Fig. 3 : Circuit diagram of Programable Temperature Alarm

surface of interest. The easiest way to do this is grounded to that metal. Alternatively, the LM35
to cover up these wires with a bead of epoxy can be mounted inside a sealed-end metal tube,
which will insure that the leads and wires are all and can then be dipped into a bath or screwed
at the same temperature as the surface, and into a threaded hole in a tank. As with any IC, the
that the LM35 die's temperature will not be LM35 and accompanying wiring and circuits
affected by the air temperature. The TO-46 must be kept insulated and dry, to avoid leakage
metal package can also be soldered to a metal and corrosion. This is especially true if the circuit
surface or pipe without damage. Of course, in may operate at cold temperatures where
that case the V- terminal of the circuit will be condensation can occur. Printed-circuit
coatings and varnishes such as Humiseal and PORTA pins are Component List
epoxy paints or dips are often used to insure that multiplexed with SEMICONDUCTOR DEVICES
moisture cannot corrode the LM35 or its analog inputs IC1 7805 ,5 volt regulator
connections. These devices are sometimes IC2 P I C 1 6 F 8 7 7 A
a n d a n a l o g microcontroller
soldered to a small light-weight heat fin, to VREF input. The IC3 LM35DZ
decrease the thermal time constant and speed o p e r a t i o n o f Q1D1-D4 1n4007 as rectifier
Bc548
up the response in slowly-moving air. On the each pin is
other hand, a small thermal mass may be added s e l e c t e d b y CAPACITORS
C1 1000uf/50V
to the sensor, to give the steadiest reading clearing/setting C2,C3 ,C6 0.1uf
despite small deviations in the air temperature. the control bits in C4,C5 22pf
Complete circuit diagram is shown in figure 3. the RESISTORS
R1-R4 2.2K
PIC16F877 Microcontroller Overview A D C O N 1 R5 1K
The PIC16F877 is a 40-pin popular PIC r e g i s t e r ( A / D Preset PR 10K
microcontroller. The device offers the following C o n t r o l MISCELLANEOUS
features: Register1). The TXFR 12 volt/500 Ampere
_ 8192 × 14 words flash program memory; TRISA register LCD XTAL 4 MHZ
16 x 2 Liquid Crystal display
_ 256 × 8 bytes of EEPROM data memory; c o n t r o l s t h e Buzzer Piezo Buzzer
_ 368 × 8 RAM data memory; direction of the S1,ENT, Push to ON switches
UP, DWN
_ eight 10-bit A/D channels; RA pins, even
_ 33 bidirectional I/O pins; when they are
_ two 8-bit and one 16-bit timers; being used as analog inputs. The user must
_ watchdog timer; ensure the bits in the TRISA register are
_ 14 interrupt sources; maintained set when using them as analog
_ capture, compare and PWM modules; inputs.
_ on-chip USART; Initializing port
_ 25mA current source and sink capability. BCF STATUS, RP0 ;
I/O PORTS BCF STATUS, RP1 ; Bank0
Some pins for these I/O ports are multiplexed CLRF PORTA ; Initialize PORTA by
with an alternate function for the peripheral ; clearing output
features on the ; data latches
device. In general, when a peripheral is BSF STATUS, RP0 ; Select Bank 1
enabled, that pin may not be used as a general MOVLW 0x06 ; Configure all pins
purpose I/O pin. MOVWF ADCON1 ; as digital inputs
PORTA and the TRISA Register MOVLW 0xCF ; Value used to
PORTA is a 6-bit wide, bi-directional port. The ; initialize data
corresponding data direction register is TRISA. ; direction
Setting a MOVWF TRISA ; Set RA<3:0> as inputs
TRISA bit (= 1) will make the corresponding ; RA<5:4> as outputs
PORTA pin an input (i.e., put the corresponding ; TRISA<7:6>are always
output driver in a Hi-Impedance mode). Clearing ; read as '0'.
a TRISA bit (= 0) will make the corresponding PORTA FUNCTIONS
PORTA pin an output (i.e., put the contents of RA0/AN0 bit0 TTL Input/output or analog input.
the output latch on the selected pin). Reading RA1/AN1 bit1 TTL Input/output or analog input.
the PORTA register reads the status of the RA2/AN2 bit2 TTL Input/output or analog input.
pins, whereas writing to it will write to the port RA3/AN3/VREF bit3 TTL Input/output or analog
latch. All write operations are read-modify-write input or VREF.
operations. RA4/T0CKI bit4 ST Input/output or external
Therefore, a write to a port implies that the port clock input for Timer0. Output is open drain type.
pins are read, the value is modified and then RA5/SS/AN4 bit5 TTL Input/output or slave
written to the port data latch. Pin RA4 is multi- select input for synchronous serial port or
plexed with the Timer0 module clock input to analog input.
become the RA4/T0CKI pin. The RA4/T0CKI Legend: TTL = TTL input, ST = Schmitt Trigger
pin is a Schmitt Trigger input and an open drain input
output. All other PORTA pins have TTL input
levels and full CMOS output drivers. Other
for wake-up on key depression.
RB0/INT is an external interrupt input pin and is
configured using the INTEDG bit
PORTB and the TRISB Register (OPTION_REG<6>).
PORTB is an 8-bit wide, bi-directional port. The RB0/INT bit0 TTL/ST(1) Input/output pin or
corresponding data direction register is TRISB. external interrupt input. Internal software
Setting a programmable weak pull-up.
TRISB bit (= 1) will make the corresponding RB1 bit1 TTL Input/output pin. Internal software
PORTB pin an input (i.e., put the corresponding programmable weak pull-up.
output driver in a Hi-Impedance mode). Clearing RB2 bit2 TTL Input/output pin. Internal software
a TRISB bit (= 0) will make the corresponding programmable weak pull-up.
PORTB pin an output (i.e., put the contents of RB3/PGM(3) bit3 TTL Input/output pin or
the output latch on the selected pin). Three pins programming pin in LVP mode. Internal software
of PORTB are multiplexed with the Low programmable weak pull-up.
Voltage Programming function: RB3/PGM, RB4 bit4 TTL Input/output pin (with interrupt-on-
RB6/PGC and RB7/PGD. The alternate change). Internal software programmable weak
functions of these pins pull-up.
are described in the Special Features Section. RB5 bit5 TTL Input/output pin (with interrupt-on-
Each of the PORTB pins has a weak internal change). Internal software programmable weak
pull-up. A pull-up.
single control bit can turn on all the pull-ups. This RB6/PGC bit6 TTL/ST(2) Input/output pin (with
is performed by clearing bit RBPU interrupt-on-change) or In-Circuit Debugger pin.
(OPTION_REG<7>). The weak pull-up is Internal software programmable weak pull-up.
automatically turned off when the port pin is Serial programming clock.
configured as an output. The pull-ups are RB7/PGD bit7 TTL/ST(2) Input/output pin (with
disabled on a Power-on Reset. Four of the interrupt-on-change) or In-Circuit Debugger pin.
PORTB pins, RB7:RB4, have an interrupt on- Internal software programmable weak pull-up.
change feature. Only pins configured as inputs Serial programming data.
can cause this interrupt to occur (i.e., any Legend: TTL = TTL input, ST = Schmitt Trigger
RB7:RB4 pin configured as an output is input
excluded from the interrupt on- change compari- Note 1: This buffer is a Schmitt Trigger input
son). The input pins (of RB7:RB4) are compared when configured as the external interrupt.
with the old value latched on the last read of 2: This buffer is a Schmitt Trigger input when
PORTB. The “mismatch” outputs of RB7:RB4 used in Serial Programming mode.
are OR'ed together to generate the RB Port 3: Low Voltage ICSP Programming (LVP) is
Change Interrupt with flag bit RBIF enabled by default, which disables the RB3 I/O
(INTCON<0>). This interrupt can wake the function. LVP
device from SLEEP. The user, in the Interrupt must be disabled to enable RB3 as an I/O pin
Service Routine, can clear the interrupt in the and allow maximum compatibility to the other
following manner: 28-pin and
a) Any read or write of PORTB. This will end the 40-pin mid-range devices.
mismatch condition. PORTC and the TRISC Register
b) Clear flag bit RBIF. A mismatch condition will PORTC is an 8-bit wide, bi-directional port. The
continue to set flag bit RBIF. Reading PORTB corresponding data direction register is TRISC.
will end the mismatch condition and allow flag bit Setting a
RBIF to be cleared. The interrupt-on-change TRISC bit (= 1) will make the corresponding
feature is recommended for wake-up on key PORTC pin an input (i.e., put the corresponding
depression operation and operations where output driver in
PORTB is only used for the interrupt-on-change a Hi-Impedance mode). Clearing a TRISC bit (=
feature. Polling of PORTB is not recommended 0) will make the corresponding PORTC pin an
while using the interrupt-on-change feature. output (i.e., put the contents of the output latch
This interrupt-on-mismatch feature, together on the selected pin). PORTC is multiplexed with
with software configureable pull-ups on these several peripheral functions . PORTC pins have
four pins, allow Schmitt Trigger input buffers. When the I2C
easy interface to a keypad and make it possible
module is enabled, the PORTC<4:3> pins can or parallel slave port bit4.
be configured with normal I2C levels, or with RD5/PSP5 bit5 ST/TTL(1) Input/output port pin
SMBus levels by using the CKE bit or parallel slave port bit5.
(SSPSTAT<6>). When enabling peripheral RD6/PSP6 bit6 ST/TTL(1) Input/output port pin
functions, care should be taken in defining TRIS or parallel slave port bit6.
bits for each PORTC pin. Some peripherals RD7/PSP7 bit7 ST/TTL(1) Input/output port pin
override the TRIS bit to make a pin an output, or parallel slave port bit7.
while other peripherals override the TRIS bit to Legend: ST = Schmitt Trigger input, TTL = TTL
make a pin an input. Since the TRIS bit override input
is in effect while the peripheral is enabled, read- Note 1: Input buffers are Schmitt Triggers when
modifywrite instructions (BSF, BCF, XORWF) in I/O mode and TTL buffers when in Parallel
with TRISC as destination, should be avoided. Slave Port mode.
The user should refer to the corresponding PORTE and TRISE Register
peripheral section for the correct TRIS bit PORTE has three pins (RE0/RD/AN5,
settings. RE1/WR/AN6, and RE2/CS/AN7) which are
RC0/T1OSO/T1CKI bit0 ST Input/output port individually configureable
pin or Timer1 oscillator output/Timer1 clock as inputs or outputs. These pins have Schmitt
input. Trigger input buffers. The PORTE pins become
RC1/T1OSI/CCP2 bit1 ST Input/output port pin the I/O control inputs for the microprocessor port
or Timer1 oscillator input or Capture2 input/ when bit PSPMODE (TRISE<4>) is set. In this
Compare2 output/PWM2 output. mode, the user must make certain that the
RC2/CCP1 bit2 ST Input/output port pin or TRISE<2:0> bits are set, and that the pins are
Capture1 input/Compare1 output/PWM1 configured as digital inputs. Also ensure that
output. ADCON1 is configured for digital I/O. In this
RC3/SCK/SCL bit3 ST RC3 can also be the mode, the input buffers are TTL. The TRISE
synchronous serial clock for both SPI and I2C register, which also controls the parallel slave
modes. port operation. PORTE pins are multiplexed
RC4/SDI/SDA bit4 ST RC4 can also be the SPI with analog inputs. When selected for analog
Data In (SPI mode) or data I/O (I2C mode). input, these pins will read as '0's. TRISE controls
RC5/SDO bit5 ST Input/output port pin or the direction of the RE pins, even when they are
Synchronous Serial Port data output. being used as analog inputs. The user must
RC6/TX/CK bit6 ST Input/output port pin or make sure to keep the pins configured as inputs
U S A RT A s y n c h r o n o u s Tr a n s m i t o r when using them as analog inputs.
Synchronous Clock. PORTE FUNCTIONS
RC7/RX/DT bit7 ST Input/output port pin or RE0/RD/AN5 bit0 ST/TTL I/O port pin or read
USART Asynchronous Receive or Synchronous control input in Parallel Slave Port mode or
Data. analog input:
PORTD and TRISD Registers RD 1 = Idle 0 = Read operation. Contents of
PORTD and TRISD are an 8-bit port with PORTD register are output to PORTD I/O pins (if
Schmitt Trigger input buffers. Each pin is chip selected)
individually configureable as an input or output. RE1/WR/AN6 bit1 ST/TTL I/O port pin or write
PORTD can be configured as an 8-bit wide control input in Parallel Slave Port mode or
microprocessor port (parallel slave port) by analog input:
setting control bit PSPMODE (TRISE<4>). In WR 1 = Idle 0 = Write operation. Value of
this mode, the input buffers are TTL. PORTD I/O pins is latched into PORTD register
PORTD FUNCTIONS (if chip selected)
RD0/PSP0 bit0 ST/TTL(1) Input/output port pin RE2/CS/AN7 bit2 ST/TTL I/O port pin or chip
or parallel slave port bit0. select control input in Parallel Slave Port mode
RD1/PSP1 bit1 ST/TTL(1) Input/output port pin or analog input:
or parallel slave port bit1. CS 1 = Device is not selected 0 = Device is
RD2/PSP2 bit2 ST/TTL(1) Input/output port pin selected Legend: ST = Schmitt Trigger input,
or parallel slave port bit2. TTL = TTL input
RD3/PSP3 bit3 ST/TTL(1) Input/output port pin Note 1: Input buffers are Schmitt Triggers when
or parallel slave port bit3. in I/O mode and TTL buffers when in Parallel
RD4/PSP4 bit4 ST/TTL(1) Input/output port pin
Slave Port mode EECON2
DATA EEPROM AND FLASH PROGRAM The EEPROM data memory allows byte read
MEMORY and write operations without interfering with the
The Data EEPROM and FLASH Program normal operation of the microcontroller. When
Memory are readable and writable during interfacing to EEPROM data memory, the
normal operation over the entire VDD range. EEADR register holds the address to be
These operations take place on a single byte for accessed. Depending on the operation, the
Data EEPROM memory and a single word for EEDATA register holds the data to be written, or
Program memory. A write operation causes an the data read, at the address in EEADR. The
erase-then-write operation to take place on the PIC16F873/874 devices have 128 bytes of
specified byte or word. A bulk erase operation EEPROM data memory and therefore, require
may not be issued from user code (which that the MSb of EEADR remain clear. The
includes removing code protection). Access to EEPROM data memory on these devices do not
program memory allows for checksum calcula- wrap around to 0, i.e., 0x80 in the EEADR does
tion. The values written to program memory do not map to 0x00. The PIC16F876/877 devices
not need to be valid instructions. Therefore, up have 256 bytes of EEPROM data memory and
to 14-bit numbers can be stored in memory for therefore, uses all 8-bits of the EEADR.
use as calibration parameters, serial numbers, The FLASH program memory allows non-
packed 7-bit ASCII, etc. Executing a program intrusive read access, but write operations
memory location containing data that form an cause the device to
invalid instruction, results in the execution of a stop executing instructions, until the write
NOP instruction. The EEPROM Data memory is completes. When interfacing to the program
rated for high erase/ write cycles (specification memory, the
D120). The FLASH program memory is rated EEADRH:EEADR registers form a two-byte
much lower (specification D130), because word, which holds the 13-bit address of the
EEPROM data memory can be used to store memory location
frequently updated values. An on-chip timer being accessed. The register combination of
controls the write time and it will vary with EEDATH:EEDATA holds the 14-bit data for
voltage and temperature, as well as from chip to writes, or
chip. Please refer to the specifications for exact reflects the value of program memory after a
limits (specifications D122 and D133). A byte or read operation. Just as in EEPROM data
word write automatically erases the location and memory accesses, the value of the
writes the new value (erase before write). EEADRH:EEADR registers must be within the
Writing to EEPROM data memory does not valid range of program memory, depending on
impact the operation of the device. Writing to the device: 0000h to 1FFFh for the
program memory will cease the execution of PIC16F873/874, or 0000h to 3FFFh for the
instructions until the write is complete. The PIC16F876/877. Addresses outside of this
program memory cannot be accessed during range do not wrap around to 0000h (i.e., 4000h
the write. During the write operation, the does not map to 0000h on the PIC16F877).
oscillator continues to run, the peripherals EECON1 and EECON2 Registers
continue to function and interrupt events will be The EECON1 register is the control register for
detected and essentially “queued” until the write configuring and initiating the access. The
is complete. When the write completes, the next EECON2 register is not a physically imple-
instruction in the pipeline is executed and the mented register, but is used exclusively in the
branch to the interrupt vector will take place, if memory write sequence to prevent
the interrupt is enabled and occurred during the inadvertent writes. There are many bits used to
write. Read and write access to both memories control the read and write operations to
take place indirectly through a set of Special EEPROM data and FLASH program memory.
Function Registers (SFR). The six SFRs used The EEPGD bit determines if the access will be
are: a program or data memory access. When clear,
EEDATA any subsequent operations will work on the
EEDATH EEPROM data memory. When set, all subse-
EEADR quent operations will operate in the program
EEADRH memory. Read operations only use one addi-
EECON1
tional bit, RD, which initiates the read operation EECON1 REGISTER (ADDRESS 18Ch)
from the desired memory location. Once this bit bit 7 EEPGD: Program/Data EEPROM Select
is set, the value of the desired memory location bit
will be available in the data registers. This bit 1 = Accesses program memory
cannot be cleared by firmware. It is automati- 0 = Accesses data memory
cally cleared at the end of the read operation. (This bit cannot be changed while a read or write
For EEPROM data memory reads, the data will operation is in progress)
be available in the EEDATA register in the very bit 6-4 Unimplemented: Read as '0'
next instruction cycle after the RD bit is set. For bit 3 WRERR: EEPROM Error Flag bit
program memory reads, the data will be loaded 1 = A write operation is prematurely terminated
into the EEDATH:EEDATA registers, following (any MCLR Reset or any WDT Reset during
the second instruction after the RD bit is set. normal operation)
Write operations have two control bits, WR and 0 = The write operation completed
WREN, and two status bits, WRERR and EEIF. bit 2 WREN: EEPROM Write Enable bit
The WREN bit is used to enable or disable the 1 = Allows write cycles
write operation. When WREN is clear, the write 0 = Inhibits write to the EEPROM
operation will be disabled. Therefore, the bit 1 WR: Write Control bit
WREN bit must be set before executing a write 1 = Initiates a write cycle. (The bit is cleared by
operation. The WR bit is used to initiate the write hardware once write is complete. The WR bit
operation. It also is automatically cleared at the can only be set (not cleared) in software.)
end of the write operation. The interrupt flag 0 = Write cycle to the EEPROM is complete
EEIF is used to determine when the memory bit 0 RD: Read Control bit
write completes. This flag must be cleared in 1 = Initiates an EEPROM read. (RD is cleared in
software before setting the WR bit. For hardware. The RD bit can only be set (not
EEPROM data memory, once the WREN bit and cleared) in software.)
the WR bit have been set, the desired memory 0 = Does not initiate an EEPROM read
address in EEADR will be erased, followed by a Legend:
write of the data R = Readable bit W = Writable bit U =
in EEDATA. This operation takes place in Unimplemented bit, read as '0'
parallel with the microcontroller continuing to - n = Value at POR '1' = Bit is set '0' = Bit is
execute normally. cleared x = Bit is unknown
When the write is complete, the EEIF flag bit will Reading the EEPROM Data Memory
be set. For program memory, once the WREN Reading EEPROM data memory only requires
bit and the WR bit have been set, the that the desired address to access be written to
microcontroller will cease to execute instruc- the EEADR
tions. The desired memory location pointed to register and clear the EEPGD bit. After the RD
by EEADRH:EEADR will be erased. Then, the bit is set, data will be available in the EEDATA
data value in EEDATH:EEDATA will be pro- register on the
grammed. When complete, the EEIF flag bit will very next instruction cycle. EEDATA will hold this
be set and the microcontroller will continue to value until another read operation is initiated or
execute code. The WRERR bit is used to until it is written by firmware.
indicate when the PIC16F87X device has been The steps to reading the EEPROM data
reset during a write operation. WRERR should memory are:
be cleared after Power-on Reset. Thereafter, it 1. Write the address to EEDATA. Make sure that
should be checked on any other the address is not larger than the memory size
RESET. The WRERR bit is set when a write of the PIC16F87X device.
operation is interrupted by a MCLR Reset, or a 2. Clear the EEPGD bit to point to EEPROM
WDT Time-out data memory.
Reset, during normal operation. In these 3. Set the RD bit to start the read operation.
situations, following a RESET, the user should 4. Read the data from the EEDATA register.
check the WRERR bit and rewrite the memory Writing to the EEPROM Data Memory
location, if set. The contents of the data There are many steps in writing to the EEPROM
registers, address registers and EEPGD bit are data memory. Both address and data values
not affected by either MCLR Reset, or WDT must be written to the SFRs. The EEPGD bit
Timeout Reset, during normal operation.
must be cleared, and the WREN bit must be set, MOVF EEDATA, W ;W = EEDATA
to enable writes. The WREN bit should be kept
clear at all times, except when writing to the EEPROM DATA WRITE
EEPROM data. The WR bit can only be set if the BSF STATUS, RP1 ;
WREN bit was set in a previous operation, i.e., BSF STATUS, RP0 ;Bank 3
they both cannot be set in the same operation. BTFSC EECON1, WR ;Wait for
The WREN bit should then be cleared by GOTO $-1 ;write to finish
firmware after the write. Clearing the WREN bit BCF STATUS, RP0 ;Bank 2
before the write actually completes will not MOVF ADDR, W ;Address to
terminate the write in progress. Writes to MOVWF EEADR ;write to
EEPROM data memory must also be prefaced MOVF VALUE, W ;Data to
with a special sequence of instructions, that MOVWF EEDATA ;write
prevent inadvertent write operations. This is a BSF STATUS, RP0 ;Bank 3
sequence of five instructions that must be BCF EECON1, EEPGD ;Point to Data memory
executed without interruptions. The firmware BSF EECON1, WREN ;Enable writes
should verify that a write is not in progress, ;Only disable interrupts
before starting another cycle. The steps to write BCF INTCON, GIE ;if already enabled,
to EEPROM data memory are: ;otherwise discard
1. If step 10 is not implemented, check the WR MOVLW 0x55 ;Write 55h to
bit to see if a write is in progress. MOVWF EECON2 ;EECON2
2. Write the address to EEADR. Make sure that MOVLW 0xAA ;Write AAh to
the address is not larger than the memory size of MOVWF EECON2 ;EECON2
the PIC16F87X device. BSF EECON1, WR ;Start write operation
3. Write the 8-bit data value to be programmed ;Only enable interrupts
in the EEDATA register. BSF INTCON, GIE ;if using interrupts,
4. Clear the EEPGD bit to point to EEPROM ;otherwise discard
data memory. BCF EECON1, WREN ;Disable writes
5. Set the WREN bit to enable program opera- TIMER0 MODULE
tions. The Timer0 module timer/counter has the
6. Disable interrupts (if enabled). following features:
7. Execute the special five instruction sequence: 8-bit timer/counter
Write 55h to EECON2 in two steps (first to W, Readable and writable
then to EECON2) 8-bit software programmable prescaler
Write AAh to EECON2 in two steps (first to W, Internal or external clock select
then to EECON2) Interrupt on overflow from FFh to 00h
Set the WR bit Edge select for external clock
8. Enable interrupts (if using interrupts). The prescaler shared with the WDT. Timer mode
9. Clear the WREN bit to disable program is selected by clearing bit T0CS
operations. (OPTION_REG<5>). In Timer mode, the Timer0
10. At the completion of the write cycle, the WR module will increment every instruction cycle
bit is cleared and the EEIF interrupt flag bit is set. (without prescaler). If the TMR0 register is
(EEIF must be cleared by firmware.) If step 1 is written, the increment is inhibited for the
not implemented, then firmware should check following two instruction cycles. The user can
for EEIF to be set, or WR to clear, to indicate the work around this by writing an adjusted value to
end of the program cycle. the TMR0 register. Counter mode is selected by
EEPROM DATA READ setting bit T0CS
BSF STATUS, RP1 ; (OPTION_REG<5>). In Counter mode, Timer0
BCF STATUS, RP0 ;Bank 2 will increment either on every rising, or falling
MOVF ADDR, W ;Write address edge of pin
MOVWF EEADR ;to read from RA4/T0CKI. The incrementing edge is deter-
BSF STATUS, RP0 ;Bank 3 mined by the Timer0 Source Edge Select bit,
BCF EECON1, EEPGD ;Point to Data memory T0SE
BSF EECON1, RD ;Start read operation (OPTION_REG<4>). Clearing bit T0SE selects
BCF STATUS, RP0 ;Bank 2 the rising edge. The prescaler is mutually
exclusively shared between the Timer0 module Timer2 module has an 8-bit period register,
and the Watchdog Timer. The prescaler is not PR2. Timer2 increments from 00h until it
readable or writable. matches PR2 and then resets to 00h on the next
Timer0 Interrupt increment cycle. PR2 is
The TMR0 interrupt is generated when the a readable and writable register. The PR2
TMR0 register overflows from FFh to 00h. This register is initialized to FFh upon RESET. The
overflow sets bit match output of TMR2 goes through a 4-bit
T0IF (INTCON<2>). The interrupt can be postscaler (which gives a 1:1 to 1:16 scaling
masked by clearing bit T0IE (INTCON<5>). Bit inclusive) to generate a TMR2 interrupt (latched
T0IF must be cleared in software by the Timer0 in flag bit TMR2IF, (PIR1<1>)). Timer2 can be
module Interrupt Service Routine before re- shut-off by clearing control bit TMR2ON
enabling this interrupt. The (T2CON<2>), to minimize power consumption.
TMR0 interrupt cannot awaken the processor Timer2 Prescaler and Postscaler
from SLEEP, since the timer is shut-off during The prescaler and postscaler counters are
SLEEP. cleared
TIMER1 MODULE when any of the following occurs:
The Timer1 module is a 16-bit timer/counter a write to the TMR2 register
consisting of two 8-bit registers (TMR1H and a write to the T2CON register
TMR1L), which are readable and writable. The any device RESET (POR, MCLR Reset, WDT
TMR1 Register pair (TMR1H:TMR1L) incre- Reset, or BOR)
ments from 0000h to FFFFh TMR2 is not cleared when T2CON is written.
and rolls over to 0000h. The TMR1 Interrupt, if Output of TMR2
enabled, is generated on overflow, which is The output of TMR2 (before the postscaler) is
latched in interrupt flag bit TMR1IF (PIR1<0>). fed to the SSP module, which optionally uses it
This interrupt can be enabled/disabled by to generate shift clock.
setting/clearing TMR1 interrupt enable bit
TMR1IE (PIE1<0>). Timer1 can operate in one ANALOG-TO-DIGITALCONVERTER (A/D)
of two modes: MODULE
As a timer The Analog-to-Digital (A/D) Converter module
As a counter has five inputs for the 28-pin devices and eight
The operating mode is determined by the clock for the other
select bit, TMR1CS (T1CON<1>). In Timer devices. The analog input charges a sample
mode, Timer1 increments every instruction and hold capacitor. The output of the sample
cycle. In Counter mode, it increments on every and hold capacitor is the input into the converter.
rising edge of the external clock input. Timer1 The converter then generates a digital result of
can be enabled/disabled by setting/clearing this analog level via successive approximation.
control bit TMR1ON (T1CON<0>). Timer1 also The A/D conversion of the analog input signal
has an internal “RESET input”. ThisRESET can results in a corresponding 10-bit digital number.
be generated by either of the two CCP modules The A/D module has high and low voltage
When the Timer1 oscillator is enabled reference input that is software selectable to
(T1OSCEN is set), the RC1/T1OSI/CCP2 and some combination of VDD, VSS, RA2, or RA3.
RC0/T1OSO/T1CKI The A/D converter has a unique feature of being
pins become inputs. That is, the TRISC<1:0> able
value is ignored, and these pins read as '0'. to operate while the device is in SLEEP mode.
Timer2 To operate in SLEEP, the A/D clock must be
Timer2 is an 8-bit timer with a prescaler and a derived from the
postscaler. It can be used as the PWM time- A/D's internal RC oscillator The A/D module has
base for four registers. These registers are:
the PWM mode of the CCP module(s). The A/D Result High Register (ADRESH)
TMR2 register is readable and writable, and is A/D Result Low Register (ADRESL)
cleared on any A/D Control Register0 (ADCON0)
device RESET. The input clock (FOSC/4) has a A/D Control Register1 (ADCON1)
prescale option of 1:1, 1:4, or 1:16, selected by The ADCON0 register, controls the operation of
control bits the A/D module. The ADCON1 register, shown
T2CKPS1:T2CKPS0 (T2CON<1:0>). The
in Register 11-2, configures the functions of the followed for doing an A/D
port pins. The port pins can be configured as Conversion:
analog inputs (RA3 can also be the voltage 1. Configure the A/D module:
reference), or as digital I/O. Configure analog pins/voltage reference and
bit 7-6 ADCS1:ADCS0: A/D Conversion Clock digital I/O (ADCON1)
Select bits Select A/D input channel (ADCON0)
00 = FOSC/2 Select A/D conversion clock (ADCON0)
01 = FOSC/8 Turn on A/D module (ADCON0)
10 = FOSC/32 2. Configure A/D interrupt (if desired):
11 = FRC (clock derived from the internal A/D Clear ADIF bit
module RC oscillator) Set ADIE bit
bit 5-3 CHS2:CHS0: Analog Channel Select bits Set PEIE bit
000 = channel 0, (RA0/AN0) Set GIE bit
001 = channel 1, (RA1/AN1) 3. Wait the required acquisition time.
010 = channel 2, (RA2/AN2) 4. Start conversion:
011 = channel 3, (RA3/AN3) Set GO/DONE bit (ADCON0)
100 = channel 4, (RA5/AN4) 5. Wait for A/D conversion to complete, by
101 = channel 5, (RE0/AN5)(1) either: Polling for the GO/DONE bit to be
110 = channel 6, (RE1/AN6)(1) cleared
111 = channel 7, (RE2/AN7)(1) (with interrupts enabled); OR Waiting for the
bit 2 GO/DONE: A/D Conversion Status bit A/D interrupt
If ADON = 1: 6. Read A/D result register pair
1 = A/D conversion in progress (setting this bit (ADRESH:ADRESL), clear bit ADIF if required.
starts the A/D conversion) 7. For the next conversion, go to step 1 or step 2,
0 = A/D conversion not in progress (this bit is as required. The A/D conversion time per bit is
automatically cleared by hardware when the defined as TAD. A minimum wait of 2TAD is
A/D required before the next acquisition starts.
conversion is complete) Selecting the A/D Conversion Clock
bit 1 Unimplemented: Read as '0' The A/D conversion time per bit is defined as
bit 0 ADON: A/D On bit TAD. The A/D conversion requires a minimum
1 = A/D converter module is operating 12TAD per 10-bit
0 = A/D converter module is shut-off and conversion. The source of the A/D conversion
consumes no operating current clock is software selected. The four possible
ADCON1 REGISTER (ADDRESS 9Fh) options for TAD
bit 7 ADFM: A/D Result Format Select bit are:
1 = Right justified. 6 Most Significant bits of 2TOSC
ADRESH are read as '0'. 8TOSC
0 = Left justified. 6 Least Significant bits of 32TOSC
ADRESL are read as '0'. Internal A/D module RC oscillator For correct
bit 6-4 Unimplemented: Read as '0' A/D conversions, the A/D conversion clock must
bit 3-0 PCFG3:PCFG0: A/D Port Configuration be selected to ensure a minimum TAD time of
Control bits: 1.6us.
The ADRESH:ADRESL registers contain the Configuring Analog Port Pins
10-bit result of the A/D conversion. When the The ADCON1 and TRIS registers control the
A/D conversion operation of the A/D port pins. The port pins that
is complete, the result is loaded into this A/D are desired as
result register pair, the GO/DONE bit analog inputs must have their corresponding
(ADCON0<2>) is cleared TRIS bits set (input). If the TRIS bit is cleared
and the A/D interrupt flag bit ADIF is set. After the (output), the digital output level (VOH or VOL)
A/D module has been configured as desired, the will be converted. The A/D operation is inde-
selected channel must be acquired before the pendent of the state of the
conversion is started. The analog input chan- CHS2:CHS0 bits and the TRIS bits.
nels must have their corresponding TRIS bits A/D Conversions
selected as inputs. These steps should be Clearing the GO/DONE bit during a conversion
will abort the current conversion. The A/D result Effects of a RESET
register A device RESET forces all registers to their
pair will NOT be updated with the partially RESET state. This forces the A/D module to be
completed A/D conversion sample. That is, the turned off, and
ADRESH:ADRESL registers will continue to any conversion is aborted. All A/D input pins are
contain the value of the last completed conver- configured as analog inputs. The value that is in
sion (or the last value written to the the ADRESH:ADRESL registers is not modified
ADRESH:ADRESL registers). After the A/D for a Power-on Reset. The ADRESH:ADRESL
conversion is aborted, a 2TAD wait is required registers will contain unknown data after a
before the next acquisition is started. After this Power-on Reset
2TAD wait, acquisition on the selected channel The Software
is automatically started. The GO/DONE bit can This Software has been written in assembly
then be set to start the conversion.After the GO language. LCD used in 4-wire mode of
bit is set, the first time segment has a minimum operation to initialize LCD in 4-bit mode a binary
of TCY and a maximum of TAD. value 00101000 is supplied to command
A/D CONVERSION TAD CYCLES resister of LCD controller. To send this bit
A/D RESULT REGISTERS pattern microcontroller first send Upper nibble to
The ADRESH:ADRESL register pair is the data lines of LCD D7, D6, D5, D4 via
location where the 10-bit A/D result is loaded at microcontroller PORTB pin RB7,RB6,RB5,RB4
the completion then applying RS=0 , R/W=0 and a pulse at EN
of the A/D conversion. This register pair is 16- pin of LCD through PORTB pin RB0, RB1, RB2.
bits wide. The A/D module gives the flexibility to There after it send lower nibble to the same data
left or right justify the 10-bit result in the 16-bit lines D7,D6,D5,D4 via microcontroller PORTB
result register. The A/D Format Select bit pin RB7,RB6,RB5,RB4 then applying RS=0 ,
(ADFM) controls this justification. Figure 11-4 R/W=0 and a pulse at EN pin of LCD through
shows the operation of the A/D result justifica- PORTB pin RB0, RB1, RB2. Next it will set
tion. The extra bits are loaded with '0's'. When display on cursor blinking by bit pattern
an A/D result will not overwrite these locations (00001110), increment cursor (00000110), clear
(A/D disable), these registers may be used as display (00000001) finally cursor at row one and
two general purpose 8-bit registers. first column (10000000). After initializing LCD
A/D Operation During SLEEP microcontroller, configure PORTA as analog
The A/D module can operate during SLEEP input for reading temperature sensor, sensor
mode. This requires that the A/D clock source be provide 10mV/0C, after reading temperature
set to RC from the LM35DZ microcontroller convert it into
(ADCS1:ADCS0 = 11). When the RC clock temperature value and display on LCD. This
source is selected, the A/D module waits one system allow user to define a threshold
instruction cycle temperature, when system temperature goes
before starting the conversion. This allows the above the user define threshold temperature,
SLEEP instruction to be executed, which system raises alarm. For entering threshold
eliminates all digital temperature user has to press ENT Key then
switching noise from the conversion. When the UP/DWN key to set threshold temperature and
conversion is completed, the GO/DONE bit will then ENT to finalize the threshold temperature.
be cleared and the result loaded into the ADRES Software is provided here.
register. If the A/D interrupt is enabled, the
device will wake-up from void tagtemperaturedata1(void);
SLEEP. If the A/D interrupt is not enabled, the void getvalue(void);
A/D module will then be turned off, although the void findvalue(void);
ADON bit v o i d
will remain set. When the A/D clock source is programmabletemperaturesecondreadfortemp
another clock option (not RC), a SLEEP eraturecascade(unsigned char);
instruction will cause the present conversion to v o i d
be aborted and the A/D module to be turned off, temperaturesecondreadfortemperaturevalue(u
though the ADON bit will remain set. Turning off nsigned char *);
the A/D places the A/D module in its lowest v o i d
current consumption state.
circulartemperaturesecondreadfortemperature PORTB.F3=0;
check(void); PORTC.F3=0;
void tagtemperaturedata2(void); PORTC.F4=0;
void valuescanneddata(unsigned char); PORTC.F5=0;
void rotateleftread(unsigned short); PORTC.F6=0;
v o i d PORTC.F7=0;
nnethcheckingofsecondreadfortemperature(un programmabletemperaturesecondreadfortemp
signed long); eraturecascade(0x80);
void supervisormode(unsigned short); while(1)
void locateramdatafunction(void); {
unsigned int giventasklocation, programmabletemperaturesecondreadfortemp
programreadlocation; eraturecascade(0x01);
void secondreadfortemperature(void); ADCON0=0x81;//FOSC/32 Channel AN0 ADC
void tagtemperaturedata3(void); on ADON=1
unsigned int temperaturecheckprogram(void); ADCON1=0x00;//All PORTA as analog channel
u n s i g n e d i n t vref at AN3
rightcheck,alpha1,alpha2,alpha3,alpha4,alpha locateramdatafunction();
5,alpha6,alpha7,alpha8,alpha9; secondreadfortemperature();
void alpha(void); if(PORTC.F1==0)
void main() {
{ while(PORTC.F1==0);
unsigned char ii; Delay_ms(40);
TRISB=0x00; if(PORTC.F0==0)
TRISA=0xFF; {
TRISE=0xFF; while(PORTC.F0==0);
ADCON0=0xB9;//FOSC/32 Channel AN5 ADC alpha();
on ADON=1 locateramdatafunction();
ADCON1=0x00;//All PORTA as analog channel
vref at AN3 secondreadfortemperature();
TRISD=0x00;//PORTD.F7,F6,F5 as nput pins }
TRISC=0x07; }
TRISB=0x00; //PORTB as output port
programmabletemperaturesecondreadfortemp }//end of while(1)
eraturecascade(0x28);//4 bit 2 lines }//end of main
programmabletemperaturesecondreadfortemp
eraturecascade(0x0E);//temperaturesecondre v o i d
adfortemperaturevalue on cursor on circulartemperaturesecondreadfortemperature
programmabletemperaturesecondreadfortemp check(void)
eraturecascade(0x06);//enable {
temperaturesecondreadfortemperaturevalue Unsigned int i;
move cursor PORTB.F0=0;
programmabletemperaturesecondreadfortemp PORTB.F1=1;
eraturecascade(0x01);//clear //P21=1;
temperaturesecondreadfortemperaturevalue while(PORTB.F7)
programmabletemperaturesecondreadfortemp {
eraturecascade(0x80);//cursor at line 0 colunm PORTB.F2=0;
0 for(i=0;i<100;i++)getvalue();
temperaturesecondreadfortemperaturevalue(" PORTB.F2=1;
Programmable Temperature Alarm "); }
Delay_ms(1000); } / / e n d o f
programreadlocation=0; circulartemperaturesecondreadfortemperature
rightcheck=9; check()
programmabletemperaturesecondreadfortemp v o i d
eraturecascade(0x01); programmabletemperaturesecondreadfortemp
PORTD=0;
eraturecascade(unsigned char a) v o i d
{ temperaturesecondreadfortemperaturevalue(u
unsigned int i; nsigned char *str)
unsigned char b; {
circulartemperaturesecondreadfortemperature unsigned int i,ii;
check(); unsigned char b,v;
TRISB=0x00; for(i=0;i<strlen(str)-1;++i)
b=a; {
b=a & 0x80; if(i==17)
if(b){PORTB.F7=1;} programmabletemperaturesecondreadfortemp
else {PORTB.F7=0;} eraturecascade(0xc0);
if(i==33)
b=a & 0x40; programmabletemperaturesecondreadfortemp
if(b){PORTB.F6=1;} eraturecascade(0x80);
else{PORTB.F6=0;}
circulartemperaturesecondreadfortemperature
check();
b=a & 0x20; TRISB=0X00;
if(b){PORTB.F5=1;}
else{PORTB.F5=0;} v=str[i];

b=a & 0x10; b=v & 0x80;


if(b){PORTB.F4=1;} if(b){PORTB.F7=1;}
else{PORTB.F4=0;} else {PORTB.F7=0;}

PORTB.F0=0; b=v & 0x40;


PORTB.F1=0; if(b){PORTB.F6=1;}
PORTB.F2=1; else{PORTB.F6=0;}
for(i=0;i<200;i++)getvalue();
PORTB.F2=0;
b=v & 0x20;
if(b){PORTB.F5=1;}
b=a & 0x08; else{PORTB.F5=0;}
if(b){PORTB.F7=1;}
else {PORTB.F7=0;} b=v & 0x10;
if(b){PORTB.F4=1;}
b=a & 0x04; else{PORTB.F4=0;}
if(b){PORTB.F6=1;}
else{PORTB.F6=0;}
PORTB.F0=1;
PORTB.F1=0;//R/W=0 write
b=a & 0x02; PORTB.F2=1;//En=1;
if(b){PORTB.F5=1;} for(ii=0;ii<200;ii++)getvalue();
else{PORTB.F5=0;} PORTB.F2=0;//En=0;

b=a & 0x01;


if(b){PORTB.F4=1;} b=v & 0x08;
else{PORTB.F4=0;} if(b){PORTB.F7=1;}
else {PORTB.F7=0;}
PORTB.F0=0;
PORTB.F1=0; b=v & 0x04;
PORTB.F2=1;//EN=1 if(b){PORTB.F6=1;}
for(i=0;i<200;i++)getvalue(); else{PORTB.F6=0;}
PORTB.F2=0;//EN=0
}
b=v & 0x02;
if(b){PORTB.F5=1;} void rotateleftread(unsigned short tt)
else{PORTB.F5=0;} {
unsigned short ch,v,b,cc=0x2E;
b=v & 0x01;
if(b){PORTB.F4=1;}
else{PORTB.F4=0;} ch = (tt / 10) % 10;
ch=ch+48;
supervisormode(ch);
PORTB.F0=1;
PORTB.F1=0;//R/W=0 write
PORTB.F2=1;//En=1; ch = tt % 10;
for(ii=0;ii<200;ii++)getvalue(); ch=ch+48;
PORTB.F2=0;//En=0; supervisormode(ch);
}//end of for }
} / / e n d o f
temperaturesecondreadfortemperaturevalue void supervisormode(unsigned short k)
void findvalue(void) {
{ unsigned short b,v;
unsigned int i; unsigned int ii;
for(i=0;i<6000;i++) circulartemperaturesecondreadfortemperature
getvalue(); check();
} v=k;
void getvalue(void)
{ b=v & 0x80;
; if(b){PORTB.F7=1;}
} else {PORTB.F7=0;}
v o i d
nnethcheckingofsecondreadfortemperature(un b=v & 0x40;
signed long tt) if(b){PORTB.F6=1;}
{ else{PORTB.F6=0;}
unsigned short ch,v,b,cc=0x2E;
ch = (tt / 1000) % 10;
ch=ch+48; b=v & 0x20;
supervisormode(ch); if(b){PORTB.F5=1;}
else{PORTB.F5=0;}

ch = (tt / 100) % 10; b=v & 0x10;


ch=ch+48; if(b){PORTB.F4=1;}
supervisormode(ch); else{PORTB.F4=0;}

ch = (tt / 10) % 10;


ch=ch+48; PORTB.F0=1;
supervisormode(ch); PORTB.F1=0;
PORTB.F2=1;
supervisormode(0x2E); for(ii=0;ii<100;ii++)getvalue();
PORTB.F2=0;//En=0;
ch = tt % 10;
ch=ch+48;
supervisormode(ch); b=v & 0x08;
if(b){PORTB.F7=1;}
else {PORTB.F7=0;}

}
b=v & 0x04; if(dd&0x04)a6=16;else a6=0;
if(b){PORTB.F6=1;} if(dd&0x02)a7=8;else a7=0;
else{PORTB.F6=0;} if(dd&0x01)a8=4;else a8=0;
if(ee&0x80)a9=2;else a9=0;
if(ee&0x40)a10=1;else a10=0;
b=v & 0x02; v1=(unsigned int)g;
if(b){PORTB.F5=1;} programmabletemperaturesecondreadfortemp
else{PORTB.F5=0;} eraturecascade(0xC0);//Line 2 of LCD
nnethcheckingofsecondreadfortemperature(v1
b=v & 0x01; );
if(b){PORTB.F4=1;} supervisormode(0xA0);
else{PORTB.F4=0;} supervisormode(0x43);
supervisormode(0x45);
supervisormode(0x4E);
PORTB.F0=1; supervisormode(0x54);
PORTB.F1=0; supervisormode(0x49);
PORTB.F2=1; supervisormode(0x47);
for(ii=0;ii<100;ii++)getvalue(); supervisormode(0x52);
PORTB.F2=0;//En=0; supervisormode(0x41);
supervisormode(0x44);
supervisormode(0x45);
}//end of supervisormode() Delay_ms(1000);

void locateramdatafunction(void) }
{
u n s i g n e d i n t void alpha(void)
a1,a2,a3,a4,a5,a6,a7,a8,a9,a10,temperature; {
u n s i g n e d c h a r programmabletemperaturesecondreadfortemp
arr[8]={512,256,128,64,32,16,8,4}; eraturecascade(0x01);
unsigned char dd,ee,x,y; temperaturesecondreadfortemperaturevalue("
unsigned int v1; dshh");
float g; Delay_ms(1000);
temperature=0; programmabletemperaturesecondreadfortemp
programmabletemperaturesecondreadfortemp eraturecascade(0x01);
eraturecascade(0x01); supervisormode(0X54);
supervisormode(0x54); supervisormode(0X45);
supervisormode(0x45); supervisormode(0X4D);
supervisormode(0x4D); supervisormode(0X50);
supervisormode(0x50); supervisormode(0X45);
supervisormode(0x45); supervisormode(0X52);
supervisormode(0x52); supervisormode(0X41);
supervisormode(0x41); supervisormode(0X54);
supervisormode(0x54); supervisormode(0X55);
supervisormode(0x55); supervisormode(0X52);
supervisormode(0x52); supervisormode(0X45);
supervisormode(0x45); programreadlocation=temperaturecheckprogra
a1=0;a2=0;a3=0;a4=0;a5=0;a6=0;a7=0;a8=0; m();
a9=0;a10=0; Eeprom_Write(10u,programreadlocation);
dd=ADRESH;
ee=ADRESL; }
if(dd&0x80)a1=512;else a1=0;
if(dd&0x40)a2=256;else a2=0;
if(dd&0x20)a3=128;else a3=0;
if(dd&0x10)a4=64;else a4=0; unsigned int temperaturecheckprogram(void)
if(dd&0x08)a5=32;else a5=0;
{ {
unsigned int a,xx;
a=1; }
TRISC=0xFF;
while(1) void tagtemperaturedata1(void)
{ {
programmabletemperaturesecondreadfortemp unsigned int i,t;
eraturecascade(0xC0); for(t=0;t<1;t++)
rotateleftread(a); {
if(PORTC.F0==0) for(i=0;i<25;i++)
{ {
if(PORTC.F0==0){a++;} valuescanneddata(alpha1);
} PORTC=0xFE;
else if(PORTC.F2==0) PORTD.F7=1;
{ }
if(PORTC.F2==0){a--;} for(i=0;i<25;i++)
} {
else if(PORTC.F1==0) valuescanneddata(alpha2);
{ PORTC=0xFD;
if(PORTC.F1==0){xx=a;} PORTD.F7=1;
} }
} for(i=0;i<25;i++)
return(xx); }//end of temperaturecheckprogram {
valuescanneddata(alpha3);
PORTC=0xFB;
void secondreadfortemperature(void) PORTD.F7=1;
{ }
unsigned int h,k,i,ii; }
float g;
unsigned char hh; }

i=Eeprom_Read(10u);
rightcheck=8;
k=(unsigned int)g;
if(giventasklocation>(k-2)) void tagtemperaturedata2(void)
{ {
programmabletemperaturesecondreadfortemp unsigned int i,t;
eraturecascade(0x01); for(t=0;t<1;t++)
temperaturesecondreadfortemperaturevalue(" {
SECONDREADFORTEMPERATURE."); for(i=0;i<25;i++)
supervisormode(0x41); {
supervisormode(0x4C); valuescanneddata(alpha4);
supervisormode(0x41); PORTC=0xF7;
supervisormode(0x52); PORTD.F7=1;
supervisormode(0x4D); }
for(ii=0;ii<20;ii++) for(i=0;i<25;i++)
{ {
PORTB.F3=1; valuescanneddata(alpha5);
Delay_ms(50); PORTC=0xEF;
PORTB.F3=0; PORTD.F7=1;
Delay_ms(50); }
} for(i=0;i<25;i++)
} {
} valuescanneddata(alpha6);
void valuescanneddata(unsigned char a)
PORTC=0xDF;
PORTD.F7=1;
}
}

}
Void tagtemperaturedata3(void)
{
unsigned int i,t;
for(t=0;t<1;t++)
{
for(i=0;i<25;i++)
{
valuescanneddata(alpha7);
PORTC=0xBF;
PORTD.F7=1;
}
for(i=0;i<25;i++)
{
valuescanneddata(alpha8);
PORTC=0x7F;
PORTD.F7=1;
}
for(i=0;i<95;i++)
{
valuescanneddata(alpha9);
PORTC=0xFF;
PORTD.F7=0;
}
}

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