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4ftp256, using Simulink and the System Generator blockset for DSP/FPGA.
Introduction
BPSK Modulation
BPSK Transmitter
Description
BPSK Modulator
- Pulse Generator: it simulates a train of pulses. This Mcode block makes a call to a .m file
- Scope: oscilloscope used to visualize the which contains the programming of the
results. multiplexer in the following way:
- Sine Wave: it generates sine functions.
function sal = BPSKmultiplex
(ent_codif,porta,porta_despl);
System Generator Blockset
if ent_codif==1;
- Mcode: it calls a Matlab .m file and executes it sal = porta;
else
inside the simulation [2]. sal = porta_despl;
- Gateway In: it makes an approach to the end
behaviour of a signal in hardware.
- Gateway Out: it returns an approach of the This code, allows us to obtain an output carrier
behaviour of a signal in hardware to the (porta) signal when the input is a level of high
simulation mode. voltage, a cosine in this case, and a dephased
- Mult: it carries out the multiplication of its cosine (porta_despl) signal of exit when the
two inputs. input is a level of low voltage. This high or low
- FIR: it simulates a FIR Filter, making a call to state is given by the signal that contains the
the Matlab FDATool. information.
- System Generator: It provides control of the
system and simulation parameters. It is used to The output signal of the multiplexer is the
invoke the generated code. modulated one and is ready to be thrown to the
- Resource Estimator: it presents the resources channel.
of the device used in the simulation of the
circuit. Figure 5 shows the signal containing the
- FDATool: Filter Design and Analysis tool. information upper part, and the modulated
signal bottom part.
System Generator
Simulation:
The first phase is the realization of the
modulator according to the scheme showed in
the figure 4.
This code, allows us to obtain at the output a Implementation of the modulator and
voltage level 1, when the input (ent) is higher demodulator in the Xilinx FPGA Spartan3
than certain reference voltage in this case 0V development board.
and a level voltage 1 when the input (ent) is
lower than such reference voltage. To implement the modulators in the Spartan3
development board it is necessary to know basic
It should also be mentioned that for the concepts on how is its operation and internal
transmission channel simulation a white structure:
gaussian noise block generator will be placed.
Field-Programmable Gate Array (FPGA)
In Figure 7 it is presented the simulated
demodulation process. An FPGA consists on arrangements of several
programmable blocks (logical blocks) which are
interconnected between themselves with
input/output cells by means of vertical and
horizontal connection channels [3].
Program Tools for the Implementation
An FPGA presents the following characteristics:
For the implementation of the OOK, FSK and
BPSK modulators, already simulated, a tool
offered by Xilinx, denominated JTAG Co-Sim
will be used; this block allows the co-simulation
of the design elaborated in the Spartan-3
development board.
References