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Lectured by Nitus Voraphonpiput, Ph.D. Engineer Level 8 Technical Analysis Foreign Power purchase Agreement Branch Power Purchase Agreement Division Electricity Generating Authority of Thailand
Objective
Providing basic concept of the HVDC transmission system to attendee. Introducing operation and control of the HVDC transmission System. Discussing applications of the HVDC and its limitations.
Contents
3. Control of DC Transmission
Q&A for 15 minutes
This question is often asked. One response is that losses are lower, but is it true? Reference [2] has been explained using Insulation ratio and Power capacity in order to proof this statement.
A given insulation length for an overhead line, the ratio of continuous working withstand voltage factor (k) is expressed as, (note ) 1 k 2
A line has to be insulated for over-voltages expected during faults, switching operations, etc. Normally AC transmission line is insulated against overvoltages of more than 4 times the normal effective (rms) voltage.
5
For suitable converter control the corresponding HVDC transmission ratio is expressed as
Assumed resistances (R) of the lines are equal in both cases (HVDC and HVAC). AC Loss = 3 x R x IL2 and DC Loss = 2 x R x Id2
3 Id = IL Let losses in both cases are equal, so that, 2
The power of a HVAC system and a bipolar HVDC system are as: DC Power = 2 Vd I d AC Power = 3VP I L cos
8
k1 K =k k2
It can be seen that HVDC requires insulation ratio at least 20% less that the HVAC which essentially reflects the cost.
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Power Capacity
Compared a double circuit HVAC line (6 lines) and double circuit DC line of Bipolar HVDC. Power transmitted by HVAC (Pac) and HVDC (Pdc) are
Pdc = 6Vd I d
For the same values of k, k1 and k2 as above and pf is assumed to 1.0, the power transmitted by overhead lines can be increased to 147%. The percentage line losses, which is inversion of the power transmit, are reduced to 68%.
In addition, for underground or submarine cables, power transmitted by HVAC cable can be increase 294 % and line loss reduced to 34%. Note: for cable k equals at least two.
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2. HVDC Principle
The HVDC valve comprises the thyristors acting as controlled switch. In the OFF state, the thyristor blocks the current to flow, as long as the reverse or forward breakdown voltages is not exceeded. It changes to ON state if it is forward biased (VAK > 0) and has small positive Gate voltage applied between the Gate and the Cathode.
Gate (G) Anode (A)
Cathode (K)
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2. HVDC Principle
Thyristor switches between conducting state (ON) and non-conducting (OFF) state in response to control signal (firing) as its characteristic. The Gate voltage need not to be present when the thyristor is already in ON state.
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2. HVDC Principle
Anode (A) Rd = VAK / IA
iA
Rd VT
ir
Rr = VAK / IA
VT
Ploss-ONstate Ploss-OFFstate
= VT.IA(avg.) = Rr.Ir2(rm) s
+ Rd.IA2(rm) s
Cathode (K)
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2. HVDC Principle
ON-OFF state
- ON state continues until current drops to zero, even reverse bias appears across the thyristor. - The critical time to clear charge carriers in the semi-conductor is referred as the turn-off time toff . If forward bias appears to soon, t < toff, thyristor can not OFF.
VAK > 0 and VG >0
OFF
ON
IA < 0
t > toff
OFF
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2. HVDC Principle
ON State
OFF State
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2. HVDC Principle
Single Phase Bridge Rectifier
Th1 Th3 Ld
Id
Vs
Is Vd
Rd = 10 Th4 Th 2
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U S = 220 V = 30
2. HVDC Principle
Vs Is
Voltage waveform of inductor (Ld), VLd = Vd Rd Id
= 30
Vd
Voltage waveform of resistor (Rd), VRd = Rd Id
Th3 Th4
Th1 Th2
Th3 Th4
Id
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2. HVDC Principle
Harmonics in the voltage and current waveform.
150 Hz 250 Hz 350 Hz
Is
DC
100 Hz
Vd
200 Hz 300 Hz
DC
Id
100 Hz 50 Hz
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2. HVDC Principle
Even DC side does not have reactive power (Q), the reactive power still presents on the AC side. The reactive power occurrence is caused by the delay angle ( ) (or called firing angle) of the current waveform.
P = |VS| |IS| cos Q = |VS| |IS| sin VS 30 360 20 ms time IS Phasor of fundamental component
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Vs
Is
= 30
2. HVDC Principle
50 Hz
Is
150 Hz
250 Hz
350 Hz
100 Hz
Product of phasor VS and phasor IS is not the apparent power (S) . It represents the active power (P) and reactive power (Q). There are harmonic distortion power, which is a new term caused by the higher harmonics (more than 50 Hz). It is represented by D (distortion power). Finally, S2 = P2 + Q2 becames S2 = P2 + Q2 + D2.
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Vd
200 Hz 300 Hz
Id
2. HVDC Principle
The inductance Lk represents reactance on AC side (called commutating reactance). Due to nature of an inductor, The Ld inductor current can not change suddenly. Thus, during turn-off Vd of the Th1 (and Th2) and turn-on Rd of the Th3 (and Th4), both are in conducting state for a short time (overlap time). This phenomena occurs during commutation of the thyristors. It can be seen that if current is high, overlap angel is increased. In addition, if inductance is high, commutation overlap angle is also increased.
Lk
Ith1
Id
Vs
Is
Ith2
is overlap angle
Increasing Lk
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2. HVDC Principle
Is Vs Vd
Th3 Th4 Th1 Th2 Th3 Th4
= 30
cos
cos + cos( + ) 2
Id
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2. HVDC Principle
The impact of the overlap angle ( ) is the reduction of the average dc voltage (Vd). It decreases the harmonic content of the ac current (Is) and power factor of the AC side.
Ideal case Vdo Vd VT DR
Vd
Vd
Rd
Vd = Vdo
2 X K Id X K = 2 f LK
Id Id
Id
DX
XK
Overall voltage drop VT and DR are very less compared to DX. Thus, there are usually neglected.
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2. HVDC Principle
3-pulse converter
VA VB VC Th1 Th2 Th3 Vd Rd
VA = 2 VP sin t VB = 2 VP sin t-120 VC = 2 VP sin t+120
Natural commutation
Vd
IL
Ld Rd
IL
t
Ld
= 0
= 60
= 90
= 120
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2. HVDC Principle
Vd Vd 0
1.0
Vd = cos Vd 0
Rectifier
0.5
= 60
Rectifier mode can be performed when firing angle is less than 90 degrees. Average voltage is zero when the firing angle is 90 degrees.
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90
135
180
Inverter mode can be performed when firing angle is more than 90 degrees.
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-0.5
Inverter
-1.0
2. HVDC Principle
Vd
=60 =30
Id
28
2. HVDC Principle
VA, IA
120
VB, IB VC , IC
Th1 Th2 Th3 Th1 Th2 Th3
Id
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2. HVDC Principle
VA, IA
=30 =120
Vd
Id
30
2. HVDC Principle
VA Lk
Vd
Vk
DX
VB
Lk Id t
VA
Vk IC IA IB IC IA
IB t
Vd = Vd 0 cos DX
VB
3 DX = Lk I d 2
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2. HVDC Principle
The commutating reactance (Xk) results in decreasing of DC voltage, but it increases DC voltage in inverter mode. It can also be seen that the overlap time will increase when DC current is high and this can cause commutation failure in inverter mode.
Vd
Vk
DX
180
IA
IB
180
IA IB
Vd = Vd 0 cos + DX
Note: + < 180 The extinction angle ( ) = 180 - -
DX =
3 Lk I d 2
32
2. HVDC Principle
6-pulse converter
=0
Vd+
Vd+
-Vd-
=0
The 6-pulse bridge consists of two 3-pulse bridges (positive and negative) connected in parallel.
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2. HVDC Principle
power Vdr
Reactive power
Id power Id
DC line
power Vdi
Reactive power
The HVDC comprises two converters connected in anti-parallel through smoothing reactors and DC lines. One converter is operated in rectifier mode to transmit power from the AC network to the other side whereas the other side converter is operated in inverter mode to receive power into the (other side) AC network.
34
2. HVDC Principle
Rectifier Operation of the 6-pulse bridge converter Assume = 15 and = 25
cos
I The converter operates in rectifier mode. It transmits active power while consumes reactive power.
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2. HVDC Principle
Inverter operation of the 6-pulse bridge converter Assume = 135 and = 25 cos + cos( + ) cos 2 cos135 + cos(135 + 25 ) = 0.823 2 145 I.cos V
145
I.sin The converter operates in inverter mode. It receives active power while consumes reactive power.
36
2. HVDC Principle
For convenience, the converter operated in inverter mode is often referred to extinction angle ( ). Thus direct voltage in inverter mode (Vdi ) are expressed as
Vd = Vd 0 cos + DX , > 90 3 DX = Lk I d 2
Vd = Vd 0 cos DX
Actually, inverter is commonly controlled at constant extinction angle to prevent commutation failure. Therefore, it is not only for convenience, but also for converter control purpose. It is important to note that voltage drop caused by commutating reactance (Dx) is now negative.
37
2. HVDC Principle
Vd Vd 0
Slope is DX
Increasing
Rectifier
Rectifier
variable for rectifier and is the control variable for inverter.
Inverter
Inverter
< 180
1.
mx a
1.
= 0
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Increasing
1. 0
Id I dN
is the control
Increasing
1. 0
= 0
1. 0
= 0
1. 0
Id I dN
2. HVDC Principle
Vdr
Id
Vdi
VdrY
Id
VdiY
The 12-pulse converter is required to improve harmonic current on AC sides. It comprises two 6-pulse converters connected in series. Harmonic current on AC sides are odd orders starting from 11th , 13th . whereas even orders present on the DC side (12th , 14th ). To achieve 12-pulse, phase displacement of 30 generated by Star (Y) and Delta ( ) connection of the 39 transformers are employed.
2. HVDC Principle
Rectifier operation of the 12-pulse bridge converter Assume = 15 IAY and = 25 IA
Y
Vd
VdY
Vd
Vd Vd VdY
IA IA IA
Y Y
IAY
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2. HVDC Principle
Rd power
Y Y
power
Id
power
Y Y
Vdr
Rd
Vdi
Y
Reactive power
Reactive power
v lta e o g
m in m in
< = 5 - 7
decreasing
Vdr Vdi
m in m in
< = 15 - 17
To ensure all thyristor valves are enough forward bias to turn on.
Id
c rre t u n
Voltage drop caused by line resistance (Rd) is taken into account and the VI characteristic presents operating point of the HVDC system.
41
2. HVDC Principle
42
2. HVDC Principle
a) Earth Return
b) Metallic Return
i) Mono-polar Configuration
43
2. HVDC Principle
44
45
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Firing Control
Function of the firing control is to convert the firing angle order ( *) demanded fed into the valve group control system. There might be voltage distortions due to non-characteristic harmonics, faults and other transient disturbances such as frequency variation. Thus, phase-locked loop (PLL) based firing system is generally applied.
vA vB vC
Phase Detector
verror
(1 + Ts) Ts
PI Controller
vo
comparator comparator
uA uB uC
comparator
Gate firing
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time verror
0 2
time
* time
48
Id
Y
Vdr
v A , vB , vC
Y Y
id*
PI
m in x
m a
Firing Control
6 6 Current measurement
49
id
Current measurement
Vdi
Y
*
m in
m a
PI
measurement
50
Vdr
Vdi *= min
Vdr
Vdi *=
m in
*= min
AC voltage decreasing
Id VI Characteristic
c rre t u n
Id
c rre t u n
If AC voltage on rectifier side decreases, CC decreases * down to m to increase DC current (Id), but in there is no operating point (X). This problem can be solved using CMC.
51
A better way is to use the inverter to control current less than of the rectifier by an amount of current margin ( Id) when the rectifier can not perform CC.
*
Y Y
Vdi
Y
Control
v A , vB , vC Firing Control
Minimum selection
id = 0.1 to 0.15
x m a
+ +
Current measurement
PI id
id *
m in
52
Vdr
CEA
X
Vdi *= min
CC
CMC
Id
Id
Vdr *=
AC voltage decreasing
Vdi
m in
Id
Id
*= min
c rre t u n
c rre t u n
Combined characteristics of CC, CEA and CMC This method can maintain stable operation when AC voltage of both sides are fluctuated.
If AC voltage on rectifier side decreases, CC decreases * down to m to increase DC current (Id), in but there is no operating point (X). This problem can be solved by CMC. 53
Vdr
Vdr
CMC
Id
Id
Vdi
*
CMC
CEA *= m in VC *> m in
c rre t u n
CEA
*= m in
c rre t u n
Id
Id
Vdi
In this range the intersection is poorly to define and both current controllers will hunt between the operating points.
This problem can be solved by adjust VI characteristic of the inverter to voltage control (VC) in order to avoid hunting between two controllers. 54
it is very effective when the inverter is connected to a weak AC network. The normal operating point X corresponds to a value of higher than the minimum. Thus, the inverter (rectifier as well) consumes more reactive power compared to inverter with CEA.
Y Y
Vdi
Y
Maximum selection
Minimum selection
vA, vB , vC 6 6
Voltage measurement
Control max
* vdi * -
Firing Control
PI
m in
CMC
vdi
55
Commutation failures can occur during an AC fault on the inverter side. It results in continue conduction of a valve beyond its 120 conduction interval. The CC will regulate the DC current to its rated value, but in the worst case, two inverter valves may form DC short circuit and continue conducting for a long time, which can cause valve damage. To prevent this problem, DC current must be reduced. One possible to detect the AC side fault is the lowering of the DC voltage. This voltage is typically chosen at 40% of the rated voltage.
Id
56
The VDCL is a limitation imposed by the ability of the AC system to sustain the DC power flow when the AC voltage at the rectifier bus is reduced due to some disturbance as well. The VDCL characteristics is presented below.
v lta e o g
Vdr
VC
v lta e o g
*
CMC
Vdr Vdi
0 .4
VC
VDCL
0 .4
Id
VDCL
CMC VDCL
Vdi
VDCL
Id
VDCL Id
Id
Id-m in Idmx a
Id
Id-m in
Idmx a
c rre t u n
c rre t u n
57
id* vd
1 1 + Ts
Minimum selection
i v
CC
Vd
VDCL
vd
Voltage measurement
58
When voltage of the AC system of the rectifier and/or of the inverter is fluctuated, transformer taps (both side) can adjust to keep the DC voltage within desired limits or suitable operating point. Generally, the tap will be changed when the firing angle of the rectifier/inverter still reach its more than 10-15 minutes to avoid interaction of other controls. Example: if the firing angle ( ) of the rectifier reaches minimum limit ( m ) for long time. It means that the AC voltage of the in converter is not appropriate. Thus, AC voltage of the converter must be reduced by tap changing of the converter transformer to free the firing angle of the rectifier.
59
Power Reversal
The VI characteristic of power reversion is presented below (VDCL and VC are not included). The station 1 (rectifier) increases firing angle ( ) into the inverter region and the station 2 (inverter) decreases its firing angle ( ) into rectifier region. This can be performed without altering the direction of current flow.
v lta e o g v lta e o g
V1dr *
c rre t u n
c rre t u n
*= m in
60
Vdr
Id
Vdi
Y Y
Firing Control
Min.
Master Control
i d* p*/vd po p Modulation Signal VDCL p* Power order
n m i
CC CAE VC TCC
VDCL
n m i
CC CAE VC TCC
61
Vd*
Vd*
Max.
id
Vd, Id, ,
Max.
Firing Control
Min.
CIGREs HVDC benchmark was simulated on ATP-EMTP with the typical HVDC control schemes, which the CC mode was employed at rectifier and VC mode was applied at inverter. All simulation results are presented in normalized values.
Start Up HVDC
The HVDC started at 0.1 sec. The firing angle of rectifier started at 90 while the extinction angle of inverter started at 90.
Start Up HVDC
The HVDC started to reverse power flow direction at 0.5 sec. Firing angle of the rectifier increased (with a ramp rate) into inverter zone while firing angle of the inverter decreased (with a ramp rate) into rectifier zone.
DC Current
64
Power Reversal
Power Reversal
65
V Vb Vc a
66
Id
IREF Id V di
IREF
V di
D egree
67
VV V a b c
68
Alpha r( r ) Alpha_i i ) _ (
i
69
Modulation signal is employed when a power system has a special requirement such as frequency control, power oscillation damping, etc. For example, the addition frequency control loop is included into HVDC control system to stabilize frequency of the AC system.
70
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References
1. Ani Gole, HVDC Transmission Lecture Note, University of Manitoba, 2000. 2. Jos Arrilaga, High Voltage Direct Current Transmission, 2nd , IEE-Press, 1998. 3. Dennis A. Woodford, HVDC Transmission, Manitoba HVDC Research Center, Canada, 1998. 4. Erich Uhlmann, Power Transmission by Direct Current, Springer Verlag, 1975. 5. Vijay K. Sood, HVDC and FACTS Controllers, Kluwer. 2004. 6. Edward Wilson Kimbark, Direct Current Transmission vol.1, Wiley-Interscience, 1971. 7. IEEE Transmission and Distribution Committee, IEEE guide for planning DC links terminating at AC locations having low short-circuit capacities, IEEE, 1997. 8. , , , ATP-EMTP, . 2548.
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