Lap Trinh C Voi 8051 - VD - Tieng Viet - Rat Hay

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M CL C
Bi 1: Gi i thi u v vi i u khi n 1.1.Tiu chu n trong l a ch n m t b vi i u khi n 1.2.Vi i u khi n v vi x l 1.3.S chn vi i u khi n 8051 1.4.M ch 8051 t i thi u 1.5.C u trc s kh i c a vi i u khi n 1.6.Cc thnh vin khc c a h 8051 1.7.Ram n i v cc thanh ghi SFR c a 8051 Bi 2.Ngn ng l p trnh cho vi i u khi n (Ph n 1) 2.1.C u trc m t chng trnh 2.2.Cc lo i bi n trong C 2.3.Hm trong C 2.4.Ton t c b n 2.5.C u trc l nh r nhnh 2.6.B ti n x l Bi 2.H ng d n s d ng keil C (Ph n 2) 2.1.Kh i t o project 2.2.So n th o chng trnh 2.3.D ch chng trnh 2.4.M ph ng Bi 3. i u khi n O(out) v i Led n 3.1.L p m ch 3.2.Nguyn l ho t 3.3.L p trnh 3.4.N p chng trnh 3.5.K t qu 3.6. i u khi n Led t ng chi c 1 3.7. i u khi n Out Bi 4. i u khi n led 7 thanh 4.1.L p m ch ng 3 3 3 3 6 7 9 11 12 12 13 15 15 15 16 17 17 36 41 45 50 50 51 52 60 61 62 62 67 67
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4.2.Nguyn l ho t 4.3.L p trnh 4.4.N p chp 4.5.K t qu Bi 5. c bn phm 5.1.L p m ch
ng
68 69 75 75 78 78 79 79 94 94 97 97 99 99 100 101 110 114 114
5.2.Nguyn l qut phm 5.3.L p trnh Bi 6. i u khi n LCD 16x2 6.1.L p m ch 6.2.Nguyn l ho t 6.3.L p trnh 6.3.1. nh ngha con tr r ng xung ng 6.3.2.Cch s d ng Bi7. i u ch 7.1.L p m ch theo s 7.2.Nguyn l ho t Bi 8.Led ma tr n 8.1.L p m ch 8.2.Nguyn l ho t 8.2.Code ng ng c a LCD
116 117
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Ch : y hon ton l ph n l thuy t, mnh rt g n t i a, do cc b n nn c h t. Cha nn th c hnh v i v ti s h ng dn sau. 1.1 Tiu chu n trong l a ch n m t b vi i u khi n L kh nng s n sng p ng v s l ng trong hi n t i v tng lai. i v i m t s nh thi t k i u ny l quan trong hn c . Hi n nay, cc b vi i u khi n 8 bit ng u l h 8051 c s lng l n nh t cc nh cung c p a d ng (nhi u ngu n). Nh cung c p c ngha l nh s n xu t bn c nh nh sng ch c a b vi i u khi n. Trong tr ng h p 8051 th nh sng ch c a n l Intel, nhng hi n nay c r t nhi u hng s n xu t n (cng nh tr c kia s n xu t). Cc hng ny bao g m: Intel, Atmel, Philips/signe-tics, AMD, Siemens, Matra v Dallas, Semicndictior. B ng a ch c a m t s hng s n xu t cc thnh vin c a h 8051. Hng a ch Website Intel www.intel.com/design/mcs51 Antel www.atmel.com www.semiconductors.philips.com Plips/ Signetis Siemens www.sci.siemens.com Dallas Semiconductor www.dalsemi.com 8051 l m t b x l 8 bit c ngha l CPU ch c th lm vi c v i 8 bit d li u t i m t th i i m. D li u l n hn 8 bit c chia ra thnh cc d li u 8 bit cho x l. 8051 c t t c 4 c ng vo - ra I/O m i c ng r ng 8 bit. Cc nh s n xu t cho xu t x ng ch v i 4K byte ROM trn chp. B ng cc c tnh c a 8051 u tin. c tnh S l ng ROM trn chp 4K byte RAM 128 byte B nh th i 2 Cc chn vo - ra 32 C ng n i ti p 1 Ngu n ng t 6 1.2.Vi i u khi n v vi x l: Xin nh c n ci my tnh c a b n, con chp Intel hay ADM c a b n l 1 b vi x l, n khng c RAM, ROM,c ng IO v cc thi t b ngo i vi on Chip. Cn vi i u khi n ch a 1 b vi x l v RAM,ROM, c ng IO, v c th c cc thi t b ngo i vi. 1.3. S chn vi i u khi n 8051: L IC ng v d ng DIP c 40 chn, m i chn c m t k hi u tn v c cc ch c nng nh sau: Chn 40: n i v i ngu n nuI +5V. Chn 20: n i v i t(Mass, GND). Chn 29 (PSEN)(program store enable) l tn hi u i u khi n xu t ra c a 8051, n cho php ch n b nh ngoi v c n i chung v i chn c a OE (Outout Enable) c a EPROM ngoi cho php c cc byte c a chng trnh. Cc xung tn hi u PSEN h th p trong su t th i gian thi hnh l nh. Nh ng m nh phn c a chng trnh c
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c t EPROM i qua bus d li u v c ch t vo thanh ghi l nh c a 8051 b i m l nh.(ch vi c d li u) Chn 30 (ALE : Adress Latch Enable) l tn hi u i u khi n xu t ra c a 8051, n cho php phn knh bus i v i 8051. i v i 8051 th : EA = 5V : Ch n ROM n i. EA = 0V : Ch n ROM ngo i. 32 chn cn l i chia lm 4 c ng vo ra: Vo ra t c l c th dng chn hay xu t m c logic ra(0;1) P0 t P1 t P2 t P3 t
U1 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 P1.0 P1.1 P1.2 P1.3 P1.4 P1.5 P1.6 P1.7 RESET RXD TXD INT0 INT1 T0 T1 WR RD X2 X1 VSS VCC P0.0 P0.1 P0.2 P0.3 P0.4 P0.5 P0.6 P0.7 EA/VP ALE/P PSEN P2.7 P2.6 P2.5 P2.4 P2.3 P2.2 P2.1 P2.0 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 24 23 22 21
y l
c cc l nh (khc v i
c d li u), khi VXL ch
cc bit opcode c a l nh v a chng vo hng
i l nh thng qua cc Bus
a ch v
a ch v bus d li u c a Port 0.
Chn 31 (EA : Eternal Acess) c a xu ng th p cho php ch n b nh m ngoI
c m c logic (0;1 tng ng v i 0V ; 5V)vo
chn 39 32 tng ng l cc chn P0_0 P0_7 chn 1 8 tng ng l cc chn P1_0 P1_7 chn 21 28 tng ng l cc chn P2_0 P2_7 chn 10 17 tng ng l cc chn P3_0 P3_7
AT89C51
P0 P0.0 P0.1 P0.2 P0.3 P0.4 P0.5 P0.6 P0.7
P1 P1.0 P1.1 P1.2 P1.3 P1.4 P1.5 P1.6 P1.7
P2 P2.0 P2.1 P2.2 P2.3 P2.4 P2.5 P2.6 P2.7
P3 P3.0 P3.1 P3.2 P3.3 P3.4 P3.5 P3.6 P3.7
Port's Bit D0 D1 D2 D3 D4 D5 D6 D7
Ring c ng 3 c 2 ch c nng m i chn nh trn hnh v : P3.0 RxD : chn nh n d li u n i ti p khi giao ti p RS232(C ng COM ). P3.1 _ TxD : phn truy n d li u n i ti p khi giao ti p RS232. P3.2 _ INTO : interrupt 0 , ng t ngoi 0. P3.3 _ INT1: interrupt 1, ng t ngoi 1. P3.4 _T0 : Timer0 , u vo timer0. P3.5_T1 : Timer1, u vo timer 1. P3.6_ WR: Write, i u khi n ghi d li u. P3.7 _RD: Read , i u khi n c d li u. Chn 18, 19 n i v i th ch anh t o thnh m ch t o dao ng cho V K
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T n s th ch anh th ng dng trong cc ng d ng l : 11.0592Mhz(giao ti p v i c ng com my tnh) v 12Mhz T n s t i a 24Mhz. T n s cng l n V K x l cng nhanh. Dao S1 S6 S2 ng c a th ch anh S3 S4 S5
P1
P2
Ring c ng 3 c thm ch c nng nh d i y P3.0 RxD : chn nh n d li u n i ti p khi giao ti p RS232(C ng COM ). P3.1 _ TxD : ph n truy n d li u n i ti p khi giao ti p RS232. P3.2 _ INTO : interrupt 0 , ng t ngoi 0. P3.3 _ INT1: interrupt 1, ng t ngoi 1. P3.4 _T0 : Timer0 , u vo timer0. P3.5_T1 : Timer1, u vo timer 1. P3.6_ WR: Write, i u khi n ghi d li u. P3.7 _RD: Read , i u khi n c d li u. Chn 18, 19 n i v i th ch anh t o thnh m ch t o dao ng cho V K T n s th ch anh th ng c dng trong cc ng d ng l : 11.0592Mhz(giao ti p v i c ng com my tnh) v 12Mhz T n s t i a 24Mhz. T n s cng l n V K x l cng nhanh.
5VDC
40 U3 VCC P0.0 P0.1 P0.2 P0.3 P0.4 P0.5 P0.6 P0.7 EA/VP RESET 10Kx9 39 38 37 36 35 34 33 32 31 9 R4 R7 R9 + C3 10uF/25V
R1 10K C2 33p 12Mhz C1 33p
19 18 20
X1 X2 GND 8051
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M ch ny cha c kh i ngu n S chn:
t o ngu n 5V cc b n dng con IC sau:

U6 LM7805/TO 1 VIN GND VOUT 3
Gi i thi u IC n p 7805 : u vo > 7V u ra 5V 500mA. M ch n p: c n cho V K v n u ngu n cho V K khng n nh th s treo V K, khng ch y ng, ho c reset lin t c, th m ch l ch t chp. M ch ngu n
12VDC In 1 U1 LM7805/TO VIN GND VOUT 3 C1 104 5VDC Out C3 10uF/25V
2
+ C2 104
1.4. M ch vi i u khi n c b n
5VDC
U1
VCC
40
+ C3 RESET 9 10uF/25V R1 10K
C2 33p
18
X2
12Mhz C1 33p 19 20 X1 VSS 8051
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1.5. C u trc vi i u khi n 89c51

EXTERNAL INTERRUPTS INTERRUP T CONTROL ON CHIP RAM
ETC COUNTER INPUTS TIMER 0 TIMER 1
CPU
OS C
BUS CONTRO L
4 I/O PORTS
SERIAL PORT
P P P P
ADDRESS/DAT A
TXD RXD
Ch :S kh i bn trong con 8051 c nh ng ti nguy n . Interrupt, Ram, Timer, Serial prort. 1.6.Cc thnh vin khc c a h 8051: C hai b vi i u khi n thnh vin khc c a h 8051 l 8052 v 8031. B vi i u khi n 8052: 8052 c t t c cc c tnh chu n c a 8051 ngoi ra n c thm 128 byte RAM v m t b nh th i n a. Hay ni cch khc l 8052 c 256 byte RAM v 3 b nh th i. N cng c 8K byte ROM. Trn chp thay v 4K byte nh 8051. B ng : So snh cc c tnh c a cc thnh vin h 8051. c tnh ROM trn chip RAM B nh th i C ng n i ti p Ngu n ng t 8051 4K byte 128 byte 2 1 6 8052 8K byte 256 byte 3 1 8
Do v y t t c m i chng trnh vi t cho 8051 u ch y trn 8052 nhng i u ng c l i l khng ng. c bi t : M t nh s n xu t chnh c a h 8051 khc n a l Philips Corporation. Hng ny c m t d i l a ch n d ng l n cho cc b vi i u khi n
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h 8051. Nhi u s n ph m c a hng c km theo cc c tnh nh cc b chuy n i ADC, DAC, chn PWM, c ng I/0 m r ng . Update s n ph m 8051 m i t i cc trang web c a cc nh s n xu t a ch c ph n gi i thi u. Ch y u:www.atmel.com 1.7.Ram n i v cc thanh ghi F0 E0 D0 B8 B0 A8 A0 99 98 90 8D 8C 8B 8A 89 88 87 83 82 81 80 F7 E7 D7 B7 AF A7 F6 E6 D6 B6 F5 E5 6D B5 F4 E4 6C F3 E3 6B F2 E2 6A F1 E1 69 F0 E0 68 B8 B0 A8 A0 98 90
C c c a ch v FFH
thanh ghi SFR n m gi a 80H cc a ch ny
BC BB B4 B3
BA B9 B2 B1
AE AD AC AB AA A9 A6 A5 A4 A3 A2 A1 99 91
Khng nh a ch t ng bt 9F 9E 9D 9C 9B 9A 97 96 95 94 Khng nh a ch t Khng nh a ch t Khng nh a ch t Khng nh a ch t Khng nh a ch t 8F 8 8D 8C E Khng nh a ch t 93 92 ng bt ng bt ng bt ng bt ng bt 8B 8A ng bt
89
88
Khng nh a ch t ng bt Khng nh a ch t ng bt Khng nh a ch t ng bt 87 86 8 84 83 82 5
81
80
THANH GHI CH C NNG C BIT
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trn 80H, v cc a ch t 00 n 7FH l a ch c a b nh RAM bn trong 8051. Khng ph i t t c m i a ch t 80H n FFH u do SFR s d ng, nhng v tr ngn nh t 80H n FFH cha dngl d tr v l p trnh vin 8051 cng khng c s d ng. B ng : ch c nng c a thanh ghi ch c nng SFR nh Thanh ghi / Bit TMOD 7 6 5 4 K hi u GATE C/T M1 M0 c bi t SFR i khi l p trnh c b n C) Ch c nng Ch n model cho b nh th i 1 Bt i u khi n c ng. Khi c set ln 1, b nh th i ch ho t ng trong khi INT1 m c cao Bt ch n ch c nng m ho c nh th i: 1= m s ki n 0= nh th i trong m t kho ng th i gian Bit ch n ch th nh t Bit ch n ch th 2 Chc nng M0 Ch M1 0 0 0 Ch nh th i 13 bit 0 1 1 Ch nh th i 16 bit 1 0 2 Ch t ng n p l i 8 bit 1 1 3 Ch nh th i chia x Bit i u khi n c ng cho b nh th i 0 Bit ch n ch c nng m / nh th i cho b nh th i 0 Bit ch n ch th nh t cho b nh th i 0 Bit ch n ch th 2 cho b nh th i 0 TR0 IE1 IT1 IE0 IT0 Ch c nng i u khi n b inh th i C trn c a b nh th i 1. C ny c set b i ph n c ng khi c trn, c xo b i ph n m m, ho c b i ph n c ng khi b vi x l tr n trnh ph c v ng t Bit i u khi n ho t ng c a b nh th i 1. Bit ny c set ho c xo b i ph n m m i u khi n b nh th i ho t ng hay ngng C trn c a b nh th i 0 Bit i u khi n ho t ng c a b nh th i 0 C ng t bn ngoi 1 (kch kh i c nh). C ny c set b i ph n c ng khi c c nh m (cu ng) xu t hi n trn chn INT1, c xo b i ph n m m, ho c ph n c ng khi CPU tr n trnh ph c v ng t a ch t ng bit( nh ng thanh ghi c n nh
3 2 1 0 TF1 TR1 Thanh ghi / Bit TCON TCON.7
GATE C/T M1 M0 TF1 K hi u TF1
TCON.6 TCON.5 TCON.4 TCON.3
TR1 TF0 TR0 IE1
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TCON.2 TCON.1 TCON.0 EA IE IE.7 IE.6 IE.5 IE.4 IE.3 IE.2 IE.1 IE.0
IT1 IE0 IT0 ET2 EA --ET2 ES ET1 EX1 EX0 ET0
C ng t bn ngoi 1 (kch kh i c nh ho c m c). C ny c set ho c xo b i ph n m m khi x y ra c nh m ho c m c th p t i chn ng t ngoi C ng t bn ngoi 0 (kch kh i c nh) C ng t bn ngoi 0 ( kch kh i c nh ho c m c) ES ET1 EX1 EX0 ET0 i u khi n cc ngu n ng t (0: khng cho php; 1: cho php) Cho php/ khng cho php ton c c Khng s d ng Cho php ng t do b nh th i 2 Cho php ng t do port n i ti p Cho php ng t cho b nh th i 1 Cho php ng t t bn ngoi (ng t ngoi 1) Cho php ng t t bn ngoi (ng t ngoi 0) Cho php ng t do b nh th i 0
CH 3 thanh ghi ny cng r t c b n, nh tn thanh ghi, tn cc bt trong thanh ghi, ch c nng t ng thanh ghi v t ng bt trong thanh ghi. 1.8.Gi i thi u s qua cc ngu n ng t: Ng t do Reset h th ng Ng t ngoi 0 B nh th i 0 Ng t ngoi 1 B nh th i 1 Port n i ti p B nh th i 2 Timer Program excution without interrut Main Program C RST IE0 TF0 IE1 TF1 RI ho c TI TF2 ho c EXF2 a ch vector 0000H 0003H 000BH 0013H 001BH 0023H 002BH
ISR
ISR
ISR
*
Main
**
*
Main
**
Main
**
Main
Program excution with interrupt.
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M t chng trnh chnh khng c ng t th ch y lin t c, cn chng trnh c ng t th c khi no i u ki n ng t c m bo th con tr s nh y sang hm ng t th c hi n xong hm ng t l i quay v ng ch c v th c hi n ti p chng trnh. Ta c 1 v d nh sau: B n ang n cm , c ti ng i n tho i , b n t bt cm ra nghe i n tho i , nghe xong l i quay v bng bt cm ln n ti p. Th qu trnh n cm c a b n l chng trnh chnh,c i n tho i g i n l i u ki n ng t, b n ra nghe i n tho i l th c hi n chng trnh ng t(Interrupt Service Rountine),quay v n cm ti p l ti p t c th c hi n chng trnh chnh. Ng t i v i ng i m i h c vi i u khi n l r t kh hi u, v a s cc ti li u u khng gi i thch ng t lm g. C nhi u lo i ng t khc nhau nhng t t c u c chung 1 c i m, ng t dng cho m c ch a nhi m. a t c l nhi u, nhi m t c l nhi m v . Th c hi n nhi u nhi m v .Cc b n nhn vo ti n trnh c a hm main v i chng trnh c ng t : Chng trnh chnh ang ch y, ng t x y ra, th c hi n hm ng t r i quay l i chng trnh chnh. Chng trnh trong vi i u khi n khc v i v d n cm nghe i n tho i c a ti ch , th i gian th c hi n hm chnh l r t l n,th i gian th c hi n hm ng t l r t nh , cho nn th i gian th c thi hm ng t khng nh h ng nhi u l m n ch c nng hm chnh. Nh v y trong hm ng t cc b n lm 1 vi c, trong hm chnh cc b n lm 1 vi c nh v y coi nh cc b n lm c 2 vi c( a nhi m) trong 1 quang th i gian tng i ng n c mS, ch th c ra t i 1 th i i m vi i u khi n ch th c thi 1 l nh. V d : B n th ngh xem lm th no v a i u ch xung PWM i u ch nh t c ng c , v a c cc c m bi n u vo m t c ng c ph thu c u vo c m bi n.
2.1.C u trc m t chng trnh: // nh km cc file #include <file.h> #include <file.c> //Khai bo bi n ton c c unsigned char x,y; int z; long n=0; //Khai bo v nh ngha cc hm void Hm1(void) { //Cc cu l nh } void Hm2(unsigned char x) { //Cc cu l nh }
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//Hm chnh b t bu c chng trnh no cng ph I c void main(void) { //Cc cu l nh } Cc cu l nh trong hm chnh c th c l i g i cc hm khai bo trn ho c khng Khi c l i g i hm no th chng trnh nh y n hm th c hi n hm xong con tr l i quay v chng trnh chnh(hm main) th c hi n ti p cc hm ho c cu l nh. Cc cu l nh trong C k t thc b ng d u ; Cc l i gi I thch c t trong d u: M u b ng /* k t thc b ng */ N u l i gi I thch trn 1 dng th c th dng d u: // Khi l p trnh nn gi I thch cc cu l nh kh i l nh lm g v sau khi chng trnh l n d s a l i. 2.2.Cc lo i bi n trong C: D ng bi n char unsigned char short unsigned short int unsigned int long S Bit 8 8 16 16 16 16 32 S Byte Mi n gi tr 1 1 2 2 2 2 4 -128 0 0 0 -32,768 -32,768 n +127 n +32,767 n +32,767 n 255 n 65,535 n 65,535
-2,147,483,648 n+2,147,483,647
unsigned long 32 4 0 n 4,294,697,295 Khai bo bi n C u trc : Ki u bi n Tn bi n VD: unsigned char x; Khi khai bo bi n c th gn lun cho bi n gi tr ban u. VD : Thay v: unsigned char x; x=0; Ta ch c n : unsigned char x=0; C th khai bo nhi u bi n cng m t ki u m t lc VD: unsigned int x,y,z; Ngoi ra dng cho vi i u khi n trnh d ch chuyn d ng cn h tr cc lo i bi n sau: D ng bi n S Bit S Byte Mi n gi tr bit sbit 1 1 0 0 0;1 0;1 - 13 -
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sfr sf16
8 16
1 2
0 0
n 255 n 65,535
VD: Ngoi ra ,chng ta c th nh ngha bi n ki u bt hay ki u SFR (special function register) Bit Kiemtra; Sfr P10=0x90; VD: Bit Kiemtra; Sfr P10=0x90; Cc SFR khng c n ph i h c thu c ch c n bi t, v chng c khai bo trong th vi n AT89X51.H v AT89X52.H 2.3.Hm trong C: Hm trong C c c u trc nh sau C 2 lo i hm Hm tr l i gi tr : C u trc: Ki u gi tr hm tr l ii Tn hm (Bi n truy n vo hm) { // Cc l nh x l y } unsigned char Cong(unsigned char x, unsigned char y) { // Cc l nh x l y } Hm khng tr l i gi tr C u trc: void Tn hm (Bi n truy n vo hm) { // Cc cu l nh x l y } VD d : void Cong(unsigned char x, unsigned char y) { // Cc cu l nh x l y } VD :
Hm c th truy n vo bi n ho c khng VD Hm khng c bi n truy n vo: unsigned char Tnhm(void) { // Cc cu l nh x l y } Hm c bi n truy n vo: void Tnhm(unsigned char x)
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{ // Cc cu l nh x l } S bi n truy n vo ty (mi n V d : y b nh ), ngn cch b i d u ,
Void TnHm(unsigned char x, unsigned char y, unsigned char z) { // Cc cu l nh x l y } Ngoi ra ring cho vi i u khi n ph n ph m Keil C cn c m t lo i hm l hm ng t: C u trc: Void Tnhm(void) interrupt ngu nng t using bngthanhghi { } Hm ng t khng c php tr l i gi tr hay truy n tham bi n vo hm. Tn hm b t k Interrupt l t kha ch hm ng t Ngu n ng t t 0 t i 5 theo b ng vector ng t Ng t do C a ch vector Reset h th ng RST 0000H Ng t ngoi 0 IE0 0003H B nh th i 0 TF0 000BH Ng t ngoi 1 IE1 0013H B nh th i 1 TF1 001BH Port n i ti p RI ho c TI 0023H B nh th i 2 TF2 ho c EXF2 002BH Khng tnh ng t reset h th ng b t u m t ng t ngoi 0 Bng thanh ghi trn ram ch n t 0 n 3 2.4.Cc ton t c b n: Php gn: = VD: x=y; // x phi l bi n y c th l bi n ho c gi tr nhng ph i ph h p ki u Php c ng: + Php tr : Php nhn: * Php chia: / Cc ton t logic: B ng : == And: && Or: || Not: ! D ch tri: << D ch ph i: >> 2.5.Cc c u trc l nh r nhnh, ki m tra th ng dng: Cu l nh r nhnh if:
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n switch: switch(Bi n) { case giatr 1: { // Cc cu l nh break; } case giatr 2: { // Cc cu l nh break; } case giatr 3: { // Cc cu l nh break; } case giatr n: { // Cc cu l nh break; } } Gi i thch : Ty vo Bi n c giatr 1 th th c hi n cc cu l nh sau tng ng r i thot kh i c u trc nh cu l nh break; Bi n c giatr 2 th th c hi n cc cu l nh sau tng ng r i thot . Bi n c giatr n th th c hi n cc cu l nh sau tng ng r i thot Cu l nh vng l p xc nh for: C u trc: for( n=m; n<l; n++) {// Cc cu l nh x l } Gi I thch: Trong m,l l gi tr (m>l), cn n l bi n Th c hi n l p cc cu l nh (l-m) l n Cu l nh vng l p khng xc nh while: C u trc: While( i u ki n) { //Cc cu l nh } Gi I thch: Th c hi n l p cc cu l nh khi i u ki n ng, n u cu l nh sai thi thot kh i vng l p 2.6. B ti n x l: #define : Dng nh ngha. V d : #define dung 1 #define sai 0 c ngha l dung c gi tr b ng 1. Trong chng trnh c th c o n code nh sau: bit kiemtra if (bit==dung) { // Cc cu l nh} if (bit==sai) { // Cc cu l nh} Vi c ny gip l p trnh d s a l i hn. M t s web hay : www.dientuvietnam.net www.svbkol.org www.diendandientu.com
C u trc: Gi i thch: qua Cu l nh l a ch C u trc:
if ( i uki n) { // Cc cu l nh x l } N u i uki n ng th x l cc cu l nh bn trong cn sai th nh y
www.atmel.com www.keil.com www.iguanalabs.com - 16 -
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www.microchip.com www.elechtro-tech-online.com www.diendansv.hutech.edu.vn www.ttvnol.com www.8052.com www.kmitl.ac.th www.ftdichip.com
Bi 2 (Ti p) Ph n 2: S d ng Keil C.
Sau khi ci t 1> Kh i t o cho Project:
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t o 1 project m i ch n Project
New project nh sau:
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c hnh sau:
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nh tn v chuy n R i ch n Save.
n th m c b n lu project. B n nn t o m i m t th m c cho 1 project.
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c hnh sau:
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Trong ny c 1 lo t cc hng i n t s n xu t 8051. B n l p trnh cho con no th ch n con ,kch chu t vo cc d u + m r ng cc con IC c a cc hng. y ta l p trnh cho AT89C51 c a hng Atmel nn ta ch n nh sau:
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Khi ch n chip th ngay l p t c ci b ng hi n ra 1 s tnh nng c a chp cc b n c th nhn th y. 8051 based Fully Static 24Mhz . Nhap OK c c a s nh sau:
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Ch n No. Ch n Yes ch lm cho file l p trnh c a b n thm n ng . c c a s sau:
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t o 1 file code cc b n ch n File
New ho c n Ctrl+N. Nh sau:
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c c a s nh sau:
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Cho c a s Text 1 to ra c nh sau:
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Ti p theo b n ch n File
Save As ho c Ctrl+S.
nh file m c d cha c g. Nh sau:
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c c a s sau:
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Cc b n nh p tn vo text box file name. Ch tn g cng c nhng khng c thi u ui m r ng .C . Nh n Save. c c a s sau:
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Trong bn tri mn hnh, c a s project workspace, cc b n m r ng ci target 1 ra c nh sau:
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Nh p chu t ph i vo th m c Suorce Group1 c hnh nh trn. Ch n Add files to Group Source Group1 add file vo project. c nh sau:
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Ch n file .C m cc b n v a nh . C a ti l Dieukhienled_IO . Nh n Add 1 l n r i n Close. N u b n n Add 2 l n n s thng bo l file add b n ch vi c OK r i nh n Close. c nh sau:
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By gi nhn trong Source Group 1 th y file Dieukhienled_IO.C . Cc b n nh p chu t ph i vo vng so n th o file Dieukhienled_IO.C nh sau, thm file th vi n.Ch n Insert #include <AT89X51.H>
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Cc b n bi t file l g n u cc b n h c bi tr c k theo yu c u c a ti. c nh sau:
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Ph n cu i cng c a cng vi c kh i t o l cc b n vi t l i gi i thch cho d n c a mnh .Ph n ny r t c n thi t v n ng i khc hi u mnh lm g tron project ny v khi mnh c n s d ng l i code c l i mnh cn bi t n l ci g. Cc b n t o l i gi i thch theo m u sau:
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2> So n th o chng trnh: Cc b n vi t chng trnh c a bi 3 vo y lm v d . Khi vi t xong 1 dng l nh nn gi i thch dng l nh lm g. Nh sau:
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Cc b n nn chia chng trnh nh ti lm. V i 1 file nh th n hi r m r. Nhng v i 1 file l n kho ng 1000 dng code th n l i r t sng s a. Cc b n nn t o 1 file m u r i nh vo 1 file text u m i l n dng ch vi c copy r i paste qua ch khng nn m i l n t o m t ci nh v y l i ph n tc d ng. Pha trn l ph n b ti n x l v khai bo bi n. Ti p theo l vi t hm tr .
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Ti p theo l vi t hm main. Nh sau:
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R i nh n Ctrl+S. Ho c ch n File
Save
nh file v a so n th o.
Cc b n nhn vo code c th cc b n hi u con AT89C51 n lm g n u cc b n n m v ng cc bi tr c. Cn n u khng hi u th ti s gi i thch l i cho cc b n.
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y l s nguyn l c a 1 led. Project l 8 led(v ph c v cho bi 3) nhng ti ch gi i thch 1 led l cc b n hi u. M c ch l lm con led nh p nhy.
R2 5VDC
U1
D1 1 LED RESET 9 P1.0 + C3 10uF/25V R1 10K
C2 33p
18
X2
12Mhz C1 33p 19 20 X1 VSS 8051
Bi n Led1 c khai bo (gn cho) ch n P0_1 c a vi i u khi n b ng cu l nh sbit Led1=P1^0; . Gi tr b t bat c nh ngha l 0. Khi cc b n gn : Led1=bat; trong hm main th chn P1_0 c a AT89C51 c m c logic l 0V. Theo s nguyn l: 5V Tr 470 Led1 P1_0 (0 V). C chnh l ch p c dng i n qua led Led sng. Cc b n c th tnh tan ch ny d dng l t i sao l i l tr 470 m. i n p m t led l Uak (0,6 n 0,7V) l y =0,6V. i n p chn P1_0 l 0V. i n p hai u tr : 5V -0,6V = 4,4V. Dng qua tr = dng qua led = 4,4V/470 m x p x 10 mA. V i dng 10mA n 15mA l led dng sng v sng r t p. N u dng y u th led m , cn dng l n th cc b n bi t sao r i y. Khi cc b n gn: Led1= tat; t c l chn P1_0 c gi tr 1 tng ng i n p c a n l 5V . Hi u i n th gi a hai u +5V v P1_0 l 0V . Nn khng c dng qua led Led t t.Nhng n u trong hm main cc b n vi t ch c nh sau: While(1) { Led1=bat; Led1=tat; } Khi ch y debug th v n th y led nh p nhy. Nhng khi n p chng trnh vo chp l p vo m ch th led khng nhy ho c ch sng m ho c t t ngm. V l nh Led1=bat; l l nh 1 chu k my , t n s th ch anh l 12 Mhz, 1 chu k my c th i gian l 1uS. V a b t ln 1 uS r i l i t t ngay. Led khng p ng c t n s cao v y nn khng nh p nhy. Do c n t i hm tr . B t led ln tr 1 th i gian kh lu(0,5 gi y), r i t t led i kh lu(0,5s) r i l i b t l i t o thnh vng l p s c led nh p nhy. Tc d ng c a cu l nh while(1) . i u ki n bn trong vng while l 1 lun lun ng nn n l vng l p v h n l n. N u khng c vng while(1) th led c a cc b n ch sng ln 1 l n r i t t
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VCC
40
470
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v h t chng trnh r i cn u. Ph n ny n u b n no m i h c i n t th no cng c cu h i th c m c c nh n tin ho c g i mail. 3> D ch chng trnh: So n th o song nh n Ctrl +S nh . Nh xong cc b n bin d ch chng trnh b ng cch n phm F7 ho c ch n Build target l bi u t ng ngay trn c a s workspace nh trn hnh:
Cc b n s th y nh sau:
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Trong c a s Output Window ngay pha trn dng ch ny c cc dng ch Compiling Linking Program Size: data =17.0 code =96 0 error , 0 Warning . Nh v y l OK. N u khng c nh v y n s bo l i v cc b n ki m tra xem so n th o ng cha. Ti v d xa 1 d u ; trong hm main dng : Led1=bat; , gi b i thnh Led1= bat .R i d ch l i ( n F7) trnh bin d ch s bo nh sau:
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Syntax error near tre. Sai c php g n tr . Cc b n nh p p tri chu t vo dng thng bo ny con tr s ngay dng d i dng c l i thm d u nhn d u mi tn mu xanh hnh d i y, g vo d u ; v d ch l i l OK. Trong chng trnh l n i khi con tr ch n g n ch c l i thi v b n ph i t tm ra l i.
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Sau khi d ch l i c hnh sau:
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4> Ch y m ph ng v s a l i. Tr c khi debug chng ta kh i t o nh sau. Cc ban vo Option for target 1.
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c b ng sau. Nh p t n s th ch anh l 12 Mhz ng v i t n s th ch anh.
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Ch n OK. debug cc b n nh n t h p phm Ctrl + F5. Ho c nh n vo icon c ch D m u knh lp trn thanh cng c . c c a s sau:
trong ci
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Trong menu Peripherals(cc thi t b ngo i vi) ch n IO port , Port 1. c nh sau:
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Cc b n th y 1 c a s nh Parallel Port 1 xu t hi n l ci m ph ng cho c ng 1 c a AT89C51. D u tch tng ng chn m c cao(5V) , khng tch chn m c th p (0V). Trong menu peripherals cn cc ngo i vi khc nh timer , interrupt, serial. Cc bi sau dng n cc b n nh l y trong ny. ch y chng trnh cc b n nh p chu t ph i vo mn hnh so n th o. R i n F11. M i l n n s ch y 1 l nh. Khi debug n u cc b n ch hm delay lu qu 1000 l n l p . Cc b n nh n Ctrl + F11 b qua hm.
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Ho c n F10 ch y t ng dng l nh. Cc b n s th y chn P1_0 thay i gi tr . B ng bn tri , Project workspace by gi c cc thanh ghi. Cc b n c th th y chng thay i. Nhng cc b n khng c n quan tm n cc thanh ghi ny. V mnh h c ngn ng C m. N u h c asembly th m i ph i s d ng chng. Cng m t y. Ci b n quan tm nh t l ci sec. N cng thay i. V th ch anh l 12Mhz, nn m i chu k my l 10-6 giy. Cc b n cn c vo y bi t l nh no m t bao nhiu chu k my, lm th i gian th c th c n l m y. Thot kh i debug l i n Ctrl+F5 ho c n vo icon debug.
.
3.1.L p m ch : -Kh i ngu n 5V cc b n nh l p m ch n nhy. -Cc b n l p m ch theo s sau:
5VDC R11 RESISTOR SIP 10 1 U1 D2 D3 D4 D5 D6 D7 D8 1 2 3 4 5 6 7 8 P1.0 P1.1 P1.2 P1.3 P1.4 P1.5 P1.6 P1.7 P0.0 P0.1 P0.2 P0.3 P0.4 P0.5 P0.6 P0.7 EA 39 38 37 36 35 34 33 32 31 VCC 2 3 4 5 6 7 8 9 10 D1 40
+ C3 10uF/25V
RESET
9 R1 10K
C2 33p
18
X2
12Mhz C1 33p 19 20 X1 VSS 8051
- H ng d n l p m ch: * Qui nh : n u linh ki n no ti khng nh c n chi u th cc b n l p linh ki n chi u no cng c. Hng d c ngoi l ngu n 5 V. Hng d c trong l GND. Th t chn cc b n ph i nh khng gi ng th t s p x p tronh hnh v m ch. Cch m chn cc b n con chip xui m cc b n nhn dng ch AT89C51/52 xui, chn 1 l chn g n d u trn v hnh tam gic nh m u tr ng. m t trn xu ng d i tri qua ph i. S chn con IC th t s m ng th ny. Khi l p m ch ph i m chn.
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Khng nn l p ngu n 12V vo v i ch khi n p chp xong l p vo m ch m i l p ngu n. Khi mu n g chp ra ph i rt ngu n ra r i m i g chp.
U1 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 P1.0 P1.1 P1.2 P1.3 P1.4 P1.5 P1.6 P1.7 RESET RXD TXD INT0 INT1 T0 T1 WR RD X2 X1 VSS VCC P0.0 P0.1 P0.2 P0.3 P0.4 P0.5 P0.6 P0.7 EA/VP ALE/P PSEN P2.7 P2.6 P2.5 P2.4 P2.3 P2.2 P2.1 P2.0 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 24 23 22 21
AT89C51
* Chu n b board nh sau: L p 4 dy n i ng n n i cc sng. L p 1 dy n i n i hng trn cng v i hng d i cng lm ngu n +5V. L p 1 dy n i n i hng g n trn cng v i hng g n d i cng lm GND. L p chp nh hnh. * B c 1 l p m ch dao ng: L p 1 con t 33pF t chn 19 xu ng chn 20.( ng h i t i sao). L p 1 con t 33pF t chn 18 xu ng chn 20. L y dy cu t chn 20 xu ng GND. L p 1 con th ch anh 12M vo chn 18 v 19. * B c 2 l p m ch reset. L p 1 con tr 10K(nu en cam) t chn 9 xu ng GND. L p 1 con t 10uF/50V c c dng ln +5V, c c m vo chn 9. * B c 3 l p tr bng. chp ch y v i ROM trong chn EA ph i ln +5V qua 1 i n tr . C ng 0 l c ng c c c mng h mu n th c hi n c IO th ph i c i n tr treo.(Th y ci ny l xem l i bi 2). Nn l p 1 con tr bng 10 chn vo c ng 0 v chn EA. Chn 1 c a tr bng ( Chn u tin c n t trn m u tr ng) vo chn 40. Chn 10 c a tr bng vo chn 31. N u khng c tr bng cc b n c th thay tr bng 10 chn b ng 9 con tr th ng v tr bng 10 chn chnh l 9 con tr u chung 1 u nh trong s m ch pha trn. * B c 4 l p led: d dng khi l p m ch nn chng ta l p led theo s nh trn. L p chn di c a 1 led vo chn 1 vi i u khi n chn ng n vo GND. Tng t l p 7 led cn l i vo chn 2 n chn 8. * B c 5 cu 1 dy nh t chn 40 ln ngu n 5V. 3.2. Nguyn l ho t ng: Led n i t chn v k xu ng t v y n u chn vi i u khi n 5V th led s sng, n u chn vi i u khi n 0V th led s t i. i n p 5V v sao led khng chy m l i cn sng y u?
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V vi i u khi n 8051 ch c th cung c p dng nh khng 10mA 1 chn nn led sng y u. Cn n u mu n led sng p th l p nh sau t dng 5V Chn di c a led Chn ng n c a led Chn vi i u khi n. Ci ny s ni sau. * B c 5 l p ngu n: L p 1 dy t chn 40 ln hng ngu n 5V. 3.3. L p trnh : Tr c h t i u khi n 1 led. i u khi n 1 led th cc b n ch vi c gn chn n i v i led b ng 0 ho c 1, th i n p chn s l 0V ho c 5V, ty vo i n p n s sng ho c t i. Code nh sau: /* ==================================================== Mo ta: Dieu khien den led. Phan cung: 8 led noi tu +5V qua dien tro han dong vao 8 chan cong 1. Thach anh: 12 Mhz Tac gia: Nguyen Huy Thanh. Thoi gian: Bat dau: 1h03 16/7/2005 Hoan thanh: 1h07 16/7/2005 =====================================================*/ /******************Bo tien xu li*******************************/ #include <AT89X51.H>// Dinh kem file thu vien #define bat 1 // Dinh nghia gia tri bat den led #define tat 0// Dinh nghia gia tri tat den led /************************************************************/ /*******************Khai bao bien toan cuc**********************/ sbit Led1=P1^0; //Khai bao bien Led1 kieu bit chan P1_0 sbit Led2=P1^1; // ... sbit Led3=P1^2; sbit Led4=P1^3; sbit Led5=P1^4; sbit Led6=P1^5; sbit Led7=P1^6; sbit Led8=P1^7;//Khai bao bien Led8 kieu bit chan P1_7 /***********************************************************/ /********************Khai bao ham****************************/ /*----------------Ham tre------------------------------Ham tao thoi gian tre. Dau vao: 1 bien thoi gian.
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Dau ra:khong ------------------------------------------------------*/ void tre(long time) { long n;// Khai bao bien cuc bo for(n=0; n<time; n++)//Lap time lan { ; // Khong lam gi nop } } /***********************************************************/ /*******************Ham chinh**************************/ void main(void) { while(1)// Lap vo han { Led1= bat;// Bat led 1 tre(1000);// Tre 1 khoang thoi gian Led1= tat;// Tat led 1 tre(1000);// Tre 1 khoang thoi gian } } /************************************************************/ Nn t g ch khng nn copy paste. * CH : Code ny khc code trong bi 3 s d ng Keil C y nh. Ch #define bat 1 v #define tat 0. V led l p ki u khc m.
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* c th n p chng trnh vo chp th f i t o ra file .hex. nh sau . Vo Option for target ch ch nh t n s th ch anh.
t o ra file .hex lm
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c hnh sau:
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Kch vo tab Output. c hnh sau:
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Tch vo check : Create Hex File. Nh p OK. Nh n fm F7 s output window c ch Creating hex file
bin d ch l i . Khi d i c a
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Creating hex file from Dieukhienled_IO nh ngay trn hnh. 3.4.N p chp: C m u c ng COM vo c ng COM my tnh. C m ngu n vo m ch n p. Cho chp vo socket 40 chn mu xanh. R t ch ph i cho ng chi u chp khng l h ng. Chi u chp gi ng chi u con chp c s n trong m ch(Chp MASTER). M ph n m m EZDL4 ln. Th y c ch identifing target chip . Nhy. G t c n nh socket 40 chn k p chp cho ti p xc.
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Trn EZDL4 s th y ch AT89C51 ho c AT89C52 ty cc b n dng lo i chp no. Kch vo Send. Ch n ng d n n th m c lu project c a b n ch n file : Dieukhienled_IO.hex . Nh n OK. Ch m ch bo ch Complete th g t n y trn socket l y chp ra c m vo m ch. 3.5. K t qu : C m ngu n vo m ch . Ch khng c m ng c m dng. N u m ch khng ch y rt ngu n ra ki m tra cc ch sau: 1) Ki m tra m ch dao ng xem t ng gi tr khng, l p ng s khng, l p c l ng khng. 2) Ki m tra xem t m ch reset chn 9 l p ng c c khng, c l ng khng. Dng ng h o chn 9 n u 0V ho c x p x 0V l OK. 3) Tr bng l p ng chi u cha, chn 1 vo chn 40. Dng ng h o chn 31(EA) xem c b ng 5V khng , n u 5V th OK. 4) Ki m tra chn 20 n i GND cha, chn 40 n i +5V cha dng ng h o i n p. 5) Ki m tra xem l p ng chi u led cha. 6) Cc b n c th l p l ng chp ho c do ch t l ng board l y tay t m nh con chp xu ng board . N u v n khng ch y th lin l c v i ti. 3.6. i u khi n 8 led t ng chi c 1: Cc b n c th s a l i hm main nh sau: void main(void) { while(1)// Lap vo han { Led1= bat;// Bat led 1 tre(1000);// Tre 1 khoang thoi gian Led1= tat;// Tat led 1 tre(1000);// Tre 1 khoang thoi gian Led2= bat;// Bat led 2 tre(1000);// Tre 1 khoang thoi gian Led2= tat;// Tat led 2 tre(1000);// Tre 1 khoang thoi gian Led3= bat;// Bat led 3 tre(1000);// Tre 1 khoang thoi gian Led3= tat;// Tat led 3 tre(1000);// Tre 1 khoang thoi gian Led4= bat;// Bat led 4 tre(1000);// Tre 1 khoang thoi gian Led4= tat;// Tat led 4 tre(1000);// Tre 1 khoang thoi gian Led5= bat;// Bat led 5 tre(1000);// Tre 1 khoang thoi gian Led5= tat;// Tat led 5 tre(1000);// Tre 1 khoang thoi gian Led6= bat;// Bat led 6 tre(1000);// Tre 1 khoang thoi gian
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Led6= tat;// Tat led 6 tre(1000);// Tre 1 khoang thoi gian Led7= bat;// Bat led 7 tre(1000);// Tre 1 khoang thoi gian Led7= tat;// Tat led 7 tre(1000);// Tre 1 khoang thoi gian Led8= bat;// Bat led 8 tre(1000);// Tre 1 khoang thoi gian Led8= tat;// Tat led 8 tre(1000);// Tre 1 khoang thoi gian } } i u khi n 8 led. V i chng trnh ny cc b n c th cho th t cc led t t b t khc nhau c cc ki u nhy khc nhau. 3.7. i u khi n out c c ng: N u cc b n nhm chn v i vi c i u khi n t ng chn 1 vi t code r t t n cng cc b n c th xu t gi tr ra c c ng. Tr c h t cc b n c n n m cc i u nh sau: - 1 c ng c 8 bit t h p 8bit c 28 = 256 tr ng thi. Khi cc b n a ra c ng 1 gi tr a(th p phn) t 0 n 255 th s a s c i ra h nh phn r i a ra cc bit( chn) c a c ng. V d : N u c l nh: P1=1; v 1(10) = 0000 0001(2) nn chn P1_0(bit 0) s b ng 1(5V) cn l i cc t P1_1(bit 1) n P1_7(bit 7) s b ng 0(0V). P1=10; v 10(10) = 0000 1001(2) th s c P1_0 v P1_3 b ng 1(5V) cn l i cc chn khc s l 0(0V). - Cc b n c th a ra c ng 1 gi tr s hex t 0 n ff tng ng t 0 n 255. Cc s c s trong h hex. (HEX)0 1 2 3 4 5 6 7 8 9 A B C D E F (10) 10 11 12 13 14 15 Cch s hex ra s th p phn: c s hex : N(16)=abf1 i ra h s 10 N(10)=1.160 + 15.161+ 11.162+ 10.163= B m my tnh h nh. i s nh phn sang hex: G p 4 s nh phn thnh 1 s hex V d : 0010 0001(2) = 21(16) 4 s u c bit 1 = 1 nn 1x21= 2 4 s sau c bit 0 =1 nn 1x20=1. Cc b n th y v t v v i ph n ny d b n c hi u hay khng hi u 1 lt n a s bi t cch lm li n. Cch a ra nh sau: V d l nh P1=1; tng ng v i P1=0x01; P1=10; tng ng v i P1=0x0A; Chng trnh xu t ra c c ng tng ng v i chng trnh i u khi n 8 led t ng ci 1 nh sau: void main(void) { while(1)// Lap vo han {
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P1=0x01;// Bat led 1 tre(1000);// Tre 1 khoang thoi gian P1=0x00;// Tat led 1 tre(1000);// Tre 1 khoang thoi gian P1=0x02;// Bat led 2 tre(1000);// Tre 1 khoang thoi gian P1=0x00;// Tat led 2 tre(1000);// Tre 1 khoang thoi gian P1=0x04;// Bat led 3 tre(1000);// Tre 1 khoang thoi gian P1=0x00;// Tat led 3 tre(1000);// Tre 1 khoang thoi gian P1=0x08;// Bat led 4 tre(1000);// Tre 1 khoang thoi gian P1=0x00;// Tat led 4 tre(1000);// Tre 1 khoang thoi gian P1=0x10;// Bat led 5 tre(1000);// Tre 1 khoang thoi gian P1=0x00;// Tat led 5 tre(1000);// Tre 1 khoang thoi gian P1=0x20;// Bat led 6 tre(1000);// Tre 1 khoang thoi gian P1=0x00;// Tat led 6 tre(1000);// Tre 1 khoang thoi gian P1=0x40;// Bat led 7 tre(1000);// Tre 1 khoang thoi gian P1=0x00;// Tat led 7 tre(1000);// Tre 1 khoang thoi gian P1=0x80;// Bat led 8 tre(1000);// Tre 1 khoang thoi gian P1=0x00;// Tat led 8 tre(1000);// Tre 1 khoang thoi gian } } Nh v y g code v n m i tay l m t c m c ch 8 n nhy lin ti p cc b n c th lm nh sau: /******************Ham chinh****************************/ void main(void) { unsigned char n; // Khai bao them bien n cho vong for while(1)// Lap vo han { P1=0x01;// Bat led 1 for(n=0 ; n<8;n++)// Lap 8 lan { P1=P1<<1; // Dich bit xang trai
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tre(1000); } } } /***********************************************************/ Debug quan st s thay tri. hi u thao tc xu t ra c ng , chn, cc cc b n lm cho mnh 1 v d n a nh sau: /***********************Ham chinh*******************************/ void main(void) { unsigned char n; // Khai bao them bien n cho vong for while(1)// Lap vo han { P1=0x01;// Bat led 1 for(n=0 ; n<256;n++)// Lap 8 lan { P1=n; // Dich bit xang trai tre(5000); } } } /****************************************************************/ Debug th y s thay i cc c ng. 3.8. Kinh nghi m : * chuy n i gi a cc h s nhanh cc b n dng ci calculator c ngay trong window. Ch n Start All programs Accessories Calculator. Trong Calculator cc b n ch n menu View Ch n scienctific. Cch chuy n i t khm ph nh. * tnh ra s hex nhanh nh t . Ti v d mu n a chn P3.5 v chn P3.2 xu ng 0(0V) cn cc chn cn l i ta lm nh sau: C cho P3= 100 ; hay 1 gi tr b t k .V code d ch khng l i c php m i debug c nn ph i cho gi tr b t k vo. D ch chng trnh r i nh n Debug. Ra c nh sau: i c a c ng 1 th y c l i h i c a php d ch bit xang
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Cc b n th y trong c a s m ph ng c ng 3 c ghi gi tr c a c ng 3 l : 0xFF tng ng t t c 8 bit l 1111 1111. Gi cc b n b d u tch trn chn 3.5 v 3.2 i . m t tri qua ph i nh.
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Th y c ng 3 c gi tr l 0xDB. Nh v y cc b n m t cng nh m i s nh phn ra s hex. N u khng dng cch ny l nh trn cc b n ph i ngh trong u ra c dy s 1101 1011 r i i qua s HEX k t qu s l 0xDB nhng m t l m.
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4.1 L p m ch :
109 8 7 6 D11 f g V+a b A F G B F G 109 8 7 6 D10 f g V-a b A B
D DOT LED CATOT Chung e d V+c dot 1 2 3 4 5
D DOT LED CATOT Chung e d V-c dot 1 2 3 4 5
C hai lo i led 7 thanh: An t chung v Cat t chung. Hnh trn l s c a hai lo i led. N c c u t o nh sau:
7 6 4 2 1 10 9 5 D13A Anot chung A B C D E F G DP 7 6 4 2 1 10 9 5 D12A Catot chung
chn
83
83
Ch l 8 con led u chung 1 u: An t ho c Cat t. M ch l p s d ng led An t chung nh sau:
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5VDC
U3 21 22 23 24 25 26 27 P2.0 P2.1 P2.2 P2.3 P2.4 P2.5 P2.6
VCC
B C D E F G
40
R3 10K 31 + C3 9 10uF/25V R1 10K
EA/VP RESET
C2 33p 18 12Mhz C1 33p 19 20 X1 VSS 8051 X2
- L p m ch: M ch bi tr c( i u khi n led n) nguyn,ch l p thm vo. + B c1: L p 7 i n vo 7 chn c ng P2 t P2.0 n P2.7( T chn 21 Chn 27) c a vi i u khi n. Ch m bit c a c ng 2 t d i ln trn. + B c2: L p led 7 thanh 5 chn pha trn sng, 5 chn pha d i sng(Gi ng l p AT89C51). + B c 3: Dng dy i n cu t cc chn theo s . Chn i u khi n thanh A vo i n tr n i vo P2.0 v c th n chn i u khi n thanh G vo i n tr n i vo P2.7. B qua chn i u khi n d u ch m(Dot chn 5 c a led 7 thanh). + B c 4: Dng dy cu chn 3(ho c chn 8, ho c c hai chn 3 v 8) ln +5V. L p m ch nn dy cu khc mu v r rng trnh nh m l n. - Test led: Cho ngu n vo( D nhin led n bi tr c v n nh p nhy). Rt 1 u i n tr n i v i chn P2.0 c a V K c m xung t th y led 7 thanh sng n A,c m l i i n tr v v tr c. Tng t test 6 thanh cn l i. Thanh no khng sng th ki m tra l i xem c m dy ti p xc cha. V n khng sng th led h ng thay led khc vo. 4.2. Nguyn l ho t ng: Khi c m ngu n vo m ch t t c cc chn c a cc c ng IO c a V K l 5V( N u c ng 0 khng l p i n tr treo th s l 0V). Nhn s m ch khng c chnh l ch i n p nn khng c n no sng. Chng ta mu n sng thanh no ch vi c a ra i n p 0V chn vi i u khi n n i v i thanh . Thanh hi n Thanh t t Gi tr (P2) hi n th s 1: B,C cc thanh cn l i 1111 1001 hi n th s 2: A,B,D,E,G cc thanh cn l i 1010 0100 . hi n th s 8: T t c cc thanh khng thanh no 1000 0000
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gfe dcba Bt th 8 P2.7 khng dng. Ngoi ra led 7 thanh cn c th hi n th 1 s ch hi n th ch B: Gi ng s 8 Hi n th ch A: A,B,C,E,F,G D 1000 1000 4.3.L p trnh : Cch 1: L p trnh d hi u khng c n ph i tnh ton nhng ph i vi t v copy, past v s a nhu. Code nh sau: #include <AT89X52.H> /* Khai bao cac bien bit gan voi chan vi dieu khien*/ sbit ThanhA = P2^0; sbit ThanhB = P2^1; sbit ThanhC = P3^5; sbit ThanhD = P3^4; sbit ThanhE = P3^3; sbit ThanhF = P2^2; sbit ThanhG = P2^3; /* Khai bao bien */ long n;// Cho vong for /* Khai bao ham */ /* Ham tre */ void delay(long time) { for(n=0; n<time; n++) { ; } }
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/* Ham tat tat ca cac thanh */ void tat(void) { ThanhA =1; ThanhB =1; ThanhC =1; ThanhD =1; ThanhE =1; ThanhF =1; ThanhG =1; } /* Cac ham hien thi chu va so */ void so1(void) { tat(); ThanhA =1; ThanhB =0; ThanhC =0; ThanhD =1; ThanhE =1; ThanhF =1; ThanhG =1; } void so2(void) { tat(); ThanhA =0; ThanhB =0; ThanhC =1; ThanhD =0; ThanhE =0; ThanhF =1; ThanhG =0; } void so3(void) { tat(); ThanhA =0; ThanhB =0; ThanhC =0; ThanhD =0;
ThanhE =1; ThanhF =1; ThanhG =0; } void so4(void) { tat(); ThanhA =1; ThanhB =0; ThanhC =0; ThanhD =1; ThanhE =1; ThanhF =0; ThanhG =0; } void so5(void) { tat(); ThanhA =0; ThanhB =1; ThanhC =0; ThanhD =0; ThanhE =1; ThanhF =0; ThanhG =0; } void so6(void) { tat(); ThanhA =0; ThanhB =1; ThanhC =0; ThanhD =0; ThanhE =0; ThanhF =0; ThanhG =0; } void so7(void) { tat(); - 71 -
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ThanhA =0; ThanhB =0; ThanhC =0; ThanhD =1; ThanhE =1; ThanhF =1; ThanhG =1; } void so8(void) { tat(); ThanhA =0; ThanhB =0; ThanhC =0; ThanhD =0; ThanhE =0; ThanhF =0; ThanhG =0; } void so9(void) { tat(); ThanhA =0; ThanhB =0; ThanhC =0; ThanhD =0; ThanhE =1; ThanhF =0; ThanhG =0; } void chuA(void) { tat(); ThanhA =0; ThanhB =0; ThanhC =0; ThanhD =1; ThanhE =0; ThanhF =0; ThanhG =0; }
void chuB(void) { tat(); ThanhA =0; ThanhB =0; ThanhC =0; ThanhD =0; ThanhE =0; ThanhF =0; ThanhG =0; } void chuC(void) { tat(); ThanhA =0; ThanhB =1; ThanhC =1; ThanhD =0; ThanhE =0; ThanhF =0; ThanhG =1; } void chuD(void) { tat(); ThanhA =0; ThanhB =0; ThanhC =0; ThanhD =0; ThanhE =0; ThanhF =0; ThanhG =1; } void chuE(void) { tat(); ThanhA =0; ThanhB =1; ThanhC =1; ThanhD =0; - 72 -
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ThanhE =0; ThanhF =0; ThanhG =0; } void chuF(void) { tat(); ThanhA =0; ThanhB =1; ThanhC =1; ThanhD =1; ThanhE =0; ThanhF =0; ThanhG =0; } void chuG(void) { tat(); ThanhA =0; ThanhB =1; ThanhC =0; ThanhD =0; ThanhE =0; ThanhF =0; ThanhG =1; } void chuH(void) { tat(); ThanhA =1; ThanhB =0; ThanhC =0; ThanhD =1; ThanhE =0; ThanhF =0; ThanhG =0; } void chuI(void) { tat(); ThanhA =1;
ThanhB =1; ThanhC =1; ThanhD =1; ThanhE =0; ThanhF =0; ThanhG =1; } void chuL(void) { tat(); ThanhA =1; ThanhB =1; ThanhC =1; ThanhD =0; ThanhE =0; ThanhF =0; ThanhG =1; } void chuO(void) { tat(); ThanhA =0; ThanhB =0; ThanhC =0; ThanhD =0; ThanhE =0; ThanhF =0; ThanhG =1; } void chuP(void) { tat(); ThanhA =0; ThanhB =0; ThanhC =1; ThanhD =1; ThanhE =0; ThanhF =0; ThanhG =0; }
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void chuR(void) { tat(); ThanhA =0; ThanhB =0; ThanhC =0; ThanhD =1; ThanhE =0; ThanhF =0; ThanhG =0; } void chuS(void) { tat(); ThanhA =0; ThanhB =1; ThanhC =0; ThanhD =0; ThanhE =1; ThanhF =0; ThanhG =0; }
void chuU(void) { tat(); ThanhA =1; ThanhB =0; ThanhC =0; ThanhD =0; ThanhE =0; ThanhF =0; ThanhG =1; } void chuY(void) { tat(); ThanhA =1; ThanhB =0; ThanhC =0; ThanhD =0; ThanhE =1; ThanhF =0; ThanhG =0; }
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/* Ham chinh */ void main(void) { while(1) { so0(); delay(20000); so1(); delay(20000); so2(); delay(20000); so3(); delay(20000); so4(); delay(20000); so5(); delay(20000); so6(); delay(20000); so7(); delay(20000); so8(); delay(20000); so9(); delay(20000); chuA(); delay(20000); chuB(); delay(20000); chuC(); delay(20000); chuD(); delay(20000); chuE(); delay(20000); chuF(); delay(20000); chuG(); delay(20000); chuH(); delay(20000); chuI(); delay(20000); chuL();
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delay(20000); chuO(); delay(20000); chuP(); delay(20000); chuR(); delay(20000); chuS(); delay(20000); chuU(); delay(20000); chuY(); delay(20000); } } Cch 2: Cc b n vi t 1 chng trnh n gi n r i dng cng c Debug xem s hex r i vi t vo r t ng n g n. V d : Hm hi n th s 1: void so1(void) { tat(); P2=0xF5; } Cc b n debug cho hi n th c ng P2 ln. d u tch cc n t t(1) , b d u tch cc n c n b t(0). R i c gi tr hex nh ti h ng d n bi tr c. 4.4.N p chp: h ng d n. N u cc b n g p ph i v n c a m ch n p. Th ng l: + Treo chip Master: Rt ngu n m ch n p ra, i cht r i c m l i. + Khng nh n c ng COM. Cc b n nh p chu t ph i vo Mycomputer, ch n Properties Device manage. Nh n vo Scan for hardware change my tnh nh n l i c ng COM. R i kh i ng l i my. + L do khc cc b n th ki m tra ph n c ng m ch n p. + V n khng c ti ch u. T bi sau s khng c ph n ny. 4.5.K t qu : Nhn vo hm main cc b n th y chng trnh s hi n th s 1 led 7 thanh, tr 1 kho ng th i gian, r i nh y sang s 2 n s 9 , r i n ch . N u cc b n khng c hm tr th led s hi n th ra sao? Led s hi n s 8. V t t c 8 led c b t t t qu nhanh (ch c n >24 Hz) do hi n t ng lu nh m t cc b n s nhn th y t t c cc led sng ch khng hi n s . 4.6.Kinh nghi m : Sau khi th c hi n theo cc rt g n nh vi t hm s 1 trn cc b n p d ng c u trc l nh switch case vi t l i chng trnh th chng trnh s r t g n.
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void Hienthiled(unsigned char x) // Co 1 bien dau vao de xac dinh xem la hien thi so nao { switch(x) { case 1: { tat(); P2=0xF5; break;} // So 1 case 2: { tat(); P2=0xFF; break;}// So 2 case 9: { tat(); P2=0xFF; break;}// So 9 case 10: { tat(); P2=0xFF; break;}// Chu A . case 20: { tat(); P2=0xFF; break; }// Chu Y } } Cc gi tr trn ch l v d cc b n rt g n v t copy vo. V i hm hi n th led cc b n vi t hi n cc s v cc ch gi hm main ch c n nh sau: void main (void) { while(1) { for(n=0; n<20; n++) { Hienthiled(n); delay(20000); } } }
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Ph n 1: Nhi m v : m s l n phm b m gi i h n t 0 5.1.L p m ch nh sau:
c 1 phm. n 9 hi n th ra led 7 thanh.
5VDC
U1 A F G B 21 22 23 24 25 26 27 P2.0 P2.1 P2.2 P2.3 P2.4 P2.5 P2.6
VCC
40
109 8 7 6 D11 f g V+a b
D12 LED
R29 1K + C3 RESET 9 10uF/25V R1 10K
D DOT LED ANOT Chung e d V+c dot 1 2 3 4 5
SW1 C2 33p 18 P1.0 X2 P1.1 12Mhz C1 33p 19 20 X1 VSS 8051 CAP NP 1 2 1 C4 2
- M ch bi 5 led 7 thanh gi nguyn. L p m ch: qu n gi n. B c 1: L p 1 nt b m u trn m ch. B c 2: Dng dy cu 1 chn nt b m v i P1.0( Thay th led bi 4). B c 3: Dng dy cu 1 chn nt b m xu ng t. B c 4: L p 1 t 104 gi a 2 chn nt b m. B c 5: L p tr vo chn P1.0 v led t +5V vo u tr cn l i(Ch ng chi u led. - Test nt b m: C m ngu n vo, nh n nt n sng. Nh nt n t t.
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5.2.Nguyn l ho t ng: - Ph n nt b m: (khi khng c t 104) ban u chn P1.0 m c cao +5V, n u b m nt 2 u nt b m thng v i nhau. Chn P1.0 thng v i GND. Led sng do c chnh p. Chn P1.0 thng t. N u c t 104 t i n c n p i n, khi b m nt t i n s phng i n t c c dng sang c c m lm chn P1.0 thng v i GND nhng lu v 0 V hn 1 cht( tr c ng). - Khi b m nt theo nguyn l thi b m 1 ci l xu ng 0 li n, nhng do ti p i m c kh c a nt b m nn khi b m nt n s c 1 s xung i n ch khng ph i l b m ci l n xu ng 0 lun. T 104 gi m nhi u . T 104 cng c th b i khng l p v ta c th kh nhi u b ng ph n m m. 5.3.L p trnh: Code bi 5 gi nguyn: so n thm m t s hm nh sau hm c phm b m. Hm c s l n n phm
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Hm hi n th s tng ng.
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Hm main c s a l i nh sau:
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y l code cc hm b sung: unsigned char i=0;// Khai bao them bien toan cuc de dem so lan an nut unsigned char Doccongtac(void)// Ham tra lai gia tri unsigned char { if( P1_0 ==0)// Neu nut duoc bam { delay(300);// Tre 1 khoang thoi gian qua xung nhieu while(P1_0 ==0) // Cho toi khi nha tay khoi nut bam { ;//Khong lam gi } i++;// Nha ty thi tang i if( i ==10) i=0;// Quay vong gia tri cua i } return i; } void hienthisolannhanphim(unsigned char solan) { switch(solan)// Tuy vao so lan { case 0: { so0(); break; }// Neu so lan =0 hien so 0 thoat khoi switch case 1: { so1(); break; }// Neu so lan =1 hien so 1 thoat khoi switch case 2: { so2(); break; }// .... case 3: { so3(); break; } case 4: { so4(); break; } case 5: { so5(); break; } case 6: { so6(); break; } case 7: { so7(); break; } case 8: { so8(); break; } case 9: { so9(); break; }// Neu so lan =9 hien so 9 thoat khoi switch } } void main(void) { while(1) { Doccongtac(); // Goi ham doc so lan nhan phim hienthisolannhanphim(i);// Hien thi so lan nhan phim, bien i la bien toan cuc } }
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5.4) Kinh nghi m: - Xem cc gi tr c a bi n trong Debug. Sau khi vi t xong chng trnh v bin d ch chng trnh cc b n vo cng c Debug c a Keil C. c mn hnh sau: Ch n View Watch& Call Stack Window.
c nh sau:
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Trong khung pha d i chnh l Watch& Call Stack Window. Chuy n sang tab watch#1, nh p chu t vo ch F2 to edit,nh n F2 v g vo tn bi n c n quan st.
Ph n 1 k t thc.
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Chng ta quan st bi n I, nn g I vo v c hnh nh trn. Cc b n nh n F11 ch y m ph ng. M i l n n phm, cho chn P1.0 xu ng 0 r i ln 1, tng ng v i n phm v nh phm I s tng 1 nh sau: (Khi n phm ph i ch hm delay(300) v hm while(P1_0 ==0) xong I m i tng v mnh l p trnh th m.
Gi tr c a I hi n th theo s hex.
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Ph n 2: c ma tr n phm. Nhi m v : Qut bn phm 16 phm b m(4x4), xem phm no c b m, cc phm c nh s t 0 n 15 r i hi n th gi tr ra led 7 thanh. 6.1. L p m ch theo s sau:
5V
5VDC 5V 40
R26 10Kx8
R27 R
R28 R
R25 R
A B C D E F G
21 22 23 24 25 26 27
U3 P2.0 P2.1 P2.2 P2.3 P2.4 P2.5 P2.6
PHIM 1 1 R3 10K 31 9 R1 10K PHIM 9 + C3 10uF/25V PHIM 5 1 2 1 2 1
PHIM 2 2 1
PHIM 3 2 1
PHIM 4 2
VCC
HANG 1
PHIM 6 2 1 PHIM 7 2 1 PHIM 8 2 R
R21
EA/VP RESET
PHIM 10 1 2 1
PHIM 11 2 1
PHIM 12 2
LED 7 THANH
C2 33p 18 12Mhz C1 33p 19 20 X1 VSS 8051 X2
P3.0 P3.1 P3.2 P3.3 P3.4 P3.5 P3.6 P3.7
10 11 12 13 14 15 16 17
P3.0 P3.1 P3.2 P3.3 P3.4 P3.5 P3.6 P3.7
HANG 2
R
R22
1 5V P3.0 P3.1 P3.2 P3.3 P3.4 P3.5 P3.6 P3.7
PHIM 13 1 2 1
PHIM 14 2 1
PHIM 15 2 1
PHIM 16 2
HANG 3
R
R23
HANG 4 COT 1 COT 2 COT 3 COT 4

- L p m ch:m ch bi led 7 thanh gi nguyn v v i bn phm cc b n hn c ch c n cu vo c ng 3 ng th t chn v cu chn 5V ln +5V.
R
R24
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6.2 Nguyn l qut phm: c t 16 nt b m bnh th ng ph i - V sao m ch phm u theo ma tr n. N u dng 16 chn vi i u khi n. N u u theo d ng ma tr n th ch m t 8 chn ta cng c th c c 16 phm b m. - C 2 cch qut phm theo c t v theo hng, ti ch n cch qut theo hng, qut theo c t cc b n c th lm tng t . - B c 1 : Ta a chn P3.0 n i v i Hng 1 xu ng 0V.R i ta ki m tra gi tr logic c a cc chn P3.4,P3.5,P3.6,P3.7.N u phm 1 c b m th C t 1_ P3.4 s c gi tr b ng 0. N u phm 2 c b m th C t 2_ P3.5 s c gi tr b ng 0. N u phm 3 c b m th C t 3_ P3.6 s c gi tr b ng 0. N u phm 4 c b m th C t 4_ P3.7 s c gi tr b ng 0. Ta cn c vo xc nh xem phm no c b m. - B c 2 : Ta a chn P3.1 n i v i Hng 2 xu ng 0V.R i ta ki m tra gi tr logic c a cc chn P3.4,P3.5,P3.6,P3.7.N u phm 5 c b m th C t 1_ P3.4 s c gi tr b ng 0. N u phm 6 c b m th C t 2_ P3.5 s c gi tr b ng 0. N u phm 7 c b m th C t 3_ P3.6 s c gi tr b ng 0. N u phm 8 c b m th C t 4_ P3.7 s c gi tr b ng 0. Ta cn c vo xc nh xem phm no c b m. - B c 3 : Ta a chn P3.2 n i v i Hng 3 xu ng 0V.R i ta ki m tra gi tr logic c a cc chn P3.4,P3.5,P3.6,P3.7.N u phm 9 c b m th C t 1_ P3.4 s c gi tr b ng 0. N u phm 10 c b m th C t 2_ P3.5 s c gi tr b ng 0. N u phm 11 c b m th C t 3_ P3.6 s c gi tr b ng 0. N u phm 12 c b m th C t 4_ P3.7 s c gi tr b ng 0. Ta cn c vo xc nh xem phm no c b m. - B c 4 : Ta a chn P3.3 n i v i Hng 1 xu ng 0V.R i ta ki m tra gi tr logic c a cc chn P3.4,P3.5,P3.6,P3.7.N u phm 13 c b m th C t 1_ P3.4 s c gi tr b ng 0. N u phm 14 c b m th C t 2_ P3.5 s c gi tr b ng 0. N u phm 15 c b m th C t 3_ P3.6 s c gi tr b ng 0. N u phm 16 c b m th C t 4_ P3.7 s c gi tr b ng 0. Ta cn c vo xc nh xem phm no c b m. Ta s dng cu l nh if ki m tra. 6.3. L p trnh: - T o 1 project m i, copy ph n hi n th cc s 09 cc ch AY c a bi tr c. R i b sung cc hm sau. Hm hi n th phm n. void phim_duoc_an(unsigned char phim) { switch(phim)// Tuy vao so lan { case 0: { so0(); break; }// Neu so lan =0 hien so 0 thoat khoi switch case 1: { so1(); break; }// Neu so lan =1 hien so 1 thoat khoi switch case 2: { so2(); break; }// .... case 3: { so3(); break; } case 4: { so4(); break; } case 5: { so5(); break; } case 6: { so6(); break; } case 7: { so7(); break; } case 8: { so8(); break; } case 9: { so9(); break; }// Neu so lan =9 hien so 9 thoat khoi switch
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} } Hm qut phm: /*Khai bao 1 mang 4 phan tu nhu sau: quetphim[4]={P0=0xFE,0xFD,0xFB,0xF7} De dua 0 ra lan luot cac hang phim, khi do neu nut nao duoc an thi chan vi dieu khien se xuong 0.Chu y fai kiem tra phim khoang 100 lan.*/ unsigned char quetphim[4]={0xFE,0xFD,0xFB,0xF7}; // Dinh nghia so lan quet phim #define solanquetphim 100 // Cac ban co the thay doi gia tri nay cho phu hop unsigned char quetbanphim(void) { unsigned char giatribanphim;// Bien de luu gia tri phim an tu 0 den 15 ma hoa 16 phim unsigned char x,y; //Quet 4 hang phim for(x=0; x<4;x++) { P3=quetphim[x];// Dua lan luot cac hang xuong 0 for(y=0;y<solanquetphim;y++)// Kiem tra solanquetphim lan { if(P3_4==0) giatribanphim=0+4*x;// Gia tri phim tuong ung if(P3_5==0) giatribanphim=1+4*x;// Tuy thuoc vao hang x if(P3_6==0) giatribanphim=2+4*x;// La may ma gia tri cua if(P3_7==0) giatribanphim=3+4*x;// gia tri ban phim tuong ung. } } return(giatribanphim); } Hm Main. void main(void) { unsigned char i; while(1) { i=quetbanphim(); phim_duoc_an(i); } } Thm cu l nh #define vo u chng trnh:
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Vi t hm phm c n:
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Vi t hm qut bn phm v hm main.
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5.4. Kinh nghi m: - Cc b n ch y Debug xem s thay i gi tr c a bi n gi tr bn phm. - Cc b n m i dng 10 phm t 09 . Bi t p cho cc b n l dng phm 16 ch n mode: nh n phm 16 th thay i ch hi n s thnh hi n ch v phm 1 tng ng ch A,phm 2 tng ng ch B v c nh v y. - Cc b n th thay i gi tr #define solanquetphim 100 xem sao. ng lo l ng v cc warning. Cc warning n c nh bo l b n c khai bo 1 s hm m b n khng dng n. Nh hm delay(); hm ch A, vv.
Nhi m v : i u khi n hi n th LCD 16x2 dng ch www.EmbestDKS.com ch y trn mn hnh LCD. C 16 chn nh sau: Chn K hi u I/O M t 1 VSS t 2 VCC Dng ngu n 5v 3 VEE C p ngu n i u khi n ph n 4 RS I RS = 0 ch n thanh ghi l nh. RS = 1 ch n thanh d li u 5 R/W I R/W = 1 c d li u. R/W = 0 ghi 6 E I/O Cho php 7 DB0 I/O Cc bt d li u 8 DB1 I/O Cc bt d li u 9 DB2 I/O Cc bt d li u 10 DB3 I/O Cc bt d li u 11 DB4 I/O Cc bt d li u 12 DB5 I/O Cc bt d li u 13 DB6 I/O Cc bt d li u 14 DB7 I/O Cc bt d li u Chn 15 v chn 16: ghi l A v K. N l an t v kat t c a 1 con led dng sng LCD trong bng t i. Chng ta khng s d ng. N u cc b n mu n dng th n i chn A qua 1 i n tr t 1K n 5K ln dng 5V, chn K xu ng t n s sng. 6.1.L p m ch theo s sau:
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VCC 5V R1 10K C6 5V 104 10 9 8 7 6 5 4 3 2 40 U1 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 EN Rw RS 5V R2 5K
LCD16x02
J1 LCD
+ C3 CAPACITOR POL
R3 10K
Y1 12Mhz C2 33p C1 33p
AT89C51
20
GND
P1.0 P0.0/AD0 P1.1 P0.1/AD1 P1.2 P0.2/AD2 P1.3 P0.3/AD3 P1.4 P0.4/AD4 P1.5 P0.5/AD5 P1.6 P0.6/AD6 P1.7 P0.7/AD7 RST EA/VPP P3.0/RXD ALE/PROG P3.1/TXD PSEN P3.2/INT0 P2.7/A15 P3.3/INT1 P2.6/A14 P3.4/T0 P2.5/A13 P3.5/T1 P2.4/A12 P3.6/WR P2.3/A11 P3.7/RD P2.2/A10 XTAL2 P2.1/A9 XTAL1 P2.0/A8 VCC
39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 24 23 22 21
1 D7 D6 D5 D4 D3 D2 D1 D0
EN
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Rw
RS
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- H ng d n: C m lun 8 bit d li u c a LCD t D0 n D7 vo c ng 2 c a 8051 m khng c n cu dy. th a 6 chn ra ngoi l: EN,RW,RS,Ve, Vcc, GND ra ngoi. R i dng dy cu chn 1 xu ng GND, chn 2 ln +5V, chn 3 vo chn gi a c a bi n tr tinh 5K, 2 chn cn l i c a bi n tr tinh 1 chn ln +5V,1 chn xu ng 0V. 6.2.Nguyn l ho t ng c a LCD: - Chn VCC, VSS v VEE: Cc chn VCC, VSS v VEE: C p dng ngu n - 5v v t tng ng th VEE c dng i u khi n tng ph n c a LCD. - Chn ch n thanh ghi RS (Register Select): C hai thanh ghi trong LCD, chn RS(Register Select) c dng ch n thanh ghi, nh sau: N u RS = 0 th thanh ghi m l nh c ch n cho php ng i dng g i m t l nh ch ng h n nh xo mn hnh, a con tr v u dng v.v N u RS = 1 th thanh ghi d li u c ch n cho php ng i dng g i d li u c n hi n th trn LCD. - Chn c/ ghi (R/W): u vo c/ ghi cho php ng i dng ghi thng tin ln LCD khi R/W = 0 ho c c thng tin t n khi R/W = 1. - Chn cho php E (Enable): Chn cho php E c s d ng b i LCD ch t d li u c a n. Khi d li u c c p n chn d li u th m t xung m c cao xu ng th p ph i c p n chn ny LCD ch t d li u trn cc chn d liu. Xung ny ph i r ng t i thi u l 450ns. - Chn D0 - D7: y l 8 chn d li u 8 bt, c dng g i thng tin ln LCD ho c c n i dung c a cc thanh ghi trong LCD. hi n th cc ch ci v cc con s , chng ta g i cc m ASCII c a cc ch ci t A n Z, a n f v cc con s t 0 - 9 n cc chn ny khi b t RS = 1. Cng c cc m l nh m c th c g i n LCD xo mn hnh ho c a con tr v u dng ho c nh p nhy con tr . - Ch :Chng ta cng s d ng RS = 0 ki m tra bt c b n xem LCD c s n sng nhn thng tin. C b n l bt D7 v c th c c khi R/W = 1 v RS = 0 nh sau: N u R/W = 1, RS = 0 khi D7 = 1 (c b n 1) th LCD b n b i cc cng vi c bn trong v s khng nh n b t k thng tin m i no. Khi D7 = 0 th LCD s n sng nh n thng tin m i. Lu chng ta nn ki m tra c b n tr c khi ghi b t k d li u no ln LCD. - Sau y l b ng m l nh c a LCD: M (Hex) 1 2 4 6 5 7 8 A C L nh n thanh ghi c a LCD Xo mn hnh hi n th Tr v u dng Gi m con tr (d ch con tr sang tri) Tng con tr (d ch con tr sang ph i) D ch hi n th sang ph i D ch hi n th sang tri T t con tr , t t hi n th T t hi n th , b t con tr B t hi n th , t t con tr - 96 -
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E F 10 14 18 1C 80 C0 38
B t hi n th , nh p nhy con tr T t con tr , nh p nhy con tr D ch v tr con tr sang tri D ch v tr con tr sang ph i D ch ton b hi n th sang tri D ch ton b hi n th sang ph i p con tr v u dng th nh t p con tr v u dng th hai Hai dng v ma tr n 5 7
- i u khi n LCD qua cc b c sau: B c 0 : Chu n b ph n c ng. Dng tu c vt hay ci g b n c xoay bi n tr 5 K i u ch nh tng ph n c a LCD. Xoay cho n khi cc vung(cc i m nh) c a LCD hi n ln th xoay ng c bi n tr l i 1 cht. B c 1 : Kh i t o cho LCD. B c 2 : Gn cc gi tr cho cc bit i u khi n cc chn RS,RW,EN cho ph h p v i cc ch : Hi n th k t ln LCD hay Th c hi n 1 l nh c a LCD. B c 3: Xu t byte d li u ra c ng i u khi n 8 bit d li u c a LCD. B c 4: Ki m tra c b n xem LCD s n sng nh n d li u m i cha. B c 5: Quay vng l i b c 1. 6.3.L p trnh: c th l p trnh cho LCD ta thm vo th vi n string.h c a trnh bin d ch b ng cu l nh: #include <string.h> - Khai bo cc chn c a LCD g n v i cc c ng: /* RS chon thanh ghi =0 ghi lenh =1 ghi du lieu RW doc ghi =0 ghi =1 doc E cho fep chot du lieu xung cao xuong thap toi thieu 450 ns. Bit co ban D7 khi RS=0 RW=1 neu D7=1 LCD ban D7=0 LCD san sang. */ sfr LCDdata = 0xA0;// Cong 2 , 8 bit du lieu P0 co dia chi 0x80, P1 0x90 , P2 0xA0 sbit BF = 0xA7; // Co ban bit 7 sbit RS = P3^5; sbit RW = P3^4; sbit EN = P3^3;
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- Vi t 1 s hm i u khi n LCD nh sau: * Hm ki m tra LCD c b n hay khng: void wait(void) { long n = 0; EN=1;// Dua chan cho fep len cao RS=0;// Chon thanh ghi lenh RW=1;// Doc tu LCD LCDdata=0xFF;// Gia tri 0xFF while(BF){n++; if(n>100) break;}// Kiem tra co ban // Neu ban dem n den 100 roi thoat khoi while EN=0;// Dua xung cao xuong thap de chot RW=0;// Doc tu LCD } * Hm i u khi n LCD th c hi n 1 l nh: void LCDcontrol(unsigned char x) { EN=1;// Dua chan cho fep len cao RS=0;// Chon thanh ghi lenh RW=0;// Ghi len LCD LCDdata=x;// Gia tri x EN=0;// Xung cao xuong thap wait();// Doi LCD san sang } Hm c 1 bi n u vo l cc gi tr trong b ng m l nh c a LCD. * Hm kh i t o LCD: void LCDinit(void) { LCDcontrol(0x30);//Che do 8 bit. LCDcontrol(0x30); LCDcontrol(0x30); LCDcontrol(0x38);// 2 dong va ma tran 5x7 LCDcontrol(0x0C);// Bat con tro LCDcontrol(0x06);// Tang con tro xang fai LCDcontrol(0x01);// Xoa man hinh } * Hm l nh cho LCD hi n th 1 k t : void LCDwrite(unsigned char c) { EN=1;// Cho fep muc cao RS=1;// Ghi du lieu RW=0;// Ghi len LCD LCDdata=c;// Gia tri C EN=0;// Xung cao xuong thap
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wait();// Cho } Hm c 1 bi n u vo l m c a k t trong b ng ASCII. * Hm l nh cho LCD hi n th 1 xu k t ( dng ch ): void LCDputs(unsigned char *s,unsigned char row) { unsigned char len; if(row==1) LCDcontrol(0x80);// Ep con tro ve dau dong 1 else LCDcontrol(0xC0);// Ep con tro ve dau dong 2 len=strlen(s);// Lay do dai bien duoc tro boi con tro while(len!=0)// Khi do dai van con { LCDwrite(*s);// Ghi ra LCD gia tri duoc tro boi con tro s++;// Tang con tro len--;// Tru do dai } } Hm c hai bi n u vo l : xu k t c n hi n th v dng c n hi n th xu (1 ho c 2). *s l con tr , tr t i bi n s 6.3.1. nh ngha con tr B nh c a V K cc b n t ng t ng nh 1 ci t nhi u ngn. Khi khai bo 1 bi n, v d bi n ki u unsigned char i; th v k lu bi n I vo 1 ngn trong t _ 1 nh trong b nh , d nhin xc nh cc ngn t ng i ta nh s cho t ng ngn, cn v k xc nh nh .V d ti p: I c gi tr l c p cho cc nh trong b nh 1 a ch 100, th n i dung c a nh lu bi n I l 100,i=100, cn con tr tr n I c gi tr l a ch c a nh ch a bi n I . 6.3.2. Cch s d ng con tr : khai bo con tr c thm d u * tr c tn bi n. *I l bi n ki u con tr , tr t i bi n i(unsigned char). I mang gi tr t 0 n 255, *I mang i ch c a nh ch a i. * Hm hi n th 1 s integer: void LCDwritei(int d) { unsigned char i,j,k,l; i=d%10;// Chia lay phan du, duoc chu so hang don vi d=d/10;// Chia lay phan nguyen, duoc nhung chu so da bo hang don vi j=d%10;// Duoc chu so hang chuc d=d/10;// Nhung chu so da bo hang don vi va hang chuc k=d%10;// Duoc hang tram l=d/10;// Duoc hang nghin LCDwrite(48+l);// Hien thi ki tu trong bang ascii LCDwrite(48+k);// Trong bang ascii so 0 co co so thu tu la 48 LCDwrite(48+j); LCDwrite(48+i);
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} Hm c 1 bi n u vo l s int l n n hng nghn c n hi n th . * Hm tr : void delay(long time) { long n; for(n=0;n<time;n++) ; } * Hm main: void main(void) { char x; LCDinit(); LCDputs("8052 MCU",1); delay(30000); while(1) { for(x=0;x<16;x++)// Dich 16 lan. { LCDputs("8052 MCU",1); LCDcontrol(0x18);// Dich hien thi sang trai. delay(5000);// Tre } } }
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Nhi m v : T o ra xung c c (10 c p t c ). 7.1. L p m ch theo s

12V
r ng thay sau:
i, 10 c p, t n s 1Khz,
i u khi n t c
ng
5VDC
U1 2C
VCC
40
C828 1E 1
3B
21
P2.0 EA 31 9
R2 10K + C3 10uF/25V R1 10K
+ DC Motor
RESET
A
2 C2 33p 12Mhz C1 33p 19 20 X1 VSS 8051 1 1 2 1
SW1 18 P1.0 X2 P1.1 2
SW2 2
- H ng d n: Chn c a C828 l ECB, n u c m xui transitor nhn vo m t c ch , tnh t bn tri sang. 7.2.L p trnh: - Cch t o xung c r ng thay i b ng V K. + Cch 1: Nh cc b n i u khi n nh p nhy 1 con led, l t o ra 1 xung 1 chn c a vi i u khi n, nhng xung c r ng c nh, t n s l n, cch b n c th i u ch nh l i hm delay t n s c a n ng 1 Khz. Tuy nhin v l dng hm delay nn trong th i gian c xung ln 1(5V) v th i gian khng c xung(0V) vi i u khi n khng lm g c , hn n a t o xung b ng vi c delay m cc b n c nhu c u c n 2 b pht
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xung 2 knh, c cng t n s m khc r ng xung th tr nn r t kh khn. Cho nn chng ta dng b nh th i Timer c a vi i u khi n trong tr ng h p ny r t ti n. + Cch 2: Dng ng t Timer c a b vi i u khi n. Tr c h t nh c l i v ng t c a vi i u khi n: + Ng t l g ? tr l i cu h i ny ti xin trch ng t timer: Timer Program excution without interrut Main Program an v ng t trong bi 2 v d cho
ISR
ISR
ISR
*
Main
**
*
Main
**
Main
**
Main
Program excution with interrupt.
M t chng trnh chnh khng c ng t th ch y lin t c, cn chng trnh c ng t th c khi no i u ki n ng t c m bo th con tr s nh y sang hm ng t th c hi n xong hm ng t l i quay v ng ch c th c hi n ti p chng trnh chnh. Ti c 1 v d nh sau: B n ang n cm , c ti ng i n tho i , b n t bt cm ra nghe i n tho i , nghe xong l i quay v bng bt cm ln n ti p. Th qu trnh n cm c a b n l chng trnh chnh,c i n tho i g i n l i u ki n ng t, b n ra nghe i n tho i l th c hi n chng trnh ng t(Interrupt Service Rountine),quay v n cm ti p l ti p t c th c hi n chng trnh chnh. Ng t i v i ng i m i h c vi i u khi n l r t kh hi u, v a s cc ti li u u khng gi i thch ng t lm g. C nhi u lo i ng t khc nhau nhng t t c u c chung 1 c i m, ng t dng cho m c ch a nhi m. a t c l nhi u, nhi m t c l nhi m v . Th c hi n nhi u nhi m v . Cc b n nhn vo ti n trnh c a hm main v i chng trnh c ng t : Chng trnh chnh ang ch y, ng t x y ra, th c hi n hm ng t r i quay l i chng trnh chnh. Chng trnh trong vi i u khi n khc v i v d n cm nghe i n tho i c a ti ch , th i gian th c hi n hm chnh l r t l n,th i gian th c hi n hm ng t l r t nh , cho nn th i gian th c hi n hm ng t khng nh h ng g n th i gian th c hi n hm chnh Nh v y trong hm ng t cc b n lm 1 vi c, trong hm chnh c c b n lm 1 vi c
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nh v y coi nh cc b n lm c 2 vi c( a nhi m) trong 1 qung th i gian tng i ng n c mS, ch th c ra t i 1 th i i m vi i u khi n ch th c thi 1 l nh. V d : B n th ngh xem lm th no v a i u ch xung PWM i u ch nh t c ng c , v a c cc c m bi n u vo m t c ng c ph thu c u vo c m bi n. V y ng t l 1 i u ki n no x y ra ng u nhin m vi i u khi n c th bi t do ph n c ng c a vi i u khi n, r i ta cn c vo l p tr nh. * V d : V i ng t b nh th i timer, hay b m counter l khi trn b m th ph n c ng c a vi i u khi n s b o c ng t x y ra v nh y n chng trnh ph c v ng t( ISR_ Interrupt Sevice Rountine) 1 cch t ng. V i ng t ngoi, chn P3.2 ch ng h n, n u ta khai bo tr c chn s d ng chn P3.2 s d ng cho ng t ngoi ch khng ph i s d ng cho m c ch IO thi c khi c 1 xung xu t hi n t m ch ngo i vi truy n vo chn P3.2 th ph n c ng c a vi i u khi n nh n ra v chuy n t i chng trnh ph c v ng t. V i ng t n i ti p th c khi c k t truy n t my tnh xu ng vi i u khi n th s c hi n t ng ng t x y ra. - Hm ng t: C u trc: Void Tnhm(void) interrupt ngu nng t using bngthanhghi { // Chuong trinh phuc vu ngat o day } Ch v hm ng t: + Hm ng t khng c php tr l i gi tr hay truy n bi n vo hm. + Tn hm b t k. + interrupt l t kha phn bi t hm ng t v i hm th ng. + Ngu n ng t t 0 t i 5 theo b ng vector ng t. + Bng thanh ghi trn ram ch n t 0 n 3. T y theo b n vi t hm ng t cho ngu n no b n ch n ngu n ng t t b ng sau: Ng t do C a ch vector Reset h th ng RST 0000H Ng t ngoi 0 IE0 0003H B nh th i 0 TF0 000BH Ng t ngoi 1 IE1 0013H B nh th i 1 TF1 001BH Port n i ti p RI ho c TI 0023H B nh th i 2 TF2 ho c EXF2 002BH Ring ng t Reset khng tnh, b t u m t 0 v t ng t ngoi 0. V d : ti c n vi t hm ng t cho b nh th i timer 1 hm ng t s l. void timer1_isr(void) interrupt 3 using 0 { // Lenh can thuc hien. }
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- V using 0: C 4 bng thanh ghi b n c th ch n cho chng trnh ph c v ng t, ci ny cng khng quan tr ng. Trong hm ng t cc b n c th b i t using 0, khi vi i u khi n s t s p x p l dng bng thanh ghi no. - Hm ng t khc hm bnh th ng ch no. Hm bnh th ng v d hm delay, c khi b n g i n th n s c th c hi n, c ngha l n c v tr c nh trong ti n trnh hm main, c ngha l b n bi t n x y ra khi no. Cn hm ng t th khng c ti n trnh c nh, i u ki n ng t c th x y ra b t k lc no trong ti n trnh hm main v c khi no c i u ki n ng t th hm ng t s c g i t ng. s d ng ng t ta ph i lm cc cng vi c sau: 1) Kh i t o ng t: dng ng t no th cho php ng t ho t ng b ng cch gn gi tr tng ng cho thanh ghi cho php ng t IE( Interrupt Enable): EA ET2 ES ET1 EX1 EX0 ET0 i u khi n cc ngu n ng t IE (0: khng cho php; 1: cho php) IE.7 EA Cho php/ khng cho php ton c c IE.6 --Khng s d ng IE.5 ET2 Cho php ng t do b nh th i 2 IE.4 ES Cho php ng t do port n i ti p IE.3 ET1 Cho php ng t cho b nh th i 1 IE.2 EX1 Cho php ng t t bn ngoi (ng t ngoi 1) IE.1 EX0 Cho php ng t t bn ngoi (ng t ngoi 0) IE.0 ET0 Cho php ng t do b nh th i 0 IE l thanh ghi c th x l t ng bt. V d : b n mu n cho php ngt timer 1 b n dng l nh: ET1=1; Khng cho php n a b n dng l nh : ET1=0; Ho c b n c th dng l nh IE= 0x08; th bit 3 c a thanh ghi IE t c(IE) s ln 1. Nhng cch th nh t ti n hn. 2) C u hnh cho ng t: Trong 1 ng t n l i c nhi u ch v d : v i ng t timer. B n ph i c u hnh cho n ch y ch no, ch timer hay counter, ch 16 bit, hay 8 bit, b ng cch gn cc gi tr tng ng cho thanh ghi TMOD( Timer MODe).
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TMOD 7 6 5 4
GATE C/T M1 M0
Ch n model cho b nh th i 1 Ch n model cho b nh th i 1 Bt ch n ch c nng m ho c nh th i: Bit ch n ch th nh t Bit ch n ch th 2 M1 M0 Ch Ch c nng 0 0 1 0 1 0 0 1 2
Ch nh th i 13 bit Ch nh th i 16 bit Ch t ng n p l i 8 bit 1 1 3 Ch nh th i chia x 3 GATE Bit i u khi n c ng cho b nh th i 0 2 C/T Bit ch n ch c nng m / nh th i cho b nh th i 0 1 M1 Bit ch n ch th nh t cho b nh th i 0 0 M0 Bit ch n ch th 2 cho b nh th i 0 V d ti c u hnh cho b nh th i 1 ch timer,v i b m 8 bit t ng n p l i(auto reload) dng l nh sau: TMOD=0x20. Cc b n ng lo v vi c ph i nh b ng thanh ghi ny, cc b n khng ph i nh ni tr ng ra nh v y, chuy n sang ph n l p trnh cc b n s c h ng d n lm th no khng ph i nh , nhng ch l p trnh v i C m i lm c cn l p trnh Asem th b t bu c ph i nh . 3)B t u chng trnh c ng t: -Tr c khi b t u cho ch y chng trnh ta ph i cho php ng t ton c c c x y ra b ng cch gn EA(Enable All interrupt) b ng 1, th ng t m i x y ra. -Th ng th ngay vo u chng trnh(hm main) tr c vng while(1) chng ta t cng vi c kh i t o, c u hnh v cho php ki m tra ng t. V d v i b nh th i timer ta gn cc gi tr ph h p cho thanh ghi TCON( Timer CONtrol). TCON i u khi n b inh th i TCON.7 TF1 C trn c a b nh th i 1. C ny c set b i ph n c ng khi c trn, c xo b i ph n m m, ho c b i ph n c ng khi b vi x l tr n trnh ph c v ng t TCON.6 TR1 Bit i u khi n ho t ng c a b nh th i 1. Bit ny c set ho c xo b i ph n m m i u khi n b nh th i ho t ng hay ngng TCON.5 TF0 C trn c a b nh th i 0 TCON.4 TR0 Bit i u khi n ho t ng c a b nh th i 0 TCON.3 IE1 C ng t bn ngoi 1 (kch kh i c nh). C ny c set b i ph n c ng khi c c nh m (cu ng) xu t hi n
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trn chn INT1, c xo b i ph n m m, ho c ph n c ng khi CPU tr n trnh ph c v ng t TCON.2 IT1 C ng t bn ngoi 1 (kch kh i c nh ho c m c). C ny c set ho c xo b i ph n m m khi x y ra c nh m ho c m c th p t i chn ng t ngoi TCON.1 IE0 C ng t bn ngoi 0 (kch kh i c nh) TCON.0 IT0 C ng t bn ngoi 0 ( kch kh i c nh ho c m c) V d ch y b nh th i timer 1 ta dng cu l nh: TR1=0; TR1(Timer Run 1). Cn b n no thch kh th:TCON=0xxx; Cn cc lo i ng t khc qu trnh tng t , y l kha h c c b n ch lm vi c v i ng t timer, trong kha nng cao s c cc ng t cn l i, tuy nhin lm vi c c v i ng t timer th cc ng t khc cc b n cng c th lm tng t , cc b n lm n ng t no th dng ti li u tra b ng thanh ghi c a ng t . Ti li u ti s g i cng bi ny. - Quay tr l i bi h c: Sau khi kh i t o song v cho ng t timer 1 ch y th i u g x y ra? Khi b t u cho timer 1 ch y th b m c a timer s m dao ng c a th ch anh, c 12 dao ng c a th ch anh(1 chu k my), b m c a timer 1 TL1(Timer Low1) s tng 1,c th n ni timer 1 m s chu k my. i v i ch 8 bt. mc ab nh th i r r i. N m c t 0, n 255. TL1 l 1 thanh ghi 8 bt, l b N u n m n 256 th b m trn, TL1 quay vng l i b ng 0, v c ng t TF1(Timer Flag 1) t ng c gn ln 1(b ng ph n c ng c a vi i u khi n) nh 1 cng t c t ng b t, v ng t x y ra. Cn v i ch 16 bt, b mc ab nh th i cn 1 thanh ghi 8 bt n a l TH1(Timer high 1), n u c u hnh cho timer 1 ho t ng ch 16 bit th khi TL1 trn n s m sang TH1(TH1 s tng 1). Nh v y ta c th m: 216 chu k my( 2 thanh ghi 8+8=16 bt). m trn ng t s x y ra. N u ta c n m 256 chu k my th khi kh i t o Ch l khi b ta cho TL1=0; , cn n u khng mu n m 256 chu k my m ta ch c n m 100 thi ng t x y ra r i th ta f i lm nh sau: 256-100 = 156; v khi kh i t o ta gn : TL1=155; v m t 155 n 255 l 100 l n th ng t x y ra. V i yu c u c a bi. T o xung t n s 1Khz Chu k = 1/103 = 0,001 giy= 1 mili giy=1000 uS= 1000 chu k my. V i 10 c p t c , t c l b n ph i t o ra c xung 10%, 20%, 30%, 40%, , 90%, 100%. 1 xung nh sau: 5V 0V T : Chu k 1000 miro giy. Kho ng th i gian xung ko di 5V l T1. Xung 10% t c l T1/ T= 10%=1/10. Xung 20% T2/T=2/10PWM(Thay i r ng xung) By gi ti m i xin ni v ph n 2.
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7.3) Nguyn l ho t ng: r ng l n hn transitor s m lu - Xung PWM: a ra m transitor, xung v i hn ng c s quay nhanh hn,d nhin khng tuy n tnh. Khng c xung ng c s khng quay, c xung 100% ng c s quay max.Tuy nhin xung ph i l n hn 1 m c no th m i kh i ng cho ng c. Cc c tnh ny cc b n tham kh o trong gio trnh v my i n, kh c i n, n u cc b n c n thng s chnh xc. c th thay i 10 c p t c v i chu k 1000uS, ta kh i t o cho ng t timer: 100 uS ng t 1 l n. Trong hm ng t ki m tra xem ta c n c p xung bao nhiu % th ta s gn gi tr cho n. C th nh sau: * Hm kh i t o ng t. Dng ng t timer 0, 100 uS ng t 1 l n, dng ch 2 8 bit t ng n p l i c a timer (v mnh ch c n m n 100).TL0 n p b ng 156. i v i ch 2 khi trn b m TL0 s quay vng gi tr b ng 0, nhng sau n l i c n p gi tr lu trong TH0(gi tr n p l i), do ta ch c n gn gi tr choTL0 v TH0 trong hm kh i t o, cn cc ch khc 16 bit, 2 timer counter 8 bit, khi trn b m TL0 khng c n p l i m ta ph i t gn l i gi tr cho n trong hm ng t. void khoitaotimer0(void)// Ham khoi tao { EA=0;// Cam ngat toan cuc TMOD=0x02;// Timer 0 che do 2 8 bit auto reload TH0=0x9B;// Gia tri nap lai 155 doi ra so hex TL0=0x9B;// Gia tri khoi tao 155 doi ra so hex ET0=1;// Cho phep ngat timer 0 EA=1;// Cho phep ngat toan cuc TR0=1;// Chay timer 0 bat dau dem so chu ki may }
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* Hm ng t: unsigned char dem=0;// Khai bao bien dem de dem tu 1 den 10 unsigned char phantramxung;// Bien chua phan tram xung(0...10) void timer0(void) interrupt 1 //Ngat timer 0 { TR0=0;// Dung chay timer 0 TF0=0;// Xoa co, o che do co tu duoc xoa,che do khac can toi cu viet vao day dem++; if(dem<phantramxung) P2_0=1;// Neu bien dem < phan tram xung thi dua gia tri 1 ra chan, xung 5V else P2_0=0;// Neu dem = phan tram xung if(dem==10) dem=0;// Neu dem du 10 thi gan lai bang 0 de bat dau chu ki moi TR0=1;// Cho chay timer } c th thay i r ng xung th ta lu r ng xung vo 1 bi n, v hm ng t khng cho truy n bi n vo ta khai bo bi n l bi n ton c c c th gn gi tr m i hm. 100 uS ng t 1 l n xc nh chu k 1000 uS ta c n m t 1 n 10 ta khai bo bi n m. void timer0(void) interrupt 1 //Ngat timer 0 { TR0=0;// Dung chay timer 0 TF0=0;// Xoa co, o che do co tu duoc xoa,che do khac can toi cu viet vao day TH0=0xAB; TL0=0xAB; . TR0=1;// Cho chay timer } C u trc hm ng t timer no cng ph i theo, do ch 2t ng n p l i nn k c n gn gi tr cho TH0 v TL0. V bi n dem s m t 1 n 10 n u b ng 10 k t thc 1 chu k 10*100 =1000 uS, ta gn l i n b ng 0 sang chu k m i. if(dem<phantramxung) P2_0=1;// Neu bien dem < phan tram xung thi dua gia tri 1 ra chan, xung 5V else P2_0=0;// Neu dem = phan tram xung Cu l nh ny ki m tra n u m nh hn phantramxung th s a ra c ng gi tr 1, b ng ho c l n hn s a ra gi tr 0. Khi vo chng trnh chnh ta ch vi c thay i gi tr bi n phantramxung th r ng xung s thay i. * Hm main: void main(void) { khoitaotimer0(); while(1) {
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phantramxung=9; delaylong(20000); phantramxung=4; delaylong(20000); } }
Gi s khi cc b n gn phantramxung=4; Th c m i 100uS ng t x y ra 1 l n, v ki m tra bi n m. L n u dem=1 <4 nn gi tr P2_0 = 1 m c cao, l n th 2 , 200 uS, dem =2<4 P2_0 = 1 m c cao, l n th 3, 300uS, dem=3<4, P2_0=1 m c cao, l n th 4, 400uS, dem =4 <4 sai, P2_0=0, b t u xu ng m c th p, c xung t cao xung th p, dem = 5<4 sai ,
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P2_0=0 m c th p, , dem =10 <4 sai P2_0 m c th p 1000 uS , 400uS cao, 600uS th p quay vng dem=0, ng t l n th 11, dem=1 < 4 , P2_0=1 m c cao, c xung th p ln cao. PWM 2 chn P2_0 v P3_5, cc b n khai bo thm 1 bi n phantramxung2 v a thm dng l nh sau vo hm ng t. if(dem<phantramxung) P3_5=1;// Neu bien dem < phan tram xung thi dua gia tri 1 ra chan, xung 5V else P3_5=0;// Neu dem = phan tram xung Ch : Th c ra 1 chu k nh ta v a lm khng chnh xc 100% l 1Khz, v ta cha tnh n di c a hm ng t,m i l n ng t 100uS, 10 l n l 1000uS , cn th i gian th c hi n hm ng t n a, nh v y l chu k c a ta l n hn 1000uS, t n s s <1Khz, nhng th c s sai s khng ng k . N u cc b n mu n chnh xc ti cng chi u lng cc b n. Cc b n ch y debug, th ch anh ng 12Mhz, quan sat dng sec xem hm ng t di n ra trong bao nhiu chu k my, khi n p gi tr cho TL0 v TH0 cc b n l y 155 tr i gi tr c ga tr a gn vo, nh v y a+th i gian th c hi n hm ng t ng 100uS.
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Ch vo list mode: Ch n ch , r i quan st gi tr TMOD r i quay l i i n vo chng trnh. Ch : V cng quan tr ng cc b n ch c ch y v i ng c lo i nh , n u ng c lo i to ph i c m ch i u khi n ring khng l s chy chip. N u khng c m ch i u khi n cc b n c th lm, c th m n c a ti, khng th ch u kh ch y m ph ng.
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Nhi m v : i u khi n Led ma tr n 8x8. Hi n th dng ch ch y MTC Chu n b : Led ma tr n 8x8

8 7 6 5 4 3 2 1
LED MATRIX 1 8x8
10
11
12
13
14
15
16
chn led ma tr n 8x8: Chn C t 1 2 3 7 4 6 5 6 4 7 8
Hng 4 2 1 3 6
Chn 9 10 11 12 13 14 15 16
C t 5 3
Hng 8 5
8 7 2 6
8.1. L p m ch theo s
sau:
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VCC
1 R3 H ang6 H ang3 C o t4 H ang1 C o t6 C o t7 H ang2 H ang4 U1 Cot1 Cot2 Cot3 Cot4 Cot5 Cot6 Cot7 Cot8 39 38 37 36 35 34 33 32 1 2 3 4 5 6 7 8 Y1 P0.0/AD0 P0.1/AD1 P0.2/AD2 P0.3/AD3 P0.4/AD4 P0.5/AD5 P0.6/AD6 P0.7/AD7 P1.0 P1.1 P1.2 P1.3 P1.4 P1.5 P1.6 P1.7 P2.0/A8 P2.1/A9 P2.2/A10 P2.3/A11 P2.4/A12 P2.5/A13 P2.6/A14 P2.7/A15 P3.0/RXD P3.1/TXD P3.2/INT0 P3.3/INT1 P3.4/T0 P3.5/T1 P3.6/WR P3.7/RD 21 22 23 24 25 26 27 28 10 11 12 13 14 15 16 17 Hang1 Hang2 Hang3 Hang4 Hang5 Hang6 Hang7 Hang8 8 7 6 5 4 3 2 1 LED MATRIX 1 8x8 19 18 X1 X2 31 9 EA RST 40 VCC 8051 C3 + 10uF R2 10K GND 30 ALE 29 PSEN 9 10 11 12 13 14 15 16 H ang8 C o t5 C o t3 H ang5 C o t8 H ang7 C o t2 C o t1 20 10K C1 33p 12M C2 33p
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9 8 7 6 5 4 3 2
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8.2. Nguyn l hot ng:

D2 D3 D4 D5 D6 D7 D8 D8
Hang 1
LED D2
LED D3
LED D4
LED D5
LED D6
LED D7
LED D8
LED D8
Hang 2
LED D2
LED D3
LED D4
LED D5
LED D6
LED D7
LED D8
LED D8
Hang 3
LED D2
LED D3
LED D4
LED D5
LED D6
LED D7
LED D8
LED D8
Hang 4
LED D2
LED D3
LED D4
LED D5
LED D6
LED D7
LED D8
LED D8
Hang 5
LED D2
LED D3
LED D4
LED D5
LED D6
LED D7
LED D8
LED D8
Hang 6
LED D2
LED D3
LED D4
LED D5
LED D6
LED D7
LED D8
LED D8
Hang 7
LED D2
LED D3
LED D4
LED D5
LED D6
LED D7
LED D8
LED D8
LED Cot1
LED Cot2
LED Cot3
LED Cot4
LED Cot5
LED Cot6
LED Cot7
LED Cot8
Hang 8
Mu n cho led sng, c p i n dng 5V vo hng, 0V vo c t, dng 10mA n 15 mA. V d : mu n n led v tr 5x4 sng, ta a i n p c t 4(P0_3) xu ng 0V, i n p hng 5(P2_5) ln 5V. Hi n th ch : th ng k cc i m sng thnh ch r i cho cc hng c t i n p tng ng. C th dng cng c debug l y gi tr c ng tng ng v i cc led sng. Gi ng nh qut bn phm, a i n p 0V ra t ng c t n i v i c ng 0. Nh v y s c 8 gi tr : 0xFE, 0xFD, 0xFB, 0xF7, 0xEF, 0xDF, 0xBF, 0x7F ph I a vo 1 m ng 8 ph n t , r i sau a vo 1 vng for tng d n 1 bi n tng ph n t m ng cot[8]. V i m i l n 1 chn c ng 0 xu ng 0V ta dng c ng 2 a ra 1 gi tr 8 bt i u khi n trong 1 c t nh ng n no sng. V d mu n hng 1 v hng 3 sng th hng 1 v 3 c gi tr 5V cn cc hng khc 0V, ta c gi tr 8 bt sau: 0x05 ( 1010 000). T i m i th i i m ch c m t s n trn 1 c t sng, nhng do ta qut 8 c t v i t n s nhanh, v m t c hi n t ng lu nh nn ta th y trong 1 th i i m ta th y ton b k t . V i 8 c t l n l t b ng 0V ta ph I a ra tng ng 8 gi tr 8 bit ra c ng 2, do ta f I lu 8 gi tr vo 1 m ng 8 k t _ kytu1[8], ta s vi t cc k t trn 7 c t. m i k t s cch nhau 1 c t khng sng. Ta khai bo m ng kytu1[9] c 9 ph n t v ph n t u tin c gi tr y ra c ng 2 l 0x00 t t ton b c t .
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Qu trnh i u khi n hi n th nh sau: C t 1, hng 1, c t 2 hng 2, , c t 8 , hng 8. lm ch ch y: Thm 1 bi n vo i u khi n th t hi n th hng. Hi n 1 ch trn led nh trn a ra: C t 1, hng 1, c t 2 hng 2, , c t 8 , hng 8. Mu n ch d ch chuy n sang trI ta hi n th nh sau: C t 1, hng 2, c t 2 hng 3, , c t 7, hng 8,c t 8 , hng 1 k t sau. C t 1, hng 3, c t 2 hng 4, , c t 7 hng 1 k t sau,c t 8 , hng 2 k t sau.
8.3) Code:
#include <REGX51.H> /* Cot tu P0.0 den P0.7 Hang tu P2.0 den P2.7 De quet dua muc logic 0 lan luot ra cong 0 */ /* Ham tre */ void delay(long time) { long n; for(n=0; n<time; n++) { ; } } unsigned char kytu1[9];// Mang 9 phan tu chua gia tri cac hang day ra cong 2 unsigned char k=0;// Bien xac dinh cac ky tu /* Ham nap gia tri hien thi cac ky tu vao mang kytu1 co 8 gia tri dua ra va 1 gia tri khong bat den nao de cac ky tu cach nhau 1 cot */ void mahoa(unsigned char x) { switch(x) { // Dau trang case 0: { kytu1[0]=0x00; kytu1[1]=0x00; kytu1[2]=0x00; kytu1[3]=0x00; kytu1[4]=0x00; kytu1[5]=0x00; kytu1[6]=0x00; kytu1[7]=0x00; kytu1[8]=0x00; break; } // Chu M case 1: { kytu1[0]=0x00; kytu1[1]=0xFF; kytu1[2]=0x02; kytu1[3]=0x04; kytu1[4]=0x08; kytu1[5]=0x04; kytu1[6]=0x02; kytu1[7]=0xFF; kytu1[8]=0x00; break; } // Chu T case 2: { kytu1[0]=0x00; kytu1[1]=0x01; kytu1[2]=0x01; kytu1[3]=0x01;
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kytu1[4]=0xFF; kytu1[5]=0x01; kytu1[6]=0x01; kytu1[7]=0x01; kytu1[8]=0x00; break; } // Chu C case 3: { kytu1[0]=0x00; kytu1[1]=0x7E; kytu1[2]=0x81; kytu1[3]=0x81; kytu1[4]=0x81; kytu1[5]=0x81; kytu1[6]=0x42; kytu1[7]=0x00; kytu1[8]=0x00; break; } // Dau trang case 4: { kytu1[0]=0x00; kytu1[1]=0x00; kytu1[2]=0x00; kytu1[3]=0x00; kytu1[4]=0x00; kytu1[5]=0x00; kytu1[6]=0x00; kytu1[7]=0x00; kytu1[8]=0x00; break; } } } /* Ham quet led ma tran_ vua hien thi vua dich ky tu dan sang trai*/ void hienthi(void) { unsigned char n,m,lap; unsigned char cot[8]={0xFE,0xFD,0xFB,0xF7,0xEF,0xDF,0xBF,0x7F}; // Cac phan tu quet cot for(m=0; m<8 ; m++)// Dich hien thi { for(lap=0; lap<10; lap ++) // Lap hien thi { for(n=0; n<8 ; n++)// Quet cot { if((n+m)<9 )// Neu n+m < 9 hien thi ky tu 1 { mahoa(k); // Nap cac gia tri ma hoa ky tu dua ra cac hang (Cong 2) P0=cot[n]; // Day gia tri 0V ra cong 0 (cac cot) P2=kytu1[n+m];// Day cac gia tri cac hang (ma hoa ky tu) ra cong 2(cac hang) delay(45);// Tre du de led sang } if((n+m) > 7)// Neu n+m >7 hien thi ky tu 2 { mahoa(k+1);// Nap gia tri ma hoa ky tu tiep de dua ra cac hang(Cong 2) P0=cot[n];// Day gia tri logic 0V ra cong 0(cac cot) P2=kytu1[n+m-8];// Day cac gia tri cac hang (ma hoa ky tu) ra cong 2(cac hang) delay(45);// Tre du de led sang
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} P0=0xFF;// Day cac cot len cao P2=0x00;// Dua cac hang xuong thap de tat toan bo cac led. } } } } void main(void) { while(1)// Vong lap vo han. { hienthi(); // Hien thi 2 ky tu dau tien dau trang va chu M k=k+1; // Tang k de hien thi chu M va chu T lan tiep if(k==4) k=0;// Quay vong hien thi } }
Ch : M ch led sng u tuy nhin sng y u, do l p trn board chng ta khng l p cc linh ki n khuych i dng v_ n dng led sng p, u. Khi l_m m ch cc b n thm cc linh ki n khuych i ho c n dng n sng u nh ULN2003 ho c ULN 2803 a gi tr logic ra h_ng, dng transitor ho c dng lun ULN qut c t.
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Lap Trinh C Voi 8051 - VD - Tieng Viet - Rat Hay

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Lap Trinh C Voi 8051 - VD - Tieng Viet - Rat Hay

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4.2.Nguyn l ho t 4.3.L p trnh 4.4.N p chp 4.5.K t qu Bi 5. c bn phm 5.1.L p m ch

68 69 75 75 78 78 79 79 94 94 97 97 99 99 100 101 110 114 114

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c d li u), khi VXL ch

cc bit opcode c a l nh v a chng vo hng

i l nh thng qua cc Bus

Chn 31 (EA : Eternal Acess) c a xu ng th p cho php ch n b nh m ngoI

c m c logic (0;1 tng ng v i 0V ; 5V)vo

P0 P0.0 P0.1 P0.2 P0.3 P0.4 P0.5 P0.6 P0.7

P1 P1.0 P1.1 P1.2 P1.3 P1.4 P1.5 P1.6 P1.7

P2 P2.0 P2.1 P2.2 P2.3 P2.4 P2.5 P2.6 P2.7

P3 P3.0 P3.1 P3.2 P3.3 P3.4 P3.5 P3.6 P3.7

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R1 10K C2 33p 12Mhz C1 33p

Microcontroller Training Center

M ch ny cha c kh i ngu n S chn:

t o ngu n 5V cc b n dng con IC sau:

+ C3 RESET 9 10uF/25V R1 10K

12Mhz C1 33p 19 20 X1 VSS 8051

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1.5. C u trc vi i u khi n 89c51

ETC COUNTER INPUTS TIMER 0 TIMER 1

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thanh ghi SFR n m gi a 80H cc a ch ny

Khng nh a ch t ng bt 9F 9E 9D 9C 9B 9A 97 96 95 94 Khng nh a ch t Khng nh a ch t Khng nh a ch t Khng nh a ch t Khng nh a ch t 8F 8 8D 8C E Khng nh a ch t 93 92 ng bt ng bt ng bt ng bt ng bt 8B 8A ng bt

Khng nh a ch t ng bt Khng nh a ch t ng bt Khng nh a ch t ng bt 87 86 8 84 83 82 5

THANH GHI CH C NNG C BIT

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3 2 1 0 TF1 TR1 Thanh ghi / Bit TCON TCON.7

GATE C/T M1 M0 TF1 K hi u TF1

TCON.6 TCON.5 TCON.4 TCON.3

TR1 TF0 TR0 IE1

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IT1 IE0 IT0 ET2 EA --ET2 ES ET1 EX1 EX0 ET0

Program excution with interrupt.

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Microcontroller Training Center

Microcontroller Training Center

Microcontroller Training Center

{ // Cc cu l nh x l } S bi n truy n vo ty (mi n V d : y b nh ), ngn cch b i d u ,

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C u trc: Gi i thch: qua Cu l nh l a ch C u trc:

if ( i uki n) { // Cc cu l nh x l } N u i uki n ng th x l cc cu l nh bn trong cn sai th nh y

www.atmel.com www.keil.com www.iguanalabs.com - 16 -

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www.microchip.com www.elechtro-tech-online.com www.diendansv.hutech.edu.vn www.ttvnol.com www.8052.com www.kmitl.ac.th www.ftdichip.com

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New project nh sau:

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Microcontroller Training Center

n th m c b n lu project. B n nn t o m i m t th m c cho 1 project.

Microcontroller Training Center

Microcontroller Training Center

Microcontroller Training Center

Microcontroller Training Center

Ch n No. Ch n Yes ch lm cho file l p trnh c a b n thm n ng . c c a s sau:

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t o 1 file code cc b n ch n File