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REP02.02 1/14

Report No 02.02
Gi n: Ni dung: Thy Lu Hng Vit Gio vin hng dn FPGA nhm Hiu, Bc. Project iu khin ng c bc n cc (Unipolar motor) MICROSOFT WORD Tm tt: Bo co gii thiu tng quan v cch to mt Project hon chnh vi ISE 8.2i v np vo KIT Spartan 3E ca Xilinx. Ti liu gm cc phn sau: Mch iu khin ng c bc Cc components ca d n

1. Mch iu khin ng c bc 1.1. Gii thiu ng c bc n cc ng c c dng trong project ny l ng c bc n cc (unipolar motor).

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Hnh 1.1: ng c bc n cc

Hnh 1.2: Cu to ng c bc ng c bc n cc cun theo s hnh 1.2, vi mt u ni trung tm trn cc cun. Khi dng cc u ni trung tm c ni ln u dng ca ngun cp, cn 2 u cn li ca mi mu ln lt c ni t o chiu t trng to bi cun . Mu 1 nm cc trn v di ca stator, cn mu 2 nm hai cc bn phi v bn tri ng c . Rotor l mt nam chm vnh cu vi 6 cc, 3 Nam v 3 Bc, xp xen k trn vng trn. x l gc bc mc cao hn, rotor phi c nhiu cc i xng hn. ng c bc c dng l ng c nam chm vnh cu vi mi bc l 1.8 . C nhiu cch iu khin ng c bc: iu khin 1 bc, iu khin na bc v iu khin vi bc. iu khin 1 bc Nh trong hnh, dng in i qua t u ng tm ca mu 1 n u a to ra cc Bc trong stat or trong khi cc cn li ca stator l cc Nam. Nu in mu 1 b ngt v kch mu 2, rotor s quay 30 , hay 1 bc. quay ng c mt cch lin tc, chng ta ch cn p in vo hai mu ca ng c theo dy: Mu 1a 1000100010001000100010001 Mu 1a 1100110011001100110011001 Mu 1b 0010001000100010001000100 Mu 1b 0011001100110011001100110 Mu 2a 0100010001000100010001000 Mu 2a 0110011001100110011001100 Mu 2b 0001000100010001000100010 Mu 2b 1001100110011001100110011 thi gian > thi gian >

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REP02.02 3/14

iu khin na bc V tr bc c to ra bi hai chui trn khng ging nhau; kt qu, kt hp 2 chui trn cho php iu khin na bc, vi vic dng ng c mt cch ln lt ti nhng v tr nu mt trong hai dy trn. Chui kt hp nh sau: Mu 1a 11000001110000011100000111 Mu 1b 00011100000111000001110000 Mu 2a 01110000011100000111000001 Mu 2b 00000111000001110000011100 Thi gian > 1.2. Mch iu khin ng c Da theo nguyn l cu to nh phn 1.1. chng ta cn iu khin s ng ngt chn 1a, 1b, 2a, 2b vi t. Mch dng cch ly quang PC521 cch ly in p gia bo mch Spartan 3E v mch lc bn ngoi. iu khin ng ngt cc chn dng Transtor Darlington TIP122 (NPN) c tn sut ng ct ln.

Hnh 1.3: Mch iu khin

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REP02.02 4/14

Khi c tn hiu tch cc 1 chn Phase 1_in th PC521 thng dn n TIP122 thng v chn tng ng ca stepper motor c ni vi t khi phn dy s c dng chy qua, sinh ra t thng. Do , tn hiu a vo mch s ging ht nh cc s 1.1.

Hnh 1.4: S mc cc chn ca ng c ng c c 6 dy vi 2 dy u c ni ln ngun dng, cc chn cn li ni vi mch iu khin trn, ngoi ra mi chn ny ni vi 2 diode m bo trong trng hp ng ngt t ngt cc na cun dy.

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REP02.02 5/14

Hnh 1.5: S mch in

2. Cc thnh phn ca d n
2.1. Stepper Motor Controller

B iu khin gm c u vo l: Clk: Xung clock s quyt nh tc ca ng c. Rst: Tn hiu reset li trng thi ban u. En: Tn hiu xc nh ng c ch quay hay ch gi.

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REP02.02 6/14

Dir: iu khin chiu quay ca motor

u ra l 4 bit n iu khin mch lc. Thut ton: Da vo bng xung nh phn tch mc 1.1. ta thy 4 tn hiu ra chnh l 4 tn hiu trch t mt vector 11100000 quay vng trn, trong 4 tn hiu l trch ca 4 bit 0, 2, 4, 6. Bi v khi quay nh th th ti mi thi im lun c 2 tn hiu = 1 trong iu khin na bc.

Khi m phng ta s c dng tn hiu nh mong mun.

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Cch m phng mt le VHDL trong Xilinx ISE: Vo menu Project -> New Source, chn Test Bench WaveForm vi tn stepper_motor_controller_tbw trong ca s Select Source Type

Chn le Source tng ng l: Stepper_Motor_Controller.vhd

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REP02.02 8/14

Thit lp cc tham s cho vic m phng trong hp thoi Initial Timing and Clock Wizard Initialize Timing.

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REP02.02 9/14

Vo window -> float m mt le trong ca s to hn. Ngc li vo window->dock xem le trong hp thoi ban u. Vi hp thoi init ban u ta s khi to cho cc dng tn hiu u vo c mu xanh da tri nh hnh v.

Trong tab Sources chn Behavioral Simulation. Nhn chn vo le UUT, trong tab Proceses kch p vo Simulation Behavioral Model

Khi chng ta s xem c dng xung u ra ti 4 phase.

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REP02.02 10/14

Chi tit xem phn Simulation ti ti liu [1] 2.2. iu ch clock c tn s thay i Sau khi to c b iu khin mong mun, chng ta s i to xung clock c tn s thay i. Chi tit v cch thay i c ni chi tit trong ti liu [4]

Khi xoay nm th mt xung clock s thay i tn s theo gi tr hin th trn LCD. Xung clock ny s lm xung chun iu khin ng c bc. to ra c tn s chun cn dng 2 DCM (Digital Clock Manager) mt clock nhn tn v mt clock dng lm gim lch xung.

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REP02.02 11/14

Phn c s thay i ca Rotary_ecoder do mt chip nhng 8 bit PicoBlaze m nhim.

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2.3. Giao tip vi PC Giao tip vi UART dng 2 module uart_tx_plus v uart_rx v mt Picoblaze giao tip vi cng RS232 dng ch : Flow: xon/xoff chng trn b m nn truyn tc rt cao.

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Hnh v m t khng hon ton ging vi trong d n vi ca em khu iu khin ngt interrupt_control. Qua RS232 ta c th t tc cho cc ng c bng cu lnh: SPSM3> Step xx yy Trong xx, yy l gi tr truyn xung. Nh vy tn s xung vo mi ng c = tn s xung to ra phn trn /xx hoc yy. Chi tit xem ti liu [5]

Ti liu tham kho

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REP02.02 14/14

1. Xillinx, ISE In-Depth Tutorial, www.xilinx.com 2. Xilinx,Spartan 3E Started Kit User Guide, www.xilinx.com 3. Xilinx, PicoBlaze 8-bit Embedded Microcontroller User Guide, www.xilinx.com 4. Xilinx, Frequency Generator for Spartan-3E Starter Kit, www.xilinx.com 5. Xilinx, Software Implementation of Pulse Width Modulation (PWM).A reference Design using the Spartan-3E Starter Kit, www.xilinx.com