GIO TRNH L THUYT

IU KHIN LOGIC

ThS. Nguyn B Hi
i hc Nng - Trng i hc Bch khoa
hoinb@ud.edu.vn

Gio trnh y bao gm 3 phn:

1. Gio trnh l thuyt
2. Gio trnh tp lnh
3. Gio trnh bi tp

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Chng 1 Gii thiu .......................................................................................................................................... 4
1.1.

PLC....................................................................................................................................................................4

1.2.

Th h PLC S7-200 ...........................................................................................................................................4

1.3.

Thut ng..........................................................................................................................................................5

Chng 2 Bt u vi S7-200 ........................................................................................................................... 6

2.1.

Hnh dng bn ngoi ........................................................................................................................................6

2.2.

Cc thnh vin h S7-200 ................................................................................................................................7

2.3.

Module m rng .............................................................................................................................................10

2.4.

Chun b khi lp trnh .....................................................................................................................................14

Chng 3 u ni S7-200 ............................................................................................................................... 14

3.1.

PLC s dng ngun nui xoay chiu............................................................................................................14

3.2.

PLC s dng ngun nui mt chiu .............................................................................................................15

3.3.

Bo v u ra PLC..........................................................................................................................................16

3.4.

S u ni chi tit .....................................................................................................................................17

Chng 4 Ngn ng lp trnh......................................................................................................................... 20

4.1.

Statement List (STL).......................................................................................................................................20

4.2.

Ladder Logic (LAD) ........................................................................................................................................20

4.3.

Function Block Diagram (FBD) ......................................................................................................................21

4.4.

Phn bit SIMATIC vi IEC 1131-3.................................................................................................................21

Chng 5 Khi nim, qui c v c im lp trnh .................................................................................... 24

5.1.

Cu trc chng trnh....................................................................................................................................24

5.2.
Phn loi lnh .................................................................................................................................................24
5.2.1
Lnh c bn ................................................................................................................................................24
5.2.2
Lnh c bit...............................................................................................................................................24
5.2.3
Lnh tc cao...........................................................................................................................................25
5.3.

Qui c ...........................................................................................................................................................25

5.4.
K hiu ............................................................................................................................................................25
5.4.1
Contact........................................................................................................................................................25
5.4.2
Coil..............................................................................................................................................................25
5.4.3
Box..............................................................................................................................................................25
5.5.

Bi ton AND, OR ...........................................................................................................................................25

5.6.

Trng thi chng trnh.................................................................................................................................26

5.7.

Forcing ............................................................................................................................................................26

5.8.

Bi ton logic tng qut .................................................................................................................................27

Chng 6 STEP7-MicroWIN ............................................................................................................................ 31

6.1.
Giao tip my tnh v PLC S7-200 (b2) ..........................................................................................................31
6.1.1
t cu hnh cho cp PC/PPI ......................................................................................................................31
6.1.2
t cu hnh truyn thng cho CPU S7-200 ................................................................................................32
6.2.
Cch thc S7-200 lu v phc hi d liu (b6) ............................................................................................32
6.2.1
Download v Upload ...................................................................................................................................33
6.2.2
Lu tr vng nh M khi mt ngun .............................................................................................................33
6.2.3
Phc hi d liu khi c ngun tr li............................................................................................................33
6.3.

Mt khu (b6) ..................................................................................................................................................34

6.4.

G ri (Debug) (b6).........................................................................................................................................34

6.5.

Thng bo v x l li (Troubleshooting) (b6) .............................................................................................35

Chng 7 I/O .................................................................................................................................................... 36

7.1.
Vo ra s (b3)..................................................................................................................................................36
7.1.1
Ni dy v chng trnh iu khin .............................................................................................................36
7.1.2
V d iu khin motor.................................................................................................................................36
7.1.3
M rng ......................................................................................................................................................38
7.2.
Vo ra tng t (b3).......................................................................................................................................40
7.2.1
Vo tng t...............................................................................................................................................40
7.2.2
V d ng dng ...........................................................................................................................................40
7.2.3
Ra tng t ................................................................................................................................................40
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7.3.

I/O cc b v m rng (b3) ............................................................................................................................40

7.4.

Lc u vo s (b3) ........................................................................................................................................41

7.5.

Lc u vo tng t (b3).............................................................................................................................41

7.6.

Bt xung vo (b3)............................................................................................................................................42

7.7.

Bng u ra (b3) .............................................................................................................................................42

7.8.
Vo ra tc cao (b5) ....................................................................................................................................43
7.8.1
HSC ............................................................................................................................................................43
7.8.2
PTO ............................................................................................................................................................44
7.8.3
PWM ...........................................................................................................................................................44
7.9.

inh chnh tng t (b5) ...............................................................................................................................44

Chng 8 Vng qut ....................................................................................................................................... 45

Chng 9 B nh d liu v cch nh a ch............................................................................................. 48
9.1.
nh a ch trc tip......................................................................................................................................48
9.1.1
Vng nh cc u vo I...............................................................................................................................48
9.1.2
Vng nh cc u ra Q................................................................................................................................49
9.1.3
Vng nh cc bin V ...................................................................................................................................49
9.1.4
Vng nh cc bit M .....................................................................................................................................49
9.1.5
Vng nh cc r le iu khin tun t S .....................................................................................................49
9.1.6
Vng cc bit c bit SM.............................................................................................................................49
9.1.7
Vng nh cc b L ......................................................................................................................................50
9.1.8
Vng cc b nh thi T ..............................................................................................................................50
9.1.9
Vng cc b m C.....................................................................................................................................51
9.1.10
Vng cc u vo tng t AI ....................................................................................................................51
9.1.11
Vng cc u ra tng t AQ .....................................................................................................................51
9.1.12
Cc accumulator AC....................................................................................................................................52
9.1.13
Cc b m tc cao HC..........................................................................................................................52
9.1.14
Cc hng s ................................................................................................................................................52
9.2.

nh a ch gin tip......................................................................................................................................53

9.3.

Khng gian a ch cc vng nh..................................................................................................................54

9.4.

Bo ton d liu .............................................................................................................................................55

Chng 10 Timer v Counter.......................................................................................................................... 57

10.1.

Cc loi timer (b3)...........................................................................................................................................57

10.2.

TON (b3) ..........................................................................................................................................................57

10.3.

TONR (b4)........................................................................................................................................................58

10.4.

TOFF (b4) ........................................................................................................................................................59

10.5.

Bi tp Timer (b4) ...........................................................................................................................................60

10.6.

Ch khi dng Timer vi phn gii khc nhau (b4) ...............................................................................60

10.7.

Counter (b5) ....................................................................................................................................................60

10.8.

Counter tc cao (b5)..................................................................................................................................60

Chng 11 Gii bi ton c cu trc ............................................................................................................. 62

11.1.

GBT bng gin thi gian (Timing diagram) .............................................................................................62

11.2.

GBT bng lu (flowchart) v cc bit tun t (sequence bits).................................................................62

11.3.

GBT bng s trng thi (state diagram) ..................................................................................................62

11.4.

Cc lnh cn li trong tp lnh......................................................................................................................62

Chng 12 Ngt ............................................................................................................................................... 63

Chng 13 PID, Freeport................................................................................................................................. 65
13.1.

PID ...................................................................................................................................................................65

13.2.

Freeport...........................................................................................................................................................65

Chng 14 Cc phng thc truyn thng .................................................................................................. 66

14.1.

PPI ...................................................................................................................................................................67

14.2.

MPI...................................................................................................................................................................67

14.3.

PROFIBUS.......................................................................................................................................................67

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Chng 1 Gii thiu

1.1. PLC
PLC (Programmable Logic Controllers) l nhng b iu khin lp trnh c.
Chng c ng dng rng ri trong cng nghip hay trong thng mi. PLC theo
di cc trng thi ng vo, ra cc quyt nh theo chng trnh nh sn v xut
cc tn hiu iu khin ra ng ra t ng ha qu trnh (process) hay my mc
(machine).
Hot ng ca PLC

u im ca PLC so vi u dy thun ty

Kch c nh hn
Thay i thit k d hn v nhanh hn khi c yu cu
C chc nng chn on li v ghi
Cc ng dng c th dn chng bng ti liu
Cc ng dng c nhn bn nhanh chng v thun tin

1.2. Th h PLC S7-200

S7-200 l PLC thuc h Micro Automation ca hng SIEMENS, c th iu khin
hng lot cc ng dng khc nhau trong t ng ho. Vi cu trc nh gn, c kh
nng m rng, gi r v mt tp lnh SIMATIC mnh, PLC S7-200 l mt li gii
hon ho cho cc bi ton t ng va v nh.

PLC S7-200 cho php t ng ho ti a vi

chi ph ti thiu.
- Ci t, lp trnh v vn hnh rt n gin.
- Cc CPU c th s dng trong mng, h
thng phn tn hoc s dng n l.
- C kh nng tch hp trn quy m ln.
- ng dng cho nhng iu khin n gin
v phc tp.
- Truyn thng mnh (PPI, Profibus-DP, ASTrang

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i).

1.3. Thut ng
Cm bin

Thit b chp hnh

CPU, RAM, ROM, Firmware

Ng vo ri rc

Ng ra ri rc

Ng vo tng t

Ng ra tng t

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Chng 2 Bt u vi S7-200
2.1. Hnh dng bn ngoi

Ch th trng thi

nh s cc ng vo ra

Chuyn ch v hiu chnh tng t

Cartridge

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Input Simulator

Removable Terminal Strip

2.2. Cc thnh vin h S7-200

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2.3. Module m rng

Lp t CPU v module

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2.4. Chun b khi lp trnh

PLC S7-200 CPU t 221 n

226XM

My tnh (PC hoc PG)

Phn mm lp trnh STEP7MicroWin

Cp truyn thng PC/PPI

Chng 3 u ni S7-200
3.1. PLC s dng ngun nui xoay chiu

[a] Cng tc ngt ngun cho CPU, ton b mch vo v ra ca PLC.

[b] Thit b chng qu dng cho CPU, cc mch vo v ra. C th s dng cu ch
ring cho tng phn (CPU, mch vo, mch ra) bo v tt hn.
[c] Bo v qu dng cho mch vo khng cn thit nu cc u vo s dng
ngun 24VDC do PLC cung cp. Ngun ny (gi l ngun cm bin) c thit
k chng ngn mch.
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[d] Ni u u mt ca
PLC vo im ni t gn
nht chng nhiu. Tt c
cc u u mt trong mt
h thng nn c u vo
cng mt im. Tt nht nn
s dng dy 14 AWG hay
dy 1.5 mm(.
[e] Ngun 24VDC do PLC
cung cp (ngun cm bin) c th c s dng cho mch cc u vo.
[f] Ngun 24VDC do PLC cung cp (ngun cm bin) c th c s dng cho
mch cc u vo m rng.
[g] Ngun 24VDC do PLC cung cp (ngun cm bin) c th c s dng nui
cc module ra m rng.
(Ngun cm bin ny c thit k chng ngn mch.)
[h] Trong a s cc trng hp, ni t u M ca ngun cm bin 24VDC ny l
mt trong nhng cch chng nhiu tt nht.

3.2. PLC s dng ngun nui mt chiu

[a] Cng tc ngt ngun cho

CPU, ton b mch vo v
ra ca PLC.
[b] Thit b bo v qu dng
cho CPU.
[c] Thit b bo v qu dng
cho mch vo.
[d] Thit b bo v qu dng
cho mch ra.
[e] Cn m bo ngun mt
chiu c cng cn
thit nht l trong cc trng hp ti thay i (ng ngt u ra). Nu cn phi u
thm t in ngoi.
[f] Trong a s cc trng hp, ni t u m ca tt c cc ngun 24VDC l mt
trong nhng cch chng nhiu tt nht.
[g] in tr cho php dng in r chy qua chng hin tng tch in tnh
(thng c gi tr khong 1M(). T in chng cc nhiu hi bc cao (thng c
gi tr khong 4700 pF).
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[h] Ni u u mt ca PLC vo im ni t gn nht chng nhiu. Tt c cc

u u mt trong mt h thng nn c u vo cng mt im. Tt nht nn
s dng dy 14 AWG hay dy 1.5 mm(.
Ch s dng ngun cung cp 24VDC c cch in tt vi li in xoay chiu cng
nh vi cc ngun in khc.

3.3. Bo v u ra PLC
Bo v cc u ra 24V mt chiu (Transistors)

Bo v r le ng ngt dng in mt chiu

Bo v r le ng ngt dng in xoay chiu

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3.4. S u ni chi tit

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Chng 4 Ngn ng lp trnh

C 03 ngn ng lp trnh thng dng cho PLC, (ta tm dng ch ngn ng ch
mi trng (editor) lp trnh cho PLC). 03 ngn ng thng dng l:
Statement List (STL), Ladder Logic (LAD), Function Block Diagram (FBD)

Vi S7-200, mi ngn ng c th s dng tp lnh SIMATIC hay tp lnh theo

chun IEC 1131-3, ring STL ch c th s dng tp lnh SIMATIC.

4.1. Statement List (STL)

STL cho php to chng trnh
bng cch vit tng cu lnh,
khc vi hai ngn ng kia l
dng ha. Chnh v th trong
STL c th vit nhng chng
trnh m trong hai ngn ng
cn li khng vit c, bi v
n st vi ngn ng my hn,
khng b gii hn bi cc qui tc ha. STL thng dnh cho cc lp trnh vin
giu kinh nghim.
STL c nhiu nt tng t ngn ng lp trnh Assembler. Mt khi nim rt quan
trng trong STL l Ngn xp (Stack), khi nim ny khng c trong LAD v FBD.
Ngn xp trong STL v kch thc nh hn nhiu so vi khi nim ngn xp trong
Assembler, ch bao gm 09 bits. Tuy nhin n li ng vai tr ln hn, nh hng
ti s thc hin ca hu ht cc lnh v cc lnh cng lun tc ng ti ni dung
ngn xp.
STL thng dnh
cho cc lp trnh
vin giu kinh
nghim; STL c th
gii quyt c mt
s vn khng th
gii quyt d dng
trong LAD v FBD;
STL ch c th s
dng vi tp lnh
SIMATIC; Mi
chng trnh vit
bng LAD hay FBD
u c th chuyn
v xem v sa trong
STL nhng khng
phi tt c nhng
chng trnh vit
trong STL u c th
xem bng LAD hoc FBD.

4.2. Ladder Logic (LAD)

Mt chng trnh vit trong LAD rt ging vi mt s in, v th c rt nhiu
ngi la chn khi lp trnh cho PLC ni chung. Chng trnh thng c chia
thnh nhiu phn nh, rt d hiu v tng i c lp gi network. Nhng thnh
phn c bn ca mt chng trnh trong LAD l cc tip im (contacts) - i din
cho cc u vo nh nt bm, tip im, iu kin, . . . cc cun dy (coils) - i
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din cho cc u ra nh n, van, cun ht, . . v cc hp (box) - c trng cho

cc php tnh, cc b nh thi,
cc b m, . . .
Nhng l do chnh LAD
c yu thch l: d hiu cho
ngi mi bt u; d s dng
v thng dng trn ton th
gii; bao gm tp lnh
SIMATIC v c IEC 1131-3; d
dng chuyn sang dng STL.

4.3. Function
Diagram (FBD)

Block

V d chng trnh trong FBD cho thy n rt ging vi mt s mch in t s.

l u im ca FBD. FBD bao gm c
tp lnh SIMATIC v IEC 1131-3 v d
dng chuyn sang STL.

4.4. Phn bit SIMATIC vi IEC

1131-3
Tp lnh SIMATIC c thit k dnh cho S7-200. Tp lnh ny c v ring v hot ng
cng c hi khc so vi cc tp lnh dnh cho cc loi PLC khc. Tuy nhin hu ht cc
loi PLC trn th gii u s dng nhng tp lnh c rt nhiu nt tng ng nh tp
lnh ny, vi i nt khc bit nh gia cc nh sn xut PLC khc nhau. i vi S7-200,
cc lnh SIMATIC l ti u v mt thi gian (thc hin nhanh nht). Ngoi ra tp lnh
SIMATIC s dng c trong c ba ngn ng STL, LAD v FBD.
Tp lnh IEC 1131-3, i li, tun th theo ng chun qui nh bi y ban K thut in
Quc t (International Electrotechnical Commission). y ban ny l mt t chc c hot
ng rng ri cng nh c uy tn cao trn th gii. Trong vi nm tr li y, cng vi s
pht trin mnh m ca PLC, IEC c gng a ra mt chun chung nhm thng nht cc
nh sn xut PLC khp ni trn ton cu, xy dng mt tp lnh c hnh thc cng
nh cch hot ng ging nhau cho mi loi PLC, to d dng cho ngi s dng.
Nh vy, tp lnh IEC 1131-3 b gii hn trong s cc lnh chung nht ca cc nh sn
xut PLC khc nhau trn th gii. Nhiu lnh bnh thng trong SIMATIC khng cn l
lnh chun trong h IEC 1131-3. Tt nhin, ngi s dng vn c th dng nhng lnh
ny trong IEC 1131-3 nh cc lnh ngoi chun, nhng khi chng trnh khng cn
hon ton tng thch vi chun IEC 1131-3 na.
Mt s lnh trong IEC 1131-3 chp nhn nhiu dng d liu. V d lnh cng s hc trong
SIMATIC c nhiu kiu lnh: ADD_I cng cc s nguyn, ADD_R dnh cho cc s
thc; Trong khi ch c mt lnh cng ADD trong IEC 1131-3, lnh ny t ng kim tra
dng d liu ca cc ton hng v bin dch thnh lnh thch hp cho CPU. iu ny,
cng c gi l overloading, tit kim thi gian qu gi cho ngi lp trnh.
Cc li c php t hn trong IEC 1131-3 v dng d liu c t ng kim tra.
Tm li vi tp lnh theo chun IEC 1131-3, ngi s dng d dng hn trong vic lm
quen vi PLC ni chung. S lnh c s dng cng t hn, tuy nhin cc lnh SIMATIC
vn c th c s dng. Nhiu lnh khc vi nhng lnh tng ng trong SIMATIC nh
cc b nh thi, b m, cc lnh nhn, chia, . . . Cc lnh trong IEC 1131-3 c th c
thi gian thc hin lu hn. Cc lnh ny ch c trong LAD v FBD (khng p dng c
trong STL). IEC 1131-3 ch nh rng phi nh ngha dng d liu cho cc bin v cung
cp kh nng kim tra tnh hp l ca cc bin.
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Trong ni dung ti liu ny chng ta s khng i su hn v vn ang nu m ch im

qua mt s khi nim c bn. Trc ht l nhng dng d liu c bn:
C 03 mc kim tra tnh
hp l ca d liu: kim
tra cht ch (strong data
type checking), kim tra
n gin (simple data
type checking) hoc
khng kim tra (no data
type checking). Trong
IEC 1131-3 p dng
mc kim tra cht ch
cn trong SIMATIC ch
kim tra n gin. Kim tra cht ch ngha l dng d liu phi tuyt i ph hp, thng
th mi lnh yu cu ng mt loi d liu no v iu ny phi c p ng (tt
nhin khng k trng hp cc lnh overloading nh nu trn). Trong khi kim
tra n gin ch kim tra dung lng b nh ca bin (s bit m bin chim), v d bin
dng WORD (khng du) v dng INT (c du) khng b phn bit v u chim 16 bit
trong b nh. Lu trong kim tra n gin, dng REAL vn c phn bit ring d
cng chim 32 bit nh cc dng DWORD v DINT. Khng kim tra dng d liu p dng
cho cc bin chung (global) trong SIMATIC, v d VD100 chim 32 bit c th c hiu
nh DWORD, DINT hay REAL.
Sau y l cc dng d
liu tng hp:
Vic kim tra tnh hp l
ca d liu hay khng
kim tra ng vai tr rt
quan trng. V d trong cc
lnh so snh s nguyn
(>I, <I), nu s dng
WORD c hiu l s
dng INT th PLC c th
cho rng 40000 nh hn 1.
Do vic kim tra tnh hp
l ca d liu trong IEC
1131-3 v SIMATIC khc
nhau nn khng th
chuyn i chng trnh
gia hai dng lnh ny
c. Cn phi la chn
mt tp lnh duy nht
s dng ngay t u, khi bt u to chng trnh.
Nh trn c nhc n cc lnh overloading, sau y l mt v d n gin v vic kim
tra dng d liu cho nhng lnh ny: ta thc hin lnh cng ADD hai ton hng IN1 (dng
INT) v IN2 (dng WORD), lu kt qu vo OUT (dng INT). Trong IEC 1131-3 s bo li
bin dch (kim tra cht ch) cn vi kim tra bnh thng th lnh trn c hiu l lnh
ADD_I (cng s nguyn). Khi kim tra bnh thng (n gin), lnh cng ADD hai s
40000 v 1 s cho kt qu l mt s m ch khng phi l 40001.
Mt iu cng nn nhc n l cc lnh overloading s dng cch nh a ch gin tip.
Do cch nh a ch gin tip khng xc nh dng d liu ca ton hng nn lnh thc
hin t xc nh theo dng ca cc ton hng cn li. Khi khng lm c iu ny (ton
a ch gin tip hay s dng accumulator chng hn) th s bo li bin dch.
iu cui cng cn ni n trong phn ny l vic chuyn dng d liu. Tn ti cc lnh
ring chuyn s liu t dng ny sang dng khc, chng hn chuyn s -5 (dng INT)
thnh -5.00 (dng REAL). Mt cch chuyn dng d liu kh thng dng l bng lnh
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overloading MOVE, cho php chuyn s liu khc dng nhng cng kch thc (chim
cng s bit trong b nh, v d nh INT v WORD, DWORD v DINT).

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Chng 5 Khi nim, qui c v c im lp trnh

STEP7-MicroWIN l phn mm c s
dng vi PLC S7-200 to ra chng
trnh iu khin PLC. Sp xp cc lnh
theo mt trt t logic hp l to nn mt
on chng trnh vn hnh PLC mong
mun. Cc lnh c chia thnh 3 nhm
lnh nh sau: lnh c bn, lnh c bit v
lnh tc cao.

5.1. Cu trc chng trnh

Cu trc mt chng trnh trong PLC kh n gin, chng trnh c to thnh

t 03 thnh phn c bn: mt chng trnh chnh (main program); c th c mt
hay nhiu chng trnh con (subroutines); cc chng trnh con x l ngt
(interrupt routines) c th c hoc khng.
Chng trnh chnh bao gm cc lnh iu khin ng dng. Cc lnh ny c
thc hin tun t mt cch lin tc, c mi vng qut mt ln.
Cc chng trnh con, c th c hoc khng ty yu cu, ch c thc hin
nu c gi n t chng trnh chnh.
Cc chng trnh con x l ngt (c th c hoc khng) c thc hin khi xy
ra s kin gn vi ngt tng ng. S kin c th l s thay i mc mt
u vo, b nh thi m hay nhn c d liu trn cng truyn thng, . . .

5.2. Phn loi lnh

5.2.1
Lnh c bn
L nhng lnh c tm thy trong hu ht cc chng trnh nh: timer, counter,
math, logical, increment/decrement/invert, move, & block instructions.
5.2.2
Lnh c bit
Dng thao tc d liu: shift, table, find, conversion, for/next, & real-time
instructions.
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5.2.3
Lnh tc cao
Cho php cc s kin hoc ngt xy ra c lp vi thi gian mt vng qut. Bao
gm high-speed counters, interrupts, output & transmit instructions.

5.3. Qui c
#, ?.?, ????, --->>, EN, ENO

5.4. K hiu
Ngn ng LAD bao gm cc k hiu thng dng i din cho cc thnh phn iu
khin.
5.4.1

Contact

5.4.2

Coil
Coil i din cho relay. c cp nng lng khi c ngun cung
cp. Khi c nng lng ngha l ng ra thay i trng thi sang ON,
v bit trng thi ln 1. Bit trng thi ny c th c s dng
iu khin NO hay NC bt c u trong chng trnh.

5.4.3

Box
Box = function, cc box cha bn trong nhiu cu lnh thc thi
nhim v ca mt khi chc nng. Cc box c th l timer, counter
hay cc php ton hc.

5.5. Bi ton AND, OR

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5.6. Trng thi chng trnh

5.7. Forcing

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5.8. Bi ton logic tng qut

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28

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H thng cnh bo trm (Burglar Alarm System):

n gin biu thc

v vit chng trnh
LAD:

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n gin biu thc

v vit chng trnh
LAD:

Vit chng trnh

LAD khi trc v
sau khi ti gin:

Bng Karnagh:

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Chng 6 STEP7-MicroWIN
STEP 7Micro/WIN l phn mm ca hng SIEMENS chy c trn cc h iu
hnh Windows 95/98/Me/NT/2000/XP h tr vic lp trnh v cu hnh PLC h S7200 t n gin n phc tp. Ngoi ra, n cn c th cu hnh cho mt s mn
hnh giao din ngi-my (HMI), truyn thng gia cc thit b trong h
MICROMASTER. Vi STEP 7Micro/WIN, ngi lp trnh tit kim rt nhiu thi
gian, c th chuyn i gia cc kiu son tho tiu chun STD, LAD v FBD; to
c cc th vin ngi dng ring.
Tools: Program Block:
ca s son tho. Data
Block: Gn a ch v
gi tr u. Symbol
Table: nh a ch
cho cc bin. Local
Variable Table: khai bo
cc bin a phng
cho cc chng trnh
con hoc chng trnh
con ngt. Status Chart.
System
Block.
Communications.
Set
PG/PC interface.
Instructions: Bit logic,
clock, comm, compare,
convert,
counter,
floating-point math, integer math, int, logical operation, move, program control,
shift/rotate, string, table, timer, call.

6.1. Giao tip my tnh v PLC S7-200 (b2)

6.1.1

t cu hnh cho cp PC/PPI

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Trong ca s STEP 7 - MicroWin 32, nhp chut ln biu tng

Communications hoc chn
View Component
Communications. Trn hp
i
thoi
xut
hin
(Communications
Setup),
nhp p ln biu tng
PC/PPI Cable. Xut hin hp
thoi Setting the PG/PC
Interface, chn nt Properties
v kim tra cc tham s.

Trong ca s STEP 7 - MicroWin 32, nhp

chut ln biu tng Communications hoc
chn View Component Communications.
Trn hp i thoi xut hin (Communications
Setup), nhp p ln biu tng Refresh. CPU
ang c kt ni (v c cp ngun) s xut
hin nh mt biu tng. C th nhp p ln
biu tng ny kim tra cc thng s ca
PLC tng ng.

6.1.2
t
cu hnh truyn thng cho
CPU S7-200
Trong ca s STEP 7 - MicroWin
32, nhp chut ln biu tng
System Block hoc chn Menu
View > Component
System
Block. Trn hp i thoi xut
hin (System Block), chn trang Port(s) xem
v thay i cc tham s truyn thng.

6.2. Cch thc S7-200 lu v phc

hi d liu (b6)

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6.2.1

Download v Upload

6.2.2

Lu tr vng nh M khi mt ngun

6.2.3

Phc hi d liu khi c ngun tr li

nh ngha b nh d liu cn lu gi: Trn y chng ta nhn thy rng, b

nh d liu khng phi ton b u c lu gi trong EEPROM m ch mt
phn, c nh ngha nh l phn retentive. Phn ny c nh ngha bng
cch chn thc n View ComponentSystem Block v chn Tag Retentive
Ranges:

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Ch : vng M mc nh c xem l nonretentive, khi khng s dng c im

lu gi d liu lc mt in c ni n trn
y. Phn c lu gi trong cc vng T
v C (nu c nh ngha) l nhng gi tr
m, cc bit trng thi khng c lu gi.
Trong vng T ch c php nh ngha
nhng timer dng TONR, khng phi TON.

6.3. Mt khu (b6)

Tt c cc CPU i S7-200 u c kh nng bo v v hn ch truy nhp bng
mt khu. C 3 mc hn ch, trong ngi s dng s c ton quyn nu c
mt khu, nu khng c, ngi s dng s b hn ch quyn ty theo mc c
t mt khu nh trong bng di y:
Ta c th thy thc t ch c
02 mc bo v, mc 1
chnh l mc khng hn ch
g (khng c mt khu).
Nu qun mt khu, ch c
cch xa b nh ca CPU
v np li chng trnh. Lc
b xa b nh, CPU chuyn
v ch STOP, cu hnh
mc nh nh khi mi xut
xng tr a ch CPU, tc
truyn thng v ng h thi gian thc. Cn ch iu kin an ton khi PLC
trong h thng v tt c cc u ra s chuyn v 0. xa, vo menu chnh
PLCClear... Nu chng trnh c mt khu, mt hp thoi s hin ra hi, ta phi
g vo mt khu xa (clearplc). ng tc ny khng xa chng trnh trong
Cartridge. V chng trnh c lu cng vi mt khu nn ta cng phi np li
chng trnh cho cartridge xa mt khu c.
t mt khu bng cch vo menu chnh ViewComponentSystem Block v
chn tag Password.

6.4. G ri (Debug) (b6)

Vo Menu Debug Multiple Scans v chn
s vng qut mun g li.

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6.5. Thng bo v x l
li
(Troubleshooting)
(b6)
Phn ny ch dnh cho lp
trnh vin c kinh nghim.
Thng thng li c chia
thnh 02 loi chnh: nghim
trng v khng nghim trng
(fatal errors & non-fatal errors).
Li nghim trng gy ngng
chng trnh v ta phi tin hnh Reset (bng mt trong 03 cch: tt ri bt
ngun, chuyn cng tc v STOP ri bt ln li, vo menu chnh PLCPower-Up
Reset), li ny c th c thng bo trn n LED pha trc CPU. Li khng
nghim trng bao gm li lc chy chng trnh (run-time errors), li lc bin dch
(program-compile errors) v li do chng trnh thc hin. Li khng nghim trng
khng gy ngng chng trnh, tr khi c lp trnh vi lnh STOP, v d:
Li do chng trnh thc
hin l li gy nn bi l gic
ca ngi lp trnh. Ta c
th x l cc li cn li vi
s tr gip ca phng tin
lp trnh (vo menu chnh
PLCinformation) v tra
m li trong ph lc km theo (C Error Codes trong System Manual).

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Chng 7 I/O
Cc ng vo ra chnh l cc im iu khin ca mt h thng: cc ng vo phn
nh trng thi cc thit b nh cc u d, cc cng tc,... v cc u ra iu khin
nhng b phn chp hnh nh m t, bm, van,...

7.1. Vo ra s (b3)
7.1.1

Ni dy v chng trnh iu khin

7.1.2

V d iu khin motor

Chng trnh:

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37

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7.1.3

M rng

Thm chuyn mch gii hn

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38

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2 motor?

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7.2. Vo ra tng t (b3)

Gi tr tng t ph bin cho S7-200 l
0-10VDC hoc 4-20mA. Cc i lng
tng t c th l tc , nhit , trng
lng, mc Khi chuyn sang gi tr th
thng l gi tr s 12 bit c lu gi
trong thanh ghi hay ti cc v tr t n.
Thc nghim tnh nng Trend View
xem dng sng vo chn tng t PLC.
7.2.1

Vo tng t

1 kg = 2,2 lbs
7.2.2

V d ng dng

7.2.3

Ra tng t

7.3. I/O cc b v m rng (b3)

Cu trc MODULE ca S7-200 to s linh hot ti a gii quyt cc bi ton, n
cho php chng ta chn s u vo ra ti u v mt kinh t. Tng s ng vo ra
bng cc module m rng.

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Cc module m rng ny c
cm ni tip nhau vo bn phi
CPU. a ch cc u vo ra trn
cc module m rng c tnh
lin tip, ring cho tng loi
(vo, ra, vo tng t, ra tng
t) khng nh hng ln nhau.
Cc u vo ra ri rc c
nh a ch chn byte, ngha l
trn mt module phi bt u
bng x.0, x.1,... cn cc u vo
ra tng t c nh a ch
theo t n, cch hai, ngha l
bng cc s chn: AIW0, AIW2, AIW4,... AQW0, AQW2, AQW4,...

7.4. Lc u vo s (b3)
S7-200 c kh nng lc cc u vo s
(ch cc u cc b) bng thi gian tr
loi tr hin tng nhiu xung (c th
chn t 0.2 ms n 12.8 ms). Tt nhin,
iu s lm chm tn hiu vo. Chng
ta c th t thi gian tr thch hp cho
tng nhm 04 u vo trong cu hnh
ca CPU bng vo menu chnh
ViewComponentSystem Block v
chn tag Input Filters.

7.5. Lc u vo tng t (b3)

Cc u vo tng t, cng nh cc
u vo ri rc, c th c lc
chng hin tng nhiu. Bn cht b lc
ca mt u vo tng t l php tnh
gi tr trung bnh mt s hu hn cc gi
tr ly mu lin tip, nhm gim tc ng
ca cc gi tr ngoi lai. Tt nhin tc
ng ca b lc bao gi cng lm chm
tn hiu, trong trng hp ny c th
khng thch hp nu u vo bin i
nhanh. S7-200 x l vn bng
khi nim deadband: nu gi tr ly
mu vt ra ngoi khong qui nh so
vi gi tr trung bnh th b lc khng tnh
gi tr trung bnh na m cp nht lun
gi tr mi.
Trong mi trng hp, ngi lp trnh c th bt hay tt chc nng lc cho tng
u vo theo yu cu v cng c th t thng s chung cho cc b lc tng t
(s gi tr tnh trung bnh, deadband) thng qua menu chnh
ViewComponentSystem Block v chn tag Analog Input Filters.
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7.6. Bt xung vo (b3)

Bn cnh vn lc u vo, chng ta c th nu vn mt cch logic: PLC c
th b qua nhng xung qu ngn u vo ngoi mun ca chng ta. Bi v
chng ta bit CPU ch cp nht cc u vo mi vng qut mt ln. S7-200
khc phc im yu ny bng chc nng pulse catch:

Ta c th bt hoc tt tnh nng ny cho mi

u vo cc b trong cu hnh CPU t menu
chnh ViewComponentSystem Block v
chn tag Pulse Catch Bits.
V d minh ha:

7.7. Bng u ra (b3)

Bng cc u ra (output table) qui nh
trng thi cho cc u ra ri rc khi CPU
chuyn t ch RUN sang ch STOP
(bng 0, 1 hay gi nguyn trng thi). iu
ny rt quan trng v mc ch an ton.
Chng ta nh ngha bng cc u ra trong
cu hnh ca CPU bng cch chn menu
chnh ViewComponentSystem Block
v chn tag Output Table.

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7.8. Vo ra tc cao (b5)

Khc vi cc vi mch in t, cc mch iu khin t ng thng thng hot
ng vi tc thp hn. Tuy nhin, thnh thong chng ta cng cn ghi nhn v
x l nhng bin i tc cao. S7-200 p ng yu cu ny bng cc u vo v
cc b m tc cao cng nh bng u ra xung tc cao.
7.8.1
HSC
HSC: B m tc cao.
Cc b m tc cao trong S7-200 c kh nng m nhng tn s n 20 kHz
vi nhiu ch hot ng khc nhau:
HSC0 v HSC4 hot ng mt trong 08 ch , c th m cc u vo mt
pha hoc hai pha.

HSC1 v HSC2 c 12 ch hot ng, vi cc u vo mt pha hoc hai pha.

HSC3 v HSC5 l nhng b m n gin, vi mt ch hot ng v ch

m u vo mt pha.
Xem cc bng tm tt v cc b m ny bn di. Chng ta nhn thy rng nu
s dng HSC0 trong nhng ch t 3 n 11 th khng th s dng HSC3 bi v
HSC0 v HSC3 c hai u dng u vo I0.1. Tng t nh th i vi HSC4 v
HSC5. I0.0 n I0.3 cn c th c s dng lm cc u vo gy ngt, cn ch
khng s dng chng va lm cc u vo gy ngt va lm cc u vo b m
tc cao. Nu HSC0 ang hot ng ch 2, ch s dng I0.0 v I0.2 th I0.1
vn c th c khai thc bi ngt hay HSC3.

Hai b m HSC1 v HSC2 hot ng hon ton c lp vi nhau, c th khai thc

ti a c hai cng mt lc m khng h nh hng ln nhau.

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Ng ra xung tc cao:
S7-200 cho php s dng Q0.0 v Q0.1 nh nhng u ra pht xung tc cao,
dng PTO hoc PWM. Chi tit xem chng 8, sau y l vi nt s lc:
7.8.2

PTO

Xung kiu PTO (Pulse Train

Output) l sng vung, 50%
chu k c gi tr 0, 50% chu
k c gi tr 1. C th nh
ngha s xung pht ra nm
trong khong t 1 xung n
4.294.967.295 xung. Chu k
c th xc nh theo phn gii l us hoc ms vi gi tr t 50us n 65535us
hay t 2 ms n 65535 ms. Lu nn chn chu k l s chn (chu k l c th gy
bin dng sng). S7-200 cn cho php to dy xung PTO vi chu k bin thin
theo qui lut ty bin, iu khin ng c bc chng hn.
7.8.3

PWM

Xung kiu PWM (Pulse Width Modulation)

c chu k c nh v rng xung (thi
gian c gi tr bng 1) thay i. C hai gi
tr ny u c th xc nh theo phn
gii l us hoc ms. Chu k xung c th nm
trong khong t 50us n 65535us hay t
2ms n 65535 ms. rng xung c th nm trong khong t 0us n 65535us
hay t 0ms n 65535 ms. Nu rng xung bng chu k, u ra = 1. Nu rng
xung bng 0, u ra = 0.

7.9. inh chnh tng t (b5)

S7-200 CPU c 1 hoc 2 inh chnh tng t pha trc. Ta c th vn chng theo
chiu kim ng h hay ngc li trong khong 270 ( tng hay gim gi tr tng
ng vi chng l cc byte trong SMB28 v SMB29. Nh vy nhng gi tr ny c
th thay i trong khong t 0 n 255 v chng trnh c th s dng chng nh
nhng gi tr ch c, thay i c theo s can thip t ngoi chng trnh. V d:

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Chng 8 Vng qut

Cc lp trnh vin trn my vi tnh thng quen vi cc loi cu trc chng trnh
nh: chng trnh kiu dng lnh (Assembler, Basic); chng trnh kiu cu trc
(C, Pascal); chng trnh hng i tng (Visual Basic, C, Pascal for Windows).
Cc kiu chng trnh ny thng thng hoc kt thc sau khi thc hin, hoc tip
tc mt cu trc vng lp no ch tng tc vi ngi s dng. Chng trnh
trong PLC cng c th bao gm cc cu trc vng lp nhng khng phi vi mc
ch nh trn. Chng trnh trong PLC nhn chung ging dng chng trnh kiu
dng lnh, cc lnh c thc thi mt cch tun t. Tuy nhin mt chng
trnh trong PLC s c t ng thc hin mt cch tun hon. C mt ln
chng trnh c thc hin gi l mt vng qut (SCAN).
Vng qut khi CPU ch RUN:

Theo hnh v chng ta d dng nhn thy nhng cng on chnh ca mt vng
qut:
u tin l cp nht cc u vo. u mi vng qut, CPU c trng thi
cc u vo vt l (cc u vo ri rc hin hu thc t trn PLC) v ghi vo vng
nh cc u vo. y l mt vng nh, mi bit trong vng ny l nh ca mt
u vo, nh c cp nht trng thi t u vo vt l tng ng chnh trong
cng on ny. V sau trong vng qut, chng trnh hiu cc gi tr u vo l
cc gi tr nh ny, tr nhng lnh truy cp gi tr tc khc (immediate). Lu ,
cc u vo tng t (analog) ch c cp nht nh th nu b lc (filter) tng
ng hot ng. Trong trng hp ngc li, chng trnh s c trc tip t u
vo tng t vt l mi khi truy cp. C th hn v cc u vo ra s c ni n
chng 6.
Tip theo l thc hin chng trnh. thc thi cc lnh trong chng trnh
chnh mt cch tun t t u n cui. Chng trnh x l ngt c thc hin
khng lin quan n vng qut m bt c lc no xy ra s kin ngt lin quan.
Ch nhng lnh vo ra tc khc mi truy cp n cc u vo ra vt l.
Thc hin cc yu cu truyn thng: CPU x l cc thng tin nhn c
trn cng truyn thng.
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CPU t kim tra: CPU t kim tra cc thng s ca mnh, b nh chng

trnh (ch trong ch RUN) v trng thi cc module nu c.
Cui cng l ghi cc u ra: CPU ghi gi tr vng nh cc u ra ra cc
u ra vt l. Vng nh ny c cp nht theo chng trnh trong qu trnh thc
hin chng trnh. Khi CPU chuyn t ch RUN sang ch STOP, cc u ra
c th c gi tr nh trong bng ra, hay gi nguyn gi tr. Thng thng mc
nh l cc u ra tr v 0. Ring cc u ra tng t gi nguyn gi tr c
cp nht sau cng.
Nu c s dng ngt, cc chng trnh x l ngt c lu nh mt phn ca
chng trnh trong b nh. Tuy nhin chng khng c thc hin nh mt phn
ca vng qut bnh thng. Chng c thc hin khi s kin tng ng xy ra,
bt k lc no trong vng qut, theo nguyn tc ngt n trc c x l trc,
tt nhin c tnh n mc u tin ca cc loi ngt khc nhau.
Nh trn nu, trong qu trnh thc hin, chng trnh truy cp n cc u vo
v u ra thng qua vng nh ca chng. Vng nh cc u vo c cp nht t
cc u vo vt l mt ln trong mt vng qut, ngay u vng qut. Vng nh
cc u ra cng cp nht ra cc u ra vt l cui mi vng qut. Nguyn tc ny
m bo s ng b cng nh tnh n nh, cn bng cho h thng; qu trnh thc
hin chng trnh nhanh hn; kh nng linh ng cho php truy nhp cc u vo
ra chung nh tp hp cc bit, byte hay t n, t kp.
Cc lnh vo ra trc tip (tc khc) cho php khai thc trng thi cc u vo vt
l cng nh xut ra cc u ra vt l ngay thi im thc hin lnh, khng ph
thuc v vng qut. Lnh c u vo trc tip khng nh hng g n vng nh
cc u vo. Bit nh u ra c cp nht ng thi vi lnh xut trc tip ra u
ra .
CPU coi cc lnh i vi cc u vo ra tng t nh cc lnh vo ra trc tip, tr
trng hp ngoi l u vo tng t c b lc hot ng.
Vng qut khi CPU ch STOP:

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Chng 9 B nh d liu v cch nh a ch

S7-200 PLC qun l b nh d liu theo tng vng ring bit nhm x l nhanh
hn v hiu qu hn. l cc vng I, Q, V, M, S, SM, L, T, C, HC, AC. Ta s xem
xt tng vng c th phn sau.

9.1. nh a ch trc tip

Trong cc vng c bn I, Q, V, M, S, SM, L ta c th truy cp n tng bit, tng
byte, tng t n (word) hoc tng t kp (double word) da trn a ch c s l
a ch byte.
Cch nh a ch mt bit: trc ht l tn vng (I, Q, V, M, S, SM, L), tip theo l
a ch byte trong vng, cui cng sau du chm l a ch bit trong byte (t 0
n 7).
Mun truy cp n mt byte trong mt vng no , trc ht phi nh vng (I, Q,
V, M, S, SM, L), tip theo l B (c trng cho byte) v a ch byte trong vng. a
ch mt t n hoc mt t kp cng bt u bng tn vng (I, Q, V, M, S, SM, L),
tip theo l W (word) hay D (double word) v sau cng l a ch byte u tin trong
t (byte cao nht). (Xem cc v d pha trn). Tu theo kch thc nh c truy
cp (dung lng chim trong b nh) m con s s dng s b gii hn, v d vi
cc s nguyn:
Ring gii hn
cho s thc
(32
bit),
dng
t
+1.175495e38
n
+3.402823e+3
8, m t 1.175495e-38 n -3.402823e+38.
i vi cc vng thit b (T, C, HC, AC), ta truy cp n bng tn vng v a ch
thit b. Sau y ta xt n tng vng c th:
9.1.1
Vng nh cc u vo I
Nh nu, CPU ly mu cc u vo mi vng qut mt ln v lu gi tr vo
vng nh. Sau chng trnh truy nhp vo vng nh ny, n tng bit, tng
byte, tng t n hoc tng t kp bng cch nh a ch nh tng ng:
Bit

I[byte address].[bit address]

I0.1

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Byte, Word, Double Word

trong :

I[size][starting byte address]

IB4

bit address = t 0 n 7
byte address = t 0 n gii hn bi tng loi CPU c th
size = B vi byte; W vi t n; D vi t kp

9.1.2
Vng nh cc u ra Q
Chng trnh truy xut cc u ra thng qua vng nh cc u ra, vng nh ny
c ghi ra cc u ra vt l mi vng qut mt ln cui vng qut. Chng
trnh truy xut cc u ra c th nh mt bit, mt byte hay mt t n, t kp:
Bit

Q[byte address].[bit address]

Q1.2

Byte, Word, Double Word

Q[size][starting byte address]

QW6

trong :

bit address = t 0 n 7
byte address = t 0 n gii hn bi tng loi CPU c th
size = B vi byte; W vi t n; D vi t kp

9.1.3
Vng nh cc bin V
Vng ny c th c s dng lu cc gi tr trung gian, bit, byte, t n hay t
kp:
Bit

V[byte address].[bit address]

V100.7

Byte, Word, Double Word

V[size][starting byte address]

VD10

trong :

bit address = t 0 n 7
byte address = t 0 n gii hn bi tng loi CPU c th
size = B vi byte; W vi t n; D vi t kp

9.1.4
Vng nh cc bit M
Vng M c tn l vng nh cc bit, thc t chng ta c th s dng y nh vng V
(thng dung lng vng M nh hn):
Bit

M[byte address].[bit address]

M0.3

Byte, Word, Double Word

M[size][starting byte address]

MW4

trong :

bit address = t 0 n 7
byte address = t 0 n gii hn bi tng loi CPU c th
size = B vi byte; W vi t n; D vi t kp

9.1.5
Vng nh cc r le iu khin tun t S
Vng ny thng c s dng iu khin qu trnh thc hin cc cng
on chng trnh, cch truy cp ging nh cc vng V v M:
Bit

S[byte address].[bit address]

S0.0

Byte, Word, Double Word

S[size][starting byte address]

SB4

trong :

bit address = t 0 n 7
byte address = t 0 n gii hn bi tng loi CPU c th
size = B vi byte; W vi t n; D vi t kp

9.1.6
Vng cc bit c bit SM
Mi nh trong vng SM (bit, byte, t n, t kp) u c mt ngha g i
vi h thng. Khi c trng thi nh t vng SM, ta bit thng tin v PLC v khi
ghi d liu vo , ta c th thay i tham s, cu hnh ca PLC. C th hn xem
ph lc (Appendix C). Tuy gi l cc bit c bit nhng ta c th truy nhp nh bit,
c nh byte, t n hay t kp:
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Bit

SM[byte address].[bit address]

SM0.1

Byte, Word, Double Word

SM[size][starting byte address]

SMB86

trong :

bit address = t 0 n 7
byte address = t 0 n gii hn bi tng loi CPU c th
size = B vi byte; W vi t n; D vi t kp

9.1.7
Vng nh cc b L
V mt s dng, vng L ging ht vng V nhng ch c dung lng 64 byte. Ch
trong LAD v FBD, 04 byte cui c dnh cho mc ch ring nn ch cn 60 byte
cho chng trnh. Trong STL c th s dng c 64 byte nhng cng c khuyn
co khng nn s dng 04 byte cui.
Khc nhau c bn gia vng L v vng V rt quan trng: trong khi cc vng c
nu n thi im ny u c gi tr ton cc th vng L ch c gi tr cc b (local).
iu c ngha l chng trnh chnh c 64 byte vng nh L ring ca mnh, mi
chng trnh con cng c ring mt vng L vi dung lng 64 byte v mi chng
trnh x l ngt cng vy. Ni dung bit nh L3.1 trong chng trnh chnh chng c
g chung vi bit nh L3.1 trong chng trnh con s 1. Chng trnh con khng th
truy cp vng L ca chng trnh chnh v ngc li.
Vng L c gi tr ngu nhin khi cha c ghi vo, v vy phi cn thn lc s
dng. C th s dng nh trong vng L lm thanh tr cha cc a ch gin tip
nhng khng th truy nhp vng L mt cch gin tip.
Cch truy nhp vng L ging truy nhp vng V:
Bit

L[byte address].[bit address]

L0.0

Byte, Word, Double Word

L[size][starting byte address]

LB33

trong :

bit address = t 0 n 7
byte address = t 0 n gii hn bi tng loi CPU c th
size = B vi byte; W vi t n; D vi t kp

9.1.8
Vng cc b nh thi T
Cc b nh thi (timers) c coi l nhng thit b m thi gian. S7-200 c 03
loi timer vi phn gii khc nhau: 1ms, 10 ms v 100ms
Thi gian m c = s ang m * phn gii.
Mi timer c xc nh c nh mt phn gii no trong 03 loi ni trn,
cch nh a ch rt n gin:
T[timer number]
trong :

V d: T24

timer number = t 0 n gii hn bi tng loi CPU c th

Mt a ch nh th c th ch mt gi tr 16 bit c du l gi tr m timer ang

m; hoc ch bit trng thi ca timer. Chng trnh t phn bit iu ny bng
tng lnh c th: lnh c ton hng kiu t n s hiu l a ch gi tr timer,
ngc li lnh c ton hng kiu bit s coi l a ch bit trng thi. Xem cc v
d sau:

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9.1.9
Vng cc b m C
Cc b m trong S7-200 m s thay i u vo ca chng t mc thp ln
mc cao. Chng c th m ln (tin), m xung (li) hoc c m tin ln m
li. Cch nh a ch mt b m (counter):
C[counter number]
trong :

V d: C20

counter number = t 0 n gii hn bi tng loi CPU c th.

Mt a ch nh th c th ch mt gi tr 16 bit c du l gi tr m counter ang

m; hoc ch bit trng thi ca counter. Chng trnh t phn bit iu ny bng
tng lnh c th: lnh c ton hng kiu t n s hiu l a ch gi tr counter,
ngc li lnh c ton hng kiu bit s coi l a ch bit trng thi.
9.1.10
Vng cc u vo tng t AI
S7-200 chuyn cc gi tr tng t thnh nhng gi tr s 16 bit nn vng ny ch
c truy nhp n nh nhng t n:
AIW[starting byte address]

V d: AIW4

trong :
starting byte address = t 0 n gii hn bi tng loi CPU c th nhng lun lun
l s chn (0, 2, 4, 6, . . .).

Ch y l cc gi tr ch c (khng ghi vo c).

9.1.11
Vng cc u ra tng t AQ
S7-200 chuyn nhng gi tr s 16 bit thnh cc gi tr ra tng t nn vng ny
cng ch c truy nhp n nh nhng t n:
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AQW[starting byte address]

V d: AQW4

trong :
starting byte address = t 0 n gii hn bi tng loi CPU c th nhng lun lun
l s chn (0, 2, 4, 6, . . .).

Ch y l cc gi tr ch ghi (khng c ngha c t ).

9.1.12
Cc accumulator AC
S7-200 bao gm 04 accumulator dung lng 32 bit: AC0, AC1, AC2 v AC3. Tuy
nhin c th dng accumulator cha d liu byte, t n hoc t kp. Chng
trnh t phn bit iu ny bng lnh c th (i hi ton hng l kiu byte, t n
hay t kp) nh cc v d sau:

Cc accumulator c s dng nh nhng thanh ghi (registers) c / ghi a nng.

9.1.13
Cc b m tc cao HC
B m tc cao trong S7-200 dng m nhng u vo thay i nhanh (tn
s cao) c lp vi vng qut. a ch b m tc cao ch n gi tr 32 bit c
du l con s b m ang m:
HC[high- speed counter number]
trong :

V d: HC1

high-speed counter number = t 0 n gii hn bi tng loi CPU c th (1,2 hoc

3).

Con s ny l gi tr ch c, lun lun 32 bit.

9.1.14
Cc hng s
Nhiu lnh trong S7-200 c th s dng cc hng s di cc dng khc nhau,
CPU lun lu bng dng nh phn. S7-200 CPU khng lu gi dng d liu, v d
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nguyen ba hoi

lnh ADD_I lun hiu gi tr lu vo VW100 l s nguyn 16 bit c du trong khi

lnh WOR_W li hiu ng gi tr trong VW100 l s nguyn 16 bit khng du.
Sau y l mt vi v d v cc kiu hng s:
Decimal constant:
20047
Hexadecimal constant:
16#4E4F
ASCII constant:
Text goes between single quotes.
Real or floating-point format: +1.175495E-38
(positive)
-1.175495E-38
(negative)
Binary format:
2#1010_0101_1010_0101

9.2. nh a ch gin tip

S7-200 cho php truy nhp cc nh trong cc vng I, Q, V, M, S, T (ch gi tr 16
bit), C (ch gi tr 16 bit) mt cch gin tip, ngha l dng mt nh khc lm
thanh tr tr n nh ny. Lu khng th truy cp mt bit bng cch gin tip.
Trong S7-200, thanh tr ch c th l mt nh 32 bit (t kp) trong mt trong
nhng vng V, L hay AC (tr AC0). Ta c th to thanh tr bng lnh MOVD vi
ton t & v s dng thanh tr bng ton t *. V d:
Chng ta c
th s dng
cc lnh s
hc n gin
nh cng hoc
tng 1 dnh
cho t kp
(ADD_D hoc INC_D) thay i gi tr thanh tr. Tuy nhin phi c bit ch
n kch c d liu m thanh tr tr n:
Nu mt thanh tr ang tr n mt byte, n c th tr n byte k tip bng cch
tng gi tr n ln 01 n v.
Nu mt thanh tr ang tr n mt t n, n c th tr n t n k tip bng
cch tng gi tr n ln 02 n v.
Nu mt thanh tr ang tr n mt t kp, n c th tr n t kp k tip bng
cch tng gi tr n ln 04 n v.
V d:

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9.3. Khng gian a ch cc vng nh

a ch vng nh i vi cc CPU h 22X (h CPU hin ti)
Kh nng
truy cp
Bit (Byte.bit)

Byte

Word

Double Word

Vng nh

CPU221

CPU222

CPU 226 &

CPU224

CPU226XM

0.0 - 2047.7

0.0 - 2047.7

0.0 - 5119.7

0.0 - 10239.7

0.0 - 15.7

0.0 - 15.7

0.0 - 15.7

0.0 - 15.7

0.0 - 15.7

0.0 - 15.7

0.0 - 15.7

0.0 - 15.7

0.0 - 31.7

0.0 - 31.7

0.0 - 31.7

0.0 - 31.7

SM

0.0 - 179.7

0.0 - 299.7

0.0 - 549.7

0.0 - 549.7

0.0 - 31.7

0.0 - 31.7

0.0 - 31.7

0.0 - 31.7

0 - 255

0 - 255

0 - 255

0 - 255

0 - 255

0 - 255

0 - 255

0 - 255
0.0 - 59.7

0.0 - 59.7

0.0 - 59.7

0.0 - 59.7

VB

0 - 2047

0 - 2047

0 - 5119

0 - 10239

IB

0 - 15

0 - 15

0 - 15

0 - 15

QB

0 - 15

0 - 15

0 - 15

0 - 15

MB

0 - 31

0 - 31

0 - 31

0 - 31

SMB

0 - 179

0 - 299

0 -549

0 - 549

SB

0 - 31

0 - 31

0- 31

0 - 31

LB

0 - 59

0 - 59

0 - 59

0 - 59

AC

0-3

0-3

0-3

03

VW

0 - 2046

0 - 2046

0 - 5118

0 - 10238

IW

0 - 14

0 - 14

0 - 14

0 - 14

QW

0 - 14

0 - 14

0 - 14

0 - 14

MW

0 - 30

0 - 30

0 - 30

0 - 30

SMW

0 - 178

0 - 298

0 - 548

0 - 548

SW

0 - 30

0 - 30

0 - 30

0 - 30

0 - 255

0 - 255

0 - 255

0 - 255

0 - 255

0 - 255

0 - 255

0 - 255

LW

0 - 58

0 - 58

0 - 58

0 - 58

AC

0-3

0-3

0-3

0-3

AIW

0 - 30

0 - 30

0 - 62

0 - 62

AQW

0 62

0 - 30

0 - 30

0 - 62

VD

0 - 2044

0 - 2044

0 - 5116

0 - 10236

ID

0 - 12

0 - 12

0 - 12

0 - 12

QD

0 - 12

0 - 12

0 - 12

0 - 12

MD

0 - 28

0 - 28

0 - 28

0 - 28

SMD

0 - 176

0 - 296

0 - 546

0 - 546

SD

0 - 28

0 - 28

0 - 28

0 - 28

LD

0 - 56

0 - 56

0 - 56

0 - 56

AC

0-3

0-3

0-3

0-3

HC

0-5

0-5

0-5

05

a ch vng nh i vi cc CPU h 21X (h CPU c)

Kh nng
truy cp
Bit (Byte.bit)

Vng nh

CPU 210

CPU 212

CPU 214

CPU 215

CPU 216

0.0 - 1023.7

0.0 - 4095.7

0.0 - 5119.7 0.0 - 5119.7

0.0 - 0.3

0.0 - 7.7

0.0 - 7.7

0.0 - 7.7

0.0 - 7.7

0.0 - 0.3

0.0 - 7.7

0.0 - 7.7

0.0 - 7.7

0.0 - 7.7

0.0 - 5.7

0.0 - 15.7

0.0 - 31.7

0.0 - 31.7

0.0 - 31.7

SM

0.0 - 1.7

0.0 - 45.7

0.0 - 94.7

0.0 - 194.7

0.0 - 194.7

0 - 63

0 - 127

0 - 255

0 - 255

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54

Byte

Word

Double Word

0 - 63

0 - 127

0 - 255

nguyen ba hoi
0 - 255

0.0 - 7.7

0.0 - 15.7

0.0 - 31.7

0.0 - 31.7

VB

0 - 1023

0 - 4095

0 - 5119

0 - 5119

IB

0-7

0-7

0-7

0-7

QB

0-7

0-7

0-7

0-7

MB

0 - 15

0 - 31

0 - 31

0 - 31

SMB

0 - 45

0 - 94

0 - 194

0 - 194

AC

0-3

0-3

0-3

0-3

SB

0-7

0 - 15

0 - 31

0 31

VW

0 - 1022

0 - 4094

0 - 5118

0 - 5118

IW

0-6

0-6

0-6

0-6

QW

0-6

0-6

0-6

0-6

0 - 30

0 - 30

MW

0-4

0 - 14

0 - 30

SMW

0-2

0 - 44

0 - 93

0 - 193

0 - 193

0-3

0 - 63

0 - 127

0 - 255

0 - 255

0-3

0 - 63

0 - 127

0 - 255

0 - 255

AC

0-3

0-3

0-3

0-3

AIW

0 - 30

0 - 30

0 - 30

0 - 30

AQW

0 - 30

0 - 30

0 - 30

0 - 30

SW

0-6

0 - 14

0 - 30

0 30

VD

0 - 1020

0 - 4092

0 - 5116

0 - 5116

ID

0-4

0-4

0-4

0-4

QD

0-4

0-4

0-4

0-4

MD

0 - 12

0 - 28

0 - 28

0 - 28

SMD

0 - 42

0 - 91

0 - 191

0 - 191

AC

0-3

HC

0-3
0-2

0-3
0-2

0-3
02

9.4. Bo ton d liu

S7-200 cung cp nhiu kh nng cho php lu gi chng trnh, d liu cng nh
cu hnh h thng trong nhng trng hp mt ngun cung cp:
CPU c b nh kiu EEPROM lu ton b chng trnh, cu hnh v phn d
liu quan trng nht.
B nh RAM c trang b super capacitor c th gi nguyn vn thng tin mt
thi gian di sau khi mt ngun nui. Tu loi CPU, thi gian c th ko di
vi ngy.
Super Capacitor 72h:

Ta c th chn gn thm cartridge cha pin ko di thi gian ni trn. Pin s

gi d liu trong RAM sau khi super capacitor cn.
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56

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Chng 10 Timer v Counter

10.1. Cc loi timer (b3)

Mch timer dy ni

10.2. TON (b3)

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57

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Bi thc hnh: n nhp nhy t ng

10.3. TONR (b4)

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10.4. TOFF (b4)

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10.5. Bi tp Timer (b4)

Cc bi thc hnh lin quan: iu
khin n nhp nhy, bm nh
lng, iu khin h thng ATS,
n giao thng, bng ti, trn phi
liu, ha cht, thang nng hng,
ATS.

10.6. Ch khi dng Timer

vi phn gii khc nhau
(b4)
Xem gio trnh tp lnh.

10.7. Counter (b5)

10.8. Counter tc cao (b5)

6 b m tc cao vi CPU224: HSC0 HSC5.

Cc v d:
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61

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Chng 11 Gii bi ton c cu trc

11.1. GBT bng gin thi gian (Timing diagram)
Cc bi ton handicap door, pulse.

11.2. GBT bng lu (flowchart) v cc bit tun t (sequence

bits)
Ch gii cc dng k hiu khi xy dng lu .
Cc bi ton tank filler, garage door controller.

11.3. GBT bng s trng thi (state diagram)

Cc bi ton garage door controller, coffee machine, traffic light controller.

11.4. Cc lnh cn li trong tp lnh

Xem gio trnh tp lnh.

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Chng 12 Ngt
3 ngun to ngt:
Ngt truyn thng
Ngt I/O
Ngt thi gian
Cc lnh cho php ngt ton cc (ENI), cm ngt ton cc
(DISI), nh km (ATCH), gii nh km (DTCH), lnh quay
v t CT con ngt (RETI)

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64

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Chng 13 PID, Freeport

13.1. PID
Xem chi tit trong gio trnh tp lnh.

13.2. Freeport
Cc
cu
lnh
Transmit (XMT) v
Receive (RCV) cho
php giao tip vi cc
thit b bn ngoi nh
my in, modem, my
tnh thng qua cng
truyn thng.

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Chng 14 Cc phng thc truyn thng

Truyn thng l phn kh phc tp trong vic lm ch PLC. iu quan trng l
chng ta phi nm r cc kiu cu trc mng khc nhau ca cc PLC, cc phng
thc truyn thng c s dng v lm ch tt c cc thnh phn cu thnh nn
mng. Chng ta khng i su vo chi tit trong ti liu ny m ch im qua nhng
nt chnh.
Trc ht, ta phn bit mt s m hnh mng:

Mng n ch (Single Master)

Mng a ch (Multiple Master)

S dng Modem 10 bit ni 01 ch vi 01 PLC S7-200 hot ng nh trm

(Slave)

S dng Modem 11 bit trong mng n ch

V d v cu hnh mng:

Trong nhng thnh phn tham gia mng, cc CPU c th hot ng nh ch hoc
nh trm; TD 200 l thit b ch; thit b lp trnh hoc my vi tnh ci STEP 7 cng
l thit b ch. Phn mm STEP 7 - Micro / Win 32 c thit k ch kt ni c
vi mt CPU S7-200 ti mt thi im, tuy nhin n c th kt ni ti bt c CPU
no trong mng.
Cc phng thc truyn thng chnh:

im i im: Point-to-Point Interface (PPI)

a im: Multipoint Interface (MPI)

PROFIBUS (Process Field Bus)

Cc phng thc ny u t c s trn cu trc OSI (Open System

Interconnection) 7 lp. Cc phng thc PPI v MPI cng s dng nguyn l
mch hi vng (Token ring), ph hp vi chun PROFIBUS c qui nh trong
b chun chu u EN 50170.
Nhng phng thc trn u l bt ng b, n v c s l k t vi 01 start bit,
08 data bit, even parity v 01 stop bit. Khung d liu bao gm nhng k t c bit
m u v kt thc, a ch ngun (ni gi) v ch (ni n), di d liu v
checksum. C ba phng thc c th cng hot ng chung trn mt mng, ch
cn iu kin cng tc truyn (baud rate).
Mng theo chun PROFIBUS s dng ng truyn l nhng cp dy xon theo
chun RS-485. Chun ng truyn ny cho php ni ti 32 thit b trn mt b
phn (segment). Khong cch gia hai im xa nht trong mt b phn nh vy,
ty theo tc ng truyn s dng, c th ln n 1200 m. Cc b phn li c
th ni vi nhau qua nhng repeater tng s thit b trong mng cng nh
khong cch hot ng cho n 9600 m ty theo tc truyn.
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Cc phng thc ny phn bit 02 loi thit b: ch v t (trm). Thit b ch c th

gi yu cu ln mng trong khi trm ch tr li, khng bao gi t gi thng tin ln
mng.
S a ch ti a l 127 (0 n 126) vi nhiu nht l 32 thit b ch. Mi thit b
trn mng phi c a ch khc nhau. Mc nh, thit b lp trnh (hay PC) c
nh a ch 0, cc thit b giao din nh TD 200, OP3, OP7, ... c a ch l 1 cn
PLC c nh a ch mc nh l 2.

14.1. PPI
PPI l phng thc ch / t. Cc thit b ch (CPU, thit b lp trnh, TD 200) gi
yu cu n cc trm v cc trm tr li. Cc trm khng bao gi t gi thng tin
ln mng m ch ch nhn cc yu cu ca cc thit b ch tr li. Tt c cc
CPU S7-200 u c th hot ng nh trm trong mng.
Mt s CPU c th hot ng nh thit b ch trong mng khi ch RUN, nu
chng trnh bt ch PPI master (vi SMB30). Mt khi trong ch ny, ta c
th c hay vit vo mt CPU khc bng cc lnh NETR v NETW. Trong khi
CPU vn tr li cc thit b ch khc nh mt trm thng thng. PPI khng hn
ch s thit b ch c php ni vi mt trm, tuy nhin nh trn nu, s thit
b ch ti a trong mt mng l 32.

14.2. MPI
MPI c th l phng thc ch / t hay ch / ch. Cch thc hot ng ph thuc
vo loi thit b. Chng hn nu thit b ch l CPU S7-300 th MPI t ng tr
thnh ch / ch bi v cc CPU S7-300 l cc thit b ch trong mng. Nhng nu
ch l CPU S7-200 th MPI li l ch / t v cc CPU S7-200 lc c coi nh
l trm.
Khi hai thit b trong mng kt ni vi nhau bng phng thc MPI, chng to nn
mt lin kt ring, khng thit b ch no khc c th can thip vo lin kt ny.
Thit b ch trong hai thit b kt ni thng gi mi lin kt trong mt khong
thi gian ngn hoc hy lin kt v thi hn (gii phng ng truyn).
Nhng lin kt nh trn i hi mt ti nguyn nht nh trong CPU nn mi CPU
ch c th h tr mt s lng hu hn cc lin kt nh vy. Thng thng mt
CPU cho php 04 lin kt, 02 trong mt dnh ring cho thit b lp trnh hay PC,
mt dnh cho giao din. iu ny cho php lc no cng c th kt ni t nht mt
thit b lp trnh hoc PC, mt giao din vi CPU. Nhng thit b ch khc (nh cc
CPU khc chng hn) khng th kt ni qua cc lin kt dnh ring ny.
Cc CPU S7-300 v S7-400 c th kt ni vi cc CPU S7-200 bng mt trong hai
lin kt cn li ca CPU S7-200 v c hay ghi d liu vo CPU S7-200 vi cc
lnh XGET v XPUT.

14.3. PROFIBUS
Phng thc PROFIBUS c thit k cho vic truyn thng tc cao vi cc
thit b phn phi vo ra, thng cng c gi l cc u vo ra t xa (remote
I/O). Nhng thit b nh vy c nhiu nh sn xut cung cp, t cc module vo
ra n gin n cc b iu khin m t v cc PLC.
Mng PROFIBUS thng bao gm mt thit b ch v nhiu trm vo ra. Thit b
ch c t cu hnh nhn bit loi cng nh a ch ca cc trm ni vo n.
Sau n s t kim tra cc trm theo cu hnh c t. Thit b ch ghi vo cc
trm v c d liu t mt cch lin tc. Ni chung mi thit b ch thng lm
ch cc trm ca mnh, cc thit b ch khc trn mng (nu c) ch c th truy cp
rt hn ch vo cc trm khng phi ca chng.
Phng thc nh ngha bi ngi s dng (FreePort)
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Phng thc ny cho php ngi lp trnh lm ch vic truyn thng, thc t l
nh ngha phng thc truyn thng ring, c th kt ni ti nhiu loi thit b
thng minh khc.
Chng trnh kim sot cng truyn thng trong phng thc ny thng qua cc
ngt nhn, ngt gi, lnh nhn (RCV) v lnh gi (XMT). Cch thc truyn thng
hon ton do chng trnh lm ch. Phng thc ny c iu khin vi byte
SMB30 (dnh cho cng 0) v ch hot ng trong ch RUN. Khi CPU chuyn
sang ch STOP, phng thc ny b hy v cng truyn thng tr v phng
thc bnh thng PPI.
Cu hnh phn cng ca mng:
Do phn ny nng v tnh k thut v i hi tnh chnh xc trong tng trng hp
c th nn chng ta s khng ni n k trong ti liu ny. S lc nh ta bit,
ng dy truyn tun theo chun RS 485, bn cht l cp dy xon:
General Features

Specification

Type

Shielded, twisted pair

Conductor cross section

24 AWG (0.22 mm 2 ) or larger

Cable capacitance

< 60 pF/m

Nominal impedance

100 ohm to 120 ohm

Cch u ni nh nhng mng s dng Token ring (mch hi vng) thng thng:

Khong cch truyn ti a gii hn ty theo tc truyn:

Transmission Rate

Maximum Cable Length of a Segment

9.6 kbaud to 19.2 kbaud

1,200 m (3,936 ft.)

187.5 kbaud

1,000 m (3,280 ft.)

C th dng b lp tng khong cch cng nh s thit b:

Cng truyn thng trn CPU S7-200:

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Kt ni PC vi mng RS 485:
y chng ta khng i su
vo cch thit lp thng s
cho cp PC/PPI cng nh
cc card CP hay MPI hot
ng. Chng ta ch ni thm
mt cht v cp PC/PPI v
n c s dng kh thng
dng m chng ta nhc
n trong phn u ca ti liu ny (chng 3). y l cp chuyn i gia hai
chun RS 485 v RS 232. Nu ni vi my vi tnh, u RS 232 c cm vo
cng COM, ch vi loi cp c DIP switch 05 v tr th phi chn DCE (Data
Control Equipment). Cp ny cn c s dng ni vi Modem, cng c giao
tip RS 232 nhng l DTE (Data Terminal Equipment) nh cc minh ha sau:

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