BI 6

GII THIU KHO ST ADC S KHI ADC KHO ST CC THANH GHI KHI ADC TRNH T THC HIN CHUYN I ADC TP LNH C CHO ADC Lnh SETUP_ADC(mode) Lnh SETUP_AD_PORT(value) Lnh SET_ADC_CHANNEL(chan) Lnh VALUE=READ_ADC(mode) CC CHNG TRNH NG DNG ADC

ai hoc s pham ky thuat tp HCM

Khoa ien ien t

Nguyen nh Phu

I.

GII THIU

Vi iu khin PIC h 16F877A c b chuyn i tn hiu tng t sang tn hiu s ADC 10 bit a hp 8 knh. H 16F887 c 14 knh. Mch ADC dng cho cc ng dng giao tip vi tn hiu tng t t cc cm bin nh cm bin nhit LM35, cm bin p sut, cm bin m, Phn ny s kho st chi tit khi ADC ca PIC v tp lnh lp trnh C cho ADC . II. KHO ST ADC 1. S KHI ADC ADC ca PIC16F877A c s khi nh hnh 6-1:

Hnh 6-1: S khi ca ADC PIC 16F877A. ADC c 8 knh vo c tn t AN0 n AN7 (analog) a hp vi cc chn ca port A v port E. ADC c 8 knh nhng mi thi im ch chuyn i 1 knh v chuyn i knh no th ph thuc vo 3 bit chn knh CHS2:CHS0. Hai ng vo in p tham chiu dng v m c th lp trnh ni vi ngun VDD v VSS hoc nhn in p tham chiu t bn ngoi qua 2 chn RA3 v RA2. Khi ADC c lp vi CPU nn c th hot ng khi CPU ang ch ng do xung cung cp cho ADC ly t dao ng RC bn trong ca khi ADC. 2. KHO ST CC THANH GHI KHI ADC Khi ADC c 4 thanh ghi: Thanh ghi lu kt qu byte cao: ADRESH (A/D Result High Register) Thanh ghi lu kt qu byte thp: ADRESL (A/D Result Low Register) Thanh ghi iu khin ADC th 0: ADCON0 (A/D Control Register 0) Thanh ghi iu khin ADC th 1: ADCON1 (A/D Control Register 1)
86 Bai 6: ADC cua PIC va lap trnh C.

ai hoc s pham ky thuat tp HCM

Khoa ien ien t

Nguyen nh Phu

a.

Thanh ghi ADCON0 cha cc bit iu khin hot ng khi ADC nh sau

Bit 7-6 ADCS1:ADCS0: cc bit la chn xung chuyn i AD (A/D Conversion Clock Select bits)

Bit 5-3 CHS2:CHS0: cc bit la chn knh tng t (Analog Channel Select bits) 000 = knh 0 (AN0) 001 = knh 1 (AN1) 010 = knh 2 (AN2) 011 = knh 3 (AN3) 100 = knh 4 (AN4) 101 = knh 5 (AN5) 110 = knh 6 (AN6) 111 = knh 7 (AN7) Bit 2 GO/ DONE : bit bo trng thi chuyn i ADC (A/D Conversion status bit) Khi ADON = 1: 1 = chuyn i ADC ang din ra (phi set bit ny ln mc 1 bt u qu trnh chuyn i v ADC t ng xo bit ny v 0 bo qu trnh chuyn i kt thc). 0 = chuyn i xong. Cha dng nu c l 0. ADON: bit m ngun cho ADC hot ng (A/D ON bit): 1= m ngun khi chuyn i ADC hot ng. 0= tt ngun khi chuyn i ADC gim cng sut tiu th.

Bit 1 Bit 0

b.

Thanh ghi ADCON1 thit lp cc chn ca port l tng t hoc xut nhp s IO.

ADFM: bit la chn nh dng kt qu ADC (A/D Result Format Select bis): 1= canh l phi, 6 bit MSB ca ADRESH c gi tr l 0. 0= canh l tri, 6 bit LSB ca ADRESL c gi tr l 0. Bit 6 ADCS2: bit la chn xung clock (A/D Conversion Select bit): nu trn. Bit 5-4: cha dng nu c s c gi tr l 0 Bit 7
Bai 6: ADC cua PIC va lap trnh C. 87

ai hoc s pham ky thuat tp HCM

Khoa ien ien t

Nguyen nh Phu

Bit 3-0: PCFG3:PCFG0: bit iu khin nh cu hnh port (A/D Port Configuration Control bits)

Gii thch bng nh cu hnh cho cc port: Hng th 1: 4 bit nh cu hnh bng 0000: th ADC s dng c 8 knh tng t, ngun in p tham chiu dng ni vi VDD, ngun in p tham chiu m ni vi VSS. Ct cui cng l h s knh tng t vi h s chn ngun tham chiu bn ngoi - trng hp ny l 8/0 c ngha l 8 knh tng t v khng s dng ngun tham chiu bn ngoi. Hng th 15: 4 bit nh cu hnh bng 1111: th ADC s dng 1 knh tng t, ngun in p tham chiu dng ni vi bn ngoi qua chn AN3, ngun in p tham chiu m ni vi bn ngoi qua chn AN2. Cc port cn li l s (Digital). c. Thanh ghi ADRESH v ADRESL Cp thanh ghi 16 bit ADRESH:ADRESL dng lu kt qu chuyn i 10 bit ca ADC sau khi chuyn i xong. Do kt qu ch c 10 bit nhng lu trong cp thanh ghi 16 bit nn c 2 kiu nh dng tu thuc vo bit ADFM (ADC Format). Hnh sau trnh by 2 kiu nh dng ca cp thanh ghi kt qu:

88

Bai 6: ADC cua PIC va lap trnh C.

ai hoc s pham ky thuat tp HCM

Khoa ien ien t

Nguyen nh Phu

Hnh 6-2: nh dng cp thanh ghi lu kt qu. 3. TRNH T THC HIN CHUYN I ADC thc hin chuyn i ADC th phi thc hin cc bc sau: Bc 1: Thit lp cu hnh ADC: nh cu hnh cho cc chn tng t/in p chun v xut/nhp s (ADCON1). Chn knh ng vo ADC (ADCON0). Chn xung clock cho chuyn i ADC (ADCON0). M ngun cho ADC (ADCON0) Bc 2: Thit lp cu hnh ngt ADC nu s dng: Xa c bo ngt ADIF. Lm bit ADIE ln 1 cho php ADC ngt. Lm bit PEIE ln 1 cho php ngt ngoi vi. Lm bit GIE ln 1 cho php ngt ton cc. Bc 3: Ch ht thi gian n nh theo yu cu. Bc 4: Bt u chuyn i bng cch cho bit GO/ DONE ln 1 Bc 5: kim tra chuyn i ADC kt thc bng cch: Kim tra lin tc bit GO/ DONE v 0 hay cha (nu khng dng ngt). Nu dng ngt th ch ngt ADC xy ra. Bc 6: c cp thanh ghi kt qu (ADRESH:ADRESL), xa bit ADIF nu dng ngt. Bc 7: Thc hin chuyn i k tip. Thi gian chuyn i cho 1 bit l TAD. 4. LA CHN NGUN XUNG CHO CHUYN I ADC

Thi gian chuyn i ADC cho mi bit c xc nh l TAD. Chuyn i ADC s dng ti thiu 12 TAD chuyn i cho 10 bit. Ngun xung cp cho ADC c la chn bng phn mm. By kh nng la chn cho TAD l: 2 TOSC 4 TOSC 8 TOSC 16 TOSC 32 TOSC 64 TOSC B dao ng RC bn trong khi ADC. chuyn i ADC chnh xc th xung c chn c thi gian nh nht TAD = 1,6s. Bng sau trnh by thi gian TAD c tnh ton t cc tn s hot ng ca vi iu khin PIC v la chn h s chia.

Khi PIC s dng tn s dao ng l 1.25MHz th ba bit chn h s chia tn s cho ADC l 000 - tn s cp cho ADC bng FOSC/2 - bng 625 KHz, chu k bng 1.6s v khi TAD = 1.6 s. Ngn gn hn l khi PIC s dng tn s 1.25MHz th chu k l 0.8s, chuyn i ADC cn 2 chu k TOSC bng 1.6s.
Bai 6: ADC cua PIC va lap trnh C. 89

ai hoc s pham ky thuat tp HCM

Khoa ien ien t

Nguyen nh Phu

III.

TP LNH C CHO ADC Cc lnh ca ngn ng lp trnh C lin quan n ADC bao gm: Lnh SETUP_ADC(MODE) Lnh SETUP_ADC_PORT(VALUE) Lnh SET_ADC_CHANNEL(CHAN) Lnh VALUE=READ_ADC(MODE)

1.

LNH SETUP_ADC(MODE) - LNH NH CU HNH CHO ADC

C php: Thng s:

setup_adc (mode); mode- Analog to digital mode. Xem trong file device. Mt vi thng s chn kiu: ADC_OFF :tt ADC khng dng ADC_CLOCK_INTERNAL :dng xung clock bn trong khng chia ADC_CLOCK_DIV_32 :dng xung clock ni chia cho 32 Chc nng: nh cu hnh cho ADC C hiu lc: Cho cc PIC c tch hp ADC. Yu cu: Cc hng s nh ngha trong file devices.h V d: setup_adc_ports( ALL_ANALOG ); setup_adc(ADC_CLOCK_INTERNAL ); 2. LNH SETUP_ADC_PORT(VALUE) - LNH NH CU HNH CHO PORT setup_adc_ports (value) value - l hng s nh ngha trong file devices .h Thit lp chn ca ADC l tng t, s hoc t hp c 2. Xem file device c cc la chn chnh xc. Hng s ALL_ANALOG v NO_ANALOGS c tc dng cho tt c cc chip. Vi v d: ANALOG_RA3_REF - tt c l analog v RA3 l in tham chiu bn ngoi RA0_RA1_RA3_ANALOG - ch RA0, RA1 v RA3 l analog Chc nng ny c hiu lc cho cc PIC c ADC. Hng s nh ngha trong devices .h setup_adc_ports( ALL_ANALOG ); // tt c l analog setup_adc_ports( RA0_RA1_RA3_ANALOG ); setup_adc_ports( A0_RA1_ANALOGRA3_REF );

C php: Hng s: Chc nng:

Hiu lc: Yu cu: V d:

3.

LNH SET_ADC_CHANNEL(chan) - LNH CHN KNH ADC set_adc_channel (chan) - chn knh cn chuyn i khi o nhiu hn 1 knh, nu ch o 1 knh th khng cn. chan l th t knh cn chuyn i. Knh bt u t s 0. Ch nh knh thc hin chuyn i ADC Phi ch 1 khong thi gian ngn khi chuyn knh trc khi tin hnh c kt qu chuyn i, thi gian ch ph thuc vo tng tr ca knh ng vo, thng th thi gian ch khong 10s. C hiu lc cho cc PIC c ADC. SET_ADC_CHANNEL(2); DELAY_US(10); VALUE = READ_ADC();

C php: Thng s: Chc nng:

Hiu lc: V d:

4.
90

LNH value=READ_ADC(mode) - LNH C KT QU CHUYN I ADC

Bai 6: ADC cua PIC va lap trnh C.

ai hoc s pham ky thuat tp HCM

Khoa ien ien t

Nguyen nh Phu

value = read_adc ([mode]) - c kt qu sau khi chuyn i xong mode l 1 trong cc hng s sau: ADC_START_AND_READ (thc hin c lin tc, mc nhin l mode ny) ADC_START_ONLY (bt u chuyn i v c kt qu) ADC_READ_ONLY (c kt qu ca ln chuyn i sau cng) Tr v: Kt qu 8 bit hay 16 bit ty thuc v khai bo #DEVICE ADC= directive. Chc nng: Lnh ny s c gi tr s sau khi chuyn i xong Khai bo #DEVICE ADC= directive nh sau: #DEVICE 8 bit 10 bit 11 bit 16 bit ADC=8 00-FF 00-FF 00-FF 00-FF ADC=10 x 0-3FF x x ADC=11 x x 0-7FF x ADC=16 0-FF00 0-FFC0 0-FFEO 0-FFFF Ch : x khng xc nh C php: Hng s: Hiu lc: V d: Cho cc PIC c ADC. setup_adc( ADC_CLOCK_INTERNAL ); setup_adc_ports( ALL_ANALOG ); set_adc_channel(1); while ( input(PIN_B0) ) { delay_ms( 5000 ); value = read_adc(); printf("A/D value = %2x\n\r", value); } read_adc(ADC_START_ONLY); sleep(); value=read_adc(ADC_READ_ONLY);

IV. CC CHNG TRNH NG DNG ADC 1. NG DNG O NHIT HIN TH LED 7 ON QUT BI 6-1. O NHIT S DNG PIC 16F877A - KNH TH 0 HIN TH KT QU O TRN 3 LED 7 ON QUT. S DNG NGUN IN P THAM CHIU VREF+=VDD=5V, VREF=VSS=0V S MCH

Bai 6: ADC cua PIC va lap trnh C.

91

ai hoc s pham ky thuat tp HCM

Khoa ien ien t

Nguyen nh Phu

Hnh 6-3. Mch o nhit hin th led 7 on. CHNG TRNH IU KHIN #INCLUDE <16F877A.H> #DEVICE ADC=10 // KHAI BAO ADC 10 BIT, MAC NHIEN LA 8 BIT #FUSES NOWDT,PUT,HS,NOPROTECT,NOLVP #USE DELAY(CLOCK=20000000) CONST UNSIGNED CHAR MA7DOAN[10]={0xC0,0xF9,0xA4,0xB0,0x99,0x92,0x82,0xF8,0x80,0x90}; INT16 KQADC; INT UNSIGNED CHAR

DONVI, CHUC, TRAM, NGAN; MDONVI, MCHUC, MTRAM, MNGAN;

VOID DIV_DECODE (INT16 TAM) { NGAN = TAM/1000; TRAM = TAM/100; CHUC = TAM/10; DONVI= TAM %10;

TAM = TAM %1000; TAM = TAM %100; //LAY HANG CHUC //LAY DONVI

MNGAN = MA7DOAN[NGAN];MTRAM = MA7DOAN[TRAM]; MCHUC = MA7DOAN[CHUC];MDONVI= MA7DOAN[DONVI]; IF (NGAN == 0) { MNGAN=0XFF; IF (TRAM == 0) { MTRAM=0XFF; IF (CHUC == 0) MCHUC=0XFF;
92 Bai 6: ADC cua PIC va lap trnh C.

ai hoc s pham ky thuat tp HCM

Khoa ien ien t

Nguyen nh Phu

} } } VOID DISPLAY () { OUTPUT_B(MDONVI); DELAY_MS(1); OUTPUT_B(MCHUC); DELAY_MS(1); OUTPUT_B(MTRAM); DELAY_MS(1); OUTPUT_B(MNGAN); DELAY_MS(1); } VOID MAIN() { SET_TRIS_B(0x00); SET_TRIS_D(0x00); OUTPUT_D(0XFF); SETUP_ADC(ADC_CLOCK_DIV_32); SETUP_ADC_PORTS(AN0); // 1 KENH AN0 WHILE(1) { KQADC=READ_ADC(); // DOC KET QUA ADC DISPLAY(); DIV_DECODE(KQADC); } } NHN XT: KT QU O CHA NG, LED HIN TH CHP CHN. KHC PHC: IN P THAM CHIU V REF 0V ,V REF VDD 5V 5000mV NN PHN GII (STEP SIZE) L SS 4,887mV 1023 IN P TON GIAI FULL SCALE = FS: FS SS 1023 4,887mV 1023 5,000mV 5V CM BIN LM35 TH H S CHUYN I L 10MV/1 CC H S KHNG PH HP, NU HIN TH KT QU CHUYN I TH KHNG NG, CCH HIU CHNH LY KT QU O SS * N 4,887mV * N / 10 D NHN THY TH CHO HIN TH NHIU LN BI 6-2. O NHIT S DNG PIC 16F877A - KNH TH 0 HIN TH KT QU O TRN 3 LED 7 ON QUT. S DNG NGUN IN P THAM CHIU VREF+=VDD=5V, VREF=VSS=0VKHC PHC CC NHC IM
#INCLUDE <16F877A.H> #DEVICE ADC=10 // KHAI BAO ADC 10 BIT, MAC NHIEN LA 8 BIT #FUSES NOWDT,PUT,HS,NOPROTECT,NOLVP #USE DELAY(CLOCK=16000000)
Bai 6: ADC cua PIC va lap trnh C. 93

OUTPUT_LOW(PIN_D0); OUTPUT_HIGH(PIN_D0); OUTPUT_LOW(PIN_D1); OUTPUT_HIGH(PIN_D1); OUTPUT_LOW(PIN_D2); OUTPUT_HIGH(PIN_D2); OUTPUT_LOW(PIN_D3); OUTPUT_HIGH(PIN_D3);

TNH TON:

ai hoc s pham ky thuat tp HCM

Khoa ien ien t

Nguyen nh Phu

CONST UNSIGNED CHAR MA7DOAN[10]={0xC0,0xF9,0xA4,0xB0,0x99,0x92,0x82,0xF8,0x80, 0x90}; INT16 KQADC; INT UNSIGNED CHAR

DONVI, CHUC, TRAM, NGAN,I; MDONVI,MCHUC,MTRAM,MNGAN;

VOID DIV_DECODE (INT32 TAM) { NGAN = TAM/1000; TAM = TAM %1000; TRAM = TAM/100; TAM = TAM %100; CHUC = TAM/10; //LAY HANG CHUC DONVI= TAM %10; //LAY DONVI MNGAN = MA7DOAN[NGAN];MTRAM = MA7DOAN[TRAM]; MCHUC = MA7DOAN[CHUC];MDONVI= MA7DOAN[DONVI]; MCHUC = MCHUC & 0X7F; //HIEN THI DAU CHAM IF (NGAN == 0) { MNGAN=0XFF; IF (TRAM == 0) { MTRAM=0XFF; IF (CHUC == 0) } } } VOID DISPLAY () { OUTPUT_B(MDONVI); DELAY_MS(1); OUTPUT_B(MCHUC); DELAY_MS(1); OUTPUT_B(MTRAM); DELAY_MS(1); OUTPUT_B(MNGAN); DELAY_MS(1); } VOID MAIN() { SET_TRIS_B(0x00); SETUP_ADC(ADC_CLOCK_DIV_32); SETUP_ADC_PORTS(AN0); SET_ADC_CHANNEL(0); WHILE(1) { KQADC=READ_ADC(); KQADC= KQADC *4.887; FOR (I=0;I<30;I++) {DISPLAY();} DIV_DECODE(KQADC); } } SET_TRIS_D(0x00);

MCHUC=0XFF;

OUTPUT_LOW(PIN_D0); OUTPUT_HIGH(PIN_D0); OUTPUT_LOW(PIN_D1); OUTPUT_HIGH(PIN_D1); OUTPUT_LOW(PIN_D2); OUTPUT_HIGH(PIN_D2); OUTPUT_LOW(PIN_D3); OUTPUT_HIGH(PIN_D3);

// 1 KENH AN0

// DOC KET QUA ADC

BI 6-3. O NHIT S DNG PIC 16F877A - KNH TH 0 HIN TH KT QU O TRN 3 LED 7 ON QUT. S DNG NGUN IN P THAM CHIU VREF+=VDD=5V, VREF=VSS=0VO NHIU LN GIM SAI S
94 Bai 6: ADC cua PIC va lap trnh C.

ai hoc s pham ky thuat tp HCM

Khoa ien ien t

Nguyen nh Phu

#INCLUDE <16F877A.H> #DEVICE ADC=10 #FUSES NOWDT,PUT,HS,NOPROTECT,NOLVP #USE DELAY(CLOCK=16000000) CONST UNSIGNED CHAR MA7DOAN[10]={0xC0,0xF9,0xA4,0xB0,0x99,0x92,0x82,0xF8,0x80, 0x90}; INT16 KQADC; INT UNSIGNED CHAR DONVI, CHUC, TRAM, NGAN,I,J; MDONVI,MCHUC,MTRAM,MNGAN;

VOID DIV_DECODE (INT16 TAM) { NGAN = TAM/1000; TAM = TAM %1000; TRAM = TAM/100; TAM = TAM %100; CHUC = TAM/10; //LAY HANG CHUC DONVI= TAM %10; //LAY DONVI MNGAN = MA7DOAN[NGAN];MTRAM = MA7DOAN[TRAM]; MCHUC = MA7DOAN[CHUC];MDONVI= MA7DOAN[DONVI]; MCHUC = MCHUC & 0X7F; //HIEN THI DAU CHAM IF (NGAN == 0) { MNGAN=0XFF; IF (TRAM == 0) { MTRAM=0XFF; IF (CHUC == 0) MCHUC=0XFF; } } } VOID DISPLAY () { OUTPUT_B(MDONVI); OUTPUT_LOW(PIN_D0); DELAY_MS(1); OUTPUT_HIGH(PIN_D0); OUTPUT_B(MCHUC); DELAY_MS(1); OUTPUT_B(MTRAM); DELAY_MS(1); OUTPUT_B(MNGAN); DELAY_MS(1); } VOID MAIN() { SET_TRIS_B(0x00); SETUP_ADC(ADC_CLOCK_DIV_32); SETUP_ADC_PORTS(AN0); SET_ADC_CHANNEL(0); SET_TRIS_D(0x00); OUTPUT_LOW(PIN_D1); OUTPUT_HIGH(PIN_D1); OUTPUT_LOW(PIN_D2); OUTPUT_HIGH(PIN_D2); OUTPUT_LOW(PIN_D3); OUTPUT_HIGH(PIN_D3);

WHILE(1) { KQADC=0; FOR (J=0; J<10; J++) { KQADC=KQADC+READ_ADC(); KQADC= KQADC /10; KQADC= KQADC*4.887; FOR (I=0; I<30; I++) { DISPLAY(); } DIV_DECODE(KQADC); } }
Bai 6: ADC cua PIC va lap trnh C.

95

ai hoc s pham ky thuat tp HCM

Khoa ien ien t

Nguyen nh Phu

BI 6-4. O NHIT S DNG PIC 16F877A - KNH TH 0 HIN TH KT QU O TRN 3 LED 7 ON QUT. S DNG NGUN IN P THAM CHIU VREF+=VDD=5V, VREF=VSS=0VS DNG IN P THAM CHIU BN NGOI
S MCH

\ Hnh 6-4. Mch o nhit hin th led 7 on - dng in p tham chiu ngoi. TNH TON CHN PHN GII: CM BIN LM35 TH H S CHUYN I L 10MV/1 CHN IN P VREF+ = 1023MV V V 1023mV 0MV NN PHN GII (STEP SIZE) L SS REF 10 REF 1mV 2 1 1023 KHI NHIT THAY I 0,1 TH GI TR S THAY I 1 N VI, KT QU O PHI CHIA CHO 10 C KT QU NG. CCH NY O C C PHN THP PHN CA NHIT . CHNG TRNH

#INCLUDE <16F877A.H> #DEVICE ADC=10 #FUSES NOWDT,PUT,HS,NOPROTECT,NOLVP #USE DELAY(CLOCK=16000000) CONST UNSIGNED CHAR MA7DOAN[10]={0xC0,0xF9,0xA4,0xB0,0x99,0x92,0x82,0xF8,0x80, 0x90}; INT16
96

KQADC;
Bai 6: ADC cua PIC va lap trnh C.

ai hoc s pham ky thuat tp HCM

Khoa ien ien t

Nguyen nh Phu

INT UNSIGNED CHAR

DONVI, CHUC, TRAM, NGAN,I,J; MDONVI,MCHUC,MTRAM,MNGAN;

VOID DIV_DECODE (INT16 TAM) { NGAN = TAM/1000; TAM = TAM %1000; TRAM = TAM/100; TAM = TAM %100; CHUC = TAM/10; //LAY HANG CHUC DONVI= TAM %10; //LAY DONVI MNGAN = MA7DOAN[NGAN];MTRAM = MA7DOAN[TRAM]; MCHUC = MA7DOAN[CHUC];MDONVI= MA7DOAN[DONVI]; MCHUC = MCHUC & 0X7F; //HIEN THI DAU CHAM IF (NGAN == 0) { MNGAN=0XFF; IF (TRAM == 0) { MTRAM=0XFF; IF (CHUC == 0) MCHUC=0XFF; } } } VOID DISPLAY () { OUTPUT_B(MDONVI); OUTPUT_LOW(PIN_D0); DELAY_MS(1); OUTPUT_HIGH(PIN_D0); OUTPUT_B(MCHUC); DELAY_MS(1); OUTPUT_B(MTRAM); DELAY_MS(1); OUTPUT_B(MNGAN); DELAY_MS(1); } VOID MAIN() { SET_TRIS_B(0x00); SET_TRIS_D(0x00); SETUP_ADC(ADC_CLOCK_DIV_32); SETUP_ADC_PORTS(AN0_AN1_VSS_VREF); SET_ADC_CHANNEL(0); WHILE(1) { KQADC=0; FOR (J=0; J<10; J++) { KQADC=KQADC+READ_ADC(); KQADC= KQADC /10; KQADC= KQADC*4.887; FOR (I=0; I<30; I++) { DISPLAY(); } DIV_DECODE(KQADC); } } OUTPUT_LOW(PIN_D1); OUTPUT_HIGH(PIN_D1); OUTPUT_LOW(PIN_D2); OUTPUT_HIGH(PIN_D2); OUTPUT_LOW(PIN_D3); OUTPUT_HIGH(PIN_D3);

BI 6-5. O KNH TH 0 V 1 HIN TH KT QU O TRN 8 LED 7 ON QUT DNG 2 PORT B V D.

#INCLUDE <16F877A.H> #DEVICE ADC=10 #FUSES NOWDT,PUT,HS,NOPROTECT,NOLVP #USE DELAY(CLOCK=16000000)

Bai 6: ADC cua PIC va lap trnh C. 97

ai hoc s pham ky thuat tp HCM

Khoa ien ien t

Nguyen nh Phu

CONST UNSIGNED CHAR MALED7DOAN[10]={0xC0,0xF9,0xA4,0xB0,0x99,0x92,0x82,0xF8,0x80, 0x90}; INT16 INT INT UNSIGNED CHAR UNSIGNED CHAR KQADC0, KQADC1; DONVI0,CHUC0,TRAM0, NGAN0,I,J; DONVI1,CHUC1,TRAM1, NGAN1; MDONVI0,MCHUC0,MTRAM0,MNGAN0; MDONVI1,MCHUC1,MTRAM1,MNGAN1;

VOID DIV_BCD0(INT16 TAM0) { NGAN0 = TAM0/1000; TRAM0 = TAM0/100; CHUC0 = TAM0 /10;

TAM0

= TAM0%1000; TAM0 = TAM0%100; DONVI0 = TAM0%10;

MNGAN0 = MALED7DOAN[NGAN0]; MTRAM0 = MALED7DOAN[TRAM0]; MCHUC0 = MALED7DOAN[CHUC0]; MDONVI0 = MALED7DOAN[DONVI0]; IF (NGAN0 == 0) { MNGAN0=0XFF; IF (TRAM0 == 0) { MTRAM0=0XFF; IF (CHUC0 == 0 ) { MCHUC0=0XFF; } } } } VOID DIV_BCD1(INT16 TAM) { NGAN1 = TAM/1000; TAM = TAM%1000; TRAM1 = TAM/100; TAM = TAM%100; CHUC1 = TAM /10; DONVI1 = TAM%10; MNGAN1 = MTRAM1 = MCHUC1 = MDONVI1 = MALED7DOAN[NGAN1]; MALED7DOAN[TRAM1]; MALED7DOAN[CHUC1]; MALED7DOAN[DONVI1];

IF (NGAN1 == 0) { MNGAN1=0XFF; IF (TRAM1 == 0) { MTRAM1=0XFF; IF (CHUC1 == 0 ) { MCHUC1=0XFF; } } } } VOID HIENTHI() { FOR (J=0; J<2;J++) { OUTPUT_B(MDONVI0); OUTPUT_D(0B11111110); DELAY_MS(1); OUTPUT_B(MCHUC0); OUTPUT_D(0B11111101); DELAY_MS(1);
98 Bai 6: ADC cua PIC va lap trnh C.

ai hoc s pham ky thuat tp HCM

Khoa ien ien t

Nguyen nh Phu

OUTPUT_B(MTRAM0); OUTPUT_D(0B11111011); DELAY_MS(1); OUTPUT_B(MNGAN0); OUTPUT_D(0B11110111); DELAY_MS(1); OUTPUT_B(MDONVI1); OUTPUT_D(0B11101111); DELAY_MS(1); OUTPUT_B(MCHUC1); OUTPUT_D(0B11011111); DELAY_MS(1); OUTPUT_B(MTRAM1); OUTPUT_D(0B10111111); DELAY_MS(1); OUTPUT_B(MNGAN1); OUTPUT_D(0B01111111); DELAY_MS(1); } } VOID MAIN() { SET_TRIS_B(0x00); SET_TRIS_D(0x00); SETUP_ADC(ADC_CLOCK_DIV_32); SETUP_ADC_PORTS(AN0_AN1_AN3); WHILE(1) { FOR (I =0;I<2;I++) { SET_ADC_CHANNEL(0); HIENTHI(); KQADC0=READ_ADC(); // DOC KET QUA ADC DIV_BCD0(KQADC0); } FOR (I =0;I<2;I++) { SET_ADC_CHANNEL(1); HIENTHI(); KQADC1=READ_ADC(); // DOC KET QUA ADC DIV_BCD1(KQADC1); } } }

Bai 6: ADC cua PIC va lap trnh C.

99

ai hoc s pham ky thuat tp HCM

Khoa ien ien t

Nguyen nh Phu

BI 6-6. O KNH TH 0, 1, 2 HIN TH KT QU O TRN 4 LED 7 ON QUT DNG 2 PORT B V D. THI GIAN O MI KNH L 1S
#include <16F877.h> #device ADC=10 #USE DELAY(CLOCK=20000000) #FUSES NOWDT,PUT,HS,NOPROTECT,NOLVP CONST UNSIGNED CHAR MALED7DOAN[10]={0xC0,0xF9,0xA4,0xB0,0x99,0x92,0x82,0xF8,0x80, 0x90}; INT16 DEM; INT DONVI,CHUC, TRAM, NGAN,I; UNSIGNED CHAR MDONVI,MCHUC,MTRAM,MNGAN; VOID DIV_DECODE (INT16 TAM) { NGAN = TAM / 1000; //LAY NGAN TAM = TAM % 1000; TRAM = TAM / 100; //LAY HANG TRAM TAM = TAM %100; CHUC = TAM/10; //LAY HANG CHUC DONVI= TAM %10; //LAY DONVI MNGAN = MALED7DOAN[NGAN]; MTRAM = MALED7DOAN[TRAM]; MCHUC = MALED7DOAN[CHUC]; MDONVI = MALED7DOAN[DONVI]; IF (NGAN == 0) { MNGAN=0XFF; IF (TRAM == 0) { MTRAM=0XFF; IF (CHUC == 0 ) { MCHUC=0XFF; } } } } VOID DISPLAY () { OUTPUT_B(MDONVI); DELAY_MS(1); OUTPUT_B(MCHUC); DELAY_MS(1); OUTPUT_B(MTRAM); DELAY_MS(1); OUTPUT_B(MNGAN); DELAY_MS(1);

OUTPUT_LOW(PIN_D0); OUTPUT_HIGH(PIN_D0); OUTPUT_LOW(PIN_D1); OUTPUT_HIGH(PIN_D1); OUTPUT_LOW(PIN_D2); OUTPUT_HIGH(PIN_D2); OUTPUT_LOW(PIN_D3); OUTPUT_HIGH(PIN_D3);

} VOID MAIN() { SET_TRIS_B(0x00); SET_TRIS_D(0x00); SETUP_ADC(ADC_CLOCK_DIV_32);

100 Bai 6: ADC cua PIC va lap trnh C.

ai hoc s pham ky thuat tp HCM

Khoa ien ien t

Nguyen nh Phu

SETUP_ADC_PORTS(AN0_AN1_AN2_AN3_AN4); WHILE(1) { FOR (I=0;I<200;I++) { SET_ADC_CHANNEL(0); DEM=READ_ADC(); DISPLAY(); DIV_DECODE(DEM); } FOR (I=0;I<200;I++) { SET_ADC_CHANNEL(1); DEM=READ_ADC(); DISPLAY(); DIV_DECODE(DEM); } FOR (I=0;I<200;I++) { SET_ADC_CHANNEL(2); DEM=READ_ADC(); DISPLAY(); DIV_DECODE(DEM); } } }

BI 6-7. O NHIT KNH TH 0 HIN TH KT QU O TRN 4 LED 7 ON QUT DNG 2 PORT B V D, C IU KHIN 1 RELAY: KHI NHIT NH HN 50 TH RELAY M, LN HN HAY BNG TH TT.

#INCLUDE <16F877A.H> #DEVICE ADC=10 #FUSES NOWDT,PUT,HS,NOPROTECT,NOLVP #USE DELAY(CLOCK=16000000) CONST UNSIGNED CHAR MA7DOAN[10]={0xC0,0xF9,0xA4,0xB0,0x99,0x92,0x82,0xF8,0x80, 0x90}; INT16 KQADC; INT UNSIGNED CHAR

DONVI, CHUC, TRAM, NGAN,I,J; MDONVI,MCHUC,MTRAM,MNGAN;

VOID DIV_DECODE (INT16 TAM) { NGAN = TAM/1000; TAM = TAM %1000; TRAM = TAM/100; TAM = TAM %100; CHUC = TAM/10; //LAY HANG CHUC DONVI= TAM %10; //LAY DONVI MNGAN = MA7DOAN[NGAN];MTRAM = MA7DOAN[TRAM]; MCHUC = MA7DOAN[CHUC];MDONVI= MA7DOAN[DONVI]; MCHUC = MCHUC & 0X7F; //HIEN THI DAU CHAM IF (NGAN == 0) { MNGAN=0XFF; IF (TRAM == 0) { MTRAM=0XFF; IF (CHUC == 0) MCHUC=0XFF; } } } VOID DISPLAY () { OUTPUT_B(MDONVI); OUTPUT_LOW(PIN_D0); DELAY_MS(1); OUTPUT_HIGH(PIN_D0);
Bai 6: ADC cua PIC va lap trnh C. 101

ai hoc s pham ky thuat tp HCM

Khoa ien ien t

Nguyen nh Phu

OUTPUT_B(MCHUC); DELAY_MS(1); OUTPUT_B(MTRAM); DELAY_MS(1); OUTPUT_B(MNGAN); DELAY_MS(1); }

OUTPUT_LOW(PIN_D1); OUTPUT_HIGH(PIN_D1); OUTPUT_LOW(PIN_D2); OUTPUT_HIGH(PIN_D2); OUTPUT_LOW(PIN_D3); OUTPUT_HIGH(PIN_D3);

VOID MAIN() { SET_TRIS_B(0x00); SETUP_ADC(ADC_CLOCK_DIV_32); SETUP_ADC_PORTS(AN0); SET_ADC_CHANNEL(0);

SET_TRIS_D(0x00);

SET_TRIS_C(0X00);

WHILE(1) { KQADC=0; FOR (J=0; J<10; J++) { KQADC=KQADC+READ_ADC(); } KQADC= KQADC /10; KQADC= KQADC*4.887; FOR (I=0; I<30; I++) { DISPLAY(); } DIV_DECODE(KQADC); IF (DEM<50) {OUTPUT_HIGH(PIN_C0);} ELSE {OUTPUT_LOW(PIN_C0);} } }

//RELAY ON //RELAY OFF

102

Bai 6: ADC cua PIC va lap trnh C.