BI TP VI IU KHIN 8051

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BI TP LM QUEN VI IU KHIN 1.1. Xut nhp v chuyn d liu Cho 16 Led n kt ni vi Port 0 v Port 2, tch cc mc 0. 8 cng tc ni gia Port 1 v t. 8 nt nhn ni gia Port 3 v t. Thc hin cc bi tp sau ch s dng lnh MOV (cc byte v bit c s dng u trn RAM ni): 1.1.1. Xut tn hiu iu khin Led ni vi P0.1 sng. 1.1.2. To h thng bn iu khin sng tt dy 8 Led Port 2 bng 8 cng tc Port 1. 1.1.3. Xut d liu t byte 37H trn RAM ni ra Port 0. 1.1.4. Lu gi tr trn tng bit ca Port 3 vo chui bit bt u t 00H. 1.1.5. Xut chui bit t 10H n 1FH ra 2 Port 0 v 2. 1.1.6. Nhp d liu t Port 1 v xut gi tr ra Port 2. 1.1.7. Gi s cc cng tc Port 3 u m, xut gi tr 65h ra Port 3, nhp gi tr t Port 3 vo byte 7FH. Hi gi tr ca byte 7FH l bao nhiu ? ng 4 cng tc tng ng vi 4 bit cao ca Port 3, nhp li gi tr t P3 vo 7FH. Lc ny kt qu trong 7FH bng ?
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1.1.8. Xut d liu t byte c a ch cho bi Port 3 ra Port 0. 1.1.9. Vit CT chuyn d liu byte 34H ca RAM ni vo byte 35H ca RAM ni theo 2 cch (nh a ch byte trc tip v nh a ch byte gin tip). 1.2. Cc lnh s hc 1.2.1. Thc hin php cng 2 byte 20H v 21H, kt qu lu trong 22H. 1.2.2. Thc hin php tr 2 gi tr trong R0 v R1, kt qu lu trong R2. 1.2.3. Thc hin php nhn 2 gi tr trong 2 byte c a ch lu trong R0 v R1, kt qu lu trong R2 v R3. 1.2.4. Thc hin php chia 2 gi tr trong 2 byte c a ch 16H, byte cn li c a ch lu trong R0, kt qu xut ra P2 v P0. 1.2.5. Cng 2 s BCD trong 2 byte 18H v 19H. 1.3. Cc lnh logic 1.3.1. Thc hin php tnh : P0.2 = P3.1 AND P3.5 1.3.2. Nu c C v chn P1.1 cng mc 1 th cho sng Led P0.0. 1.3.3. Nu c C v chn P3.0 c cng mc 0 hoc 1 th cho sng Led P0.0. 1.3.4. Nu P3.0 hoc P1.0 bng 1 th cho sng Led P0.0.
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1.3.5. Nu bt k 1 trong 3 gi tr ca P1.0, P1.1 v P1.2 bng 1 th cho sng Led P0.0. 1.3.6. Thc hin php tnh P2 = P3 AND P1 1.3.7. Thc hin php tnh P2 = P3 NAND P1 1.3.8. Thc hin php tnh P2 = P3 OR P1 1.3.9. Thc hin php tnh P2 = P3 NOR P1 1.3.10. Thc hin php tnh P2 = P3 XOR P1 1.4. Cc lnh r nhnh (yu cu v lu gii thut cho tng bi) 1.4.1. Nu P1.1 = 0 th cho Led P2.5 tt, nu P1.1 = 1 th cho Led P2.5 sng. 1.4.2. Bt tt ton b Led Port 0 bng cng tc P3.7. 1.4.3. So snh gi tr trong thanh ghi A vi gi tr 55H, nu bng th tt ht cc n Port 0 v 2, nu gi tr trong A nh hn th bt Led Port 0, tt Port 2, nu ln hn th tt led P0, sng P2. 1.4.4. Vit CT con delay 100ms, bit rng thch anh (xtal) dng trong h thng l: a. 12 MHz b. 6 MHz 1.5. iu khin ngoi vi 1.5.1. Ghi gi tr 50H vo byte c a ch 0030H RAM ngoi.
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1.5.2. Xut gi tr ca byte c a ch 0035H RAM ngoi ra Port 2. 1.5.3. Vit CT chuyn d liu byte 2001H (RAM ngoi) vo byte 41H (RAM ni). Lm theo 2 cch (nh a ch byte trc tip v nh a ch byte gin tip). 1.5.4. S dng 1 vi mch 74138 v cc cng cn thit thit k mch gii m a ch to ra cc tn hiu chn chip tng ng cc vng a ch sau: Tn hiu Vng a c tnh chn chip ch truy xut C 0 S 0000H - PSEN 3FFFH C 1 S 4000H - PSEN 7FFFH C 2 S 6000H 7FFFH C 3 S 8000H - RD 87FFH C 4 S 8800H - WR 8FFFH
R ,W D R

1.5.5. Ch dng mt vi mch 74138 (khng dng thm cng), thit k mch gii m a ch to ra mt tn hiu chn chip /CS tng ng tm a ch F000HF3FFH.
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1.5.6. S dng 1 vi mch 74138 v cc cng cn thit thit k mch gii m a ch to ra cc tn hiu chn chip tng ng cc vng a ch sau: Tn hiu Vng a c tnh chn chip ch truy xut C 0 S 9800H - PSEN 9BFFH C 1 S 9800H 9BFFH C 2 S 9C00H 9DFFH C 3 S 9E00H 9EFFH
R ,W D R R ,W D R R ,W D R

1.6. Timer/Counter 1.6.1. Dng Timer ch 16 bit nh th trong 10000 chu k my th bt Led P0.0. S dng 2 cch : dng ngt v khng dng ngt. 1.6.2. Dng Timer ch 8 bit t ng np li trong 100 chu k my th o bit P2.0. S dng 2 cch : dng ngt v khng dng ngt. 1.6.3. Dng Counter m s ln nhn nt P3.1, lu gi tr vo R0. 1.6.4. Vit CT con delay 1s, bit rng thch anh (xtal) dng trong h thng l: a. 12 MHz
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b. 24 MHz 1.7. Ngt ngoi 1.7.1. m s xung a vo P3.2, lu vo byte 30H. 1.7.2. Mi khi c cnh xung trn chn P3.3 th o bit P2.1 1.7.3. Cho ton b Led P0 sng khi bnh thng, mi khi chn xy ra ngt mc /INT0 th tt. 1.7.4. Vit CT m s xung a vo chn /INT1 (P3.3) v iu khin relay thng qua chn P3.0 (relay ng khi P3.0 bng 1), ct s m vo byte 40H ca Ram ni, nu s m cha n 100 th ng relay, nu s m t 100 th ngt relay. 1.8. Giao tip ni tip 1.8.1. Xut gi tr 50H ra Port ni tip. 1.8.2. Nhp gi tr t b m vo thanh ghi R4 khi xy ra ngt ni tip. 2. BI TP C BN 2.1. Vit CT xa 20 byte RAM ni c a ch bt u l 30H. 2.2. Vit CT xa cc byte RAM ni t a ch 20H n 7FH. 2.3. Vit CT xa 250 byte RAM ngoi c a ch bt u l 4000H. 2.4. Vit CT xa 2500 byte RAM ngoi c a ch bt u l 4000H.
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2.5. Vit CT xa ton b RAM ngoi c dung lng 8KB, bit rng a ch u l 2000H. 2.6. Vit CT chuyn mt chui d liu gm 10 byte trong RAM ni c a ch u l 30H n vng RAM ni c a ch u l 40H. 2.7. Vit CT chuyn mt chui d liu gm 100 byte trong RAM ngoi c a ch u l 2000H n vng RAM ngoi c a ch u l 4000H. 2.8. Vit CT chuyn mt chui d liu gm 10 byte trong RAM ni c a ch u l 30H n vng RAM ngoi c a ch u l 4000H. 2.9. Vit CT chuyn mt chui d liu gm 10 byte trong RAM ngoi c a ch u l 5F00H n vng RAM ni c a ch u l 40H. 2.10. Cho mt chui d liu gm 20 byte lin tip trong RAM ni, bt u t a ch 20H. Hy vit CT ln lt xut cc d kiu ny ra Port 1. 2.11. Gi s Port 1 c ni n mt thit b pht d liu (v d nh 8 nt nhn). Hy vit CT nhn lin tip 10 byte d liu t thit b pht ny v ghi vo 10 byte (RAM ni) lin tip bt u t byte 50H. 2.12. Vit CT to mt xung dng ( ) ti chn P1.0 vi rng xung 1ms, bit rng xtal l 12 MHz. 2.13. Vit CT to chui xung vung c f = 100 KHz ti chn P1.1 (Xtal 12 MHz).
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2.14. Vit CT to chui xung vung c f = 100 KHz v rng xung D = 40% ti chn P1.2 (Xtal 12 MHz). 2.15. Vit CT to chui xung vung c f = 10 KHz ti chn P1.3 (Xtal 24 MHz). 2.16. Vit CT to chui xung vung c f = 10 KHz v c rng xung D = 30% ti chn P1.3 (Xtal 24 MHz). 2.17. Vit CT to chui xung vung c f = 10 Hz ti chn P1.4 (Xtal 12 MHz). 2.18. Vit CT to chui xung vung c f = 10 Hz v c rng xung D = 25% ti chn P1.5 (Xtal 12 MHz). 2.19. Cho mt chui s 8 bit khng du trong RAM ni gm 10 s bt u t byte 30H. Hy vit CT con cng chui s ny v ghi kt qu vo byte 2FH (gi s kt qu nh hn hoc bng 255). 2.20. Cho mt chui s 8 bit khng du trong RAM ni gm 10 s bt u t byte 30H. Hy vit CT con cng chui s ny v ghi kt qu vo byte 2EH:2FH (byte 2EH cha byte cao ca kt qu v byte 2FH cha byte thp ca kt qu). 2.21. Vit CT con cng 2 s 16 bit cha trong 4 byte 41H44H, kt qu lu trong 2 byte 45H-46H. 2.22. Vit CT con tr s 16 bit cha trong byte 41H-42H cho s 16 bit cha trong byte 43H-44H.

Cho mt chui s 16 bit khng du trong RAM ni gm 10 s bt u t byte 30H theo nguyn tc byte c a ch nh hn cha byte cao v byte c a ch ln hn cha byte thp. (V d: byte cao ca s 16 bit u tin c ct ti byte 30H v byte thp ca s 16 bit u tin c ct ti byte 31H). Hy vit CT con cng chui s ny v ct kt qu vo byte 2EH:2FH. 2.24. Vit CT con ly b 2 s 16 bit cha trong R2:R3. 2.25. Cho hai s 16 bit, s th 1 cha trong (30H): (31H), s th 2 cha trong (32H):(33H). Vit CT con so snh hai s ny. Nu s th 1 ln hn hoc bng s th 2 th set c F0, nu ngc li th xa c F0. 2.26. Cho mt chui k t di dng m ASCII trong RAM ni, di 20 byte, bt u t a ch 50H. Vit CT xut cc k t in hoa c trong chui ny ra Port 1. Bit rng m ASCII ca k t in hoa l t 65 (ch A) n 90 (ch Z). 2.27. Vit CT mi khi c ngt cnh INT1 th nhp mt k t t Port 1 di dng m ASCII v ghi vo RAM ngoi, bt u t a ch 0000H. Bit rng chui ny kt thc bng k t CR (c m ASCII l 0DH) v khng ghi k t ny vo RAM m thay bng k t null (c m ASCII l 00H).
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2.28. Cho mt chui d liu di dng s c du trong RAM ni, di 100 byte, bt u t a ch 100H. Vit CT ln lt xut cc d liu trong chui ra Port 1 nu l s dng (xem s 0 l dng) v xut ra Port 2 nu l s m. 2.29. Cho mt chui d liu di dng s c du trong RAM ngoi, bt u t a ch 0100H v kt thc bng s 0. Vit CT ln lt xut cc d liu trong chui ra Port 1 nu l s dng v xut ra Port 2 nu l s m. 2.30. Cho mt chui d liu di dng s khng du trong RAM ni, bt u t a ch 20H v di chui l ni dung byte 0FH. Vit CT m s s chn (chia ht cho 2) c trong chui v ct vo byte 7EH. 2.31. Vit CT con c nhim v ly 1 byte t 1 chui data gm 20 byte ct trong Ram ngoi bt u t a ch 2000H v xut ra Port1. Mi ln gi CT con ch xut 1 byte, ln gi k th xut byte k tip, ln gi th 21 th li xut byte u, ... 2.32. Vit CT to sng vung chu k T = 10ms dng Timer trn chn P2.0. (Xtal 12MHz). 2.33. Vit CT to sng vung tn s f = 1KHz dng Timer trn chn P2.0. (Xtal 12MHz). 2.34. Vit CT dng Timer to 2 sng vung c cng f = 1KHz ti P1.6 v P1.7. Bit rng sng vung ti P1.7 chm pha hn sng vung ti P1.6 100us. (Xtal 12MHz).
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2.35. Vit CT dng ngt Timer to ng thi 2 sng vung 1KHz v 50Hz ti P1.0 v P1.1. (Xtal 6MHz) 2.36. Vit CT ly 1 chui data cha trong Ram ngoi bt u t a ch 6200H n a ch 62FFH v xut ra Port1, mi ln xut cch nhau 50ms. S dng ngt Timer. 2.37. Vit CT pht lin tc chui s t 0 n 9 ra port ni tip theo ch UART 8 bit, 2400 baud. S dng ngt serial. 2.38. Vit CT ch nhn data t 1 thit b ngoi gi n 8051 qua port ni tip (ch UART 8 bit, 4800 baud). Nu nhn c k t STX (02H) th bt sng Led P2.0, nu nhn c k t ETX (03H) th tt Led. S dng ngt serial. 2.39. Vit CT ch nhn 1 xung cnh xung a vo chn /INT0 (P3.2), khi c xung th nhp data t Port1 v pht ra port ni tip ch UART 8 bit 9600 baud. 2.40. Vit CT xut s c 4 ch s ra led 7 on dng IC dch 4094, mi ch s lu ln lt trong Ram ni c a ch t 50H(hng ngn) n 53H (n v). 2.41. Pht trin bi 2.40 ln khng hin th cc s 0 v ngha hng ngn/trm/chc. 2.42. Chy led : Cho chy cng lc 1 led t tri qua v 1 led t phi qua, khi gp nhau gia th chy li t u.
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2.43. Xut ra Led ma trn s cui cng trong MSSV ca bn. 2.44. Thc hin cng vic sau : Trng thi u vo P3.0 0 0 1 1 P3.1 0 1 0 1 Cng vic thc hin P0 = 0, P2 = 0 P0 = 1, P2 = 2 P0 = 2, P2 = 0 P0 = P1, P2 = P3

2.45. Hin th h v tn ln mn hnh LCD. 2.46. 3. BI TP TNG HP 3.1. Cho mt chui k t di dng m ASCII trong RAM ni, di 20 byte, bt u t a ch 50H. Vit CT i cc k t in hoa c trong chui ny thnh k t thng. Bit rng m ASCII ca k t thng bng m ASCII ca k t in hoa cng thm 32. 3.2. Cho mt chui k t s di dng m ASCII trong RAM ni, di 20 byte, bt u t a ch 50H. Vit
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CT i cc k t s ny thnh m BCD. Bit rng m ASCII ca cc k t s l t 30H (s 0) n 39H (s 9). 3.3. Vit CT dng Timer iu khin n giao thng ti mt giao l. Cho bit rng: n Bit iu Thi khin gian Xanh P1.0 25s 1 Vng P1.1 3s 1 1 P1.2 36s Xanh P1.3 33s 2 Vng P1.4 3s 2 2 P1.5 28s n sng khi bit iu khin bng 0. 3.4. Vit chng trnh cho php khi nhn nt (P3.7) th cho xut xung tn s khong 100Hz, rng xung 80%, iu khin ng c DC quay n khi 100 vng th ngng. S dng encoder 128 xung/vng. 3.5. Thit k h thng bng chuyn ng gi sn phm vo thng ng s dng 8051 nh sau : Gm 2 Bng chuyn s dng ng c DC
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_ trn bng chuyn A c gn 1 cm bin m sn phm, tch cc mc 1. Ngay sau khi sn phm i qua cm bin th rt xung thng ng. _ trn bng chuyn B mang thng ng c 2 loi thng : To v nh (tng ng ng 5 v 10 sn phm), c nhn bi 2 cm bin : 00 l khng c thng, 01 l thng nh, 11 l thng to. M t cng vic : Bng chuyn A ngng, chy bng chuyn B n khi cm bin nhn c thng th ngng, nhn bit thng to/nh. Cho chy bng chuyn A m s sn phm tng ng thng to/nh th ngng. Lp li chu trnh. 3.6. Cho ng c c encoder 120xung/vng, chy vi tc t 0 n 60 vng/pht. Vit chng trnh tnh tc quay ca ng c bng cch m s xung trong 1 giy. Hin th tc ra led 7 on (hin s t 060). 3.7. Thit k h thng o tc quay ca ng c s dng encoder 1000xung/vng. 3.8. Thc hin iu khin led chy bng port 1 theo bng sau: Trng thi u vo P3.0 0 P3.1 0 Tt ton b hot ng
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Cng vic thc hin trn P1

0 1 1

1 0 1

Cho chy 2 led t tri qua phi Cho chy 2 led t phi qua tri Cho chy cng lc 1 led t tri qua v 1 led t phi qua

3.9. Thit k h thng m s ngi trong mt phng hc nh sau : Phng ch c 1 ca ra vo c gn 2 cm bin c cng cao, cm bin 1 m ngoi v cm bin 2 m trong phng. Thc hin vic m s ngi bng cch nu cm bin 1 pht hin ngi ri n cm bin 2 (c ngi i vo phng) th tng bin m, ngc li nu cm bin 2 pht hin trc th gim bin m. 3.10. Vit chng trnh giao tip vi IC thi gian thc DS1307 ly thi gian v hin th ra Led 7 on. 3.11. Vit chng trnh giao tip vi IC thi gian thc DS12887 ly thi gian v hin th ra Led 7 on. 3.12. Xut ch ci u tn ca bn ra Led ma trn 8x8. Cho chy t tri sang phi. 3.13. Xut k t nhn c t phm ma trn ra Led ma trn 8x8. 3.14. Vit CT iu khin mt thang my 5 tng (t tng tng) 4. BI TP NNG CAO

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4.1. Lm my tnh cng, tr, nhn, chia s c 1 ch s c nhp t bn phm ma trn, hin th ra led 7 on. 4.2. Vit chng trnh n giao thng c hin th gi vi 2 ch la chn thng qua mt cng tc : _ T ng : Xanh trong N giy, Vng trong 2 giy v trong (N+2) giy. _ Chnh bng tay : mt nt gt chuyn Xanh v c hai bn, khng dng n vng. 4.3. Vit CT lm mt ng h s ch s dng 8051, hin th gi pht giy v ngy thng nm. 4.4. Cho h thng thc hin vic kim sot s lng xe t trong 1 gara t ng c sc cha 250 xe nh sau : ng vo v ra gn 1 cm bin mi ni m s xe vo/ra gara. Tng s xe trong gara c tnh bng hiu s gia s lng xe vo/ra. Vic kim sot vo ra c thc hin bng th t : ngi li xe phi a th qua my qut, th hp l th mt tn hiu dng mt xung s c a v b iu khin m cng vo/ra. Cng c m bng 1 ng c DC, ng 3s sau khi cm bin m xe ngng tch cc (xe qua) Khi bi xe cn ch trng th bt n xanh, y th bo bng n . Hin th s ch cn trng ra Led 7 on.
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Gi s b iu khin c thit k t h 8051. Hy v s kt ni cc tn hiu iu khin vi 8051( t chn mc tch cc) v v lu gii thut cho h thng hot ng. Vit CT c th. 4.5. Vit chng trnh iu khin h thang my i. 4.6. Vit chng trnh chy y h v tn ra 4 Led ma trn 8x8. T thit k h thng phn cng.

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