Ti liu Cu trc my tnh v Hp ng

T chc vo / ra

Chng 5 T CHC VO/RA 1. Giao tip ni tip

1.1. Cu trc cng ni tip
Cng ni tip c s dng truyn d liu hai chiu gia my tnh v ngoi vi, c cc u im sau: Khong cch truyn xa hn truyn song song. S dy kt ni t. C th truyn khng dy dng hng ngoi. C th ghp ni vi vi iu khin hay PLC (Programmable Logic Device). Cho php ni mng. C th tho lp thit b trong lc my tnh ang lm vic. C th cung cp ngun cho cc mch in n gin

Cc thit b ghp ni chia thnh 2 loi: DTE (Data Terminal Equipment) v DCE (Data Communication Equipment). DCE l cc thit b trung gian nh MODEM cn DTE l cc thit b tip nhn hay truyn d liu nh my tnh, PLC, vi iu khin, Vic trao i tn hiu thng thng qua 2 chn RxD (nhn) v TxD (truyn). Cc tn hiu cn li c chc nng h tr thit lp v iu khin qu trnh truyn, c gi l cc tn hiu bt tay (handshake). u im ca qu trnh truyn dng tn hiu bt tay l c th kim sot ng truyn. Tn hiu truyn theo chun RS-232 ca EIA (Electronics Industry Associations). Chun RS-232 quy nh mc logic 1 ng vi in p t -3V n -25V (mark), mc logic 0 ng vi in p t 3V n 25V (space) v c kh nng cung cp dng t 10 mA n 20 mA. Ngoi ra, tt c cc ng ra u c c tnh chng chp mch. Chun RS-232 cho php truyn tn hiu vi tc n 20,000 bps nhng nu cp truyn ngn c th ln n 115,200 bps. Cc phng thc ni gia DTE v DCE: - n cng (simplex connection): d liu ch c truyn theo 1 hng. - Bn song cng ( half-duplex): d liu truyn theo 2 hng, nhng mi thi im ch c truyn theo 1 hng. - Song cng (full-duplex): s liu c truyn ng thi theo 2 hng. nh dng ca khung truyn d liu theo chun RS-232 nh sau: Start 0 D0 D1 D2 D3 D4 D5 D6 D7 P Stop 1

GV: Phm Hng Kim Khnh

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Ti liu Cu trc my tnh v Hp ng

T chc vo / ra

Khi khng truyn d liu, ng truyn s trng thi mark (in p -10V). Khi bt u truyn, DTE s a ra xung Start (space: 10V) v sau ln lt truyn t D0 n D7 v Parity, cui cng l xung Stop (mark: -10V) khi phc trng thi ng truyn. Dng tn hiu truyn m t nh sau (truyn k t A):

Hnh 5.1 Tn hiu truyn ca k t A Cc c tnh k thut ca chun RS-232 nh sau: Chiu di cable cc i Tc d liu cc i in p ng ra cc i in p ng ra c ti Tr khng ti in p ng vo nhy ng vo Tr khng ng vo 15m 20 Kbps 25V 5V n 15V 3K n 7K 15V 3V 3K n 7K

Cc tc truyn d liu thng dng trong cng ni tip l: 1,200 bps, 4,800 bps, 9,600 bps v 19,200 bps.

S chn:

GV: Phm Hng Kim Khnh

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Ti liu Cu trc my tnh v Hp ng

T chc vo / ra

Hnh 5.2 S chn cng ni tip Cng COM c hai dng: u ni DB25 (25 chn) v u ni DB9 (9 chn) m t nh hnh 5.2. ngha ca cc chn m t nh sau: D25 D9 1 2 3 4 5 6 7 8 20 22 23 24 15 17 18 21 14 16 19 13 12 25 9 10 11 3 2 7 8 6 5 1 4 9 Tn hiu TxD RxD RTS CTS DSR GND DCD DTR RI DSRD TSET TSET RSET LL RL STxD SRxD SRTS SCTS SDSRD TM Hng truyn DTE DCE DTE DCE DCE DCE DTE DCE DCE DTE DCE DTE DCE DTE DTE DTE DCE DTE DTE DCE M t Protected ground: ni t bo v Transmitted data: d liu truyn Received data: d liu nhn Request to send: DTE yu cu truyn d liu Clear to send: DCE sn sng nhn d liu Data set ready: DCE sn sng lm vic Ground: ni t (0V) Data carier detect: DCE pht hin sng mang Data terminal ready: DTE sn sng lm vic Ring indicator: bo chung Data signal rate detector: d tc truyn Transmit Signal Element Timing: tn hiu nh thi truyn i t DTE Transmitter Signal Element Timing: tn hiu nh thi truyn t DCE truyn d liu Receiver Signal Element Timing: tn hiu nh thi truyn t DCE truyn d liu Local Loopback: kim tra cng Remote Loopback: To ra bi DCE khi tn hiu nhn t DCE li Secondary Transmitted Data Secondary Received Data Secondary Request To Send Secondary Clear To Send Secondary Received Line Signal Detector Test Mode Dnh ring cho ch test Dnh ring cho ch test Khng dng

DCE DTE DCE DTE DCE DTE DTE DCE DTE DCE DCE DCE DTE DCE DTE DTE

GV: Phm Hng Kim Khnh

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Ti liu Cu trc my tnh v Hp ng

T chc vo / ra

1.2.

Truyn thng gia hai nt

Cc s khi kt ni dng cng ni tip: TxD RxD GND DTE1 TxD RxD GND DTE2 TxD RxD GND DTE TxD RxD GND DCE

Hnh 5.3 Kt ni n gin trong truyn thng ni tip Khi thc hin kt ni nh trn, qu trnh truyn phi bo m tc u pht v thu ging nhau. Khi c d liu n DTE, d liu ny s c a vo b m v to ngt. Ngoi ra, khi thc hin kt ni gia hai DTE, ta cn dng s sau: TxD RxD GND RTS CTS DSR DCD DTR TxD RxD GND RTS CTS DSR DCD DTR

DTE1 DTE2 Hnh 5.4 Kt ni trong truyn thng ni tip dng tn hiu bt tay Khi DTE1 cn truyn d liu th cho DTR tch cc tc ng ln DSR ca DTE2 cho bit sn sng nhn d liu v cho bit nhn c sng mang ca MODEM (o). Sau , DTE1 tch cc chn RTS tc ng n chn CTS ca DTE2 cho bit DTE1 c th nhn d liu. Khi thc hin kt ni gia DTE v DCE, do tc truyn khc nhau nn phi thc hin iu khin lu lng. Qu trinh iu khin ny c th thc hin bng phn mm hay phn cng. Qu trnh iu khin bng phn mm thc hin bng hai k t Xon v Xoff. K t Xon c DCE gi i khi rnh (c th nhn d liu). Nu DCE bn th s gi k t Xoff. Qu trnh iu khin bng phn cng dng hai chn RTS v CTS. Nu DTE mun truyn d liu th s gi RTS yu cu truyn, DCE nu c kh nng nhn d liu (ang rnh) th gi li CTS.

1.3.

Truy xut trc tip thng qua cng

Cc cng ni tip trong my tnh c nh s l COM1, COM2, COM3, COM4 vi cc a ch nh sau:

GV: Phm Hng Kim Khnh

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Ti liu Cu trc my tnh v Hp ng

T chc vo / ra

Tn COM1 COM2 COM3 COM4

a ch 3F8h 2F8h 3E8h 2E8h

Ngt 4 3 4 3

V tr cha a ch 0000h:0400h 0000h:0402h 0000h:0404h 0000h:0406h

Giao tip ni tip trong my tnh s dng vi mch UART vi cc thanh ghi cho trong bng sau: Offset DLAB 0 0 0 1 0 1 1 2 3 4 5 6 7 R/W Tn Chc nng W THR Transmitter Holding Register (m truyn) R RBR Receiver Buffer Register (m thu) R/W BRDL Baud Rate Divisor Latch (s chia byte thp) R/W IER Interrupt Enable Register (cho php ngt) R/W BRDH S chia byte cao R IIR Interrupt Identification Register (nhn dng ngt) W FCR FIFO Control Register R/W LCR Line Control Register (iu khin ng dy) R/W MCR Modem Control Register (iu khin MODEM) R LSR Line Status Register (trng thi ng dy) R MSR Modem Status Register (trng thi MODEM) R/W Scratch Register (thanh ghi tm)

Cc thanh ghi ny c th truy xut trc tip kt hp vi a ch cng (v d nh thanh ghi cho php ngt ca COM1 c a ch l BACOM1 + 1 = 3F9h. IIR (Interrupt Identification): IIR xc nh mc u tin v ngun gc ca yu cu ngt m UART ang ch phc v. Khi cn x l ngt, CPU thc hin c cc bit tng ng xc nh ngun gc ca ngt. nh dng ca IIR nh sau:

D7 D6 D5 D4 D3 D2 1: ngt time-out Xc 00: khng Cho php FIFO 64 byte (trong 16750) (trong 16550) ngun c FIFO ngt 11: cho php FIFO

D1 D0 nh 0: c gc ngt 1: khng ngt

D2 D1 0 0 1 0 1 0 4 3 2

u tin

Tn ng truyn m thu m pht

Ngun Li khung, thu , li parity, gin on khi thu m thu y m pht rng CTS, DSR, RI, RLSD

D2 D0 b xo khi c LSR c RBR c IIR, ghi THR c MSR

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1 1 1 Modem (mc 1 u tin cao nht) GV: Phm Hng Kim Khnh

Ti liu Cu trc my tnh v Hp ng

T chc vo / ra

IER (Interrupt Enable Register): IER cho php hay cm cc nguyn nhn ngt khc nhau (1: cho php, 0: cm ngt) D7 D6 D5 D4 D3 D2 D1 D0 - POW HBR MODEM LINE TxEMPTY RxRDY Cho php kiu cng sut thp Cho php kiu ngh (hibernate) Cho php khi li modem Cho php khi li thu, pht Cho php khi THR rng Cho php khi RBR y

MCR (Modem Control Register): D7 D6 D5 D4 D3 D2 D1 D0 - LOOP OUT2 OUT1 RTS DTR Mode loopback: kim tra hot ng ca UART iu khin 2 ng ra OUT1, OUT 2 ca UART iu khin tn hiu RTS v DTR

MSR (Modem Status Register): D7 D6 D5 D4 D3 D2 D1 D0 RLSD RI DSR CTS RLSD RI DSR CTS

Trng thi ca CD, RI, DSR v CTS

1: nu c thay i cc tn hiu so vi ln c trc

LSR (Line Status Register): D7 D6 D5 D4 D3 D2 D1 D0 FIE TSRE THRE BI FE PE OE RxDR FIE: FIFO Error sai trong FIFO TSRE: Transmitter Shift Register Empty thanh ghi dch rng (=1 khi pht 1 k t v b xo khi c 1 k t chuyn n t THR. THRE: Transmitter Holding Register Empty (=1 khi c 1 k t chuyn t THR TSR v b xo khi CPU a k t ti THR).

GV: Phm Hng Kim Khnh

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Ti liu Cu trc my tnh v Hp ng

T chc vo / ra

BI: Break Interrupt (=1 khic s gin on khi truyn, ngha l tn ti mc logic 0 trong khong thi gian di hn khong thi gian truyn 1 byte v b xo khi CPU c LSR) FE: Frame Error (=1 khi c li khung truyn v b xo khi CPU c LSR) PE: Parity Error (=1 khi c li parity v b xo khi CPU c LSR) OE: Overrun Error (=1 khi c li thu , ngha l CPU khng c kp d liu lm cho qu trnh ghi chng ln RBR xy ra v b xo khi CPU c LSR) RxDR: Receiver Data Ready (=1 khi nhn 1 k t v a vo RBR v b xo khi CPU c RBR). LCR (Line Control Register): D7 D6 D5 D4 D3 D2 D1 D0 DLAB SBCB PS2 PS1 PS0 STB WLS1 WLS0 DLAB (Divisor Latch Access Bit) = 0: truy xut RBR, THR, IER, = 1 cho php t b chia tn trong UART cho php t tc truyn mong mun. UART dng dao ng thch anh vi tn s 1.8432 MHz a qua b chia 16 thnh tn s 115,200 Hz. Khi , tu theo gi tr trong BRDL v BRDH, ta s c tc mong mun. V d nh ng truyn c tc truyn 2,400 bps c gi tr chia 115,200 / 2,400 = 48d = 0030h BRDL = 30h, BRDH = 00h. Mt s gi tr thng dng xc nh tc truyn cho nh sau: Tc (bps) 1,200 2,400 4,800 9,600 19,200 38,400 57,600 115,200 BRDH 00h 00h 00h 00h 00h 00h 00h 00h BRDL 60h 30h 18h 0Ch 06h 03h 02h 01h

SBCB (Set Break Control Bit) =1: cho php truyn tn hiu Break (=0) trong khong thi gian ln hn mt khung PS (Parity Select): PS2 PS1 PS0 M t X X 0 Khng kim tra 0 0 1 Kim tra l 0 1 1 Kim tra chn 1 0 1 Parity l mark 1 1 1 Parity l space STB (Stop Bit) = 0: 1 bit stop, =1: 1.5 bit stop (khi dng 5 bit d liu) hay 2 bit stop (khi dng 6, 7, 8 bit d liu).
GV: Phm Hng Kim Khnh Trang 112

Ti liu Cu trc my tnh v Hp ng

T chc vo / ra

WLS (Word Length Select): WLS1 WLS0 di d liu 0 0 1 1 0 1 0 1 5 bit 6 bit 7 bit 8 bit

Mt v d khi lp trnh trc tip trn cng nh sau: .MODEL SMALL .STACK 100h .DATA Com1 EQU Com_int EQU Buffer DB Bufferin DB Bufferout Char DB Seg_com DW Off_com DW Mask_int DB Msg DB .CODE Main PROC MOV AX,@DATA MOV DS,AX MOV MOV INT MOV MOV PUSH MOV MOV LEA MOV MOV INT POP

3F8h 08h 251 DUP(?) 0 DB 0 ? ? ; Vector ngt c ? ? 'Press any key to exit$

AH,35h AL,Com_int 21h Seg_com,ES Off_com,BX DS BX,CS DS,BX DX,Com_ISR AH,35h AL,Com_int 21h DS

; Lu vector ngt c

;Gn vector ngt mi

MOV DX,Com1+3 MOV AL,80h OUT DX,AL

GV: Phm Hng Kim Khnh

; a ch LCR ; Set DLAB=1 cho php nh tc ; truyn d liu

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Ti liu Cu trc my tnh v Hp ng

T chc vo / ra

MOV DX,Com1 MOV AL,0Ch OUT DX,AL MOV DX,Com1+1 MOV AL,00h OUT DX,AL MOV DX,Com1+3 MOV AL,03h OUT DX,AL

; Gi byte thp

; Gi byte cao=000Ch: xc nh ; tc truyn 9600bps ; ; ; ; ; LCR = 0000 0011B DLAB=0, SBCB=0 cm Break PS = 000 no parity STB = 0 1 stop bit WLS = 11 8 bit d liu

MOV DX,Com1+4 MOV AL,03h OUT DX,AL MOV DX,21h IN AL,DX MOV Mask_int,AL AND AL,0EFh OUT DX,AL MOV AL,01h MOV DX,Com1+1 OUT DX,AL MOV AH,09h LEA Dx,Msg INT 21h Lap: MOV INT CMP JE MOV CMP JE MOV MOV INC MOV AH,0Bh 21h AL,0FFh Exit

; Tc ng n DTR v RTS ; MCR=00000011b DTR=RTS = 1 ; ng DTR v RTS ca cng ; ni tip = 0 ; Kim tra trng thi ngt ; D7 D0 xc nh cc IRQi ; =0: cho php, =1: cm ; =1110 1111b cho php IRQ4 ; cho php COM1 ; IER = 0000 0001b ; ngt khi RBR y cho php

AL,bufferin AL,bufferout Lap AL,buffer[bufferout] char,AL bufferout AL,bufferout

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GV: Phm Hng Kim Khnh

Ti liu Cu trc my tnh v Hp ng

T chc vo / ra

CMP JNE MOV Next: MOV MOV INT MOV MOV OUT JMP

AL,251 Next bufferout,0 DL,char AH,02h 21h AL,char DX,Com1 DX,AL Lap ; Xut gi tr ra mn hnh

; Xut ra cng ni tip

Exit: MOV AL,Mask_int OUT 21h,AL MOV MOV MOV MOV MOV INT DX,Off_com BX,Seg_com DS,BX AH,35h AL,Com_int 21h

; Khi phc trng thi ngt

;Khi phc vector ngt

MOV AH,4Ch INT 21h Main ENDP Com_ISR MOV IN AND JZ PROC DX,Com1+5 AL,DX AL,1 exit_ISR ; c ni dung LSR ; Nu D0 = 1 th c d liu

MOV DX,Com1 IN AL,DX MOV buffer[bufferin],AL INC bufferin MOV AL,bufferin CMP AL,251 JNE Exit_ISR MOV bufferin,0 Exit_ISR: MOV AL,20h ; Bo cho PIC kt thc ngt OUT 20h,AL IRET Com_ISR ENDP END Main
GV: Phm Hng Kim Khnh Trang 115

Ti liu Cu trc my tnh v Hp ng

T chc vo / ra

2. Giao tip PC Game

Cu trc v chc nng ca board ghp ni tr chi (PC game) nh hnh bn di. Bng lnh IN v OUT c th truy xut qua a ch 201h.
P1 1 9 2 10 3 11 4 12 5 13 6 14 7 15 8

JOYTICK A

Mach ghep noi bus

Bo dem

JOYTICK B

Mach da hai

CONNECTOR DB15

Hnh 5.5 - Cu trc v chc nng ca board ghp ni tr chi

JOYTICK A Phm 1 Rx Ry
1 9 2 10 3 11 4 12 5 13 6 14 7 15 8 CONNECTOR DB15 P1

JOYTICK B Phm 1

Rx

Ry

Phm 2

Phm 2

Hnh 5.6 - Cu to ca u ni 15 chn v 2 joystick A v B

Chn ca u ni 15 chn 2 3 6 7 10 11 13 14 1, 8, 9, 15 4, 5, 12

S dng cho Phm 1 ca Joystick A (BA1) Bin tr X ca Joystick A Bin tr Y ca Joystick A Phm 2 ca Joystick A (BA2) Phm 1 ca Joystick A (BB1) Bin tr X ca Joystick B Bin tr Y ca Joystick B Phm 2 ca Joystick A (BB2) Vcc (+5V) GND (0V)

Board mch c ni vi bus h thng ca PC ch qua 8 bits thp ca bus d liu, 10 bits thp ca bus a ch v cc ng iu khin IOR v IOW . Mt u ni 15 chn c ni vi board mch cho php ni cc i hai thit b cho PC game gi l joystick. Mi joystick c 2 bin tr c gi tr bin i t 0 n 100k c t vung gc vi nhau i din cho v tr x v y ca joystick. Thm na chng c 2 phm bm, thng l cc cng tc thng h ph hp vi cc mc logic cao ca cc dy trn mch.
GV: Phm Hng Kim Khnh Trang 116

Ti liu Cu trc my tnh v Hp ng

T chc vo / ra

C th xc nh c trng thi nhn hoc nh phm mt cch d dng bng lnh IN ti a ch 201h. Nibble cao ch th trng thi ca phm. V board khng dng ng IRQ do khng c kh nng pht ra 1 ngt, do vy board ch hot ng trong ch hi vng (polling). Byte trng thi ca board game nh sau: D7 BB2 D6 BB1 D5 BA2 D4 BA1 D3 BY D2 BX D1 AY D0 AX

BB2, BB1, BA2, BA1: Trng thi ca cc phm B2, B1, A2, A1; 1 = nh; 0 = nhn BY, BX, AY, AX: Trng thi ca mch a hi tu thuc vo bin tr tng ng.

3. Giao tip vi bn phm v mouse

3.1. Bn phm
3.1.1. Nguyn l hot ng
Keyboard Keyboard Interface IRQ1 IRQ Logic Y- Decoder

D0 D1 D2 D3 D4 D5 D6 D7

Serial Interface (PC/XT) or Keyboard Controller 8042/8741/8742 (AT ect)

11 bits SDU Keyboard chip X - Decoder

Scan Matrix

Keyboard cable

Scan Enable

Hnh 5.7 - S nguyn l v cc ghp ni ca bn phm Chip x l bn phm lin tc kim tra trng thi ca ma trn qut (scan matrix) xc nh cng tc ti cc ta X, Y ang c ng hay m v ghi mt m tng ng vo b m bn trong bn phm. Sau m ny s c truyn ni tip ti mch ghp ni bn phm trong PC. Cu trc ca SDU (Serial Data Unit) cho vic truyn s liu: 0 10 STRT DB0 DB1 DB2 DB3 DB4 DB5 DB6 DB7 PAR STOP STRT: bit start (lun bng 0) DB0 - DB7: bit s liu t 0 n 7. PAR: bit parity (lun l) STOP: bit stop (lun bng 1).
GV: Phm Hng Kim Khnh Trang 117

Ti liu Cu trc my tnh v Hp ng

T chc vo / ra

Chn 1: clock Chn 2: d liu Chn 3: Reset Chn 4: GND Chn 5: Vcc Hnh 5.8 u cm bn phm AT

Chn 1: d liu Chn 2: khng dng Chn 3: GND Chn 4: Vcc Chn 5: clock Chn 6: khng dng Hnh 5.9 u cm bn phm PS/2 Mi phm nhn s c gn cho 1 m qut (scan code) gm 1 byte. Nu 1 phm c nhn th bn phm pht ra 1 m make code tng ng vi m qut truyn ti mch ghp ni bn phm ca PC. Ngt cng INT 09h c pht ra qua IRQ1. Chng trnh x l ngt s x l m ny tu theo phm SHIFT c c nhn hay khng. V d: nhn phm SHIFT trc, khng ri tay v sau nhn C: make code c truyn - 42(SHIFT) - 46 (C). Nu ri tay nhn phm SHIFT th bn phm s pht ra break code v m ny c truyn nh make code. M ny ging nh m qut nhng bit 7 c t ln 1, do vy n tng ng vi make code cng vi 128. Tu theo break code, chng trnh con x l ngt s xc nh trng thi nhn hay ri ca cc phm. Th d, phm SHIFT v C c ri theo th t ngc li vi th d trn: break code c truyn 174 ( bng 46 cng 128 tng ng vi C) v 170 (bng 42 cng 128 tng ng vi SHIFT). Phn cng v phn mm x l bn phm cn gii quyt cc vn vt l sau: Nhn v nh phm nhng khng c pht hin.

GV: Phm Hng Kim Khnh

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Ti liu Cu trc my tnh v Hp ng

T chc vo / ra

Kh nhiu rung c kh v phn bit 1 phm c nhn nhiu ln hay c nhn ch 1 ln nhng c gi trong mt khong thi gian di.

3.1.2. Lp trnh giao tip qua cc cng Bn phm cng l mt thit b ngoi vi nn v nguyn tc c th truy xut n qua cc cng vo ra. Cc thanh ghi v cc port:

S dng 2 a ch port 60h v 64h c th truy xut b m vo, b m ra v thanh ghi iu khin ca bn phm.
Port 60h 60h 64h 64h Thanh ghi m ng ra m ng vo Thanh ghi iu khin Thanh ghi trng thi R/W R W W R

Thanh ghi trng thi xc nh trng thi hin ti ca b iu khin bn phm. Thanh ghi ny ch c (read only) v c bng lnh IN ti port 64h.

7 PARE

TIM

AUXB

KEYL

C/D

SYSF

INPB

0 OUTB

PARE: Li chn l ca byte cui cng c vo t bn phm; 1 = c li chn l, 0 = khng c. TIM: Li qu thi gian (time-out); 1 = c li, 0 = khng c. AUXB: m ra cho thit b ph (ch c my PS/2); 1 = gi s liu cho thit b, 0 = gi s liu cho bn phm. KEYL: Trng thi kha bn phm; 1 = khng kha, 0 = kha. C/D: Lnh/d liu; 1 = Ghi qua port 64h, 0 = Ghi qua port 60h. SYSF: c h thng; 1 = t kim tra thnh cng, 0 = reset khi cp in INPB: Trng thi m vo; 1 = d liu CPU trong b m vo, 0 = m vo rng. OUTB: Trng thi m ra; 1 = d liu b iu khin bn phm trong b m ra, 0 = m ra rng.
Thanh ghi iu khin Cc lnh cho b iu khin bn phm: M A7h A8h A9h M t

Cm thit b ph Cho php thit b ph Kim tra giao tip thit b ph v lu m kim tra vo b m ra 00h: khng li 01h: CLK mc thp 02h: CLK mc cao 03h: DATA mc thp 04h: DATA mc cao
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GV: Phm Hng Kim Khnh

Ti liu Cu trc my tnh v Hp ng

T chc vo / ra

AAh ABh ADh AEh C0h C1h C2h D0h D1h D2h D3h D4h

FFh: li khc T kim tra (ghi 55h vo b m ra nu khng li Kim tra giao tip bn phm v lu m kim tra vo b m ra Cm bn phm Cho php bn phm c cng vo v truyn d liu n b m ra c cc bit 3 0 ca cng vo v truyn n cc bit 3- 0 ca thanh ghi trng thi cho n khi INPB = 1 c cc bit 7 4 ca cng vo v truyn n cc bit 7- 4 ca thanh ghi trng thi cho n khi INPB = 1 c cng ra Ghi cng ra Ghi vo b m ra v xo AUXB Ghi vo b m ra v set AUXB Ghi byte d liu tip theo vo thit b ph Kha bn phm: Start: IN AL, 64h TEST AL, 02h JNZ start OUT 64h, 0ADh ; c byte trng thi ; kim tra b m c y hay khng ; kha bn phm

Keyboard Controller Input Buffer

60h

PC System Bus

60h

64h

Control Register

Output Buffer

Output Port

Keyboard

64h

Hnh 5.10 - B iu khin bn phm

GV: Phm Hng Kim Khnh Trang 120

Status Register

Input Port

PS/2 only

Ti liu Cu trc my tnh v Hp ng

T chc vo / ra

Cc lnh cho bn phm: M Lnh EDh Bt/tt LED EEh Echo F0h t/nhn dng m qut M t Bt/tt cc n led ca bn phm Tr v byte EEh t 1 trong 3 tp m qut v nhn din cc m qut tp m qut hin ti. Nhn din ACK = AT, ACK+abh+41h=MF II. t tc lp li v thi gian tr ca bn phm Cho php bn phm hot ng t gi tr chun v cm bn phm. t gi tr chun v cho php bn phm. Bn phm truyn k t cui cng mt ln na ti b iu khin bn phm Chy reset bn trong bn phm

F2h F3h F4h F5h F6h FEh FFh

Nhn din bn phm t tc lp li/tr Enable Chun/khng cho php Chun/cho php Resend Reset

Th d: lnh bt n led cho phm NUMCLOCK, tt tt c cc n khc.

MOV AL,0EDh OUT 60H, AL WAIT: IN AL, 64H ; c thanh ghi trng thi JNZ WAIT MOV AL,02h OUT 60H, AL ; bt n cho numclock Cu trc ca byte ch th nh sau: 7 0 0 CPL: NUM: SCR: 2 1 0 0 0 0 CPL NUM SCR 1 = bt n Caps Lock; 0 = tt 1 = bt n Num Lock; 0 = tt 1 = bt n Scroll Lock; 0 = tt

3.1.3. Lp trnh giao tip qua cc hm ca DOS, BIOS BIOS ghi cc k t do vic nhn cc phm vo b m tm thi c gi l b m bn phm (keyboard buffer), c a ch 40h:1Eh, gm 32 byte v kt thc a ch 40h:3Dh. Mi k t c lu tr bng 2 byte, byte cao l m qut, v byte thp l m ASCII. Chng trnh x l ngt s xc nh m ASCII t m qut bng bng bin i v ghi c 2 m vo b m bn phm. B m bn phm c t chc nh b m vng (ring buffer) v c qun l bi 2 con tr. Cc gi tr con tr c lu tr trong vng d liu ca BIOS a ch 40h:1Ah v 40h:1Ch. Con tr ghi (40h:1Ch) cho bit v tr cn trng k tip ghi k t nhp, con tr c (40h:1Ah) cho bit v tr k t u tin s c. T , b m bn phm rng khi con tr ghi v con tr c trng nhau b m ch cha c 15 k t.

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Cc hm ca ngt 16h: Hm 0h - c k t t bn phm, nu khng nhn th s ch

Ra: AH = scancode, AL = m ASCII. Nu phm nhn l cc phm c bit th AL = 0

Hm 1h - ZF = 1 nu khng c k t trong b m. Gi tr tr v ging nh hm 00h nhng khng xo k t ra khi b m Hm 2h - Tr v trng thi ca cc phm, kt qu cha trong AL

7 INS

6 CAPS LOCK

5 NUM LOCK

4 SCROLL LOCK

1 LEFT SHIFT

0 RIGHT SHIFT

ALT CTRL

Hm 10h - Ging hm 00h nhng tr v m m rng Hm 11h - Ging hm 01h nhng tr v m m rng Hm 12h - Ging hm 02h nhng AH cha thm cc thng tin

7 SYS REQ

6 CAPS LOCK Cc th d: -

5 NUM LOCK

4 SCROLL LOCK

3 RIGHT ALT

2 RIGHT CTRL

1 LEFT ALT

0 LEFT CTRL

Gi s phm c c nhn.

MOV AH,00h INT 16h Kt qu: AH = 2Eh (m qut cho phm a); AL = 63h (ASCII cho c) - Gi s phm HOME c nhn. MOV AH,00h INT 16h Kt qu: AH = 47h ( m qut cho phm HOME) AL = 0 (cc phm chc nng v iu khin khng c m ASCII) - Gi s phm HOME c nhn. MOV AH,10h INT 16h Kt qu: AH = 47h (m qut cho phm HOME) AL = E0h

3.2. Chut
3.2.1. Cu to Cu to ca chut rt n gin, phn trung tm l 1 vin bi thp c ph keo hoc nha c quay khi dch chuyn chut. Chuyn ng ny c truyn ti 2 thanh nh c t vung gc vi nhau. Cc thanh ny s bin chuyn ng ca chut theo 2 hng X,Y thnh s quay tong ng ca 2 a gn vi chng. Trn 2 a c nhng l nh lin tc ng v ngt 2 chm sng ti cc sensor nhy sng to ra cc xung in. S cc xung in t l vi lng chuyn ng ca chut theo cc hng X,Y v
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s xung trn 1 sec biu hin tc ca chuyn ng chut. Km theo c 2 hay 3 phm bm.
Te bao nhay sang Truc lan Vien bi Nguon sang Y

Di cong COM

Bo khuech dai
X

Hnh 5.11 - S cu to ca chut

3.2.2. Mch ghp ni v chng trnh iu khin chut Hu ht chut c ni vi PC qua cng ni tip, qua chut cng c cp ngun nui t PC. Khi dch chuyn hoc nhn, nh cc phm chut, n s pht ra mt gi cc s liu ti mch giao tip v mch s pht ra 1 ngt. Phn mm iu khin chut lm cc nhim v: chuyn ngt ti mch giao tip ni tip xc nh, c gi s liu v cp nht cc gi tr bn trong lin quan ti trng thi ca bn phm cng nh v tr ca chut. Hn na, n cn cung cp 1 giao tip mm qua ngt ca chut l 33h nh cc gi tr bn trong ny cng nh lm dch chuyn con tr chut trn mn hnh tng ng vi v tr ca chut.

C th chn kiu con tr chut cng hoc mm trong ch vn bn hay con tr chut ho trong ch ha. Cc hm 09h v 0Ah trong ngt 33h cho php nh ngha loi v dng con tr chut.
3.2.3. Chng trnh vi con tr Ngt 33h cho php xc nh v tr, s ln click chut v hnh dng con tr (s th t hm cha trong AX). Hm ngha Tham s Ra: AX = 0: nu c, = 1: khng BX = s nt nhn

0 1 2 3

Reset chut Hin th con tr n con tr Nhn v tr con tr v trng thi nt

Ra: BX: trng thi nt (D0: nt tri, D1: nt phi, D2: nt

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6 7 8

gia) (= 0: nh, = 1: nhn) CX: v tr ngang DX: v tr dc Vo: CX: v tr ngang t v tr con tr DX: v tr dc Vo: BX = nt kim tra (=0: tri, =1: phi) Ra: AX = trng thi nt Trng thi nt v s ln nhn t khi gi BX = s ln nhn CX: v tr ngang DX: v tr dc ln nhn cui Ging hm 05h nhng kim tra s ln nh Gii hn dch chuyn ngang ca con Vo: CX = ct tri tr DX = ct phi Vo: CX = dng di Gii hn dch chuyn dc ca con tr DX = dng trn Vo: BX = v tr ngang CX = v tr dc Xc nh hnh dng con tr ho ES:DX: a ch mt n mn hnh v con tr Vo: BX = 0: con tr phn mm CX = mt n mn hnh DX = mt n con tr Xc nh hnh dng con tr vn bn BX = 1: con tr phn cng CX = dng bt u DX = dng kt thc

Ch rng to con tr xc nh theo pixel vi phn gii 640x200 trong khi ch vn bn s dng to k t 80x25 nn chuyn sang to k t th phi chia cho 8. Con tr chut hin th trn mn hnh ho bng cch thc hin: T mi = (t c AND mt n mn hnh) XOR mt n con tr Nu ta t mt n mn hnh l 0 th k t mn hnh ti s b xo.
VD: Con tr chut mm nhp nhy v cha k t A MOV MOV MOV MOV MOV INT AH,0Ah BX,0 CX,0 ; mt n mn hnh = 0 DH,8Bh;=10001011b mu nn Gray, mu k t Cyan DL,A 33h

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VD: Con tr chut cng c cc ng qut 3 v 8 MOV MOV MOV MOV INT AH,0Ah BX,1 CX,03h DX,08h 33h

4. Monitor v card giao tip ho

4.1. Nguyn l hin nh trn monitor
Phng php hin nh trn mn hnh ca monitor my tnh cng ging nh trong my thu hnh thng thng. Hnh bn di minh ha vic hin nh trn mn hnh kiu ng phng tia m cc CRT (cathode ray tube).
Vertical Deflection Fluorescent Screen

Horizontal Deflection

Cathode

Anode Electron Beam

Hnh 5.12 Cu to ng hnh CRT Cc in t pht x t cathode trong ng c hi t thnh 1 chm tia, sau c tng tc v c lm lch hng chuyn ng bi cc b phn li tia. Tia ny s p vo mn hnh c ph cht hunh quang to thnh 1 im sng gi l 1 im nh. Do hin tng lu nh trong vng mc ca mt ngi nn khi tia in t c qut rt nhanh theo chiu ngang t tri sang phi s to nn 1 vt sng ngang c gi l dng qut. n cui 1 dng, n c qut ngc tr v bn tri qut tip dng th 2 bn di ..v..v.. Qu trnh qut cc dng c dch dn t trn xung di cho sut chiu dc ca mn hnh c gi l qut dc. chi (sng ti) c quyt nh bi cng chm tia p vo mn hnh hunh quang v 1 im mu t nhin c hin nh s trn ln ca 3 mu: , xanh dng, xanh l cy theo 1 t l no . Ba mu ny c hin nh 3 tia in t cng bn vo 3 im trn mn hnh k cn nhau, mi im c ph cht hunh quang pht ra cc mu tng ng. 3 chm tia in t c pht ra bi 3 sng in t l 3 cathode c xp t bn trong CRT mt cch cn thn. C 2 kiu qut tia in t: Qut xen k (interlaced): cc dng l c qut trc cho n ht mn hnh theo chiu dc, gi l mnh l; sau cc dng chn to nn mnh chn c qut sau. Phng php ny c u im l thu hp c di tn s lm vic ca thit b nhng c nhc im l hnh nh b nhp nhy.

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Qut khng xen k (non-interlaced): cc dng qut c thc hin tun t. u im l hnh nh c iu chnh chnh xc v n nh nhng thit k mch in s kh hn v phi gii quyt vn tng di tn lm vic.

Hin nay cn c cc monitor dng mn hnh tinh th lng LCD hoc ng cha kh c hot ng theo nguyn l tng t nh trn nhng khng c tia in t qut nn thay v cc im nh ring bit l cc phn t pht sng c nh a ch mt cch tun t. Do vy, trn cc monitor ny hnh nh cng c pht ra tng dng mt. Qu trnh qut ngc cng khng cn na v y n gin ch vic thay i a ch v phn t u dng tip theo.

4.2. Card giao tip ha

hin cc hnh nh, k t, hay hnh v trn mn hnh, PC phi thng qua mch ghp ni mn hnh (graphics adapter). Board mch ny thng c cm trn khe cm m rng ca PC. S khi nh hnh sau: Attribute Information Character Rom Character code CRTC Character Generator Shift Register Attribute Decoder

Bus Interfa ce

Video Ram

Signal Generator

M o ni to r

Synchronization information Hnh 5.13 - S khi ca bn mch ghp ni mn hnh Bus Interface: ghp ni bus; Signal generator: my pht tn hiu; Attribute information: thng tin thuc tnh; Attribute decoder: b gii m thuc tnh; Character generator: my pht k t; Video Ram: Ram Video Character code: m k t Character rom: rom k t Shift register: thanh ghi dch Synchronization information: thng tin ng b.

Phn trung tm l chip iu khin ng hnh CRTC (cathode ray tube controller). CPU thm nhp RAM Video qua mch ghp ni bus ghi thng tin xc nh k t hay hnh v cn hin th. CRTC lin tc pht ra cc a ch Ram video c cc k t trong v truyn chng ti my pht k t (character generator). Trong ch vn bn (text mode), cc k t c xc nh bi m ASCII, trong c c cc thng tin v thuc tnh ca k t, th d k t c hin theo cch nhp nhy hay o mu en trng .ROM k t (character rom) lu tr cc hnh mu im nh ca cc k t tng ng my pht k t bin i cc m k t thnh 1 chui cc bit im nh (pixel bit) v chuyn chng ti thanh ghi dch (shift register). My pht tn hiu s s dng cc bt im nh ny cng vi cc thng tin thuc tnh t
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T chc vo / ra

Ram video v cc tn hiu ng b t CRTC pht ra cc tn hiu cn thit cho monitor. Trong ch ha (graphics mode), thng tin trong RAM video c s dng trc tip cho vic pht ra cc k t. Lc ny cc thng tin v thuc tnh cng khng cn na. Ch t cc gi tr bit trong thanh ghi dch, my pht tn hiu s pht cc tn hiu v sng v mu cho monitor.
4.2.1. My pht k t trong cc ch vn bn v ha: Mi k t c biu din bi 1 t 2 byte trong RAM video. Byte thp cha m k t, byte cao cha thuc tnh. Cu trc ca mt t nh video nh sau:

15 BLNK 7 CHR7

14 BAK2 6 CHR6

13 BAK1 5 CHR5

12 BAK0 4 CHR4

11 INT 3 CHR3

10 FOR2 2 CHR2

9 FOR1 1 CHR1

8 FOR0 0 CHR0

BLNK: BAK2 BAK0: INT: FOR2 FOR0: CHR7CHR0:

Nhp nhy; 1 = bt, 0 = tt Mu nn; (t bng mu hin ti) Cng sng ; 1 = cao, 0 = bnh thng Mu nn trc (t bng mu hin ti) M k t.

Trong ch vn bn, 6845 lin tc xut cc a ch cho RAM video qua MA0MA13. K t gc tn cng pha trn bn tri mn hnh c a ch thp nht m 6845 s cung cp ngay sau khi qut dc ngc. Logic ghp ni nh a ch cho RAM video bng vic ly ra m k t cng vi thuc tnh. M k t dng cho my pht k t nh l ch s th nht trong ROM k t. Lc ny, 6845 nh a ch hng qut u tin ca ma trn k t, a ch hng bng 0. Cc bit ca ma trn im nh by gi s c truyn ng b vi tn s video t thanh ghi dch ti my pht tn hiu. Nu my pht tn hiu nhn c gi tr 1 t thanh ghi dch, n s pht tn hiu video tng ng vi mu ca k t. Nu nhn c 0 n s cp tn hiu tng ng vi mu nn. Vy dng qut th nht c hin ph hp vi cc ma trn im nh ca cc k t trong hng k t th nht. Khi tia in t t ti cui dng qut, 6845 kch hot li ra HS to ra qu trnh qut ngc v ng b ngang. Tia in t quay tr v bt u qut dng tip. Sau mi dng qut, 6845 tng gi tr RA0-RA4 ln 1. a ch dng ny hnh thnh mt gi tr offset bn trong ma trn im nh cho k t c hin. Da trn mi dng qut nh vy, mt dng cc im nh ca k t trong hng k t c hin ra. iu ny c ngha l vi ma trn 9x14 im nh cho 1 k t, hng k t th nht c hin sau 14 dng qut. Khi a ch RA0-RA4 tr v gi tr 0, 6845 s cp 1 a ch MA0-MA13 mi v hng k t th hai s c hin ra cng nh vy. cui dng qut cui cng, 6845 s reset a ch MA0-MA13 v RA0-RA4 v cho php li ra VS pht ra tn hiu qut ngc cng tn hiu ng b dc. Mi k t c chiu cao cc i ng vi 32 dng v c 5 ng a ch RA0RA4, cn b nh video trong trng hp ny c ti 16K t v c a ch MA0MA13 l 14 bit. Trong ch ha, chng kt hp vi nhau to thnh a ch 19 bit, lc 6845 c th nh a ch cho b nh video ln ti 512k t. Trong trng hp
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ny, cc byte trong RAM video khng c dch thnh m k t v thuc tnh na m trc tip xc nh cng sng v mu ca im nh. a s cc RAM video c chia thnh vi bng c nh a ch bi RA0-RA4. Cc ng MA0-MA13 s nh a ch offset bn trong mi bng. S liu trong RAM video lc ny c trc tip truyn ti thanh ghi dch v my pht tn hiu. ROM k t v my pht k t khng lm vic.
4.2.2. T chc ca RAM video RAM video c t chc khc nhau tu theo ch hot ng v bn mch ghp ni. Th d, vi RAM video 128 KB, c th a ch ha ton b b nh mn hnh qua CPU nh b nh chnh. Nhng nu kch thc RAM video ln hn th lm nh vy s ln vng ROM m rng i ch C0000h. Do , card EGA v VGA vi trn 128 KB nh c tng cng thm 1 chuyn mch mm (soft-switch) cho php thm nhp cc ca s 128 KB khc nhau vo RAM video ln hn nhiu. Cc chuyn mch ny c quy nh bi ring cc nh sn xut board mch. 4.2.2.1. T chc trong ch vn bn RAM video c coi nh mt dy t tuyn tnh, t u tin c gn cho k t gc trn tn cng bn tri mn hnh gi l hng 1 ct 1. T th 2 l hng 1, ct 2, . S t tu thuc vo phn gii ca kiu hin k t.

Th d: phn gii chun 25 hng, 80 k t i hi 2000 t nh 2 byte. Nh vy, tng cng cn 4 KB b nh RAM video. Trong khi vi card c phn gii cao SVGA 60 hng, 132 k t cn n 15840 byte. Do RAM video thng c chia thnh vi trang. Kch thc ca mi trang tu thuc vo ch hin ca mn hnh v s trang cc i, ph thuc c vo kch thc ca RAM video. 6845 c th c chng trnh ha sao cho a ch khi pht ca MA0-MA13 sau qut ngc dc l khc 00h. Nu a ch khi pht l bt u ca 1 trang th c th qun l RAM video theo vi trang tch bit nhau, nu CPU thay i ni dung ca 1 trang m trang hin ang khng hin th mn hnh cng khng thay i. Do , cn phn bit trang nh ang c kch hot (ang hin) v trang ang c x l. on chng trnh ghi k t 'A' c cng sng cao vo gc trn bn tri vi mu s 7 v mu nn s 0. Trang th nht v l duy nht bt u a ch B0000h. MOV AX, 0B000h; MOV ES, AX; MOV AH, 0F8h; MOV AL, 41h; MOV ES:[00H],AX; np thanh ghi ax vi a ch on ca Ram video truyn a ch on vo ES np byte thuc tnh 1111 1000 vo AH np m k t ca A vo AL ghi byte thuc tnh v m k t vo RAM video.

4.2.2.2. T chc trong ch ha: T chc trong ch ny phc tp hn. V d: vi bn mch Hercules, RAM video c chia thnh 4 bng trn 1 trang . Bng th nht: m bo cc im nh cho cc dng 0, 4, 8, , 344; bng th hai cho cc dng 1, 5, 9, , 345; bng th 3 cho cc dng 2, 6, 10, ., 346; v bng th 4 cho cc dng 3, 7, 11, , 347. 64 KB c chia thnh 2 trang 32 KB. phn gii trong ch ha l 720 x 348 im nh, mi im nh c biu din bi 1 bit. Do vy, mt dng cn 90 byte (720 im nh /
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8 im nh trn 1 byte). a ch ca byte cha im nh thuc ng i v ct j trong trang k l: B0000h+8000h*k+2000h*(i mod 4)+ 90*int(i/4)+int(j/8) B0000h l on video, 8000h l kch thc ca trang, 2000h*(i mod 4) l offset ca bng cha byte , 90*int(i/4) l offset ca dng i trong bng v int(j/8) l offset ca ct j trong bng. Trong bn mch CGA b nh video c chia thnh 2 bng cn vi EGA v VGA th phc tp hn.
4.2.3. Truy xut mn hnh qua DOS v BIOS 4.2.3.1. Truy xut qua DOS Cc hm ca int 21h c th hin cc k t trn mn hnh nhng khng can thip c vo mu:

- Hm 02h: ra mn hnh. - Hm 06h: ra mt k t. - Hm 09h: ra mt chui. - Hm 40h: ghi file/ thit b T DOS 4.0 tr i c th dng lnh mode iu chnh s ct vn bn t 40 n 80 hay s dng t 25 n 50. Cc lnh copy, type v print trong command.com cho php hin text trn mn hnh. DOS gp chung bn phm v monitor thnh 1 thit b mang tn CON (console). Ghi CON l truyn s liu ti monitor, cn c CON l nhn k t t bn phm. V d: hin ni dung ca file output.txt ln mn hnh ca monitor s c cc cch sau: copy output.txt con type output.txt > con print output.txt /D:con

4.2.3.2. Truy xut qua BIOS Bios thm nhp monitor bng int 10h vi nhiu chc nng hn DOS, nh t ch hin hnh, qun l t ng cc trang, phn bit cc im trn mn hnh nh cc ta , Nhng thng trnh ha:

BIOS trn main board c sn nhng hm dng cho thm nhp MDA v CGA. BIOS ca ring EGA v VGA c nhng hm m rng tng ng trong khi vn gi nguyn nh dng gi. Mt trong nhng hm quan trng nht ca int 10h l hm 00h dng t ch hin hnh. thay i ch hin hnh cn phi lm rt nhiu bc chng trnh phc tp np cc thanh ghi ca chip 6845. Trong khi , hm 00h lm cho ta tt c cc cng vic ny. Th d: to kiu 6 vi phn gii 640*200 trn CGA. Mov ah, 00h Mov al, 06h Int 10h
GV: Phm Hng Kim Khnh

; hm 00h ; ch 6 ; gi ngt
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T chc vo / ra

Cc board EGA/VGA c ring BIOS ca chng. Trong qu trnh khi ng PC, n s chn int 10h li v chy chng trnh BIOS ca ring board mch. Thng trnh c (ca BIOS trn board mach chnh ) c thay a ch ti int 42h. Tt c cc lnh gi int 10h s c BIOS ca EGA/VGA thay a ch ti int 42h nu board mch EGA/VGA ang chy cc kiu hin tng thch vi MDA hay CGA. C cc kiu hot ng t 0 n 7. BIOS ca EGA/VGA dng vng 40:84h ti 40:88h lu s liu BIOS v cc thng s ca EGA/VGA. N c cc hm mi vi cc hm ph sau: Hm 10h: truy xut cc thanh ghi mu v bng mu Hm 11h: ci t cc bng nh ngha k t mi Hm 12h: t cu hnh h con video Hm 1Bh: thng tin v trng thi v chc nng ca BIOS video (ch c VGA) Hm 1Ch: trng thi save/restore ca video (ch c VGA)

Sau y l chc nng ca cc hm v th d s dng chng: Hm 10h, hm ph 03h xo/t thuc tnh V d: Xo thuc tnh nhp nhy: Mov ah, 10h ; dng hm 10h Mov al, 03h ; dng hm ph 03h Mov bl, 00h ; xo thuc tnh nhp nhy Int 10h ; gi ngt Hm 11h ghp ni vi my pht k t

V d: Np bng nh ngha k t 8*14 khng cn chng trnh CRTC: Mov ah, 11h ; dng hm 11h Mov al, 01h ; np bng k t t Rom Bios vo Ram my pht k t. Mov bl, 03h ; gn s 3 cho bng Int 10h ; gi ngt Hm 12h, hm ph 20h chn thng trnh in mn hnh. Dng hm ph ny c th thay th thng trnh chun cho INT 05h bng thng trnh c th dng cho cc phn gii mi ca EGA/VGA.

V d: Cho php thng trnh mi in mn hnh: Mov ah, 12h ; dng hm 12h Mov bl, 20h ; dng hm ph 20h n PRINT hoc SHIFT+PRINT gi thng trnh in c lp t.

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Truy xut trc tip b nh video:

v 1 im trn mn hnh, BIOS phi lm nhiu th tc nhng nu mun v ton b 1 ca s hnh hay l tr th phi truy xut trc tip RAM video. Vi board n sc MDA trong kiu hin vn bn s 7, 4 KB RAM uc t chc nh 1 dy (array) gm 2000 t nh k nhau ( mi t l m thuc tnh: k t) to nn 25 dng, 80 ct. RAM video bt u an B0000h, trong k t gc trn cng bn tri l t th nht trong RAM video. Nh vy mi dng c 160 byte (A0h). a ch ca t nh ng vi k t dng i, ct j (i = 024, j = 0-79) c tnh theo cng thc sau: Address (i,j) = B0000h +A0h*i +02h*j. Vi board EGA, kiu hin vn bn t 0 n 3 m k t c lu tr trong lp nh 0 cng vi thuc tnh trong lp 1 ca RAM video. Mch logic chuyn a ch trn board thc hin s kt hp nht nh no sao cho t chc v cu trc ca RAM video cng nh cch tnh a ch vn tng ng vi cch ca CPU. Trong ch ha t 13 n 16, RAM video bt u t a ch on A000h. Cc im nh c xp k cn nhau trong b nh v mi im nh i hi 4 bit, cc bit ny c phn ra 4 lp nh. Nh vy a ch ca 1 trong 4 bit ny trn 1 im nh khng ch gm on video v offset m cn thm vo s lp nh na. a ch bit

Lp 3 Lp 2 Lp 1 3 Lp 0 2 Bit mu 1 0 RAM video EGA

Mn hnh

Hnh 5.14 - Cc lp nh ca RAM Video hin 1 im nh vi 1 trong 16 mu, khng phi ch tnh a ch bit m cn phi thm nhp 4 lp nh. Mun vy, phi dng thanh ghi mt n bn (map mask register). Thanh ghi ny c nh a ch qua cng ch s 3C4h vi a ch 02h v c th c ghi qua cng s liu 3C5h. Cu trc ca thanh ghi mt n bn nh sau:

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7 Res

6 Res

5 Res

4 Res

3 LY3

2 LY2

1 LY1

0 LY0

Thm nhp ghi ti cc lp t 0 3; LY3-LY0: 1 = cho php; 0 = khng cho php Res : D tr V d: t bit 0 ca byte a ch A000:0000h cho l 0, 1, 3. Mov AX, 0A000h Mov ES, AX Mov BX, 0000h Out 3C4h, 02h Out 3C5h, 0Bh Mov 3C5h, 0Bh ; np an video vo AX ; truyn an video vo ES ; np offset 0000h vo BX ; ch s 2 thanh ghi mt n bn ; ghi 0000 1011b vo thanh ghi mt n bn (cho php lp 0, 1, 3) ; t bit 0 trong cc lp 0, 1 v 3

lu tr ni dung mn hnh cn phi c cc gi tr bit ca 4 lp khi dng thanh ghi chn bn c (read map select register). N c nh a ch vi ch s 04h qua cng ch s 3CEh, v c th c ghi qua cng s liu 3CFh. Cu trc ca thanh ghi ny: 7 res 6 res 5 res 4 res 3 res 2 res 1 LY1 0 LY0

LY1-LY0: cho php thm nhp c vi: 00 = lp 0 01 = lp 1 10 = lp 2 11 = lp 3 res : d tr V d: c byte a ch A000:0000h cho lp 2: Mov AX, A000h Mov ES, AX Mov BX, 0000h Out 3Ceh, 04h Out 3CFh, 02h Mov AL, [ES:BX] ; np an video vo AX ; truyn an video vo ES ; np offset vo BX ; ch s 4 thanh ghi chn bn c ; ghi 0000 0010b vo thanh ghi chn bn c (cho php lp 2) ; np byte trong lp 2 vo AL.

Ch rng 4 bit ti 4 lp i din cho 1 im nh nn trong kiu hin 16 EGA c phn gii cao nht mi dng cn 80byte (640 im nh / 8 im nh trn 1 byte); mi trang mn hnh gm 32 KB. a ch byte ca im nh dng i, ct j trang k (i=0349, j=0-639, k=0-1) l: Address (i,j,k) = A0000h + 8000h*k + 50h*j + int (i/8).
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Vi board VGA, cc ch hin vn bn t 0 n 3 v 7 cng nh cc ch ha t 4 n 6 v 13 n 16 ca CGA. EGA v MDA u chy c trn n. Trong ch vn bn, m k t c lu tr trong lp nh 0 cng vi thuc tnh trong lp 1 ca RAM video VGA. Qu trnh chuyn ha a ch cng ging nh EGA nhng khc ch n vn m bo ch vn bn 7 vi phn gii 720x400, ma trn im nh 9x16. Trong ch ha 4 6 v 13 19 , mi t chc, cu trc cng nh cch tnh a ch tng t nh CGA v EGA. VGA c tng cng 3 kiu hin hnh mi t 17 n 19. Kiu 17 tng thch vi board ha ca my PS/2 kiu 30 l MCGA (multi colour graphics array). Cc im nh ch gm 1 bit (2 mu) c nh v ch trn lp 0. Th d, trong VGA kiu 17 vi 80 byte trn 1 dng (640 im nh / 8 im nh trn 1 byte). Mi trang mn hnh gm 40 KB. a ch ca byte dng i, ct j ( i= 0-479), j=0-639) nh sau: Address (i,j) = A0000h+50h*j+int (i/8) Kiu 18, 4 bit ca im nh c phn trong 4 lp nh nh EGA. Trong kiu VGA phn gii cao vi 16 mu khc nhau, 80 byte trn 1 dng (640 im nh / 8 im nh trn 1 byte), mi trang mn hnh gm 40 KB (A0000h byte); a ch ca mi byte dng i, ct j (i=0-479; j = 0-639) bng: Address (i,j) = A0000h + 50h*j + int (i/8). Kiu 19 vi 256 mu cho 1 im nh th RAM video li c t chc rt n gin nh 1 dy tuyn tnh, trong 1 byte tng ng vi 1 im nh. Gi tr ca byte phn nh mu ca im nh. Kiu ny i hi 320 byte (140h) trn 1 dng (320 im nh / 1 im nh trn 1 byte). Mt trang mn hnh gm 64 KB (10000h) nhng ch c 64000 byte c s dng. a ch ca im nh trong dng i, ct j (i = 0-199, j=0-319) l: Address (i,j) = A0000h + 140h*j + i
4.2.4. Bus cc b v chip x l ha tng tc hin ha c 2 gii php:

Dng bus cc b 32 bit trnh hin tng nghn c chai (bottleneck) do bus ISA ch c 16 bit v tc hn ch (8.33Mhz); iu ny cho php 1 lng thng tin nhiu hn c trao i gia CPU v board mch trong 1 n v thi gian. Dng chip x l ha vi BIOS ring trn board mch iu khin monitor. Chip ny s lm hu ht cc cng vic tr mt t lnh v thng s m t ni dung phn mn hnh cn hin l c cp t CPU. Th d cn v 1 hnh ch nht vi mu no , board ch cn vi thng s ban u t CPU nh ta ca 2 gc v gi tri mu l . Cch gii quyt nh vy rt c li khi PC chy trong ch a nhim.

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2. Giao tip song song

2.1. Cu trc cng song song
Cng song song gm c 4 ng iu khin, 5 ng trng thi v 8 ng d liu bao gm 5 ch hot ng: Ch tng thch (compatibility). Ch nibble. Ch byte. Ch EPP (Enhanced Parallel Port). Ch ECP (Extended Capabilities Port).

3 ch u tin s dng port song song chun (SPP Standard Parallel Port) trong khi ch 4, 5 cn thm phn cng cho php hot ng tc cao hn. S chn ca my in nh sau:
Chn M t Mc tn hiu thp, truyn d liu ti my in Bit d liu 0 Bit d liu 1 Bit d liu 2 Bit d liu 3 Bit d liu 4 Bit d liu 5 Bit d liu 6 Bit d liu 7 Mc thp: my in nhn 1 k t v c kh nng nhn na BUSY (In) Mc cao: k t c nhn; b m my in y; khi ng my in; my in trng thi offline. PAPER EMPTY Mc cao: ht giy (In) SELECT (In) Mc cao: my in trng thi online T ng xung dng; mc thp: my in xung AUTOFEED (Out) dng t ng Mc thp: ht giy; my in offline; li my ERROR (In) in Mc thp: khi ng my in INIT (Out) SELECTIN (Out) Mc thp: chn my in GROUND 0V Tn hiu STR (Out) D0 D1 D2 D3 D4 D5 D6 D7 ACK (In)

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18-25

Cng song song c ba thanh ghi c th truyn d liu v iu khin my in. a ch c s ca cc thanh ghi cho tt c cng LPT (line printer) t LPT1 n LPT4 c lu tr trong vng d liu ca BIOS. Thanh ghi d liu c nh v offset 00h, thanh ghi trang thi 01h, v thanh ghi iu khin 02h. Thng thng, a ch
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c s ca LPT1 l 378h, LPT2 l 278h, do a ch ca thanh ghi trng thi l 379h hoc 279h v a ch thanh ghi iu khin l 37Ah hoc 27Ah. Tuy nhin trong mt s trng hp, a ch ca cng song song c th khc do qu trnh khi ng ca BIOS. BIOS s lu tr cc a ch ny nh sau:
a ch Chc nng

0000h:0408h

a ch c s ca LPT1

0000h:040Ah a ch c s ca LPT2 0000h:040Ch a ch c s ca LPT3

nh dng cc thanh ghi nh sau:

Thanh ghi d liu (hai chiu): 7 6 5 4 3 2 1 0 Tn hiu my in D7 D6 D5 D4 D3 D2 D1 D0 Chn s 9 8 7 6 5 4 3 2 Thanh ghi trng thi my in (ch c): 7 6 5 Tn hiu BUSY ACK PAPER EMPTY my in S chn 11 10 12 cm Thanh ghi iu khin my in: Tn hiu my in S chn cm 7 6 5 4 DIR IRQ x x 3 SELECTIN 2 INIT 1 AUTOFEED 0 STROBE 4 3 SELECT ERROR 13 15 2 1 0 x x IRQ - -

Enable

- - -

17

16

14

x: khng s dng IRQ Enable: yu cu ngt cng; 1 = cho php; 0 = khng cho php Ch rng chn BUSY c ni vi cng o trc khi a vo thanh ghi trng thi, cc bit SELECTIN , AUTOFEED v STROBE c a qua cng o trc khi a ra cc chn ca cng my in. Thng thng tc x l d liu ca cc thit b ngoi vi nh my in chm hn PC nhiu nn cc ng ACK , BUSY v STR c s dng cho k thut bt tay. Khi u, PC t d liu ln bus sau kch hot ng STR xung mc thp thng tin cho my in bit rng d liu n nh trn bus. Khi my in x l xong d
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liu, n s tr li tn hiu ACK xung mc thp ghi nhn. PC i cho n khi ng BUSY t my in xung thp (my in khng bn) th s a tip d liu ln bus.

2.2.

Giao tip vi thit b ngoi vi

2.2.1. Giao tip vi my tnh Qu trnh giao tip vi cng song song dng 2 ch : ch chun SPP v ch m rng. Vic giao tip ch chun m t nh sau:
13 25 12 24 11 23 10 22 9 21 8 20 7 19 6 18 5 17 4 16 3 15 2 14 1 13 25 12 24 11 23 10 22 9 21 8 20 7 19 6 18 5 17 4 16 3 15 2 14 1

Hnh 5.15 - Trao i d liu qua cng song song gia 2 PC dng ch chun S chn kt ni m t nh sau:
PC1 Chc nng Chn Chn PC2 Chc nng

D0 D1 D2 D3 D4 BUSY ACK PAPER EMPTY SELECT ERROR GND

2 3 4 5 6 11 10 12 13 15 25

15 13 12 10 11 6 5 4 3 2 25

ERROR SELECT PAPER EMPTY ACK BUSY D4 D3 D2 D1 D0 GND

Ngoi ra, vic kt ni gia 2 my tnh s dng cng song song c th dng ch m rng, ch ny cho php giao tip vi tc cao hn.

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13 25 12 24 11 23 10 22 9 21 8 20 7 19 6 18 5 17 4 16 3 15 2 14 1 13 25 12 24 11 23 10 22 9 21 8 20 7 19 6 18 5 17 4 16 3 15 2 14 1

T chc vo / ra

Hnh 5.16 - Trao i d liu qua cng song song gia 2 PC dng ch m rng S chn kt ni m t nh sau:
PC1 PC2

Chc nng Chn Chn Chc nng

D0 D1 D2 D3 D4 D5 D6 D7 SELECT BUSY
ACK SELECTIN INIT STROBE

2 3 4 5 6 7 8 9 13 11 10 17 16 1

2 3 4 5 6 7 8 9 17 16 1 13 11 10

D0 D1 D2 D3 D4 D5 D6 D7 SELECTIN INIT STROBE SELECT BUSY

ACK

2.2.2. Giao tip thit b khc Qu trnh giao tip vi cc thit b ngoi vi c th thc hin thng qua ch chun. c d liu, c th dng mt IC ghp knh 2 1 74LS257 v dng 4 bit trng thi ca cng song song cn xut d liu th s dng 8 ng d liu D0 D7.

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74LS06 9 1 14 2 15 3 16 4 17 5 18 6 19 7 20 8 21 9 22 10 23 11 24 12 25 13 STROBE 3 4 7 8 13 14 17 18 11 1 D0 D1 D2 D3 D4 D5 D6 D7 CLK OE 74LS374 ACK PAPER EMPTY SELECT 74LS06 BUSY 2 74LS06 AUTO FEED 3 74LS06 SELECT IN 5 6 74LS374 4 1 4 7 9 12 74LS257 1Y 2Y 3Y 4Y 1A 2A 3A 4A 1B 2B 3B 4B A/B G 2 5 11 14 3 6 10 13 1 15 2 5 6 9 12 15 16 19 Q0 Q1 Q2 Q3 Q4 Q5 Q6 Q7 D0 D1 D2 D3 D4 D5 D6 D7 CLK OE 3 4 7 8 13 14 17 18 11 1 Q0 Q1 Q2 Q3 Q4 Q5 Q6 Q7 2 5 6 9 12 15 16 19 9 8 7 6 5 4 3 2 8 10K1

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VCC 1

SW0-7 9 8 7 6 5 4 3 2

10K

VCC 1

Hnh 5.17 Mch giao tip n gin thng qua cng my in Giao din:

Hnh 5.18 Giao din ca chng trnh giao tip vi cng my in Chng trnh giao tip trn VB s dng th vin lin kt ng trao i d liu vi cng my in. Th vin IO.DLL bao gm cc hm sau: Hm PortOut: xut 1 byte ra cng
Private Declare Sub PortOut Lib "IO.DLL" (ByVal Port As Integer, ByVal Data As Byte)

Port: a ch cng, Data: d liu xut Hm PortWordOut: xut 1 word ra cng

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Private Declare Sub PortWordOut Lib "IO.DLL" (ByVal Port As Integer, ByVal Data As Integer)

Hm PortDWordOut: xut 1 double word ra cng

"IO.DLL"

Private Declare Sub PortDWordOut Lib (ByVal Port As Integer, ByVal Data As Long)

Hm PortIn: nhp 1 byte t cng, tr v gi tr nhp

Lib "IO.DLL"

Private Declare Function PortIn (ByVal Port As Integer) As Byte

Hm PortWordIn: nhp 1 word t cng

Private Declare Function PortWordIn Lib "IO.DLL" (ByVal Port As Integer) As Integer

Hm PortDWordIn: nhp 1 double word t cng

Lib

Private Declare Function PortDWordIn "IO.DLL" (ByVal Port As Integer) As Long

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