CHNG 1 KIN TRC H THNG VI X L MY TNH

LT3

1.1 KIN TRC H THNG VI X L, MY TNH KINH IN 1.1.1 S kin trc Trc ht cn phi xc nh my tnh c nhn (personal computer), hay my tnh ln (main frame) cng chnh l mt h thng vi x l. Trong thc t, my tnh thng do cc hng ln ch to theo mt tiu chun nht nh, c th hot ng c vi cc h iu hnh v cc phn mm sn c trn th trng. Mt khc, cc hng thc hin cc h iu hnh hay cc phn mm, cng thc hin cc h iu hnh hay cc phn mm mi, da trn cu hnh tiu chun ca cc my tnh c mt trn th trng. Ngoi cc my tnh chun, mt hng ch to my hay mt ngi s dng bt k c th thc hin mt my tnh, hay mt h thng vi x l s dng cho cc ng dng ring nh tnh ton hay iu khin cc my mc thit b, cc h thng nh vy ang c s dng rt ph bin trong dn dng cng nh cng nghip. S kin trc h thng vi x l hay mt my tnh kinh in bao gm cc thnh phn nh trn hnh 1.1

Hnh 1.1: S kin trc h thng vi x l hay my tnh kinh in H thng bao gm h thng trung tm (Central Sub System CS), cc giao tip kt ni (Interface) v cc thit b ngoi vi. H thng trung tm ng vai tr iu khin hot ng ca ton b h thng, n bao gm: B vi x l hay cn gi l b x l trung tm (Central Processing Unit) l ni thc hin cc chng trnh iu khin hot ng ca ton b h thng. B nh (Memory), l cc IC nh bn dn, l ni lu tr cc chng trnh cung cp cho CPU hot ng, cung cp cc d liu, cc bin ca chng trnh, cc hng s cn thit ca chng trnh m CPU thc hin. Cc b iu khin (controller) iu khin cc ch hot ng c bit ca h thng, trong cc h thng vi x l kinh in thng thng c cc b iu khin nh: b iu khin Bus, cung cp cc tn hiu cho bus h thng. B
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nh thi, cung cp cc tn hiu nh khong thi gian cho cc hot ng ca h thng. B iu khin ngt, iu khin vo ra hot ng theo ch ngt. DMA, iu khin truyn d liu trc tip gia b nh v ngoi vi . Cc khi mch trong h thng trung tm c kt ni vi nhau bng cc ng dn in gi chung l BUS. BUS c chia thnh 03 nhm l: Bus a ch, bus d liu v bus iu khin. Bus d liu s dng cho vic truyn d liu gia CPU vi cc nh v cc thit b ngoi vi. Bus a ch xc nh v tr b nh hay vo ra s truyn d liu vi CPU v Bus iu khin nh ngha cc ch hot ng khc nhau ca h thng. giao tip vi th gii bn ngoi h thng s dng khi giao tip bao gm: cc b m (Buffer) v cc cng vo ra. Thng thng CPU thng c ch to vi cng ngh tc cao c dng in v mc in p logic thp, nn cc b m ng vai tr tng thch tn hiu s v dng in v in p. Ngoi ra cc b m cn thc hin vic chnh li dng tn hiu s khi b nhiu. cc h thng vi x l hot ng vi tc thp c th khng s dng cc b m. Cc cng vo c chc nng giao tip vi cc thit b cp d liu cho CPU, cc cng ra s dng cho cc thit b nhn d liu t CPU. Mt s thit b c th truyn d liu hai chiu vi CPU. Cc cng vo ra c thc hin bng cc vi mch chuyn dng, chng to ra cc lung d liu s vi mc logic v khung truyn theo cc chun khc nhau cc thit b cng chun c th giao tip vi my tnh. Phn cui cng ca h thng vi x l my tnh kinh in l cc thit b bn ngoi (WideWorld). Cc thit b ny c th l cc thit b giao tip chun giao tip gia h thng vi ngi s dng nh: bn phm, con chut, mn hnh . Cc thit b ny c th lun gn lin (mt khi) vi h thng. Ngoi ra, cc thit b gn vo my tnh cng c th l cc thit b c bit, ch s dng trong cc ng dng c th no . V d nh u d siu m s dng trong bnh vin, cc thit b iu hin cng nghip s dng trong cc nh my. 1.1.1.1 Cc h thng trung tm Nh cp, thnh phn quan trng nht ca h thng trung tm l b vi x l hay cn gi l b x l trung tm (CPU Central Processing Unit). CPU l ni thc hin cc chng trnh tnh ton v iu khin hot ng ca ton b h thng. Chng trnh bao gm cc lnh x l cc d liu nh phn nh: tnh ton s hc logic, di chuyn d liu (bn trong CPU, gia CPU vi b nh hoc CPU vi vo ra), chuyn iu khin chng trnh thc hin cc gii thut ca cng vic. Khi hot ng CPU thc hin cc cng vic sau: ly lnh t ngoi b nh bng cch cp a ch v tn hiu iu khin c b nh, gii m lnh xc nh cng vic m lnh yu cu thc hin, xc nh v tr cc ton hng (l cc d liu) m lnh x l, thc hin lnh v lu tr kt qu trn cc thanh ghi hay cc nh c ch nh trong lnh, hoc thc hin cc giao tip vo ra theo yu cu ca lnh.
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Do ng vai tr iu khin hot ng ca ton b h thng nn CPU l thnh phn quan trng quyt nh ti tc hot ng ca h thng. Cc c tnh quan trng khi nh gi hay la chn mt CPU cho mt h thng vi x l bao gm: - Tc hot ng: tc hot ng ca CPU ph thuc ch yu vo cng ngh bn dn ch to ra n. Thng thng CPU p ng vi xung nhp cng cao s c tc hot ng cng cao. Tuy nhin, tc x l lnh trn mt n v thi gian cn ph thuc vo c cu trc bn trong ca CPU. V d CPU c hai li bn trong s thc hin c nhiu lnh hn CPU tc cao hn nhng mt li. Hin nay tc hot ng ca CPU thng c tnh bng hng triu lnh trn giy MIPS (Milion of Instruction Per Second). - ln d liu m CPU c th x l c trong mt lnh (hay ln ton hng): ln ny ph thuc vo cu trc BUS d liu, cu trc b phn x l d liu (ALU, DSP, Image Processing ..), v ln cc thanh ghi bn trong CPU. Thng thng, ln ton hng ca CPU s bng vi ln BUS d liu. Tuy nhin, trong mt s CPU ln BUS d liu thng nh hn ln ton hng. V d, CPU 8088 c ln ton hng 16 bit nhng ch c BUS d liu 8 bit. - Kin trc b vi x l: CPU c ch to vi nhiu loi kin trc khc nhau. u tin cc CPU c ch to vi kin trc tp lnh y CISC (Complete Instruction Set Computer). Vi cu trc ny CPU thc hin c nhiu lnh hn nhng s c cu trc phc tp hn lm hot ng ca n chm hn. CPU c tp lnh rt gn ra i c cu trc n gin hn hot ng nhanh hn nhng s thc hin c t lnh hn. Ngoi ra, thng thng cc CPU loi RISC (Reduct Instrution Set Computer) thng c di lnh bng nhau h tr cho hot ng ng ng (Pipe line). Cc CPU khi mi ra i c cu trc Von Neumann, cu trc ny s dng chung h thng BUS cho c d liu v chng trnh. Cc CPU hin i thng c cu trc Hardvard, vi mt BUS ring cho vic truy cp chng trnh v mt BUS ring cho vic truy cp d liu. Vi cu trc Hardvard CPU c th ng thi c m lnh v cc ton hng trong b nh. Vi cc ng dng a phng tin, c th s dng cc CPU c cu trc h tr vic x l tn hiu s, chng thng c gi l cc b x l tn hiu s (DSP Digital Signal Processing). Cc CPU h tr mnh cho vic x l hnh nh s cn c gi l cc b x l nh (Image Processing). thc hin cc ng dng nh, cho cc h thng nhng cc hng pht trin cc b vi iu khin (MCU Micro Controller Unit), bao gm mt h thng vi x l c ng gi trong mt vi mch (single chip). Cc b vi iu khin hin ang chim doanh thu cao nht trn th trng linh kin bn dn trn ton th gii. - Cc tn hiu kt ni: Khi thc hin cc h thng vi x l cn quan tm ti cc tn hiu kt ni ca CPU. Thng thng, do cn s dng cc b m bn ngoi nn cc tn hiu ca CPU thng c ghp a hp (Multiplex), v d nh tn hiu i ch v d liu cng chung mt chn, tn hiu a ch v iu khin cng chung
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mt chn. Ngoi ra, cn cn phi quan tm ti cc tn hiu iu khin nh RD/WR, IRQ, HOLD xc nh c cu hnh hot ng ca h thng. - Tp thanh ghi: tp thanh ghi ca CPU ng vai tr quan trng trong vic lp trnh cho h thng bng cc lnh hp ng, mt khc chc nng ca cc thanh ghi s to ra cc kiu hot ng khc nhau khi lp trnh. - Tp lnh: tp lnh ca CPU s dng thc hin cc chng trnh hp ng chy trn h thng. Vic s dng cc lnh hp ng s cho php ngi s dng tc ng sau nht ti cu hnh phn cng ca h thng, nht l ti cc thnh phn giao tip cc thit b ngoi vi. Cc chng trnh hp ng cn cho php chng trnh c dung lng nh hn v thc hin nhanh hn khi thc hin chng trnh bng cc ngn ng cp cao. - Cc ch a ch: Cc ch a ch ca CPU cho php vic truy cp d liu trong b nh c thc hin theo nhiu cch khc nhau, c ngha l cho php thc hin cc kiu bin khc nhau trong chng trnh nh: bin mng, bin con tr, bin chui . - Ngun: Cc ch ngun ca CPU cho php n hot ng nhng ch tiu th nng lng khc nhau. nhng thi gian khng cn thit phi thc hin chng trnh CPU c th chuyn qua cc ch tit kim ngun nhm tit kim nng lng trong cc h thng di ng. Thnh phn quan trng th hai trong h thng l b nh bn dn. B nh trong h thng vi x l l cc vi mch s c kh nng lu tr cc d liu 0, 1. Trong h thng vi x l b nh bn dn s dng lu tr cc chng trnh cung cp cho CPU hot ng, lu tr cc hng v bin ca chng trnh, v s dng cho vic lu tr nhanh chng cc d liu tm thi trong qu trnh tnh ton nh ngn xp. Cc c tnh quan trng ca b nh bn dn bao gm: dung lng nh, ln Bus d liu v tc truy xut d liu. Ngay nay, cc b nh bn dn thng c dung lng rt ln ln ti hng trm MB/vi mch. Tc truy xut d liu nhanh trong khong vi nsec, ln bus d liu thng l 1, 8 hoc 16 bit. B nh bn dn c chia thnh hai loi chnh l b nh ch c (ROM Read Only Memory) v b nh c th c ghi c, hay b nh truy cp ngu nhin (RAM Random Access Memory). Trong h thng vi x l, khi hot ng CPU ch c th c c d liu t ROM nhng c th c v ghi d liu vi RAM, vic ghi d liu vo ROM cn c cc ch lm vic c bit. D liu ghi trong b nh ROM s khng b mt khi mt ngun cung cp, do thng thng b nh ROM c s dng lu tr cc chng trnh hoc d liu khng cho php mt khi mt ngun. Nh trong my tnh b nh ROM BIOS s dng lu tr cc chng trnh iu khin cc thit b vo ra, hoc keyboard ROM s dng lu tr m phm nhn. Trong cc h thng vi x l khc ROM c s dng lu tr cc chng trnh khi ng h thng. B nh ROM cng c chia thnh nhiu loi khc nhau Mask ROM, PROM, EPROM, EEPROM.
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Mask ROM l loi ROM c ghi d liu ngay khi sn xut, d liu c ghi s khng xo hoc thay i c, vi loi ROM ny khi mun sa cha, thay i hay nng cp chng trnh, cn phi t hng li t nh sn xut, v th rt bt tin cho ngi s dng . PROM (Programmable ROM) l loi ROM c th lp trnh c mt ln, do trong ma trn nh cc bit c lu tr di dng cc cu ch, nn khi lp trnh lm t cc cu ch s khng th ni li c na. PROM gip ngi s dng c th t sa cha thay i hay nng cp cc chng trnh, tuy nhin mi ln d liu thay i cn phi s dng mt vi mch mi nn s lm tng chi ph h thng. khc phc EPROM ra i vi cc bit trong ma trn nh c thc hin bng cc knh dn MOSFET, ghi ROM c th dng in trng cao y cc in t t do ca knh dn v cc cng lm knh dn khng dn in. knh dn dn in tr li ngi ta cung cp nng lng cho cc in t t do bng tia cc tm, cc in t t do c th vt qua lp xit silic cch in mng quay v knh dn. Vi nguyn l hot ng ny b nh EPROM c th lp trnh v xo nhiu ln rt tin dng cho ngi s dng khi thc hin cc h thng vi x l. EEPROM l loi b nh ROM c th lp trnh c nhiu ln, nhng cc in t t do trn knh dn b y qua cc cng v quay v bng nng lng in trng ln. B nh RAM cng c chia thnh hai loi chnh l RAM tnh (SRAM Static RAM) v RAM ng (DRAM Dinamic RAM). SRAM lu tr cc cc bit nh bng cc Flip Flop nn d liu s khng b mt khi vi mch nh cn c cp ngun. Cc SRAM c thi gian truy xut nhanh, khong 80 3 ns, tuy nhin chng tiu th cng sut ln v c gi thnh cao, v vy SRAM ch c s dng cho cc h thng nh hoc dng lm b nh m trong cc h thng ln. B nh m s truyn khi d liu vi b nh chnh v cung cp cho CPU khi c yu cu. B nh DRAM lu tr cc bit nh bng cc t in nh, c th lu tr c mt dung lng ln trn mt din tch nh th cc t in cng nh cng tt. Do vic ch to cc t bn dn kh n gin nn DRAM c gi thnh r, v vy chng c s dng lm b nh chnh trong cc h thng ln nh my tnh c nhn hay my ch. Nhng do cc t in nh nn lng in tch lu tr s t v chng d dng b r qua cc mch c ghi d liu. Thng thng d liu mc 1 trong DRAM ch lu tr c trong khong 10 20 msec, do s dng DRAM ngi ta thit k cc b iu khin DRAM np li (lm ti li) cc bit 1 sau khong thi gian 7.5 msec. V phi lm c chu k lm ti nn vic s dng DRAM kh phc tp, tc truy xut thp t 50 70 nsec. Ngy nay cc vi mch DRAM c ch to vi dung lng kh ln, c th ln ti 1 Gbyte/vi mch. Ngoi cc loi b nh chnh nu trn hin ny cn c mt s loi b nh bn dn khc nh: - Flash Memory: l loi EEPROM c th cho php ghi v xo d liu theo tng khi, gi thnh ca Flash r hn nhiu so vi EEPROM thng thng do hin nay Flash ang c ng dng nhiu trong cc h thng vi x l nh: lm ROM BIOS cho my tnh c nhn, b nh ngoi truy cp qua USB hoc th nh (Stick
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memory), lm cng cho cc my tnh xch tay vi chng sc cao, s dng cho thit b tr gip c nhn s (PDA Personal Digital Assistants), cc thit b m thanh hay my nh, my quay phim k tuht s. Khi s dng lm cc thit b nh ngoi di ng nh Flash USB hay th nh, cc b nh Flask cn c bn cao do khng b h hng do sc, c th ct gi cc iu kin mi trng khc nhit v nhit , p sut, m. - EEPROM ni tip (Serial EEPROM): l loi b nh EEPROM c ghi d liu ni tip, thng thng loi b nh ny s dng cc giao tip ni tip: I2C, SPI, Microwire, UNI/O hay 1- wire. Loi b nh ny thng s dng lu cc d liu cn thit khi mt ngun nh cc bng tham s hot ng (parameter), hay cc bng cu hnh hot ng cho h thng vi x l. - Dual port RAM, Quad Port RAM: l cc loi b nh RAM cho php nhiu chu k truy cp ng thi (tng ng hai v bn chu k truy cp ng thi). Thng thng cng ngh RAM ny s dng thc hin cc thanh ghi trong CPU, cho php tng tc truy cp d liu. - RAMDAC (Random Acess Memory Digital to Analogue Converter) l chip nh kt hp gia RAM v b bin i s tng t. Loi b nh ny thng c s dng trong cc card mn hnh ca my tnh, chng thng c s dng cha bng mu to ra mc in p tng t tu theo mu sc mun hin th trn mn hnh mu. D liu mu cung cp t CPU c s dng lm a ch cung cp cho RAMDAC, d liu s trong DAC s c truy cp v bin i thnh mc in p ng ra ca RAMDAC, mc tn hiu ny s dng li mt trong ba sng in t, tng ng vi mt trong ba mu , lc, lam ca mn hnh CRT. - PCMCIA (Personal Computer Memory Card International Association) l cng thit k cho vic giao tip vi cc loi th nh SRAM hoc Flash. Sau ny, cng PCMCIA c s dng cho cc ng dng giao tip vi cc thit b vo ra nh Modem, Wireless . Khi cui cng trong h thng trung tm l cc b iu khin (Controller). Cc b iu khin c nhim v iu khin cc tnh nng c bit nhm nng cao hiu nng ca h thng. Trong mt h thng vi x l kinh in thng thng c cc b iu khin nh: b iu khin Bus (Bus controller), b iu khin ngt, b iu khin thm nhp trc tip b nh (DMAC Direct Memory Acess Controller), b nh thi (PITProgrammable Interval Timer), Mch qun l b nh . B iu khin BUS thng nhn cc tn hiu trng thi t CPU to ra cc tn hiu iu khin b nh v vo ra nh: cc tn hiu c ghi b nh, c ghi vo ra, tn hiu chp nhn yu cu ngt. V d trong h thng 8088 s dng b iu khin BUS 8288. B iu khin ngt s dng cho vic iu khin ch ngt ca h thng. Khi c yu cu hot ng trc ht cc thit b vo ra gi ti b iu khin ngt yu cu ngt. B iu khin ngt s c nhiu ng vo nhn nhiu yu cu ngt t cc vo ra khc
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nhau. B iu khin ngt c th c lp trnh trc thc hin cc chc nng nh: x l u tin cho cc ngun yu cu ngt, cho php hoc cm cc ngun yu cu ngt, to vector ngt ring bit cho cc ngun ngt . Sau khi x l cc yu cu ngt, b iu khin ngt s gi yu cu ngt ti CPU, v nu c CPU chp nhn n s gi tn hiu chp nhn ti thit b c yu cu, km theo vector ngt ca thit b CPU c th tm v thc hin chng trnh ngt tng ng phc v hot ng ca thit b. B iu khin thm nhp trc tip b nh (DMAC Direct Memory Access Controller) cho php ch truyn d liu trc tip gia thit b vo ra v b nh bn dn. Cc ngoi vi thc hin truyn d liu trc tip vi b nh thng thng l cc b nh ngoi (a cng, a mm) hoc cc thit b mng. DMAC cng c nhiu ng vo nhn cc yu cu DMA t nhiu knh ngoi vi khc nhau. N cng c lp trnh t CPU thc hin cc chc nng nh: x l u tin, cho php hoc cm cc knh DMA, nhp a ch ca b nh v vo ra, cng nh ln khi d liu s truyn trong chu k DMA. Khi c cc yu cu DMA t thit b ngoi vi, sau khi x l theo tnh nng c lp trnh, DMAC s gi yu cu ti CPU (bng tn hiu HOLD). Nu CPU chp nhn yu cu ny n s dng hot ng, treo cc BUS ln trng thi tr khng cao v tr li DMAC bng tn hiu chp nhn (HOLDA Hold Acknowledge). Khi DMAC s cung cp cc tn hiu a ch ng thi cho b nh v vo ra, cng vi tn hiu c b nh ghi vo ra, hoc c vo ra ghi b nh mt cch ng thi, truyn d liu gia b nh v vo ra ch trong mt chu k. Khi mt d liu c c ghi xong, b m a ch ca DMAC s t ng tng ln chun b thc hin vic c ghi d liu k tip trong khi. Khi khi d liu truyn xong, tn hiu yu cu t DMAC s ht tch cc v CPU s iu khin hot ng ca h thng tr li. B nh thi c th lp trnh (PIT Programmable Interval Timer): l vi mch c th lp trnh t CPU to ra cc khong thi gian nh thi cho hot ng no ca h thng. Vic xc nh cc khong thi gian s c tnh ton v ghi vo cc thanh ghi ca PIT, sau khi c cho php chy, PIT thc hin vic m thi gian v thng bo cho CPU khi thi gian kt thc. B iu khin RAM ng, nhn a ch t CPU sau cung cp theo a ch hng v ct ti vng nh RAM ng truy cp d liu theo yu cu ca CPU. Ngoi ra cc b iu khin RAM ng cn t ng thc hin cc chu k lm ti theo quy nh cho vng nh RAM ng m n qun l. n v qun l b nh (MMU Memory Management Unit) l vi mch x l vic truy cp b nh yu cu t CPU. N c chc nng chuyn i cc a ch o cung cp t CPU trong cc ch khc nhau thnh a ch vt l truy cp b nh. Ngoi cc b iu khin thng dng k trn, trong mt s h thng vi x l cn c cc b iu khin c bit khc. Cc khi mch ca h thng trung tm c kt ni vi nhau bng h thng cc ng dy dn in, chng c chia thnh ba nhm chnh gi l Bus d liu, Bus a ch v Bus iu khin.
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Bus d liu l cc ng dy s dng cho vic truyn d liu gia cc khi, d liu ny bao gm cc m lnh truyn t b nh ti CPU, cc hng bin ca chng trnh truyn gia CPU v b nh, cc d liu iu khin truyn gia CPU v thit b ngoi vi. Nh vy bus d liu l Bus hai chiu, s lng ng dy trn bus d liu s xc nh s bit c th truyn ng thi mt ln. Thng thng CPU c bao nhiu bit s c by nhiu ng trn bus d liu, cc ng ny c ni t CPU ti tt c cc vi mch nh cc b iu khin v qua cc b m ti tt c cc vo ra. CPU c mt bus a ch duy nht truyn d liu gia CPU vi tt c cc b nh v vo ra v cc b iu khin, do khi mt d liu trn bus cn phi xc nh n c truyn gia CPU v v tr no trn h thng. xc nh c cc v tr ny h thng s dng bus a ch. Bus a ch l bus mt chiu c nhiu ng, a ch c th to ra t CPU, DMAC, hay cc b iu khin khc cung cp ti cc b nh hay cc vi mch vo ra cho php mt v tr duy nht trong h thng truyn d liu. Nu bus a ch c N ng, h thng s qun l c 2N a ch b nh, v km theo tn hiu iu khin chn b nh hoc vo ra h thng s qun l thm c cc i 2N a ch vo ra. Bus iu khin cung cp nhiu tn hiu iu khin vi cc tnh nng khc nhau, xc nh cc ch hot ng ca h thng. Trong bus a ch c nhng tn hiu mt chiu t CPU cp ra, hoc CPU nhn vo, c nhng tn hiu cp t cc b iu khin, t b nh hoc t vo ra. Mt s tn hiu iu khin in hnh trong h thng vi x l nh: - MEMRD (Memory Read): l tn hiu t CPU hoc b iu khin Bus cung cp ti b nh yu cu b nh cung cp d liu CPU ly vo bn trong n. - MEMWR (Memory Write): l tn hiu t CPU hoc b iu khin Bus cung cp ti b nh yu cu b nh nhn d liu ghi vo bn trong n. - IORD (Input Output Read), IOWR (Input Output Write): l tn hiu yu cu c ghi vo ra. - INTR (Interrupt Request): l tn hiu yu cu ngt t b iu khin ngt hoc t thit b vo ra cung cp ti CPU. - INTA (Interrupt Acknowledge): Tn hiu chp nhn yu cu ngt t CPU tr li cho thit b ngoi vi hoc b iu khin ngt. - HOLD: tn hiu yu cu DMA c DMAC gi ti CPU yu cu CPU ngng hot ng DMAC iu khin qu trnh truyn d liu trc tip gia b nh v cng vo ra. - HOLDA (Hold Acknowledge): tn hiu chp nhn yu cu DMA t CPU tr li cho b iu khin DMA. -

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1.1.1.2 Thit b ngoi vi: Thit b vo, Thit b ra, Thit b vo/ra, Thit b lu tr. Cc thit b ngoi vi c ni ti cc cng vo ra trong h vi x l, theo chc nng chng c th chia thnh hai loi chnh: Cc thit b s dng giao tip gia h thng vi ngi s dng nh bn phm, mn hnh, con chut . ngi s dng c th tham gia vo qu trnh iu khin h thng hoc nhn cc trng thi kt qu t h thng. Ngoi ra cn c cc thit b chp hnh s iu khin ca h thng vi x l, thc hin mt cng vic no nh my in in vn bn, my v in bn , hay cc h thng my mc sn xut khc. Theo chiu truyn d liu cc thit b ngoi vi c th chia thnh: cc thit b ch truyn d liu cho h thng, cn gi l cc thit b vo, v d cc phm nhn. Cc thit b ch nhn d liu t h thng, cn gi l thit b ra, v d nh cc b hin th led n hay led by on. Tuy nhin, hin nay a s cc thit b ngoi vi l cc h thng vi x l chuyn dng, cn gi l cc h thng nhng (embed system), cc h thng ny thng truyn d liu vi h thng chnh bng cc cng vo ra, v chng thng truyn d liu hai chiu gi l cc thit b va vo va ra. V d trong h thng my tnh, bn phm l mt h thng vi x l c nhim v nhn m t ma trn phm nhn to ra m qut phm (scan code) gi ti cng bn phm, ngoi ra cc phm cha c c s nm trong b m bn phm. My in giao tip vi my tnh bng ba a ch, mt a ch cho d liu, mt a ch thng bo trng thi v mt cng iu khin cc tnh nng my in. Ngoi ra cc thit b giao tip vi my tnh cn c cc thit b nh ngoi. cng (HDD), mm (FDD), quang gn cng khi vi hp my tnh l cc thit b ngoi vi c nhim v lu tr d liu. Cc thit b nh ngoi nh Flash disk, HDD box, th nh cng l cc thit b ngoi vi lu tr. Mt s cc thit b vo ra c bn ca h thng my tnh kinh in c th k n nh: - Cc thit b vo c bn: Bn phm (keyboard), mn hnh cm ng (touch screen), tm nhn chm (keypad), Chut (mouse), bi v hng (track ball), chut chm (touch pad), Thit b vo ho (Graphic input): camera, my qut (scanner), u c m vch (barcode reader), Ng vo m thanh (Microphone), Gii iu ch tn hiu (Demodulator trong modem), Cm bin (sensor), b bin i tn hiu (transducer), b truyn tn hiu (transmitter), Cc thit b vo s khc: B s ho (Digitizer), bt quang (Light pen), cn tr chi (joytick), u c vn tay (finger reader). - Cc thit b ra c bn: Mn hnh, b hin th im, Led 7 on, LCD, ma trn led, CRT, my in (kim, phun, laser, thermal transfer, ploter), loa (speaker, horn ), iu ch tn hiu (modulator trong modem), b truyn ng in (Actuator), ng c (motor), relay, khi ng t (contactor), van (valve)

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- Cc thit b lu tr: Thit b lu tr t (Bng t, FDD, HDD, RAID), thit b lu tr quang (CD, DVD, Magnetic optic), thit b nh bn dn (Flash chip, PCMCIA card). 1.1.1.3 K thut ghp ni Do CPU thc hin vic iu khin ton b hot ng ca h thng, nn thng c thc hin vi cng ngh cao c tc hot ng nhanh. Mt khc, cu trc kt ni h thng trung tm thc hin theo Bus. Cn cc thit b ngoi vi th tu theo chc nng s dng trong thc t, s c thit k khc nhau m bo sao cho gi thnh h, s tin dng cao. Do gia h thng trung tm v thit b ngoi vi thng c s khc nhau v: mc tn hiu, tc truyn thng tin, kiu truyn thng tin . Nh vy, cc thit b ngoi vi c th lm vic c vi h thng, cn c giao tip (Interface) gia chng vi h thng trung tm. Cc giao tip c thc hin vi hai thnh phn chnh l: phn cng l cc cng vo ra thc hin bng cc vi mch chuyn dng, v phn mm xy dng thc hin cc khung truyn d liu tng ng gia hai bn. Thng thng phn cng trong mt h thng vi x l s bao gm cc loi nh: - Cng vo ra song song: d liu ng truyn ng thi trn nhiu ng dy t h thng ti cc thit b ngoi vi. Cc vi mch phn cng ca cc cng song song s m ng thi cc ng dy d liu ca h thng trung tm kt ni vi thit b ngoi vi. Do phi s dng nhiu ng dy ng thi nn cc cng vo ra song song ngy cng t c s dng, nht l khi cn truyn d liu qua khong cc ln. Mt s cng vo ra song song tiu biu nh: LPT, IDE, . - Cng vo ra ni tip: theo mt chiu truyn d liu s c truyn tun t trn mt ng dy dn in. Cng truyn ny c cc u im nh: tit kim dy dn, khng b nhiu xuyn knh gia ng truyn cc bit nh cng song song. Vi cc u in trn cng ni tip hin nay ang c pht trin kh mnh vi cc c ch truyn khc nhau, cc cu hnh phn cng khc nhau. Mt s cng truyn ni tip thng thy nh: cng COM, cng USB, cng IEEE 1394, cng SCSI . - Cng giao tip tng t: cng ny dng giao tip vi cc thit b cung cp tn hiu tng t. nhn cc tn hiu tng t vo h thng cn phi c b bin i tng t sang s (ADC Analogue to Digital Converter), thng thng cc ADC bin i mt mc tn hiu tng t thnh 8, 12 hoc 16 bit d liu s cung cp cho CPU. cung cp cc tn hiu tng t h thng s dng cc b bin i s sang tng t (DAC Digital to Analogue Converter). Cc giao tip tng t ph bin nh: Micro phone, loa (Speaker), nhit CPU, Ngoi cc vi mch thc hin cc chc nng cng vo ra, cc cng vo ra cn c th thc hin bng cc h thng vi x l chuyn dng cn gi l cc h thng nhng. i vi cc h thng my tnh, phn cng vo ra cn c th thc hin bng cc vi mch phn cng cm vo cc khe cm trn bo mch chnh nh: ISA, PCI, AGP, MC .
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Phn mm iu khin giao tip c thc hin bng cc chng trnh truy cp trc tip vo cc vi mch phn cng cng vo ra. Cc chng trnh iu khin cng vo ra trn h thng my tnh, hoc cc h thng vi x l chuyn dng, cng c th khai thc cc ti nguyn phn mm sn c trong h thng nh: cc hm iu khin thit b trong ROM BIOS, cc hm iu khin thit b ca h iu hnh DOS, cc hm iu khin thit b tng thch trong WINDOWS nh cc SPI v API. Ngoi ra cn c th s dng cc chng trnh chuyn dng ca cc hng chuyn cung cp phn cng v phn mm iu khin thit b nh: Siemens, Omron, ABB, 1.1.2 Kin trc my tnh hiu nng cao S khi mt my tnh hin i hiu nng cao m t trn hnh 1.2. Trn hnh v CPU kt ni vi b nh v vi mch iu khin bus PCI (PCI brigde) bng bus ni (local bus). Thng thng b nh m L1 (SRAM) c ch to sn trong CPU, d liu t b nh chnh (DRAM) s c b iu khin qun l b nh (MMU), iu khin truyn khi vi b nh m L2 v b nh m L1, CPU s ch thao tc c ghi d liu trn cc b nh m m khng c trc tip t b nh chnh.

Hnh 1.2: S khi my tnh hin i B iu khin bus PCI, m cc tn hiu t bus ni v to thm cc tn hiu cn thit giao tip vi cc thit b tc cao nh: Bo mch giao tip mn hnh, giao tip cng chun IDE, bo mch giao tip mng ni b, bo mch m thanh, giao tip cng USB . Ngoi ra trn bo mch chnh cn cha sn cc khe cm, c th cm thm cc bo mch giao tip vi cc thit b ngoi vi khc. giao tip vi cc thit b c tc thp, tiu th dng ln v m bo gi thnh h cn s dng vi mch chuyn i t tn hiu bus PCI thnh tn hiu bus ISA. Cc thit b giao tip vi bus ny c th k n nh: vi mch giao tip my in (LPT ports), vi mch giao tip ni tip (COM ports hay Async Ports), vi mch giao tip con chut, vi mch giao tip cng a mm, vi mch giao tip bn phm v cc khe cm m rng khi cn thit. Tuy nhin trn bo mch ch cc my tnh hin nay khng cn s dng cc khe cm m rng cho bus ISA.
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Hnh 1.3: S khi my tnh Pentium

Hnh 1.4: S khi my tnh Pentium 4 Hnh 1.3 m t s khi my tnh Pentium, trong cu hnh ny b nh m L2 kt ni vi CPU qua bus ring (cahe bus), b nh chnh giao tip vi CPU qua PCI brigde. Trong s c thm vi mch giao tip cng SCSI, s dng cho vic giao tip
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vi cc cng loi mi v cc thit b ch to theo chun ny. Bn phm, con chut, my in v nhiu thit b khc ang dn chuyn i qua chun giao tip USB. Vi cu hnh Pentium 4 vic iu khin cc loi bus u c tch hp trong mt vi mch (bridge chip). Trong h thng pentium 4 xut hin thm bus AGP s dng cho giao tip bo mch mn hnh tc cao, h tr mnh cho video. Bus ATA giao tip vi vi mch giao tip ATA, s dng giao tip vi cc cng v DVD loi ny. B nh m L2 c tch hp ngay trong CPU nn cache bus cng nm trong CPU. Ngoi ra cn c mt s bus chuyn dng khc nh VESA bus s dng cho bo mch mn hnh, bus MCA m rng thit b, FireWire bus s dng cho thit b ni b hoc m rng . Bng 1.1 cho bit c tnh k thut ca mt s bus thng dng.

Bng 1.1: c tnh k thut mt s bus thng dng 1.1.2.1 Bus ni b Bus ni cn c gi l bus h thng (system bus), bus ch (hoist bus) hay bus b vi x l (processor bus). Bus ni bao gm nhng ng kt ni gia b vi x l vi khi b nh chnh (main memory) v b iu khin bus PCI (PCI brigde). Cc ng tn hiu trn bus ny, c ni trc tip t CPU ti cc vi mch nh v vi mch iu khin PCI, m khng qua cc b m bus. ln ca bus tu theo h thng c th ln ti 64 bit a ch v 64 bit d liu, tc truyn ln ti 32 Mbps. cc h thng hin i, b iu khin b nh (MMU) c tch hp ngay trong CPU do bus ny c gi l bus b nh (memory bus), ni trc tip cc tn hiu t CPU ti cc vi mch nh RAM ng v khng s dng ni ti b iu khin PCI. 1.1.2.2 Bus tc cao Bus tc cao hay cn gi l bus kt ni cc thit b ngoi vi (PCI Peripheral Componant Interconnect), l bus do PCI brigde cung cp l bus chnh kt ni cc thit b phn cng vo mt h thng vi x l. Trong my tnh, cc thit b c th kt ni thng qua cc vi mch phn cng ni ghp PCI nm ngay trn bo mch chnh, hoc bng cc bo mch giao tip qua khe cm PCI.

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Nh trong bng 1.1, bus PCI c pht trin qua nhiu th h, tc truyn d liu tu thuc vo tng th h c th t 132 MBps ti 1GBps, c kim tra chn l cho a ch v d liu. Cc tn hiu iu khin c thit k chng trnh phn mm c th t nhn dng cc thit b phn cng cm vo h thng, thc hin tnh nng cm l chy (Plus and Play). Bus PCI c s dng cho kh nhiu cc h thng my tnh chun nh IBM, Dec Alpha, Power PC, Spark . 1.1.2.3 Bus m rng Bus m rng hay cn c gi l bus chun (standard bus) hay bus vo ra (I/O bus) l bus c thit k cho cc thit b hot ng vi tc thp. Cc thit b cng c th giao tip thng qua cc vi mch nm ngay trn bo mch chnh, hoc qua cc bo mch giao tip trn cc khe cm. Cc bus m rng thc t bao gm: bus ISA c thit k bi IBM nm 1981, vo nm 1983 n tr thnh bus m rng cho my tnh PC XT, nm 1984 tr thnh bus m rng 16 bit cho my tnh IBM AT v nm 1988 c m rng thnh chun EISA vi 32 bit. Nm 1987, IBM cn pht trin bus m rng MCA (Micro Channel Architecture) vi tc cao hn, tuy nhin y l mt chun ng khng c cng b s dng cho ngi s dng. 1.2 HOT NG CA H THNG 1.2.1 Lu tng qut Hot ng ca h thng c thc hin bng lu tng qut nh trn hnh 1.5. Khi h thng bt u c cp ngun hoc khi h thng bt u c khi ng li (reset). Trc ht b m chng trnh v cc vector a ch h thng c thit lp li gi tr mc nh. Ngoi ra h thng cn thc hin cc chng trnh thit lp khc cho qui trnh reset. Tip theo CPU ly mu yu cu DMA ti ng vo ca n, nu c yu cu DMA CPU s ngng hot ng qu trnh DMA c thc hin. Khi khng c yu cu DMA, hoc khi DMA c thc hin xong, CPU kim tra cc yu cu ngt. Vi cc ngt che, CPU kim tra c che ngt, nu c che c thit lp tnh trng cho php, hoc i vi cc ngt khng che, CPU s chuyn iu khin qua hot ng chng trnh phc v ngt. Khi khng c ngt, hoc khi chng trnh phc v ngt c thc hin xong, CPU s thc hin cc lnh ca chng trnh chnh. Qu trnh thc hin mt lnh bao gm cc cng vic: ly lnh t b nh, gii m lnh xc nh cng vic cn thc hin v thc hin lnh v lu tr kt qu ca lnh. Khi thc hin xong mt lnh, qu trnh hot ng ca CPU s c lp li t bc kim tra yu cu DMA.

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1.2.2 Thit lp li h thng - Reset Qu trnh thit lp li h thng (reset) s xy ra do cc nguyn nhn sau: H thng c cp ngun ln u, ngun h thng b ngng cung cp sau mt khong thi gian sau c cung cp tr li, khi reset cng h thng bng cch cung cp tn hiu xung ti ng vo reset ca CPU, hoc khi khi ng li bng phn mm. Khi xy ra reset, thng thng CPU s thc hin mt chng trnh ghi sn trong b nh ROM, tu theo h thng c th chng trnh ny c th c gi l: chng trnh gim st (monitoring), phn do (firm ware) hoc trn my tnh n c gi l chng trnh iu khin vo ra c s ca h thng (BIOS Base Input Output System). Chng trnh ny s thc hin quy trnh t kim tra khi bt ngun (POST Power On Self Test).

Hnh 1.5: Lu tng qut hot ng ca h thng vi x l Qui trnh POST thng thc hin cc cng vic nh: Xc nhn nguyn nhn gy ra reset thc hin cc quy trnh x l thch hp. Tm kim v kim tra dung lng cc loi b nh ca h thng trung tm, thng bo kt qu kim tra v li. Tm v chy cc chng trnh khi to cc tham s hot ng cho cc vi mch iu khin bus, cc b iu khin (controller), cc vi mch iu khin cc cng vo ra v cc thit b trong h thng. Tm np h iu hnh t b nh ngoi v chuyn iu khin h thng cho h iu hnh.

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1.2.3 Ly lnh v thc hin lnh H thng vi x l hot ng bng cch thc hin cc chng trnh. Cc chng trnh l tp hp cc lnh c sp xp theo mt gii thut hp l thc hin mt nhim v no . Thc hin mt lnh c ngha l CPU thc hin mt chc nng x l c bn trn cc d liu nh phn. Trc khi c thc hin, cc chng trnh phi c chuyn vo b nh ca h thng trung tm. Vic chuyn chng trnh vo b nh trung tm c th thc hin bng nhiu cch nh: ghi vo cc b nh ROM bng cc h thng ghi d liu. Truyn t cc thit b nh (HDD, CD-ROM, Flash disk ) vo vng nh RAM ca h thng trung tm. Truyn ti t mt h thng vi x l khc, v d nh truyn t my tnh xung PLC. Khi hot ng CPU s lp i lp li vic thc hin cc cng vic: ly lnh, gii m lnh, thc hin lnh v lu tr kt qu. ly lnh, CPU cn cung cp a ch v tn hiu iu khin c cho b nh v m lnh s c ly vo trong CPU cha vo thanh ghi lnh (hay hng i lnh). a ch ly lnh c CPU gi trong b m chng trnh (PC Program Counter) v cung cp ra bus a ch, sau khi ly mt nh lnh PC s t ng tng ln 1 chun b ly vo nh k tip. Khi c c ch chuyn iu khin chng trnh PC s c thay i CPU ly lnh ti vi tr mi trong b nh. D liu do lnh cung cp s c cung cp ti cc mch in t phn cng bn trong CPU cho kt qu cn thit. Cc loi lnh m CPU thc hin c th chia thnh ba nhm chnh l: Cc lnh di chuyn d liu thc hin vic di chuyn d liu hai chiu gia: cc thanh ghi bn trong CPU, gia CPU v b nh, gia CPU v vo ra. Cc lnh x l d liu thc hin cc php bin i d liu nh phn theo cc hm s hc v logic nh: cng, tr, nhn, chia, and, or, xor, not hay quay dch d liu. Cc lnh iu khin bao gm: cc lnh nhy, cc lnh r nhnh, cc lnh chng trnh con v cc lnh iu khin hot ng ca CPU. 1.2.4 Ngt - Interrupt Ngt l c ch cho php CPU ngng thc hin mt chng trnh hin ti, chuyn qua hot ng vi mt chng trnh con khc gi l chng trnh phc v ngt (ISR Interrupt Service Routine). Trong h thng vi x l cc ngt s xy ra trong cc trng hp: Xy ra li khi thc hin cc lnh ca chng trnh (li chia cho 0, li trn s ), qu trnh ngt x l cc li ny thng c gi l cc ngoi l (exception). Xy ra li phn cng do s h hng bus hay cc vi mch in t trong h thng. Cc ngt ny thng cng c gi l cc ngoi l. Khi cc b iu khin cng vo ra yu cu c phc v: cc ngt ny cc cng vo ra khc nhau s c cc chng trnh phc v ring, v CPU cn tnh
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ton i ch chuyn hot ng ti chng trnh ngt thch hp. Cc ngt ny c gi l cc ngt phn cng. Khi chng trnh chnh thc hin lnh gi chng trnh ngt, ngt ny thng c gi l ngt mm. Cc ngt phn cng bao gm hai loi chnh l ngt c che c bng phn mm (INT Interrupt), v ngt khng che c bng phn mm (NMI Non Maskable Interrupt). Vi ngt INT, khi c yu cu ngt CPU s kim c ngt (IF Interrupt Flag), nu c ngt c thit lp ISR s c thc hin, cn nu khng yu cu ngt s b b qua, CPU vn tip tc hot ng trn chng trnh hin ti. i vi NMI, CPU bt buc phi ngng chng trnh hin ti chuyn qua ISR. Trc khi chuyn iu khin qua chng trnh phc v ngt, CPU lu li cc thng tin cn thit ca chng trnh hin hnh bao gm b m chng trnh v cc c trng thi. Cc thng tin ny s cho php CPU tip tc hot ng thc hin nhim v ang b d, ca chng trnh hin hnh, sau khi thc hin xong chng trnh ngt. CPU s ngng thc hin chng trnh ngt phc hi cc thng tin lu tr quay v chng trnh chnh khi gp lnh kt thc chng trnh ngt (IRET Interrupt Return). 1.2.5 Thm nhp trc tip b nh - DMA Trong my tnh, chu k thm nhp trc tip b nh (DMA Direct Memory Access) thc hin vic truyn d liu trc tip gia thit b vo ra v b nh chnh, m khng thng qua CPU. Nu khng c DMA, khi mun ly mt d liu t vo ra ghi vo b nh, hoc ngc li t b nh ghi ti vo ra, CPU phi thc hin mt chu k c d liu vo bn trong n, v mt chu k ghi d liu t bn trong n ra ngoi. Cng vic ny s rt gy mt thi gian khi cn truyn mt khi d liu ln nh c mt tp tin t cng vo b nh. Khi c DMA, b iu khin DMA (DMAC DMA controller) s yu cu CPU ngng hot ng, DMAC s cp a ch ng thi hai tn hiu c vo ra (IORD) v ghi b nh (MEMWR), thc hin vic c vo ra v ghi trc tip ti b nh m khng thng qua trung gian. DMAC cng c th thc hin vic c b nh v ghi trc tip ti vo ra. DMA thng s dng truyn d liu t cc thit b lu tr ngoi vi b nh chnh, hoc gia b nh chnh v cc thit b vo ra truyn khi d liu khc nh cc thit b mng. 1.2.6 Cc trng thi hot ng ca h thng Cc trng thi hot ng ca h thng vi x l bao gm: c ghi b nh, c ghi vo ra, thc hin cuh k p ng ngt, thc hin chu k p ng DMA, trng thi ch v trng thi bus ri. Khi c b nh CPU cung cp a ch, cp tn hiu c b nh (MEMR) v nhn d liu t b nh vo cc thanh ghi bn trong n. Khi ghi d liu, CPU cung cp a ch, cung cp d liu v cp tn hiu yu cu ghi b nh, d liu s c lu tr vo
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nh ch nh. Tng t vi cc chu k c ghi vo ra CPU s cp cc tn hiu yu cu c vo ra (IOR) hoc ghi vo ra (IOW). Tuy nhin, cc chu k c ghi b nh v vo ra ny s din ra trong nhiu chu k xung nhp, nu tc CPU qu cao m b nh v vo ra khng p ng kp, th chng phi c trch nhim thng bo cho CPU bit, CPU chn thm cc trng thi ch vo chu k c ghi.

Hnh 1.6: Cc chu k ghi vo ra (a) v ghi vo ra c trng thi ch (b) Hnh 1.6a m t mt chu k ghi d liu ti vo ra khng c trng thi ch. Ti chu k xung nhp th nht CPU cung cp a ch (Addr). Ti chu k xung nhp th 2 n cung cp tn hiu ghi vo ra (IOW xung mc 0), v cung cp d liu ra bus (Data). D liu v IOW s c gi nguyn trng thi cho n xung nhp th 4, hon tt chu k ghi d liu ti vo ra trong 4 chu k xung nhp ca CPU, khi tn hiu sn sng (Ready) cung cp t vo ra lun gi nguyn trng thi mc 1 trong sut chu k ghi. Trong chu k ghi, ti chu k xung nhp th 3, CPU s kim tra trng thi ca ng vo Ready. Nu ng vo ny khng cn mc tch cc (mc 1), CPU s hiu l vo ra cha nhn kp d liu, v n s chn thm cc xung nhp ch cho n khi tn hiu ready tch cc tr li (hnh 1.6b). Ngoi cc trng thi lm vic vi th gii bn ngoi nh c ghi b nh, c ghi vo ra v DMA, khi thc hin cc lnh x l ngay bn trong CPU, cc tn hiu kt ni vi bn ngoi ca n s trng thi khng tch cc, trng thi ny c gi l trng thi bus ri (bus idle).

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