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CHNG 1: DN NHP
1.1. T VN Ngy nay vi s pht trin ca cc ngnh cng nghip vi in t, k thut s dn dn c t ng ha. Vi nhng k thut tin tin nh vi x l, vi mch s c ng dng lnh vc khoa hc k thut, qun l, cng nghip t ng ha, cung cp thng tin. do chng ta phi nm bt v vn dng n mt cch c hiu qu nhm gp phn vo s pht trin nn khoa hc k thut th gii ni chung v trong s pht trin k thut in t ni ring ng dng vo thc tin gp phn a cuc sng con ngi ngy cng tt hn. Sau mt ngy tt bt vi cng vic con ngi thch quay v vi thin nhin, sng nc, trong th chi c cnh c bit l h c gia nh hin nay vic p dng t ng ha cn nhiu hn ch, vic chm sc h c tr nn kh khn hn. Nm bt c nhu cu , nhm chng em tm hiu v bt tay vo thc hin ti H C THNG MINH. 1.2. TM QUAN TRNG CA TI

ti c tnh ng dng vo thc t cao, c th ng dng vo nhiu lnh vc t nui c cnh trong gia nh cho n vic nui trng thy hi sn t ng. 1.3. GII HN CA TI ti tin hnh trong thi gian ngn song bn than nhm cn nhiu hn ch v chuyn mn cng nh v ngoi ng nn gp nhiu kh khn trong qu trnh nghin cu, thc hin ti. Nhm chng em ch c th gii quyt mt s vn sau: Pht hin nc d o nhit mi trng nc v iu chnh nhit Cho c n theo gi nh sn Hin th thng tin trn LCD Do nhm chng em rt mong s ng qu bu ca qu Thy C v cc bn sinh vin. 1.2. MC CH NGHIN CU

Mc ch trc ht khi thc hin ti l hon thnh chng trnh hc iu kin tt nghip ra trng. ng thi khi nghin cu thc hin n ti gip chng em pht huy tnh sng to, cch lm vic nhm, kh nng gii quyt vn theo yu cu t ra cng nh mun p dng nhng kin thc hc trn gh nh trng ng dng vo thc tin nhm to ra nhng sn phm, nhng thit b tin nghi phc v cho cng ng. Nu c nghin cu k v su hn c th p dng vo thc t nhm gim bt gnh nng cho nhng ngi nui trng thy hi sn nc ta. Mt khc tp lun vn ny c th lm ti liu tham kho cho nhng sinh vin kha sau, gip cc bn hiu su hn v ng dng ca vi iu khin.

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CHNG 2: KHO ST LINH KIN TRONG MCH


2.1. KHI QUT V VI IU KHIN PIC16F877A Trang 2

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2.1.1. GII THIU V VI IU KHIN 2.1.1.1. GII THIU CHUNG B Vi x l c kh nng vt bc so vi cc h thng khc v kh nng tnh ton, x l, v thay i chng trnh linh hot theo mc ch ngi dng, c bit hiu qu i vi cc bi ton v h thng ln.Tuy nhin i vi cc ng dng nh, tm tnh ton khng i hi kh nng tnh ton ln th vic ng dng vi x l cn cn nhc. Bi v h thng d ln hay nh, nu dng vi x l th cng i hi cc khi mch in giao tip phc tp nh nhau. Cc khi ny bao gm b nh cha d liu v chng trnh thc hin, cc mch in giao tip ngoi vi xut nhp v iu khin tr li, cc khi ny cng lin kt vi vi x l th mi thc hin c cng vic. kt ni cc khi ny i hi ngi thit k phi hiu bit tinh tng v cc thnh phn vi x l, b nh, cc thit b ngoi vi. H thng c to ra kh phc tp, chim nhiu khng gian, mch in phc tp v vn chnh l trnh ngi thit k. Kt qu l gi thnh sn phm cui cng rt cao, khng ph hp p dng cho cc h thng nh. V mt s nhc im trn nn cc nh ch to tch hp mt t b nh v mt s mch giao tip ngoi vi cng vi vi x l vo mt IC duy nht c gi l Microcontroller- Vi iu khin. Mt s c im khc nhau gia vi x l v vi iu khin: V phn cng: vi x l cn c ghp thm cc thit b ngoi vi bn ngoi nh b nh, v cc thit b ngoi vi khc, c th to thnh mt bn mch hon chnh. i vi vi iu khin th bn thn n l mt h my tnh hon chnh vi CPU, b nh, cc mch giao tip, cc b nh thi v mch iu khin ngt c tch hp bn trong mch. V cc c trng ca tp lnh: Do ng dng khc nhau nn cc b vi x l v vi iu khin cng c nhng yu cu khc nhau i vi tp lnh ca chng. Tp lnh ca cc vi x l thng mnh v cc kiu nh a ch vi cc lnh cung cp cc hot ng trn cc lng d liu ln nh 1byte, byte, word, double word... cc b vi iu khin, cc tp lnh rt mnh trong vic x l cc kiu d liu nh nh bit hoc mt vi bit. Do vi iu khin cu to v phn cng v kh nng x l thp hn nhiu soi vi vi x l nn gi thnh ca vi iu khin cng r hn nhiu. Tuy nhin n vn kh nng p ng c tt c cc yu cu ca ngi dng. Vi iu khin c ng dng trong cc dy chuyn t ng loi nh, cc robot c chc nng n gin, trong my git, t v.v...

2.1.1.2. PHN LOI VI IU KHIN di thanh ghi Da vo di ca cc thanh ghi v cc lnh ca vi iu khin m ngi ta chia ra cc loi vi iu khin 8bit, 16bit, hay 32bit.... Cc loi vi iu khin 16bit do c di lnh ln hn nn cc tp lnh cng nhiu hn, phong ph hn. Tuy nhin bt c chng trnh no vit bng vi iu khin 16bit chng ta u c th vit trn vi iu khin 8bit vi chng trnh thch hp. Trang 3

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Kin trc CISC v RISC Vi x l hoc vi iu khin CISC c tp lnh phc tp. Cc vi iu khin ny c mt s lng ln cc lnh nn gip cho ngi lp trnh c th linh hot v d dng hn khi vit chng trnh. Vi iu khin RISC c tp lnh n gin. Chng c mt s lng nh cc lnh n gin. DO , chng i hi phn cng t hn, gi thnh thp hn, v nhanh hn so vivi iu khin CISC. Tuy nhin n i hi ngi lp trnh phi vit cc chng trnh phc tp hn, nhiu lnh hn. Kin trc Harvard v kin trc Vonneumann Kin trc Harvard s dng b nh ring bit cho chng trnh v d liu. Bus a ch v bus d liu c lp vi nhau nn qu trnh truyn nhn d liu n gin hn Kin trc Vonneumann s dng chung b nh cho chng trnh v d liu. iu ny lm cho vi iu khin gn nh hn, gi thnh nh hn. Mt s loi vi iu khin c trn th trng: Vi iu khin MCS-51: 8031, 8032, 8051, 8052, ... Vi iu khin ATMEL: 89Cxx, AT89Cxx51.. Vi iu khin AVR: AT90Sxxxx Vi iu khin PIC: 16C5x, 17C43... 2.1.1.3. CU TRC TNG QUAN CA VI IU KHIN CPU: L tri tim ca h thng. L ni qun l tt c cc hot ng ca vi iu khin . Bn trong CPU gm: ALU l b phn thao tc trn cc d liu B gii m lnh v iu khin, xc nh cc thao tc m CPU cn thc hin Thanh ghi lnh IR, lu gi opcode ca lnh c thc thi Thanh ghi PC, lu gi a ch ca lnh k tip cn thc thi Mt tp cc thanh ghi dng lu thng tin tm thi ROM: ROM l b nh dng lu gi chng trnh.ROM cn dng cha s liucc bng, cc tham s h thng, cc s liu c nh ca h thng. Trong qu trnh hot ng ni dung ROM l c nh, khng th thay i, ni dung ROM ch thay i khi ROM ch xa hoc np chng trnh. RAM: RAM l b nh d liu. B nh RAM dng lm mi trng x l thng tin, lu tr cc kt qu trung gian v kt qu cui cng ca cc php ton, x l thng tin. N cng dng t chc cc vng m d liu, trong cc thao tc thu pht, chuyn i d liu. BUS: BUS l cc ng dn dng di chuyn d liu. Bao gm: bus a ch, bus d liu , v bus iu khin B NH THI: c s dng cho cc mc ch chung v thi gian. WATCHDOG: B phn dng reset li h thng khi h thng gp bt thng. ADC: B phn chuyn tn hiu analog sang tn hiu digital. Cc tn hiu bn ngoi i vo vi iu khin thng dng analog. ADC s chuyn tn hiu ny v dng tn hiu digital m vi iu khin c th hiu c.
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2.1.2. KHO ST V VI IU KHIN PIC16F877A 2.1.2.1. PIC L GI? PIC l vit tt ca Programable Intelligent Computer, c th tm dch l my tnh thng minh kh trnh do hng Genenral Instrument t tn cho vi iu khin u tin ca h: PIC1650, c thit k dng lm cc thit b ngoi vi cho vi iu khin CP1600. Vi iu khin ny sau c nghin cu pht trin thm v t hnh thnh nn dng vi iu khin PIC ngy nay. 2.1.2.2. KIN TRC PIC Cu trc phn cng ca mt vi iu khin c thit k theo hai dng kin trc: kin trc Von Neuman v kin trc Havard.

Hnh 2.1: Kin trc Havard v kin trc Von-Neuman T chc phn cng ca PIC c thit k theo kin trc Havard. im khc bit gia kin trc Havard v kin trc Von-Neuman l cu trc b nh d liu v b nh chng trnh. i vi kin trc Von-Neuman, b nh d liu v b nh chng trnh nm chung trong mt b nh, do ta c th t chc, cn i mt cch linh hot b nh chng trnh v b nh d liu. Tuy nhin iu ny ch c ngha khi tc x l ca CPU phi rt cao, v vi cu trc , trong cng mt thi im CPU ch c th tng tc vi b nh d liu hoc b nh chng trnh. Nh vy c th ni kin trc Von-Neuman khng thch hp vi cu trc ca mt vi iu khin. i vi kin trc Havard, b nh d liu v b nh chng trnh tch ra thnh hai b nh ring bit. Do trong cng mt thi im CPU c th tng tc vi c hai b nh, nh vy tc x l ca vi iu khin c ci thin ng k. Mt im cn ch na l tp lnh trong kin trc Havard c th c ti u ty theo yu cu kin trc ca vi iu khin m khng ph thuc vo cu trc d liu. V d, i vi vi iu khin dng 16F, di lnh lun l 14 bit (trong khi d liu c t chc thnh tng byte), cn i vi kin trc Von-Neuman, di lnh lun l bi s ca 1 byte (do d liu c t chc thnh tng byte). c im ny c minh ha c th trong hnh 2.1. 2.1.2.3. RISC V CISC Nh trnh by trn, kin trc Havard l khi nim mi hn so vi kin trc Von-Neuman. Khi nim ny c hnh thnh nhm ci tin tc thc thi ca mt vi iu khin.

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Qua vic tch ri b nh chng trnh v b nh d liu, bus chng trnh v bus d liu, CPU c th cng mt lc truy xut c b nh chng trnh v b nh d liu, gip tng tc x l ca vi iu khin ln gp i. ng thi cu trc lnh khng cn ph thuc vo cu trc d liu na m c th linh ng iu chnh ty theo kh nng v tc ca tng vi iu khin. V tip tc ci tin tc thc thi lnh, tp lnh ca h vi iu khin PIC c thit k sao cho chiu di m lnh lun c nh (v d i vi h 16Fxxxx chiu di m lnh lun l 14 bit) v cho php thc thi lnh trong mt chu k ca xung clock ( ngoi tr mt s trng hp c bit nh lnh nhy, lnh gi chng trnh con cn hai chu k xung ng h). iu ny c ngha tp lnh ca vi iu khin thuc cu trc Havard s t lnh hn, ngn hn, n gin hn p ng yu cu m ha lnh bng mt s lng bit nht nh. Vi iu khin c t chc theo kin trc Havard cn c gi l vi iu khin RISC (Reduced Instruction Set Computer) hay vi iu khin c tp lnh rt gn. Vi iu khin c thit k theo kin trc Von-Neuman cn c gi l vi iu khin CISC (Complex Instruction Set Computer) hay vi iu khin c tp lnh phc tp v m lnh ca n khng phi l mt s c nh m lun l bi s ca 8 bit (1 byte). 2.1.2.4. CC DNG PIC V CCH LA CHN VI IU KHIN PIC Cc k hiu ca vi iu khin PIC: PIC12xxxx: di lnh 12 bit PIC16xxxx: di lnh 14 bit PIC18xxxx: di lnh 16 bit C: PIC c b nh EPROM (ch c 16C84 l EEPROM) F: PIC c b nh flash LF: PIC c b nh flash hot ng in p thp LV: tng t nh LF, y l k hiu c Bn cnh mt s vi iu khin c k hiu xxFxxx l EEPROM, nu c thm ch A cui l flash (v d PIC16F877 l EEPROM, cn PIC16F877A l flash). Ngoi ra cn c thm mt dng vi iu khin PIC mi l dsPIC. Vit Nam ph bin nht l cc h vi iu khin PIC do hng Microchip sn xut. Cch la chn mt vi iu khin PIC ph hp: Trc ht cn ch n s chn ca vi iu khin cn thit cho ng dng. C nhiu vi iu khin PIC vi s lng chn khc nhau, thm ch c vi iu khin ch c 8 chn, ngoi ra cn c cc vi iu khin 28, 40, 44, chn. Cn chn vi iu khin PIC c b nh flash c th np xa chng trnh c nhiu ln hn. Tip theo cn ch n cc khi chc nng c tch hp sn trong vi iu khin, cc chun giao tip bn trong. Sau cng cn ch n b nh chng trnh m vi iu khin cho php. Ngoi ra mi thng tin v cch la chn vi iu khin PIC c th c tm thy trong cun sch Select PIC guide do nh sn xut Microchip cung cp. 2.1.3. VI IU KHIN PIC16F877A 2.1.3.1. CC DNG S CHN

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Hnh 2.2 Vi iu khin PIC16F877A

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Hnh 2.3 Vi iu khin PIC16F877A/PIC16F874A v cc dng s chn

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2.1.3.2. S KHI VI IU KHIN PIC16F877A

Hnh 2.4 S khi vi iu khin PIC16F877A Khi ALU Arithmetic Logic Unit. Khi b nh cha chng trnh Flash Program Memory. Khi b nh cha d liu EPROM Data EPROM. Khi b nh file thanh ghi RAM RAM file Register. Trang 9

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Khi gii m lnh v iu khin Instruction Decode Control. Khi thanh ghi c bit. Khi ngoi vi timer. Khi giao tip ni tip. Khi chuyn i tn hiu tng t sang s - ADC. Khi cc port xut nhp.

2.1.3.3. CHC NNG CC CHN CA PIC16F877A

Hnh 2.5 S chn vi iu khin PIC16F877A

Chn OSC1/CLK1(13): ng vo kt ni vi dao ng thch anh hoc ng vo nhn xung clock t bn ngoi. Chn OSC2/CLK2(14): ng ra dao ng thch anh hoc ng ra cp xung clock. Chn

(1) c 2 chc nng

: ng vo reset tch cc mc thp. Vpp: ng vo nhn in p lp trnh khi lp trnh cho PIC. Chn RA0/AN0(2), RA1/AN1(3), RA2/AN2(3): c 2 chc nng - RA0,1,2: xut/ nhp s. AN 0,1,2: ng vo tng t ca knh th 0,1,2. Chn RA2/AN2/VREF-/CVREF+(4): xut nhp s/ ng vo tng t ca knh th 2/ nh vo in p chun thp ca b AD/ ng vo in p chn cao ca b AD. Trang 10

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Chn RA3/AN3/VREF+(5): xut nhp s/ ng vo tng t knh 3/ ng vo in p chun (cao) ca b AD. Chn RA4/TOCK1/C1OUT(6): xut nhp s/ ng vo xung clock bn ngoi cho Timer 0/ ng ra b so snh 1. Chn RA5/AN4/ / C2OUT(7): xut nhp s/ ng vo tng t knh 4/ ng vo chn la SPI ph/ ng ra b so snh 2. Chn RB0/INT (33): xut nhp s/ ng vo tn hiu ngt ngoi. Chn RB1(34), RB2(35): xut nhp s. Chn RB3/PGM(36): xut nhp s/ cho php lp trnh in p thp ICSP. Chn RB4(37), RB5(38): xut nhp s. Chn RB6/PGC(39): xut nhp s/ mch g ri v xung clock lp trnh ICSP. Chn RB7/PGD(40): xut nhp s/ mch g ri v d liu lp trnh ICSP. Chn RC0/T1OCO/T1CKI(15): xut nhp s/ ng vo b giao ng Timer1/ ng vo xung clock bn ngoi Timer 1. Chn RC1/T1OSI/CCP2(16) : xut nhp s/ ng vo b dao ng Timer 1/ ng vo Capture2, ng ra compare2, ng ra PWM2. Chn RC2/CCP1(17): xut nhp s/ ng vo Capture1 ,ng ra compare1, ng ra PWM1. Chn RC3/SCK/SCL(18): xut nhp s/ ng vo xung clock ni tip ng b, ng ra ch SPI./ ng vo xung clock ni tip ng b, ng ra ca ch I2C. Chn RC4/SDI/SDA(23): xut nhp s/ d liu vo SPI/ xut nhp d liu I2C. Chn RC5/SDO(24): xut nhp s/ d liu ra SPI. Chn RC6/TX/CK(25): xut nhp s/ truyn bt ng b USART/ xung ng b USART. Chn RC7/RX/DT(26): xut nhp s/ nhn bt ng b USART. Chn RD0-7/PSP0-7(19-30): xut nhp s/ d liu port song song. Chn RE0/ t 5. /AN5(8): xut nhp s/ iu khin port song song/ ng vo tng

Chn RE1/ /AN6(9): xut nhp s/ iu khin ghi port song song/ ng vo tng t knh th 6.

Chn RE2/ /AN7(10): xut nhp s/ Chn chn la iu khin port song song/ ng vo tng t knh th 7. Chn VDD(11, 32) v VSS(12, 31): l cc chn ngun ca PIC. 2.1.3.1. C IM VI IU KHIN PIC16F877A y l vi iu khin thuc h PIC16Fxxx vi tp lnh gm 35 lnh c di 14 bit. Mi lnh u c thc thi trong mt chu k xung clock. Tc hot ng ti a cho php l 20 MHz vi mt chu k lnh l 200ns. B nh chng trnh 8Kx14 bit, b nh d liu 368x8 byte RAM v b nh d liu EEPROM vi dung lng 256x8 byte. S PORT I/O l 5 vi 33 pin I/O. C 8 knh chuyn i A/D Cc c tnh ngoi vi bao gm cc khi chc nng sau: Timer0: b m 8 bit vi b chia tn s 8 bit. Timer1: b m 16 bit vi b chia tn s, c th thc hin chc nng m da vo xung clock ngoi vi ngay khi vi iu khin hot ng ch sleep. Trang 11

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Timer2: b m 8 bit vi b chia tn s, b postcaler. Hai b Capture/so snh/iu ch rng xung. Cc chun giao tip ni tip SSP (Synchronous Serial Port), SPI v I2C. Chun giao tip ni tip USART vi 9 bit a ch. Cng giao tip song song PSP (Parallel Slave Port) vi cc chn iu khin RD, WR, Bn cnh l mt vi c tnh khc ca vi iu khin nh: B nh flash vi kh nng ghi xa c 100.000 ln. B nh EEPROM vi kh nng ghi xa c 1.000.000 ln. D liu b nh EEPROM c th lu tr trn 40 nm. Kh nng t np chng trnh vi s iu khin ca phn mm. Np c chng trnh ngay trn mch in ICSP (In Circuit Serial Programming) thng qua 2 chn. Watchdog Timer vi b dao ng trong. Chc nng bo mt m chng trnh. Ch Sleep. C th hot ng vi nhiu dng Oscillator khc nhau.

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Bng 2.1 Tm tt c im ca VDK PIC 16F877A 2.1.4. T CHC B NH Cu trc b nh ca vi iu khin PIC16F877A bao gm b nh chng trn (Program memory) v b nh d liu (Data Memory). 2.1.4.1.B NH CHNG TRNH B nh chng trnh ca vi iu khinPIC16F877A l b nh flash, dung lng bnh 8K word (1 word = 14 bit) v c phnthnh nhiu trang (t page0 n page 3). Nh vy b nh chng trnh c kh nngcha c 8*1024 = 8192 lnh (v mt lnh sau khi m ha s c dung lng 1 word (14bit). m ha c a ch ca 8K wordb nh chng trnh, b m chng trnh cdung lng 13 bit (PC<12:0>). Khi vi iu khin c reset, b mchng trnh s ch n a ch 0000h (Resetvector). Khi c ngt xy ra, b m chngtrnh s ch n a ch 0004h (Interruptvector).

Trang B Hnh 2.413 nh chng trnh PIC16F877A

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B nh chng trnh khng bao gm b nh stack v khng c a ch ha bi b m chng trnh. B nh stack s c cp c th trong phn sau.

Hnh 2.5 B nh chng trnh vi iu khin PIC16F877A

2.1.4.2. B NH D LIU B nh d liu ca PIC l b nh EEPROM c chia ra lm nhiu bank.i vi PIC16F877A b nh d liu c chia ra lm 4 bank. Mi bank c dung lng 128 byte, bao gm cc thanh ghi c chc nng c bit SFG (Special Function Register) nm cc vng a ch thp v cc thanh ghi mc ch chung GPR (General Purpose Register) nm vng a ch cn li trong bank. Cc thanh ghi SFR thng xuyn c s dng (v d nh thanh ghi STATUS) s c t tt c cc bank ca b nh d liu gip thun tin trong qu trnh truy xut v lm gim bt lnh ca chng trnh. S c th ca b nh d liu PIC16F877A nh sau:

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Bng 2.2 B nh d liu PIC16F877A

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2.1.4.2.1. THANH GHI CHC NNG C BIT SFR y l cc thanh ghi c s dng bi CPU hoc c dng thit lp v iu khin cc khi chc nng c tch hp bn trong vi iu khin. C th phn thanh ghi SFR lm hai lai: thanh ghi SFR lin quan n cc chc nng bn trong (CPU) v thanh ghi SRF dng thit lp v iu khin cc khi chc nng bn ngoi (v d nh ADC, PWM, ). Phn ny s cp n cc thanh ghi lin quan n cc chc nng bn trong.Cc thanh ghi dng thit lp v iu khin cc khi chc nng s c nhc n khi ta cp n cc khi chc nng . Thanh ghi STATUS (03h, 83h, 103h, 183h):thanh ghi cha kt qu thc hin php ton ca khi ALU, trng thi reset v cc bit chn bank cn truy xut trong b nh d liu.

Bng 2.3 Thanh ghi STATUS Thanh ghi OPTION_REG (81h, 181h): thanh ghi ny cho php c v ghi, cho php iu khin chc nng pull-up ca cc chn trong PORTB, xc lp cc tham s v xung tc ng, cnh tc ng ca ngt ngoi vi v b m Timer0.

Bng 2.4 Thanh ghi OPTION_REG Thanh ghi INTCON (0Bh, 8Bh,10Bh, 18Bh):thanh ghi cho php c v ghi, cha cc bit iu khin v cc bit c hiu khi timer0 b trn, ngt ngoi vi RB0/INT v ngt interrput- on-change ti cc chn ca PORTB.

Bng 2.5 Thanh ghi INTCON Thanh ghi PIE1 (8Ch): cha cc bit iu khin chi tit cc ngt ca cc khi chcnng ngoi vi.

Bng 2.6 Thanh ghi PIE1

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Thanh ghi PIR1 (0Ch) cha c ngt ca cc khi chc nng ngoi vi, cc ngt ny c cho php bi cc bit iu khin cha trong thanh ghi PIE1.

Bng 2.7 Thanh ghi PIR1 Thanh ghi PIE2 (8Dh): cha cc bit iu khin cc ngt ca cc khi chc nng CCP2, SSP bus, ngt ca b so snh v ngt ghi vo b nh EEPROM.

Bng 2.8 Thanh ghi PIE2 Thanh ghi PIR2 (0Dh): cha cc c ngt ca cc khi chc nng ngoi vi, cc ngtny c cho php bi cc bit iu khin cha trong thanh ghi PIE2.

Bng 2.9 Thanh ghi PIR2 Thanh ghi PCON (8Eh): cha cc c hiu cho bit trng thi cc ch reset ca vi iu khin.

Bng 2.10 Thanh ghi PCON

2.1.4.2.2. THANH GHI MC CH CHUNG GPR Cc thanh ghi ny c th c truy xut trc tip hoc gin tip thng qua thanh ghiFSG (File Select Register). y l cc thanh ghi d liu thng thng, ngi s dng c th ty theo mc ch chng trnh m c th dng cc thanh ghi ny cha cc bin s, hng s, kt qu hoc cc tham s phc v cho chng trnh.

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2.1.4.3. STACK Stack khng nm trong b nh chng trnh hay b nh d liu m l mt vng nh c bit khng cho php c hay ghi. Khi lnh CALL c thc hin hay khi mt ngt xy ra lm chng trnh b r nhnh, gi tr ca b m chng trnh PC t ng c vi iu khin ct vo trong stack. Khi mt trong cc lnh RETURN, RETLW hat RETFIE c thc thi, gi tr PC s t ng c ly ra t trong stack, vi iu khin s thc hin tip chng trnh theo ng qui trnh nh trc. B nh Stack trong vi iu khin PIC h 16F87xA c kh nng cha c 8 a ch v hot ng theo c ch xoay vng. Ngha l gi tr ct vo b nh Stack ln th 9 s ghi ln gi tr ct vo Stack ln u tin v gi tr ct vo b nh Stack ln th 10 s ghi ln gi tr 6 ct vo Stack ln th 2. Cn ch l khng c c hiu no cho bit trng thi stack, do ta khng bit c khi no stack trn. Bn cnh tp lnh ca vi iu khin dng PIC cng khng c lnh POP hay PUSH, cc thao tc vi b nh stack s hon ton c iu khin bi CPU. 2.1.5. CC CNG XUT NHP CA PIC16F877A Cng xut nhp (I/O port) chnh l phng tin m vi iu khin dng tng tcvi th gii bn ngoi. S tng tc ny rt a dng v thng qua qu trnh tng tc , chc nng ca vi iu khin c th hin mt cch r rng. Mt cng xut nhp ca vi iu khin bao gm nhiu chn (I/O pin), ty theo cch b tr v chc nng ca vi iu khin m s lng cng xut nhp v s lng chn trong mi cng c th khc nhau. Bn cnh , do vi iu khin c tch hp sn bn trong cc c tnh giao tip ngoi vi nn bn cnh chc nng l cng xut nhp thng thng, mt s chn xut nhp cn c thm cc chc nng khc th hin s tc ng ca cc c tnh ngoi vi nu trn i vi th gii bn ngoi. Chc nng ca tng chn xut nhp trong mi cng hon ton c th c xc lp v iu khin c thng qua cc thanh ghi SFR lin quan n chn xut nhp . Vi iu khin PIC16F877A c 5 cng xut nhp, bao gm PORTA, PORTB, PORTC, PORTD v PORTE. Cu trc v chc nng ca tng cng xut nhp s c cp c th trong phn sau. 2.1.5.1.PORT A PORTA (RPA) bao gm 6 I/O pin.y l cc chn hai chiu (bidirectional pin), ngha l c th xut v nhp c. Chc nng I/O ny c iu khin bi thanh ghi TRISA (a ch 85h). Mun xc lp chc nng ca mt chn trong PORTA l input, ta set bit iu khin tng ng vi chn trong thanh ghi TRISA v ngc li, mun xc lp chc nng ca mt chn trong PORTA l output, ta clear bit iu khin tng ng vi chn trong thanh ghi TRISA. Thao tc ny hon ton tng t i vi cc PORT v cc thanh ghi iu khin tng ng TRIS (i vi PORTA l TRISA, i vi PORTB l TRISB, i vi PORTC l TRISC, i vi PORTD l TRISD v i vi PORTE l TRISE). Bn cnh PORTA cn l ng ra ca b ADC, b so snh, ng vo analog ng vo xung clock ca Timer0 v ng vo ca b giao tip MSSP (Master Synchronous Serial Port).c tnh ny s c trnh by c th trong phn sau. Cc thanh ghi SFR lin quan n PORTA bao gm: Trang 18

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GVHD: Ths PHAN THANH TON

PORTA (a ch 05h) : cha gi tr cc pin trong PORTA. TRISA (a ch 85h) : cha gi tr cc pin trong PORTA. CMCON (a ch 9Ch) : thanh ghi iu khin b so snh. CVRCON (a ch 9Dh): thanh ghi iu khin b so snh in p. ADCON1 (a ch 9Fh): thanh ghi ieu khien bo ADC. 2.1.5.2. PORT B PORTB (RPB) gm 8 pin I/O. Thanh ghi iu khin xut nhp tng ng l TRISB. Bn cnh mt s chn ca PORTB cn c s dng trong qu trnh np chng trnh cho vi iu khin vi cc ch np khc nhau. PORTB cn lin quan n ngt ngoi vi v b Timer0. PORTB cn c tch hp chc nng in tr ko ln c iu khin bi chng trnh. Cc thanh ghi SFR lin quan n PORTB bao gm: PORTB (a ch 06h,106h) : cha gi tr cc pin trong PORTB TRISB (a ch 86h,186h) : iu khin xut nhp OPTION_REG (a ch 81h,181h) : iu khin ngt ngoi vi v b Timer0. 2.1.5.3. PORT C PORTC (RPC) gm 8 pin I/O. Thanh ghi iu khin xut nhp tng ng l TRISC. Bn cnh PORTC cn cha cc chn chc nng ca b so snh, b Timer1, b PWM v cc chun giao tip ni tip I2C, SPI, SSP, USART. Cc thanh ghi iu khin lin quan n PORTC: PORTC (a ch 07h) : cha gi tr cc pin trong PORTC TRISC (a ch 87h) : iu khin xut nhp 2.1.5.4. PORT D PORTD (RPD) gm 8 chn I/O, thanh ghi iu khin xut nhp tng ng l TRISD.PORTD cn l cng xut d liu ca chun giao tip PSP (Parallel Slave Port). Cc thanh ghi lin quan n PORTD bao gm: PORTD : cha gi tr cc pin trong PORTD. TRISD : iu khin xut nhp. 2.1.5.5. PORT E PORTE (RPE) gm 3 chn I/O. Thanh ghi iu khin xut nhp tng ng l TRISE.Cc chn ca PORTE c ng vo analog.Bn cnh PORTE cn l cc chn iu khin ca chun giao tip PSP. Cc thanh ghi lin quan n PORTE bao gm: PORTE : cha gi tr cc chn trong PORTE. TRISE : iu khin xut nhp v xc lp cc thng s cho chun giao tip PSP. ADCON1 : thanh ghi iu khin khi ADC. 2.1.6. TIMER 0 y l mt trong ba b m hoc b nh thi ca vi iu khin PIC16F877A. Timer0 l b m 8 bit c kt ni vi b chia tn s (prescaler) 8 bit. Cu trc ca Timer0 cho php ta la chn xung clock tc ng v cnh tch cc ca xung clock. Ngt Timer0 s xut hin khi Timer0 b trn. Bit TMR0IE (INTCON<5>) l bit iu khin ca Timer0. TMR0IE=1 cho php ngt Timer0 tc ng, TMR0IF= 0 khng cho php ngt Timer0 tc ng. S khi ca Trang 19

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GVHD: Ths PHAN THANH TON

Hnh 2.7 S khi ca Timer 0 . Mun Timer0 hot ng ch Timer ta clear bit TOSC (OPTION_REG<5>), khi gi tr thanh ghi TMR0 s tng theo tng chu k xung ng h (tn s vo Timer0 bng tn s oscillator). Khi gi tr thanh ghi TMR0 t FFh tr v 00h, ngt Timer0 s xut hin. Thanh ghi TMR0 cho php ghi v xa c gip ta n nh thi im ngt Timer0 xut hin mt cch linh ng. Mun Timer0 hot ng ch counter ta set bit TOSC (OPTION_REG<5>). Khi xung tc ng ln b m c ly t chn RA4/TOCK1. Bit TOSE (OPTION_REG<4>) cho php la chn cnh tc ng vo bt m. Cnh tc ng s l cnh ln nu TOSE=0 v cnh tc ng s l cnh xung nu TOSE=1. Khi thanh ghi TMR0 b trn, bit TMR0IF (INTCON<2>) s c set. y chnh l c ngt ca Timer0.C ngt ny phi c xa bng chng trnh trc khi b m bt u thc hin li qu trnh m. Ngt Timer0 khng th nh thc vi iu khin t ch sleep. B chia tn s (prescaler) c chia s gia Timer0 v WDT (Watchdog Timer). iu c ngha l nu prescaler c s dng cho Timer0 th WDT s khng c c h tr ca prescaler v ngc li.Prescaler c iu khin bi thanh ghi OPTION_REG. Bit PSA (OPTION_REG<3>) xc nh i tng tc ng ca prescaler. Cc bit PS2:PS0 (OPTION_REG<2:0>) xc nh t s chia tn s ca prescaler. Xem li thanh ghi OPTION_REG xc nh li mt cch chi tit v cc bit iu khin trn. Trang 20

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Cc lnh tc ng ln gi tr thanh ghi TMR0 s xa ch hot ng ca prescaler.Khi i tng tc ng l Timer0, tc ng ln gi tr thanh ghi TMR0 s xa prescaler nhng khng lm thay i i tng tc ng ca prescaler.Khi i tng tc ng l WDT, lnh CLRWDT s xa prescaler, ng thi prescaler s ngng tc v h tr cho WDT. Cc thanh ghi iu khin lin quan n Timer0 bao gm: TMR0 (a ch 01h, 101h) : cha gi tr m ca Timer0. INTCON (a ch 0Bh, 8Bh, 10Bh, 18Bh): cho php ngt hot ng (GIE v PEIE). OPTION_REG (a ch 81h, 181h): iu khin prescaler. 2.1.7. TIMER 1 Timer1 l b nh thi 16 bit, gi tr ca Timer1 s c lu trong hai thanh ghi (TMR1H:TMR1L). C ngt ca Timer1 l bit TMR1IF (PIR1<0>). Bit iu khin caTimer1 s l TMR1IE (PIE<0>). Tng t nh Timer0, Timer1 cng c hai ch hot ng: ch nh thi (timer) vi xung kch l xung clock ca oscillator (tn s ca timer bng tn s ca oscillator) v ch m (counter) vi xung kch l xung phn nh cc s kin cn m ly t bn ngoi thng qua chn RC0/T1OSO/T1CKI (cnh tc ng l cnh ln). Vic la chn xung tc ng (tng ng vi vic la chn ch hot ng l timer hay counter) c iu khin bi bit TMR1CS (T1CON<1>). Sau y l s khi ca Timer1:

Hnh 2.8 S khi ca Timer1 Ngoi ra Timer1 cn c chc nng reset input bn trong c iu khin bi mttrong hai khi CCP (Capture/Compare/PWM). Khi bit T1OSCEN (T1CON<3>) c set, Timer1 s ly xung clock t hai chn RC1/T1OSI/CCP2 v RC0/T1OSO/T1CKI lm xung m. Timer1 s bt u m sau cnh xung u tin ca xung ng vo. Khi PORTC s b qua s tc ng ca hai bit TRISC<1:0> v PORTC<2:1> c gn gi tr 0. Khi clear bit T1OSCEN Timer1 s ly xung m t oscillator hoc t chn Trang 21

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RC0/T1OSO/T1CKI. Timer1 c hai ch m l ng b (Synchronous) v bt ng b (Asynchronous). Ch m c quyt nh bi bit iu khin (T1CON<2>). Khi =1 xung m ly t bn ngoi s khng c ng b ha vi xung clock bn trong, Timer1 s tip tc qu trnh m khi vi iu khin ang ch sleep v ngt do Timer1 to ra khi b trn c kh nng nh thc vi iu khin. ch m bt ng b, Timer1 khng th c s dng lm ngun xung clock cho khi CCP (Capture/Compare/Pulse width modulation). Khi =0 xung m vo Timer1 s c ng b ha vi xung clock bn trong. ch ny Timer1 s khng hot ng khi vi iu khin ang ch sleep. Cc thanh ghi lin quan n Timer1 bao gm: INTCON (a ch 0Bh, 8Bh, 10Bh, 18Bh): cho php ngt hot ng (GIE v PEIE). PIR1 (a ch 0Ch): cha c ngt Timer1 (TMR1IF). PIE1( a ch 8Ch): cho php ngt Timer1 (TMR1IE). TMR1L (a ch 0Eh): cha gi tr 8 bit thp ca b m Timer1. TMR1H (a ch 0Eh): cha gi tr 8 bit cao ca b m Timer1. T1CON (a ch 10h): xc lp cc thng s cho Timer1. 2.1.8. TIMER 2 Timer2 l b nh thi 8 bit v c h tr bi hai b chia tn s prescaler v postscaler. Thanh ghi cha gi tr m ca Timer2 l TMR2. Bit cho php ngt Timer2 tc ng l TMR2ON (T2CON<2>). C ngt ca Timer2 l bit TMR2IF (PIR1<1>). Xung ng vo (tn s bng tn s oscillator) c a qua b chia tn s prescaler 4 bit (vi cc t s chia tn s l 1:1, 1:4 hoc 1:16 v c iu khin bi cc bit T2CKPS1:T2CKPS0 (T2CON<1:0>)).

Hnh 2.9 S khi Timer2 Timer2 cn c h tr bi thanh ghi PR2. Gi tr m trong thanh ghi TMR2 s tng t 00h n gi tr cha trong thanh ghi PR2, sau c reset v 00h. Kh I reset thanh ghi PR2 c nhn gi tr mc nh FFh. Ng ra ca Timer2 c a qua b chia tn s postscaler vi cc mc chia t 1:1

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n 1:16. Postscaler c iu khin bi 4 bit T2OUTPS3:T2OUTPS0. Ng ra ca postscaler ng vai tr quyt nh trong vic iu khin c ngt. Ngoi ra ng ra ca Timer2 cn c kt ni vi khi SSP, do Timer2 cn ngvai tr to ra xung clock ng b cho khi giao tip SSP. Cc thanh ghi lin quan n Timer2 bao gm: INTCON (a ch 0Bh, 8Bh, 10Bh, 18Bh): cho php ton b cc ngt (GIE v PEIE). PIR1 (a ch 0Ch): cha c ngt Timer2 (TMR2IF). PIE1 (a ch 8Ch): cha bit iu khin Timer2 (TMR2IE). TMR2 (a ch 11h): cha gi tr m ca Timer2. T2CON (a ch 12h): xc lp cc thng s cho Timer2. PR2 (a ch 92h): thanh ghi h tr cho Timer2. Nhn xt v Timer0, Timer1 v Timer2: Timer0 v Timer2 l b m 8 bit (gi tr m ti a l FFh), trong khi Timer1 l b m 16 bit (gi tr m ti a l FFFFh). Timer0, Timer1 v Timer2 u c hai ch hot ng l timer v counter. Xung clock c tn s bng tn s ca oscillator. Xung tc ng ln Timer0 c h tr bi prescaler v c th c thit lp nhiu ch khc nhau (tn s tc ng, cnh tc ng) trong khi cc thng s ca xung tc ng ln Timer1 l c nh.Timer2 c h tr bi hai b chia tn s prescaler v postcaler c lp, tuy nhin cnh tc ng vn c c nh l cnh ln. Timer1 c quan h vi khi CCP, trong khi Timer2 c kt ni vi khi SSP. Mt vi so snh s gip ta d dng la chn c Timer thch hp cho ng dng. 2.1.9. ADC ADC (Analog to Digital Converter) l b chuyn i tn hiu gia hai dng tng t v s. PIC16F877A c 8 ng vo analog (RA4:RA0 v RE2:RE0). Hiu in th chun VREF c th c la chn l VDD, VSS hay hiu in th chun c xc lp trn hai chn RA2 v RA3. Kt qu chuyn i t tn tiu tng t sang tn hiu s l 10 bit s tng ng v c lu trong hai thanh ghi ADRESH:ADRESL. Khi khng s dng b chuyn i ADC, cc thanh ghi ny c th c s dng nh cc thanh ghi thng thng khc. Khi qu trnh chuyn i hon tt, kt qu s c lu vo hai thanh ghi ADRESH:ADRESL, bit (ADCON0<2>) c xa v 0 v c ngt ADIF c set. Quy trnh chuyn i t tng t sang s bao gm cc bc sau: 1. Thit lp cc thng s cho b chuyn i ADC: Chn ng vo analog, chn in p mu (da trn cc thng s ca thanh ghi ADCON1) Chnh knh chuyn i AD (thanh ghi ADCON0). Chnh xung clock cho knh chuyn i AD (thanh ghi ADCON0). Cho php b chuyn i AD hot ng (thanh ghi ADCON0). 1. Thit lp cc c ngt cho b AD Clear bit ADIF. Set bit ADIE.

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3. 4. 5.

6. 7.

Set bit PEIE. Set bit GIE. i cho ti khi qu trnh ly mu hon tt. Bt u qu trnh chuyn i (set bit ) i cho ti khi qu trnh chuyn i hn tt bng cch: Kim tra bit Nu =0, qu trnh chuyn i hon tt. Kim tra c ngt. c kt qu chuyn i v xa c ngt, set bit (nu cn tip tc chuyn i). Tip tc thc hin cc bc 1 v 2 cho qu trnh chuyn i tip theo.

Hnh 2.10 S khi b chuyn i ADC.

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Cn ch l c hai cch lu kt qu chuyn i AD, vic la chn cch lu c iu khin bi bit ADFM v c minh ha c th trong hnh sau:

Hnh 2.11 Cc cch lu kt qu chuyn i ADC Cc thanh ghi lin quan n b chuyn i ADC bao gm: INTCON (a ch 0Bh, 8Bh, 10Bh, 18Bh): cho php cc ngt (cc bit GIE, PEIE). PIR1 (a ch 0Ch): cha c ngt AD (bit ADIF). PIE1 (a ch 8Ch): cha bit iu khin AD (ADIE). ADRESH (a ch 1Eh) v ADRESL (a ch 9Eh): cc thanh ghi cha kt qu chuyn i AD. ADCON0 (a ch 1Fh) v ADCON1 (a ch 9Fh): xc lp cc thng s cho b chuyn i AD. PORTA (a ch 05h) v TRISA (a ch 85h): lin quan n cc ng vo analog PORTA. PORTE (a ch 09h) v TRISE (a ch 89h): lin quan n cc ng vo analog PORTE. 2.1.10. B SO SNH COMPARATOR B so snh bao gm hai b so so snh tn hiu analog v c t PORTA. Ng vo b so snh l cc chn RA3:RA0, ng ra l hai chn RA4 v RA5. Thanh ghi iu khin b so snh l CMCON. Cc bit CM2:CM0 trong thanh ghi CMCON ng vai tr chn la cc ch hot ng cho b Comparator (hnh 2.10). C ch hot ng ca b Comparator nh sau:

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Hnh 2.12 Nguyn l hot ng ca mt b so snh n gin. Tn hiu analog chn VIN + s c s snh vi in p chun chn V IN- v tnhiu ng ra b so snh s thay i tng ng nh hnh v. Khi in p chn VIN+ ln hn in p chn VIN+ ng ra s mc 1 v ngc li. Da vo hnh v ta thy p ng ti ng ra khng phi l tc thi so vi thay i ting vo m cn c mt khong thi gian nht nh ng ra thay i trng thi (ti a l 10 us).Cn ch n khong thi gian p ng ny khi s dng b so snh. Cc tnh ca cc b so snh c th thay i da vo cc gi tr t vo cc bit C2INV v C1INV (CMCON<4:5>).

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GVHD: Ths PHAN THANH TON

Hnh 2.13 Cc ch hot ng ca b comparator. Cc bit C2OUT v C1OUT (CMCON<7:6>) ng vai tr ghi nhn s thay i tn hiu analog so vi in p t trc. Cc bit ny cn c x l thch hp bng chng trnh ghi nhn s thay i ca tn hiu ng vo. C ngt ca b so snh l bit CMIF (thanh ghi PIR1). C ngt ny phi c reset v 0. Bit iu khin b so snh l bit CMIE (Tranh ghi PIE). Cc thanh ghi lin quan n b so snh bao gm: CMCON (a ch 9Ch) v CVRCON (a ch 9Dh): xc lp cc thng s cho b so snh.

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Thanh ghi INTCON (a ch 0Bh, 8Bh, 10Bh, 18Bh): cha cc bit cho php cc ngt (GIE v PEIE). Thanh ghi PIR2 (a ch 0Dh): cha c ngt ca b so snh (CMIF). Thanh ghi PIE2 (a ch 8Dh): cha bit cho php b so snh (CNIE). Thanh ghi PORTA (a ch 05h) v TRISA (a ch 85h): cc thanh ghi iu khin PORTA. . 2.1.11. CCP (CAPTURE/COMPARE/PWM) CCP (Capture/Compare/PWM) bao gm cc thao tc trn cc xung m cung cp bi cc b m Timer1 v Timer2. PIC16F877A c tch hp sn hai khi CCP : CCP1 v CCP2. Mi CCP c mt thanh ghi 16 bit (CCPR1H:CCPR1L v CCPR2H:CCPR2L), pin iu khin dung cho khi CCPx l RC2/CCP1 v RC1/T1OSI/CCP2. Cc chc nng ca CCP bao gm: Capture. So snh (Compare). iu ch rng xung PWM (Pulse Width Modulation).

Hnh 2.14 S khi Capture/Compare/PWM C CCP1 v CCP2 v nguyn tc hot ng u ging nhau v chc nng ca tng khi l kh c lp. Tuy nhin trong mt s trng hp ngoi l CCP1 v CCP2 c kh nng phi hp vi nhau to ra cc hin tng c bit (Special event trigger) hoc cc tc ng ln Timer1 v Timer2. Cc trng hp ny c lit k trong bng sau:

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Bng 2.11 Chc nng Capture/Compare/PWM Khi hot ng ch Capture th khi c mt hin tng xy ra ti chn RC2/CCP1(hoc RC1/T1OSI/CCP2), gi tr ca thanh ghi TMR1 s c a vo thanh ghi CCPR1(CCPR2). Cc hin tng c nh ngha bi cc bit CCPxM3:CCPxM0 (CCPxCON<3:0>) v c th l mt trong cc hin tng sau: Mi khi c cnh xung ti cc pin CCP. Mi khi c cnh ln. Mi cnh ln th 4. Mi cnh ln th 16. Sau khi gi tr ca thanh ghi TMR1 c a vo thanh ghi CCPRx, c ngt CCPIF c set v phi c xa bng chng trnh. Nu hin tng tip theo xy ra m gi tr trong thanh ghi CCPRx cha c x l, gi tr tip theo nhn c s t ng c ghi ln gi tr c. Mt s im cn ch khi s dng CCP nh sau: Cc pin dng cho khi CCP phi c n nh l input (set cc bit tng ng trong thanh ghi TRISC). Khi n nh cc pin dng cho khi CCP l output, vic a gi tr vo PORTC cng c th gy ra cc hin tng tc ng ln khi CCP do trng thi ca pin thay i. Timer1 phi c hot ng ch Timer hoc ch m ng b. Trnh s dng ngt CCP bng cch clear bit CCPxIE (thanh ghi PIE1), c ngt CCPIF nn c xa bng phn mm mi khi c set tip tc nhn nh c trng thi hot ng ca CCP. CCP cn c tch hp b chia tn s prescaler c iu khin bi cc bit CCPxM3:CCPxM0. Vic thay i i tng tc ng ca prescaler c th to ra hot ng ngt. Prescaler c xa khi CCP khng hot ng hoc khi reset. Tng t nh ch Capture, Timer1 phi c n nh ch hot ng l timer hoc m ng b. Ngoi ra, khi ch Compare, CCP c kh nng to ra hin tng c bit (Special Event trigger) lm reset gi tr thanh ghi TMR1 v khi ng b chuyn i ADC. iu ny cho php ta iu khin gi tr thanh ghi TMR1 mt cch linh ng hn. Khi hot ng ch PWM (PulseWidth Modulation _ khi iu ch Trang 29

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rngxung), tn hiu sau khi iu ch s ca ra cc pin ca khi CCP (cn n nhcc pin ny l output). s dng chcnng iu ch ny trc tin ta cn tinhnh cc bc ci t sau: 1. Thit lp thi gian ca 1 chu kca xung iu ch cho PWM (period) bng cch a gi tr thch hp vo thanh ghi PR2. 2. Thit lp rng xung cn iu ch (duty cycle) bng cch a gi tr vo thanh ghi CCPRxL v cc bit CCP1CON<5:4>. 3. iu khin cc pin ca CCP l output bng cch clear cc bit tng ng trong thanh ghi TRISC. 4. Thit lp gi tr b chia tn s prescaler ca Timer2 v cho php Timer2 hot ng bng cch a gi tr thch hp vo thanh ghi T2CON. 5. Cho php CCP hot ng ch PWM. Trong gi tr 1 chu k (period) ca xung iu ch c tnh bng cng thc: PWM period = [(PR2) + 1] x 4 x TOSC x (gi tr b chia tn s ca TMR2) B chia tn s prescaler ca Timer2 ch c th nhn cc gi tr 1,4 hoc 16 (xem li Timer2 bit thm chi tit). Khi gi tr thanh ghi PR2 bng vi gi tr thanh ghi TMR2 th qu trnh sau xy ra: Thanh ghi TMR2 t ng c xa. Pin ca khi CCP c set. Gi tr thanh ghi CCPR1L (cha gi tr n nh rng xung iu ch duty cycle) c a vo thanh ghi CCPRxH. rng ca xung iu ch (duty cycle) c tnh theo cng thc: PWM duty cycle (CCPRXL:CCPXCON<5:4> x TOSC x (gi tr b chia tn sTMR2) Nh vy 2 bit CCPxCON<5:4> s cha 2 bit LSB. Thanh ghi CCPRxL cha byte cao ca gi tr quyt nh rng xung.Thanh ghi CCPRxH ng vai tr l buffer cho khi PWM. Khi gi tr trong thanh ghi CCPRxH bng vi gi tr trong thanh ghi TMR2 v hai bit CCPxCON<5:4> bng vi gi tr 2 bit ca b chia tn s prescaler, pin ca khi CCP li c a v mc thp, nh vy ta c c hnh nh ca xung iu ch ti ng ra ca khi PWM. Mt s im cn ch khi s dng khi PWM: Timer2 c hai b chia tn s prescaler v postscaler.Tuy nhin b postscaler khng c s dng trong qu trnh iu ch rng xung ca khi PWM. Nu thi gian duty cycle di hn thi gian chu k xung period th xung ng ra tip tc c gi mc cao sau khi gi tr PR2 bng vi gi tr TMR2. 2.1.12. GIAO TIP NI TIP 2.1.12.1. USART 10.1 USART USART (Universal Synchronous Asynchronous Receiver Transmitter) l mt Trang 30

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GVHD: Ths PHAN THANH TON

tronghai chun giao tip ni tip.USART cn c gi l giao din giao tip ni tip ni tip SCI (Serial Communication Interface). C th s dng giao din ny cho cc giao tip vi cc thit b ngai vi, vi cc vi iu khin khc hay vi my tnh. Cc dng ca giao din USART ngai vi bao gm: Bt ng b (Asynchronous). ng b_ Master mode. ng b_ Slave mode. Hai pin dng cho giao din ny l RC6/TX/CK v RC7/RX/DT, trong RC6/TX/CK dng truyn xung clock (baud rate) v RC7/RX/DT dng truyn data. Trong trng hp ny ta phi set bit TRISC<7:6> v SPEN (RCSTA<7>) cho php giao din USART. PIC16F877A c tch hp sn b to tc baud BRG (Baud Rate Genetator) 8 bit dng cho giao din USART. BRG thc cht l mt b m c th c s dng cho c hai dng ng b v bt ng b v c iu khin bi thanh ghi PSBRG. dng bt ng b, BRG cn c iu khin bi bit BRGH (TXSTA<2>). dng ng b tc ng ca bit BRGH c b qua. Tc baud do BRG to ra c tnh theo cng thc sau:

Trong X l gi tr ca thanh ghi RSBRG ( X l s nguyn v 0<X<255). Cc thanh ghi lin quan n BRG bao gm: TXSTA (a ch 98h): chn ch ng b hay bt ng b ( bit SYNC) v chn mc tc baud (bit BRGH). RCSTA (a ch 18h): cho php hot ng cng ni tip (bit SPEN). RSBRG (a ch 99h): quyt nh tc baud. 2.1.12.2. MSSP MSSP ( Master Synchronous Serial Port) l giao din ng b ni tip dng giao tip vi cc thit b ngoi vi (EEPROM,ghi dch, chuyn i ADC,) hay cc vi iu khin khc. MSSP c th hot ngdi hai dng giao tip: SPI (Serial Pheripheral Interface). I2C (Inter-Intergrated Circuit). Cc thanh ghi iu khin giao chun giao tip ny bao gm thanh ghi trng thi SSPSTAT v hai thanh ghi iu khin SSPSON v SSPSON2. Ty theo chun giao tip c s dng (SPI hay I2C)m chc nng cc thanh ghi ny c th hin khc nhau. 2.1.13. TNG QUAN V MT S C TNH CA CPU 2.1.13.1. B DAO NG (OSCILLATOR) Trang 31

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GVHD: Ths PHAN THANH TON

PIC16F877A c kh nng s dng mt trong 4 loi oscillator, l: LP: (Low Power Crystal). XT: Thch anh bnh thng. HS: (High-Speed Crystal). RC: (Resistor/Capacitor) dao ng do mch RC to ra. . Hnh 2.15 RC oscillator i vi cc loi oscillator LP, HS, XT, oscillator c gn vo vi iu khin thong qua cc pin OSC1/CLKI v OSC2/CLKO. i vi cc ng dng khng cn cc loi oscillator tc cao, ta c th s dng mch dao ng RC lm ngun cung cp xung hot ng cho vi vi iu khin. Tn s to ra ph thuc vo cc gi tr in p, gi tr in tr v t in, bn cnh l s nh hng ca cc yu t nh nhit , cht lng ca cc linh kin. Cc linh kin s dng cho mch RC oscillator phi bo m cc gi tr sau:

3 K < REXT< 100 K CEXT>20 pF


2.1.14. CC CH RESET

Hnh 2.16 Reset PIC16F877A qua chn MCLR\ C nhiu ch reset vi iu khin, bao gm: Power-on Reset POR (Reset khi cp ngun hot ng cho vi iu khin). reset trong qu trnh hot ng. reset t ch sleep. WDT reset (reset do khi WDT to ra trong qu trnh hot ng). WDT wake up t ch sleep. Brown-out reset (BOR). Ngoi tr reset POR trng thi cc thanh ghi l khng xc nh vWDT wake up khng nh hng n trng thi cc thanh ghi, cc ch reset cn li u a gi tr cc thanh ghi v gi tr ban u c n nh sn. Cc bit v ch th trng thi hot ng, trng thi reset ca vi iu khin v c iu khin bi CPU. reset: Khi pin mc logic thp, vi iu khin s c reset. Tn hiu reset c cung cp bi mt mch ngoi vi vi cc yu cu c th sau: Trang 32

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GVHD: Ths PHAN THANH TON

Khng ni pin trc tip lnngun VDD. R1 phi nh hn 40 K m bocc c tnh in ca vi iu khin.

R2 phi ln hn 1 K hn dng i vo vi iu khin.

reset cn c

chng nhiu bi mt b lc trnh cc tn hiu nh tc ng ln pin Power-on reset (POR): y l xung reset do vi iu khin to ra khi pht hin ngun cung cp VDD. Khi hot ng ch bnh thng, vi iu khin cn c m bo cc thng s v dng in, in p hot ng bnh thng. Nhng nu cc tham s ny khng c m bo, xung reset do POR to ra s a vi iu khin v trng thi reset v ch tip tc hot ng khi no cc tham s trn c m bo. Power-up Timer (PWRT): y l b nh thi hot ng da vo mch RC bn trong vi iu khin. Khi PWRT c kch hot, vi iu khin s c a v trng thi reset. PWRT s to ra mt khong thi gian delay (khong 72 ms) VDD tng n gi tr thch hp. Oscillator Start-up Timer (OST): OST cung cp mt khong thi gian delay bng 1024 chu k xung ca oscillator sau khi PWRT ngng tc ng (vi iu khin iu kin hot ng) m bo s n nh ca xung do oscillator pht ra. Tc ng ca OST cn xy ra i vi POR reset v khi vi iu khin c nh thc t ch sleep. OST ch tc ng i vi cc lai oscillator l XT, HS v LP. Brown-out reset (BOR): Nu VDD h xung thp hn gi tr VBOR (khong 4V) trong khong thi gian ln hn TBOR (khong 100 us), BOR c kch hotvi iu khin c a v trng thi BOR reset. Nu in p cung cp cho vi iu khin h xung thp hn VBOR trong khong thi gian ngn hn TBOR, vi iu khin s khng c reset. Khi in p cung cp cho vi iu khin hot ng, PWRT c kch hot to ra mt khong thi gian delay (khong 72ms). Nu trong khong thi gian ny in p cung cp cho vi iu khin li tip tuch h xung di mc in p VBOR, BOR reset s li c kch hot khi vi iu khin in p hot ng. Mt im cn ch l khi BOR reset c cho php, PWRT cng s hot ng bt chp trng thi ca bit. Tm li vi iu khin hot ng c t khi cp ngun cn tri qua cc bc sau: POR tc ng. PWRT (nu c cho php hot ng) to ra khong thi gian delay TPWRT n nh ngun cung cp. OST (nu c cho php) to ra khong thi gian delay bng 1024 chu k xung ca oscillator n nh tn s ca oscillator. n thi im ny vi iu khin mi bt u hot ng bnh thng. Thanh ghi iu khin v ch th trng thi ngun cung cp cho vi iu khin l thanh ghi PCON.

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Hnh 2.16 S cc ch reset ca PIC16F877A 2.1.15. NGT (INTERRUPT) PIC16F877A c n 15 ngun to ra hot ng ngt c iu khin bi thanh ghiINTCON (bit GIE). Bn cnh mi ngt cn c mt bit iu khin v c ngt ring. Cc c ngt vn c set bnh thng khi tha mn iu kin ngt xy ra bt chp trng thi ca bit GIE, tuy nhin hot ng ngt vn ph thuc vo bit GIE v cc bit iu khin khc. Bit iu khin ngt RB0/INT v TMR0 nm trong thanh ghi INTCON, thanh ghi ny cn cha bit cho php cc ngt ngoi vi PEIE. Bit iu khin cc ngt nm trong thanh ghi PIE1 v PIE2. C ngt ca cc ngt nm trong thanh ghi PIR1 v PIR2. Trong mt thi im ch c mt chng trnh ngt c thc thi, chng trnh ngtc kt thc bng lnh RETFIE. Khi chng trnh ngt c thc thi, bit GIE t ng c xa, a ch lnh tip theo ca chng trnh chnh c ct vo trong b nh Stack v b m chng trnh s ch n a ch 0004h. Lnh RETFIE c dng thot khi chng trnh ngt v quay tr v chng trnh chnh, ng thi bit GIE cng s c set cho php cc ngt hot ng tr li. Cc c hiu c dng kim tra ngt no ang xy ra v phi c xa bng chng trnh trc khi cho php ngt tip tc hot ng tr li ta c th pht hin c thi im tip theo m ngt xy ra. i vi cc ngt ngoi vi nh ngt t chn INT hay ngt t s thay i trng thi cc pin ca PORTB (PORTB Interrupt on change), vic xc nh ngt no xy ra cn 3 hoc 4 chu k lnh ty thuc vo thi im xy ra ngt. Cn ch l trong qu trnh thc thi ngt, ch c gi tr ca b m chng trnh c ct vo trong Stack, trong khi mt s thanh ghi quan trng s khng c ct v c th b thay i gi tr trong qu trnh thc thi chng trnh ngt. iu ny nn c x l

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GVHD: Ths PHAN THANH TON

Hnh 2.17 S logic ca tt c cc ngt trong vi iu khin PIC16F877A.

2.1.15. WATCHDOG TIMER (WDT) Watchdog timer (WDT) l b m c lp dng ngun xung m t b to xung c tch hp sn trong vi iu khin v khng ph thuc vo bt k ngun xung clock ngoi vi no. iu c ngha l WDT vn hot ng ngay c khi xung clock c ly t pin OSC1/CLKI v pin OSC2/CLKO ca vi iu khin ngng hot ng (chng hn nh do tc ng ca lnh sleep). Bit iu khin ca WDT l bit WDTE nm trong b nh chng trnh a ch 2007h (Configuration bit). WDT s t ng reset vi iu khin (Watchdog Timer Reset) khi b m ca WDT b trn (nu WDT c cho php hot ng), ng thi bit t ng c xa. Nu vi iu khin ang ch sleep th WDT s nh thc vi iu khin (Watchdog Timer Wake-up) khi b m b trn. Nh vy WDT c tc dng reset vi iu khin thi im cn thit m khng cn n s tc ng t bn ngoi, chng hn nh trong qu trnh thc thi lnh, vi iu khin b kt mt ch no m khng thot ra c, khi vi iu khin s t ng c reset khi WDT b trn chng trnh hot ng ng tr li. Tuy nhin khi s dng WDT cng c s phin toi v vi iu khin s thng xuyn c reset sau mt thi gian nht nh, do i cn tnh ton thi gian thch hp xa WDT (dng lnh CLRWDT). V vic n nh thi gian reset c linh ng, WDT cn c h tr mt b chia tn s prescaler c iu khin bi thanh ghi OPTION_REG (prescaler ny c chia x vi Timer0). Mt im cn ch na l lnh sleep s xa b m WDT v prescaler. Ngoi Trang 35

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ralnh xa CLRWDT ch xa b m ch khng lm thay i i tng tc ng ca prescaler (WDT hay Timer0). 2.1.16. CH SLEEP y l ch hot ng ca vi iu khin khi lnh SLEEP c thc thi. Khi nu c cho php hot ng, b m ca WDT s b xa nhng WDT vn tip tc hot ng, bit (STATUS<3>) c reset v 0, bit c set, oscillator ngng tc ng v cc PORT gi nguyn trng thi nh trc khi lnh SLEEP c thc thi. Do khi ch SLEEP, dng cung cp cho vi iu khin l rt nh nn ta cn thc hin cc bc sau trc khi vi iu khin thc thi lnh SLEEP: a tt c cc pin v trng thi VDD hoc VSS Cn bo m rng khng c mch ngoi vi no c iu khin bi dng in ca vi iu khin v dng in nh khng kh nng cung cp cho cc mch ngoi vi hot ng. Tm ngng hot ng ca khi A/D v khng cho php cc xung clock t bn ngoi tc ng vo vi iu khin. n chc nng ko ln in tr PORTB. Pin phi mc logic cao. NH THC VI IU KHIN Vi iu khin c th c nh thc di tc ng ca mt trong s cc hin tng sau: Tc ng ca reset ngoi vi thng qua pin Tc ng ca WDT khi b trn. Tc ng t cc ngt ngoi vi t PORTB (PORTB Interrupt on change hoc pin INT). Cc bit v c dng th hin trng thi ca vi iu khin v pht hin ngun tc ng lm reset vi iu khin. Bit c set khi vi iu khin c cp ngun v c reset v 0 khi vi iu khin ch sleep. 2.1.17. SO SNH 89C51 V PIC16F877A Vn 1:c im nhit 89C51: Nng n 125OC vn hot ng tt, nhit kh l tng cho vic hot ng vng kh hu nng. Tuy nhin, khng thy thng s v nhit thp nht.Bi v theo datasheet ca Philips 89C51Bx th nhit hot ng l 0 70C. Nh vy, khng hot ng c cc nc n i v hn i. PIC16F877A:Nhit c hai khong, 0 70OC cho loi thng, v -40OC 85OC l ph bin. Vn 2: Tc dao ng thc P89C51:Tc ti a 33MHz thch anh, dao ng thc 33MHz/12. PIC16F877A : Tc ti a 20MHz thch anh, dao ng thc 20MHz/4. Ngoi ra PIC cn c dao ng ni 4MHz, sai s dao ng ni 1%.C th dng cho nhng ng dng ph thng, v s chn c th dng nng ln 16 chn. Km theo ch dao ng khi in p thp l 32KHz. y l mt trong nhng c tnh cng ngh Nanowatt, c di in p hot ng rng. Trang 36

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Vn 3: Tui th

GVHD: Ths PHAN THANH TON

- 89C51: ghi xa 10.000 ln d liu lu tr c 10 nm - PIC16F877A : ghi xa EEPROM c 1.000.000 ln, Flash c 100.000 ln, d liu lu tr c 100 nm. Vn 4: Interrupts - 89C51: C 6 ngun ngt, v 4 mc ngt u tin - PIC16F87xA:c 15 ngun ngt, v x l u tin ngt bng phn mm.Cc mc u tin ngt sau c th quy nh bng phn mm. Vn 5: Timer - 89C51 mnh hn vi 2 timer 16 bit v 1 timer 8 bit PIC ch c 1 timer 16 bit v 2 timer 8 bit. 2.2. IC NG H THI GIAN THC DS13B07 2.2.1. KHO ST S CHN S khi

Hnh 2.18 S khi DS13B07

S chn

X1: Ni thch anh 32.768Khz 2. X2: Ni thch anh 32.768Khz 3. VBat: u vo pin 3V 4. GND: Ni t 5. SDA: Chui data Hnh 2.18 S chn DS13B07 6. SCL: Dy xung clock 7. SQW/OUT: Xung vung/y ra driver 8. VCC: Ni ngun
1.

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GVHD: Ths PHAN THANH TON

DS1307 l mt IC thi gian thc vi ngun cung cp nh, dng cp nht thi gian v ngy thng vi 56 bytes SRAM. a ch v d liu c truyn ni tip qua 2 ng bus 2 chiu. N cung cp thng tin v gi, pht, giy, th, ngy ,thng, nm. Ngy cui thng s t ng c iu chnh vi cc thng nh hn 31 ngy, bao gm c vic t ng nhy nm. ng h c th hot ng dng 24h hoc 12h vi ch th AM/PM. DS13B07 c mt mch cm bin in p dng d cc in p li v t ng ng ngt vi ngun pin cung cp. DS 1307 hot ng vi vai tr slave trn ng bus ni tip. Vic truy cp c thi hnh vi ch th START v mt m thit b nht nh c cung cp bi a ch cc thanh ghi. Tip theo cc thanh ghi s c truy cp lin tc n khi ch th STOP c thc thi. Chc nng cc chn Vcc, GND: ngun mt chiu c cung cp ti cc chn ny. Vcc l u vo 5V. Khi 5V c cung cp th thit b c th truy cp hon chnh v d liu c th c v vit. Khi pin 3V c ni ti thit b ny v Vcc nh hn 1,25Vbat th qu trnh c v vit khng c thc thi, tuy nhin chc nng timekeeping khng b nh hng bi in p vo thp. Khi Vcc nh hn Vbat th RAM v timekeeper s c ngt ti ngun cung cp trong (thng l ngun 1 chiu 3V). Vbat: u vo pin cho bt k mt chun pin 3V . in p pin phi c gi trong khong t 2,5 n 3V m bo cho s hot ng ca thit b. SCL(serial clock input): SCL c s dng ng b s chuyn d liu trn ng dy ni tip. SDA(serial data input/out): l chn vo ra cho 2 ng dy ni tip. Chn SDA thit k theo kiu cc mng h , i hi phi c mt in tr ko trong khi hot ng. SQW/OUT(square wave/output driver)- khi c kch hot th bit SQWE c thit lp1, chn SQW/OUT pht i 1 trong 4 tn s (1Hz, 4kHz, 8kHz, 32kHz). Chn ny cng c thit k theo kiu cc mng h v vy n cng cn c mt in tr ko trong. Chn ny s hot ng khi c Vcc v Vbat c cp. X1,X2: c ni vi mt thch anh tn s 32,768kHz.L mt mch to dao ng ngoi, hot ng n nh th phi ni thm 2 t 33pF. 2.2.2. S RAM V RTC Thng tin v thi gian v ngy thng c ly ra bng cch c cc byte thanh ghi thch hp. Thi gian v ngy thng c thit lp cng thng qua cc byte thanh ghi ny bng cch vit vo nhng gi tr thch hp. Ni dung ca cc thanh ghi di dng m BCD (binary coded decreaseimal). Bit 7 ca thanh ghi seconds l bit clock halt (CH), khi bit ny c thit lp [1] th dao ng disable, khi n c xo v [0] th dao ng c enable. Ch l phi enable dao ng trong sut qu trnh cu hnh thit lp (CH=0). Thanh ghi thi gian thc c m t nh sau: Trang 38

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GVHD: Ths PHAN THANH TON

Hnh 2.19 Thanh ghi thi gian thc

DS1307 c th chy ch 24h cng nh 12h. Bit th 6 ca thanh ghi hours l bit chn ch 24h hoc 12h. khi bit ny mc cao th ch 12h c chn. ch 12h th bit 5 l bit AM/PM vi mc cao l l PM. ch 24h th bit 5 l bit ch 20h(t 20h n 23h). Trong qu trnh truy cp d liu, khi ch th START c thc thi th dng thi gian c truyn ti mt thanh ghi th 2,thng tin thi gian s c c t thanh ghi th cp ny,trong khi ng h vn tip tc chy. Trong DS1307 c mt thanh ghi iu khin iu khin hot ng ca chn SQW/OUT Bit7 OUT Bit6 X Bit5 X Bit4 SQWE Bit3 X Bit2 X Bit1 RS1 Bit0 RS0

Bng 2.12 Thanh ghi iu khin SQW/OUT

OUT output control): bit ny iu khin mc ra ca chn SQW/OUT khi u ra xung vung l disable. Nu SQWE= 0 th mc logic chn SQW/OUT s l [1]nu OUT= 1, v = 0 nu OUT= [0] SQWE (square wave enable): bit ny c thit lp [1] s enable u ra ca b to dao ng. Tn s ca u ra sng vung ph thuc vo gi tr ca RS1 v RS0

RS1 0 0 1 1

RS0 0 1 0 1

Tn s u ra SQW 1Hz 4,096kHz 8,192kHz 32,768kHz Trang 39

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GVHD: Ths PHAN THANH TON

Bng 2.13 Gi tr tn s xung SQW DS13B07 h tr bus 2 dy 2 chiu v giao thc truyn d liu. Thit b gi d liu ln bus c gi l b pht v thit b nhn gi l b thu, thit b iu khin qu trnh ny gi l master. Thit b nhn s iu khin ca master gi l slave. Cc bus nhn s iu khin ca master, l thit b pht ra chui xung clock (SCL), master s iu khin s truy cp bus, to ra cc ch th START v STOP. S truyn nhn d liu trn chui bus 2 dy

Hnh 2.19 Truyn nhn d liu trn chui bus 2 dy Tu thuc vo bit R/W m 2 loi truyn d liu s c thc thi: Truyn d liu t master truyn v slave nhn: Master s truyn byte u tin l a ch ca slave. Tip sau l cc byte d liu. slave s gi li bit thng bo nhn c (bit acknowledge) sau mi byte d liu nhn c. d liu s truyn t bit c gi tr nht (MSB). Truyn d liu t slave v master nhn: byte u tin (a ch ca slave) c truyn ti slave bi master. Sau slave s gi li master bit acknowledge. tip theo slave s gi cc byte d liu ti master. Master s gi cho slave cc bit acknowledge sau mi byte nhn c tr byte cui cng,sau khi nhn c byte cui cng th bit acknowledge s khng c gi . Master pht ra tt c cc chui xung clock v cc ch th START v STOP. S truyn s kt thc vi ch th STOP hoc ch th quay vng START. Khi ch th START quay vng th s truyn chui d liu tip theo c thc thi v cc bus vn cha c gii phng. D liu truyn lun bt u bng bit MSB. DS13B07 c th hot ng 2 ch sau: Ch slave nhn (ch DS1307 ghi): chui d liu v chui xung clock s c nhn thng qua SDA v SCL. Sau mi byte c nhn th mt bit acknowledge s c truyn. Cc iu kin START v STOP s c nhn dng khi bt u v kt thc mt truyn mt chui. Nhn dng a ch c thc hin bi phn cng sau khi chp nhn a ch ca slave v bit chiu. Byte a ch Trang 40

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GVHD: Ths PHAN THANH TON

l byte u tin nhn c sau khi iu kin START c pht ra t master. Byte a ch c cha 7 bit a ch ca DS1307 l 1101000, tip theo l bit chiu (R/w) cho php ghi khi n bng [0]. Sau khi nhn v gii m byte a ch th thit b s pht i mt tn hiu acknowledge ln ng SDA. Sau khi DS1307 nhn dng c a ch v bit ghi th master s gi mt a ch thanh ghi ti DS1307 , to ra mt con tr thanh ghi trn DS1307 v master s truyn tng byte d liu cho DS1307 sau mi bit acknowledge nhn c. Sau master s truyn iu kin STOP khi vic ghi hon thnh.

Hnh 2.20 Ghi d liu ch Slave nhn

Ch slave pht (ch DS1307 c): byte u tin slave nhn c tng t nh ch slave ghi. Tuy nhin trong ch ny th bit chiu li ch chiu truyn ngc li. Chui d liu c pht i trn SDA bi DS 1307 trong khi chui xung clock vo chn SCL. Cc iu kin START v STOP c nhn dng khi bt u hoc kt thc truyn mt chui. byte a ch nhn c u tin khi master pht i iu kin START. Byte a ch cha 7 bit a ch ca slave v 1 bit chiu cho php c l 1. Sau khi nhn v gii m byte a ch th thit b s nhn 1 bit acknowledge trn ng SDA. Sau DS1307 bt u gi d liu ti a ch con tr thanh ghi thng qua con tr thanh ghi. Nu con tr thanh ghi khng c vit vo trc khi ch c c thit lp th a ch u tin c c s l a ch cui cng cha trong con tr thanh ghi. DS13B07 s nhn c mt tn hiu Not Acknowledge khi kt thc qu trnh c.

Hnh 2.21 c d liu ch Slave pht

Thi gian thc hin vic c, ghi d liu ca DS1307: S ng b:

Hnh 2.22Trang gian c ghi d liu ca DS13B07 Thi 41

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GVHD: Ths PHAN THANH TON

c tnh v thi gian thc hin:

Bng 2.14 c tnh v thi gian thc hin ca DS13B07 2.3. IC M DNG ULN2803 Gii thiu: ULN 2803 l mt vi mch m, bn cht cu to l cc mng darlington chu c dng in ln v in p cao trong c cha 7 cp darlington cc gp h vi cc pht chung. Mi knh trong s 7 knh u c th chu c dng in ln trong mt khong thi gian di ln ti 500 mA vi bin nh ln ti 600 mA. Mi knh c mt diode chn- diode ny c th s dng trong trng hp ti c tnh cm ng, v d nh cc rle Trang 42

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GVHD: Ths PHAN THANH TON

ng dng ca ULN2803 c s dng trong cc mch m iu khin ng c mt chiu ,ng c bc, khi hin th ma trn led

Hnh 2.23 Hnh dng thc t

ca ULN 2803
Hnh 2.24 S chn

ULN2803
Chc nng cc chn:

- Chn 9: ni GND - Chn 10: ni Vcc - Chn 1 8: gm 8 ng vo I1 I8 - Chn 11 18: gm 8 ng ra O1 O7

Hnh 2.25 Cu trc bn trong ca ULN 2803

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GVHD: Ths PHAN THANH TON

Bng 2.15 Tthng s c bn ca ULN 2803 Theo s ta thy vi mi b m c mt diode kt ni theo kiu anod c kt ni vi ng ra cn catod c ni chung vi catot ca cc diode cn li. Ng ra ca vi mch l cc cc gp h, ti c ni gia ngun nui v ng ra ca vi mch m. Ngun nui l ngun in p dng bt k nh hn 50V, chng hn ti l ng c bc th ngun nui l 12V, ti l h thng hin th ma trn led th ngun nui l 5Vdng qua ti phi c tnh ton sao cho dng chy lu di nh hn 500 mA v dng nh nh hn 600 mA tnh trn mi mch. Bn trong ULN 2803 c mc thm cc Diode trnh dng ngc khi iu khin cc thit b c cun dy (v d: rle ) Nguyn l hot ng: - Nu cc chn u vo I1 I8 l mc 0 th ng ra th ni. - Nu cc chn u vo I1 I8 l mc 1 th ng ra mc 0 L do la chn: - c bn rng ri trn th trng vi gi tng i r. - ULN 2803 m c 8 ng ring bit (ni trc tip c vi 8 chn ca vi iu khin 5V). - Dng ra ti 500 mA/ 50V kch cc R le. 2.4. CM BIN NHIT DS18B20 2.4.1. GII THIU DS1820 l nhit k s c phn gii 9-12bit giao tip vi vi iu khin trung tm thng qua 1 dy duy nht (1 wire communication). DS18B20 hot ng vi in p t 3V-5.5V c th c cp ngun qua chn DQ- chn trao i d liu. DS1820 c th o nhit trong tm -55-125oC vi chnh xc +-0.5OC. Mi DS1820 c mt Serial code 64bits duy nht, iu ny cho php kt ni nhiu IC trn cng ng bus. Chun 1 wire c nhng c im sau: Ch c mt master trong h thng. Gi thnh thp. Tc t dc ti a 16kbps. Khong cch truyn xa nht l 300m. Lng thng tin trao i nh. 2.4.2. S CHN S khi

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GVHD: Ths PHAN THANH TON

Hnh 2.26 S khi DS18B20

Chn 1: ni mass Chn 2: chn DQ chn trao i d liu ng thi cng l chn cp ngun cho ton b hot ng ca IC (nu chn VDD khng s dng). Khi kt ni vi vi iu khin th cn c in tr ko ln (khong 4.7k) Chn 3: chn VDD , cp ngun cho IC

2.4.3. THANH GHI D LIU Mi IC DS1820 c mt m 64bit ring bit bao gm: 8 bit Family code, 48 bit serial code v 8 bit CRC code c lu trong Rom. Cc gi tr ny gip phn bit gia cc IC vi nhau trn cng mt bus. Gi tr Family code ca DS1820 l 28H v gi tr CRC l kt qu ca qu trnh kim tra 56 bits trc . T chc b nh Scratchpad: B nh DS1820 bao gm 9 thanh ghi 8bits

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Bng 2.27 T chc b nh DS18B20 Byte 0 v 1 lu gi tr nhit chuyn i. Byte 2 v 3 lu gi tr ngng nhit . Gi tr ny c lu khi mt in. Byte 4 l thanh ghi cu hnh cho hot ng ca DS1820. Byte 5,6 v 7 khng s dng. Byte 8 l thanh ghi ch c lu gi tr CRC t byte 0 n byte 7. D liu trong byte 2,3,4 c ghi thng qua lnh Write Scratchpad [4Eh] v d liu c truyn n DS18B20 vi bit LSB ca byte 2, sau khi ghi d liu c th c c li thng qua lnh Read Scratchpad [BEh], v khi c Scratchpad th bit LSB ca byte 0 s c gi i trc tt c cc byte u c c, nhng ch ghi c byte 2,3 v 4. chuyn gi tr TH v TL t b nh vo EEPROM th cn gi lnh Copy Scratchpad [48h] n DS1820. V d liu t EPROM cng c th c chuyn vo thanh ghi TH,TL thng qua lnh Recall E2 [B8h]. 2.4.4. TRAO I D LIU VI VI IU KHIN Trao i d liu gia vi iu khin v DS1820 thng qua ba bc sau: Khi to Qu trnh khi to bao gm 1 xung reset do vi iu khin master gi n slave DS1820, sau l xung presence t DS1820 gi n vi iu khin, ch ra s hin din ca vi iu khin v DS1820 v qu trnh hot ng trao i d liu c th bt u. Lnh iu khin ROM Cc lnh ny lm vic vi 64bits serial code ROM, lnh ny c pht ra sau qu trnh khi to. Lnh cho php vi iu khin bit c bao nhiu thit b v thit b loi g trn bus. C 5 lnh iu khin ROM: SEARCH ROM [F0h]: Khi h thng bt u hot ng, th vi iu khin s dng lnh ny kim tra code ROM ca tt c cc thit b c trn bus cho php vi iu khin bit c s thit b v loi ca thit b trn bus. Nu trn bus ch c 1 thit b th c th s dng lnh Read_ROM thay cho lnh Trang 46

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Search_ROM. Sau mi qu trnh Search_ROM th cn phi quay li qu trnh khi to reset h thng. READ ROM [33h]: Lnh ny c s dng khi ch c 1 thit b trn bus. Lnh ny cho php vi iu khin c 64bit ROM code ca thit b. Nu trn bus c nhiu thit b th lnh ny s gy ra s xung t bus d liu gia cc thit b. MATCH ROM [55h]: Lnh ny theo sau bi 64 bit ROM code cho php vi iu khin nh a ch thit b cn giao tip. Ch thit b c ROM code ph hp s tr li, cc thit b cn li s i xung reset tip theo. SKIP ROM [CCh]: Lnh ny cho php vi iu khin gi ng thi n tt c cc thit b trn bus m khng cn bt c thng tin no v ROM Code. V d, mun gi lnh Convert_T n tt c cc thit b trn bus, th u tin ta gi lnh Skip_ROM sau tip theo l gi lnh Convert_T. Tng t nh vy, nu theo sau lnh Skip_ROM l lnh Read_Scratchpad th d liu trn DS1820 c c v, v lu rng lnh ny ch thc hin c khi trn bus c 1 thit b, nu trn bus c nhiu thit b th s gy ra xung t bus. ALARM SEARCH [ECh]: Lnh ny gn ging vi lnh Search_ROM, nhng lnh ny ch tc ng n thit b m c alarm c bt ln s tr li. Lnh ny cho php xc nh cc thit b m nhit o c vt qua ngng nhit , v sau khi lnh ny c thc thi th vi iu khin phi lp li qu trnh khi to quay li bc 1. Lnh iu khin DS1820 Sau khi vi iu khin nh a ch thit b cn giao tip thng qua cc lnh ROM, vi iu khin s gi cc lnh iu khin hot ng ca DS1820. Nhng lnh ny cho php vi iu khin ghi v c d liu t b nh Scratchpad ca DS1820, bt u qu trnh chuyn i nhit , v xc nh ch cp ngun. 2.4.5. CP NGUN CHO DS18B20 Cc DS18B20 c th c h tr bi mt ngun cung cp bn ngoi trn chn Vdd, hoc n c th hot ng ch ngun k sinh cho php DS18B20 khng cn ngun cung cp bn ngoi. Ngun k sinh l rt hu ch cho cc ng dng o nhit cm ng t xa hoc c khng gian o rt cht hp. Hnh 1 cho thy mch kim sot ngun k sinh ca DS18B20 khi n ly ngun qua chn DQ t cc bus 1-Wire mc cao. Vic ly in cho DS18B20 c thc hin trong khi cc bus mc cao, v ng thi in s c lu gi trn cc t in k sinh (CPP) cung cp in khi bus mc thp. Khi DS18B20 s dng trong ch ngun k sinh th cc chn Vdd phi c ni mass.

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Hnh 2.27. Cung cp ngun k sinh cho DS18B20 Cc DS18B20 c th c h tr bi mt ngun bn. u im ca phng php ny l khng cn cc MOSFET pullup, v bus 1-Wire c th thc hin hot ng khc trong thi gian chuyn i nhit .

Hnh 2.28 Cp ngun bn ngoi cho DS18B20 Khng nn s dng ngun k sinh cho khi nhit trn 100C v DS18B20c th khng th duy tr thng tin lin lc do dng r r cao. i vi cc ng dng o nhit cao th DS18B20 nn s dng ngun cung cp bn ngoi. Trong mt s trng hp bus ch phi xc nh xem liu cc DS18B20s s dng ngun k sinh hay ngun bn ngoi vi iu khin ra lnh cc pullup bus mnh c c s dng trong qu trnh chuyn i nhit hay khng. c c thng tin ny, vi iu khin c th ra lnh Skip ROM [CCH] tip theo l Read Power Supply [lnh B4h] theo sau l "read time slot". Trong "read time slot", ngun k sinh ca DS18B20s s c h tr ko bus thp, v ngun DS18B20s bn ngoi cung cp cho php bus cao. Nu bus c ko thp, vi iu khin bit rng n phi cung cp cc pullup mnh trn bus 1-Wire trong thi gian chuyn i nhit . 2.4.6. CCH C NHIT DS18B07 Bn trong DS1820 s c b chuyn i gi tr nhit sang gi tr s v c lu trong cc thanh thi b nh scratchpad. phn gii nhit o c th c cu hnh ch 9 bits, 10bits, 11bits, 12bits. ch mc nh th DS1820 hot ng phn gii 12bits. bt u qu trnh c nhit , v chuyn i t gi tr tng t sang gi tr s th vi iu khin gi lnh Convert T [44h], sau khi chuyn i xong th gi tr nhit s c lu trong 2 thanh ghi nhit b nh scratchpad v IC tr v trng thi ngh. Nhit c lu bn trong DS1820 c tnh nhit Celcius nu tnh nhit Fahrenheit cn phi xy dng thm bng chuyn i nhit . Gi tr nhit lu trong b nh gm 2bytes-16bits: s m s c lu di dng b 2. Bit cao nht l bit du (S) nu S= [0] th gi tr nhit dng v S= [1] th gi tr nhit m. Nu cu hnh phn gii l 12bits th tt c cc bit u c s dng. Nu phn gii 11bits th bit 0 khng c s dng. Tng t nu cu hnh l 10bits th bit 1, bit 0 khng c s dng

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Bng 2.16 M nh phn v lc phn tng ng nhit Nhit sau khi c lu vo trong 2 thanh ghi b nh s c so snh vi 2 thanh ghi ngng nhit TH v TL. Cc gi tr ngng nhit do ngi dng quy nh, v n s khng thay i khi mt in. Nh vy ch c phn nguyn, cc bit 11-4 ca gi tr nhit c so snh vi thanh ghi ngng. Nu gi tr nhit c v nh hn mc TL hoc ln hn mc TH th c bo qu nhit s c bt ln, v n s thay i mi qu trnh c nhit . Vi iu khin c th kim tra trng thi qu nhit bng lnh Alarm Search [ECh]. 2.5. TNG QUAN V TEXT LCD 2.5.1. GII THIU Text LCD (Text Liquid Crystal Display) l lai mn hnh tinh th lng dng hin th cc dng ch hoc s trong bng m ASCII. Khng ging cc loi LCD ln, Text LCD c chia sn thnh tng , vi mi ch c th hin th mt k t. Cng v l do ch hin th c k t ASCII nn loi LCD ny c gi l Text LCD ( phn bit vi Graphic LCD c th hin th hnh nh). Mi ca Text LCD bao gm cc chm tinh th lng, vic kt hp n v hin cc chm ny s to thnh mt k t cn hin th. Trong cc Text LCD, cc mu k t c nh ngha sn v th vic iu khin Text LCD s tr nn d dng hn Graphic LCD.

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Kch tht ca Text LCD c xc nh bng s k t c th hin th trn mt dng v tng s dng m Text LCD c. V d LCD 16x2 l loi c 2 dng, mi dng c th hin th ti a 16 k t. Mt s kch tht ca Text LCD thong dng gm: 16x1, 16x2, 20x2, 20x4

Hnh 2.28 Hnh nh thc t ca text LCD

Hnh 2.29. S khi text LCD 16x2

2.5.2. CHC NNG CC CHN

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Hnh 2.30 S chn text LCD 16x2 D0-D7:8 ng d liu RS:chn thanh ghi iu khin hay thanh ghi d liu RS = 0: Chn thanh ghi iu khin RS = 1: Chn thanh ghi d liu R/W\: Chn ch c hay ghi R/W\ = 0: Chn ch c R/W\ = 1: Chn ch ghi E: Cho php c hoc ghi E = 1 :cho php E = 0:Khng cho php Vdd(Vcc): ngun cung cp = 5VDC VSS = ni mass VEE: Ni vi bin tr s cho php iu chnh tng phn (Contrast) ca LCD.

2.5.3. MT S LNH C BN CHO LCD M hex 01 Chc nng Lnh xo mn hnh Clear Display: khi thc hin lnh ny th LCD s b xo v b m a ch c xo v 0. Trang 51

n tt nghip 02 04 06 05 07 08 0A 0C 0E 0F 84 C0 Lnh di chuyn con tr v u mn Gim con tr (Dch con tr sang tri) Tng con tr (Dch con tr sang phi) Dch hin th sang phi Dch hin th sang tri Tt con tr, tt hin th Tt hin th, bt con tr Bt hin th, tt con tr Bt hin th, nhp nhy con tr Tt con tr, nhp nhy con tr a con tr v u dng 1 LCD a con tr v u dng 2 ca LCD

GVHD: Ths PHAN THANH TON

Bng 2.17Mt s lnh c bn cho text LCD 2.6. THU PHT SNG HNG NGOI 2.6.1. KHI NIM V TIA HNG NGOI nh sng hng ngoi (tia hng ngoi) l nh sng khng th nhn thy c bng mt thng , c bc sng khong t 0.86m n 0.98m . Tia hng ngoi c vn tc truyn bng vn tc nh sng . Tia hng ngoi c th truyn i c nhiu knh tn hiu. N c ng dng rng ri trong cng nghip. Lng thng tin c th t 3 mega bit /s. Lng thng tin c truyn i vi nh sng hng ngoi ln gp nhiu ln so vi sng in t m ngi ta vn dng . Tia hng ngoi d b hp th , kh nng xuyn thu km . Trong iu khin t xa bng tia hng ngoi , chm tia hng ngoi pht i hp , c hng , do khi thu phi ng hng . Sng hng ngoi c nhng c tnh quan trng ging nh nh sng (s hi t qua thu knh , tiu c ). nh sng thng v nh sng hng ngoi khc nhau rt r trong s xuyn sut qua vt cht. C nhng vt cht ta thy n di mt mu xm c nhng vi nh sng hng ngoi n tr nn xuyn sut . V vt liu bn dn trong sut i vi nh sng hng ngoi , tia hng ngoi khng b yu i khi n vt qua cc lp bn dn i ra ngoi.

2.6.2. LINH KIN THU PHT SNG HNG NGOI LED pht Led hng ngoi cn gi l ngun pht hng ngoi. Vt liu ch to ra led hng ngoi l GaAs (gallium arserid) vi vng cm c rng khong 1,43 ev, c ch ti hp trc tip gia vng dn v vng ha tr GaAs cho ta bc sng ca tia hng ngoi: = hc/ w =900nm Trang 52

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vi: h = 4,14.10-15 (ev/s): hng s Flanck c = 3.108 m/s : vn tc nh sng w = 1,38 ev Nguyn l lm vic ca LED pht hng ngoi : khi chuyn tip P-N phn cc thun , s c hin tng phun ht dn mc cao (l trng t P++ phun sang N++, in t t N++ phun sang P++) v km theo l hin tng ti hp bc x lm pht ra nh sng. Hin tng ti hp bc x l hin tng gii phng ra cc ht photon khi c s ti hp trc tip gia in t v l trng . LED thu thu nhn tn hiu hng ngoi ta c nhiu loi cm bin khc nhau. Tt c cc b phn cm bin ny u da trn nguyn tc hiu ng quang in. Vi hiu ng quang in ny th lp chuyn tip P-N s pht sinh mt gi tr in p khi n nhn c nh sng. Nguyn l lm vic ca LED thu hng ngoi: diode quang c phn cc nghch nh ngun in p V v do c mt dng in ngc ban u I0 rt nh. Khi c nh sng chiu vo, c thm dng in bi cc ht dn sinh ra nh nng lng ca photon v chy cng chiu vi dng in ngc. V vy dng in tng chy qua ti c tr s tng ln theo cng chiu sng vo. 2.7. QUANG TR Thng thng, in tr ca quang tr khong 1000 000 ohms. Khi chiu nh sng vo, in tr ny gim xung rt thp. Quang in tr c cu to gm: mt si dy (hoc mt mng) bng cht quang dn (1) gn trn mt cch in (2)

Hnh 2.30 Quang tr Mt quang in tr bng CdS c in tr vo khong 3.10-6W khi khng c chiu sng, v c in tr vo khong 20W khi c chiu sng. Nguyn l lm vic ca quang tr l khi c bc x chiu vo, cht bn dn hp thu nng lng lm pht sinh cc in t t do v l trng, tc s dn in tng ln v gim in tr ca cht bn dn. Cc c tnh in v nhy ca quang tr ty thuc vo vt liu dng trong ch to. Cc quang in tr thng c lp vi cc tranzito trong cc thit b iu khin t ng bng nh sng, trong cc my o nh sng v trong nhiu thit b khc. 2.8. NG C BC Gii thiu

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ng c bc c th c m t nh l mt ng c in khng dng b chuyn mch. C th, cc mu trong ng c l stator, v rotor l nam chm vnh cu hoc trong trng hp ca ng c bin t tr, n l nhng khi rng lm bng vt liu nh c t tnh. Tt c cc mch o phi c iu khin bn ngoi bi b iu khin, v c bit, cc ng c v b iu khin c thit k ng c c th gi nguyn bt k v tr c nh no cng nh l quay n bt k v tr no. Hu ht cc ng c bc c th chuyn ng tn s m thanh, cho php chng quay kh nhanh, v vi mt b iu khin thch hp, chng c th khi ng v dng li d dng cc v tr bt k. Phn loi ng c bc ng c bc c chia lm hai loi, nam chm vnh cu v bin t tr (cng c loi ng c hn hp, nhng n khng khc bit g vi ng c nam chm vnh cu). y nhm mnh trnh by chng trnh iu khin ng c nam chm vnh cu n cc c 6 u dy ra. Nh hnh 2.31:

Hnh 2.31 ng c bc n cc Khi dng, cc u ni trung tm thng c ni vo cc dng ngun cp, v hai u cn li ca mi mu ln lt ni t o chiu t trng to bi cun . Mu 1 nm cc trn v di ca stator, cn mu 2 nm hai cc bn phi v bn tri ng c. Rotor l mt nam chm vnh cu vi 6 cc, 3 Nam v 3 Bc, xp xen k trn vng trn.. y ng c quay vi 1 gc l 30 vi 12 bc 1 vng. x l gc bc mc cao hn, rotor phi c nhiu cc i xng hn. ng c 30 mi bc trong hnh l mt trong nhng thit k ng c nam chm vnh cu thng dng nht, mc d ng c c bc 15 v 7.5 l kh ln. Ngi ta cng to ra c ng c nam chm vnh cu vi mi bc l 1.8 v vi ng c hn hp mi bc nh nht c th t c l 3.6 n 1.8 , cn tt hn na, c th t n 0.72 . Xc nh cp dy ca ng c n cc 5 dy phn bit hai cp dy ca ng c n cc 5 dy, trc tin chng ta dng Ohm k xc nh dy ni trung tm. a in p xoay chiu vo dy trung tm v mt trong 4 dy cn li. Dng Volt k xoay chiu o in p gia dy ni trung tm v 3 dy cn li. Chng ta s thy rng in p gia dy trung tm vi 2 trong 3 dy cn li gn nh bng khng, v vi dy th ba th gn nh bng in p xoay chiu p vo ng c. Nh vy, hai dy cho in p gn bng 0 l mt cp, hai dy cn li s l cp th hai. Trang 54

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CHNG 3: THIT K PHN CNG


3.1. TNG THIT K Vi s pht trin vt bc ca k thut in t hin nay, cc khuyt im t ch chm sc h c bnh thng c gii quyt bng nhng linh kin in t c tch hp cao. Nhm chn thc hin ti ny gii quyt c nhng nhc im ca h c, p ng nhu cu cho ngi nui c cnh cng nh trong nui trng thy sn Cn thit k cc mch in c nhim v pht hin nc d v t ng thay nc, hn gi cho c n, cung cp oxi. 3.2. S KHI V NGUYN L HOT NG 3.2.1. S KHI

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S KHI A3

Khi x l trung tm: khi ny l vi iu khin PIC16F877A, x l cc thng tin t cc khi cm bin a v, cc s liu thi gian thc, thi gian do ngi s dng ci t cng nh x l d liu a n khi hin th, khi relay, khi ng c... Cm bin nhit : s dng IC o nhit DS18B20, c a vo vi x l cm bin nhit nc v hin th nhit ra text LCD. Cm bin mi trng nc : s dng cp LED hng ngoi pht hin nc d. Khi nc d LED hng ngoi s dn, thng tin s c truyn n vi x l iu khin thay nc v bo ng. ng h thi gian thc: xc lp ngy gi chnh xc v thi gian c lu li khi b mt in. Khi cm bin quang: s dng quang tr do sang ti nhm cung cp nh sng cho h c. Khi hin th: l thit b I/O to mi quan h mt chiu t khi iu khin n ngi s dng, khi hin th s hin th trng thi ang hot ng ca mch nh hin th nhit nc , ngy thng nm, bo qu trnh thay nc, qu trnh cho c n Khi hin th gip ngi s dng d dng thao tc trn mch. Khi relay: c iu khin bi vi iu khin c nhim v m van x-ht nc, cung cp oxi Khi ng c bc: c iu khin bi vi iu khin thng qua IC m dng ULN2803 cp ngun cho ng c bc trong qu trnh cho c n. 3.2.2. NGUYN L HOT NG CA CC KHI

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GVHD: Ths PHAN THANH TON

Hnh 3.2 Khi cm bin nc d

Bnh thng khi nc trong h sch, lc ny in tr LED thu gim xung rt nh, ILED = IR35 0 v vy V- = VR35 0 hay V- = VCC ~ 5V, V- > V+ do V0 (chn 1 ca IC LM358) mc thp khng kch dn BJT. Khi nc d th LED thu khng nhn c nh sang t LED pht do vy in tr LED thu rt ln, ILED = IR35 = 0, V- = VR35 = 0, V- > V+ do V0 mc cao, kch dn BJT. Lc ny vi iu khin s in khin khi thay nc hot ng. 3.2.2.2. KHI CM BIN NHIT

Hnh 3.3 Khi cm bin nhit Khi c cp ngun vi iu khin bt u hot ng, vi iu khin gi mt xung reset n cm bin DS18B20. Sau DS18B20 gi mt xung presence n vi iu khin, ch ra s hin din ca vi iu khin v DS18B20.

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Tip theo vi iu khin nh a ch DS18B20 thng qua cc lnh ROM, vi iu khin gi lnh hot ng ca DS18B20. Nhng lnh ny cho php vi iu khin ghi v c d liu t b nh Scratchpad ca DS18B20, bt u qu trnh chuyn i nhit v xc nh ch cp ngun. Sau khi DS18B20 gi d liu n vi iu khin , vi iu khin x l d liu xut ra LCD. 3.2.2.3. KHI CM BIN QUANG

Hnh 3.4 Khi cm bin quang Quang tr l mt in tr c in tr t l nghch vi nh sng, tc khi c nh sng chiu vo lm in tr trn quang tr gim, ILDR = 0, V- > V+ do V0 (chn 1 ca IC LM358) mc thp khng kch dn BJT. Ngc li, khi tri ti hay nh sng chiu vo gim th ILDR 0, V- > V+ do V0 (chn 1 ca IC LM 358) mc cao, kch dn BJT. Lc ny vi iu khin s in khin cp nh sng cho h c. 3.2.2.4. KHI THI GIAN THC

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Hnh 3.5 Khi thi gian thc 3.2.2.5. KHI HIN TH Khi hin th s hin th trng thi ang hot ng ca mch nh hin th nhit nc , ngy thng nm, bo qu trnh thay nc, qu trnh cho c n

Hnh 3.6 Khi hin th 3.2.2.6. KHI NG LC To tn hiu iu khin si bt kh, thay-x nc, bt tt n chiu sng, iu khin ng c bc cho c n

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Hnh 3.7 Khi RELAY

Hnh 3.8 Khi iu khin ng c bc 3.3. THI CNG MCH Di y l s nguyn l, s mch in, s b tr linh kin ca mch sau khi thi cng.

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S NGUYN L A3

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Hnh 3.10 S mch in

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Hnh 3.11 S phn b linh kin

CHNG 4: THIT K PHN MM


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4.1. LU GII THUT 4.2. CHNG TRNH NP CHO VI IU KHIN PIC16F877A

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CHNG 5: TM TT KT LUN NGH 5.1. TM TT TI Vi thi gian c giao, nhm thc hin hon thnh vic nghin cu ti H C THNG MINH vi nhng phn sau: Thit k mch vi ba modul: modul trung tm, modul ng lc v modul hin th Thc hin m hnh h c t ng vi vi iu khin PIC16F877A Cc phn trn hot ng n nh. 5.2. KT LUN Qua thi gian thc hin ti, vi s hng dn tn tnh ca Thy PHAN THANH TON ti H C THNG MINH hon thnh ng vi thi gian quy nh. y l ti mang tnh tng hp i hi sinh vin phi c s kt hp gia kin thc trong lnh vc in t v k thut lp trnh. Vi s quyt tm v n lc khng ngng, n ny gip cho chng em bc u lm quen vi ti nghin cu v nhm thc s tch ly kh nhiu v phn vi iu khin, thit k mch v k thut lp trnh. Mc d thi gian c hn, hn na c nhiu vn ny sinh trong khi thit k phn cng ln phn mm mt rt nhiu thi gian v cng sc nhng nhm vn c gng hon thnh c m hnh. Tri qua qu trnh thc hin n, chng em nh gi c phn no cn hn ch v t nhi b sung kin thc cn hn hp trong thi gian hc ti trng nht l mn k thut vi iu khin. Tuy nhin, y l ln u tin lm quen vi vic lp trnh cho vi iu khin ng dng trn m hnh thc t v kin thc c hn nn n ny chc chn vn cn nhng sai st. Chng em rt mong s ng gp kin ca qu Thy C cng vi cc bn sinh vin n c hon ho hn. 5.3. NGH

Nhm thc hin hy vng cc nhm sau c nghin cu ti ny c ci tin c cc tnh nng: C th bm vo v x nc ra theo gii hn cho php bng vic gn cc cm bin mc nc. C th iu khin h c thng qua my tnh v mng internet khi chng ta phi i cng tc xa nh. Mch c th hot ng khi mt in bng vic s dng ngun d phng. 5.4.TI LIU THAM KHO

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