2011

TRNG I HC IN LC

BO CO VXL
NHM 9
GV: PHAN TH THANH NGC Thnh vin nhm: 1. 2. 3. 4. 5. 6. PHM XUN THNG (nhm trng) TRNH TH NGC H TH TR V T UYN LNG TH NGUYT PHAN NGC TRM

9/5/2011

TNG QUAN V VI IU KHIN

I Gii thiu khi qut v vi iu khin B vi x l c kh nng vt bc so vi cc h thng khc v tnh nng tnh ton, x l, v thay i chng trnh linh hot theo mc ch ngi dng, c bit hiu qu vi cc bi ton h thng ln. Tuy nhin i vi cc ng dng nh, tm tnh ton khng i hi kh nng tnh ton ln th vic ng dng vi x l cn cn nhc. Bi v h thng d ln hay nh nu dung vi x l th cng i hi cc khi mch in giao tip phc tp nh nhau.Cc khi ny bao gm b nh cha d liu v chng trnh thc hin, cc mch in giao tip ngoi vi xut nhp v iu khin tr li, cc khi ny kin kt vi vi x l th mi thc hin c cng vic. kt ni cc khi ny i hi ngi thit k phi hiu bit tinh tng v cc thnh phn vi x l, b nh, cc thit b ngoi vi. H thng c to ra kh phc tp, chim nhiu khng gian, mch in phc tp v vn chnh l trnh ngi thit k. Kt qu l gi thnh sn phm cui cng rt cao, khng ph hp p dng cho cc h thng nh. V mt s nhc im trn nn cc nh ch to tch hp mt t b nh v mt s mch giao tip ngoi vi cng vi vi s l vo mt IC duy nht c gi l Microcontroller- Vi iu khin. Do VK cu to v phn cng v kh nng x l thp hn nhiu so vi VXL nn gi thnh ca VXL cng r hn nhiu. Tuy nhin n vn kh nng p ng c tt c yu cu ca ngi tiu dung. VK c ng dng trong cc dy chuyn t ng loi nh, cc robot c ch nng n gin trong my git, t v.v II. Phn loi

1. di thanh ghi Da vo di ca cc thanh ghi v cc lnh ca VK m ngi ta chia ra cc loi VK 8 bit, 16 bit, hay 32 bit Cc loi VK 16 bit do c di lnh ln hn nn cc tp lnh cng nhiu hn, phong ph hn. Tuy nhin bt c chng trnh no vit bng VK 16bit chng ta u c th vit trn VK bit vi chng trnh thch hp. 2.Kin trc CISC v RISC

VXL hoc VK CISC l VK c tp lnh phc tp. CcVK ny c mt s lng ln cc lnh nn gip cho ngi lp trnh c th linh hot v d dng hn khi vit cc chng trnh. VK RISC l VK c tp lnh n gin. Chng c mt s lng nh cc lnh n gin. Do , chng i hi phn cng t hn, gi thnh thp hn, v nhanh hn so vi CISC. Tuy nhin n i hi ngi lp trnh phi vit cc chng trnh phc tp hn, nhiu lnh hn. 3.Kin trc Harard v kin trc Vonneumann Kin trc Harvard s dng b nh ring cho chng trnh v d liu. Bus a ch v bus d liu c lp vi nhau nn qu trnh nhn d liu n gin hn. Kin trc Vonneumann s dng chung b nh cho chng trnh v d liu. iu ny lm cho VK gn nh hn, gi thnh nh hn. Mt s loi VK c trn th trng : - VK MCS-51 : 8031,8032,8051,8052, - VK ATMEL: 89Cxx, AT89Cxx51 - VK AVR AT90Sxxxx - VK PIC 16C5x, 17C43 III. Cu trc tng quan ca vi iu khin: 1.CPU: L tri timn ca h thng. L ni qun l tt c cc hot ng ca VK. Bn trong CPU gm: +ALU l b phn thao tc trn cc d liu. +B gii m lnh v iu khin, xc nh cc m thao tc m CPU cn thc hin. +Thanh ghi lnh IR, lu gi opcode ca lnh c thc thi. +thanh ghi PC, lu gi a ch ca lnh k tip cn thc thi. +Mt tp cc thanh ghi dung lu thng tin tm thi. 2.ROM:

ROM l b nh dung lu gi chng trnh. ROM cn dung cha s liu cc bng, cc tham s h thng, cc s liu c nh ca h thng. Trong qu trnh hot ng ni dung ROM l c nh, khng h thay i, ni dung ROM ch thay i khi ROM ch xa hoc np chng trnh. 3.RAM: RAM l b nh d liu. B nh RAM dung lm mi trng x l thng tin, lu tr cc kt qu trung gian v kt qu cui cng ca cc php ton, x l thng tin. N cng dng t chc cc vng m d liu, trong cc thao tc thu pht, chuyn i d liu. 4.BUS: BUS l cc ng dn dng di chuyn d liu. Bao gm: bus a ch, bus d liu, v bus iu khin 5.B nh thi: c s dng cho cc mc ch chung v thi gian. 6.Watchdog : B phn dng reset li h thng sau khi h thng gp bt thng 7.ADC: B phn chuyn tn hiu analog sang tn hiu digital. Cc tn hiu bn ngoi i vo thng dng analog. ADC s chuyn tn hiu ny v dng tn hiu digital m VK c th hiu c.

ATMEGA 16
I,GII THIU V ATMEGA16 o ATmega16 l vi iu khin 8 bit da trn kin trc RISC. Vi kh thc hin mi lnh trong 1 chu k xung clock , c th t c tc triu lnh trn 1 giy. o o Di y l s ca atmega

- c im : + C 16KB b nh flash vi kh nng c trong khi ghi 512 byte b nh EEPROM , 1KB b nh SRAM , 32 thanh ghi chc nng , 32 ng v ra chung , 3 b nh nh thi/m , ngt ni,ngt ngoi USART , giao tip ni 2 dy ,8 knh ADC 10 bit.. + H tr y cc chng trnh v cng c pht trin h thng nh: trnh dch C,macro assemblers , chng trnh m phng sa li , kit th nghim II, CU TRC AVR 1.Cu trc tng qut

AVR s dng cu trc Harvard, tch ring b nh v cc bus cho chng trnh v d liu. Cc lnh ch thc hin trong 1 chu k xung clock . B nh chng trnh c lu trong b nh flash . 2.ALU - ALU lm vic trc tip vi cc thanh ghi chc nng chung . Cc php ton thc hin trong 1 chu k xung clock . Hot ng ca ALU c chia lm 3 loi: i s, logic v theo bit. 3.TRNG THI THANH GHI - y l thanh ghi trng thi c 8 bit lu tr trng thi ca ALU sau cc php tnh s hc v logic.

PHN 2. Cu trc nhn AVR

C: Carry Flag ;c nh (Nu php ton c nh c s c thit lp) Z: Zero Flag ;C zero (Nu kt qu php ton bng 0) N: Negative Flag (Nu kt qu ca php ton l m) V: Twos complement overflow indicator (C ny c thit lp khi trn s b 2) V, For signed tests (S=N XOR V) S: N H: Half Carry Flag (c s dng trong mt s ton hng s c ch r sau) T: Transfer bit used by BLD and BST instructions(c s dng lm ni chung gian trong cc lnh BLD,BST). I: Global Interrupt Enable/Disable Flag (y l bit cho php ton cc ngt. Nu bit ny trng thi logic 0 th khng c mt ngt no c phc v.) 2.5. Con tr ngn xp (SP) L mt thanh ghi 16 bit nhng cng c th c xem nh hai thanh ghi chc nng c bit 8 bit. C a ch trong cc thanh ghi chc nng c bit l $3E (Trong b nh RAM l $5E). C nhim v tr ti vng nh trong RAM cha ngn xp.

Khi chng trnh phc vu ngt hoc chng trnh con th con tr PC c lu vo ngn xp trong khi con tr ngn xp gim hai v tr. V con tr ngn xp s gim 1 khi thc hin lnh push. Ngc li khi thc hin lnh POP th con tr ngn xp s tng 1 v khi thc hin lnh RET hoc RETI th con tr ngn xp s tng 2. Nh vy con tr ngn xp cn c chng trnh t trc gi tr khi to ngn xp trc khi mt chng trnh con c gi hoc cc ngt c cho php phc v. V gi tr ngn xp t nht cng phi ln hn hoc bng 60H (0x60) v 5FH tr li l vng cc thanh ghi. 2.6. Qun l ngt Ngt l mt c ch cho php thit b ngoi vi bo cho CPU bit v tnh trng sn xng cho i d liu ca mnh.V d:Khi b truyn nhn UART nhn c mt byte n s bo cho CPU bit thng qua c RXC,hc khi n truyn c mt byte th c TX c thit lp Khi c tn hiu bo ngt CPU s tm dng cng vic ng thc hin li v lu v tr ang thc hin chng trnh (con tr PC) vo ngn xp sau tr ti vector phuc v ngt v thc hin chng trnh phc v ngt ch ti khi gp lnh RETI (return from interrup) th CPU li ly PC t ngn xp ra v tip tc thc hin chng trnh m trc khi c ngt n ang thc hin. Trong trng hp m c nhiu ngt yu cu cng mt lc th CPU s lu cc c bo ngt li v thc hin ln lt cc ngt theo mc u tin .Trong khi ang thc hin ngt m xut hin ngt mi th s xy ra hai trng hp. Trng hp ngt ny c mc u tin cao hn th n s c phc v. Cn n m c mc u tin thp hn th n s b b qua. B nh ngn xp l vng bt k trong SRAM t a ch 0x60 tr ln. truy nhp vo SRAM thng thng th ta dng con tr X,Y,Z v truy nhp vo SRAM theo kiu ngn xp th ta dng con tr SP. Con tr ny l mt thanh ghi 16 bit v c truy nhp nh hai thanh ghi 8 bit chung c a ch :SPL :0x3D/0x5D(IO/SRAM) v SPH:0x3E/0x5E. Khi chng trnh phc v ngt hoc chng trnh con th con tr PC c lu vo ngn xp trong khi con tr ngn xp gim hai v tr.V con tr ngn xp s gim 1 khi thc hin lnh push. Ngc li khi thc hin lnh POP th con tr ngn xp s tng 1 v khi thc hin lnh RET hoc RETI th con tr ngn xp s tng 2. Nh vy con tr ngn xp cn c chng trnh t trc gi tr khi to ngn xp trc khi mt chng trnh con c gi hoc cc ngt c cho php phc v. V gi tr ngn xp t nht cng phi ln hn 60H (0x60) v 5FH tr li l vng cc thanh ghi.

PHN 3. Cu trc b nh
AVR c 2 khng gian b nh chnh l b nh d liu vo b nh chng trnh. Ngoi ra ATmega16 cn c thm b nh EEPROM lu tr d liu. 3.1. B nh chng trnh (B nh Flash) B nh Flash 16KB ca ATmega16 dng lu tr chng trnh. Do cc lnh ca AVR c di 16 hoc 32 bit nn b nh Flash c sp xp theo kiu 8KX16. B nh Flash c chia lm 2 phn, phn dnh cho chng trnh boot v phn dnh cho chng trnh ng dng.

3.2. B nh d liu SRAM 1120 nh ca b nh d liu nh a ch cho file thanh ghi, b nh I/O v b nh d liu SRAM ni. Trong 96 nh u tin nh a ch cho file thanh ghi v b nh I/O, v 1024 nh tip theo nh a ch cho b nh SRAM ni.

3.3. B nh d liu EEPROM ATmega16 cha b nh d liu EEPROM dung lng 512 byte, v c sp xp theo tng byte, cho php cc thao tc c/ghi tng byte mt.

PHN 4. CC CNG VO RA (I/O)

Vi iu khinATmega16c 32 ng vo ra chia lm bn nhm 8 bit mt. Cc ng vo ra ny c rt nhiu tnh nng v c th lp trnh c. y ta s xt chng l cc cng vo ra s. Nu xt trn mt ny th cc cng vo ra ny l cng vo ra hai chiu c th nh hng theo tng bit. V cha c in tr pull-up (c th lp trnh c). Mc d mi port c cc c im ring nhng khi xt chng l cc cng vo ra s th dng nh iu khin vo ra d liu th hon ton nh nhau. Chng ta c thanh ghi v mt a ch cng i vi mi cng, l : thanh ghi d liu cng (PORTA, PORTB, PORTC, PORTD), thanh ghi d liu iu khin cng (DDRA, DDRB, DDRC, DDRD) v cui cng l a ch chn vo ca cng (PINA, PINB, PINC, PIND). 4.1. Thanh ghi DDRx y l thanh ghi 8 bit (ta c th c v ghi cc bit thanh ghi ny) v c tc dng iu khin hng cng PORTx (tc l cng ra hay cng vo). Nu nh mt bit trong thanh ghi ny c set th bit tng ng trn PORTx c nh ngha nh mt cng ra. Ngc li nu nh bit khng c set th bit tng ng trn PORTx c nh ngha l cng vo.

4.2.Thanh ghi PORTx y cng l thanh ghi 8 bit (cc bit c th c v ghi c) n l thanh ghi d liu ca cng Px v trong trng hp nu cng c nh ngha l cng ra th khi ta ghi mt bit ln thanh ghi ny th chn tng ng trn port cng c cng mc logic. Trong trng hp m cng c nh ngha l cng vo th thanh ghi ny li mang d liu iu khin cng. C th nu bit no ca thanh ghi ny c set (a ln mc 1) th in tr ko ln (pull-up) ca chn tng ng ca port s c kch hot. Ngc li n s trng thi hi-Z. Thanh ghi ny sau khi khi ng Vi iu khins c gi tr l 0x00. 4.3. Thanh ghi PINx y l thanh ghi 8 bit cha d liu vo ca PORTx (trong trng hp PORTx c thit lp l cng vo) v n ch c th c m khng th ghi vo c. Tm li: 1. c d liu t ngoi th ta phi thc hin cc bc sau: - a d liu ra thanh ghi iu khin DDRxn t cho PORTx (hoc bit n trong port) l u vo (xa thanh ghi DDRx hoc bit). - Sau kch hot in tr pull-up bng cch set thanh ghi PORTx ( bit). - Cui cng c d liu t a ch PINxn (trong x: l cng v n l bit). 2. a d liu t vi iu khin ra cc cng cng c cc bc hon ton tng t. Ban u ta cng phi nh ngha l cng ra bng cch set bit tng ng ca cng .v sau l ghi d liu ra bit tng ng ca thanh ghi PORTx.

PHN 5. B nh thi
B nh thi (timer/counter0) l mt module nh thi/m 8 bit, c cc c im sau: B m mt knh Xa b nh thi khi trong mode so snh (t ng np) PWM To tn s

- B m s kin ngoi - B chia tn 10 bit - Ngun ngt trn b m v so snh S cu trc ca b nh thi:

5.1. Cc thanh ghi TCNT0 v OCR0 l cc thanh ghi 8 bit. Cc tn hiu yu cu ngt u nm trong thanh ghi TIFR. Cc ngt c th c che bi thanh ghi TIMSK. B nh thi c th s dng xung clock ni thng qua b chia hoc xung clock ngoi trn chn T0. Khi chn xung clock iu khin vic b nh thi/b m s dng ngun xung no tng gi tr ca n. Ng ra ca khi chn xung clock c xem l xung clock ca b nh thi (clkT0). Thanh ghi OCR0 lun c so snh vi gi tr ca b nh thi/b m. Kt qu so snh c th c s dng to ra PWM hoc bin i tn s ng ra ti chn OC0. 5.2. n v m Phn chnh ca b nh thi 8 bit l mt n v m song hng c th lp trnh

c. Cu trc ca n nh hnh di y:

count: tng hay gim TCNT0 1 direction: la chn gia m ln v m xung clear: xa thanh ghi TCNT0 clkT0: xung clock ca b nh thi TOP: bo hiu b nh thi tng n gi tr ln nht BOTTOM: bo hiu b nh thi gim n gi tr nh nht (0) 5.3. n v so snh ng ra B so snh 8 bit lin tc so snh gi tr TCNT0 vi gi tr trong thanh ghi so snh ng ra (OCR0). Khi gi tr TCNT0 bng vi OCR0, b so snh s to mt bo hiu. Bo hiu ny s t gi tr c so snh ng ra (OCF0) ln 1 vo chu k xung clock tip theo. Nu c kch hot (OCIE0=1), c OCF0 s to ra mt ngt so snh ng ra v s t ng c xa khi ngt c thc thi. C OCF0 cng c th c xa bng phn mm 5.4. M t cc thanh ghi 5.4.1. Thanh ghi iu khin b nh thi/b m TCCR0

5.4.1.1. Bit 7-FOC0: So snh ng ra bt buc Bit ny ch tch cc khi bit WGM00 ch nh ch lm vic khng c PWM. Khi t bit ny ln 1, mt bo hiu so snh bt buc xut hin ti n v to dng sng. 5.4.1.2. Bit 6, 3-WGM01:0: Ch to dng sng Cc bit ny iu khin m th t ca b m, ngun cho gi tr ln nht ca b m (TOP) v kiu to dng sng s c s dng. 5.4.1.3. Bit 5:4-COM01:0: Ch bo hiu so snh ng ra Cc bit ny iu khin hot ng ca chn OC0. Nu mt hoc c hai bit COM01:0 c t ln 1, ng ra OC0 s hot ng. 5.4.1.4. Bit 2:0: CS02:0: Chn xung ng h Ba bit ny dng la chn ngun xung cho b nh thi/b m

5.4.2. Thanh ghi b nh thi/b m Thanh ghi b nh thi/b m cho php truy cp trc tip (c c v ghi) vo b

m 8 bit Thanh ghi ny cha mt gi tr 8 bit v lin tc c so snh vi gi tr ca b m. 5.4.4. Thanh ghi mt n ngt Hnh 5.7. Thanh ghi mt n ngt TIMSK 5.4.4.1. Bit 1-OCIE0: Cho php ngt bo hiu so snh 5.4.4.2. Bit 0-TOIE0: Cho php ngt trn b m 5.4.5. Thanh ghi c ngt b nh thi 5.4.5.1. Bit 1-OCF0: C so snh ng ra 0 5.4.5.2. Bit 0-TOV0: C trn b m Bit TOV0 c t ln 1 khi b m b trn v c xa bi phn cng khi vector ngt tng ng c thc hin. Bit ny cng c th c xa bng phn mm

PHN 6. USART
B truyn nhn ni tip ng b v bt ng b l mt thit truyn thng ni tip c cc chc nng chnh nh sau: -Hot ng song cng (cc thanh ghi truyn v nhn ni tip c lp vi nhau). -Hot ng ng b hoc bt ng b -B to tc baud c chnh xc cao -H tr khung truyn ni tip vi 5, 6, 7, 8, hoc 9 bit d liu v 1 hoc 2 bit stop -Kim tra chn l -Pht hin trn d liu -Pht hin li khung -Lc nhiu, bao gm pht hin bit start li v b lc thng thp s -Ngt khi kt thc truyn, thanh ghi truyn ht d liu v kt thc nhn -Ch truyn thng a vi x l -Ch truyn ng b tc cao USART bao gm 3 phn chnh: b to xung clock, b truyn v b nhn. Cc thanh ghi iu khin c s dng chung gia cc phn ny 6.1. To xung clock B to xung clock to ra xung ng h cn bn cho b truyn v b nhn. USART h tr 4 ch hot ng xung clock: bt ng b, bt ng b tc cao, truyn ng b master v truyn ng b slave. S khi ca b to xung clock nh sau: -txclk: xung ng h b truyn -rxclk: xung ng h b nhn -xcki: tn hiu vo t chn XCK, s dng cho hot ng truyn ng b master -xcko: tn hiu xung clock ng ra ti chn XCK, s dng cho hot ng truyn ng b slave

-fosc: tn s t chn XTAL USART chp nhn tt c 30 t hp ca cc nh dng khung truyn sau y: - 1 bit start - 5, 6, 7, 8, hoc 9 bit d liu - C hoc khng c bit chn l - 1 hoc 2 bit stop Mt khung truyn bt u vi mt bit start, theo sau l bit c trng s thp nht (LSB) ca d liu (c th ln ti 9 bit), kt thc bng bit c trng s ln nht (MSB) v bit stop. - St: bit start (mc thp) - (n): bit d liu (0 n 8) - P: bit chn l - Sp: bit stop (mc cao) - IDLE: khng c d liu truyn (mc cao trong sut thi gian idle) 6.3. Khi to USART Qu trnh khi to USART bao gm vic thit lp tc baud, thit lp nh dng khung v kch hot b truyn v b nhn. 6.4Truyn thng d liu-B truyn USART B truyn SART c kch hot bng cch thit lp bit TXEN trong thanh ghi UCSRB. Khi b truyn c kch hot, chn TxD hot ng nh ng ra ca b truyn ni tip. Tc baud, ch hot ng v nh dng khung truyn phi c thit lp trc khi thc hin truyn d liu. 6.4.1. Truyn khung 5 n 8 bit d liu Vic truyn d liu c thit lp bng cch np d liu truyn vo b m truyn. D liu trong b m s c a vo thanh ghi dch khi thanh ghi dch sn sng gi mt khung mi. 6.4.2. Truyn khung 9 bit d liu Nu s dng 9 bit d liu, bit th 9 phi c ghi vo bit TXB8 trong thanh ghi UCSRB trc khi byte cn li c ghi vo UDR. 6.5. Nhn d liu-b nhn USART B nhn USART c kch hot bng cch t bit RXEN trong thanh ghi UCRSB ln 1. Khi b nhn c kch hot, chn RxD hot ng nh ng vo ca

b nhn ni tip. Tc baud, ch hot ng v nh dng khung truyn phi c thit lp trc khi thc hin truyn d liu. 6.5.1. Nhn khung vi 5 n 8 bit d liu B nhn bt u nhn d liu khi n pht hin mt bit start hp l. Mi bit theo sau bit start s c ly mu ti tc baud hoc tc ng h XCK, v c dch vo trong thanh ghi dch ca b nhn cho n khi pht hin mt bit stop u tin. Ni dung ca thanh ghi dch sau c a vo b m. B m ca b nhn c th c c bng cch c UDR. 6.5.2. Nhn khung vi 9 bit d liu Nu nhn d liu 9 bit, bit th 9 phi c c t bit RXB8 trong thanh ghi UCSRB trc khi c cc bit thp trong UDR.

PHN 7. B bin i A/D

Vi iu khinATmega16 c mt b bin i ADC tch hp trong chip vi cc c im: phn gii 10 bit Sai s tuyn tnh: 0.5LSB . chnh xc +/-2LSB Thi gian chuyn i:65-260s 8 Knh u vo c th c la chn C hai ch chuyn i free running v single conversion C ngun bo ngt khi hon thnh chuyn i Loi b nhiu trong ch ng

Tm u vo ca ADC l tm chn ca PORTA v chng c chn thng qua mt MUX iu khin hot ng vo ra d liu ca ADC v CPU chng ta c 3 thanh ghi: ADMUX l thanh ghi iu khin la chn knh u vo cho ADC, ADCSRA l thanh ghi iu khin v thanh ghi trng thi ca ADC, ADCH v ADCL l 2 thanh ghi d liu.

 iu khin hot ng vo ra d liu ca ADC v CPU chng ta c 3 thanh ghi: ADMUX l thanh ghi iu khin la chn knh u vo cho ADC, ADCSRA l thanh ghi iu khin v thanh ghi trng thi ca ADC, ADCH v ADCL l 2 thanh ghi d liu. 7.1. ADMUX: Multiplexer select register y l thanh ghi iu khin 8 bit Vi 4 bit c nh ngha l MUX3, MUX2, MUX1,v MUX0, ng vi cc t hp logic ta c th chn knh u vo. C th

Cc bit REFS1 v REFS0 dng chn gi tr in p tham kho cho ADC, nh sau Ch : Nu nh ta thay i knh trong thi im m ADC ang chuyn i th khi qu trnh chuyn i hon thnh th knh vo mi c thay i. 7.2. ADCSR-ADC control and status register y l thanh ghi iu khin v lu trng thi ca ADC

7.2.1. Bit 7-ADEN:ADC enable y l bit iu khin hot ng ca ADC.Khi bit ny c set 1 th ADC c th hot ng v ngc li.Nu nh ta ngng hot ng ca ADC trong khi n ang chuyn i th n s kt thc qu trnh chuyn i.Mc d cha chuyn i xong. 7.2.2. Bit 6-ADSC: ADC start conversion

Trong ch chuyn i n th bit ny phi c set ln 1 bt u chuyn i.Trong ch chuyn i t do th bit ny cn c set ln 1 bt u ln chuyn i u tin.Bit ny c gi st trong qu trnh chuyn i v c xa khi m chuyn i xong. 7.2.3. Bit 5-ADATE :ADC Auto Trigger enable Khi bit ny c set th ADC s bt u chuyn i mi khi c mt ngun kch hot xut hin. Vic la chn ngun kch hot c thc hin bng cch set cc bit trong thanh ghi SFIOR. 7.2.4. Bit 4-ADIF: ADC interrupt Flag Bit ny c set ln 1 bi phn cng khi qu trnh chuyn i hon thnh v thanh ghi d liu c cp nht. Bit ny c xa bng phn cng nu nh ngt ny c php v c phc v. Hoc n c th c xa bng cch ghi gi tr logic 0vo c ny. C th khi ngt b cm ta c th s dng cc lnh sbi v cbi tc dng ln bit ny. 7.2.5. Bit 3-ADIE:ACD interrupt Enable Nu bit ny set 1 v ngt ton cc c cho php th ngt ny c php phc v (khi chuyn i xong d liu) v nu b xa th ngc li. 7.2.6. Bit 2.1.0-ADPS2ADPS0: Bit la chn xung nhp(Tc ) Ngun xung c ly t ngun xung ca Vi iu khin(XTAL) v c chia tn thng qua b chia tn. Cc bit ADPS c nhim v chn s chia cho b chia tn theo bng sau: ADPS2 ADPS1 ADPS0 Division Factor 2 2 4 8 16 32 64 128

0 0 0 0 1 1 1 1

0 0 1 1 0 0 1 1

0 1 0 1 0 1 0 1

7.3. Thanh ghi d liu ACDH v ADCL Thanh ghi ny cha d liu chuyn i t tng t sang s, c sp xp nh hnh di y

15 -

14 -

13 -

12 -

11 -

10 -

ADC9 ADC8 ADCH

ADC ADC6 ADC5 ADC4 ADC3 ADC2 ADC1 ADC0 ADCL 7 readwriteR R intialvalue 0 0 6 R R 0 0 5 R R 0 0 4 R R 0 0 3 R R 0 0 2 R R 0 0 1 R R 0 0 0 R R 0 0

7.4. Nguyn tc hot ng v lp trnh iu khin ADC c nhim v chuyn i tn hiu in p tng t thnh tn hiu s c phn gii 10 bit.Vi gi tr nh nht ca in p t chn AGND v gi tr cc i ca in p tng t c mc vo chn AREF. Tm knh tng t u vo c chn la thng qua ADMUX v ADMUX ny c iu khin bi thanh ghi ADMUX. ADC ny c th hot ng c hai ch . l chuyn i n: ch chuyn i mt ln khi c lnh chuyn i v ch t chuyn i (Free running mode) y l ch m ADC t ng chuyn i khi c hot ng v cng vic chuyn i c tnh tun hon (ch cn khi ng mt ln). ADC c php hot ng nh thit lp bit ADEN. Qu trnh chuyn i c bt u bng vic ghi vo bit ADSC mc logic 1 v trong sut qu trnh chuyn i bit ny lun c gi mc cao. Khi qu trnh chuyn i hon thnh th bit ny c xa bng phn cng v c AIDF c bt ln. D liu sau khi chuyn i c a ra thanh ghi d liu ADCL v ADCH, nhng ch khi c d liu t hai thanh ghi ny th c ADCL trc ri mi c

ADCH. Nu c ADCH trc th d liu cp nht c th ghi ln ADCL (Vi iu khin ngh rng c xong d liu). iu khin vo ra d liu vi ADC, cc bc thc hin nh sau: Bc 1: nh ngha cc cng vo cho tn hiu tng t Xa bit tng ng vi chn trong thanh ghi DDRA. Sau loi b in tr treo bng cch xa bit tng ng thanh ghi PORTA Bc 2: Chn knh tng t vo (chn chn vo cho ADC) thng qua thanh ghi ADMUX (c th thay i trong qu trnh hot ng). Bc 3: Thit lp cc thng s cho ADC Tc chuyn i thng qua xung nhip chuyn i. Ch chuyn i : n hoc t ng. S dng ngt hoc khng. Bc 4: Bt u chuyn i v c d liu.

GII THIU STM32-ARM CORTEX-M3

Trong vi nm tr li y, mt trong nhng xu hng ch yu trong cc thit k vi VK l s dng cc chip ARM7 v ARM9 nh mt VK a dng. Tp on ST Microelectronic va cho ra mt dng STM32, VK u tin da trn nn li ARM Cortex-M3 th h mi do hng ARM thit k. I.CORTEX l g? Dng Cortex c 3 nhm chnh: *Dng A: cho cc ng dng cao cp *Dng R:cho ng dng thi gian thc *dng M: cho cc ng dng VK v chi ph thp Dng STM32 thit lp cc tiu chun v hiu sut, chi ph, cng nh kh nng p ng cc ng dng tiu th nng lng thp v tnh iu khin thi gian thc khc khe. Dng ARM cortex l mt b x l th h mi a ra mt kin trc chun cho nhu cu a dng v cng ngh.

STM32 c thit k da trn dng Cortex-M3, dng Cortex-M3 c thit k c bit nng cao hiu sut h thng, kt hp vi tiu th nng lng thp, Cortex-M3 c thit k trn nn kin trc mi, do chi ph sn xut thp cnh tranh vi cc dng VK 8 v 6 bit truyn thng. Dng Cortex l mt li x l hon thin, a ra mt chun CPU v kin trc h thng chung. Cortex-M3 a ra mt li VK chun nhm cung cp phn tng qut, quan trng nht ca mt VK. Cortex-M3 gm: mt CPU 32bit, cu trc bus (bus structure), n v x l ngt c h tr tnh nng lng ngt vo nhau (nested interrupt unit), h thng kim li (debug system) v tiu chun b tr b nh(standard memory layout). Khng gian a ch 4Gbyte ca Cortex-M3 c chia thnh cc vng cho m chng trnh, SRAM, ngoi vi v ngoi vi h thng. Cortex-M3 c thit k da theo kin trc Harward (b nh chng trnh v b nh d liu tch bit vi nhau), c nhiu bus cho php thc hin cc thao tc song song vi nhau. Cho php truy cp d liu khng xp hng.

Khi trung tm ca STM32 l mt b x l Cortex-M3.

Mt trong nhng thnh phn chnh ca li Cortex-M3 l NVIC (Nested Vector Interrupt Controller). NVIC cung cp mt cu trc ngt chun cho tt c cc VK c thit k da trn li Cortex v cch x l ngt c bit (exceptional interrupt). NVIC cung cp cc vector ngt chuyn dng ln ti 240 ngun ngt t ngoi vi, mi ngun ngt t ngoi vi, mi ngun ngt c th c u tin ha vi cc mc ring bit. NVIC c thit k x l cc ngt i hi thi gian p ng cc k nhanh. II. MT VI C IM NI BT CA STM32: Gi thnh r: ch gn 1 Euro vi s lng ln. STM32 u tin gm 14 bin th khc nhau, c chia thnh hai nhm: *dng Performance: c tn s hot ng ln ti 72MHz *dng Access : c tn s hot n ln ti 32MHz. Cc bin th STM32 trong hai nhm ny tng thch hon ton v cch b tr chn (pin) v phn mm, ng thi kch thc b nh FLASH ROM c th ln ti 128K v 20K SRAM.

H. kin trc ca STM32 nhnh Performance v Access III.S TINH VI B ADC 12bit c tch hp mt cm bin nhit t ng hiu chnh khi nhit thay i v h tr nhiu mode chuyn i. B timer c 4 khi capture compare, mi khi timer c th lin kt vi cc khi timer khc to ra mt mng cc timer tinh vi.

Mt timer cao cp chuyn h tr iu khin ng c, vi 6 u ra PWM vi dead time lp trnh c v mt ng break input s buc tn hiu PWM sang mt trng thi an ton c ci sn. Ngoi vi ni tip SPI c mt khi kim tng CRC bng phn cng cho 8 v 16 word h tr tch cc cho giao tip th nh SD hoc MMC. STM32 c h tr 7 knh DMA. STM32 l mt VK tiu th nng lng thp v t hiu sut cao. N c th hot ng in p 2V, chy tn s 72MHz v dng tiu th ch c 36mA vi tt c cc khi bn trong VK c hot ng. STM32 ch tiu th 2uA khi ch standby. Mt b dao ng ni RC 8MHz cho php chip nhanh chng thot khi ch tit kim nng lng khi b dao ng ngoi ang khi ng. IV.S AN TON Ngy nay, cc ng dng hin i thng phi hot ng trong mi trng khc khe, i hi tnh an ton cao, cng nh i hi sc mnh x l cng nhiu thit b ngoi vi tinh vi. p ng cc yu cu , STM32 cung cp mt s tnh nng phn cng h tr cc ng dng mt cch tt nht. Chng bao gm mt b pht hin in p thp, mt h thng bo v xung clock v hai b watchdogs. Watchdog ca s: watchdog ny phi c lm ti trong mt khung thi gian xc nh. Nu nhn n qu sm, hoc qu mun, th watchdog s kch hot. Watchdog c lp : c b dao ng H thng bo v xung nhp c th pht hin li ca b dao ng chnh bn ngoi v t ng chuyn sang dng b dao ng ni RC 8MHz. V.TNH BO MT B nh Flash ca STM32 c th c kha chng truy cp c Flash thng qua cng debug. Khi tnh nng bo v c c kch hot, b nh Flash cng c bo v chng ghi ngn chn m khng tin cy c chn vo bng vecto ngt. STM32 cng c mt ng h thi gian thc v mt khu vc nh d liu trn SRAM c nui nh ngun pin. Khu vc ny c mt u vo chng gi mo, c th kch hot mt s kin ngt khi c s thay i trng thi u vo ny.

Ngoi ra, mt s kin chng gi mo s t ng xa d liu c lu tr trn SRAM c nui bng ngun pin.

VI.PHT TRIN PHN MM ST cung cp mt th vin iu khin thit b ngoi vi, mt b th vin pht trin USB nh l mt th vin ANSI C. c rt nhiu RTOS m ngun m v thng mi v middleware(TCP/IP, h thng g ri hon ton mi gi l CoreSight. Truy cp vo h thng CoreSight thng qua cng truy cp Debug (Debug Access Port), cng ny h tr kt ni chun JTAG hoc giao din 2 dy (serial wire-2 Pin), cng nh cung cp trnh iu khin chy g li, h thng CoreSight trn STM32 cung cp mt data wacthpoint v mt cng c theo di (instrumentation trace). VII.DNG PERFORMANCE V ACCESS CA STM32 H STM32 c hai nhnh u tin ring bit: dng Performance v dng Access. Dng Performance tp hp y cc thit b ngoi vi v chy vi xung nhp ti a 72MHz. Dng Access c thit b ngoi vi t hn v chy vi xung nhp ti a 32MHz. Hai dng ny c cch b tr chn v cc kiu ng gi chip l nh nhau.

S KHC NHAU GIA VI IU KHIN V VI X L

Hai khi nim mircoprocessor = vi x l v microcontroller = vi iu khin c khc nhau. C th ni nm na phn bit hai khi nim nh sau: I. Vi x l (Microprocessor): L con chp (TO) ca my tnh, c th gi l b phn u no ca CPU ca my tnh tng hp ton b hay gn ton b cc chc nng ca CPU my tnh. Vi x l th thng ng dng lm my tnh. chy b vi x l trong my tnh th cn mt h iu hnh (OS) nh Windows XP, Linux, hoc Mac OS. Khi nim vi x l gn lin vi cc th h CPUs my tnh nh x86 CPU, Pentium CPU v Celeron CPU v.v... Khi ni n vi x l th c cc hng ln nh Intel, Motorola, Toshiba v.v... s dng vi x l phi c cc chp b nh (ROM, RAM), giao din vo/ra (I/O).Vi x l l mt kt cu logic m c th thay i chc nng ca n bng chng trnh ngoi,tc l phn cng ng vai tr th yu,phn mm (chng trnh)ng vai tr ch o i vi cc chc nng cn thc hin.nh vy vi x l c s mm do trong cc chc nng ca minh.ngy nay vi x l c tc tnh ton rt cao v kh nng x l rt ln. Vi x l c cc khi chc nng cn thit ly d liu, x l d liu v xut d liu ra ngoi sau khi x l. V chc nng chnh ca Vi x l chnh l x l d liu, chng hn nh cng, tr, nhn, chia, so snh.v.v..... Vi x l khng c kh nng giao tip trc tip vi cc thit b ngoi vi, n ch c kh nng nhn v x l d liu m thi. vi x l hot ng cn c chng trnh km theo, cc chng trnh ny iu khin cc mch logic v t vi x l x l cc d liu cn thit theo yu cu. Chng trnh l tp hp cc lnh x l d liu thc hin tng lnh c lu tr trong b nh, cng vic thc hnh lnh bao gm: nhn lnh t b nh, gii m lnh v thc hin lnh sau khi gii m. thc hin cc cng vic vi cc thit b cui cng, chng hn iu khin ng c, hin th k t trn mn hnh .... i hi phi kt hp vi x l vi cc mch in giao tip vi bn ngoi c gi l cc thit b I/O (nhp/xut) hay cn gi l cc thit b ngoi vi. Bn thn cc vi x l khi ng mt mnh khng c nhiu hiu qu s dng, nhng khi l mt phn

ca mt my tnh, th hiu qu ng dng ca Vi x l l rt ln. Vi x l kt hp vi cc thit b khc c s trong cc h thng ln, phc tp i hi phi x l mt lng ln cc php tnh phc tp, c tc nhanh. Chng hn nh cc h thng sn xut t ng trong cng nghip, cc tng i in thoi, hoc cc robot c kh nng hot ng phc tp v.v... II. Vi iu khin (Microcontroller): Vi iu khin l mt con chp (NH) c chc nng tnh ton bao gm mt phn li nh b x l, b nh v cc phn ngoi vi vo ra c th lp trnh c. Cn vi iu khin th thng ng dng trong cc mch in iu khin. chy vi iu khin trong mt mch iu khin th phi s dng mt chng trnh np vo n ri cm n vo mch iu khin. Khi ni n vi iu khin th c my hng nh Microchip (PIC), ATMEL (AVR) v.v...Vi iu khin c kh nng tng t nh kh nng ca vi x l, nhng cu trc phn cng dnh cho ngi dng n gin hn nhiu. Vi iu khin ra i mang li s tin li i vi ngi dng, h khng cn nm vng mt khi lng kin thc qu ln nh ngi dng vi x l, kt cu mch in dnh cho ngi dng cng tr nn n gin hn nhiu v c kh nng giao tip trc tip vi cc thit b bn ngoi. Vi iu khin tuy c xy dng vi phn cng dnh cho ngi s dng n gin hn, nhng thay vo li im ny l kh nng x l b gii hn (tc x l chm hn v kh nng tnh ton t hn, dung lng chng trnh b gii hn). Thay vo , Vi iu khin c gi thnh r hn nhiu so vi vi x l, vic s dng n gin, do n c ng dng rng ri vo nhiu ng dng c chc nng n gin, khng i hi tnh ton phc tp. Vi iu khin c ng dng trong cc dy chuyn t ng loi nh, cc robot c chc nng n gin, trong my git, t v.v... Hai khi nim u ch con chp, nhiu khi nhn hnh dng bn ngoi chng trng ging nhau nn nhiu khi kh phn bit. mt mc no c th hiu nm na l vi x l th TO c lp trnh ri (programmed) cn vi iu khin th NH NH hn v cha c lp trnh - chng ta c th lp trnh c cho n - nay ni cch khc l n

kh trnh (programmable) i hi ngi dng phi lp trnh v np chng trnh cho n!