Introduction to Altium Designer

Unied Design Environment

EEESAU
March 2010

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Copyright c 2010 by Gabriel Haines

Written by Gabriel Haines

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Preface
This document is intended to provide an introduction to Altium Designer, suitable for users with little or no experience in the use of EDA tools or CAD software. The content of this document has been arranged in a consecutive order, presenting information when it is needed and reecting how the design process progresses (design ow). Although reading in a consecutive order is recommended, chapters or sections may be read in any order. This document has been written for the Altium Designer Summer 09 release. Whilst the majority of topics and functionality discussed should be applicable to previous versions, not all features may be present or operate in the same exact way. For example, the user interface and basic structure has not changed much if at all, but certain functions and features like 3D PCB, FPGA Instruments, and online supplier linking may have changed since previous versions. Content contained in this document based on the authors experience, Altium help les & manuals, and content found in the Altium Training Manuals [1]

Contents
1 Introduction 1.1 1.2 1.3 1.4 Overview of the Altium Designer Environment . . . . . . . . . . . . . . Workspace Panels . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Shortcut Keys, Pop-up & context Sensitive Menus . . . . . . . . . . . . . Creating & Using Projects . . . . . . . . . . . . . . . . . . . . . . . . . 1.4.1 1.4.2 1.4.3 1.4.4 1.4.5 1.5 1.6 Project Types . . . . . . . . . . . . . . . . . . . . . . . . . . . . Creating a Project . . . . . . . . . . . . . . . . . . . . . . . . . . Project Workspace Panel . . . . . . . . . . . . . . . . . . . . . . Adding and Removing Files From a Project . . . . . . . . . . . . Project Packager . . . . . . . . . . . . . . . . . . . . . . . . . . 1 1 1 2 3 3 4 4 4 5 5 6 6 7 7 7 9 10 10 11 11 11 13 13 14 15 15 17 17 17 18

Help System . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Version Control . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1.6.1 1.6.2 1.6.3 1.6.4 1.6.5 Getting Subversion . . . . . . . . . . . . . . . . . . . . . . . . . Subversion Servers & Repositories . . . . . . . . . . . . . . . . . Interfacing SVN with Altium Designer . . . . . . . . . . . . . . Using Subversion in Altium Designer . . . . . . . . . . . . . . . Further Reading on Version Control . . . . . . . . . . . . . . . .

Schematic capture 2.1 Introduction to the Schematic Editor . . . . . . . . . . . . . . . . . . . . 2.1.1 2.1.2 2.1.3 2.1.4 2.2 2.2.1 2.2.2 2.2.3 2.3 2.3.1 2.3.2 2.3.3 Navigating around schematics . . . . . . . . . . . . . . . . . . . Schematic Objects . . . . . . . . . . . . . . . . . . . . . . . . . Filling in the Title Block . . . . . . . . . . . . . . . . . . . . . . Using Templates with Existing Title Blocks . . . . . . . . . . . . Browsing & Adding Libraries . . . . . . . . . . . . . . . . . . . Library Panel . . . . . . . . . . . . . . . . . . . . . . . . . . . . Searching for a Component . . . . . . . . . . . . . . . . . . . . Placing Components . . . . . . . . . . . . . . . . . . . . . . . . Annotation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Editing Component Parameters . . . . . . . . . . . . . . . . . .

Library System . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Component Placement . . . . . . . . . . . . . . . . . . . . . . . . . . .

CONTENTS 2.3.4 2.4 2.4.1 2.4.2 2.4.3 2.4.4 2.5 2.5.1 2.5.2 2.5.3 2.5.4 3 Linking Components to Suppliers . . . . . . . . . . . . . . . . . Wires & Nets . . . . . . . . . . . . . . . . . . . . . . . . . . . . Power Ports . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Buses . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Harnesses . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Flat and Hierarchical Design Structure . . . . . . . . . . . . . . . Multi Sheet Connectivity . . . . . . . . . . . . . . . . . . . . . . Connecting Sheets in a Hierarchical Design . . . . . . . . . . . . Synchronising Sheets in a Hierarchical Design . . . . . . . . . .

v 20 21 21 22 22 23 24 24 25 26 26 28 28 28 29 30 30 30 31 32 33 35 35 36 36 37 37 39 41 41 43 43 43 45 46 47 48 49 49

Component Connections, Buses & Harnesses . . . . . . . . . . . . . . .

Multi Sheet Design . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Design Verication 3.1 Compiling Schematics and Projects . . . . . . . . . . . . . . . . . . . . 3.1.1 3.1.2 3.2 3.2.1 3.2.2 3.2.3 3.2.4 3.2.5 3.3 3.3.1 3.3.2 3.3.3 3.3.4 3.3.5 3.3.6 Setting Compiler Options . . . . . . . . . . . . . . . . . . . . . Compiling and Compiler Errors . . . . . . . . . . . . . . . . . . Simulation Models for Components . . . . . . . . . . . . . . . . Simulation Sources and Objects . . . . . . . . . . . . . . . . . . Simulation Settings . . . . . . . . . . . . . . . . . . . . . . . . . Running and Viewing Simulation Data . . . . . . . . . . . . . . Creating a Bode Plot . . . . . . . . . . . . . . . . . . . . . . . . Before Starting Signal Integrity . . . . . . . . . . . . . . . . . . Starting Signal Integrity for the First Time . . . . . . . . . . . . . Signal Integrity Panel . . . . . . . . . . . . . . . . . . . . . . . . Signal Integrity Settings and Stimulus . . . . . . . . . . . . . . . Setting Design Rules . . . . . . . . . . . . . . . . . . . . . . . . Simple Signal Integrity Example . . . . . . . . . . . . . . . . . .

Simulation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Signal Integrity . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

PCB Design 4.1 4.2 Creating a PCB . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . PCB Setup . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4.2.1 4.2.2 4.2.3 4.2.4 4.3 4.4 4.5 4.6 Board Options and Grids . . . . . . . . . . . . . . . . . . . . . . PCB Layers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Layer Stack Manager . . . . . . . . . . . . . . . . . . . . . . . . Design Rules . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Transferring a Schematic Design to a PCB . . . . . . . . . . . . . . . . . Rooms and Component Placement . . . . . . . . . . . . . . . . . . . . . Holes and Board Cutouts . . . . . . . . . . . . . . . . . . . . . . . . . . Routing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

vi 4.6.1 4.6.2 4.6.3 4.6.4 4.7 4.8 5

CONTENTS Routing Tracks . . . . . . . . . . . . . . . . . . . . . . . . . . . Placing Vias . . . . . . . . . . . . . . . . . . . . . . . . . . . . Polygon Pours . . . . . . . . . . . . . . . . . . . . . . . . . . . Impedance Controlled Routing (Microstrip) . . . . . . . . . . . . 49 51 52 53 54 55 57 57 57 59 59 59 60 60 60 61 62 63 65 65 66 66 67

Signal Integrity from PCB . . . . . . . . . . . . . . . . . . . . . . . . . 3D PCB Design . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Creating and Editing Libraries 5.1 Schematic library editor . . . . . . . . . . . . . . . . . . . . . . . . . . . 5.1.1 5.1.2 5.1.3 5.1.4 5.1.5 5.1.6 5.2 5.2.1 5.2.2 5.2.3 Creating a Component Symbol . . . . . . . . . . . . . . . . . . . Pin Properties . . . . . . . . . . . . . . . . . . . . . . . . . . . . Component Properties . . . . . . . . . . . . . . . . . . . . . . . Linking a Symbol to a Footprint . . . . . . . . . . . . . . . . . . Linking to Suppliers . . . . . . . . . . . . . . . . . . . . . . . . Updating Changes from a Library . . . . . . . . . . . . . . . . . Creating a Footprint Manually . . . . . . . . . . . . . . . . . . . Creating a Footprint using the Footprint Wizard . . . . . . . . . . Creating Simple 3D Bodies . . . . . . . . . . . . . . . . . . . .

PCB library editor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Project Outputs 6.1 6.2 6.3 Bill Of Materials . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Smart PDF . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Output Jobs and Cam Output . . . . . . . . . . . . . . . . . . . . . . . . 6.3.1 Gerber Output . . . . . . . . . . . . . . . . . . . . . . . . . . .

Chapter 1 Introduction
1.1 Overview of the Altium Designer Environment

Altium Designer is an advanced electronic design automation (EDA) software tool. Unlike traditional EDA software that has functionality split into discrete modules/ programs (for tasks such as schematic capture & PCB design), Altium offers a complete design solution from one integrated software platform. The platform is focused on uniting and integrating all aspects of electronic product development into one application, hence the term Unied Design Environment. Altium Designer has always featured schematic capture and PCB design, but also contains a wide range features to assist in many aspects of electronic design. This includes circuit simulation, signal integrity analysis, FPGA & HDL integration, embedded software tools & compilers, bill of materials, formal report generation and CAM output to name a few. When starting Altium Designer, by default the home view is displayed, as shown below in Figure 1.1. The home view itself displays the current license status, available updates, and a task list to offer easy access to common functions and specic documentation. On the left and right of the main window (and the bottom in the case of Figure 1.1) are the workspace panels. The very top of the window contains the system menu and toolbar. These menus and toolbars change depending on which type of document is being edited. Sections of the toolbar can be enabled/disabled by right clicking the toolbar, then selecting the desired item in the popup menu. The top right corner contains the view navigation toolbar. This toolbar shows the location of the current le, and also offers forward & back buttons in a similar style to a web browser. Below the System menu & toolbar, but above the home view window is the document bar. Every time a document is opened, a tab is placed into the document bar.

1.2

Workspace Panels

The workspace panels provide a lot of the functionality in Altium Designer. They can be dragged out into their own oating panels, or docked into the main window along one of the four borders. Holding the CTRL key while dragging a panel will stop it from joining a group of panels. The panel on the right hand side of the window is set to pop out by default when one of the labels is clicked. Pop out functionality can be enable or disabled

Introduction

System Toolbar

System Menu

Document Tab

View Navigation Toolbar

Workspace Panel (set to popout) Workspace Panel

Main Window / Document Editing Area Workspace Panel

Panel Controls

Figure 1.1: Altium Designer home view. by clicking on the push pin icon in the top right hand corner of the respective panel or group of panels. There are two types of panels: system panels and editor panels. System panels are always available (e.g. Project, Files, Output). Editor panels (e.g. PCB library, schematic library) are only available when certain types of documents are being edited. In the bottom right corner are the panel controls. These buttons display menus listing all available panels. If a certain panel has been closed, it can be opened again using these controls. The panel controls can also be found in the system menu under View Workspace Panels. The workspace layout can be reset to factory default by clicking View Desktop Layouts Default.

1.3

Shortcut Keys, Pop-up & context Sensitive Menus

The use of shortcut keys is quite intuitive and powerful. System menu commands can be accessed simply by pressing the key that corresponds to the underlined letter in that command name. Pressing a shortcut key will cause the corresponding system menu to pop-up under the mouse cursor. For example, to create a new schematic le, click File New Schematic, or simply press F N S. The panel control menus can also be accessed by pressing k. Unlike most windows applications, the ALT key is not needed to activate menu shortcuts when a document is opened in the document editor.

1.4 Creating & Using Projects

A panel containing a full list of shortcuts can be opened using the panel controls by pressing K then clicking Help Shortcuts. A list of shortcuts can also be found on the Altium online wiki by clicking Help Altium Wiki Shortcut Keys Context sensitive menus can be accessed in a document simply by right clicking an object, or the document itself. These menus are called context sensitive because the menu that pops-up depends on what object if any was clicked. Many of the relevant commands from the system menu appear in the context sensitive menu. Figure 1.2 shows the context sensitive menu after right clicking on a component.

Figure 1.2: Component Context Sensitive Menu

1.4
1.4.1

Creating & Using Projects

Project Types

Projects are how Altium designer collects and organises all the source les & settings that make up a physical project. There are 6 types of Projects available (shown with their le extension):

PCB Project (.PrjPcb) FPGA Project (.PrjFpg) Core Project (.PrjCor) Library Packages (.PrjPkg) Embedded Project (.PrjEmb) Script Project (.PrjScr)

Introduction

1.4.2

Creating a Project

The most common type of project is the PCB project. As its name suggests, it is designed to organise schematic documents, simulations, PCBs and all other les that go into the design of a printed circuit board. A new project can be created by clicking File New Project PCB Project. A new project should now appear in the Projects workspace panel. This project can be named and saved by clicking File Save Project As. . . , or by right clicking the new project and selecting Save Project As. . . in the context menu. Both methods are shown in gure 1.3. Note: The project must be selected in the projects panel to be saved, otherwise the option will be greyed out in the system menu.

(a) Saving via the system menu

(b) Saving via the context sensitive menu

Figure 1.3: Saving a project

1.4.3

Project Workspace Panel

The project workspace panel, shown in gure 1.4, is a powerful resource to manage and access all the les contained within a project. The interface is similar in functionality to the windows explorer folders panel. When opening a project, all les linked or contained in that project will be listed in the project panel. The panel automatically sorts the les into a hierarchy based on dependencies and le types. More information on Altiums hierarchy system can be found in section 2.5 Multi Sheet Design, on page 24.

1.4.4

Adding and Removing Files From a Project

Files can be added to a project by rst selecting the project in the projects panel, then clicking File New and the desired type of le. If the target project is not selected when a le is created, it will appear as a Free Document. A free le can be added to a project simply by clicking and dragging it into the desired project listed in the projects panel. It can also be removed in the same way by clicking and dragging it down into the empty

1.5 Help System

Figure 1.4: Project Workspace Panel space below the project. Existing les can be added to a project either by clicking Project Add Existing to Project. . . , or by opening a le as a free document then dragging that le into the desired project using the project panel. Projects can contain les of any type, located anywhere on the users machine. Files do not have to be stored in the same location, but for ease of use, storing les in a common location is recommended.

1.4.5

Project Packager

Projects, and all les contained within, can be collected into a single zip archive using the project packager wizard. This feature is useful for complete project backups, or moving a project between machines. Packages can be made based on the a project, the project tree or the design workspace. Individual les to be included can be selected, including the project history and any generated les. The project packager can be accessed from the system menu under Project Project Packager. . .

1.5

Help System

Altium Designer features a powerful and intuitive help system. The Knowledge Center panel is the central piece of this help system, shown in gure 1.5. This panel can be accessed simply by pressing F1, clicking Help Knowledge Center, or by pressing H K. The panel is divided into two parts. The top section shows context sensitive help. When pressing F1, the top of the panel will display help and information relating to the current object selected, current action being performed, or whatever the mouse pointer is currently hovering over. In the top right corner of the panel is the Auto update button. If this button is enabled, the top part of the panel will automatically bring up the help

6 information while the user works, without having to press F1 continuously.

Introduction

The bottom part of the knowledge center panel shows the Documentation Library. This library has links to online articles and resources, the Altium wiki, as well as ofine documentation. The ofine/local documentation is quite extensive, covering specic topics and design tasks. It can be found by scrolling to the bottom of the documentation library list and selecting Ofine Documentation Library. These les can also be found under the Help directory in the Altium root directory (for example C:\Program Files\Altium Designer Summer 09\Help). Note: Online Documentation and the Altium wiki require an Internet connection.

Figure 1.5: Knowledge Center Help Panel

1.6

Version Control

Altium Designer supports the use of version control using Subversion (SVN), CVS or other system that supports Microsofts SCC interface. To setup a version control in Altium, rst there must have a version control system (VCS) installed. The remainder of this section is focused on using the SVN version control system, although interfacing to other systems with Altium Designer will be similar.

1.6.1

Getting Subversion

Information and binaries for SVN can be found at http://subversion.apache. org/ and windows specic binaries can be found at http://subversion.apache. org/packages.html in the Windows section at the bottom of the page. For example, the Tigris.org link (either one) on that page will show a list binaries. One of the standard windows MSI installer les at the top of the page is all that is needed, for example the le Setup-Subversion-1.6.6.msi contains everything Altium Designer needs. Note: Subversion 1.4.3 or later is required.

1.6 Version Control

1.6.2

Subversion Servers & Repositories

It is assumed that an SVN server with repository already exists, but should one need to be created there are two options: using the small standalone svnserve.exe server (included in the aforementioned windows binaries), or using the Apache web server with an SVN module. For new users or small teams, svnserve.exe is recommended. More information for setting up servers using both methods can be found at http://svnbook. red-bean.com/nightly/en/svn.serverconfig.html .

1.6.3

Interfacing SVN with Altium Designer

Once a working SVN system is present, Altium Designer needs to be setup to use it. First, version control must be enabled in the system preferences. The system preferences can be found under DXP Preferences. . . Version control settings can be found in the list on the left, under Version Control General. The rst box needs to be set to SVN Subversion, then the SVN binaries need to be made known to Altium Designer. Using the Auto Detect Subversion button should locate them automatically, but the path can also be set manually. Figure 1.6 shows the settings in the preferences window. After applying the settings and closing the window, Altium Designer will normally require a restart.

Figure 1.6: Subversion Settings in the Preferences Window

1.6.4

Using Subversion in Altium Designer

Version control actions are usually performed using the Storage Manager panel, as shown in gure 1.7.The panel can be found using the panel controls under System Storage Manger. Repositories can be created by right clicking inside the storage manager panel, and selecting Create Repository. Local folders (e.g. the local project folder) can also

Introduction

be linked to an already existing repository by right clicking and selecting Link Folder to Repository Folder. Most SVN commands such as update, remove, commit can also be found simply by right clicking in the storage manger.

Figure 1.7: Storage Manger Panel An easier and more convenient way to perform version control actions is directly from the projects panel. Right clicking any le or project in the project tree, then selecting Version Control in the context menu will give access to SVN commands such as update, add, remove, commit. If a project isnt under version control already, the context menu will only give the options to create a repository or add that project to version control. The Project panel will also display the status of each le compared to the SVN repository with an icon on the right hand side. Figure 1.8 shows a project in the projects panel when it is under version control.

Figure 1.8: Projects panel showing version control status The ability to compare differences between revisions is a very powerful feature of a version control system. Altium Designer easily allows the user to compare differences between different versions of a le stored in a repository. This can be performed from the Time Line section at the bottom of the storage manager panel. The Time line will display a list of all revisions of that le stored in the version control repository. Holding CTRL will allow multiple revisions to be selected. When two revisions are selected, right clicking and selecting Compare from the context menu will initiate a le compare. Both revisions will be loaded from the repository and displayed side by side, along with the Differences panel, as shown in gure 1.9. The Differences panel displays an interactive list of all

1.6 Version Control

modications or additions between the les, and shows graphically where that difference occurs.

Figure 1.9: Viewing Differences Between Revisions

1.6.5

Further Reading on Version Control

More information on version control can be found in the le TU0114 Working with a Version Control System.pdf, located in the help directory. This le can also be opened using the knowledge center documentation library under Ofine Documentation Library The Altium Designer Environment Project Management Working with a Version Control System.

Chapter 2 Schematic capture

2.1 Introduction to the Schematic Editor

Schematic capture is the process of taking an electronic design or circuit, and expressing it as a schematic diagram. This task is performed in Altium Designer using the Schematic Editor. The editor opens inside the main window area/document editing area whenever a schematic document is created or opened. The system menu and toolbar change to reect the options available when editing a schematic. Certain workspace panels also become available, such as the sheet navigation panel. Schematic specic panels can be accessed from the SCH menu in the panel controls, from the view menu, or by simply pressing K C.

Figure 2.1: Schematic Editor

2.1 Introduction to the Schematic Editor

11

2.1.1

Navigating around schematics

The sheet panel, as seen in the bottom of gure 2.1, offers a simple and powerful way to navigate around the schematic. The panel will show the whole document, with a red box representing what is displayed in the editing window. The screen can be moved around simply by clicking and dragging the red box. Alternatively, the schematic window can be panned by right clicking and dragging the schematic itself. When a command is currently active (a cross hair will be displayed instead of the default mouse pointer), the window will automatically pan whenever the mouse hits the edge of the window. The schematic window can be zoomed in or out using the zoom slider in the bottom right corner of the sheet panel. The schematic can also be zoomed in or out by holding CTRL and using the mouse scroll wheel, or by holding CTRL then right clicking and dragging the mouse up or down.

2.1.2

Schematic Objects

The schematic editor uses two types of objects: Graphical and Electrical objects. Graphical objects include lines, bezier curves, ellipses, text frames & images among others. These objects do not form part of the circuit. Graphical objects can be placed from the Utilities section in the toolbar as shown in gure ??, or from the menu under Place Drawing Tools.

Figure 2.2: Graphical objects from the utility toolbar Electrical objects are used to create and represent an electrical circuit. These objects include components, net labels, wires, buses, harnesses & power ports. These objects can be placed using the Wiring toolbar as shown in gure 2.3, or from the Place menu.

Figure 2.3: Electrical objects from the wiring toolbar

2.1.3

Filling in the Title Block

The default schematic created when using the File New Schematic command in the menu come as an A4 landscape sheet with blank title block. Although the title block can be lled in using plain text strings, Altium Designer includes special strings to help automate and stream line the process. Special strings are strings which start with the = sign. To place a string, press P T, then press Tab while the command is active to open up a properties dialog for the string, shown gure 2.4. The properties box can also be opened for a pre existing string by double clicking on it. The Text elds drop down box can be used to select the special string that should be displayed.

12

Schematic capture

Figure 2.4: Text string properties dialog, listing special strings Special string values are set in the preferences tab in the document options dialog. This can be opened by right clicking the schematic, then selecting Options Document Parameters. . . from the context menu. The document parameters window, shown gure 2.5, shows all the current parameters that belong to the sheet. A special string with value that matches the parameter name, but preceded with an = sign, will display whatever that parameter is set to.

Figure 2.5: Schematic Preferences Custom parameters and special strings can also be added to a schematic sheet and can be used anywhere, not just the in the title block. If special strings do not update automatically, double check that the Convert Special Strings option is checked in the Graphical Editing part of the schematic preferences (Tools Schematic Preferences. . . ). The Document Number, Sheet Number, and Sheet Total parameters are not automatically set or updated. For a newly created sheet, these values will be left blank. To update or set these values, click Tools Number Schematic Sheets. . . to open the sheet numbering dialog. There are three buttons in the bottom left of the window that will update each of

2.2 Library System

13

the three respective elds for all schematic sheets in the project. The numbering order can also be changed by selecting a sheet, then using the Move Up and Move Down buttons.

2.1.4

Using Templates with Existing Title Blocks

It can be quite tedious to place individual strings into the title block manually. Instead a better approach is to start with a schematic template. Many templates are already available for a wide range of schematic shapes and sizes, and all include a title block pre-lled with special strings. All that remains is to ll out the details in the document parameters. Schematics can be created from templates using the Files panel, shown in gure 2.6. By default, the les panel appears on the left in the same panel group as the projects panel. Each section can be minimised by clicking the buttons. In the New from template section at the bottom is the option Schematic Templates. . . . Clicking this will display all the templates stored in the templates folder. Simply select the desired template, click open and a new schematic is created based on that template.

Figure 2.6: Files Panel, displaying the New from template options

2.2

Library System

Altium Designer stores all its of wide range of components in libraries. Specically, these are integrated libraries (.IntLib) containing the schematic symbol, spice simulation, signal integrity information, PCB footprint and 3D body (on selected components) for a given component. As of Altium Designer Summer 09, there are currently 95,315 components in 1,039 device libraries from 114 manufacturers [2] .

14

Schematic capture

2.2.1

Browsing & Adding Libraries

Finding components in a library is usually done when placing components into the schematic sheet. Pressing P P will open up the place part dialog window, as shown in gure 2.7. This can also be opened using the menu under Place Part, or by clicking on the icon in the wiring toolbar. This window shows the details of the selected component, including designator, comment and footprint. Clicking the button just to the right of the history button will open up the Browse Libraries window, shown in gure 2.8.

Figure 2.7: Place Part Dialog Window From the Browse Libraries window, currently installed/available libraries can be selected using the libraries drop down box at the top. Components in a selected library are displayed in the list on the left. The two boxes on the right side of the window display the schematic symbol and the PCB footprint (which can also be toggled to display the 3D body). The bottom left box displays the models & footprints associated with this component.

Figure 2.8: Browse Libraries Dialog Window Due to the sheer number of components and library les, only a small number of libraries are installed/available by default. It is also highly unlikely that a project would ever need to use every component available at the same time. The default libraries normally

2.2 Library System

15

include the Miscellaneous devices and connectors libraries, and a small selection of general FPGA libraries. Most generic and/or passive components like resistors, capacitors and inductors can be found in the Miscellaneous Devices library. Clicking the button at the top right of the browse library window will open the Available Libraries dialog window, displaying the list of the libraries currently available to the project. The Project tab on the left will display the list of libraries that belong to a given project. These libraries are only available to the current project, and will not be available to any other projects by default. Libraries that belong to a project will also appear in the projects panel, and can also be added from the projects panel. The Installed tab will display all the libraries currently installed and made available to the system, as shown in gure 2.9. I.e. Any project that is open will by default be able to access these libraries. To add libraries to the system, click the Install button at the bottom of the window, then select the libraries to add. Library les are sorted by manufacturer and can be found in the Library directory, in the Altium root directory (for example C:\Program Files\Altium Designer Summer 09\Library).

Figure 2.9: Available Libraries Dialog Window

2.2.2

Library Panel

The library panel also allows browsing of components and available libraries in a similar way to the Browse Library window (gure 2.8) discussed above. The library panel, shown in gure 2.10, is by default set as a pop out panel on the right. It can also be found using the panel controls under System Libraries, or simply by pressing K S L. The Libraries. . . button at the top of the panel will also open the Available Libraries dialog (gure 2.9).

2.2.3

Searching for a Component

Altium Designer includes a powerful search tool to assist in locating specic components. The Libraries Search. . . dialog window (gure 2.11) can be opened by clicking the Find. . . button in the top right corner of the Browse Libraries window (Subsection

16

Schematic capture

Figure 2.10: Library Panel 2.2.1), by clicking the Search. . . button at the top of the library panel, or by selecting Tools Find Component. . . in the menu.

Figure 2.11: Library Search

2.3 Component Placement

17

To search for a component, at least one row should be set in the Filters section, at the top of the window. The Scope should be set to search in components (default), and to search Libraries on path. This allows all libraries to be searched, rather than the libraries already installed/available. The path is by default set to search the library directory, under the Altium Designer root directory. This can be set to a specic manufacturers directory, or other location (which may also reduce the search time). Once all settings are entered, the Search button in the bottom right corner will begin the search. Note: Searching the entire collection of libraries may take a few minutes. If the search was started from the Place Part command, the result will appear in the browse library window. If the search was started from the library panel or the Find Component. . . command in the menu, then the search results will appear in the library panel. The advantage of the library panel is that it allows the user to keep working while it is searching, unlike the browse library window.

2.3
2.3.1

Component Placement
Placing Components

Section 2.2 explained how the library system works, and how to nd components. If a component has been found using the browse library window (gure 2.8), it can be placed simply by selecting it, clicking OK to close that window, then clicking OK in the place part window (gure 2.7). If the library the component belongs to has not been added to the project or system already, a prompt will appear asking if that library should be installed. Such a prompt is shown in gure 2.12. If the Designator was set before pressing OK in the place part window, every component placed will have an automatically incremented designator.

Figure 2.12: Prompt Conrming Library Installation If a component has been found using the library panel, it can be placed simply by selecting it, then clicking and dragging it onto the schematic sheet. At this point if the components library isnt already installed a prompt like in gure 2.12 will appear. When placing components, the component can be rotated by pressing the Space Bar, ipped vertically by pressing Y, or ipped horizontally by pressing X. Components can also be edited by double clicking on them or an associated designator/value, or by right clicking them and selecting Properties. . .

2.3.2

Annotation

Annotation is essentially the process of assigning designators to parts in a schematic. Although designators can be set using the place part command, this approach isnt rec-

18

Schematic capture

ommended. Instead, the all schematics can be automatically annotated using the annotate command. This command will assign designators to any components which have a ? in their designator. The annotate window, shown in gure 2.13, can be found under Tools Annotate Schematics. . .

Figure 2.13: Annotate Window The Order of Processing can be set in the top left corner of the annotate window. The bottom left section of the window displays which sheets will be processed. The list on the right displays all the components to be processed. Clicking Update Changes List will calculate the new designators. Designators that are already present can be removed/reset to the default designator by clicking the Reset All button. To apply these changes, click Accept Changes (Create ECO). This will create a formal Engineering Change Order (ECO) as shown in gure 2.14. An ECO is a formal part of the engineering design process, to help reduce design errors when large changes have to be made. As such, the ECO dialog offers the user the ability to verify the changes before applying them, apply the changes, and also create a report of the changes that can be printed later.

Figure 2.14: Engineering change order after changes have been applied

2.3.3

Editing Component Parameters

A components values, settings other parameters can be edited from the Component Properties window, shown in gure 2.15. This window can be opened by right clicking a component, then selecting Properties. . . in the context menu. Alternatively, component

2.3 Component Placement Symbol T G Meg K m mil u n p f SI Prex Tera Giga Mega Kilo Milli Micro Nano Pico Femto Scale Factor 1012 109 106 103 103 25.4 106 106 109 1012 1015

19

Table 2.1: Scaling factors used in Altium Designer

properties can be accessed using the SCH Inspector panel (SCH SCH Inspector in the panel controls, or simply press K C I). Every time a component (or any object for that matter) is selected in the schematic editor, its details will be displayed in the SCH Inspector panel. Values and parameters for a component can also be edited simply by double clicking them (e.g. to change the value of a resistor.)

Figure 2.15: Component Properties Component values (among other numerical values) can take numbers in the form of integers, oating point numbers e.g 13.37E2, or numbers that end with a scale factor (e.g. 100u). Scale factors are by far the most common form used in Altium Designer. Resistors generally do not have units at the end of a value. Capacitors use units of F and inductors use units of H. Both of these usually appear after the scale factor (e.g. 100pF or 10nH). Table 2.1 lists the scale factors used in Altium Designer. Parameters of multiple components can be changed using the Parameter Manager. This is found under Tools Parameter Manager. . . . A small window will appear asking what types of objects should have their parameters included in the list. After clicking OK, the

20

Schematic capture

parameter editor window will open showing a long list of objects and all their parameters. This command can be used to modify values for just about every type of object in the schematic, including the sheets themselves.

2.3.4

Linking Components to Suppliers

One of the newer features in Altium designer is the ability to link components directly to a supplier. This allows details such as price, description, product image, order number among others to be added to components in a design. Current suppliers include Farnell (Global, including Australia), Newark (US, part of Farnell) and Digikey (US with international shipping available). For Australian users, Farnell is the recommended supplier to use. Suppliers can be set in the System preferences, found under DXP Preferences. . . , then under System Suppliers in the preferences window (shown gure 2.16).

Figure 2.16: Supplier settings in the system preferences

Essentially, a supplier link consists of 2 parameters added to a component: Supplier, and Supplier Part Number (both numerical parameters). These parameters are created automatically when a component is linked to a supplier part. To add a supplier link to a component, rst open the Supplier Search panel (System Supplier Search in the panel controls, or simply press K S U). This panel, shown in gure 2.17, allows the user to search for a supplier, then displays the search results and component details. Select the desired part from the search results then drag it onto a component symbol in the schematic editor. A supplier part number should now appear at the top of the schematic symbol. To view a supplier link, right click the component symbol in the schematic editor, then in the context menu select Supplier Links. . .

2.4 Component Connections, Buses & Harnesses

21

Figure 2.17: Supplier Search Panel

2.4
2.4.1

Component Connections, Buses & Harnesses

Wires & Nets

The schematic editor offers a number of ways to connect components together. All types of connections can be accessed from the wiring toolbar (gure 2.3), or from the Place menu. The most common and basic is the wire. Wires simply create an electrical connection between two points. They can be placed by pressing P W in the schematic editor, by in the wiring toolbar. using the place menu, or by clicking A net represents an electrical network connection. Essentially it is a unique name/identier for an electrical connection or signal. Common nets include power connections like VCC and GND, but internally the schematic editor sees every connection as net. For example, placing a wire from the pin on one device to the pin on another will look like a wire graphically, but internally the schematic editor will list those two pins as being connected to the same net. If the wire has not already been named with a net label, it will be assigned a name/identier automatically, generally based on the device name/designator and pin number. This label wont be visible, but will be used internally by the editor to manage all connections. Wires can be named/labelled using a Net Label. Net labels can be placed by clicking , or pressing P N. A nets value can be changed before placing by pressing Tab to bring up the properties window. If a net name ends in a number, that number will be incremented automatically. The connection point (red cross at the bottom left) of the net label must contact the wire, as shown in gure 2.18. All net labels on a wire must be identical. Any wires in a sheet (and sometimes in a project, see section 2.5) that feature identical net names will be connected to each other. In this way connections can be made simply through the use of net names, rather than wires. Figure 2.19 shows a connection made with (a) wires, and (b) net labels. Negative signals can also be represented by placing a \after a character in the net name to place a bar over the top of that character. If the Single \ Negation option is enabled in the graphical editing section of the schematic preferences (Tools Schematic Preferences. . . ), then a bar will be placed over the top of the whole net name.

22

Schematic capture

Figure 2.18: Placing a net label

(a) Connection using Wires

(b) Connection using Net Labels

Figure 2.19: Connections using Wires or Nets

2.4.2

Power Ports

Power ports provide an easy way to connect parts to common power connections like VCC and GND. They are essentially a single pin component, and act in a similar fashion for VCC style connections, to a net label. Power ports can be added by clicking either or for GND style connections. Double clicking a power port will open a window showing its current properties (gure 2.20). Here the net name, colour and power port style can be changed (e.g. earth, GND, bar, circle etc). All power ports in a project are conencted. I.e. VCC in one sheet will be connected to VCC in another sheet (when both sheets belong to the same project).

Figure 2.20: Power Port Options

2.4.3

Buses

Buses represent groups of wires/signals. They are used to collect together common signals and connect them to a sheet entry or port (discussed in section 2.5). For example, this can make it easier to deal with data and address buses between digital devices. Buses

2.4 Component Connections, Buses & Harnesses can be placed in a similar fashion to wires by clicking .

23

Buses must contain a net name with the format: Name[8..0]. The numbers can be ascending or descending, representing how many wires are included and in what order. To connect wires to a bus, those wires must have a net name that matches the name of the bus name, but end in a number in the range specied by the bus. For example, if a bus is labelled Data[7..0], wires that are connected to it must be labelled Data7 through to Data0. Bus entries, placed by clicking , are used to represent a wire connecting to a bus. A bus entry simply places a small 45 degree angled wire that attaches to a bus. It is important to note that the connection is made using net names, not the bus entry by itself. In this way, the bus entry is an optional component; a wire may be placed directly onto the bus, often with a small 45 degree section when it reaches the bus. Any wire that connects to a bus must have a net label that corresponds to the bus net label (see above). Figure 2.21 shows how signals may be connected to a bus.

Figure 2.21: Connecting individual signals into a bus, using bus entries

2.4.4

Harnesses

A signal harness allows wires, buses and other signal harnesses to be grouped together. A signal harness has 4 parts: The signal harness itself, the harness connector, the harness entry, and a harness denition le. The rst three of these are shown in gure 2.22. To create a harness, rst a harness connector must be placed ( in the wiring toolbar). It essentially is just a giant } symbol, with the harness name at the top. Once the harness name has been set, the harness denition le will be generated automatically. Next, harness entries ( in the wiring toolbar) are placed into the open end of the connector. There must be one entry per wire or bus that is to be connected. They can only be placed inside a harness connector, and their name should be set to indicate what signal they carry (Note: Entries that connect to a bus must follow the bus net label conventions discussed in section 2.4.3). A signal harness ( in the wiring toolbar) can then be connected to the point at the middle of the brace in the harness connector. A complete example is shown in gureg:HarnessExample. The corresponding harness denition le for this entry contains: Ram8bit=DATA[0..7],RAMCS\,RAMOE\,RAMWE\. Once a harness type has been dened, it can be reused throughout the design. First place a signal harness, then right click it to open the context menu and select Signal Harness Actions then select a predened harness connector.

24
Harness Connector Signal Harness

Schematic capture

Harness Entries

Figure 2.22: Connecting wires and a bus to a signal harness

2.5
2.5.1

Multi Sheet Design

Flat and Hierarchical Design Structure

Its often impossible or highly impractical to try to squeeze an entire design into a single sheet. Most designs, apart from the smallest, will require the use of multiple schematic sheets. Altium Designer supports multi sheet design using two different structures: at, or hierarchical. A at design is simpler, and suited to smaller designs only. Essentially it is a collection of sheets, with connections between them made through the use of common net labels or ports. I.e. If a signal is to be connected from one sheet to another sheet, both sheets will need to contain the identically named net labels or ports connected to that signal. In larger projects where a signal may span many sheets, it can become quite difcult to follow that signal through the entire design. For this reason, when at design become larger it can result in poor readability. A hierarchical design uses sheet symbols to represent the design structure. These sheet symbols (typically green boxes) represent other schematic sheets that are lower down in the hierarchy. Connections between sheets are made using sheet entries inside the sheet symbol, which connect to ports with the same name in the sheet below (i.e. the schematic that is represented by the sheet symbol). Project les will also be sorted in the projects panel according to the design hierarchy. An example of a sub-sheet with matching sheet symbol (and matched sheet entries & ports) is shown in gure 2.23

(a) Sheet Symbol

(b) Sub-sheet

Figure 2.23: Sheet symbol and matching sub-sheet

2.5 Multi Sheet Design

25

2.5.2

Multi Sheet Connectivity

Net labels, power ports, sheet entries, ports and hidden pins are collectively known as Net Identiers. These objects specify which nets a signal is connected to, and are also used to dene how signals connect between multiple sheets. Its important to note that a connection is only made between net identiers of the same type with the same name. For example, two nets labels named data will be connected, but a port name data will not be connected to those net labels. Power ports with the same name are always connected between sheets in a project. Hidden pins appear in some components, and function just like power ports (always connected to nets with the same name, all throughout a project). Connectivity of net labels, ports and sheet entries depends on how the Net Identier Scope option is set for a given project. This setting can be found in the options tab, in the project options (Project Project Options. . . ), shown gure 2.24.

Figure 2.24: The net indentier scope to specify how multiple sheets in a project are connected By default, the net identier scope is set to automatic, but has four settings: Automatic: The net identier scope is set based on the project contents as follows: If a sheet entries are present, then the hierarchical setting is used. If there are ports present, but no sheet entries, then the at setting is used. If there are no sheet entries or ports, then the global setting is used. Flat: All ports with the same name in a project will be connected. Net labels remain local to a sheet and do not connect across sheets. Hierarchical: Connections between sheets are only made through a matching sheet entry and port. Ports without a matching sheet entry are not connected (even if an identical port is present elsewhere). Net labels remain local to a sheet and do not connect across sheets.

26

Schematic capture Global: All ports with the same name in a project will be connected. All net labels with the same name in a project will be connected. If a net label is connected to a port of differing name, then the net label name is used.

2.5.3

Connecting Sheets in a Hierarchical Design

Assembling sheets in a hierarchical design depends on whether the design follows a top down or bottom up approach. For a bottom up approach, the sub-sheet is rst created, and ports are added ( in the wiring toolbar). In the top sheet, select Design Create Sheet Symbol From Sheet or HDL, or right click the background of the top sheet, then in the context menu select Sheet Actions Create Sheet Symbol From Sheet or HDL. A window will then appear, listing other sheets in the project that can be placed. Select one, then click OK to place it. For a top down approach, the sheet symbol can be created rst. The sheet symbol can be placed by clicking , then sheet entries can be added to it by clicking . Once the sheet entries are named and the sheet symbol completed, the sub-sheet can be created. This can be done by selecting Design Create Sheet From Sheet Symbol, then clicking the sheet symbol with the cross hair. This can also be done by right clicking the sheet symbol to open the context menu, then selecting Sheet Actions Create Sheet From Sheet Symbol. A new schematic sheet will be created, which contains ports that match all of the sheet entries. Note: Sheets with no ports (or blank sheets) must still have a sheet symbol created if they are to be included in the design hierarchy

2.5.4

Synchronising Sheets in a Hierarchical Design

Throughout the design process it may be necessary to modify a sub-sheet. In particular, it may be necessary to add, modify or remove connections into a sub-sheet. Changes can easily be made either from the sheet symbol by modifying the sheet entries, or from the sub-sheet itself by modifying the ports. Once changes have been made to one, they must be applied to the other. This step is called synchronising sheets. Once changes have been made, locate the sheet symbol in the top sheet. Right click the sheet symbol, then in the context menu select Sheet Actions Synchronize Sheet Entries and Ports. A window will appear listing all differences between the sub sheet and sheet symbol (shown gure 2.25). The left column lists unmatched sheet entries, the middle column lists unmatched ports in the sub-sheet, and the right column lists matched sheet entries & ports. Unmatched sheet entries or ports can be individually added or removed using the Add and Delete buttons at the bottom. Ports in the sub-sheet can be replaced by sheet entry by selecting one unmatched sheet entry and unmatched port, then clicking . In a similiar way sheet entries in the sheet symbol can be replaced by ports by selecting one unmatched sheet entry and unmatched port, then clicking .

2.5 Multi Sheet Design

27

Figure 2.25: Synchronising sheet entries and ports

Chapter 3 Design Verication

3.1 Compiling Schematics and Projects

Once a schematic design is complete (or even when its part way through), it should be veried and checked for errors. Error checking is performed when a schematic or project is compiled. A project needs to be compiled before the design can be transferred to a PCB.

3.1.1

Setting Compiler Options

Compiler options are contained in the project options, which can be found under Project Project Options. . . . Figure 3.1 shows the Error Reporting options. These options specify how each type of design violation should be handled by the compiler, and what error to report for each. Each type of violation can be set to either No report, Warning, Error, and Fatal Error. The default settings are usually ne, but can be changed to suit the project if needed.

Figure 3.1: Error Reporting Options Figure 3.2 shows the Connection Matrix for a project. This tab denes how the electrical rules checking (ERC) is performed when compiling. All pins in Altium Designer have a

3.1 Compiling Schematics and Projects

29

Type property that indicates what type of signal or connection should be made to it. This type setting also changes the visual appearance of a pin (e.g. Bi-directional IO pins appear ). When compiling, the ERC goes through and checks that every pin connects to as other pins of compatible type. For example, an output pin can be connect to an input pin without an error, but connecting an output pin to a power pin will result in an error when compiling. Like the error reporting settings, the default connection matrix is usually ne, but can be modied to suit the project.

Figure 3.2: Connection Matrix displaying ERC Options ERC can be disabled for pin by placing a No ERC symbol ( in the wiring toolbar) on that pin. Any pin with this symbol connected to it will be ignored when ERC is performed during the compilation process. This allows ERC to be turned off for some pins, but still perform full ERC on other pins and not have to modify the connection matrix. Pin types can also be modied by opening a components properties (right click a component, then select Properties. . . in the context menu), then by clicking Edit Pins. . . in the bottom left corner. A window will appear listing all the pins and their type (among other details).

3.1.2

Compiling and Compiler Errors

A project can be compiled by selecting Tools Compile PCB Project [project name].prjpcb in the system menu. The compile process can also be started by right clicking the project in the projects panel, then selecting Compile PCB Project [project name].prjpcb at the top of the context menu. Individual sheets can also be compiled using these two methods. Output warnings and errors from the compiler appear in the Messages panel, by default at the bottom of the workspace (shown gure 3.3). This panel will pop up automatically if a compile error occurs. It can also be opened with the panel controls under System Messages. Double clicking an error will display the Compile Errors panel, and also highlight the error in the schematic (all unrelated objects become greyed out). To remove the highlighting, click the Clear button in the bottom right corner of the schematic editor. The messages panel can be cleared by right clicking and selecting Clear All. Compiling again after the errors have been xed will remove them from the messages panel automatically

30

Design Verication

Figure 3.3: Messages panel, displaying compiler output

3.2

Simulation

Altium Designer includes a mixed analogue/digital circuit simulator, built on an enhanced version of XSpice (which is based on SPICE3f5). The simulator supports XSpice models, PSpice models, SPICE3f5 models and Digital SimCodeTM models.

3.2.1

Simulation Models for Components

A spice type simulation model is a text le with data specifying how the component should behave when simulated. Many components come with models, but not all. When placing components, models associated with a component will be listed in both the Browse Libraries dialog (in the bottom left), and in the Libraries panel (just below the schematic symbol). Component models and settings can also be viewed using the component properties window (Properties. . . in the context menu), by selecting a model listed in the bottom right corner and clicking Edit. . . . The Sim model window will then open (gure 3.4) displaying all model related settings. Specifying model parameters here isnt generally needed, and for components with values (e.g. resistors and capacitors) the model will normally use the components value parameter for simulation.

Figure 3.4: Sim model window

3.2.2

Simulation Sources and Objects

To simulate a design, it requires some kind of input stimulus. In most cases, a design will require both a simulated voltage/power source, and a simulated input signal. The easiest

3.2 Simulation

31

way to place a simulation source is from the utilities toolbar, as shown gure 3.5. The toolbar only has a small number of commonly used sources. More simulation components can be found in libraries located in the Simulation folder, in the Libraries folder. As of the Summer 09 release, there are ve simulation libraries, containing maths functions, Pspice functions, sources, special functions, and transmission lines respectively. Simulation functions are components that perform a mathematical or other function on a signal, but do not represent a physical component (i.e. will not contain a PCB foot print).

Figure 3.5: Common simulation sources from the utilities toolbar A design will also need one or more net labels specifying which signals to measure, and will need a point of reference to measure against. Usually a power port or ground symbol is used as the reference point.

3.2.3

Simulation Settings

Simulation settings can be found under Design Simulate Mixed Sim, or by clicking in the Mixed Sim toolbar (View Toolbars Mixed Sim). The General Setup options, as shown in gure 3.6, displays all the signals (net labels and device pins) in a circuit. To include a signal in the simulation it must be moved to the Active Signals column on the right. When a simulation is run many times, old settings may be used to display simulation data when SimView Setup is set to keep last setup. Setting this to Show active signals ensures that the new settings are used in the enxt simulation.

Figure 3.6: General Simulation Settings

32

Design Verication

The left column lists all the different types of analysis to perform. Selecting an entry on the left will bring up its respective settings. Transient (time domain response) and AC small signal (frequency domain response) are two of the more common types of analysis that can be performed. Transient analysis can be set up in two ways. Use Transient Defaults can be checked, then only the Default Cycles Displayed and Default Points per Cycle settings need to be entered. More points per cycle will result in smoother, more accurate data at the expensive of simulation time. If Use Transient Defaults is not checked, then the rst ve settings at the top are used. The start and stop time are fairly self explanatory. The Transient Step Time sets how much time is between each data point. The simulator varies this time automatically to reach convergence and desired accuracy. The Transient Max Step Time limits how much the step time can vary. Use Initial Conditions will simulate the conditions found at circuit startup (i.e. when the circuit has powered applied). Transient settings are shown in gure 3.7.

Figure 3.7: Transient simulation settings AC small signal analysis is quite strait forward to setup. This analysis records the circuit response over a range of frequencies, from the Start Frequency to the Stop Frequency. Sweep type species how the frequency should be increased from the start to stop frequency. Decade is by far the most common (logarithmic scale on the x axis), but linear and octave (scale were the frequency keeps doubling) can also be selected. Test Points sets how many data points will exist between each decade, octave or the entire range (linear sweep) depending on the sweep type. Total data points are displayed at the bottom. As before, more data points results in a smoother and more precise simulation, but at the expense of processing time.

3.2.4

Running and Viewing Simulation Data

The simulation will be started by either clicking from the mixed sim toolbar, or simply pressing OK in the setup window (if it was opened from the menu). The Simulation will

3.2 Simulation

33

Figure 3.8: AC simulation settings then start, and results be displayed as a new simulation document, with extension .sdf. The bottom left corner of the SimView window will contain a tab representing each of the enabled analyses. Wave forms can be zoomed in on by clicking and dragging out a box over an area. The view can be reset to the whole wave by right clicking and selecting Fit Document in the context menu. The Sim Data panel can be opened to display additional information about a wave. This panel can be found by clicking Sim Data in the panel controls in the bottom right corner of the screen, or by pressing K E S. Cursors can be added to a waveform to trace and highlight certain values. First select a waveform by clicking its name (in top right corner). A selected waveform should then become bold with a dot in front of its name, while all other waveforms become greyed out. A cursor can be added by right clicking the waveform name and selecting Cursor A or Cursor B. Alternatively cursors can be enabled from the Wave menu, by selecting Cursor A or Cursor B. A cursor can be move along the waveform by clicking and dragging it by the label at the top. Clicking the label on a cursor will select it (it becomes bold), then the SimView cursor toolbar commands become available as shown in gure 3.9. These commands will automatically select the minimum and maximum of a waveform, move to the next left or right peak, or move to the next left or right trough respectively.

Figure 3.9: SimView toolbar for automatically positioning cursors when selected

3.2.5

Creating a Bode Plot

A Bode plot consists of a magnitude plot in dB (logarithmic y scale) and a phase plot (linear degrees or radians on the y scale) both against a logarithmic frequency scale. First the AC small signal analysis should be enabled and sweep type set to Decade. Once the simulation is complete and output displayed, the waves need to be edited. Double clicking a wave name (in the top right corner of a chart) will open the Edit Waveform window,

34

Design Verication

shown gure 3.10. All that is needed is to have the desired signal set in the Expression eld, and select Magnitude (dB) in the Complex Plots section on the right. This will create a magnitude plot in dB of that signal. Similarly to create a phase plot, Phase (Deg) would be selected in the Complex Plots section.

Figure 3.10: Edit waveform window

Extra charts can be added by right clicking and selecting Add Plot. . . This will start the plot wizard collection details on how the plot should look and what data it should contain. Extra waves can be added to a plot be selecting Add Wave To Plot. . . The edit waveform window will appear, allowing a new waveform to be specied. An example circuit is shown in gure 3.11, and its corresponding Bode plot in gure 3.12.

Figure 3.11: Example of an active lter to be simulated

3.3 Signal Integrity

10.00 0.000 -10.00 -20.00 (dB) -30.00 -40.00 -50.00 -60.00 -70.00 100.0 Cursor B = (20.230k, -3.0704 V) Phase 25.00 0.000 -25.00 -50.00 -75.00 (Deg) -100.0 -125.0 -150.0 -175.0 -200.0 -225.0 100.0 Cursor A = (20.016k, -90.368 V) PHASE(out) dB(out)

35

1.000k

10.00k Frequency (Hz)

100.0k

1.000M

1.000k

10.00k Frequency (Hz)

100.0k

1.000M

Figure 3.12: Bode plot of the active lter from gure 3.11

3.3

Signal Integrity

Section 3.2 discussed circuit simulation, which simulates how a circuit will function. Signal integrity looks at the quality of a signal between components. A test signal (stimulus) is automatically applied to IC/active component pins, and its resulting waveform is analysed using transmission line calculations and pin/IO models. Signal integrity can be performed from pre-layout (schematic editor) or from post-layout (PCB editor). Both are performed in a very similar way. This analysis is done on a net by net basis, hence can be performed on partially completed circuits/PCB layouts. Note: Signal integrity is necessary for high speed designs. This section only provides an introduction to performing signal integrity analysis, but does not explain the underlying concepts involved. It is recommended the reader have a basic understanding of transmission line theory and impedance matching (both covered in introductory RF engineering courses and texts). This section describes signal integrity predominantly from the schematic editor, although signal integrity from the PCB editor is performed much the same way (discussed in section 4.7).

3.3.1

Before Starting Signal Integrity

To analyse the signal integrity of a net, it should at least be connected to one IC/Active component that can act as a driver/signal source. Nets containing just passive components (e.g. resistors, capacitors and inductors) cannot be analysed. The design should contain supply nets (e.g. VCC and GND). Design rules may also be present, but can be added later on. The source les should also be part of a project (not free documents). If performing Signal integrity from a PCB, the PCB layer stack should be set up (4.2.3). Components should have a signal integrity model associated with them, but is not often the case with a lot of active components (there are far less components with signal integrity models than there with simulation models). Luckily there is a strait forward and semi automated process of assigning models when starting a signal integrity analysis.

36

Design Verication

3.3.2

Starting Signal Integrity for the First Time

Signal integrity can be started by selecting Tools Signal Integrity. . . in the system menu. In most cases not all components will have models assigned to them. In this case, a dialog box will open with that message, as shown in gure 3.13. Clicking Model Assignments. . . will open up the model assignment window. This windows lists all the components in the design that do not have a signal integrity model. Instead, Altium Design will try to guess an appropriate type of model to use, and also list its condence in that model being suitable (in the status column).

Figure 3.13: Dialog box warning that not every component has a model The left most column (Type) species the type of component, which can be set to: IC, resistor, capacitor, inductor, diode, connector or BJT. The third column (Value/Type) will set either the component value (if applicable), or the pin/IO type for an IC. Click the check box on the right to select which components to update, then click Update Models in Schematic to apply those new models. Clicking Analyze Design. . . will then open the signal integrity panel.

Figure 3.14: Model assignment window

3.3.3

Signal Integrity Panel

The signal integrity panel (shown gure 3.15) lists all the nets in a design on the left, performs a very quick analysis of each one and lists each net as either passing or failing the design rules. Nets that pass are shown as green, nets that fail are shown as red, and nets that havent been analysed are yellow (Note: power nets cannot be analysed). The columns list different characteristics of that net, such as impedance, overshoot, base and top values and signal length. Additional columns can be added or removed by selecting

3.3 Signal Integrity

37

Show/Hide Columns in the context menu (when right clicking the left side of the panel).

Figure 3.15: Signal integrity panel The arrow buttons in between the left and right sections of the panel allow single (or all of) the nets to be added/removed from the analysis list in the top right corner. All nets in this list will be simulated in the waveform editor. The bottom right corner of the panel contains a utility to test different types of terminations before they are added. This will add many waves onto a plot, each for different component values of the termination. Clicking the Reection Waveforms. . . button will start the simulation, with the results displayed in the wave form editor, which functions the same as for circuit simulation. There will normally be two plots displayed for each net; one at each end of the net (at each device pin).

3.3.4

Signal Integrity Settings and Stimulus

Preferences can be opened by selecting Preferences. . . from either the Menu button at the bottom left or from the context menu. Here the units can be selected (metric or imperial) among other things. The Display FFT Charts option will also generate an FFT of the signal when it is simulated (this can also be done in the waveform editor by selecting Chart Create FFT Chart in the system menu). Selecting Setup Options. . . in the panel menu will display a set of simple options and stimulus settings (shown gure 3.16). The Track Setup tab will allow average track length and impedance (for all nets) that have not been routed in the PCB design. The Supply Nets tab allows a simple way to specify supply nets like GND and VCC (by checking the Supply check box and setting the value). More advanced rules can be set in the schematic parameters, in which case the Use rules dened in Schematics/PCB box would be checked. The Stimulus tab provides a simple pulse style stimulus for simulation, the control of the start, stop and period times (for periodic pulses). Once again, more advanced rules can be set in the document parameters, or added to individual pins.

3.3.5

Setting Design Rules

The goal of signal integrity is to verify that a signal is within a certain specication. To do this, design rules need to be added to a signal. This is done from the schematic editor,

38

Design Verication

Figure 3.16: Setup options for stimulus (in this case a 20MHz square wave) by selecting Place Directives. . . then selecting the desired type of directive from the system menu. Most directives function in the same way, but have different initial settings/parameters to suit their purpose. To specify rules or conditions for a signal, start by placing a PCB rule onto the desired net (Place Directives. . . PCB Layout). Next double click on the newly placed PCB rule (or select Properties. . . from the context menu) to open the properties window, shown in gure 3.17. This window shows a list of parameters. Design rules specically appear as a parameter with the name Rule. There is one undened rule in the list by default. This rule can be set by clicking Edit. . . then Edit Rule Values. . . in the parameter properties dialog. A window listing all design rule types will then appear (shown gure 3.18).

Figure 3.17: Properties window for a PCB layout directive, listing all contained rules Select the rule type, then click OK. A dialog box will then appear asking what values should be set for this rule (e.g. for an impedance constraint, it will ask for minimum and maximum impedances). Click OK to set these values, then OK to close the parameters

3.3 Signal Integrity

39

Figure 3.18: List of design rule types, including specic signal integrity rules properties dialog. Additional design rules can be added to a directive by clicking Add as Rule. . .

3.3.6

Simple Signal Integrity Example

Figure 3.19 shows a simple example of a circuit where data is to be sent between two micro controllers at a rate of 20MHz. The Data net has one PCB layout directive that holds three design rule parameters (Impedance, top and base signal levels). Each MCU has an IC model set to CMOS. A 20MHz, 50% duty cycle periodic stimulus is set in the Setup Options (see gure 3.16 for settings). A 50 track impedance, with an arbitrary length of 100mm is used. The signal integrity panel (shown in gure 3.15 for this example) shows that the Data net has passed, being within the specications. The simulated waveform for the signal is shown in gure 3.20. In reality, this design is not fast enough to warrant the signal integrity analysis. It is not affected by the lack of impedance matching, and functions the same way for a line of varying impedance. High speed (high frequency) designs will require matched components, matched characteristic line impedances, and may need terminations to match a device port to the line. Keep in mind that device outputs generally have a low impedance, and device inputs generally have a high impedance. Signal integrity (if correctly set up) can be helpful to simulate how the design will behave at high speed. High speed designs will generally require impedance matched tracks, which are discussed in section 4.6.4. Signal integrity should also be performed when during the PCB design process

40 (discussed in section 4.7).

U1 1 2 3 4 5 6 7 8 14 15 16 17 18 19 20 21 9 12 13 PB0 (XCK/T0) PB1 (T1) PB2 (AIN0/INT2) PB3 (AIN1/OC0) PB4 (SS) PB5 (MOSI) PB6 (MISO) PB7 (SCK) PD0 (RXD) PD1 (TXD) PD2 (INT0) PD3 (INT1) PD4 (OC1B) PD5 (OC1A) PD6 (ICP) PD7 (OC2) RESET XTAL2 XTAL1 PA0 (ADC0) PA1 (ADC1) PA2 (ADC2) PA3 (ADC3) PA4 (ADC4) PA5 (ADC5) PA6 (ADC6) PA7 (ADC7) PC0 (SCL) PC1 (SDA) PC2 (TCK) PC3 (TMS) PC4 (TDO) PC5 (TDI) PC6 (TOSC1) PC7 (TOSC2) VCC AVCC AREF GND GND 40 39 38 37 36 35 34 33 22 23 24 25 26 27 28 29 10 30 32 31 11

Design Verication

U2 14 15 16 17 18 19 9 10 Data Impedance Constraint [Min = 45.00 Signal Top Value [Min = 4.000] Signal Base Value [Max = 1.000] VCC Max = 55.00] 2 3 4 5 6 11 12 13 PB0 (ICP) PB1 (OC1A) PB2 (SS/OC1B) PB3 (MOSI/OC2) PB4 (MISO) PB5 (SCK) PB6 (XTAL1/TOSC1) PB7 (XTAL2/TOSC2) PD0 (RXD) PD1 (TXD) PD2 (INT0) PD3 (INT1) PD4 (XCK/T0) PD5 (T1) PD6 (AIN0) PD7 (AIN1) ATmega8-16PC PC0 (ADC0) PC1 (ADC1) PC2 (ADC2) PC3 (ADC3) PC4 (ADC4/SDA) PC5 (ADC5/SCL) PC6 (RESET) VCC AVCC AREF GND GND 23 24 25 26 27 28 1 7 20 21 22 8

VCC

GND GND

ATmega32L-8PC

Figure 3.19: Example circuit with impedance and voltage level constraints
U1-28 on Net DATA 5.000 DATA_U1.28_NoTerm

4.000

3.000

(V)

2.000

1.000

0.000

-1.000 0.000n

10.00n

20.00n

30.00n

40.00n

50.00n Time (s) U2-2 on Net DATA

60.00n

70.00n

80.00n

90.00n

100.00n

5.000

DATA_U2.2_NoTerm

4.000

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(V)

2.000

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0.000

-1.000 0.000n

10.00n

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60.00n

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Figure 3.20: Simulated waveform displaying the signal at each pin on the net

Chapter 4 PCB Design

PCB Design or Layout is the process of taking a design (generally from a schematic), and laying it out onto a printed circuit board. This involves setting the shape of a board, dening rules or parameters, moving component footprints into position and routing tracks/connections between components. The rst step in designing a circuit board is to have the design entered into a schematic, or supplied as a netlist. A netlist is a common type of le used by many EDA tools to summarise the information in a schematic by listing components, and which pins connect to which nets. Although Altium Designer supports the use of many types of netlists, it features a more advanced internal system called the synchroniser. As its name suggests, the synchroniser compares differences between a schematic and PCB design (both created in Altium Designer), and produces an engineering change order (ECO) to update any changes between the two. This method is used for the remainder of this chapter.

4.1

Creating a PCB

There are a number of ways to create a new PCB. A blank PCB can be created (File New PCB), then its board shape redened manually (Design Board Shape Redene Board Shape). This is a somewhat complex process, and is not very intuitive. A PCB can be created from a template by selecting PCB Template. . . in the Files panel under New From Template. By far the easiest way to create a PCB is using the PCB wizard (PCB Board Wizard. . . in the Files panel under New From Template, shown in gure 4.1). This is the method used for the remainder of this section. The PCB Board wizard collects all the basic information needed to create a PCB. It will rst ask what units should be used (metric or imperial), then will offer a selection of board templates. To create a custom shape, select [Custom] and click Next. The next page in the wizard (Choose Board Details, shown in gure 4.2) is used to specify the board shape, Keep Out distance and settings for dimensions. Keep Outs are lines or shapes placed into the Keep Out layer (purple by default) that restrict components or tracks from being placed in those areas. All boards generally have a keep out border close to the board edge to stop objects being placed on the board edge. Layers are discussed in more detail in section 4.2.2 Apart from the Outline Shape settings, the default settings are generally ne. If a rectan-

42

PCB Design

Figure 4.1: Files Panel, displaying the New from template options gular shape has been selected and Corner CutOff and/or Inner CutOff have been selected, the next page or two (Choose Board Corner Cuts and Choose Board Inner Cuts) will allow simple corner cutouts and board cutouts to be added.

Figure 4.2: Specifying board shape in the PCB wizard The Choose Board Layers page denes how many copper layers the PCB will have. Note: A PCB design must have at least two signal layers. To create a single or two sided PCB, set the Signal Layers to 2, and the Power Planes to 0. The next two pages will ask about vias, component placement and routing. Vias are used to connect signals between layers. They are similar to a pad (what a component pin connects to). The user should check what type of vias are supported by the board manufacturing process. If unsure, Thruhole should be selected (the easier/more common type). The last page (Choose Default Track and Via Sizes, shown gure 4.3) asks for some basic information on how small the PCB

4.2 PCB Setup

43

layout can be. Once again, check with the PCB manufacturer for their supported sizes and tolerances. Once the wizard is completed, the new PCB will appear as a free document.

Figure 4.3: Specifying minimum sizes in the PCB wizard

4.2
4.2.1

PCB Setup
Board Options and Grids

The board options for a PCB can be found under Design Board Options. . . and are shown in gure 4.4. It can also be accessed by pressing O B (O opens a pop up menu listing common PCB commands) Here the units and grids for a board can be set. There are 4 types of grids: The Snap Grid is used for moving or placing objects. It causes the mouse to snap to the nearest grid point. The Component Grid functions the same as the snap grid, but is only active when placing components. The Electrical Grid overrides the snap grid when the cursor is within a certain range. I.e. if the cursor is close enough to an electrical object, it will snap to that objects center (e.g. a pad). When the electrical grid overrides the snap grid, a small octagon/circle will appear in the centre of the cross hair. The Visible Grid displays either dots or lines in the PCB editor. There are two independent visible grids available.

4.2.2

PCB Layers

A PCB design consists of many different layers, including signal layers, mechanical layers, mask, silkscreen and other layers. Any command used in the PCB editor will apply/be

44

PCB Design

Figure 4.4: PCB Board options performed on the currently selected layer (selected using the tabs along the bottom of the PCB editor, as seen in gure 4.5). These can be congured in the View Congurations window (shown in gure 4.6), which can be found under Design Board Layers & Colors. . . , by pressing L or by clicking the box to the left of the layer tabs.

Figure 4.5: Layers at the bottom of the PCB editor. The selected layer colour appears in the box to the left of the layer tabs. Signal and internal plane layers represent physical copper layers in the PCB (set using the

4.2 PCB Setup

45

layer stack manager, discussed in section 4.2.3 ). Mask layer hold information about the solder and paste masks for the PCB. Silk screen layers represent what will be silk screened onto the board (e.g. component outline and designators). The other layers contain drill and keep out information. Mechanical layers can be used to hold dimensions or anything else that isnt covered by the other layers. There are up to 32 mechanical layers that can be used in a design. These layers do not have a specic purpose and can be used for anything.

Figure 4.6: PCB Board options

4.2.3

Layer Stack Manager

The Layer Stack Manager (shown in gure 4.7) is used to congure the signal and internal plane layers of a PCB. This window can be found under Design Layer Stack Manager. . . or by pressing O K. This window displays a graphical representation of the physical construction of the PCB. Layers can be added by rst selecting one of the existing layers in the diagram, then clicking Add Layer. As layers are added, the stack manager automatically inserts insulation in between the copper layers. The way in which this is performed can be set in the drop down box in the top left corner. Each of the layers (including core/insulation) have properties that can be set using the Properties. . . button. The name and thickness can be set for each signal layer, and each core/insulation layer can have its material, thickness and dielectric constant specied as well. These values are later used for impedance calculations and signal integrity analysis. The way impedance is calculated can be redened by clicking Impedance Calculation. . . By default, formulas are included for microstrip and stripline. Note: For high speed designs where tracks of specic characteristic impedance are needed, it is essential that the stack manager be set up properly. Once again, check with the board manufacturer for PCB specications. Power plane layers can be added by clicking Add Plane. A Plane can only exist in a board that has 3 or more layers. I.e. A board cannot consist of a single plane or a plane

46

PCB Design

Figure 4.7: Layer Stack Manger, where physical properties of the board can be entered and signal layer (there must always be a top and bottom signal layer). Planes normally have a net assigned to them (usually a power net), and work in a negative (subtractive) fashion to signal layers: Planes are full of copper, but adding objects (lines/shapes) will remove part of that plane. When placing a pad or a via, the space around the pad/via is removed from the plane automatically. In the case when the pad or via is on the same net as the plane (e.g. GND net), the connection to the plane is made automatically.

4.2.4

Design Rules

Design rules specify all the requirements of a design. Each rule has a set scope, determining which objects it applies to. Rule can be set up to apply to all object, certain nets or pads etc. The Board wizard (introduced in section 4.1) gathers a small number of essential rules like clearance constraints. Design rules can be accessed under Design Rules. . . in the system menu. This will open the PCB Rules and Constraints Editor, shown in gure 4.8. In this window, all design rules can be viewed and edited, and new rules added. The easiest/most intuitive way to add rules is using the rules wizard (Rule Wizard. . . ). This wizard asks what type of rule should be set, what it should apply to, and what its priority should be (in relation to other rules). Rules can be added at any time (not necessarily at the start of a PCB design). Rules can also be added from the schematic editor, as covered in section 3.3.5. Design rules are checked in two ways: Online checking and Batch checking. Online checking is performed in real time (as the user works), providing the Online DRC box is enabled in the General section of the PCB editor preferences (Tools Preferences. . . ) Any design rule violations will show up bright green (shown in gure 4.9). Batch DRC is performed by clicking Tools Design Rule Check. . . This will open up the design rule check dialog (shown in gure 4.10), where report settings and rules to check can be selected. Clicking Run Design Rule Check. . . will produce the DRC report in html format. Each link will highlight the specic violation.

4.3 Transferring a Schematic Design to a PCB

47

Figure 4.8: PCB rules and constraints editor

Figure 4.9: Design violation from a string interfering with pads and tracks The PCB Rules And Violations panel also provides a powerful method of navigating through violations. It can be opened using the panel controls under PCB PCB Rules And Violations or by pressing K P V. The Top of the panel lists types of rules, the middle of the panel lists all rules of a given type that are present, and the bottom of the panel lists all violations of that rule type. Setting the top panel to [All Rules] will list all rules and violations. Selecting a specic violation will highlight it in the PCB editor.

4.3

Transferring a Schematic Design to a PCB

Once a blank PCB has been created and added to the project (e.g. dragging it into the project in the project panel), the schematic design can be transferred to it. This can be done either from the schematic or PCB editor. In the PCB editor, click Design Import Changes From [project name].PrjPCB. In the schematic editor, click Design Udate PCB Document [PCB name].PcbDoc. This will invoke the synchroniser and produce an engineering change order listing what changes will be made to the PCB. Executing the changes and closing the window will update the PCB design. Component foot prints will now apear on the side of the board. The designed can be synchronised in the same way at any time, allowing changes to be applied in either direction (PCB Schematic or

48

PCB Design

Figure 4.10: Design Rule Checker dialog

Schematic PCB).

4.4

Rooms and Component Placement

Rooms are are areas that contain certain components. More specically, they are a rule which denes what components can be inside and what components cannot be inside. Being a rule, they can be created like other design rules, and also be used as the scope of other design rules (see section 4.2.4). When transferring a design from schematic to PCB, a room is created for each sheet in the project. All components within a sheet are placed in the corresponding room. A room (and all contained components) can be moved by clicking and dragging the room. Room shape can be manipulated by right clicking the room, and selecting Room Actions in the context menu. This menu contains useful command to split the room, and wrap it around the components it contains. Components can also be arranged in a room automatically by selecting Arrange Components Within Room in the utility toolbar (shown gure 4.11). Components can be moved simply by clicking and dragging. In a similar fashion to the schematic editor, components (and in fact any object) can be rotated by pressing the Space Bar, ipped vertically by pressing Y, or ipped horizontally by pressing X when being moved. Selected objects can be aligned automatically using the commands in the alignment toolbar. When copying objects (selecting it then pressing CTRL + C), a cross hair will appear. This allows a reference point on that object to be set. When pasting (CTRL + V), the object will appear with its reference point aligned to the mouse cursor.

4.5 Holes and Board Cutouts

49

Figure 4.11: Arrangement commands in the utilities toolbar

4.5

Holes and Board Cutouts

Board cutouts dene sections of the board that should be removed during manufacture. To dene a board cutout select Design Board Shape Dene Board Cutout. This command allows a polygon area to be dened by clicking to add each point. Pressing the Escape key will complete the command, creating a polygon that represents the cutout. This cutout can be moved by clicking and dragging, and can also be reshaped by selecting it and dragging the handles (shown in gure ??). Each point will have a handle that moves that point. In the middle of each line that connects points will be another handle that can be moved to create another point.

Figure 4.12: Placing a board cutout There is no drill or hole command in the PCB editor to place holes. Instead, holes can be created by placing pads. This is done by selecting Place Pad or clicking the button in the wiring toolbar. Once a pad has been placed, double click it to open the pad properties dialog (shown in gure 4.13). Here the hole size and shape can be set in the Hole Information section, and the pad size and shape can be set in the Size and Shape section. A net can also be assigned to the pad in the Properties section.

4.6
4.6.1

Routing
Routing Tracks

Routing tracks is one of the largest tasks in the PCB design process. It is by its nature a very iterative process, but the basics are quite simple. After the board has been set up (section 4.2) and components placed, routing can begin. Figure 4.14 shows an example

50

PCB Design

Figure 4.13: Pad properties dialog of an unrouted board. Note the grey lines that represent unrouted net connections.

Figure 4.14: Example of an unrouted board, with grey lines representing unrouted net connections. The black section is the PCB, the dark red rectangle is a room. First a signal layer needs to be selected (e.g. top or bottom layer). This is done using the layer tabs at the bottom of the PCB editor. Next, select Place Interactive Routing, click in the wiring toolbar, or press P T to start the interactive routing command. To place a track, click on a pad or the grey line to start routing that net. The interactive

4.6 Routing

51

routing command uses the design rules for width and clearance as a net is routed. Tracks will automatically avoid being placed too close to other tracks. Figure 4.15 shows what routing looks like when underway. The solid section at the top represents a section of track that has already been placed. The greyed out track on the 45o angle represents the section that will be placed next when the mouse is clicked. Holding CTRL and clicking will complete/auto-route the rest of that net connection. Pressing the Escape key will nish the command.

Figure 4.15: Placing a track. The Solid section in the top right Once tracks have been placed, segments can be moved/dragged while still staying connected. This is done by selecting the segment (shown in gure 4.16), then clicking and dragging the segment. This will pull all other connected segments as well. Clicking and dragging the handle in the middle of the track will create more sections in the track. Tracks can be removed, or unrouted, using the unroute commands located under Tools Un-Route. All will remove all tracks from the board. The remaining commands will display a cross hair requiring a track, component or room to be selected. Net will remove all tracks that belong to a net. Connection will remove the selected track (between pads), but not the whole net. Component and Room will remove all tracks that are are connected to a component or belong to a room respectively.

Figure 4.16: A selected track segment, that can then be dragged to move it

4.6.2

Placing Vias

Vias are objects that are used to form a connection between layers on a PCB. They are similar in appearance and function to component pads. Vias can be placed by selecting

52

PCB Design

Place Via or clicking the button in the wiring toolbar. A via can be either placed onto an existing track, being automatically connected to that net, or can be freely placed on the PCB with no net connection. Double clicking the via will open its properties dialog, shown in gure 4.17. Unlike pads, vias must be circular. A net can be assigned to a via under the Properties section of the window.

Figure 4.17: Via properties dialog

4.6.3

Polygon Pours

A Polygon pour creates a solid region of copper on a board. Unlike the Fill command, a polygon pour will create copper only in blank/empty parts of the board, avoiding tracks by the minimum clearance width (set in the design rules). Blank PCBs generally start as with complete layer of copper that is then removed to create the required design. It is recommended that a polygon pour be placed once routing has nished to use up all blank sections of the board. The end result is that less copper has to be removed during manufacture, and hence, manufacturing may be faster and/or cheaper. To place a polygon pour, select Place Polygon Pour. . . or click in the wiring toolbar. The polygon pour window will now appear, displaying the associated options (shown in gure 4.18). Net Options allows a net to be assigned to the polygon, and species if a polygon is to be poured over tracks or polygons of the same nets, if at all. Clicking OK will start the command. This command allows points of the polygon to be placed in similar way to those of a board cutout. Pressing the Escape key will complete the command, creating a polygon pour.

4.6 Routing

53

Figure 4.18: Polygon Pour dialog

4.6.4

Impedance Controlled Routing (Microstrip)

Placing tracks with a specied impedance is known as impedance controlled routing. It functions in exactly the same way as normal routing, except the track width is automatically calculated for each layer of the PCB to give the desired impedance. Altium Designer supports two methods of placing impedance controlled tracks (transmission lines): microstrip and stripline. This section will discuss the simpler microstrip line on a two layer, 1.5mm FR4 board. To enable impedance controlled routing, the following is needed: The layer stack manager must be set up correctly to represent the physical properties of the board. There must be a plane layer (typically tied to GND) present in the layer stack manager. There must be at least one Routing Width rule present that has the Characteristic Impedance Driven Width option enabled. Note that one of Altium Designers limitations is that it must have at least three layers in the PCB if one of them is to be a power plane. For a two layer board there are two options: create a three layer board and either throw the bottom layer away, or throw the internal plane away when fabricating the board. The PCB stack should be set up as a three layer board, with 1.5mm FR4 between each board (giving a total thickness of 3mm). Figure 4.19 shows an example of the stack manager with these settings. Note that both the core and prepreg are set to FR4 material by default. More information on the layer stack manager can be found in section 4.2.3. If the internal plane is to be used, one of the outer layers will be thrown away, leaving a 1.5mm board (e.g. just the top layer and internal plane). If the internal plane is thrown

54

PCB Design

Figure 4.19: Layer Stack Manger with settings to allow impedance controlled routing on a two layer 1.5mm board away, a polygon pour that is tied to ground (or VCC) will be needed under the impedance controlled tracks to emulate the power plane. This method uses the 1.5mm thickness between the outer layers and internal plane layer for impedance calculations, while the nal board will have 1.5mm between the top and bottom layers. I.e each layer will see what looks to be a power plane 1.5mm below it (in reality its just polygon from the other side). This allows microstrip lines (or other tracks) to be placed on both sides (providing their is a polygon pour on the opposite side of the line). Once the layer stack manager is set up correctly, there must be a Routing Width rule set (see section 4.2.4 for more information on design rules). Rules can be viewed by opening the PCB rules and constraints editor ( under Design Rules. . . in the system menu). There will always be one default rule for routing width. Using this rule will force all tracks to have the same impedance (existing tracks will cause a design error if their width is different). This isnt desirable in most cases. Instead, individual rules can be added for individual/selected nets using the rules wizard. To set the impedance, enable the Characteristic Impedance Driven Width option, then ll in the minimum, maximum and preferred impedances in the Constraints section. After clicking apply, the widths at the bottom of the editor should now be updated. Figure 4.20 shows a 75 setting and its widths based on the PCB layer stack shown in gure 4.19. Note: Altium Designer will try to place tracks of the minimum width by default. Impedance driven width constraints can also be placed on nets in the schematic editor by using PCB layout directives (discussed in section 3.3.5). These are setup in a similar way.

4.7

Signal Integrity from PCB

Signaly integrity from the PCB editor functions in much the same way as from the schematic editor. The main difference being that track lengths and impedances used in the analysis will be calculated from the PCB design. Impedance calculations generally require a ground/power plane in the PCB stack. If a plane is not present, signal integrity analysis may not list any nets. Signal integrity rules can be set using the PCB rules and

4.8 3D PCB Design

55

Figure 4.20: Setting a 75 impedance in the PCB rules and constraints editor constraints editor (section 4.2.4). Directives and design rules can also be set from the schematic editor and the imported into the PCB design. More information on signal integrity can be found in section 3.3.

4.8

3D PCB Design

3D PCB design is one of the newer features in the Altium Designer PCB editor. It extends the PCB layout process to model the design in 3D, incorporate 3D component bodies and enclosures, and to integrate with mechanical CAD packages. 3D bodies are also incorporated into the design rules checking system automatically. I.e. the DRC will use the 3D models to check physical clearance and constraints. The PCB editor can be switched into 3D view by pressing 3, and switched back to 2D by pressing 2. The view can be rotated by holding shift to access the 3D cursor, then right clicking and dragging the cursor. A snapshot of the current view can be copied to the windows clipboard by pressing CTRL + C. The 3D view can also be congured (e.g. board colours) by pressing L. Not many of the components in Altium Designer have a 3D body associated with them, in which case the 3D view will just display a 3D board (with pads, tracks, soldermask, silk screen etc) without components on it. Simple extruded models can be created easily (discussed in section 5.2.3), but contain very simple details. For accurate and detailed modelling, Altium Designer supports importing 3D models (for components, enclosures etc) using the STEP format. The PCB can also be exported as a STEP model for use in mechanical CAD software. A wide range of 3D step models can be found at 3D Content Central (http://www.3dcontentcentral.com free registration required). A 3D model can be placed by selecting Place 3D Body in the menu. The 3D body dialog will then appear, shown in gure 4.22. To use a step model, select Generic STEP Model as the model type (at the top of the dialog), then click either Embed STEP Model

56

PCB Design

Figure 4.21: Example of the 3D PCB view or Link To STEP Model. Embedding a STEP le will store the 3D body information inside the PCB le, whereas linking to a le does not (instead the model is always loaded from the external le).

Figure 4.22: Place 3D body dialog

Chapter 5 Creating and Editing Libraries

Despite the wide range of components in the Altium Designer libraries, there may be many cases where a physical component does not have a library entry. In these cases it is necessary that a component (and often a small library) be created. Their are essentially two parts to this process: creating the schematic part symbol, and linking to or creating the PCB footprint. Other models (e.g. SPICE, signal integrity) can also be added if needed. To create a schematic symbol, it must be apart of a schematic library (.SchLib). I.e a schematic library must rst be created. A PCB footprint must also belong to a PCB Library (.PcbLib), hence a PCB Library must be rst created to create a new PCB footprint. Component properties, linking to PCB footprints and linking to models is performed from the schematic library editor (i.e. these details are stored in the schematic symbol). If the schematic library, PCB library and any model les are added to an integrated library project (.LibPkg), compiling the project will produce an integrated library le (.IntLib) in the project outputs folder. An integrated library includes the schematic symbols, models, PCB footprints and 3D bodies all in one le. More information on the library system is available in section 2.2.

5.1

Schematic library editor

A schematic library is a le that contains schematic symbols and the associated properties/values of the component it represents. To create a schematic library, select File New Library Schematic Library from the system menu. A new schematic library will appear in the schematic library editor. A number of new panels will also appear, usually on left under the projects panel. The SCH Library panel (shown in gure 5.1) is an essential panel when editing a schematic library. At the top it lists the components stored inside the library, then for the currently open/selected component lists its aliases, pins, models (including footprints), supplier links and supplier information.

5.1.1

Creating a Component Symbol

A new schematic library will have one empty component when created (Component-1 by default). More can be added using the SCH Library panel. Tools for drawing a schematic symbol are available from either the place menu or the utilities toolbar (both shown in gure 5.2). At the bare minimum a component symbol should have one pin. Lines or

58

Creating and Editing Libraries

Figure 5.1: The schematic library editor with SCH Library panel rectangles (e.g. for IC symbols) are recommended to be placed in a way that represents the component. Strings for the component designator and comment are created automatically when the component is placed in the schematic (providing those values are set to visible in the component properties, see section 5.1.3.

(a) Place menu

(b) Utilities toolbar

Figure 5.2: Accessing tools to draw schematic symbols

5.1 Schematic library editor

59

5.1.2

Pin Properties

Pins can be placed from the menu under Place Pin). The properties dialog (shown in gure 5.3) can be opened by double clicking the pin, or pressing tab before placing the pin. The Display name should be set to represent the pins function or purpose (refer to the component data sheet for pin information). The designator sets the pin number. Later (when adding footprints), the designator is used to map to the pin numbers in the footprint. Electrical Type sets the electrical function of the pin for the sake of the electrical rule checker (ERC). The symbols section allows various standard symbols to be added to the pin, like dots or clock symbols for example.

Figure 5.3: Pin Properties

5.1.3

Component Properties

Clicking the Edit button under the component list will open the component properties dialog. This is the same window used when editing properties from the schematic editor. At a minimum, a new component should have a default designator set (e.g. U* for an IC). Its recommended that other values like Comment and Description also be lled in. If a component needs a value (e.g. resistor, capacitor or inductor), this can be added as a parameter with name Value.

5.1.4

Linking a Symbol to a Footprint

To use a component in a PCB design it needs to be linked to a PCB footprint. If a custom footprint is needed, it must rst be created (see section 5.2). If the component uses a common/standard footprint, generally a preexisting one can be used. To add a footprint, click Add in the model section of the SCH Library panel, click Add Footprint in the model section at the bottom of the library editor, or click Add in the model section in the

60

Creating and Editing Libraries

bottom right of the component properties window. Depending on which method is used, a small dialog may appear asking what type of model should be added. Select Footprint. The PCB model dialog will then appear. A footprint must rst be found by clicking Browse to open the Browse Libraries dialog. This window works the same way as it does in the schematic editor, except it only displays footprints and PCB library les. If a custom footprint has been created, it can be found by selecting its pcb library (assuming that library is a part of the project). Standard footprints can be found by clicking Find. . . and searching for a name or description that describes the foot print. For example, a 16 pin dual in-line package (dip) footprints would have a name like dip16 or dip-16. A more direct way to nd footprints is by searching or browsing the PCB libraries located in the Library\Pcb directory. Here a number of standard libraries are stored, containing a wide variety of common footprints. Once a footprint has been found, click OK to return to the PCB Model Window. The pin mapping should then be checked (or set if needed) by clicking the Pin Map. . . button. A list showing the pins in the component symbol and model is then displayed. In general, these pins should line up (i.e. each row has matching numbers).

5.1.5

Linking to Suppliers

Supplier links can be added to a component from the library editor. This has the advantage that each instance of a component will automatically be linked to a supplier when placed. After a part has been found in the supplier search panel (see section 6.1), drag and drop the part from the supplier search panel onto either the component name or the supplier links section in the SCH Library panel.

5.1.6

Updating Changes from a Library

If a component is edited in the library after several instances have already been placed in a design, it is possible to push those changes back into the project and update every instance. This is done from the system menu by selecting Tools Update Schematics for a schematic library. For a PCB library, footprints can be updated by selecting Tools Update PCB With Current Footprint to update the selected footprint or Tools Update PCB With All Footprints to update all footprints stored in the library.

5.2

PCB library editor

A PCB library is a le that contains a number of PCB footprints. A footprint generally contains pads that correspond to the component pins, a component outline and a component designator (designators are created automatically when the footprint is used in a PCB design). To create a PCB library, select File New Library PCB Library from the system menu. A new PCB library will appear in the PCB library editor, along with a number of new panels (usually on left under the projects panel). The PCB Library editor functions in a similar way to the PCB editor, using the same layers and grid system. The grid system can be customised in the library options if needed (Tools Library Options. . . ).

5.2 PCB library editor

61

One of the essential panels in the PCB editor is the PCB Library panel (shown in gure 5.4). The top half of the panel lists the components (footprints) stored inside the library, the middle section lists all the primitives in the currently open/selected component, and the bottom section allows the editor view to be controlled in a similar way to the schematic editors sheet panel.

Figure 5.4: The PCB library editor with PCB Library panel

5.2.1

Creating a Footprint Manually

To create a blank component, select Tools NeW Blank Component. A new component should appear in the editor. A footprint can be created using the drawing tools from either the place menu or from the utilities toolbar, shown in gure 5.5. At a bare minimum, a footprint should contain as many pads as there are pins on the device. An overlay (component outline) should be created in the Top Overlay layer using lines to create an outline. Pins can be edited in the same way as they are edited from the PCB editor (see section 4.5). To assist in laying out pads to match the specications in a components data sheet, an appropriate grid size should be used. For example, dual inline packages commonly have a pin spacing of 0.1 (2.54mm), while other packages such as LCC will have top layer pads of 1.2mm spacing. The align tools (found under Edit Align) offer a number of commands to assist in laying out pads and other objects. The measure distance command (under the report menu, or started by pressing CTRL + M) can be used to verify dimensions and spacing of pads or other objects.

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Creating and Editing Libraries

(a) Place menu

(b) Utilities toolbar

Figure 5.5: Accessing tools to draw PCB footprints

5.2.2

Creating a Footprint using the Footprint Wizard

By far the easiest way to create an accurate footprint is by using the component wizard. This can be found by selecting Tools Component Wizard. . . from the menu. This wizard will start by asking which type of footprint should be created, and what units it should use. After a footprint type is chosen, the appropriate pad is displayed (e.g. top layer rounded rectangular pad for an SMD component) and dimensions can be set. Next the pitch (pad to pad distance) and the spacing between lines of pads is set, followed by the outline dimensions. The nal step is to set how many pads are needed and assign a name to the footprint.

Figure 5.6: Specifying the type of footprint

5.2 PCB library editor

63

Figure 5.7: Specifying the number of pads

5.2.3

Creating Simple 3D Bodies

Instead of importing STEP models, Altium Designer can also create simple 3D bodies using spheres, cylinders or extruded polygons. The process is the same from the PCB editor or the PCB library editor. The benet of placing a 3D body in the footprint itself is that it then becomes available to all instances of that footprint that have already been placed in the PCB. To create a 3D body, select Place 3D Body from the menu. The 3D body dialog will then appear (shown in gure 5.8). The type of 3D body can be set at the top of the window. Spheres and cylinders are relatively simple, only needing a radius, standoff height, colour, opacity, and in the case of cylinders, a height. An extruded model is dened using a 2D polygon, then extruded into 3D. This type of model is useful for representing rectangular IC bodies. The colour, opacity, height and standoff height control the basic appearance of the 3D body. A texture can also be added, and will appear on the top of the extruded body. Once settings are entered, clicking OK will start the command to dene the polygon. This works in the same way as for board cutouts and polygon pours: click to add sections to the polygon, then press Esc to create the body.

64

Creating and Editing Libraries

Figure 5.8: Placing a 3D body

Chapter 6 Project Outputs

There are numerous types of output that can be generated from a project. Common project outputs include bill of materials, documents containing schematics and PCB layouts, as well as les containing PCB manufacturing data. There are also a number of reports that can be generated throughout the design process (e.g. ECOs), but are not be covered here.

6.1

Bill Of Materials

A bill of materials (BoM) is a report that lists every type and quantity of component needed to construct the design. It generally contains other information including designators, footprints, and sometimes price and supplier data (see section ). To generate a bill of materials, select Reports Bill of Materials. The Bill of Materials dialog window should then appear (shown in gure 6.1).

Figure 6.1: Bill of Materials dialog The BoM dialog lists components grouped together by there type, displaying the designator, footprint, quantity among other details. Components can be sorted using the column headings. Clicking the arrow button in the heading shows a list controlling how components are sorted and displayed (setting to (All) returns to the default setting). The list on the left of the window controls what columns and data are listed in the report. For example, sheet name or number can be added to help locate components in large multi sheet designs.

66

Project Outputs

The report format can be set at the bottom of the panel. Excel worksheet and PDF format both require Microsoft Excel to be installed. Other output formats are also available, such as CSV, HTML, XML, and text le. Clicking Export. . . will create the report.

6.2

Smart PDF

Smart PDF is one of the easiest ways to generate PDF outputs. Selecting File Smart PDF. . . will start the smart PDF wizard. The wizard starts by asking if the project or current document only should be included in the project. Next it lists the individual project les (which can be selected/deselected, shown in gure 6.2) and gives the option to include a bill of materials. Note: Including a BoM requires Microsoft Excel. If a PCB le is included, the wizard will ask what layers should be included along with options like mirrored output. The last few pages allow additional settings can be entered. The generated PDF can include bookmarks to pins and net labels, and specify what is objects are included in the schematic editor. The default settings are generally sufcient. The nal page allows these settings (from the wizard) to be saved as an output job (discussed in the next section).

Figure 6.2: Smart PDF wizard

6.3

Output Jobs and Cam Output

An output job is a le that manages the settings for multiple types of le outputs. Moreover, it controls how all the output les for a project should be created, and batch generates them with the push of a button. An output job le can be created by selecting File New Output Job File in the menu. A new output job will open, listing all possible types of output for the current project. On the right is the selected output media, with the Generate Files button at the top (shown in gure 6.3). There are essentially two types of les that can be produced: human readable les such as reports, schematic and PCB prints (Print, Publish to PDF or Web output media), and machine readable les such as Gerber, NC drill and other fabrication les (Generate Files output media). The Enabled column on the right controls what documents are created, and in what order. The Data Source column allows the individual le to be selected. If

6.3 Output Jobs and Cam Output

67

Figure 6.3: Output job window there are multiple les (e.g. multiple PCB les), more row can be added by clicking Add New Documentation. Settings for each type of output can be set by double clicking the individual row to open the properties window.

6.3.1

Gerber Output

Gerber is a common le format used to describe a PCB design for manufacturing. Generally it creates a le per layer of the PCB board. For example, common les produced/used for two layer board is shown in table 6.1. For detailed information on what les are required, refer to the PCB manufacturer for more information. The manufacturer may use other les instead of or in addition to Gerber les (e.g. NC drill, ODB++ etc). After the Gerber les (or other types of les) have been setup, they can created by clicking Generate Files in the output job window. These les appear in the project folder. Cam les can be edited and viewed in Altium Designer (using the inbuilt Camtastic editor), but this is beyond the scope of this document.

68

Project Outputs

Figure 6.4: Setting the Gerber output properties

File Extension GTO GTP GTS GTL GBO GBP GBS GBL GKO GPT GPB GM1 GM2 . . . GM16

Contents Top Overlay (silk screen) Top Solder Paste Top Solder Mask Top Layer (actual copper) Bottom Overlay (silk screen) Bottom Solder Paste Bottom Solder Mask Bottom Layer (actual copper) Keep-Out Layer Top Pad Master Bottom Pad Master Mechanical 1 Mechanical 2 . . . Mechanical 16

Table 6.1: Typical set of Gerber les

Bibliography
[1] Altium Limited, 2009, Training Manuals, viewed 4 February 2010 http://www.altium.com/training/en/manuals-and-downloads.cfm [2] Altium Limited, 2009, Altium Designer Library List, viewed 17 February 2010 http://altium.com/community/libraries/altium-designer-libraries/en/altiumdesigner-library-list.cfm