BO CO MN HC THIT K MCH S

ti: thit k mch m ng b vi K = 16.

I.

PHN TCH YU CU THIT K:

Thit k mch m ng b vi K = 16 c ngha l thit k mt mch m thay i trng thi m khi c mt xung ng h a n, mch ny c th m t 0 => 15 ri li m ngc tr li, n c chu trnh m l 16

II. S KHI CA MCH:

B to xung

B m ng b

B gii m a ch

B hin th

Chc nng c bn ca cc khi: B to xung: to xung ng b iu khin c chu k khng i hot ng ca mch. B m ng b: to ra cc xung m chuyn t 0 ti 15 sau khi nhn c mt xung ng b di dng m N-BCD 8421 B gii m: chuyn m nhn c t mch m l m BCD sang thnh mt dng m c th biu din c. B hin th: nhn xung gii m v hin th kt qu.

III. PHN TCH CHC NNG CC KHI:

1. S ca tng khi: A. B to xung Da vo ch to xung vung ca mch a hi phim nh dng IC NE555 ta c th xy dng mt b to xung cho mch m. Cng ngh ch to: TTL - transistor-transistor logic L do: IC555 ph bin v n gin. Chc nng : to xung vung cp cho mch m S chn:

Chn 1: (GND) - chn ni mass. Chn 2 : (Trigger)

cho ni GND ly dng cp cho IC hay chn cn gi l chn chung. u vo kch khi dng t xung kch thch bn ngoi khi mch lm vic ch a hi n n. y l chn u vo thp hn in p so snh v c dng nh 1 chn cht hay ng vo ca 1 tn so p.Mch so snh y dng cc transitor PNP vi mc in p chun l 2/3Vcc. Chn ny l chn dng ly tn hiu ra logic. Trng thi ca tn hiu ra c xc nh theo mc 0 v 1. 1 y l mc cao n tng ng vi gn bng Vcc nu (PWM=100%) v mc 0 tng ng vi 0V nhng m trong thc t mc 0 ny ko c 0V m n trong khong t (0.35 ->0.75V) .

Chn 3: (Output) - Ng ra

Chn 4: (Reset) - Chn xa

, n c th iu khin xa in p u ra khi in p t vo chn ny t 0.7 V tr xung (mc thp) Dng lp nh mc trng thi ra. Khi chn s 4 ni masse th ng ra mc thp. Cn khi chn 4 ni vo mc p cao th trng thi ng ra ty theo mc p trn chn 2 v 6.Nhng m trong mch to c dao ng thng hay ni chn ny ln VCC. dng lm thay i mc p chun trong IC. Tuy nhin trong cc mch ng dng chn s 5 ni mass qua 1 t t 10nF --> 100nF tc dng lc b nhiu cho mc p chun n nh. l mt trong nhng chn u vo so snh in p khc v cng c dng nh 1 chn cht. c th xem chn ny nh 1 kha in t v chu iu khin bi tng logic ca chn 3 .Khi chn 3 mc p thp th kha ny ng li.ngc li th n m ra. Chn 7 t np x in cho 1 mch R-C lc IC 555 dng nh 1 tng dao ng . Cp ngun nui cho IC. Ngun nui cp cho IC khon t +5V--> +15V , ti a l = +18V

Chn 5: (Control Voltage) - Chn in p iu khin Chn 6: (Threshold) in p ngng Chn 7: (Discharge) Chn phng in

Chn 8: (Vcc)

ng v ICNE555

Cu to bn trong & Nguyn l hot ng :

Nguyn tc hat ng: Chn ngng (threshold) s 6 c ni vi chn ny (trigger) s 2 ,nn hai chn ny c cng in p l in p trn t C1, so snh vi in p chun 2/3 Vcc v 1/3 Vcc bi OP-AMP(1) v OP-AMP (2). Chn 5 c t nh 0.01 F ni mass lc nhiu tn s cao c th lm nh hng in p chun 2/3 Vcc. Khi cp in cho mch: -Giai an 1 : in p trn tu nh hon 1/3 Vcc nn OP-AMP (1) ng ra mc 0, OP-AMP (2) ng ra mc 1. Mch Flipflop c kch , ng ra mc 0 chn Q qua cng "not" chn OUTPUT (3) ra mc 1. Transistor T1 khng c kch nn ngng dn, in p trn t C1 c tip tc nap . -Giai an 2 : sau khoang thi gian t C1 c np qua in tr R1 v R2, in p trn tang ln ln hn 1/3 Vcc. OP-AMP (2) c ng ra mc 0 ,OP-AMP (1) ng ra tip tc gi mc 0. Mach Flipflop gi trang thi mc 1 nh ban u, chn OUTPUT(3) mc 1. Transistor T1 khng c kch nn ngng dn. T C1 tip tc dc nap.

-Giai an 3 : t C1 c np in p ln hn 2/3 Vcc , lc nay OP-AMP(1) c ng ra mc 1.Chn reset ca mch Flipflop c kch ,nn Q- mc 1, chn OUTPUT lc ny tr v mc 0.Trasistor T1 c Q- kch nn dn, t C1 bt u x qua in tr R2 vo chn 7 ca IC 555 ri xung mass. Bng chn tr Flipflop
Reset 0 Set 0 Q Q Q-

Q00 1

0 1

1 0

1 0

-Giai an 4: t C1 x in p v nh hn 2/3 Vcc , OP-AMP (1) c ng ra bng 0, OPAMP (2) c ng ra mc 0, mch Flipflop gi nguyn trang thi mc 1, ng ra vn mc khng .Transistor T1 tip tc dn ,t C1 tip t x qua R2. -Giai an 5: t C1 x in p n lc nh hon 1/3Vcc, lc ny OP-AMP(2) c ng ra mc 1, OP-AMP (1) c ng ra bng 0, nn mch Flipflop c set ln mc 1.Chn Q- ra mc 0 ,OUTPUT ra mc 1.Transistor ngng dn, t C1 bt u np v quai lai giai an 1. Tn s dy xung u ra:

Thi gian tn ti xung T1 ( rng xung) ph thuc vo tc np ca t C t ngun cung cp, ngha l t l vi hng s thi gian np n = (R1 + R2).C1 ta c:

T1 = (R1+R2)ln2 Thi gian khng c xung T2 (thi gian ngh) ph thuc vo s phng in ca t C qua chn phng in s 7, nghz l t l vi hng s thi gian p = R2C v: T2 = R2ln2 Vy tn s ca dy xung u ra:
1 f =T = T 1 + 2T 1 = ln 2( 1R + 2 R ). 1C 2 1 1. 44 ( 1R + 2 2R ). 1C

R1 = 10k R2 = 10k C1= 47F

f 1. 44 ( 1R + 2 2R ). 1C = 1. 44 (10k + 2.10k 1Hz ) .47 F

C 1s s c mt xung iu khin n b phn m.

B. B Phn m Trong k thut s c vi mch m ng b ph bin c s dng l 74ls90 v n l vi mch m module 10 vi mch ny c th m t 0 => 9 Cng ngh ch to : TTL ng v IC7490

S chn:

STT 1 2 3 4 5 6 7 8

Tn Chn K hiu CP1 (input B) MR1 (R01) MR2 (R02) NC Vcc MS1 (R91) MS1 (R92) Q2 (QC)

Chc nng Chn u vo a xung ng h vo cc flip flop B, C, D Mt trong hai chn Reset, thit lp ch lm vic ca IC Mt trong hai chn Reset, thit lp ch lm vic ca IC No Connection Khng s dng chn ny Ngun cung cp : Ngun mt chiu +5V Mt trong hai chn Set, thit lp ch lm vic ca IC Mt trong hai chn Set, thit lp ch lm vic ca IC Mt trong bn chn u ra ca IC

9 10 11 12 13 14

Q1 (QB) GND Q3 (QD) Q0 (QA) NC CP0 (input A)

Mt trong bn chn u ra ca IC Chn ni t Mt trong bn chn u ra ca IC Mt trong bn chn u ra ca IC No Connection Khng s dng chn ny Chn u vo a xung ng h vo flip flop A (flip flop u tin)

Nhn xt: IC74LS90 c th chia lm 2 phn: Cc chn thc hin nhim v m : u vo: cc chn CLK gm CP1 (input B); CP0 (input A); Vcc u ra: Q0 (QA); Q1 (QB); Q2 (QC); Q3 (QD) Cc chn thit lp ch lm vic ca IC74LS90: u vo: MR1 (R01); MR2 (R02); MS1 (R91); MS1 (R92) u ra: Q0 (QA); Q1 (QB); Q2 (QC); Q3 (QD)

 Cc chn thc hin nhim v m: Cu to bn trong v nguyn l hot ng:

Qn => Qn+1 0 => 0 0 => 1 1 => 0 1 => 1

J 0 1 X X

K X X 1 0

Bng trng thi b m:

S xung m

Kt qu u ra QA (12) QB (9) 0 0 1 1 0 0 1 1 0 0 QC (8) 0 0 0 0 1 1 1 1 0 0 QD (11) 0 0 0 0 0 0 0 0 1 1

Trng thi b m 0000 0001 0010 0011 0100 0101 0110 0111 1000 1001

0 1 2 3 4 5 6 7 8 9

0 1 0 1 0 1 0 1 0 1

Trng thi hin ti

n n C n

Trng thi tip theo

n 1+ n 1+ n 1+

u vo kch thch FF JD
DK

Q QB

A Qn

QC

QB

QA
n 1+

JC

KC

JB

KB

JA

KA

0 0 0 0 0 0 0 0 1 1

0 0 0 0 1 1 1 1 0 0

0 0 1 1 0 0 1 1 0 0

0 1 0 1 0 1 0 1 0 1

0 0 0 0 0 0 0 1 1 0

0 0 0 1 1 1 1 0 0 0

0 1 1 0 0 1 1 0 0 0

1 0 1 0 1 0 1 0 1 0

0 0 0 0 0 0 0 1 X X

X X X X X X X X 0 1

0 0 0 1 X X X X 0 0

X X X X 0 0 0 1 X X

0 1 X X 0 1 X X 0 0

X X 0 1 X X 0 1 X X

1 X 1 X 1 X 1 X 1 X

X 1 X 1 X 1 X 1 X 1

Da vo bng trn thc hin ti thiu ha ta c kt qu nh sau: K A = JA = 1 KB = A; JB = AD KC = JC = AB

KD = A; JD = ABC Kt qu ny ph hp vi m hnh cu to bn trong ca IC74LS90

Chu k hot ng ca mt IC7490 thng qua s xung nh sau:

 Cc chn thit lp ch lm vic ca IC74LS90

thit lp trng thi Reset cho IC74LS90 (tr v 0) cho b m thun th hai chn MR1 v MR2 phi mc 1. thit lp trng thi Reset cho IC74LS90 (tr v 9) cho b m nghch th hai chn MS1 v MS2 phi mc 1. Cn cc trng thi cn li l IC74LS90 thc hin chc nng m.

 thit k mt mch m ng b (thun) c th m c t 0 => 15 ta dng 2 IC74LS v cc chn reset c ni vi nhau to trng thi reset cho c b m: Mch c thit k nh sau:

Nguyn l: Cch m ca mch thc hin nh sau: 1. Khi ta cp mt xung ng h c tn s 1Hz vo IC1 n s m t 0 => 9 2. Khi IC1 m ti 9 (1001) ri t ng quay v 0 (0000) s to ra mt xung ng h a vo chn 14 ca IC2 khin cho IC2 m t 0 => 1. 3. Khi IC1 m ln hai t 0 => 5, n s dng li gi tr 6 (0110) v s thit k chn QB (= 1) v QC (= 1) ca IC1 i qua cng AND (74LS08) a ti u MR2 (c hai IC) thit lp gi tr 1. ng thi, IC2 m ti 1 (0001) cng dng li v chn QA (= 1) ca IC2 c n chn MR1 (ca c hai IC) thit lp gi tr 1.

Theo bng trng thi khi hai chn MR1, MR2 cng = 1 th bn u ra ca IC74LS90 s bng 0. Mch s quay li m t u. Vy, Mch ch c th m t 0 ti 15. Khi m ti 16, mch s t quay li m t u. Trong b phn m c dng IC7408 hot ng nh mt cng AND:

Vcc = +5V

C. B phn gii m. S dng IC74LS47 dng gii m BCD sang m LED 7 thanh. Sau khi 74LS90 m ha ra BCD sau 74LS47 s m ha cc m BCD ny chuyn sang LED 7 thanh hin th cc gi tr m. Con ny chc l cng khng cn phi gii thch nhiu v con ny khng nh 74LS90. Sau y l bng chn l cc mc hin th sau khi gii m BCD.

S chn:

Chn A0 => A3 a => g Vcc GND

--------

Chc nng u vo m BCD u ra m LED Ngun cp +5V Chn ni t Ripple Blanking Input . Chn ny khi c kch hot (khi = 0) cho tt c cc u ra bng 1 (ng thi khi tt c cc u vo bng 0); qua Led 7 on Anode th khng pht sng do n lun c ni t. Lamp Test. Ta phi cho gi tr ca chn ny = 1 mch hin th kt qu bnh thng. Blanking Input/ Ripple Blanking Output. Ta phi cho gi tr ca chn ny = 1 mch hin th kt qu bnh thng.

RBI

----- -

LT
---- - ---------- -

BI/RBO

Cu to bn trong v nguyn l hot ng:

Kt qu hin th cho ra LED 7 oan Anode

ng v IC7447

D. LED 7 ON Cu to: LED by on sng (thc t l 8 on sng do thm mt on biu din du chm): y l mt t hp gm c 7 LED c u ni vi nhau theo hnh s 8 dng hin th cc s thp phn t 0 n 9.

Bng m hin th ca kiu Anode chung

V m hin th ca kiu mc Cathode chung

Trong mch ny ta dng Led 7 on mc theo kiu anode chung ph hp vi kt qu ca mch gii m 74LS47

Cch cp ngun cho mch : Chn 3 v chn 8 ni vi ngun.

Do n LED ch c in p 3V nn phi mc in tr phn p.

IV. S NGUYN L TON MCH

S dng phn mm Proteus ta v c mch sau: