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04/06/2010
PGD PGC
LOAD GATE
1 2 3 4 5 6
C_PGC 47p
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PORT C
- B dao ng RC ni (RC internal oscillator) - B dao ng to bi thch anh (v t) gn ngoi (External Crystal and Ceramic Oscillator)
VCC
SS*
PORT B
PORT A
C_1112 104
J_PC 1 2 3 4 5 6 7 8 22p
SCL SDA
TX RX
15 16 17 18 23 24 25 26 13
1 J_PD 2 3 4 5 6 7 8 J_PE 1 2 3
PORT D PORT E
0
C_X2 22p
4Mhz XTAL
14 12 31
04/06/2010
PORT B
PORT A
SS*
0
VCC C_3231 104 C_X1
J_PC 1 2 3 4 5 6 7 8
SCL SDA TX RX
1 J_PD 2 3 4 5 6 7 8 J_PE 1 2 3
PORT D
PORT C
PORT E
0
C_X2 22p
04/06/2010
TRISA7=0: Pin A7 c chc nng Output =1: Pin A7 c chc nng Intput
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Register:
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Tm tt
thc hin xut / nhp trn 1 chn (Pin): - Ci t ng gi tr cho thanh ghi TRISx (hoc bit TRISx-n) - t kiu tn hiu ca pin l Analog hay Digital qua 2 thanh ghi ANSEL v ANSELH. - Xut tn hiu bng cch ghi gi tr 0 hoc 1 vo port tng ng (bit: Rx-n hay port: PORTx) - c gi tr ca chn bng cch c mc logic trn port tng ng.
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V d 1
#include <htc.h> __CONFIG(XT & WDTDIS & PWRTEN & MCLREN & UNPROTECT & SWBOREN & IESODIS & FCMDIS & LVPDIS & DEBUGDIS); //1st config. Word __CONFIG(BORV21); //2st config. Word #define _XTAL_FREQ 4000000 //tn s thch anh 4Mhz // khai bo tn s thch anh dng cho lnh delay
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V d 1
//Chng trnh chnh void main(void) { ANSEL=0; ANSELH=0; //Tt c cc port l digital TRISB=0x00; //8 pins PortB l output PORTB=0xFF; //Xut mc 1 while(1) { PORTB=0x00; __delay_ms(150); PORTB=0xFF; __delay_ms(150); };
} 04/06/2010
Gii thch
Vi on chng trnh trn, chng ta quan tm ti cc vn sau: 1. vit code vi HiTech Pic th phi #include file htc.h 2. PIC16F887 c 2 t (word) configuration, chip hot ng ng th cc bn phi cu hnh (configure) ng cho n. Mi bit trong word config. c i din bng 1 cm ch ci in hoa. Bn ch cn quan tm ti bit config u tin: cu hnh ngun xung nhp (clock) cho chip. - XT: External Crystal dng b dao ng thch anh gn ngoi vi tn s thch anh t 4Mhz tr xung - HS: High Speed: dng b dao ng thch anh gn ngoi vi tn s thch anh trn 4Mhz (ti 20Mhz) - INTIO: Dng b dao ng RC ni - V cc loi ngun xung nhp khc c k hiu bng cc ch ci khc nhng ta t dng.
04/06/2010
Gii thch
Trong v d trn, ta dng thch anh 4Mhz gn ngoi nn bit config u tin ta ghi l XT Tng t: __CONFIG(HS & // nu dng thch anh c tn s 8Mhz __CONFIG(INTIO & // nu dng b dao ng RC ni (Lu : Trc CONFIG bt u bng 2 du gch di _, cc bit config cn li cc bn gi nguyn, 2 t config phi c vit trn 2 dng khc nhau, khng gp chung c) 3. nh ngha tn s thch anh: #define _XTAL_FREQ 4000000 - Khng c du ; sau hng nh ngha hng s. Trong v d ny thch anh c gi tr 4Mhz th ta ghi l 4000000 (4 triu), nu dng thch anh 20Mhz th ghi gi tr tn s thch anh l 20000000 (20 triu) -_XTAL_FREQ bt u bng 1 du gch di v bn khng c php thay i tn hng s ny.
04/06/2010
Gii thch
4. Chng trnh chnh V d ny ta kt ni portB vi 8 Led n, s led nh sau: LED_BUS l port dng ni vo chn VK. Theo cch mc mch nh trn, khi chn VK xut mc 1 Led s tt, xut mc 0 Led s sng. Nh vy trong hm main(), chng ta lm cc vic:
VCC R_L1 R_L2 R_L3 R_L4 R_L5 R_L6 R_L7 R_L8
LED MODULE
1k 1k 1k 1k 1k 1k 1k 1k LED1 LED2 LED3 LED4 LED5 LED6 LED7 LED8 1 2 3 4 5 6 7 8
- phn khi to, quy nh cc chn l digital, khi to portB l output xut Led, sau xut mc 1 tt c 8 chn ca portB: 0b11111111 = 0xFF tt ht cc Led. - Trong vng lp while s thc hin bt led trong thi gian 150ms, ri tt 150ms. Thi gian delay l thi gian cho mt kp nhn thy s thay i ca led.
04/06/2010
LED_BUS1
Gii thch
5. Hm delay __delay_ms(n); __delay_us(n); c to ra bng cch lp nhiu ln lnh NOP khng lm g c. S n ti a khong 190, nu bn mun delay nhiu hn 190ms th cc bn gi hm ny nhiu ln, hoc dng 1 vng lp gi n. V d delay 1s: for(char i=0;i<10;i++) __delay_ms(100);
04/06/2010
V d 2
Trong v d 2, ta ch bt tt led 1 chn duy nht ca portB, ta s cu hnh bit TRISBn v RBn tng ng ca chn m khng nh hng ti gi tr ca ton b thanh ghi TRISB, PORTB
void main(void) { ANSEL=0; ANSELH=0; //Tt c cc port l digital TRISB1=0; //PortB.1 l output RB1=1; //Xut mc 1 while(1) { RB1=0; __delay_ms(150); RB1=1; __delay_ms(150); }; }
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V d 3
Ci tin v d 2 1 bit xor vi 1 ly b ca n (1 ^1 kt qu =0; 0^1 kt qu =1). RB1 ^=1; ngha l xor gi tr RB1 vi 1 ri ghi kt qu va nhn c vo chnh RB1, tc l php ly b ca RB1.
void main(void) { char i; ANSEL=0; ANSELH=0; //Tt c cc port l digital TRISB1=0; //PortB.1 l output RB1=1; //Xut mc 1 while(1) { RB1 ^=1; for(i=0;i<10;i++) __delay_ms(100); //delay 1s }; }
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04/06/2010