You are on page 1of 6

Code No: V0222/R07

Set No. 1

II B.Tech II Semester Regular Examinations, April 2010 LINEAR AND DIGITAL IC APPLICATIONS ( Common to Electrical & Electronic Engineering and Instrumentation & Control Engineering) Time: 3 hours Max Marks: 80 Answer any FIVE Questions All Questions carry equal marks

1. (a) What is an Op-amp? Why it is called so? (b) Explain the parameters that should be considered for ac and dc applications of an Op-amp? (c) Draw and explain the two open loop Op-amp congurations with neat circuit diagram. [4+5+7] 2. (a) Explain the operation of Zero crossing detector. (b) Briey mention the disadvantages of using Zero crossing detector and how it is overcome in Schmitt Trigger? (c) Draw a circuit using Op-amp which can work as adder (inverted and noninverted) and explain how it works. [4+4+8] 3. (a) The cuto frequency of a certain rst order low pass lter is 2 KHz. Convert this low pass lter to have a cuto frequency of 3 KHz by using the frequency scaling technique. (b) How do we get a Notch lter from a band pass lter. (c) What are the advantages of active lters over passive lters. [8+4+4]

4. (a) Explain the signicance of each of comparator and also operation of 555 timer. (b) Explain the application of 555 timer as Linear ramp generator. [8+8]

5. (a) With an example explain the functional diagram of successive approximation ADC. (b) Draw the schematic circuit diagram of a Servo A/D converter and explain the operations of this system. (c) Compare Servo A/D with other types of A/D converters. [7+6+3]

6. (a) Design a TTL three-state NAND gate and explain the operation with the help of function table? (b) What are the parameters that are necessary to dene the electrical characteristics of CMOS circuits? Mention the typical values of a CMOS NAND gate? [8+8] 7. (a) Using two 74138 decoders design a 4 to 16 decoder?

1 of 2 Please purchase PDF Split-Merge on www.verypdf.com to remove this watermark.

Code No: V0222/R07

Set No. 1

(b) Design a CMOS transistor circuit that has the functional behavior F (Z) = (A + B)(B + C). [8+8] 8. (a) Distinguish between synchronous and asynchronous sequential circuits. (b) Write short notes on static RAM. [8+8]

2 of 2 Please purchase PDF Split-Merge on www.verypdf.com to remove this watermark.

Code No: V0222/R07

Set No. 2

II B.Tech II Semester Regular Examinations, April 2010 LINEAR AND DIGITAL IC APPLICATIONS ( Common to Electrical & Electronic Engineering and Instrumentation & Control Engineering) Time: 3 hours Max Marks: 80 Answer any FIVE Questions All Questions carry equal marks

1. (a) An op-amp has a slew rate of 2V/s. What is the maximum frequency of an output sinusoid of peak value 5V at which the distortion sets in due to the slew rate limitation. Derive the formulae used. (b) If the sinusoid of 10V peak is specied, what is the full power band width? (c) List out the non ideal Dc characteristics of an Op-amp? [8+4+4] 2. (a) Draw an integrator circuit and explain its operation. Discuss the frequency response for a practical integrator. (b) Explain how an Op-amp can be used as summing amplier? Draw the diagram of a four input summer. (c) Explain the operation of a scale changer with circuit diagram. [6+6+4] 3. (a) Explain the term Frequency Scaling with suitable example. (b) Design a I order wide band-pass lter with fL =200 Hz. fH =1 KHz and a passband gain=4. Draw the frequency response and calculate ?Q? factor for the lter. (Assume necessary data) [6+10] 4. Explain the functional block diagram of PLL emphasizing the importance of capture range and Lock range. [16] 5. (a) Draw the circuit of a Ladder type DAC for 4 bits and derive expression for output voltage. (b) Sketch the Analog output voltage for the given digital code. (c) Compare R-2R and Weight Resistor types of ADC. [8+4+4] 6. (a) Draw a circuit of a CMOS NAND gate and explain? (b) Compare TTL and CMOS IC characteristics. (c) List out dierent categories of characteristics in a TTL data sheet? Discuss electrical and switching characteristics of 74LS00. [4+6+6] 7. (a) Design 2 bit comparator using gates? (b) Design an 8 bit adder using two 74283IC. 8. (a) Write short notes on Johnson counter. (b) Write short notes on DRAM. [8+8] [8+8]

1 of 1 Please purchase PDF Split-Merge on www.verypdf.com to remove this watermark.

Code No: V0222/R07

Set No. 3

II B.Tech II Semester Regular Examinations, April 2010 LINEAR AND DIGITAL IC APPLICATIONS ( Common to Electrical & Electronic Engineering and Instrumentation & Control Engineering) Time: 3 hours Max Marks: 80 Answer any FIVE Questions All Questions carry equal marks

1. (a) For an inverting Op-amp having R1 = 470, feedback resistor RF = 4.7K and Calculate Closed loop gain, Bandwidth with feed back, Input resistance, Output Resistance. (b) Derive the formulae used in solving part (a). 2. (a) Briey describe three uses of an analog multiplier. (b) What do you mean by sampling? Explain the basic circuit for sample and hold circuit. [8+8] 3. (a) Design a triangular wave generator using a comparator block and an integrator block to oscillate at 4KHz and Vo(P-P)=7 V use an Op-amp with 15 volt power supplies. Make necessary assumptions. (b) What is the purpose of back to back set of two zener diodes? (c) What is the main advantage of comparator based triangular wave generator over free running astable multivibrator based circuit? [8+4+4] 4. (a) Draw the schematic circuit diagram of the following and explain their working. i. Analog phase detector. ii. VCO. Derive necessary expressions. (b) What is their role is in PLL? Explain. [6+6+4] [8+8]

5. (a) Draw the circuit of Weighted Resistor DAC and derive expression for output analog voltage Vo. (b) Give the schematic circuit of an A/D converter widely used in digital voltmeters and explain its operation. Derive expression for output voltage. [8+8] 6. (a) With neat circuit explain the operation of TTL inverter. (b) Briey explain the dierent types of TTL gates. (c) Explain the eect of oating inputs on CMOS gate? 7. (a) Give the logic diagram of 74138 and explain its truth table? (b) Write short notes on BCD to Excess 3 code converter. [8+8] [5+7+4]

8. (a) Design 4 bit left shift register with serial in and parallel out facility. Show the output waveform of each ip op output. 1 of 2 Please purchase PDF Split-Merge on www.verypdf.com to remove this watermark.

Code No: V0222/R07

Set No. 3

(b) Explain the functional behavior of Static RAM cell? Show the internal structure of 84 static RAM? [8+8]

2 of 2 Please purchase PDF Split-Merge on www.verypdf.com to remove this watermark.

Code No: V0222/R07

Set No. 4

II B.Tech II Semester Regular Examinations, April 2010 LINEAR AND DIGITAL IC APPLICATIONS ( Common to Electrical & Electronic Engineering and Instrumentation & Control Engineering) Time: 3 hours Max Marks: 80 Answer any FIVE Questions All Questions carry equal marks

1. (a) Draw and explain the internal block schematic of an Op-amp. (b) Explain how the voltage follower is derived from a special case of non-inverting amplier. [8+8] 2. (a) Explain the non-linear application of Op-amp as logarithmic and anti logarithmic amplier. (b) Design a Integrator to integrate an I/P signal that varies in frequency from 1 KHz to 10 KHz and plot the O/P wave forms if the I/P is a sine wave of 1V peak at 1 KHz. [10+6] 3. (a) State and briey explain Barkhausen criterion for oscillation. (b) Draw the schematic diagram of a fourth order low pass butter worth lter and design it with upper cut o frequency of 1KHz. [6+10] 4. Discuss the signicance of phase detector, Low pass lter, amplier and a VCO in PLL. [4 4=16] 5. (a) Compare weighted resistor D/A converter and R-2R D/A converter. (b) Why successive approximation A/D converter is preferable than parallel comparator A/D converter. Explain. (c) Draw the schematic block diagram of Dual-slope A/D converter and explain its operation. Derive expression for its output voltage Vo. [2+4+10] 6. (a) With relevant circuit and characteristics explain fan in and fan out of TTL ICS. (b) Explain the functions of a Tri-state TTL gate. (c) Explain the TTL ICs application circuits. 7. (a) Design a n bit priority encoder. (b) Design a 3 bit BCD adder circuit and explain its working. [8+8] [6+4+6]

8. (a) Explain with an example why asynchronous inputs are required in ip ops. (b) Explain the operation of edge triggered T ip- op. [8+8]

1 of 1 Please purchase PDF Split-Merge on www.verypdf.com to remove this watermark.

You might also like