8086 Microprocessor lab.

EXPERIMENT 5 ARITHMETIC INSTRUCTIONS PART 2 Objectives To multiply two 16-bit numbers and store the result in memory. To Divide 16-bit numbers and store the result in memory. Introduction Multiplication This group of instructions consist of following group of instructions. MUL Unsigned multiplication IMUL Signed multiplication MUL Instruction : MUL source. This instruction multiplies an unsigned byte from source and unsigned byte in AL register or unsigned word from source and unsigned word in AX register. The source can be a register or a memory location. When the byte is multiplied by the contents of AL, the result is stored in AX. The most significant byte is stored in AH and least significant byte is stored in AL.

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When a word is multiplied by the contents of AX, the most significant word of result is stored in DX and least significant word of result is stored in AX.

Flags : MUL instruction affected OF, CF SF,ZF,AF,PF undefined Unsigned multiply. REG memory when operand is a byte: AX = AL * operand. when operand is a word: (DX AX) = AX * operand. Example: MOV AL, 200 ; AL = C8 h MOV BL, 4 MUL BL ; AX = 320 h (800)

MUL

Note that the multiplication of two 8-bit number is 16-bit number Note that the multiplication of two 16-bit number is 32-bit number IMUL Instruction : IMUL source This instruction multiplies a signed byte from some source and a signed byte in AL, or a signed word from some source and a signed word in AX.

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The source can be register or memory location. When a signed byte is multiplied by AL a signed result will be put in AX. When a signed word is multiplied by AX, the high-order word of the signed result is put in DX and the low-order word of the signed result is put in AX. If the upper byte of a 16-bit result or the upper word of 32-bit result contains only copies of the sign bit (all O's or all 1's), then the CF and the OF flags will both be 0's. The AF, PF, SF, and ZF flags are undefined after IMUL. To multiply a signed byte by a signed word it is necessary to

move the byte into a word location and fill the upper byte of the word with copies of the sign bit. This can be done using CBW instruction. Flags : IMUL instruction affected OF, CF SF,ZF,AF,PF undefined Signed multiply. IMUL REG memory when operand is a byte: AX = AL * operand. when operand is a word: (DX AX) = AX * operand. Example: MOV AL, -2 MOV BL, -4 IMUL BL ; AX = 8

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Division This group of instructions consists of following group of instructions. DIV : Unsigned division I D I V : signed division DIV Instruction : DIV source This instruction is used to divide an unsigned word by a byte or to divide an unsigned double word by a word. When dividing a word by a byte, the word must be in AX register. After the division AL will contain an 8-bit quotient and AH will contain an 8-bit remainder. if an attempt is made to divide by 0 or the quotient is too large to fit in AL (greater than FFH), the 8086 will automatically execute a type 0 interrupt. When a double word is divided by a word, the most significant word of the double word must be in DX and the least-significant word must be in AX. After the division AX will contain a 16-bit quotient and DX will contain a 16-bit remainder. Again, if an attempt is made to divide by 0 or the quotient is too large to fit in AX register (greater than FFFFH), the 8086 will do a type 0 interrupt. For DIV instruction source may be a register or memory location. To divide a byte by a byte, it is necessary to put the dividend byte in AL and fill AH with all 0's. Similarly, to divide a word by a word, it is

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necessary to put the dividend word in AX and fill DX with all 0's. Flags : All flags are undefined after a DIV instruction. Unsigned divide. REG memory when operand is a byte: AL = AX / operand AH = remainder (modulus) when operand is a word: AX = (DX AX) / operand DX = remainder (modulus) Example: MOV AX, 203 ; AX = 00CB h MOV BL, 4 DIV BL ; AL = 50 (32h), AH = 3

DIV

IDIV Instruction : IDIV source This instruction is used to divide a signed word by a signed byte, or to divide a signed double word (32-bits) by a signed word. Rest all is similar to DIV instruction. Signed divide. Algorithm: IDIV REG memory when operand is a byte: AL = AX / operand AH = remainder (modulus) when operand is a word: AX = (DX AX) / operand DX = remainder (modulus)

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Example: MOV AX, -203 ; AX = FF35h MOV BL, 4 IDIV BL ; AL = -50 (CE h), AH = -3 (0FDh)

Note: if quotient is positive and exceeds 7FFF H or if quotient is negative and becomes less than 8001 H, then type 0 interrupt occurs. An 8-bit division uses the AX register to store the dividend that is divided by the contents of any 8-bit register or memory location. The quotient moves into AL after the division with AH containing a whole number remainder. For a signed division, the quotient is positive or negative; the remainder always assumes the sign of the dividend and is always an integer. For example, if AX = 0010H (+16) and BL = FDH (-3) and the IDIV BL instruction executes, AX = 0IFBH. This represents a quotient of -5 (AL) with a remainder of 1 (AH). If, on the other hand, a -16 is divided by a +3, the result will be a quotient of -5 (AL) with a remainder of -l (AH). This means that one of them, the dividend, must be converted to a 16-bit wide number in AX. This is accomplished differently for signed and unsigned numbers. For unsigned numbers, the most-significant 8-bits AH must be cleared to zero (zero-extended).

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For signed numbers, the least-significant 8-bits AL are sign(D7)-extended into the most significant 8-bits AH. A special instruction sign(D7)-extends AL into AH, or converts an 8-bit signed number in AL into a 16-bit signed number in AX. The CBW (convert byte to word) instruction performs this conversion. 16-bit Division. Sixteen-bit division is similar to 8-bit division except that instead of dividing into AX, the 16-bit number is divided into DX-AX, a 32-bit dividend. The quotient appears in AX and the remainder in DX after a 16-bit division. If AX is a 16-bit signed number, the CWD (convert word to double word) instruction sign-extends it into a signed 32-bit number. No flag effected

o CBW : Convert byte into word. Convert byte into word. CBW No operands if high bit of AL = 1 then: AH = 255 ( FF h) else AH = 0

Example: MOV AX, 0 MOV AL, -5 CBW ; AH = 0 , AL = 0 ; AX = 00FB h (251) ; AX = FFFB h (-5)

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o CWD : Convert Word to Double word.

Convert Word to Double word. CWD No operands if high bit of AX = 1 then: DX = 65535 (FFFF h) else DX = 0

Example: MOV DX, 0 MOV AX, 0 MOV AX, -5 CWD ; DX = 0 ; AX = 0 ; DX AX = 0000 h : FFFB h ; DX AX = FFFF h : FFFB h

Procedure:

1- Verify each instruction starts from these values: AL = 85H , BL = 35H , AH = 0H a- MUL BL b- IMUL BL c- DIV BL d- IDIV BL

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2- If the content of AL equals -1 and the contents of CL are -2. What will be the result produced in AX by executing the following instructions?

MUL CL IMUL CL

3- What is the result of executing the following sequence of instruction?

MOV AL,A1 CBW CWD

4- Assume the register and memory is as follows: AX = 0010 H BX = 0020 H CX = 0030 H DX = 0040 H SI = 0100 H DI = 0200 H CF = 1 H DS: 100 H = 10 H DS: 101 H = 00 H DS: 120 H = FF H DS: 121 H = FFH DS: 130 H = 08 H

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DS: 131 H = 00 H DS: 150 H = 02 H DS: 151 H = 00 H DS: 200 H = 30 H DS: 201 H = 00 H DS: 210 H = 40 H DS: 211 H = 00 H DS: 220 H = 30 H DS: 221 H = 00 H

a- What operation is performed by each of the following instructions ? b- What is the result produced in the destination operand by executing each instruction ?

1. ADD AX, 00FF H 2. ADC SI , AX 3. INC BYTE PTR [0100 H] 4. SUB DL, BL 5. SBB DL, [0200 H] 6. DEC BYTE PTR [DI+BX] 7. NEG BYTE PTR [DI]+0010 H 8. MUL DX 9. IMUL BYTE PTR [BX+SI] 10.DIV BYTE PTR [SI]+ 0030 H 11.IDIV BYTE PTR [BX] [SI]+0030

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Discussion: 1- Two word- wide unsigned integers are stored at the memory addresses 0A00 H and 0A02 H, respectively. Write an instruction sequence that computes and stores their sum, difference, product, and quotient. Store these results at consecutive memory locations starting at address 0A10 H in memory. To obtain the difference, subtract the integer at 0A02 H from the integer at 0A00 H. For the division, divide the integer at 0A00H by the integer at 0A02 H. Use register indirect relative addressing mode to store the various result.