TUTORIAL NO.

1
Q.1 Explain drift and diffusion of charge carriers in semiconductors. Derive an expression for the
electron current due to drift and diffusion.
Q.2 Distinguish between the followings:
(i) Intrinsic and extrinsic semiconductor
(ii) Majority and minority charge carriers
(iii) P and N type semi conductor
(iv) Forward and reverse biasing of P-N junction
Q.3a) For what voltage will the reverse current in a p-n junction germanium diode reach 90% of
its saturation values at room temperature?
b)What is the ratio of the current of a forward bias of 0.05 V to the current for the same
magnitude of the reverse bias.
c) If the reverse saturation current is 10 A, calculate the forward currents for voltages of
0.1, 0.2 and 0.3 V respectively
Q.4 Using the fact that a silicon diode has I0=10
-14
A at 25C and that is increases by 15% per C
rise in temperature. Find the value of I0 at 125C. (Ans. : 1.17 x 10
-8
A)
Q.5 Assuming that the diodes in the circuit given below is ideal, utilize theveins theorem to
simplify the circuit shown in figure and find the values of the labelled currents and
voltages.
Q.6 For the circuit shown below, both the diodes are identical conducting 10mA at 0.7V and
100mA at 0.8V. find the value of R for which V= 50mV.
15V
10k
20k
20k
I
V
+
50mV
-
10mA
I
2
D
1
D
2
R
+
V
-
I
1
+
v
D1
-
+
v
D2
-
Q.7 For the circuit given, find the output voltage vo for the cases a) V1 = V2 = 5V b) V1 =
5V, V2 = 0V c) V1 = V2 = 5V
Q.8 (a) Calculate the anticipated factor by which the reverse saturation current of a germanium
diode is multiplied when the temperature increased from 25 to 80C.
(b) Repeat part(a) for a silicon diode over the range 25 to 150C.
Q.9 An ideal germanium p-n junction diode has at a room temperature of 125C a reverse
saturation current of 30 A. At a temperature of 125C find the dynamic resistance for a 0.2V
bias in (a) the forward direction (b) the reverse direction.
Q.10 The zero-voltage barrier height at an alloy germanium p-n junction is 0.2 V. The
concentration NA of acceptor atoms in the p-side is much smaller than the concentration of
donor atoms in the n- material, and NA = 3 x 10
20
atoms/m
3
. Calculate the width of the
depletion layer for an applied reverse voltage of (a) 10V and (b) 0.1 V and (c) for a forward
bias of 0.1 V.
5V
4.7k
300
V
1
300
V
2
V
0
D
1
D
2
TUTORIAL NO. 2
Q.1 A half wave rectifier uses a diode with an equivalent forward resistance of 0.3If the
input a.c. voltage is 10V (rms) and the load resistance of 20. Calculate I
dc
and I
rms

in the load.
Q.2 A half wave rectifier uses a diode with a forward resistance of 100 If the input a.c.
voltage is 220 V (rms) and the load resistance of 2 k. Determine (i) I
max
, I
dc
and
I
rms
. (ii) Peak Inverse voltage when diode is ideal (ii) Load output voltage (iv) d.c.
output power and a.c. input power (v) ripple factor (vi) TUF (vii) Rectification
efficiency.
Q.3(a) What is the ripple factor for the ripple of 2v on avg. of 50 v. (Ans : r =
04 . 0
50
2

dc
rms
V
V
)
(b) In a power supply the d.c. output voltage drops from 44V with no load to 42 V at full
load. Calculate the % voltage regulation.
Q.4 A single phase full-wave rectifier uses two diodes, the internal resistance each being
20The transformer r.m.s. secondary voltage form centre tap each end of secondary is 50
V and RL= 980. Find
(a) The mean load current
(b) Rms load current
(c) Output efficiency
Ans. : 45mA, 50mA, 79.58
Q.5 What is the ripple 2V on average of 50V?
Q.6 A full wave rectifier has a peak output voltage of 25V at 50 Hz and feed a resistive load of
1K. The filter used is shunt capacitor one with 20 F . determine (i) dc load current (ii) dc
out put voltage (iii) ripple voltage (iv) ripple factor
Q.7 Give output of following clipper circuits when input to all circuits is a sinusoidal wave of
peak voltage Vm.
R
Vi
V
O

+ +
(a)
R
Vi
V
O

+ +
R
Vi
V
O

+ +
(a)
R
Vi
V
O

+ +
(b)
I|
V
R
Vi
V
O

+ +
(b)
I|
V
Q.8 Give output of following clipper circuits when input to all circuits is a sinusoidal wave of
peak voltage Vm
Q.9 Give output of following clamper circuit a square wave input having maximum
voltage Vm.
R
V
V
O

+
+
(c)
Vi
R
V
V
O

+
+
(c)
Vi
R
V
V
O

+
+
(d)
Vi
R
V
V
O

+
+
(d)
Vi
R
V
1
V
O

+
+
(e)
Vi
V
2
R
V
1
V
O

+
+
(e)
Vi
V
2
R
Vi
V
O

+ +
(a)
|(
C
R
Vi
V
O

+ +
(a)
|(
C
R
Vi
V
O

+ +
(b)
|(
C
R
Vi
V
O

+ +
(b)
|(
C
R
Vi
V
O

+ +
(c)
|(
C

R
Vi
V
O

+ +
(c)
|(
C

R
Vi
V
O

+ +
(d)
|(
C

R
Vi
V
O

+ +
(d)
|(
C

Q.10 Give output of following clamper circuit a square wave input having maximum
voltage Vm.
R
Vi
V
O

+ +
(f)
|(
C

V
1
R
Vi
V
O

+ +
(f)
|(
C

V
1
R
Vi
V
O

+ +
(e)
|(
C

V
1
R
Vi
V
O

+ +
(e)
|(
C

V
1
Q. 1) TUTORIAL NO. 3
Q1. Draw the V-I characteristics of Zener diode and also explain avalanche breakdown
and zener breakdown.
Q.2 List the application of an LED. In what respect is an led different from an ordinary
PN junction diode?
Q.3 Show that Zener diode can be used as a voltage regulator.
Q.4 What is Schottky diode? Why it is also called hot carrier diode? How does it differ in
construction from a normal P-N junction? Give its working, characteristics and application.
Q.5 For the zener diode network, determine VL, VR, IZ and PZ.
Ans.: (a) 1z = 0A
PZ = 0W
VR = 7.27 V
VL =8.73V
(b) VL = 10V
VR= 6 V
IL=3.33 mA
IR = 6mA
IZ=1.67 mA
Pz = 26.7 mW
Q.6 Repeat above question with RL=3K
Q.7 Determine VL, VR, IZ and PZ
(Ans. : (a) 8.73V, 7.27V, oA, oW (b) 10V, 6V, 2.67 mA, 26.7 mW)
Q.8 Repeat above question with RL= 3 k
Q.9 (a) Find range of RL and IL that
will maintain VL at 10V.
b) Determine maximum
voltage rating of diode.
Vi=16V
V
R
1 K
I
Z
R
L
=1.2K
P
ZM
=30mW
Vz=10V
Vi=16V
V
R
1 K
I
Z
R
L
=1.2K
P
ZM
=30mW
Vz=10V
V
R
1 K
I
Z
R
L
=1.2K
P
ZM
=30mW
Vz=10V
I
Z
1 K
+ V
R
16V
Vz =10V, Pzm = 30 mu)
R
L
1.2 K
V
L
I
Z
1 K
+ V
R
16V
Vz =10V, Pzm = 30 mu)
R
L
1.2 K
V
L
I
Z
1 k
Vz =10V, Izm = 32 mA
R
L
V
L
I
L
Vi=50V
-
+
+

I
Z
1 k
Vz =10V, Izm = 32 mA
R
L
V
L
I
L
Vi=50V
-
+
+

(Ans. : 250 -1.25 KmW)
Q.10 Determine range of Vi that will maintain zener diode in on state.
(Ans. : 23.67 V 36.87V)
TUTORIAL NO. 4
I
Z
220 I
R
Vi

+
R
L
I
L
1.2 K
V
Z
= 20 V, I
2
m = 60 mA
+

V
L
I
Z
220 I
R
Vi

+
R
L
I
L
1.2 K
V
Z
= 20 V, I
2
m = 60 mA
+

V
L
Q.1 a) Define and of a transistor and derive the relationship between them.
b) Differentiate between ICO and ICBO. What is the effect of temperature on ICBO.
Q.2 Determine the d.c. bias voltage VCE and the current Ic for the voltage divider configuration.
Ans. : VCE = 12.22 V
Q.3 Determine the quiescent levels of ICQ and
VCEQ for the network shown below
Ans.: I
CQ
= 1.07 mA
V
CEQ
= 3.69 V
Q.4 For the network shown in problem (2) Determine
(a) I
CQ
& V
CEQ2
Assume : V
CC
= 20 V Ans. : I
CQ
= 1.86 mA,
(b) Find V
B
, Vc, V
E
& V
BC Rc = 4.7 K, R
B
= 680 K
R
E
= 0, = 120
V
CEQ
= 11.26 V,
V
B
= 0.78V,
V
C
= 11.26V,
V
E
= 0, V
BC
= -10.56V
22 V
R
C
=10 K
=140
R
E
=1.5 K
R
1
= 39 K
R
2
= 3.9 K
I/P
22 V
R
C
=10 K
=140
R
E
=1.5 K
R
1
= 39 K
R
2
= 3.9 K
I/P
Vcc = 10V
Rc = 4.7 K
R
E
= 1.2 K
= 90
250 K
R
B
Vi
Vcc = 10V
Rc = 4.7 K
R
E
= 1.2 K
= 90
250 K
R
B
Vi
Q.5 Determine Vc &VB for the network.
Ans. : VC = - 4.448 V
VB= -8.3V
Q.6 Determine VCEQ and IE for the network
Ans. : VCEQ= 11.68 V
IE = 4.16 mA
Q.7 Determine Vc & VB for the
network .
Ans. : VC = 8.53 V
VB= -11.59 V
1.2 K
100 K
Vi
R
B
V
EE
= -9V
= 45
Vo
1.2 K
100 K
Vi
R
B
V
EE
= -9V
= 45
Vo
240 K
Vi
R
B
V
EE
= -20V
= 90
Vo 240 K
Vi
R
B
V
EE
= -20V
= 90
Vo
2.2 K
Vi
V
CC
= 20V
= 120
Vo
8.2 K 2.7 K
1.8 K
2.2 K
Vi
V
CC
= 20V
= 120
Vo
8.2 K 2.7 K
1.8 K
Q.8 a) In the circuits shown fig (a), determine whether or not the transistor is in saturation and
find IB and IC.
b) Repeat with 2k emitter resistance added as given in fig (b).
Hint. : Find IB by calculation and final (IB)min =

c
I
or
fe
c
h
I
. If (IB)calculated > (IB) min (IB
calculate = 0.084 mA, IBmin = 0.033 mA) then transistor will be in saturation
(b) Ic = 1.71 mA, IB = 0.0171 mA, Vqb = 0.72
Q.9 Determine the following for the fixed bias configuration.
(a) IBQ, ICQ Ans.:I
BQ
= 47.08 A
(b) VCEQ ICQ = 2.35 mA
(c) VB & Vc VCEQ = 6.83 V
VB = 0.7V, VC = 6.83V
(d) VBC VBC = - 6.13 V
Q.910 Repeat the above problem when a resistance RE=1 Kis attached between emitter and
ground.
3 K
R
B
= 50 K
5V
hfe = 100
10 V
(a)
3 K
R
B
= 50 K
5V
hfe = 100
10 V
(a)
3 K
50 K
5V
= 100
10 V
(b)
R
E
= 2K
3 K
50 K
5V
= 100
10 V
(b)
R
E
= 2K

=50 V
CE
+
-
Rc = 2.2 K
240 K
R
B
O/p
I/p
I
B
Ic
Vcc= +10V
=50 V
CE
+
-
Rc = 2.2 K
240 K
R
B
O/p
I/p
I
B
Ic
Vcc= +10V
TUTORIAL NO. 5
Q.1 What is the need for biasing the transistor? Briefly explain the reason for keeping the
operating point of a transistor as fixed.
Q.2 (a)What is thermal runaway? How can it be avoided?
(b) Define stability factor.
Q.3 A base resistor biasing circuit shown in fig 1. Determine
(i) IC and VCE neglect VBE and = 60 (ii) if RB is changed to 200 k

Q.4 Calculate collector current and collector to emitter voltage for the circuit shown in fig. (2)
Q.5 Calculate the coordinates of operating point in fixed biasing circuit shown in fig(3).
Given RB=120K, RC=1K. If transistor is replaced by another having = 150, what will be
new coordinates of operating point.
Q.6 It is desired to set the operating point using feedback resistor method of biasing at IC =
1mA, VCE = 8V. What will be value of RC and RB, VCC = 12V, VBE = 0.3 V and = 100.
(i) What will be the new operating point if changes to 150 assuming all
other values of the circuit to be same.
Q.7 Calculate the value of RB in fig.(4) so that operating point is fixed at IC = 6.4 mA and VCE
= 3V; = 80.
Q.8 A voltage divider biasing circuit is shown in fig. (5). Determine emitter current, collector
emitter voltage and collector voltage.
Q.9 A transistor biased by potential divider and emitter resistance biasing has its zero
operating point fixed at 2 mA, 6 V. If VCC = 15 V, RE=1 k, R2 = 10 k and VBE = 0.3
V. Find value of RC and R1.
Q.10 In a CE germanium transistor amplifier circuit the bias is provided by self bias. The
various parameters are VCC = 16V, RC = 3k, RE = 2k, R
1
= 56 k, R
2
= 20 k and
= 0.985. Determine (a) the coordinates of the operating points (b) the stability
factor S.
TUTORIAL NO. 6
Q. 1) For the circuit shown, prove that the stability factor S is given by

,
_

+
+
+

B c
c
R R
R
S

1
1
12 V
V
CC
Rc
Figure - 3
R
B
=60
V
CC
10 V
Rc
Figure - 4
R
B
=80
250
+

R
E
5000
100 F
12 V
V
CC
Rc
Figure - 3
R
B
=60
12 V
V
CC
Rc
Figure - 3
R
B
=60
V
CC
Rc
Figure - 3
R
B
=60
V
CC
10 V
Rc
Figure - 4
R
B
=80
250
+

R
E
5000
100 F
V
CC
10 V
Rc
Figure - 4
R
B
=80
250
+

R
E
5000
V
CC
10 V
Rc
Figure - 4
R
B
=80
250
+

R
E
5000
100 F
V
CC
18 V
Rc
Figure - 5
R
1
R
E
2K
1 k
R
2
2 k
7 k
R
E
1 k
V
CC
+15V
Rc
Figure - 6
R
1
R
2
10 k
V
CC
18 V
Rc
Figure - 5
R
1
R
E
2K
1 k
R
2
2 k
7 k
V
CC
18 V
Rc
Figure - 5
R
1
R
E
2K
1 k
R
2
2 k
7 k
R
E
1 k
V
CC
+15V
Rc
Figure - 6
R
1
R
2
10 k
R
E
1 k
V
CC
+15V
Rc
Figure - 6
R
1
R
2
10 k
3 K
Rc
V
CC
Figure - 1
300 K
R
B
+6 V
+12 V
V
BB
2 K
V
CC
6 V
Rc
Figure - 2
200 K
R
B
=50
3 K
Rc
V
CC
Figure - 1
300 K
R
B
+6 V
+12 V
V
BB
3 K
Rc
V
CC
Figure - 1
300 K
R
B
+6 V
+12 V
V
BB
2 K
V
CC
6 V
Rc
Figure - 2
200 K
R
B
=50
Rc
Figure - 2
200 K
R
B
=50
+
Vcc
Vin
R
B
R
C
V
out
V
BE

I
B
+
Vcc
Vin
R
B
R
C
V
out
V
BE

I
B
Q. 2) In the biasing with feedback resistor method, a silicon transistor with feedback resistor is
used. The operating point is at 7V, 1mA and Vcc = 12V, Assume = 100. Determine (a) the
value of RB (b) stability factor and (c) what will be the new operating point if = 50 with all
other circuit values are same.
Ans. : R
B
= 630 K , S=56.5
(C) Ic = 0.642 mA, V
CE
= 8.79 V
Q. 3) In a CE germanium transistor amplifier circuit, the bias is provided by self bias, i.e.
emitter resistor and potential divider arrangement, the various parameters are Vcc = 16V, Rc =
3K, RE=2K, R1=56 K, R2=20K and = 0.985. Determine (a) co-ordinates of the operating points
(b) the stability factor S.
Ans. : (a)Ic= 1.73 mA, VCE=7.35V (b) S=7.537
Q. 4) A voltage divider bias circuit is designed to establish the Q-point at VCE = 12V, Ic =
2mA and stability factor S< 5.1. If Vcc = 24V, VBE = 0.7 V, =50 and Rc = 47K. Determine the
values of RE, R1, R2. (Ans. : RE = 1.3 K, R1 = 6.4K, R2=6.5K)
+
Vcc
Vin
R
B
R
C
V
out
V
BE
I
B
Ic

+
Vcc
Vin
R
B
R
C
V
out
V
BE
I
B
Ic

Q. 5) For the two battery transistor circuit shown, prove that the stabilization factors is given
by
) (
1
1
b E
E
R R
R
s
+
+
+

Q. 6) Determine the stability factor S for the circuit shown.

Rc
R
B
B
R
E
+

V
1
+

V
2
Rc
R
B
B
R
E
+

V
1
+

V
2
R
1
R
2 Ro
B
Vcc
Rc
R
1
R
2 Ro
B
Vcc
Rc
Q.7 The transistor amplifier shown uses a transistor whose parameters are given (refer book).
Calculate AI =
i
I
I
0
, Av, Avs, Ro, Ri.
Q.8 For amplifier show calculate Ri,
'
i
R , Av, Avs and
'
I
A , =
1
2
I
I
(for the transistor
parameter refer book)
R
S
V
a
R
L

10 K
V
S
Ii
Ri
R
2
10 K
R
1
100 K
5 K
I
e

+
Vo
R
S
V
a
R
L

10 K
V
S
Ii
Ri
R
2
10 K
R
1
100 K
5 K
I
e

+
R
S
V
a
R
L

10 K
V
S
Ii
Ri
R
2
10 K
R
1
100 K
5 K
I
e

+
Vo
Vcc
R
L
V
S
10 K I
2

+
Vo
R
1
200 K
R
S
10 K
Ri
+

i
R
Vcc
R
L
V
S
10 K I
2

+
Vo
R
1
200 K
R
S
10 K
Ri
+

i
R
Q.9 For the circuit shown is a two stage amplifier circuit CE CC configuration. The transistor
parameters at corresponding Q-point are
hie=2 hfe= 50 hre=6x10
4
hoe = 25A/V
hic=2 hfc = -51 hrc = 1 hoc = 25A/V
Find the input, output impedances and
individual, as well as overall, voltage and
current gains.
Ai2= 45.3 Ri
2
= 228.5 K, Av
2
= 0.991
Ai1= 45.5 Ri
1
= 1.87 K, Av
1
= 16.6
1
15 /
O
Y A V

1
4.65
O
R K
3
2
7.7 10 /
O
Y x A V

127
O
R
1
A 43.2
A 115
V
Avs = -75.3
TUTORIAL NO. 7
Q. 1) (a) In terms of h-parameters and the source resistance, derive the equation for output
admittance.
(b) Find (i) Avs in terms of Av (ii) AIS in terms of AI.
(c) Derive the expression for Av in terms of AI.
(d) In terms of the h-parameter and the load impedance, derive the expression for (a) AI
and Ri.
Q.2 Derive the equation for voltage gain, current gain, input impedance and out put
impedance for a BJT using h-parameter model for (a) CE configuration (b) CB
configuration (c) CC configuration
Q.3. Draw the AC equivalent of a CE amplifier with fixed bias using h-parameter model.
Q.4. Justify the validity of approximate hybrid model applicable in low frequency region.
Q.5 What is Millers Theorem. Why it is used in hybrid models.
Q.6 Which of the configurations (CB, CE, CC) has the (a) highest Ri, (b) Lowest Ri (c)
Highest Ro (d) Lowest Ro (e) Lowest Av (f) highest Av. (g) Lowest AI (h) Highest AI.
(b) Draw the circuit of an emitter follower. List its three most important characteristics.
Q.7 For the figure shown is connected as common emitter amplifier. If RL = 10K. and Rs =
1K . Find the various gains and input and output impedance.
Vcc
V
S

+
Vo
RC
1

5 K
Q
1
R
S
1 K
Q
2
Rc
2
5 K
Vcc
V
S

+
Vo
RC
1

5 K
Q
1
R
S
1 K
Q
2
Rc
2
5 K
Q.8 (a) Draw the equivalent circuit for CE & CC configurations subjected to the restriction
that RL = 0, Show that the input impedance of the two circuits are same.
(b) Draw the circuits for the CE & CC configurations subjected to the restriction that the
input is open circuited. Show that output impedances of two are same.
Q.9 For any single transistor amplifier prove that RI = hi /(1-hr Av)
TUTORIAL NO. 8
Q.1 Why a field effect transistor is called so? Also explain why BJT is bipolar device while
FET is unipolar device.
Q.2 Define and explain the parameters transconductance gm, drain resistance rd and
amplification factor of a JFET. Establish the relation between them.
Q.3 Explain how the transconductance of a JFET varies with drain current and gate voltage.
Q.4 Show that if a JFET is operated at sufficiently low drain voltage, it behaves as a
resistance R given approximately by
1
1
1
]
1

,
_

2
1
1
P
gas
O
V
V
R
R
Q. 5 Given IDSS = 9 mA and VP = -3.5 V, determine ID when
(a) VGS = 0V
(b) VGS = -2V
(c) VGS = -3.5V
(d) VGS = -5V
Two port
active
Network
(Transistor)
V
1
V
2
Z
in
Yo
Rs
I
1
I
2

I
L
R
L
Vs

+
Two port
active
Network
(Transistor)
V
1
V
2
Z
in
Yo
Rs
I
1
I
2

I
L
R
L
Vs

+
Q.6 Determine the value of Rs required to self bias an N channel JFET with IDSS = 50 mA, Vp
= -10 V and VGSQ = 5 V.
(Ans.: Rs = 400 )
Q.7 In an N channel JFET biased by voltage divider method, determine value of RS to give
operating point ID = 4mA & VDS = 8V. Given VDD = 25 V, Rg1 = 1.2 M. Rg2 = 0.6
IDSS = 12 mA, Vp = -4 V.
(Ans.: 2.5 K )
Q.8 For JFET biased in self bias configuration. Determine VDS and VGS.
Given VDD = 25 V, RD = 3 K , RS = 400 and ID = 2mA
(Ans.: 18.2 V, -0.8 V)
Q.9 A common source FET amplifier uses load resistance RD = 100 K and an unbypassed
resistor RS is the source circuit. The FET has drain resistance rd = 200 k and = 20.
Compute the voltage gain and output impedance Ro, for the following values of Rs (i) 2
k (ii) 10 k and (iii) 20 k

(Ans.: -5. 847, -3.921, -2.777)
Q.10 A CD amplifier uses FET having rd = 300 k and = 15. Compute (a) the output
impedance and (b) the voltage gain for the following values of load resistance Rs (i) 100
k (ii) 300 K
(Ans.: 7895, 0.882)
TUTORIAL NO. 9
Q.1 What do you understand by feedback in amplifiers? Explain the terms feedback factor
and open loop gain.
Q.2 What are the advantages and disadvantages of positive and negative feedback.
Q.3 How does negative feed back reduce distortion in an amplifier? The distortion in an
amplifier is found to be 3% when the feed back ratio of negative feed back amplifier is
0.04. When the feed back is removed the distortion becomes 15%. Find the open loop
gain and closed loop gain.
Q.4 prove that the voltage series feed back with RS =0,
AIf = AI
Q. 5 An amplifier with open loop voltage gain AV = 1000 100 is available. It is necessary to
have an amplifier whose voltage gain varies by no more than 0.1 percent.
(a) find the reverse transmission factor of the feed back network used.
(b) find the gain with feed back.
Q.6 Explain the characteristics of Negative feed back amplifiers.
Q.7 Calculate the gain of negative feed back amplifier having A = -2000 and = -1/10.
Q.8 Calculate the gain, input and output impedances of a voltage series feedback amplifier
having A = -300, Ri = 1.5 k, Ro = 50 k and = -1/15.
Q.9 Calculate the gain with and without feed back for an FET amplifier for circuit values R1 =
800 k, R2 = 200 k, Ro = 40 k, RD = 8 k and gm = 5000S.
Q.10 An FET phase shift oscillator having gm = 6000 S, rd = 36 k and feed back resistor R =
12k is to operate at 2.5 kHz. Select C for specified oscillator operation.
TUTORIAL NO. 10
Q.1 How are amplifier classified based on the biasing condition?
Q.2 Explain the following type of distortion in amplifiers
(i) harmonic distortion (ii) frequency distortion (iii) phase distortion
Q.3 Draw the circuit diagram of a push pull amplifier and explain its working.
Q.4 Prove that the efficiency of class B amplifier is 78.5%.
Q. 5 For a class B amplifier providing a 20 V peak signal to a 16 load (speaker) and a power
supply of VCC = 30V, determine the input power , output power and the circuit efficiency.
Q.6 Calculate the harmonic distortion components for an output signal having fundamental
amplitude of 2.1 V second harmonic amplitude of 0.3 V third harmonic component of 0.1
V and the fourth harmonic component of 0.05V.
Q.7 For distortion reading of D2 = 0.15, D3 = 0.01 and D4 = 0.05 with I1 = 3.3 A and Rc =
4, calculate the total harmonic distortion fundamental power component and total
power.
Q.8 Calculate the gain, input and output impedances of a voltage series feedback amplifier
having A = -300, Ri = 1.5 k, Ro = 50 k and = -1/15.
Q.9 Calculate the gain with and without feed back for an FET amplifier for circuit values R1 =
800 k, R2 = 200 k, Ro = 40 k, RD = 8 k and gm = 5000S.
Q.10 An FET phase shift oscillator having gm = 6000 S, rd = 36 k and feed back resistor R =
12k is to operate at 2.5 kHz. Select C for specified oscillator operation.