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LI NI U.

- Ngy nay k thut vi iu khin tr nn quen thuc trong cc ngnh k thut v trong dn dng. T cc dy truyn sn xut ln n cc thit b gia dng chng ta u thy s hin din ca vi iu khin ( VK ). Cc b VK c kh nng x l nhiu hot ng phc tp m ch cn mt chip vi mch nh, n thay th cc t iu khin ln v phc tp bng nhng mch in gn nh, d dng thao tc s dng. VK khng nhng gp phn vo k thut iu khin m cn gp phn to ln vo pht trin thng tin. l s ra i ca hng lot thit b vin thng v truyn hnh hin i, c bit s ra i ca mng internet gp phn a con ngi ln nh cao ca nn vn minh nhn loi. - Chnh v cc l do trn, vic tm hiu kho st VK l iu m cc sinh vin ngnh in t chng em ht sc quan tm . Cc b iu khin s dng VK tuy n gin nhng vn hnh v s dng c li l mt iu rt phc tp. Phn cng vic s l chnh vn l con ngi chnh l chng trnh hay phn mm. Tuy chng ta thy cc my tnh ngy nay cc k thng minh, gii quyt cc bi ton phc tp trong vi phn triu giy nhng cng u l da trn s hiu bit ca con ngi. Nu khng c s tham gia ca con ngi th h thng VK cng ch l mt vt v tri. Do vy khi ni n VK cng nh my tnh bao gm phn cng v phn mm. Cc b VK theo thi gian cng pht trin rt nhanh cng vi cng ngh bn dn, t cc b VK 4 bit n gin ti cc b VK 32 bit. B VK 8 bit l c s chng ta tm hiu v s dng cc b VK ti tn hn, y chnh l bc u tin chng ta tm hiu su vo lnh vc ny. tm hiu b VK mt cch khoa hc v mang li hiu qu cao lm nn tng cho vic xm nhp cng ngh ti tn hn. Vic trang b nhng kin thc v VK cho sinh vin l ht sc cn thit. Xut pht t thc t ny em quyt nh thc hin ti Xy dng Module th nghim s dng vi iu khin AVR . - ti ca em gm 3 chng: Chng I: GII THIU V VI IU KHIN AVR Chng II: CC THIT B NGOI VI S DNG TRONG MODULE TH NGHIM Chng III: NI DUNG THIT K.

- Trong qu trnh thc hin ti do lng kin thc cn hn ch nn em khng trnh khi nhng thiu st. Em rt mong thy c ng gp kin em c th ng dng ti vo thc t. - Em xin chn thnh cm n nh trng cng cc thy c trong Khoa in in t tu bin quan tm, dy d gip chng em trong sut 4,5 nm hc ti Trng i Hc Hng Hi Vit Nam .c bit em xin chn thnh cm n Thy gio hng dn Thc S Nguyn nh Thch tn tnh ch bo v gip em c th hon thnh n ca mnh ng thi gian nh trng qui nh . Em xin chn thnh cm n ! Hi Phng , ngy 01 thng 01 nm 2013 Sinh Vin : Vn c Lp: TV49 H

Chng I : GII THIU V VI IU KHIN AVR


1.1. GII THIU V VI IU KHIN
1.1.1. Khi nim - Khi nim vi iu khin (microcontroller - MC) kh quen thuc vi cc sinh vin CNTT , in t , iu khin t ng cng nh C in t .N l mt trong nhng IC thch hp nht thay th cc IC s trong vic thit k mch logic .Ngy nay c nhng MC tch hp tt c cc chc nng ca mch logic .Ni nh vy khng c ngha l cc IC s cng nh cc IC mch s lp trnh khc nh PLC..khng cn dng na.MC cng c nhng hn ch m r rang nht l tc chm hn cc mch logicMC cng l mt my tnh my tnh nhng v n c y chc nng ca mt my tnh .C CPU , b nh chng trnh , b nh d liu ,c I/O v cc Bus trao i d liu . - Cn phn bit khi nim MC vi khi nim vi x l (microprocessor - MP) nh 8088 chng hn .MP ch l CPU m khng c cc thnh phn khc nh b nh I/O, b nh .Mun s dng MP cn them cc chc nng ny , lc ny ngi ta gi n l h vi x l (microprocessor system ) .Do c im ny nn nu la chn gia MC v MP trong mt mch in t no th tt nhin ngi ta s chn MC v n s r tin hn nhiu do tch hp cc chc nng khc vo trong chip . - Vy mt vi iu khin chy c th cn nhng iu kin g : Chng trnh (File Hex) Ngun cp

AVR
Ngoi vi Mch dao ng

Hnh 1.1 : Cu hnh chung ca mt mch s dng vi iu khin - Th nht l ngun cp, ngun cp l ci u tin, c bn nht trong cc mch in t, v vn v ngun l 1 trong nhng vn rt au u. Khng c ngun th khng th gi l 1 mch in c. Ngun cp cho vi iu khin l ngun 1 chiu. - Th hai l mch dao ng, mch dao ng lm g ? Gi s cc bn lp trnh cho con AVR : n thi im A lm 1 cng vic g , th th n ly ci g xc nh c thi im no l thi im A ? chnh l mch dao ng. V d nh mi ngi u

thng nht vo mt gi chun lm vic. C h thng vi iu khin cng vy, c h thng khi u ly xung nhp clock xung nhp mch dao ng lm xung nhp chun hot ng. - Th ba l ngoi vi, ngoi vi y l cc thit b giao tip vi vi iu khin thc hin 1 nhim v no m vi iu khin a ra. V d nh cc bn mun iu khin ng c 1 chiu, nhng v vi iu khin ch a ra cc mc in p 0-5V, v dng iu khin c my chc mA, vi ngun cp ny th ko th ni trc tip ng c vo vi iu khin iu khin, m phi qua 1 thit b khc gi l ngoi vi, chnh xc hn y l driver, ngi ta dng driver c th iu khin c cc dng in ln t cc ngun in nh. Cc bn phm, cng tc l cc ngoi vi. - Th 4 l chng trnh, y l file .hex np cho vi iu khin, chng trnh chnh l thut ton m bn trin khai thnh cc cu lnh ri bin dch thnh m hex np vo vi iu khin.

1.1.2 .Cc cng c hc AVR :


Ngn ng lp trnh : C, ASM Phn mm lp trnh : IAR, CodeVisionAVR, Keil C Mch np : STK200/300/500, Burn-E, Mch pht trin : Board trng, phn mm m phng, kit pht trin

1.2. KIN TRC VI IU KHIN AVR 1.2.1. Gii thiu v vi iu khin AVR
- AVR l tn gi chung cc vi x l ca hng ATMEL. Hng ATMEL sn xut cc vi x l vi cc chc nng, kh nng tnh ton khc nhau, c t tn khc nhau: ATtiny25, ATtiny48,ATmega8, ATmega16, ATmega128 - AVR l h vi iu khin 8 bit theo cng ngh mi, vi nhng tnh nng rt mnh c tch hp trong chip ca hng Atmel theo cng ngh RISC, n mnh ngang hng vi cc h vi iu khin 8 bit khc nh PIC, PSoC. Do ra i mun hn nn h vi iu khin AVR c nhiu tnh nng mi p ng ti a nhu cu ca ngi s dng, so vi h 8051, 89xx s c n nh, kh nng tch hp, s mm do trong vic lp trnh v rt tin li. - Cc tnh nng mi ca h AVR: Giao din SPI ng b. Cc ng dn vo/ra (I/O) lp trnh c. Giao tip I2C. B bin i ADC 10 bit.

Cc knh bm xung PWM. Cc ch tit kim nng lng nh sleep, stand by..vv. Mt b nh thi Watchdog. 3 b Timer/Counter 8 bit. 1 b Timer/Counter 16 bit.

1 b so snh analog. B nh EEPROM. Giao tip USART..vv.

- Cc vi x l khc nhau th khc nhau v dung lng b nh ROM, RAM, cc khi chc nng, s lng chn Trong ti liu ny, cc hng dn v v d c vit cho vi x l ATmega16. S chn, cc khi chc nng v cch s dng, c tnh lm vic ca vi x l c nh sn xut ghi trong file datasheet km theo, c th tm trn internet. Cc vi x l c lp trnh bng ngn ng lp trnh (trong ti liu ny s dng ngn ng lp trnh C) nh cc phn mm (AVRStudio, CodeVision).

Hnh 1.2 : Vi x l Atmega16 - Cc vi x l u c chung mt s c tnh in khi lm vic nh sau: - in p lm vic l +5V. - Dng in qua cc chn ca vi x l nh (c vi chc mA), nn khng th u trc tip vi iu khin vi cc thit b cng sut ln (ng c ).

1.3 VI X L ATMEGA16 1.3.1 u im.


Tc x l cao, tiu th in nng thp Kin trc 131 tp lnh thc thi hu ht trong mi chu k xung clock 32x8 thanh ghi a dng t tc ti a 16MIPS 16Mhz xung clock Dung lng b nh: 16Kb Flash, 512 EEPROM, 1KB Internal SRAM Kh nng ghi v xa c th t n 10000 ln, lu tr trong thi gian di trn 20 nm/85oC-100 nm 25oC. Giao tip chun JTAG h tr debug, Lock, Fuse bit 2 b Timer 16 bit, 1 b timer 16 bit 4 knh PWM 8 knh ADC 10 bit 32 port xut nhp H tr gioa tip I2C, USART, SPI Hot ng tt hiu in th 4.5-5.5 .

1.3.2 Kin trc


a, S chn:

Hnh 1.3: S chn Atmega16. - Tt c cc chn ca ATmega16 c nh s th t t 1 n 40 nh hnh v, chiu ca vi x l c ly theo u lm hoc chm trn trn vi x l.

- Khi lm vic, cc chn ca vi iu khin c hai mc trng thi l 0 v 1. Trng thi 0 ng vi mc in p 0 V cn trng thi 1 ng vi mc in p +5V. - Chc nng ca cc chn trn vi x l ATmega16 nh sau: Chn 10 VCC: L chn cp ngun +5V cho vi x l. Chn 11 v 31 GND: L hai chn ni vi ngun m. Khi thit k mch, phi ni c hai chn 11 v 31 vi ngun m. Chn 9 RESET: Bnh thng chn 9 trng thi 0, khi cp in +5V vo chn RESET, trng thi ca n t 0 ln 1, v reset li ton b hot ng ca vi x l, tng ng vi vic ngt ngun nui vi x l ri cp ngun li. Chn 12 XTAL1 v 13 XTAL2: L hai chn ni vi thch anh. Thch anh l mt linh kin c tc dng to dao ng in, vi x l s hot ng theo cc dao ng ny (v d 4Mhz, 12 Mhz). Trong mt s trng hp c th dng thch anh c gn sn trong vi x l, hai chn XTAL1 v XTAL2 c b trng. Chn 30 AVCC: L chn cp ngun cho khi chuyn i ADC (Analog to digital Converter). ADC l mt chc nng ca vi x l, cho php o in p t ti chn 33, 34, , 40 ca vi x l. Chn 32 AREF: in p tham chiu. Chn AREF c s dng khi cn dng chc nng ADC ca vi iu khin. Khi cn dng chc nng ADC, ngi dng cn t vo chn AREF mt in p, gi l in p tham chiu Cc chn 1 8: c nhm chung thnh mt cng, gi l PORT B, tng chn trong Port B c k hiu PB0, PB1, , PB7 ng vi cc chn t 1 n 8. Cc chn ny c th m nhim cc chc nng khc nhau, ty vo thit lp ca ngi dng khi lp trnh. Cc chn 14 21: c nhm chung thnh mt cng, gi l PORT D, tng chn trong Port D c k hiu PD0, PD1, , PD7 ng vi cc chn t 14 n21. Cc chn ny c th m nhim cc chc nng khc nhau, ty vo thit lp ca ngi dng khi lp trnh. Cc chn 22 29: c nhm chung thnh mt cng, gi l PORT C, tng chn trong Port C c k hiu PC0, PC1, , PC7 ng vi cc chn t 22 n 29. Cc chn ny c th m nhim cc chc nng khc nhau, ty vo thit lp ca ngi dng khi lp trnh. Cc chn 33 40: c nhm chung thnh mt cng, gi l PORT A, tng chn trong Port A c k hiu PA0, PA1, , PA7 ng vi cc chn t 1 n 8. Cc chn ny c th m nhim cc chc nng khc nhau, ty vo thit lp ca ngi dng khi lp trnh.

b, S khi:

Hnh 1.4: S khi Atmea16. c, Cc Port xut nhp: - Port A: L bn cnh l Port xut nhp thng thng 8 bit cn c thit k cho b ADC chuyn i tng t s. Port A thit k vi in tr ni treo ln mc cao. - Port B: L port xut nhp thng thng 8 bit.

- Port C: L port xut nhp thng thng 8 bit. Bn cnh Port C cn c mt s chn giao tip JTAG PC5-TDI, PC3-TMS, PC2 TCK. - PORT D: L port xut nhp thng thng 8 bit.

1.3.3 Cc khi chnh


a, CPU

Hnh 1.5 : S khi chnh CPU - AVR c cu trc Harvard, trong ng truyn cho b nh d liu (data memory bus) v ng truyn cho b nh chng trnh (program memory bus) c tch ring. Data memory bus ch c 8 bit v c kt ni vi hu ht cc thit b ngoi vi, vi register file. Trong khi program memory bus c rng 16 bits v ch phc v cho instruction registers. - ALU: ALU lm vic trc tip vi cc thanh ghi chc nng chung. Cc php ton c thc hin trong mt chu k xung clock. Hot ng ca ALU c chia lm 3 loi: i s, logic v theo bit.

- Thanh ghi trng thi:y l thanh ghi 8 bit lu tr trng thi ca ALU sau cc php tnh s hc v logic.

Hnh 1.6: Thanh ghi trng thi + C: Carry Flag c nh . + Z: Zero Flag C zero. + N: Negative Flag kt qu php ton m. + V: Twos complement overflow c b 2. + S For signed tests (S=N XOR V) kim tra 2 c N v V. + H: Half Carry Flag c s dng trong BCD cho mt s ton hng. + T: Transfer bit used by BLD and BST instructionsc s dng lm ni trung gian trong cc lnh BLD,BST. + I: Global Interrupt Enable/Disable Flag y l bit cho php ton cc ngt. Nu bit ny trng thi logic 0 th khng c mt ngt no c phc v. - Thanh ghi chc nng chung: Atmega 16 c 32 thanh ghi chc nng chung thc thi nhiu tc v trong :

Hnh 1.7: Thanh ghi chc nng chung Mt 8 bit output ton hng v mt 8 bit cho input kt qu. Hai 8 bit output ton hng v mt 8 bit cho input kt qu. Hai 8 bit cho output kt qu v mt 16 bit cho input kt qu.

Mt 16 bit cho output ton hng v mt 16 bit cho input kt qu. b, Con tr ngn xp SP

Hnh 1.8: Con tr ngn xp SP L mt thanh ghi 16 bit nhng cng c th c xem nh hai thanh ghi chc nng c bit 8 bit dng lu tr bin trong qu trnh tnh ton. Stack c hiu nh l 1 thp d liu, d liu c cha vo stack nh thp v d liu cng c ly ra t nh. Kiu truy cp d liu ca stack gi l LIFO. Khia bo SP ti mt vng nh trong SRAM vi a ch ca SP thit lp >$60. Con tr gim a ch xung 1 khi d liu c a vo Stack vi lnh PUSH v hai khi c Subroutine hoc Interrupt c gi. Con tr tng a ch ln 1 khi c lnh POP d liu thc hin v ln hai khi tr d liu v cho chng trnh con.

c, Memory B nh chng trnh Flash:

Hnh 1.9 : B nh Flash B nh Flash 16KB ca ATmega16 dng lu tr chng trnh vi rng 16 bit. Do cc lnh ca AVR c di 16 hoc 32 bit nn b nh Flash c sp xp theo kiu 8KX16.

B nh chng trnh ch gm 1 phn l Application Flash Section nhng trong cc chip AVR mi chng ta c thm phn Boot Flash section. Boot Section. Thc cht, application section bao gm 2 phn: phn cha cc instruction v phn cha interrupt vectors. Cc vector ngt nm phn u ca application section t a ch 0x0000 v di n bao nhiu ty thuc vo loi chip v phn cha instruction nm lin sau . Cc chng trnh c vit sau a ch .

B nh d liu SRAM:

Hnh 1.10:B nh SRAM y l phn cha cc thanh ghi quan trng nht ca chip, vic lp trnh cho chip phn ln l truy cp b nh ny . - B nh d liu EEPROM: ATmega16 cha b nh d liu EEPROM dung lng 512 byte, v c sp xp theo tng byte, cho php cc thao tc c/ghi tng byte mt. EEPROM c tch ring v c a ch tnh t 0x0000H.

1.4 CC MODULE IU KHIN TRONG ATMEGA 16 1.4.1 Input & Output


Vi iu khinATmega16c 32 ng vo ra chia lm bn Port: PORTA-PORTBPORTC-PORTD mi Port 8bit c th tng tc iu khin tng bit mt. Cc cng ra c in tr ni ko ln nn khi dng chc nng input ta khng cn dng in tr ko ln bn ngoi. Cc Port c iu khin bi cc b thanh ghi sau: thanh ghi d liu cng PORT, thanh ghi d liu iu khin cng DDR v cui cng l a ch chn vo ca cng PIN.

a, Thanh ghi DDR: y l thanh ghi 8 bit (ta c th c v ghi cc bit thanh ghi ny)
v c tc dng iu khin hng cng PORT (tc l cng ra hay cng vo). Nu nh mt bit trong thanh ghi ny c set th bit tng ng trn PORT c nh ngha nh mt cng ra. Ngc li nu nh bit khng c set th bit tng ng trn PORT c nh ngha l cng vo.

b, Thanh ghi PORT: y cng l thanh ghi 8 bit (cc bit c th c v ghi c) n l
thanh ghi d liu ca cng P v trong trng hp nu cng c nh ngha l cng ra th khi ta ghi mt bit ln thanh ghi ny th chn tng ng trn port cng c cng mc logic. Trong trng hp m cng c nh ngha l cng vo th thanh ghi ny li mang d liu iu khin cng. C th nu bit no ca thanh ghi ny c set (a ln mc 1) th in tr ko ln (pull-up) ca chn tng ng ca port s c kch hot. Ngc li n s trng thi hi-Z. Thanh ghi ny sau khi khi ng Vi iu khins c gi tr l 000.

c, Thanh ghi PIN: y l thanh ghi 8 bit cha d liu vo ca PORT (trong trng hp
PORT c thit lp l cng vo) v n ch c th c m khng th ghi vo c.

1.4.2 Timer&Counter
B nh thi (timer/counter0) l mt module nh thi/m 8 bit/16 bit, Atmega 16 c 4 b nh thi l Timer 0-Timer 2 8 bit v Timer 1 16 bit dng nh thi gian v m s kin vi cc c im sau: - B m mt knh - Xa b nh thi khi trong mode so snh (t ng np) - PWM - To tn s - B m s kin ngoi - B chia tn 10 bit

- Ngun ngt trn b m v so snh

a, Cu trc b nh thi 8 bit Timer 0


- S khi:

Hnh1.11: Cu trc b nh thi 8 bit Timer 0 Cc thanh ghi: - TCNT0 v OCR0 l cc thanh ghi 8 bit. Cc tn hiu yu cu ngt u nm trong thanh ghi TIFR. Cc ngt c th c che bi thanh ghi TIMSK. B nh thi c th s dng xung clock ni thng qua b chia hoc xung clock ngoi trn chn T0. Khi chn xung clock iu khin vic b nh thi/b m s dng ngun xung no tng gi tr ca n. - Ng ra ca khi chn xung clock c xem l xung clock ca b nh thi (clkT0). Thanh ghi OCR0 lun c so snh vi gi tr ca b nh thi/b m. Kt qu so snh c th c s dng to ra PWM hoc bin i tn s ng ra ti chn OC0.

b, S dng timer/Counter
Mt s gi tr cn lu khi s dng Timer/Counter: - BOTTOM: l gi tr thp nht m mt T/C c th t c, gi tr ny lun l 0. - MAX: l gi tr ln nht m mt T/C c th t c, gi tr ny c quy nh bi bi gi tr ln nht m thanh ghi m ca T/C c th cha c. V d vi mt b T/C 8 bit th gi tr MAX lun l 0xFF (tc 255 trong h thp phn), vi b T/C 16 bit th MAX bng 0xFFFF (65535).

- TOP: l gi tr m khi T/C t n n s thay i trng thi, gi tr ny khng nht thit l s ln nht 8 bit hay 16 bit nh MAX, gi tr ca TOP c th thanh i bng cch iu khin cc bit iu khin tng ng hoc c th nhp tr tip thng qua mt s thanh ghi.

1.4.3 ADC
Hu ht trong t nhin cc tn hiu cn x l dng tng t nh nhit , nh sng. Cc h thng s ch lm vic cc mc logic do ta cn chuyn i t tn hiu tng t sang tn hiu s. ADC l mt b chuyn i tng t sang s c s dng nhiu trong cc h thng iu khin. Atmega 16 tch hp sn Module ADC c input PORTA. y l b ADC vi nhng c im sau: phn gii 10 bit Sai s tuyn tnh: 0.5LSB chnh xc +/-2LSB Thi gian chuyn i:65-260s 8 Knh u vo c th c la ch C hai ch chuyn i free run C ngun bo ngt khi hon thnh Loi b nhiu trong ch ng

+ + + + + + + +

a, Cu trc
S khi:

Hnh 1.12 : Cu trc ADC

b, Cc thanh ghi iu khin ADC


C 4 thanh trong b ADC trn AVR trong c 2 thanh ghi data cha d liu sau khi chuyn i, 2 thanh ghi iu khin v cha trng thi ca ADC. - ADMUX (ADC Multiplexer Selection Register):

Hnh 1.13: Cu trc thanh ghi ADMUX L 1 thanh ghi 8 bit iu khin vic chn in p tham chiu, knh v ch hot ng ca ADC. + Bit 7:6- REFS1:0 (Reference Selection Bits): l cc bit chn in p tham chiu cho ADC, 1 trong 3 ngun in p tham chiu c th c chn l: in p ngoi t chn VREF, in p tham chiu ni 2.56V hoc in p AVCC. + Bit 5-ADLAR (ADC Left Adjust Result): l bit cho php hiu chnh tri kt qu chuyn i. S d c bit ny l v ADC trn AVR c phn gii 10 bit, ngha l kt qu thu c sau chuyn i l 1 s c di 10 bit (ti a 1023), AVR b tr 2 thanh ghi data 8 bit cha gi tr sau chuyn i. Nh th gi tr chuyn i s khng lp y 2 thanh ghi data, trong mt s trng hp ngi dng mun 10 bit kt qu nm lch v pha tri trong khi cng c trng hp ngi dng mun kt qu nm v pha phi. Bit ADLAR s quyt nh v tr ca 10 bit kt qu trong 16 bit ca 2 thanh ghi data. + Bits 4:0-MUX4:0 (Analog Channel and Gain Selection Bits): l 5 bit cho php chn knh, ch v c h s khuych i cho ADC. - ADCSRA (ADC Control and Status RegisterA):

Hnh1.14: Cu trc thanh ghi ADCSRA L thanh ghi chnh iu khin hot ng v cha trng thi ca module ADC.

+ Bit 7 - ADEN(ADC Enable): vit gi tr 1 vo bit ny tc bn cho php module ADC c s dng. + Bit 6 - ADSC(ADC Start Conversion): set bit ny ln 1 l bt u khi ng qu trnh chuyn i. Trong sut qu trnh chuyn i, bit ADSC s c gi nguyn gi tr 1, khi qu trnh chuyn i kt thc (t ng), bit ny s c tr v 0. + Bit 4 ADIF(ADC Interrupt Flag): c bo ngt. Khi mt chuyn i kt thc, bit ny t ng c set ln 1. + Bit 3 ADIE(ADC Interrupt Enable): bit cho php ngt, nu bit ny c set ADCL v ADCbng 1 v bit cho php ngt ton cc (bit I trong thanh ghi trng thi ca chip) c set, mt ngt s xy ra khi mt qu trnh chuyn i ADC kt thc v cc gi tr chuyn i c cp nht (cc gi tr chuyn i cha trong 2 thanh ghiH). + Bit 2:0 ADPS2:0(ADC Prescaler Select Bits): cc bit chn h s chia xung nhp cho ADC. - ADCL v ADCH (ADC Data Register):

Hnh 1.15:Cu trc thanh ghi ADCL ADCH - L 2 thanh ghi cha gi tr ca qu trnh chuyn i. Do module ADC trn AVR c phn gii ti a 10 bits nn cn 2 thanh ghi cha gi tr chuyn i. - SFIOR(Special FunctionIO Register C)

Hnh 1.16: Cu trc thanh ghi SFIOR - L thanh ghi chc nng c bit, 3 bit cao trong thanh ghi ny quy nh ngun kch ADC nu ch Auto Trigger c s dng. l cc bit ADTS2:0 (Auto Trigger Source 2:0) . Bng1.1 : ADC Auto Trigger Source Selections

Chng II GII THIU CC MODULE V CC LINH KIN DNG TRONG MCH


2.1. KHI VI IU KHIN 2.1.1 S kt ni khi vi iu khin .

J 1 0 3 J 1 0 5 G N D V C C r s t P B 7 P B 6 P B 5 1 2 3 4 5 6 C O N 6 1 1 1 1 2 4 6 8 1 3 5 7 9 1 1 1 3 1 5 P P P P P P P P B B B B B B B B 0 1 2 3 4 5 6 7 2 4 6 8

J 1 0 4 1 3 5 7 9 1 1 1 3 1 5 P P P P P P P P C C C C C C C C 0 1 2 3 4 5 6 7

0 2 4 6

1 1 1 1

0 2 4 6

8 X 2 U 1 0 3 ( ( ( ( ( ( ( ( E 2 1 ( ( ( ( ( ( ( X C T 1 I N O C S S M O M I S C T

8 X 2

V C C

R 1 0 1 1 k

1 0 1

1 0 7

P P P P P P P P r s

B B B B B B B B

0 1 2 3 4 5 6 7 1 1 1 1 1 1 1 1 1 1 2

1 2 3 4 5 6 7 8 9

G N D

G N D

2 2 p F

G N D

C 21 p0 F8 2

Y C

1 0 2 R Y S T A L

P P P P P P P

D D D D D D D

0 1 2 3 4 5 6

0 1 2 3 4 5 6 7 8 9 0

P B 0 P B 1 P B 2 P B 3 P B 4 P B 5 P B 6 P B 7 R E S V C C G N D X T A L X T A L P D 0 P D 1 P D 2 P D 3 P D 4 P D 5 P D 6 A

4 0 K / TP 0 A) 0 ( A D C 90 ) 3 ) P A 1 ( A D C 81 ) 3 T 2 / P A N 2 0 ( ) A D C 72 ) A I 3 0 / AP I A N 3 1 () A D C 63 ) 3 ) P A 4 ( A D C 54 ) 3 S I P A 5 ) ( A D C 45 ) 3 S O P A 6 ) ( A D C 36 ) 3 K ) P A 7 ( A D C 27 ) 3 A R E F3 1 G N D 3 0 A V C C2 9 P C 7 ( T O S 2C 8 2 P C 6 ( T O S 2C 7 1 R X D ) P C 5 ( T D 2 I6 ) T X D ) P C 4 ( T D 2 O5 ) I N T 0 ) P C 3 ( T M 2 S4 ) I N T 1 ) P C 2 ( T C 2 K3 ) O C 1 B P C 1 ) ( S D 2 A2 ) O C 1 A )P C 0 ( S C 2 L1 ) I C P 1 ) P D 7 ( O C 2 ) e g a 1 6 J 1 0 6

P P P P P P P P

A A A A A A A A

0 1 2 3 4 5 6 7 V C C

V C C

P ) P ) P P P P P P P

C C C C C C C C D

7 6 5 4 3 2 1 0 7

T m

J 1 0 7 2 4 6 8 1P A 3P A 5P A 7P A 9P A 1P 1 A 1P 3 A 1P 5 A 0 1 2 3 4 5 6 7 2 4 6 8

1 1 1 1

0 2 4 6

1 1 1 1

0 2 4 6

1 3 5 7 9 1 1 1 3 1 5

P P P P P P P P

D D D D D D D D

0 1 2 3 4 5 6 7

8 X 2

8 X 2

Hnh 2.1: S kt ni khi vi iu khin -S ny bao gm cc phn : Vi iu khin Atmega16 . Mch to dao ng dng thch anh 12MHz. Mch Reset . 1 Jack np 6 chn dng kt ni vi mch np . 4 Header 8x2 c dng lm cng ch thun tin cho vic kt ni vi cc thit b ngoi vi . 2.1.2. Mch to dao ng .

1 0 7

2 2

p F Y C R Y S 1

X 1 0 2 T XA 2 L

1 0 8

2 2

p F

Hnh 2.2: Mch tao dao ng ca Atmega16. - Atmega16 c mt b chia tn bn trong chip, b ny s cp xung clock cho cc khi trn chip t ngun dao ng bn ngoi qua 2 chn XTAL1 v XTAL2 . B chia tn c th hot ng hai ch : - Ch X1: ( ch mc nh): ch ny tn s thch anh c chia 12 ln, ngha l mt lnh c thc hin trong mt chu k my v tn s thch anh l 12 MHz th thi gian thc hin lnh s l 12 (us). - Ch X2: ch ny tn s thch anh c chia 6 ln , ch nay c dt bng cch t cc bit thanh ghi CLKCON0 v thanh ghi CLKCON1.

2.1.3 Mch Reset .


VC C R 1 0 1 1 k r s S W 1 0 1 t

Hnh 2.3 : Mch Reset ca Atmega16 - C 4 cch reset AT89S52 ln lt l: reset khi cp ngun, reset bi WDT, reset bng phn mm, reset bng mch ngoi qua chn RST.Trong mt h thng gm nhiu vi mch kh trnh th mt mch reset tch hp c 2 cch reset khi bt ngun v reset bi mch ngoi thng c s dng.

2.1 KHI GIAO TIP LED N

G N D

2.2.1 S khi giao tip 8 Led n .


VC C R 2 0R 1 2 0R 2 2 0R 3 2 0R 4 2 0R 5 2 0R 6 2 0R 7 2 0 3 3 0 3 3 0 3 3 0 3 3 0 3 3 0 3 3 0 3 3 0 3 3 0 1 1 1 1 1 1 1 1

D L 1E

D L 2E

D L 3E

D L 4E

D L 5E

D L 6E

D L 7E

1 3 5 7 9 11 13 15 J

0 1

Hnh 2.4 :S khi giao tip Led n - Khi qut led n c chc nng kim tra kh nng xut nhp ca cc Port. Tt c cc PortA, PortB, PortC, PortD ca vi iu khin u c kh nng xut nhp theo tng bit v tng byte.

2.3 KHI GIAO TIP MY TNH

2 4 6 8 1 1 1 1

0 2 4 6

2.3.1 Khi giao tip my tnh theo chun RS232


a). S kt ni
V J 4 0 1 2 1 O N 2 C 1 u F + C 1 u F + C 1 u F VC C 4 0 3 + 4 0 2 4 0 1 U 4 0 1 1 3 R 1 I NR 8 R 2 I NR VC C 16 1 2 U T 9 U T 1 4 U7 T U T C C

G N D

R 5 9 4 8 3 7 2 6 1

3 2

1 2

O O

1 1 1 0 T 1 I N T 1 O T 2 I N T 2 O 1 3 4 5 2 6 C C C C C V V 4 0 4 1 1 2 2 + + + G N D M 15 A

X 2 3 2

1 u F G N D

Hnh 2.5 : S khi ghp ni my tnh theo chun RS232 - cng Com.

b). Gii thiu v chun RS232 1 - Chun RS-232 (RS: Recommended Standard) ln u tin c gii thiu vo
nm 1962 bi Hip hi K thut in t EIA (Electronics Industries Association). y c xem nh l chun giao tip thng dng nht gia my tnh v cc thit b ngoi vi nh: my tnh khc, modem, mouse. 2 - RS-232 l phng php giao tip ni tip cho cc my tnh v cc thit b. RS232 l mt giao din kt ni mt DTE (Data Terminal Equipment) vi mt DCE (Data Communication Equipment). 3 - Truyn thng ni tip c 2 loi: ng b v khng ng b. Trong cch truyn ng b, dy k t c truyn s km theo k t ng b l SYN (m ASCII l 22). Phng thc ny cho tc truyn kh cao nhng do mch x l truyn v nhn (bao gm mch thm k t ng b, pht hin v bo sai) kh phc tp nn ch dng trong cc ng dng c yu cu cao v tc truyn. Cn trong cc ng dng thng thng, nht l cc ng dng trong lnh vc iu khin t ng, th khng c yu cu v tc m yu cu v tin cy nhng mch thc hin n gin, r tin. Khi , cch truyn khng ng b rt ph hp. 4 - Cng ni tip RS232 l mt giao din ph bin rng ri nht. Ngi ta cn gi cng ny l cng COM. Vic truyn d liu qua cng COM c tin hnh theo cch ni tip. Ngha l cc bit d liu c truyn i ni tip nhau trn mt ng dn. Loi truyn ny c kh nng dng cho nhng ng dng c yu cu truyn khong cch ln hn, bi v cc kh nng gy nhiu l nh ng k hn khi dng mt cng song song (cng my in).

- Cng COM khng phi l mt h thng bus, n cho php d dng to ra lin kt di hnh thc im vi im gia hai my cn trao i thng tin vi nhau, mt thnh vin th ba khng th tham gia vo cuc trao i thng tin ny .
5

6 Hnh 2.6 : S chn cng COM- DB9 * ngha cc chn tn hiu: Chn 1 (DCD) : Tn hiu pht hin mang d liu. Chn 2 (RxD) : Nhn d liu. Chn 3 (TxD) : Truyn d liu. Chn 4 ( DTR) : D liu cui sn sng. Chn 5 ( GND) : Ni t. Chn 6 (DSR) : D liu sn sng c gi. Chn 7 ( RTS) : Tn hiu yu cu gi. Chn 8 ( CTS) : Tn hiu yn cu xa gi tip. Chn 9 ( RI) : Ring Indicator. - V tn hiu cng COM thng mc +12V, -12V nn khng tng thch vi in p TTL nn giao tip KIT Vi iu khin Atmega16 vi my tnh qua cng COM ta phi qua mt vi mch bin i in p cho ph hp vi mc TTL, ta chn vi mch MAX232 thc hin vic tng thch in p.

c). Cc c tnh v in v c ca chun RS232 - c tnh in :

- RS232 s dng phng php truyn khng i xng (khng cn bng), tc l s dng tn hiu in p chnh lch gia mt dy dn v t. - Mc in p c s dng dao ng trong khong t -15V n +15V. Mc logic 1 l t -15V n -3V, mc logic 0 t +3V n +15V. Trong qu trnh chuyn i qua li gia cc mc logic th s xy ra thi gian qu trong khong t -3V n +3V. 1 - Mt u im ca chun RS232 l s dng cng sut pht tng i thp, nh tr khng u vo hn ch trong khong 3 7 K 2 - Tc truyn dn ph thuc vo chiu di dy dn. a s cc h thng hin nay ch h tr tc 19,2Kps. 3 - Chiu di cho php l 15m (50 feet). 4 - Truyn s liu Full-Duplex s dng 3 dy: TxD, RxD, GND. 5 - Cc tn hiu iu khin dng bt tay (Handshaking) phn cng l: RTS, CTS, DSR, DTR. 6 - Truyn khng ng b c cu trc khung truyn bao gm: 1 bit Start, 7-8 bit d liu, 1 bit Parity, 1-1.5-2 bit stop. 7 - Mt trong nhng yu cu quan trng ca RS-232 l thi gian chuyn i t mt mc logic ny sang mc logic khc khng vt qu 4% thi gian 1 bit. Vn ny lm gii hn chiu di ng truyn. Vi tc truyn 19200 baud c th truyn xa nht l 50ft (1ft = 30.48cm, 15.24cm) . Thng s iu kin in p u ra h mch 3K RL 7K in p u ra khi c ti -2V Vo 2V Tr khng u ra khi ct ngun Dng ra ngn mch in dung ti Tr khng u vo 3V VI 25V Ngng cho gi tr logic0 Ngng cho gi tr logic1 Bng 2.1 : Cc thng s quan trng ca chun RS232 Ti thiu 5V Ti a 25V 15V 300 500mA 2500pF 7K 3V

3K -3V

- c tnh c :
1 2

- c tnh c lin h n kt ni vt l gia DTE v DCE. - Ch h tr ti a 2 thit b kt ni vi nhau trn mt ng truyn.

- Ch truyn c ti a 15m, khong cch c th xa hn nu dng thm b Repeater


3

2.3.3 IC MAX 232.


- B vi iu khin Atmega16 c kh nng giao tip vi th gii bn ngoi thng qua cng ni tip. Vn tr ngi duy nht khi giao tip vi my tnh l mc logic b vi iu khin v cng COM ca my tnh khc nhau, c th nh sau: Bng 2.2 : Bng so snh in p ca cc mc logic gia RS232 v TTL. i tng Mc logic Mc in p tng ng Cng COM (RS232) Vi iu khin (Mc TTL) 1 0 1 0 -12V n -3V +3V n +12V +5V 0V

- Khc phc vn ny, ngi ta s dng vi mch MAX232 chuyn i mc in p gia hai chun. Vi mch ny c cha hai b chuyn i mc logic t TTL sang RS232 v ngc li.

Hnh 2.7 : S chn v hnh nh thc t ca MAX232 - Vi mch MAX 232 c hai b m truyn v hai b m nhn. ng dn iu khin li vo CTS, iu khin vic xut ra d liu cng ni tip khi cn thit, c ni vi chn 9 ca vi mch MAX 232. Cn chn RTS (chn 10 ca vi mch MAX 232) ni vi ng dn bt tay iu khin qu trnh nhn. - Thng th cc ng dn bt tay c ni vi cng ni tip qua cc cu ni, khi khng dng n na c th h mch cc cu ny. Cch truyn d liu n gin nht l ch dng ba ng dn TxD, RxD v GND (mass).

2.3.4. Phng thc truyn d liu gia MAX232 v cng COM.

- Chun RS232 c giao din kt ni im im. Ch yu s dng 2 chn RxD (chn 2) v TxD (chn 3) trao i d liu. Khi my tnh cn truyn d liu n cc thit b th thng qua chn TxD, my tnh gi d liu ca n n cc thit b khc. Trong khi d liu m my tnh nhn c, li c dn n chn ni RxD. Cc tn hiu khc ng vai tr nh l tn hiu h tr khi trao i thng tin v v vy khng phi trong mi ng dng u dng n. - Cc bit d liu c gi i theo kiu o ngc, ngha l cc bit c gi tr 1 s c mc in p LOW, cc bit c gi tr 0 s c mc in p HIGH. Mc tn hiu nhn v truyn qua chn RxD v TxD thng thng nm trong khong 12V n +12V. Mc in p LOW i bit 1 nm gia -3V n -12V, mc in p HIGH vi bit 0 nm trong khong +3V n +12V. - Mt chui d liu truyn i theo dng ni tip nhau trn mt ng dn: bt u bng mt bit khi u (Start bit), tip theo l cc bit d liu (data bit), bit thp i trc. S bit d liu nm trong khong 5 n 8 bit, tip l bit kim tra chn l (Parity) v cui cng l bit kt thc (stop bit). Hnh thc truyn ny c kh nng dng cho nhng khong cch ln, bi v cc kh nng gy nhiu l nh hn l dng cng song song. Tc truyn c thit lp bng tham s Baudrate, l s bit truyn i trong 1 giy, thng thng l 300, 600, 1500, 2400, 4800, 9600 v 19200 - Mt nhc im khng nh ca cng ni tip l tc truyn d liu b hn ch.

2.4. MCH GIAO TIP MY TNH QUA RS485 2.4.1 Chun giao tip RS485
- Ta dng cng ni tip (cng COM) thc hin giao tip gia PC vi cc Kit Vi x l. Cc nh sn xut my tnh chun ho giao tip cho cng ni tip (cng COM) l chun RS-232. Tuy nhin chun RS-232 ch cho php ghp ni IM IM, do khng th p dng cho mng cn thit k. Vic chn mt chun truyn thng khc l cn thit, v s dng chun RS-485 l chn la hp l. - Mng s dng chun RS-485 rt a dng: ta c th ghp ni cc PC vi nhau, hoc gia PC vi cc Vi x l, hoc bt k thit b truyn thng ni tip bt ng b no. Khi so snh vi Ethernet v nhng giao din truyn thng theo nhng chun khc th giao din RS-485 n gin v gi thnh thp hn nhiu. - i vi mt mng Multi-network thc s gm nhiu mch pht v nhn cng ni vo mt ng dy bus chung, mi node u c th pht v nhn data th RS485 p ng cho yu cu ny. Chun RS-485 cho php 32 mch truyn v nhn cng ni vo ng dy bus (vi b lp Repeater t ng v cc b truyn nhn tr khng cao, gii hn

ny c th m rng ln n 256 node mng). Bn cnh RS-485 cn c th chu c cc xung t data v cc iu kin li trn ng truyn. - Mt s u im ca RS-485: Gi thnh thp. Cc b iu khin Driver v b nhn Receiver khng t v ch yu cu cung cp ngun n +5V to ra mc in p vi sai ti thiu 1.5V ng ra vi sai. Kh nng ni mng. RS-485 l mt giao din a im, thay v gii hn hai n v, RS-485 l giao din c th cung cp cho vic kt ni c nhiu b truyn v nhn. Vi b nhn c tr khng cao kt hp vi b repeater, RS-485 c th cho kt ni ln n 256 node. Kh nng kt ni: RS-485 c th truyn xa 1200m, tc ln n 10Mbps. Nhng 2 thng s ny khng xy ra cng lc. Khi khong cch truyn tng th tc baud gim. V d: khi tc l 90Kbps th khong cch l 1200m, 1Mbps th khong cch l 120m, cn tc 10Mbps th khong cch l15m. - S d RS-485 c th truyn trn mt khong cch ln l do chng s dng ng truyn cn bng. Mi mt tn hiu s truyn trn mt cp dy, vi mc in p trn mt dy l in p b (tri du) vi in p trn dy kia. Receiver s p ng phn hiu gia cc mc in p. - Khi thc hin trao i thng tin tc cao, hoc qua mt khong cch ln trong mi trng thc, phng php n cc (single-ended) thng khng thch hp. Vic truyn dn d liu vi sai (hay tn hiu vi sai cn bng) cho kt qu tt hn trong phn ln trng hp. Tn hiu vi sai c th loi b nh hng do s thay i khi ni t v gim nhiu c th xut hin nh in p chung trn mng. Khi ng dy qua mi trng nhiu, nhiu tc ng ln hai dy l nh nhau. V Receiver nhn tn hiu bng cch ly chnh lch p gia hai ng dy (vi sai), nn nhiu c t ng trit tiu. Ngc li, RS-232 dng dy bt cn bng hay n cc, b nhn p ng theo s khc bit mc in p tn hiu v ng dy t dng chung (mt giao din bt cn bng c th c nhiu dy t nhng tt c u c ni li vi nhau). Do tn hiu nhn c Receiver l tn hiu t b Transmitter cng vi nhiu v st p trn ng dy, iu ny c th lm cho d liu m Receiver c c b sai lch. - Mt thun li khc trn ng dy cn bng l chng trnh c (trong mt gii hn no ) s chnh lch in th trn dy t gia b truyn v b nhn. Trong mt lin kt di, in th t gia b truyn v b nhn c th chnh lch nhau. i vi ng dy bt cn bng, iu ny c th lm b nhn c sai tn hiu vo, nhng i vi ng dy cn bng, s chnh lch ny khng nh hng g bi b nhn ch phn bit mc logic trn u vo da vo s khc bit gia hai dy tn hiu.

- Trn thc t cc linh kin RS-485 ch chu c s chnh lch in p gia cc t trong gii hn ch nh trong Datasheet. Mt cch khc kh hoc gim vn in p t ny l cch ly ng kt ni in th t ca b truyn v b nhn khng b nh hng ln nhau. - V c kh nng chng nhiu tt nh vy nn chun RS-485 c kh nng truyn d liu trn mt khong cch xa. Chun TIA/EIA-485 gi hai ng dy vi sai l A v B. Ti b truyn tn hiu vo c mc logic TTL cao s lm cho mc p trn dy A dng hn trn dy B, v mc logic thp s lm cho in p trn dy B dng hn dy A. Ti b nhn, nu mc p trn dy A dng hn dy B th mc logic TTL s xut ra l cao, ngc li l thp. - Ti b nhn RS-485, tm vi sai u vo A v B ch cn trn 0.2V (tc 200mV). Nu p ti A ln hn B 0.2V th b nhn s hiu y l mc logic 1, ngc li s hiu l mc logic 0. Nu chnh lch gia A v B nh hn 0.2V, mc logic s khng c xc nh. S khc nhau v yu cu in p ti b truyn v b nhn to ra gii hn nhiu khong 1.3V, tn hiu vi sai c th mo dng hoc c xung nhiu bng 1.3V v to b nhn vn nhn c ng mc logic. Gii hn nhiu ny tuy nh hn so vi RS-232 nhng ta nn nh rng tn hiu vi sai ca RS-485 c trit tiu phn ln nhiu t khi mi bt u.

2.4.2 S kt ni mch giao tip my tnh vi MAX485


J 5 0 1 2 3 H E A D E R 3 U 4 3 2 M D D R A 5 I E E 2

V C 0 1 8 VC C

C 6 7 O 1 J R R 5 0 1 E S I S 1 T2 O C 5 0 R O N 2 1

A B G N D R

X 4 8 5 G N D 5

Hnh2.8 : S kt ni mch giao tip my tnh vi MAX485

2.4.3 IC MAX485

Hnh 2.9 : S d chn v hnh nh thc t ca IC MAX485 Chc nng cc chn IC MAX485 : Chn 1 (RO) : Ng ra b thu Nu A>B l 200mV, RO cao Nu A<B l 200mV,RO thp Chn 2 ( ) : Cho php ng ra b thu. thp. cao. RO c cho php khi RO l tr khng cao khi

Chn 3 (DE): Cho php ng ra pht. Cc ng ra pht A v B c cho php khi DE cao. Cc ng ra pht A v B l tr khng cao khi DE thp. Chn 4 (DI) : Ng vo b pht DI thp th A thp Bcao. DI cao th A cao B thp. Chn 5 (GND): Ni mass Chn 6 (A) : Ng vo b thu v ng ra b pht u khng o. Chn 7 (B): Ng vo b thu v ng ra b pht u o. Chn 8 (Vcc): Ngun cung cp 4.75V< Vcc < 5.25V.

2.5 KHI GIAO TIP LCD 2.5.1 S khi giao tip LCD.

J VC C S 1 / W2 3 4 D 4 5 9D 0 5 1 6 D 6 7 D 7 8 C R 5 6 R E S I S 9 0 1 V C T O G N D R R E

U 7 8 9 D D D D 1 14 15 16 17 0 1 2 3 4 D D D D D D D D 0 1 2 3 4 5 6 7

9 0

1 1

V D D V 0 3 2 S / W V R

R S 4R R / W 5R E 6E A K 1 1

O C R

L C
V S S 1

Hnh 2.10 : S khi giao tip LCD - LCD c s dng trong ti l loi hin th k t ( character LCD) kch c 16x2. Mi k t c to bi mt ma trn cc im sang kch thc 5x7 hoc 5x10.

2.5.2 ngha cc chn ca LCD hin th k t .


- Hu ht cc module LCD hin th k t c thit k da trn b iu khin HD 44780 ca Hitachi nn chng c tp lnh v chn tng thch nhau.

Hnh 2.11 : S nguyn l ca LCD 16x2.

Chn 1 2 3

K hiu VSS VCC VEE

G N D

Mc logic -

I/O -

Chc nng Ngun (GND) Ngun (+5V) Chnh tng phn

0=Nhp lnh 1= Nhp d liu 5 R/W 0/1 I 0=Ghi d liu 1=c d liu 6 E 1.1 0 I Tn hiu cho php 7 DB0 0/1 I/O Bus d liu 0 8 DB1 0/1 I/O Bus d liu 1 9 DB2 0/1 I/O Bus d liu 2 10 DB3 0/1 I/O Bus d liu 3 11 DB4 0/1 I/O Bus d liu 4 12 DB5 0/1 I/O Bus d liu 5 13 DB6 0/1 I/O Bus d liu 6 14 DB7 0/1 I/O Bus d liu 7 15 Lampn LCD 16 Lamp+ n LCD Bng 2.3 : Bng cc chn ca Module LCD c ti a 80 k t . Trong : - Cc chn Vcc, Vss v Vee th :Chn Vcc cp dng ngun 5V, chn Vss ni t, chn Vee c dng iu khin tng phn ca mn hnh LCD. - Chn RS ( Register select) : Khi mc thp, ch th c truyn n LCD nh xo mn hnh ,v tr con tr .Khi mc cao, k t c truyn n LCD - Chn R/W (Read/Write) : Dng xc nh hng ca d liu c truyn gia LCD v vi iu khin. Khi n mc thp d liu c ghi n LCD v khi mc cao, d liu c c t LCD. Nu chng ta ch cn ghi d liu ln LCD th chng ta c th ni chn ny xung GND tit kim chn . - Chn E (Enable) :Cho php ta truy cp/xut n LCD thng qua chn RS v R/W.Khi chn E mc cao (1) LCD s kim tra trng thi ca 2 chn RS v R/W v p ng cho ph hp. Khi d liu c cp n chn d liu th mt xung mc cao xung thp phi c p n chn ny LCD cht d liu trn cc chn d liu. Xung ny phi rng ti thiu l 450ns. Cn khi chn E mc thp (0), LCD s b v hiu ho hoc b qua tn hiu ca 2 chn RS v R/W. - Cc chn D0 - D7 : y l 8 chn d liu 8 bt, c dng gi thng tin ln LCD hoc c ni dung ca cc thanh ghi trong LCD. Cc k t c truyn theo m tng ng trong bng m ascii. Cng c cc m lnh m c th c gi n LCD xo mn hnh hoc a con tr v u dng hoc nhp nhy con tr.

RS

0/1

- LCD c 2 ch giao tip, ch 4 bit (ch dng 4 chn D4 n D7 truyn d liu) v ch 8 bit (dng c 8 chn d liu t D0 n D7), ch 4 bit, khi truyn 1 byte, chng ta s truyn na cao ca byte trc, sau mi truyn na thp ca byte. - Trc khi truyn cc k t ra mn hnh LCD ta cn thit lp cho LCD nh chn ch 4 bit hoc 8 bit, 1 dng hay 2 dng ,bt/tt con tr

2.5.3. Nguyn tc hin th k t trn LCD.


Mt chng trnh hin th k t trn LCD s i qua 4 bc sau: 1. Xa ton b mn hnh. 2. t ch hin th. 3. t v tr con tr ( Ni bt u ca k t hin th). 4. Hin th k t. - Cc bc 3 v 4 c th c lp i lp li nhiu ln nu cn hin th nhiu k t . - Mi khi thc hin ghi lnh hoc ghi d liu hin th ln LCD u phi kim tra c bn. Tuy nhin c mt s loi LCD khng cho php kim tra c bn v vy b VK cn phi ch ng phn phi thi gian khi ra lnh cho LCD. - Ch hin th mc nh s l hin th dch, v tr con tr mc nh s l u dng th nht. - iu khin hot ng ca LCD nn s dng Port 2 hoc Port 1 cho vic xut nhp d liu. Cc chn to tn hiu iu khin RS, RW, EN_LCD c th chn ty trong cc chn ca Port cn li.

2.6 KHI GIAO TIP LED MATRIX 8x8 2.6.1. C bn v led ma trn.
- Led ma trn l mt lot cc led n c sp xp thnh cc hng v cc ct dng ma trn, cc led c cng hng th s chung 1 chn, chn cn li ni chung vi cc led nm cng ct. - Ma trn led c ng dng rt nhiu trong thc t, in hnh l cc bng quang bo. - iu khin led ma trn sng theo mun, chng ta s dng phng php qut led, li dng tnh nng lu nh mt ngi, trong cc bin qung co, chng ta nhn thy led sng lin tc, thc ra khng phi vy, m l led nhp nhy lin tc, nhng do tc cao nn mt ngi khng kp phn bit v kt qu l chng ta nhn thy 1 hnh nh lin tc. - C 1 cch qut led ma trn l qut theo hng v qut theo ct, trong ti ca mnh em s trnh by cch qut theo hng (ma trn led ta s dng l ma trn kch c 8x8), y cng l cch qut led ph bin hin nay.

VC C R 1 C 4 J 2 4 6 8 1 1 1 1 0 2 4 6 H E A D 7 0 1 1 3 5 7 9 1 1 1 9 1 1 1 1 1 1 1 R 8 0 1 2 3 4 5 6 1 2 3 4 5 6 7 8 9 8 7 6 5 4 3 2 M c c c c c c c c a 1 2 3 4 5 6 7 8 t r i x h h h h h h h h 1 2 3 4 5 6 7 8 8 x 8 K 7 D 1 1 1 1 1 1 1 1 1 2 3 4 5 6 7 8 U U O O O O O O O O 7 L U U U U U U U U

G N D

T 7 0

G N D

C 8I 7I 6I 5I 4I 3I 2I 1I

O N N N N N N N N

1 M 8 87 76 65 54 43 32 21 1

C 2 4 6 8 1 1 1 1 0 2 4 6

C J

7 0

2 1 3 5 7 9 1 1 1 3 1 5

1 3 5 E

T T T T T T T T

X 2

0 1 N 2 8 0 3

8 X 2

Hnh 2.12 : S khi giao tip Led ma trix8x8 vi Atmega16

2.6.2 IC m dng ULN2803.


a). Gii thiu : - ULN 2803 l mt vi mch m, bn cht cu to l cc mng darlington chu c dng in ln v in p cao trong c cha 7 cp darlington cc gp h vi cc pht chung. Mi knh trong s 7 knh u c th chu c dng in ln trong mt khong thi gian di ln ti 500 mA vi bin nh ln ti 600 mA. Mi knh c mt diode chn- diode ny c th s dng trong trng hp ti c tnh cm ng, v d nh cc rle - ng dng ca ULN2803 c s dng trong cc mch m iu khin ng c mt chiu ,ng c bc, khi hin th ma trn led

Hnh 2.13 : S chn ULN2803 b) Chc nng cc chn:

Hnh 2.14 : Cu trc bn trong ULN2803 Trong : - Chn 9 ni GND . - Chn 10 ni Vcc. - Chn 18 : Gm 8 ng vo I1 I8. - Chn 1118 : Gm 8 ng ra O1O8. -Theo s ta thy vi mi b m c mt diode kt ni theo kiu anod c kt ni vi ng ra cn catod c ni chung vi catot ca cc diode cn li. Ng ra ca vi mch l cc cc gp h, ti c ni gia ngun nui v ng ra ca vi mch m. Ngun nui l ngun in p dng bt k nh hn 50V, chng hn ti l ng c bc th ngun nui l 12V, ti l h thng hin th ma trn led th ngun nui l 5Vdng qua ti phi c tnh ton sao cho dng chy lu di nh hn 500 mA v dng nh nh hn 600 mA tnh trn mi mch. - Bn trong ULN 2803 c mc thm cc Diode trnh dng ngc khi iu khin cc thit b c cun dy (v d: rle ) - Nguyn l hot ng: - Nu cc chn u vo I1 I8 l mc 0 th ng ra th ni. - Nu cc chn u vo I1 I8 l mc 1 th ng ra mc 0 - L do la chn: - c bn rng ri trn th trng vi gi tng i r.

- ULN 2803 m c 8 ng ring bit (ni trc tip c vi 8 chn ca vi iu khin 5V). - Dng ra ti 500 mA/ 50V kch cc R le.

2.6.3. LED MATRIX 8X8.


a). S nguyn l ca ma trn led 8x8.

Hnh 2.15 : S chn v hnh nh thc t ca led matrix8x8. - Cc led trn cng mt hng c ni chn dng vi nhau. - Cc led trn cng mt ct c ni chn m vi nhau. - Trng thi ca mi led c quyt nh bi tn hiu in p 5v a vo ng thi c 2 chn. VD : led sng th in p 5v phi a vo chn dng cn chn m ni mass. Led tt th khng c in p ni vo chn dng. b) Cch qut led ma trn 8x8. - Ti mt thi im th ch c trng thi ca mt im nh c xc nh. xc nh cc trng thi v a ch im nh tip theo th cc im nh cn li s chuyn v trng thi tt( led ang sng s chuyn v trng thi tt dn ). V th hin th c ton b hnh nh ca ma trn led ta c th qut ma trn led nhiu ln vi tc qut rt ln( ln hn nhiu ln thi gian kp tt ca n). - Mt ngi ch nhn bit c ti a 24 hnh/s. Do nu tc qut rt ln th s khng nhn ra c s thay i ca n m s thy c ton b hnh nh cn hin th.

2.7 B CHUYN I ADC 2.7.1. Gii thiu v ADC


- Chng ta bit rng cc tn hiu th gii xung quanh chng ta ton l cc tn hiu tng t : dng in 220VAC, dng in 5V, sc gi, tc ng c, tuy nhin vi iu khin ch x l c cc tn hiu s : 10101, nh vy, cn phi c 1 thit b no chuyn i qua li gia 2 loi tn hiu ny, l l do v sao chng ta c cc b ADC v DAC. ADC l 1 thit b dng chuyn i tn hiu tng t thnh tn hiu s. cn DAC th ngc li, chuyn tn hiu s thnh tn hiu tng t. - Atmega16 c 8 chn ca PORTA s dng lm 8 knh u vo ADC. s dng tnh nng ADC ca Atmega16 chng ta cn phi thit k phn cng ca Vi iu khin nh sau: - Chn AVCC chn ny bnh thng khi thit k mch chng ta a ln Vcc(5V) nhng khi trong mch c s dng cc knh ADC ca phn cng th chng ta phi ni chn ny ln Vcc qua 1 cun cm nhm mc ch cp ngun n nh cho cc knh (u vo) ca b bin i. - Chn AREF chn ny cn cp 1 gi tr in p n nh c s dng lm in p tham chiu, chnh v vy in p cp vo chn ny cn n nh v khi n thay i lm gi tr ADC cc knh thu c b tri (thay i ) khng n nh vi 1 gi tr u vo chng ta c cng thc tnh nh sau: ADCx=(V_INT*1024)/ AREF - Chng ta thy gi tr ADCx t l thun vi in p vo V_INT. Gi tr ADC thu c t cc knh c lu vo 2 thanh ghi ADCH v ADCL khi s dng chng ta phi c gi tr t cc thanh ghi ny, khi s dng ch 8 bt th ch lu vo thanh ghi ADCL. - Cc thanh ghi lin quan - ADMUX (ADC Mutiplexer Selection Register) : L thanh ghi iu khin vic chn in p tham chiu, knh v ch hot ng ca ADC. 7 6 5 4 3 2 1 0 REFS1 REFS0 ADLAR MUX4 MUX3 MUX2 MUX1 MUX0 R/W R/W R/W R/W R/W R/W R/W R/W - ADCSRA (ADC Control and Status Register A) : L thanh ghi iu khin hot ng v cha trng thi ca module ADC.

7 ADEN

6 ADSC

5 ADATE

4 ADIF

3 ADIE

2 ADPS2

1 ADPS1

0 ADPS0

R/W R/W R/W R/W R/W R/W R/W R/W - ADCL v ADCH (ADC Data Register) : L 2 thanh ghi cha gi tr ca ADC sau qu trnh chuyn i.

2.7.2 S b chuyn i ADC.


VC C 1 R C J 2 4 6 8 H E A D 1 0 0 1 3 5 7 E R 4 1 1 2 3 4 X 2 C 1 0 0 2 1 0 0 1 1 0 0 1 3 4 R 1 0 0 4 R 1 0 0 3 C 1 0 0 3 C 1 0 0 4

Hnh 2.16 : S kt ni b chuyn i ADC vi Atmega16

2.8 KHI GIAO TIP LED 7 ON VI AT16 2.8.1 S khi giao tip Led 7 on :

G N D

R 1002

V 1

V 1

6 0 1

1 0 1

1 5 k R 6 0 9 Q

6 0 2

0 1 5R 1 k

6 1 0

6 0 3

0 1 5 6 1 1

0 4 3

1 0

1 5R 1 k

6 1 2

1 k R 2

6 0 1 VC C VC C

6 0 VC C

2 VC C

6 0 VC C

3 VC C

6 0 4 VC C H J 6 0 1 E A D VC C

A B C D E F G H

A B C D E F G H

A B C D E F G H

R R 6 R 60 R 601R 602R 603R 604R 605 606 07 8 1 10 100 10 100 100 00 1 0 10 00 0

J A B C D E F G H 2 4 6 8 1 1 1 1 0 2 4 6

6 0 2

R 6 1 4 . 7 k R 6 4 . 7 R 6 4 . 7 R 6 1 4 . 7 k

3 1 4 k 1 5 k 6

1 3 5 7 9 11 13 15

1 3 5 7

A B C D E F G H E

4 X 2

8 X 2 2 4 6 8

Hnh 2.17 : S kt ni led7 on vi Atmega16

2.8.2 C bn v Led 7 thanh.


- Led 7 thanh l linh kin in t dng hin th s. u im ca led 7 thanh l gi thnh r, khong cch quan st xa v d dng trong lp trnh. Nhc im l led 7 thanh ch hin th c 1 s k t nht nh. Led 7 thanh c 2 loi l anot chung v catot chung.

Hnh 2.18: Hnh dng thc t v hnh dng nguyn l Led 7 on loi Anode chung v Katot chung * Nguyn l hin th qut: iu khin cho n led 7 on ta s dng n ng dy iu khin cp ngun cho cc led v 8 ng dy s liu chung cho tt c cc led. Vic hin th c thc hin bng cch ln lt cp ngun cho cc led v a s liu tng ng ca

led ra 8 ng dy s liu. Nh vy thc cht ti mt thi im ch c 1 led hot ng cn li cc led khc khng hot ng v khng c cp ngun. Tuy nhin do c tnh lu nh ca mt m ta thy tt c cc led u hot ng. Bng 2.4 : Bng m hin th Led 7 on dnh cho led 7 on c Anode chung (Cc Led n sang mc 0): S hin th trn led 7 M hin th led 7 on dng M hin th led 7 on dng thp on nh phn lc phn hgfedcba 0 11000000 C0 1 11111001 F9 2 10100100 A4 3 10110000 B0 4 10011001 99 5 10010010 92 6 11000010 82 7 11111000 F8 8 10000000 80 9 10010000 90 A 10001000 88 B 10000011 83 C 11000110 C6 D 10100001 A1 E 10000110 86 F 10001110 8E 10111111 BF

2.9 KHI GHP NI MA TRN PHM 4x4 2.9.1 S kt ni ma trn phm vi Atmega16.

V C C

C 1
R 3 R0 3 R0 3 R 0 3 0 1 1 4 2 S W 1 3 4 S

C 2
W 2 S

C 3
W 3 S W

C 4
4

1 0 k 0 k 0 1 0 k 2 1 1 k

R 1

R 2
S W 9 S W 1 0 S W 1 1 S W 1 2

R 3
S W 1 3 S W 1 4

1 5

1 6

R 4

R 3R 2R 1R 0C 3C 2C 1C 0

1 3 5 7 9 11 13 15

J H

6 0 0 3 E A D E R 8 X 2

2 4 6 8 1 1 1 1

0 2 4 6

Hnh 2.20: S kt ni ma trn phm vi Atmega16.

2.9.2 C bn v ma trn phm Keypad4x4 .

Hnh2.21: Ma trn phm 4x4. - Keypad l mt "thit b nhp" cha cc nt nhn cho php ngi dng nhp cc ch s, ch ci hoc k hiu vo b iu khin. Keypad khng cha tt c bng m ASCII nh keyboard v v th keypad thng c tm thy trong cc thit b chuyn dng. Cc nt

nhn trn cc my tnh in t cm tay l mt v d v keypad. S lng nt nhn ca mt keypad thay i ph thuc vo yu cu ng dng. Trong mch th nghim ny s gii thiu cch iu khin ca mt loi keypad n gin, keypad 4x4. - Gi l keypad 4x4 v keypad ny c 16 nt nhn c b tr dng ma trn 4 hng v 4 ct. Cch b tr ma trn hng v ct l cch chung m cc keypad s dng. Cng ging nh cc ma trn LED, cc nt nhn cng hng v cng ct c ni vi nhau, v th vi keypad 4x4 s c tng cng 8 ng ra (4 hng v 4 ct). M hnh Keypad 4x4 c th hin trong hnh 2.21. - Hot ng ca Keypad 4x4 : - Gi s nht '2' c nhn, khi ng C v 2 c ni vi nhau. Gi s ng 2 c ni vi GND (mass, 0V) th C cng s l GND. Tuy nhin, cu hi t ra l bng cch kim tra trng thi ng C chng ta s c kt lun nt '2' c nhn? Gi s tt c cc ng 1, 2, 3, 4 u ni vi GND, nu C= GND th r rng chng ta khng th kt lun nt '1',= hay nt '2' hay nt '3' hay nt '-' c nhn. K thut khc phc vn ny chnh l k thut "qut" keypad. K thut qut keypad bng AVR c trnh by nh sau: - Ni tt c 8 chn ca keypad vi 1 PORT ca AVR, v d PORTB theo th t bn di:

- Cc chn 1, 2, 3, 4 c set nh cc chn Output v gi mc cao, cc chn A, B, C, D l Input v c in tr ko ln.Ln lt ko chn 1, 2, 3, 4 xung thp (ln lt xut gi tr 0 ra tng chn), c trng thi cc chn A, B, C, D kt lun nt no c nhn. - V d nh trong hnh 2.21, nt '2' c nhn th qu trnh qut s cho kt qu nh sau: Bc 1: ko chn 1 xung 0 (cc chn 2,3,4 vn mc cao), kim tra 4 chn A, B, C, D thu c kt qu D=1, C=1, B=1, A=1. (gi tr c v ca PINB l 00001111 nh phn) Bc 2: ko chn 2 xung 0, kim tra li A, B, C, D, kt qu thu c D=1, C=0, B=1, A=1 (gi tr c v ca PINB l 0b00001011 nh phn). Chn C=0 tc c 1 nt hng th 3 c nhn, chng ta li ang bc th 2 tc nt nhn thuc ct

th 2. Chng ta c th dng qu trnh qut ti y v kt qu thu v nt hng 3, ct 2 (tc nut '2'c) c nhn. - Qu trnh qut cho cc nt khc cng xy ra tng t. Ch , nu c 1 nt no c nhn th c 4 kh nng c th c v t 4 A,B,C,D l: D=1, C=1, B=1, A=0: nt hng A c nhn, gi tr c v l 0x0E (cc ng A,B,C,D c ni vi 4 bit thp ca PORT trn AVR). D=1, C=1, B=0, A=1: nt hng B c nhn, gi tr c v l 0x0D . D=1, C=0, B=1, A=1: nt hng C c nhn, gi tr c v l 0x0B . D=0, C=1, B=1, A=1: nt hng D c nhn, gi tr c v l 0x07 . - tin li khi so snh kt qu c v , khi lp trnh c Keypad chng ta nn lp mt mng 4 phn t cha 4 s c th c v t Keypad .V d nh mng Scan_code[4]= {0x0E,0x0D,0x0B,0x07};

2.10 KHI HIN TH THI GIAN THC D DNG DS1307. 2.10.1 S kt ni hin th thi gian thc vi Atmega16.
VC C R C 1 1 0 1 U C C A 1 1 P Y 1 1 0 1 3 2 . 7 6 8 k 0 2 h z 1 2 X 1 X 2 S G N D V B A T L E D 1 1 0 2 8 S S W D C 5 A6 L D C G N D A P B B G N D 3 T 1 A Q 7 / O U T 1 1 0 0 C R 1 1 0 3 4 7 0 R O N 2 VC C 1 2 J 1 1 0 1 1 1R 0 1 1 1 0

1 0 2 D S 1 3 0 7 T T E R Y 4 VC C

Hnh2.22: S kt ni khi hin th thi gian thc vi Atmega16. Do DS1307 giao tip chun I2C nn vic ghp ni n vi vi iu khin kh l n gin v theo datasheet th cho ta c s nh hnh 2.22. Ds1307 n ch giao tip vi vi iu khin vi 2 ng truyn SCL v SDA nn do trn vi x l cn phi xc nh chn no trn vi x l n c SCL v SDA ni vi DS1307 ci ny i vi dng PIC, AVR cn vi dng Psoc n c s khc ty theo kiu Fimware hay harware m cc chn SDA v SCL n s nm chn no ci c thit lp trong phn mn.

2.10.2 IC thi gian thc DS1307.


a) Khi nim v c trng DS1307 .

- IC thi gian thc l h vi iu khin ca hng dalat. DS1307 c mt s c trng c bn sau: - DS1307 l IC thi gian thc vi ngun cung cp nh dng cp nht thi gian v ngy thng . - SRAM :56bytes - a ch v d liu c truyn ni tip qua 2 ng bus 2 chiu - DS1307 c mt mch cm bin in p dng d cc in p li v t ng ng ngt vi ngun pin cung cp 3V: + DS1307 c 7 byte d liu nm t a ch 0x00 ti 0x06, 1 byte iu khin, v 56 byte lu tr ( dnh cho ngi s dng ). + Khi x l d liu t DS1307, h t chuyn cho ta v dng s BCD, v d nh ta c c d liu t a ch 0x04 (tong ng vi Day- ngy trong thng) v ti 0x05 (thng) l 0x15, 0x11. + Lu n vai tr ca chn SQW/OUT. y l chn cho xung ra ca DS1307 c 4 ch 1Hz, 4.096HZ, 8.192Hz, 32.768Hz... cc ch ny uc quy nh bi cc bt ca thanh ghi Control Register (a ch 0x07 ). + a ch ca DS1307l 0xD0.

Hnh 2.23 : S chn DS1307 - Chc nng v ngha cc chn : + X1 v X2 l u vo dao ng cho DS1307. Cn dao ng thch anh 32.768Khz. + Vbat l ngun nui cho chip. Ngun ny t ( 2V- 3.5V) ta ly pin c ngun 3V. y l ngun cho chip hot ng lin tc khi khng c ngun Vcc m DS1307 vn hot ng theo thi gian.

+ Vcc l ngun cho giao tip I2C. in p cung cp l 5V chun v c dng chung vi vi x l. Nu m Vcc khng c m Vbat c th DS1307 vn hot ng bnh thng nhng m khng ghi v c c d liu. + GND l ngun Mass chung cho c Vcc v Vbat + SQW/OUT l mt ng ra ph to xung dao ng (xung vung). Chn ny ti ngh khng nh hng n thi gian thc nn chng ta khng s dng chn ny trong thi gian thc v b trng chn ny! + SCL v SDA l hai bus d liu ca DS1307. Thng tin truyn v ghi u c truyn qua 2 ng truyn ny theo chun I2C b)T chc thanh ghi trong DS1307. Cu to bn trong ca DS1307 bao gm mch ngun, dao ng, logic v con tr ,thanh ghi thc hin vic ghi c. Do trong cc bi ton chng ta thng s dng DS1307 cho ng h thi gian thc nn do chng ta ch quan tm n vic ghi c cc thanh ghi cn thit (sec, min, hour) thng qua chun truyn thng I2C cn cc thanh ghi khc th chng ta c th tm hiu k trong datasheet! V cc thanh ghi c coi nh l RAM lu tr nn do chng ta ch gii thiu cc thanh ghi c chc nng thi gian thc phc v cho bi ton thi gian. Trong b nh ca DS1307 c tt c 64 thanh ghi a ch t 0 n 63 v c bt u t 0x00 n 0x3F nhng trong ch c 8 thanh ghi u l thanh ghi thi gian thc nn chng ta s i su vo 8 thanh ghi ( chc nng v a ch thanh ghi thi gian thc ny). Nhn vo hnh 2.24 ta s thy nh sau :

Hnh2.24: Cu trc cc thanh ghi trong DS1307 Nhn vo hnh trn chng ta thy cc thanh ghi thi gian thc n c sp sp theo th t : giy, pht, gi, th, ngy , thng, nm v bt u t thanh ghi Giy (0x00) v kt thc bng thanh ghi nm (0x06). Ring thanh ghi Control dng iu khin ng ra ca chn SQW/OUT nn trong thc t nn khng my ai s dng thanh ghi ny trong thi gian thc nn chng ta b qua thanh ghi ny!

Do 7 thanh ghi u tin l kh quan trng cho thi gian thc v l thanh ghi quan trng nht trong con DS1307 nn chng ta phi hiu c cch t chc thanh ghi ny trong DS1307. Qua tham kho datasheet v a ra t chc thanh ghi trong datasheet thi gian thc nh sau : Bng2.5 : T chc thanh ghi trong Datasheet thi gian thc .

Nhn bng trn chng ta thy cc thanh ghi c m ha theo bit. Mi bit trong thanh ghi u c chc nng ring v ti s trnh by chi tit nh sau : + Thanh ghi giy (0x00) : y l thanh ghi giy ca DS1307. Nhn trn bng trn ta thy c t bit 0 n bit 3 l dng m ha s BCD hng n v ca giy. Tip theo t bit 4 n bit 6 dng m ha BCD hng chc ca giy. Ti sao n ch s dng c 3 bit ny l do giy ca chng ta ln nht ch n 59 nn hng chc ln nht l 5 nn ch cn 3 thanh ghi ny l cng m ha ri! Cn bit th 7 c tn l CH theo ti n c ngha l Clock Halt Treo ng h Do nu m bit 7 ny m c a ln 1 tc l kha ng h nn do n v hiu ha chip v chip khng hot ng. Nn do vy lc no cng phi cho bit 7 ny lun xung 0 t lc u( ci ny s dng lnh end vi 0x7F).

+ Thanh ghi pht (0x01) : y l thanh ghi pht ca DS1307. Cng nhn trn bng thanh ghi ny c t chc nh thanh ghi giy. Cng l 3 bit thp dng m ha BCD ch s hng n v v s hng trc ch ln nht l 5 nn do ch cn dng t bit 4 n bit 6 m ha BCD tip ch s hng chc. Nhng thanh ghi ny c s khc bit vi thanh ghi giy l bit 7 n mc nh bng 0 ri nn do chng ta khng phi lm g vi bit 7 m k n! + Thanh ghi gi (0x02) : y l thanh ghi gi ca DS1307 v ti thy thanh ghi ny c coi l phc tp nht v n lng nh lng nhng nhng m nhn bng th thy cc t chc ca n cng hp l. Trc tin chng ta thy c rng t bit 0 n bit 3 n dng m ha BCD ca ch s hng n v ca gi. Nhng m gi n cn c ch 24h v 12h nn do n phc tp cc bit cao (bit 4 n bit 7) v s chn ch 12h v 24h n li nm bit 6. Nu bit 6=0 th ch 24h th do ch s hng trc ln nht l 2 nn do n ch dng 2 bit ( bit 4 v bit 5 ) m ha BCD ch s hng trc ca gi. Nu bit 6 =1 th ch 12h c chn nhng do ch s ca hng trc ca gi trong ch ny ch ln nht l 1 nn do bit th 4 l m ha BCD ch s hng trc ca gi ri nhng m bit th 5 n li dng ch bui sng hay chiu, nu m bit 5 = 0 l AM v bit 5 =1 l PM. Trong c 2 ch 12h v 24h th bit 7 =0 nn ta ko cn ch n thanh ghi ny. + Thanh ghi th (0x03): y l thanh ghi th trong tun ca DS1307 v thanh ghi ny kh l n gin trong DS1307. N dng s ch th trong tun nn do n ch ly t 1 n 7 tng ng t th hai n ch nht. Nn do n dng 3 bit thp (bit 0 n bit 2) m ha BCD ra th trong ngy. Cn cc bit t 3 n 7 th n mc nh bng 0 v ta khng lm g vi cc bit ny! + Thanh ghi ngy (0x04) : y l thanh ghi ngy trong thng ca DS1307. Do trong cc thng c s ngy khc nhau nhng m nm trong khong t 1n 31 ngy. Do thanh ghi ny cc bit c t chc kh l n gin. N dng 4 bit thp (bit0 n bit 3) dng m ha BCD ra ch s hng n v ca ngy trong thng. Nhng do ch s hng trc ca ngy trong thng ch ln nht l 3 nn ch dng bit 4 v bit 5 l m ha BCD ri. Cn bit 6 v bit 7 chng ta khng lm g v n mc nh bng 0. + Thanh ghi thng (0x05) : y l thanh ghi thng trong nm ca DS1307. Thng trong nm ch c t 1 n 12 thng nn vic t chc trong bit cng tng t nh ngy trong thng nn do cng 4 bit thp (t bit 0 n bit 3) m ha BCD hng n v ca thng. Nhng do hng chc ch ln nht l 1 nn ch dng 1 bit th 4 m ha BCD ra ch s hng trc v cc bit cn li t bit 5 n bit 7 th b trng v n mc nh cho xung mc 0. + Thanh ghi nm (0x06): y l thanh ghi nm trong DS1307. DS1307 ch c 100 nm

thi tng ng vi 00 n 99 nn n dng tt c cc bit thp v bit cao m ha BCD ra nm! + Thanh ghi iu khin (0x07): y l thanh ghi iu khin qu trnh ghi ca DS1307 v Qu trnh ghi phi c kt thc bng a ch 0x93.

2.10.3 : Giao tip I2C - Ngy nay trong cc h thng in t hin i, rt nhiu IC hay thit b ngoi vi cn phi giao tip vi cc IC hay thit b khc giao tip vi th gii bn ngoi. Vi mc tiu t c hiu qu cho phn cng tt nht vi mch in n gin, Phillips pht trin mt chun giao tip ni tip 2 dy c gi l I2C. I2C l tn vit tt ca cm t Inter Intergrated. I2C c tc truyn kh cao, c Mbit/s, tuy nhin khong cch truyn rt ngn, ch khong trn board mch. I2C mc d c pht trin bi Philips, nhng n c rt nhiu nh sn xut IC trn th gii s dng. I2C tr thnh mt chun cng nghip cho cc giao tip iu khin, c th k ra y mt vi tn tui ngoi Philips nh : Texas Intrument (TI), Maxim Dallas,analog Device, National emiconductor Bus I2C c s dng lm bus giao tip ngoi vi cho rt nhiu loi IC khc nhau nh cc loi vi iu khin PIC, AVR, ARM, chip nh nh RAM tnh (Static Ram), EEPROM, b chuyn i tng t s (ADC), s tng t (DAC)

Hnh 2.25: BUS I2C v cc thit b ngoi vi Mt giao tip I2C gm c 2 dy : Serial Data (SDA) v Serial Clock (SCL). SDA l ng truyn d liu 2 hng, cn SCL l ng truyn xung ng h v ch theo mt hng. Mi dy SDA hay SCL u c ni vi in p dng ca ngun cp thng qua mt in tr ko ln (pull up resistor). S cn thit ca cc in tr ko ny l v chn giao tip I2C ca cc thit b ngoi vi thng l dng cc mng h (open drain or open collector).Gi tr ca cc in tr ny khc nhau ty vo tng thit b v chun giao tip, thng dao ng trong khong 1K n 4.7K. Ta thy c rt nhiu thit b (ICs) cng c kt ni vo mt bus I2C, tuy nhin s khng xy ra chuyn nhm ln gia cc thit b, bi mi thit b s c nhn ra bi mt a ch duy nht vi mt quan h ch/t tn

ti trong sut thi gian kt ni. Mi thit b c th hot ng nh l thit b nhn d liu hay c th va truyn va nhn. Hot ng truyn hay nhn cn ty thuc vo vic thit b l ch (master) hay t (slave). Mt thit b hay mt IC khi kt ni vi bus I2C, ngoi mt a ch (duy nht) phn bit, n cn c cu hnh l thit b ch (master) hay t (slave). Ti sao li c s phn bit ny ? V trn mt bus I2C th quyn iu khin thuc v thit b ch (master). Thit b ch nm vai tr to xung ng h cho ton h thng, khi gia hai thit b ch/t giao tip th thit b ch c nhim v to xung ng h v qun l a ch ca thit b t trong sut qu trnh giao tip. Thit b ch gi vai tr ch ng, cn thit b t gi vai tr b ng trong vic giao tip.

Hnh 2.26:Truyn nhn d liu gia ch/t. Nhn hnh trn ta thy xung ng h ch c mt hng t ch n t, cn lung d liu c th i theo hai hng, t ch n t hay ngc li t n ch. V d liu truyn trn bus I2C, mt bus I2C chun truyn 8 bit d liu c hng trn ng truyn vi tc l 100Kbits/s Ch chun (Standard mode). Tc truyn c th ln ti 400Kbits/s Ch nhanh (Fast mode) v cao nht l 3,4Mbits/s Ch cao tc (High speed mode). Mt bus I2C c th hot ng nhiu ch khc nhau: - Mt ch mt t (one master one slave) - Mt ch nhiu t (one master multi slave) - Nhiu ch nhiu t (Multi master multi slave) D ch no, mt giao tip I2C u da vo quan h ch/t. Gi thit mt thit b A mun gi d liu n thit b B, qu trnh c thc hin nh sau : - Thit b A (Ch) xc nh ng a ch ca thit b B (t), cng vi vic xc nh a ch, thit b A s quyt nh vic c hay ghi vo thit b t. - Thit b A gi d liu ti thit b B. - Thit b A kt thc qu trnh truyn d liu. Khi A mun nhn d liu t B, qu trnh din ra nh trn, ch khc l A s nhn d liu t B. Trong giao tip ny, A l ch cn B vn l t. Chi tit vic thit lp mt giao tip gia hai thit b s c m t chi tit trong cc mc di y.

START and STOP conditions

START v STOP l nhng iu kin bt buc phi c khi mt thit b ch mun thit lp giao tip vi mt thit b no trong mng I2C. START l iu kin khi u, bo hiu bt u ca giao tip, cn STOP bo hiu kt thc mt giao tip. Hnh di y m t iu kin START v STOP. - C ch hot ng : DS1307 hot ng vi vai tr slave trn ng bus ni tip.Vic truy cp c thi hnh vi ch th start v mt m thit b nht nh c cung cp bi a ch cc thanh ghi. Tip theo cc thanh ghi s c truy cp lin tc n khi ch th stop c thc thi.

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