Smart Lowside Power Switch

HITFET BSP 75N

Data Sheet V1.0 Features Logic Level Input Input protection (ESD) Thermal shutdown with auto restart Overload protection Short circuit protection Overvoltage protection Current limitation

Application All kinds of resistive, inductive and capacitive loads in switching applications C compatible power switch for 12 V and 24 V DC applications and for 42 Volt Powernet Replaces electromechanical relays and discrete circuits General Description N channel vertical power FET in Smart Power Technology. Fully protected by embedded protection functions. Type HITFET BSP 75N Ordering Code Q67060-S7215 Package P-SOT223-4

Product Summary Parameter Continuous drain source voltage On-state resistance Current limitation Nominal load current Clamping energy Symbol Value 60 550 1 0.7 550 Unit V m A A mJ

VDS RDS(ON) ID(lim) ID(Nom) EAS

Data Sheet V1.0

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HITFET BSP 75N

Vbb

HITFET Logic
Over voltage Protection

OUTPUT Stage DRAIN

IN

dV/dt limitation

ESD

Over temperature Protection

Short circuit Protection Current Limitation

SOURCE

Figure 1

Block Diagram

SOURCE

1 2 3

IN DRAIN SOURCE

Figure 2

Pin Configuration

Pin Definitions and Functions Pin No. 1 2 3 + TAB Symbol IN DRAIN SOURCE Function Input; activates output and supplies internal logic Output to the load Ground; pin3 and TAB are internally connected

Data Sheet V1.0

TAB

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HITFET BSP 75N

Circuit Description The BSP 75N is a monolithic power switch in Smart Power Technology (SPT) with a logic level input, an open drain DMOS output stage and integrated protection functions. It is designed for all kind of resistive and inductive loads (relays, solenoid) in automotive and industrial applications. Protection Functions Over voltage protection: An internal clamp limits the output voltage at VDS(AZ) (min. 60V) when inductive loads are switched off. Current limitation: By means of an internal current measurement the drain current is limited at ID(lim) (1.4 - 1.5 A typ.). If the current limitation is active the device operates in the linear region, so power dissipation may exceed the capability of the heatsink. This operation leads to an increasing junction temperature until the over temperature threshold is reached. Over temperature and short circuit protection: This protection is based on sensing the chip temperature. The location of the sensor ensures a fast and accurate junction temperature detection. Over temperature shutdown occurs at minimum 150 C. A hysteresis of typ. 10 K enables an automatic restart by cooling. The device is ESD protected according Human Body Model (4 kV) and load dump protected (see Maximum Ratings).

Data Sheet V1.0

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HITFET BSP 75N

Absolute Maximum Ratings Tj = 25 C, unless otherwise specified Parameter Continuous drain source voltage Drain source voltage for short circuit protection Continuous input voltage Peak input voltage Continuous Input Current -0.2V VIN 10V VIN<-0.2V or VIN>10V Operating temperature range Storage temperature range
1)

Symbol

Values 60 36

Unit Remarks V V

VDS VDS VIN VIN IIN

-0.2 +10 V -0.2 +20 V no limit | IIN | 2mA -40 +150 C -55 +150 C 1.8 550 W mJ V 80 47

mA

Tj Tstg Ptot Power dissipation (DC) Unclamped single pulse inductive energy EAS VLoadDump

Load dump protection 2) IN = low or high (8 V); RL = 50 IN = high (8 V); RL = 22

ID(ISO) = 0.7 A; Vbb =32V VLoadDump = VP + VS; VP = 13.5 V RI3) = 2 ; td = 400 ms;

Electrostatic discharge voltage (Human Body Model) according to MIL STD 883D, method 3015.7 and EOS/ESD assn. standard S5.1 - 1993 DIN humidity category, DIN 40 040 IEC climatic category, DIN IEC 68-1 Thermal Resistance Junction soldering point Junction - ambient4)
1) 2) 3) 4)

VESD

4000

E 40/150/56

RthJS RthJA

10 70

K/W K/W

See also Figure 7 and Figure 10.

VLoadDump is setup without DUT connected to the generator per ISO 7637-1 and DIN 40 839. See also page 7. RI = internal resistance of the load dump test pulse generator LD200.
Device on epoxy pcb 40 mm 40 mm 1.5 mm with 6 cm2 copper area for pin 4 connection.

Data Sheet V1.0

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HITFET BSP 75N

Electrical Characteristics Tj = 25 C, unless otherwise specified Parameter Symbol Limit Values min. typ. max. Unit Test Conditions

Static Characteristics Drain source clamp voltage Off state drain current

VDS(AZ) 60 IDSS

75 5

Input threshold voltage

VIN(th) 1

1.8

2.5

Input current: normal operation, ID < ID(lim): IIN(1) current limitation mode, ID = ID(lim): IIN(2) After thermal shutdown, ID = 0 A: IIN(3) On-state resistance

A
100 200 250 400 1000 1500 2000 490 850 430 750 675 1350 550 1000

ID = 10 mA, Tj = -40 +150 C VIN = 0 V, VDS = 32 V, Tj = -40 +150 C ID = 10 mA VIN = 5 V

Tj = 25 C Tj = 150 C
On-state resistance

RDS(on)

m ID = 0.7 A, VIN = 5 V m ID = 0.7 A, VIN = 10 V A

Tj = 25 C Tj = 150 C
Nominal load current

RDS(on)

ID(Nom) 0.7

Current limit

ID(lim)

1.5

1.9

VBB = 12 V, VDS = 0.5 V, TS = 85 C, Tj < 150 C VIN = 10 V, VDS = 12 V

Dynamic Characteristics 1) Turn-on time

VIN to 90% ID: ton

10

20

Turn-off time

VIN to 10% ID: toff

10

20

RL = 22 , VIN = 0 to 10 V, VBB = 12 V RL = 22 , VIN = 10 to 0 V, VBB = 12 V

Data Sheet V1.0

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HITFET BSP 75N

Electrical Characteristics (contd) Tj = 25 C, unless otherwise specified Parameter Slew rate on Symbol Limit Values min. typ. 5 max. 10 V/ s V/ s Unit Test Conditions

70 to 50% VBB: -dVDS/ dton 50 to 70% VBB: dVDS/ dtoff

Slew rate off

10

15

RL = 22 , VIN = 0 to 10 V, VBB = 12 V RL = 22 , VIN = 10 to 0 V, VBB = 12 V

Protection Functions2) Thermal overload trip temperature Thermal hysteresis Tjt 150 550 200 165 10 180

C
mJ

Tjt

Unclamped single pulse inductive EAS Tj = 25 C energy Tj = 150 C Inverse Diode Continuous source drain voltage
1) 2)

ID(ISO) = 0.7 A, VBB = 32 V

VSD

VIN = 0 V, -ID = 2 0.7 A

See also Figure 9. Integrated protection functions are designed to prevent IC destruction under fault conditions described in the datasheet. Fault conditions are considered as outside normal operating range. Protection functions are not designed for continuous, repetitive operation.

Data Sheet V1.0

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HITFET BSP 75N

EMC-Characteristics
The following EMC-Characteristics outline the behavior of typical devices. They are not part of any production test. Table 1 Parameter Temperature Supply Voltage Load Operation mode DUT specific Fast electrical transients acc. to ISO 7637 Test1) Pulse 1 2 3a 3b 4 5
1)

Test Conditions Symbol TA VS RL PWM DC Value 23 5 13.5 27 Unit C V Remark ohmic fINx=100Hz, D=0.5 ON / OFF

VIN(HIGH)=5V

Max. Test Level -200V +200V -200V +200V -7V 175V

Test Result ON C C C C C E(65V) OFF C C C C C E(75V)

Pulse Cycle Time and Generator Impedance 500ms ; 10 500ms ; 10 100ms ; 50 100ms ; 50 0.01 400ms ; 2

The test pulses are applied at VS

Definition of functional status Class C E Content All functions of the device are performed as designed after exposure to disturbance. One or more function of a device does not perform as designed after exposure and can not be returned to proper operation without repairing or replacing the device. The value after the character shows the limit.

Data Sheet V1.0

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HITFET BSP 75N

Conducted Susceptibility
VBB PULSE

Acc. 47A/658/CD IEC 62132-4 (Direct Power Injection)

RL

BSP75N IN DRAIN SOURCE

Direct Power Injection: Forward Power CW Failure Criteria: Amplitude or frequency variation max. 10% at OUT Typ. Vbb Susceptibility at DC-ON/OFF and at PWM

Figure 3

Test circuit for ISO pulse

40

35

Conducted Emissions
dBm

30

25

Acc. IEC 61967-4 (1/150 method) Typ. Vbb Emissions at PWM-mode with 150-matching network
100 90 80 70 60 50
Noise level BSP75N 150ohm Class6 150ohm Class1

20

15

10
Limit OUT, ON OUT, OFF OUT, PWM

0 1 10 100

1000

f / MHz

dBV

150 / 8-H

40 30 20 10 0 -10 -20 0,1 1 10 100 1000

VBB
150 / 13-N

BAN BSP75N RL

f / MHz

IN

DRAIN SOURCE HF

VBB

Test circuit for conducted susceptibility

BSP75N IN DRAIN SOURCE 150-Network
1)

RL

2)

2)

Figure 4

Test circuit for conducted emission 1)

8

For defined de coupling and high reproducibility a defined choke (5H at 1MHz) is inserted in the Vbb-Line. Broadband Artificial Network (short: BAN) consists of the same choke (5H at 1MHz) and the same 150 Ohm-matching network as for emission measurement for defined de coupling and high reproducibility.

Data Sheet V1.0

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HITFET BSP 75N

Block diagram
VBB

ID
uC Vcc BSP75N IN D SOURCE

IIN

HITFET IN DRAIN SOURCE VDS Vbb

Px.1 GND

VIN

Figure 8 Figure 5 Terms

Application Circuit

IN

SOURCE

Figure 6

Input Circuit (ESD protection)

ESD zener diodes are not designed for DC current.

LOAD

VAZ

Drain VDS
Power DMOS

Source ID

Figure 7

Inductive and Over voltage Output Clamp

Data Sheet V1.0

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HITFET BSP 75N

Timing diagrams
VIN
VIN t VDS t ID 0.9*ID 0.1*ID ton toff t

ID(lim) ID t j

thermal hysteresis

Figure 11

Short circuit

Figure 9

Switching a Resistive Load

VIN VDS(AZ) VDS VBB t ID t t

Figure 10

Switching an Inducitve Load

Data Sheet V1.0

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HITFET BSP 75N

1 Max. allowable power dissipation Ptot = f(TAmb)

2

2 On-state resistance RON = f(Tj); ID = 0.7 A; VIN = 10 V

10 0 0

to t

ON

9 0 m0
1 ,6 W

800 700

m ax.

m a x.
1 ,2

600 500

typ .

0 ,8

400 300

0 ,4

200 100

0 0 25 50 75 100

C 125

150

-50 -25

25

50

C 75 1 0 0 1 2 5 15 0 T
j

Amb

3 On-state resistance RON = f(Tj); ID = 0.7 A; VIN = 5 V

1400

4 Typ. input threshold voltage VIN(th) = f(Tj); ID = 10 mA; VDS = 12 V

2,5

ON

IN (th )

m 1200

V2
1000

typ .

m a x.
1,5

800

typ .
600

400

0,5
200

0 -5 0 -2 5 0 25 50

C 75 100 125 150 T

j

-50

-25

25

50

75

C 1 00 12 5 15 0 T
j

Data Sheet V1.0

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HITFET BSP 75N

5 Typ. on-state resistance RON = f(VIN); ID = 0.7 A; Tj = 25 C

2000

6 Typ. current limitation ID(lim) = f(Tj); VDS = 12 V, VIN = 10 V

2

ON

I D (lim )

1m0 0 5

typ .

A 1 ,5

typ .

1000

500

0 ,5

0 0 2 4 6

V 8

10

-5 0

-2 5

25

50

75

C 100 125 150 T

j

IN

7 Typ. short circuit current ID(SC) = f(VIN); VDS = 12 V, Tj = 25 C

2

8 Max. transient thermal impedance ZthJA = f(tp) @ 6cm; Parameter: D = tp/T

100

I D (S C )
typ . A 1 ,5

th (J A )

1 K /W 0

1
D= 0 .5 0 .2 0 .1 0 .0 5 0 .0 2 0 .0 1 0

0 ,5

0 0 2 4 6

V 8

10

0 ,1
0 ,0 0 0 0 1 0 ,0 0 1 0 ,1 10

s 1000

IN

tP

100000

Data Sheet V1.0

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HITFET BSP 75N

Package Outlines P-SOT223-4 (Small Outline Transistor)

6.5 0.2 3 0.1 0.1 max

1.6 0.1

7 0.3

15max

1 0.7 0.1

3 2.3 4.6

0.5 min

0.28 0.04

0.25

0.25

B
GPS05560

Sorts of Packing Package outlines for tubes, trays etc. are contained in our Data Book Package Information SMD = Surface Mounted Device Data Sheet V1.0 13

3.5 0.2

+0.2 acc. to DIN 6784

Dimensions in mm 2003-01-10

HITFET BSP 75N

Published by Infineon Technologies AG, Bereichs Kommunikation St.-Martin-Strasse 76, D-81541 Mnchen Infineon Technologies AG 1999 All Rights Reserved. Attention please! The information herein is given to describe certain components and shall not be considered as warranted characteristics. Terms of delivery and rights to technical change reserved. We hereby disclaim any and all warranties, including but not limited to warranties of non-infringement, regarding circuits, descriptions and charts stated herein. Infineon Technologies is an approved CECC manufacturer. Information For further information on technology, delivery terms and conditions and prices please contact your nearest Infineon Tech-nologies Office in Germany or our Infineon Technologies Representatives worldwide (see address list). Warnings Due to technical requirements components may contain dangerous substances. For information on the types in question please contact your nearest Infineon Technologies Office. Infineon Technologies Components may only be used in life-support devices or systems with the express written approval of Infineon Technologies, if a failure of such components can reasonably be expected to cause the failure of that life-support device or system, or to affect the safety or effectiveness of that device or system. Life support devices or systems are in-tended to be implanted in the human body, or to support and/ or maintain and sustain and/or protect human life. If they fail, it is reasonable to assume that the health of the user or other persons may be endangered.

Data Sheet V1.0

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