LOGIC GATE TRAINER INSTRUCTIONAL MANUAL

LOGIC GATE TRAINER Digital elements have two discrete voltage levels to represent the Binary digital (bits) 1 and 0. All digital circuit are switching circuits i. e. ON or OFF of switches, indicating 1 as high level and 0 as low level . These two states are often logic state. All digital circuits use the binary system; in witch only two numerals (0 and 1) are necessary to represent a number. Generally in digital electronic, any voltage which is less than 0.8v is represented as logical 0 and any voltage more than 2v but less than 5V is represented as Logical 1. Logic Gate is a digital circuit which follow certain logical releation ship between the input and output voltage. There are various type of logic gates i.e. OR , AND , NOT , NAND & NOR Gates. Out of these five gates .first three i.e AND . Or and NOT are called Basic gates and remaining two i.e. NAND and NOR are called combinational Gates. LOGIC INPUT SWITCHS These switches are used to provide input to various logic gates. When the switch is brought towards 1 it indicate high level which is represented as logical 1 and when the switch is brought towards 0 , it indicates low level ( Ground Level) which is represented as Logical 0. That means from just on switch , you can get either Logical 0 to 1 depending upon the position of the switch. OUTPUT INDICATOR Here Seven Segment Display is used as logic level indicator to observer the output state of logic PROCEDURE VERIFICATION OF TRUTH TABLE OF AND GATE 1. 2. 3. 4. Connect A and B inputs of AND Gate to logic inputs 0and 0 as shown in the truth table for ANS Gate. Also connect output of And Gate to output indicator. Switch On the instrument using OFF/ON switch provided on front panel. Observe the output indicator . if it glows the indication is that the output is in statye1 and if it does not glow the indication is that the output is in state 0. Similarly verify the output for other combinations of inputs A and Bas shown in the truth table. A B Y 0 0 0 0 1 0 1 0 0 1 1 1

A Y= A . B B AND GATE

Verification of Truth Table of NAND Gate:5. 6. Connect A and B input s of NAND Gate to logic inputs Q and 0 as shown in the truth table for NAND Gate . Also connect output of NAND Gate to output indicator. Proceed as per Sr. No 2-4 A 0 0 1 1
A Y= A . B B NAND GATE

B 0 1 0 1

Y 1 1 1 0

Verification of Truth Table of OR Gate; 7. 8. Connect A and B Inputs of OR Gate to Logic inputs 0 and 0 as shown in the truth table for or gate. also connect output of OR Gate to output indicator. Proceed as per sr. No 2-4. A B Y 0 0 0 0 1 1 1 0 1 1 1 1

Y= A+B B OR GATE

Verification of Truth Table of NOR Gate; 9. Connect A and B inputs of NOR Gate to logic inputs0 and 0 as shown in the truth table for NOR Gate. Also connect neither output of NOR Gate to output indicator. 10. Proceed as per Sr. No 2-4. A B Y 0 0 1 0 1 0 1 0 0

Y= A+B B NOR GATE

Verification of Truth Table of EX_ OR Gate; 11. Connect A and B inputs of EX- OR Gate to Logic inputs ) and 0 as shown in the truth table for EX OR gate . also connect output of Ex-OR gate to output indicator . 12. Proceed as per Sr. No. 2-4 A 0 0 1 1
A Y= A + B

B 0 1 0 1

Y 0 1 1 0

B EX-OR GATE

Verification of Truth Table of NOT Gate; 13. Connect A input of Not Gate to logic input as shown in the truth table for Not Gate . also connect output of NOT Gate to output indicator . 14. Proceed as per Sr. No 2-4 . A 0 1 Y 1 0

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