2011 2nd Power Electronics, Drive Systems and Technologies Conference

A Common-mode Voltage Reduction Strategy for a DFIG with a Three-Level Back-to-Back Converter
M. Ebrahim Adabi
Faculty of Electrical Engineering Iran University of Science and Technology Center of Excellence for Power System Automation and Operation Tehran, Iran ebrahimadabi@gmail.com
Abstract since the application of power electronic devices became dominant in wind turbine systems, shaft voltage turned into a drawback of the AC generators as well as the AC motors in the modern AC drive applications. This voltage is a resultant phenomena of interaction between PWM strategies of power electronics converters and AC generator structure. Common mode voltage generated by PWM inverters and the parasitic couplings of the machine structure in high frequencies create a model for the system which leads to an induced voltage on the shaft. This paper investigates a shaft voltage remediation strategy for a doubly fed induction generator. A three-level back-to-back AC-DC-AC converter has been used in this system. This analysis is based on reduction of the maximum common mode voltage levels by removing related switching vectors from a switching pattern. Applying this technique leads to a 66 percent reduction of the common mode voltage of the rotor side converter which plays the key role in shaft voltage generation of the DFIG. The advantages of proposed method are: voltage balancing of DC link capacitors and controlling of the active and reactive power delivered by the wind generator. Mathematical analysis and simulation studies have been presented to verify this approach. Keywords-component: shaft voltage, common mode voltage, DFIG, wind turbine, PWM, switching vector

Abolfazl Vahedi
Faculty of Electrical Engineering Iran University of Science and Technology Center of Excellence for Power System Automation and Operation Tehran, Iran a.vahedi@iust.ac.ir doubly excite the stator and rotor windings. The power converters in the rotor circuit regenerate the majority of the slip power [1]. In a Doubly Fed Induction Generator (DFIG), the stator is directly connected to the AC mains, while the wound rotor is fed from a back-to-back converter via slip rings to allow the DIFG to operate at a variety of speeds in order to accommodate changing wind speeds. The slip power can flow in both directions to the rotor from the supply and from the supply to the rotor and hence the speed of the machine can be controlled from either the rotor- or stator-side converter in both super and sub-synchronous speed ranges [2 -3]. When the switching frequency of these converters is increased, some problems have been occurred which have been previously seen in waveguide instruments like antennas and radio signal equipments [4]. The effects of high frequency components of the voltage which is generated through PWM techniques are usually neglected in electromechanical analysis of the AC machine. There are many capacitance couplings in the generator structure that could be neglected in low frequency analysis, but the situation is completely different in high frequency [5]. By applying PWM in three phase inverter, a voltage will be generated between neutral point of the load and the ground which is known as common mode voltage. This voltage acts as a source for many unwanted problems in motor drives such as shaft voltage and bearing current due to parasitic capacitances which exists in the structure of the machine [6]. According to the analysis of [7], a high percentage of common mode voltage generated by rotor side converter in a DFIG converts to shaft voltage. This amount is much greater than IEC-34-17 standard which is a harmful phenomena and leads to both safety and maintenance issues. Therefore, common mode voltage is an important factor in high frequency modeling of electrical machines and is the main source of shaft voltage in generator structure because of small parasitic capacitances. PWM techniques that reduce or eliminate common mode voltage would be a suitable and cheap solution which will be greatly fascinated in industry [8]. This paper presents a common mode voltage strategy based on elimination of the switching vectors which generates maximum common mode voltage levels by keeping all the factors in acceptable levels.

I.

INTRODUCTION

Due to lack of the traditional energy resources and their upcoming cost challenges, renewable energy resources such as wind, solar and fuel cells became key player elements. Among these resources, wind energy has been widely accepted in power industry as a result of its cleanness, easy to access, proficiency and cost effectiveness in world energy paradigm. Natural changes of the wind mechanical power lead to a variable turbine speed and a variable output voltage. This problem can be avoided by using mechanical solutions such as gear boxes to adjust the speed. Power electronics converters and control modules are also can be used to achieve an adjustable output voltage in terms of frequency and magnitude. To achieve a variable speed constant frequency system, an induction generator is considered attractive due to its flexible rotor speed characteristics with respect to the constant stator frequency. One solution to expand the speed range and reduce the slip power losses is to

978-1-61284-421-3/11/$26.00 2011 IEEE

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II.

A THREE LEVEL INVERTER TOPOLOGY AND GENERATED

COMMON MODE VOLTAGES

Fig.1 shows the arrangement of a three-level back-to-back DC-AC-DC inverter where the converters are connected to the rotor and stator windings.

that, other issues of the system such as pitch control and torque are not in the focus of this research and the main challenge of the analysis is to reduce the common mode voltage level which is the main source of the shaft voltage. Mentioned analysis is trying to highlight the generator issues and possible solutions which may have some side effects on other control issues that need a clear investigation. Multilevel inverters [18-19] play an important role in high power applications. These converters generate several voltage levels based on a pulse width modulation technique which leads to a waveform near to a sine wave with minimum harmonic distortion. Fig.2 shows a three-level inverter topology where each leg has three voltage levels which are (+Vdc/2, 0, -Vdc/2).

Figure 1.

Back-to-back DC-AC-DC inverter in a wind energy system

In a wind turbine application, stator and rotor windings of a DFIG is connected to both side converters and both sides common mode voltages will be an effective factor in shaft voltage generation. In general, only the line side current is required to be sinusoidal to satisfy IEEE standards. LC filters are used to damp the low order harmonics in pulse shape waveform and convert it to sine wave [9]. Therefore, each converter with an output LC filter is not a common mode voltage source any more. In this topology, an LC filter is connected to the stator side converter, therefore the stator side common mode voltage is equal to zero . The common mode voltages of the rotor side converter [3] are given as: v ( t ) + vbo ( t ) + vco ( t ) (1) vcomR ( t ) = v N o ( t ) = ao 3 Where vao ( t ),vbo ( t ),vco ( t ) are the leg voltages from the rotor side converter. N and N' are the star point of the stator and rotor side windings respectively and the common mode voltage is the voltage between the neutral point of the rotor side windings and the ground. Another worth mentioning issues in this topology are: balancing the neutral point voltage of DC link and controlling the active and reactive powers delivered by the wind generator to the electrical network. This paper presents a common mode voltage strategy based on elimination of the switching vectors which generates maximum common mode voltage levels by keeping these factors in acceptable levels. A typical power system connected to a DFIG wind turbine will be simulated in order to show the effectiveness of the proposed strategy. Note

Figure 2.

Topology of a three-level diode-clamped inverter

As shown in Fig.3 and Table. I, there are 27 possible switching states in the proposed topology.

Figure 3.

Different switching vectors of a three level converter at dq frame

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TABLE I. DIFFERENT SWITCHING STATES OF A THREE-LEVEL CONVERTER Switching Vectors states 000 100 200 010 110 210 020 120 220 001 101 201 011 111 211 021 121 221 002 102 202 012 112 212 022 122 222 vao(t) -Vdc/2 0 Vdc/2 - Vdc/2 0 Vdc/2 - Vdc/2 0 Vdc/2 - Vdc/2 0 Vdc/2 - Vdc/2 0 Vdc/2 - Vdc/2 0 Vdc/2 - Vdc/2 0 Vdc/2 - Vdc/2 0 Vdc/2 - Vdc/2 0 Vdc/2 vbo(t) -Vdc/2 -Vdc/2 - Vdc/2 0 0 0 Vdc/2 Vdc/2 Vdc/2 - Vdc/2 -Vdc/2 - Vdc/2 0 0 0 Vdc/2 Vdc/2 Vdc/2 - Vdc/2 - Vdc/2 - Vdc/2 0 0 0 Vdc/2 Vdc/2 Vdc/2 vco(t) -Vdc/2 - Vdc/2 - Vdc/2 -Vdc/2 -Vdc/2 - Vdc/2 - Vdc/2 - Vdc/2 - Vdc/2 0 0 0 0 0 0 0 0 0 Vdc/2 Vdc/2 Vdc/2 Vdc/2 Vdc/2 Vdc/2 Vdc/2 Vdc/2 Vdc/2 Vcom(t)

V0 V1 V2 V3 V4 V5 V6 V7 V8 V9 V10 V11 V12 V13 V14 V15 V16 V17 V18 V19 V20 V21 V22 V23 V24 V25 V26

-Vdc/2 -Vdc/3 -Vdc/6 -Vdc/3 - Vdc/6 0 -Vdc/6 0 Vdc/6 - Vdc/3 -Vdc/6 0 - Vdc/6 0 Vdc/6 0 Vdc/6 Vdc/3 - Vdc/6 0 Vdc/6 0 Vdc/6 Vdc/3 Vdc/6 Vdc/3 Vdc/2

2 state (1100 for related leg). Applying these vectors leads to different common mode voltage levels of Vdc Vdc Vdc ( , , , ) . Therefore, the switching states 6 3 2 which generate the common mode voltage levels of V V ( dc , dc ) should be eliminated in the switching pattern. 2 3 Note that in this elimination, the control of active and reactive power should be considered. An strategy will be discussed in following section in order to keep these powers in control. By this scheme 66 percent of common mode voltage magnitude will be eliminated. III. A THREE LEVEL BACK TO BACK INVERTER IN A DFIG
SYSTEM

Many different d-q control algorithms have been proposed and used for controlling the DFIG machine and grid side converter for certain dynamic and transient performance achievements of DFIG. Most of them are based on a real and reactive power control concept. This control configuration is usually divided into machine and grid side converter. The rotor side converter controls the active and reactive power of DFIG independently, and the grid side converter is controlled in such a way as to maintain the DC-link capacitor voltage in a set value and to maintain the converter operation with a desired power factor so because of this ability of grid side converter balancing dc voltage of capacitor C1 and C2 followed in this converter. Considering equation of DFIG [10], the control block diagram of the grid side converter (GSC) to achieve reference Vd and Vq in SVM procedure have been implemented based on the algorithm presented at [11-12]. Using this strategy, the switching sector and region will be determined and duty cycle for each vector will be calculated. Note that, the analysis of this strategy is not in the scope of this paper and we used the contribution of the proposed references.

Figure 4.

Control block diagram of grid side converter [11-12]

In Table I, a three-digit number represents the switching states of legs a, b and c. 0 mans the two upper switch of the leg is turned off (0011 for the related leg). 1 means the first upper switch is off and the second upper switch is turned on (0110 for the related leg). Two upper switches are turned on in

Another mentioning issue is to balance the neutral point voltage capacitor voltages. For this purpose, the capacitor voltage of capacitors C1 and C2 have to be compared to each other in each sampling and regarding to which capacitor needs charging or discharging in order to be in balanced manner, the selection between redundant can be easily taken place. The rotor side converter controls the active and reactive powers transferring to the network. For this purpose, the

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control block of Fig.5 has been implemented for rotor side converter based on the analysis of [13-14] by consideration of the DFIG Equations mentioned at [10].

V generate common mode voltage of dc and V13 which 2 creates a zero common mode voltage. We can use this issue as a benefit to still allocate a zero vector in the pattern without paying the price for common mode voltage.
As mentioned in previous section, the switching vectors can be divided to six two-level hexagons (see Fig.6.a). in each sector, two or three vectors generating the same reference voltage vector but leads to different common mode voltage levels. Among them, circled ones are the good option to be V used in the pattern to produce only zero and dc voltage 6 levels.

Figure 5.

Control block diagram of rotor side converter [13-14]

The mentioned strategy is based on dividing the switching pattern hexagon of Fig.3 in d-q frame to six smaller hexagon which represents a two level SVM. For this purpose, a reference vector should be transferred to the desired hexagon depend on the value of reference voltage angle. The equations of this transformation and also vector selection of this pattern are available at [1516]. Fig.6 shows the simplification of three-level space vector diagram in two-level space vector modulation. Note that in this scheme, our common mode voltage reduction technique is implemented with elimination of some vectors from proposed pattern which will be discussed in next section. IV. COMMON MODE VOLTAGE REDUCTION STRATEGY
(a)

A. Technique Description As mentioned in previous sections and as shown in Fig.1, the stator side converter does not generate a common mode voltage because of the filtering at the grid side converter. The only common mode voltage source is from the network side converter and the strategy should focus on this converter. Depends on the filter placement, different strategies can be considered which is not a task of this research work. The main tool of the common mode voltage control is the switching vectors and changing the switching pattern. Among the mentioned vectors at Table. I and Fig.3, the vectors V5, V7, V11, V15, V19, V21 are called medium vectors which generate Zero common mode voltage. V2, V6, V8, V18, V20, V24 are called large vectors which generate the common mode voltage V levels of dc . There are two types of small vectors which 6 Vdc V (V14, V16, V22, V4, V10, V12) or dc (V1, V3, generate 6 3 V9, V17, V23, V25). Note that these two vectors set are creating the same switching vectors one by one but generating different common mode voltage. We can just use the first switching vectors set in the switching pattern in order to eliminate a common mode voltage level. Three zero switching vectors are available in this topology in which two of them (V0,V22)

(b) Figure 6. Simplification of three-level space vector diagram in two-level space vector diagram

As two of the vectors in each sector of these hexagons are not adjacent with each other, three vectors in each switching cycle should be placed in a manner to achieve adjacency in the switching pattern. For example, the switching pattern in hexagon 1 is as Table II. The other hexagons are switched at the same way.

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TABLE II.

SWITCHING PATTERN IN HEXAGON 1

Sector Sector 1 Sector 2 Sector 3 Sector 4 Sector 5 Sector 6 Switching pattern 211-210-200-210-211 211-210-110-210-211 211-111-110-111-211 211-111-101-111-211 211-201-101-201-211 211-201-200-201-211

B. Simulation Results A simulation study has been performed by MATLAB SIMULINK using the Wind Farm- Detailed DFIG Model of this software [17]. The two-level back-to-back inverter has been changed with a three-level one and the proposed switching algorithms have been developed to the three-level converters. A wind farm connected to distribution system exports power to grid through a feeder. Wind turbines using a doubly-fed induction generator (DFIG) consist of a wound rotor induction generator and an AC/DC/AC IGBT-based PWM converter. The stator winding is connected directly to the grid while the rotor is fed at variable frequency through the AC/DC/AC converter. The DFIG technology allows extracting maximum energy from the wind for low wind speeds by optimizing the turbine speed, while minimizing mechanical stresses on the turbine during gusts of wind. In this demo the wind speed is maintained constant at 15 m/s. The control system uses a torque controller in order to maintain the speed at 1.2 pu. The reactive power produced by the wind turbine is regulated at 0 Mvar. The simulation parameters are shown in Table III.
TABLE III. SIMULATION PARAMETERS Design parameters Number of wind turbines Power of each wind turbine Wind farm power Wind speed Distribution network voltage Length of distribution line Grid voltage Grid frequency DC-link voltage Reference reactive power value 6 1.5 MW 9MW 15 m/s 25KV 30 km 120 kV 60hz 1200volts 0 Mvar

According to analysis of [3], main portion of this voltage converts to shaft voltage and this fact requires other shaft voltage remediation strategies. There are two other se solutions for shaft voltage reduction. The first one is remove all the 12 small vectors, 6 large vectors and 2 zero vectors to achieve a zero common mode voltage and consequently a zero shaft voltage. This strategy converts the multilevel inverter to a two level converter with 6 medium vectors and a zero switching vector. This penalty still can be paid but a detailed analysis on the active and reactive power should be carried out whether it is possible or not. The average achievable voltage level for the rotor side will be decreased which may be another disadvantage of this option. Another alternative is to work on the machine structure to reduce parasitic capacitive couplings of the generator structure. For this purpose, a high frequency model of DFIG should be determined and shaft voltage would be calculated based on different capacitive couplings. Therefore, the effective design parameters of the machine should be changed in order to achieve an optimal design. A common mode voltage reduction technique with a modified PWM strategy and design modification will reduce shaft voltage to a great extent. The analysis regarding to machine design parameters are available at [7].

Figure 7.

Common mode voltage with the tradition space vector modulation

Fig.7 shows the common mode voltage with a traditional space vector modulation in which all the common mode voltage levels are available in the pattern. The proposed control strategy leads to a 66 percent of common mode voltage as shown in Fig.8. This is a great possible reduction with minimum possible side effects. Note this amount of common mode voltage still affects the DFIG system in terms of shaft voltage generation but still this decrement helps a lot.

Figure 8.

Common mode voltage with elimination of the switching vectors with maximume common mode voltage levels

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Fig.9 shows the DC-link voltage which has been regulated around 1.2 kV. The active and reactive power tracks the reference values and the speed is controlled at 1.2 pu.

VI.
[1]

REFERENCES

[2]

[3]

[4]

[5]

[6]

[7]

[8]

[9]

[10]

[11]

[12]

Figure 9.

DC-link voltage, active and reactive power and rotor speed

[13]

V. CONCLUSIONS A common mode voltage reduction strategy has been presented for a DFIG system with a three-level back-to-back inverter. Based on the analysis, only the rotor side converter generates the common mode voltage proposed system. The switching vectors which generated maximum common mode voltage levels have been removed from the switching pattern. Applying this strategy reduces 66 percent of shaft voltage in this topology. The advantages of the proposed technique are: DClink voltage balancing and controlling active and reactive power control. Simulation results have been presented in order to verify the mentioned strategy.

[14]

[15]

[16] [17] [18]

[19]

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