4 RON, 4-/8-Channel 15 V/+12 V/5 V iCMOS Multiplexers ADG1408/ADG1409

FEATURES
4.7 maximum on resistance @ 25C 0.5 on resistance flatness Up to 190 mA continuous current Fully specified at 15 V/+12 V/5 V 3 V logic-compatible inputs Rail-to-rail operation Break-before-make switching action 16-lead TSSOP and 4 mm 4 mm LFCSP packages
S1

FUNCTIONAL BLOCK DIAGRAM

ADG1408
S1A DA S4A D S1B DB S8 1-OF-8 DECODER S4B 1-OF-4 DECODER
04861-001

ADG1409

APPLICATIONS
Relay replacement Audio and video routing Automatic test equipment Data acquisition systems Temperature measurement systems Avionics Battery-powered systems Communication systems Medical equipment

A0 A1 A2 EN

A0

A1

EN

Figure 1.

GENERAL DESCRIPTION
The ADG1408/ADG1409 are monolithic iCMOS analog multiplexers comprising eight single channels and four differential channels, respectively. The ADG1408 switches one of eight inputs to a common output, as determined by the 3-bit binary address lines, A0, A1, and A2. The ADG1409 switches one of four differential inputs to a common differential output, as determined by the 2-bit binary address lines, A0 and A1. An EN input on both devices is used to enable or disable the device. When disabled, all channels are switched off. The iCMOS (industrial CMOS) modular manufacturing process combines high voltage CMOS (complementary metal-oxide semiconductor) and bipolar technologies. It enables the development of a wide range of high performance analog ICs capable of 33 V operation in a footprint that no other generation of high voltage parts has been able to achieve. Unlike analog ICs using conventional CMOS processes, iCMOS components can tolerate high supply voltages while providing increased performance, dramatically lower power consumption, and reduced package size. The ultralow on resistance and on resistance flatness of these switches make them ideal solutions for data acquisition and gain switching applications where low distortion is critical. iCMOS construction ensures ultralow power dissipation, making the parts ideally suited for portable and batterypowered instruments.

PRODUCT HIGHLIGHTS
1. 2. 3. 4. 4 on resistance. 0.5 on resistance flatness. 3 V logic compatible digital input, VIH = 2.0 V, VIL = 0.8 V. 16-lead TSSOP and 4 mm 4 mm LFCSP packages.

Table 1. Related Devices

Part No. ADG1208/ADG1209 Description Low capacitance, low charge injection, and low leakage 4-/8-channel 15 V multiplexers

Rev. B
Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective owners.

One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 781.329.4700 www.analog.com Fax: 781.461.3113 20062009 Analog Devices, Inc. All rights reserved.

ADG1408/ADG1409 TABLE OF CONTENTS

Features .............................................................................................. 1 Applications ....................................................................................... 1 Functional Block Diagram .............................................................. 1 General Description ......................................................................... 1 Product Highlights ........................................................................... 1 Revision History ............................................................................... 2 Specifications..................................................................................... 3 15 V Dual Supply .......................................................................... 3 12 V Single Supply ........................................................................ 5 5 V Dual Supply ............................................................................ 7 Continuous Current per channel, S or D ...................................8 Absolute Maximum Ratings ............................................................9 Thermal Resistance .......................................................................9 ESD Caution...................................................................................9 Pin Configurations and Function Descriptions ......................... 10 Typical Performance Characteristics ........................................... 12 Terminology .................................................................................... 16 Test Circuits ..................................................................................... 17 Outline Dimensions ....................................................................... 19 Ordering Guide .......................................................................... 20

REVISION HISTORY
3/09Rev. A to Rev. B Change to IDD Parameter (Table 2) ................................................. 4 Change to IDD Parameter (Table 3) ................................................. 6 8/08Rev. 0 to Rev. A Changes to Features.......................................................................... 1 Added Table 5; Renumbered Sequentially .................................... 8 Changes to Table 6 ............................................................................ 9 Added Exposed Pad Notation to Figure 3 ................................... 10 Added Exposed Pad Notation to Figure 5 ................................... 11 Added Exposed Pad Notation to Outline Dimensions ............. 19 8/06Revision 0: Initial Version

Rev. B | Page 2 of 20

ADG1408/ADG1409 SPECIFICATIONS
15 V DUAL SUPPLY
VDD = +15 V 10%, VSS = 15 V 10%, GND = 0 V, unless otherwise noted. Table 2.
Parameter ANALOG SWITCH Analog Signal Range On Resistance (RON) On Resistance Match Between Channels (RON) On Resistance Flatness (RFLAT(ON)) LEAKAGE CURRENTS Source Off Leakage, IS (Off ) Drain Off Leakage, ID (Off ) Channel On Leakage, ID, IS (On) DIGITAL INPUTS Input High Voltage, VINH Input Low Voltage, VINL Input Current Digital Input Capacitance, CIN DYNAMIC CHARACTERISTICS 2 Transition Time, tTRANSITION Break-Before-Make Time Delay, tBBM tON (EN) tOFF (EN) Charge Injection Off Isolation Channel-to-Channel Crosstalk Total Harmonic Distortion, THD + N 3 dB Bandwidth ADG1408 ADG1409 Insertion Loss CS (Off ) CD (Off ) ADG1408 ADG1409 CD, CS (On) ADG1408 ADG1409 +25C 40C to +85C 40C to +125C 1 VSS to VDD 4 4.7 0.2 0.78 0.5 0.72 0.04 0.2 0.04 0.45 0.1 1.5 5.7 0.85 0.77 6.7 1.1 0.92 Unit V typ max typ max typ max nA typ nA max nA typ nA max nA typ nA max V min V max A typ A max pF typ ns typ ns max ns typ ns min ns typ ns max ns typ ns max pC typ dB typ dB typ % typ Test Conditions/Comments

VS = 10 V, IS = 10 mA; see Figure 26 VDD = +13.5 V, VSS = 13.5 V VS = 10 V, IS = 10 mA VS = 10 V, IS = 10 mA VDD = +16.5 V, VSS = 16.5 V VS = 10 V, VD = 10 V; see Figure 27 VS = 10 V, VD = 10 V; see Figure 27 VS = VD = 10 V; see Figure 28

0.6 2 3

5 30 30 2.0 0.8

0.005 0.1 4 140 170 50 100 120 100 120 50 70 70 0.025

VIN = VGND or VDD

210

240 30

150 150

165 170

RL = 100 , CL = 35 pF VS = 10 V, see Figure 29 RL = 100 , CL = 35 pF VS1 = VS2 = 10 V; see Figure 30 RL = 100 , CL = 35 pF VS = 10 V; see Figure 31 RL = 100 , CL = 35 pF VS = 10 V; see Figure 31 VS = 0 V, RS = 0 , CL = 1 nF; see Figure 32 RL = 50 , CL = 5 pF, f = 1 MHz; see Figure 33 RL = 50 , CL = 5 pF, f = 1 MHz; see Figure 34 RL = 110 , 15 V p-p, f = 20 Hz to 20 kHz; see Figure 36 RL = 50 , CL = 5 pF; see Figure 35

60 115 0.24 14 80 40 135 90

Rev. B | Page 3 of 20

MHz typ MHz typ dB typ pF typ pF typ pF typ pF typ pF typ

RL = 50 , CL = 5 pF, f = 1 MHz; see Figure 35 f = 1 MHz f = 1 MHz f = 1 MHz f = 1 MHz f = 1 MHz

ADG1408/ADG1409
Parameter POWER REQUIREMENTS IDD +25C 0.002 1 220 380 ISS VDD/VSS
1 2

40C to +85C

40C to +125C 1

Unit A typ A max A typ A max A typ A max V min/max

Test Conditions/Comments VDD = +16.5 V, VSS = 16.5 V Digital inputs = 0 V or VDD Digital inputs = 5 V Digital inputs = 0 V, 5 V or VDD

0.002 1 4.5/16.5

Temperature range: Y version: 40C to +125C. Guaranteed by design, not subject to production test.

Rev. B | Page 4 of 20

ADG1408/ADG1409
12 V SINGLE SUPPLY
VDD = 12 V 10%, VSS = 0 V, GND = 0 V, unless otherwise noted. Table 3.
Parameter ANALOG SWITCH Analog Signal Range On Resistance (RON) On Resistance Match Between Channels (RON) On Resistance Flatness (RFLAT(ON)) LEAKAGE CURRENTS Source Off Leakage, IS (Off ) Drain Off Leakage, ID (Off ) Channel On Leakage, ID, IS (On) DIGITAL INPUTS Input High Voltage, VINH Input Low Voltage, VINL Input Current Digital Input Capacitance, CIN DYNAMIC CHARACTERISTICS 2 Transition Time, tTRANSITION Break-Before-Make Time Delay, tBBM tON (EN) tOFF (EN) Charge Injection Off Isolation Channel-to-Channel Crosstalk 3 dB Bandwidth ADG1408 ADG1409 Insertion Loss CS (Off ) CD (Off ) ADG1408 ADG1409 CD, CS (On) ADG1408 ADG1409 +25C 40C to +85C 40C to +125C 1 0 to VDD 6 8 0.2 0.82 1.5 2.5 0.04 0.2 0.04 0.45 0.06 0.44 9.5 0.85 2.5 11.2 1.1 2.8 Unit V typ max typ max typ max nA typ nA max nA typ nA max nA typ nA max V min V max A typ A max pF typ ns typ ns max ns typ ns min ns typ ns max ns typ ns max pC typ dB typ dB typ MHz typ MHz typ dB typ pF typ pF typ pF typ pF typ pF typ Test Conditions/Comments

VS = 0 V to 10 V, IS = 10 mA; see Figure 26 VDD = 10.8 V, VSS = 0 V VS = 0 V to 10 V, IS = 10 mA VS = 0 V to 10 V, IS = 10 mA VDD = 13.2 V VS = 1 V/10 V, VD = 10 V/1 V; see Figure 27 VS = 1 V/10 V, VD = 10 V/1 V; see Figure 27 VS = VD = 1 V or 10 V; see Figure 28

0.6 1 1.3

5 37 32 2.0 0.8

0.005 0.1 5 200 260 90 160 210 115 145 12 70 70 36 72 0.5 25 165 80 200 120

VIN = VGND or VDD

330

380 40

250 180

285 200

RL = 100 , CL = 35 pF VS = 8 V; see Figure 29 RL = 100 , CL = 35 pF VS1 = VS2 = 8 V; see Figure 30 RL = 100 , CL = 35 pF VS = 8 V; see Figure 31 RL = 100 , CL = 35 pF VS = 8 V; see Figure 31 VS = 6 V, RS = 0 , CL = 1 nF; see Figure 32 RL = 50 , CL = 5 pF, f = 1 MHz; see Figure 33 RL = 50 , CL = 5 pF, f = 1 MHz; see Figure 34 RL = 50 , CL = 5 pF; see Figure 35

RL = 50 , CL = 5 pF, f = 1 MHz; see Figure 35 f = 1 MHz f = 1 MHz f = 1 MHz f = 1 MHz f = 1 MHz

Rev. B | Page 5 of 20

ADG1408/ADG1409
Parameter POWER REQUIREMENTS IDD +25C 0.002 1 220 VDD
1 2

40C to +85C

40C to +125C 1

Unit A typ A max A typ A max V min/max

Test Conditions/Comments VDD = 13.2 V Digital inputs = 0 V or VDD Digital inputs = 5 V VSS = 0 V, GND = 0 V

380 5/16.5

Temperature range for Y version: 40C to +125C. Guaranteed by design, not subject to production test.

Rev. B | Page 6 of 20

ADG1408/ADG1409
5 V DUAL SUPPLY
VDD = +5 V 10%, VSS = 5 V 10%, GND = 0 V, unless otherwise noted. Table 4.
Parameter ANALOG SWITCH Analog Signal Range On Resistance (RON) On Resistance Match Between Channels (RON) On Resistance Flatness (RFLAT(ON)) LEAKAGE CURRENTS Source Off Leakage, IS (Off ) Drain Off Leakage, ID (Off ) Channel On Leakage, ID, IS (On) DIGITAL INPUTS Input High Voltage, VINH Input Low Voltage, VINL Input Current Digital Input Capacitance, CIN DYNAMIC CHARACTERISTICS 2 Transition Time, tTRANSITION Break-Before-Make Time Delay, tBBM tON (EN) tOFF (EN) Charge Injection Off Isolation Channel-to-Channel Crosstalk Total Harmonic Distortion, THD + N 3 dB Bandwidth ADG1408 ADG1409 Insertion Loss CS (Off ) CD (Off ) ADG1408 ADG1409 CD, CS (On) ADG1408 ADG1409 +25C 40C to +85C 40C to +125C 1 VSS to VDD 7 9 0.3 0.78 1.5 2.5 0.02 0.2 0.02 0.45 0.04 0.3 10.5 0.91 2.5 12 1.1 3 Unit V typ max typ max typ max nA typ nA max nA typ nA max nA typ nA max V min V max A typ A max pF typ ns typ ns max ns typ ns min ns typ ns max ns typ ns max pC typ dB typ dB typ % typ Test Conditions/Comments

VS = 4.5 V, IS = 10 mA; see Figure 26 VDD = +4.5 V, VSS = 4.5 V VS = 4.5 V, IS = 10 mA VS = 4.5 V; IS = 10 mA VDD = +5.5 V, VSS = 5.5 V VS = 4.5 V, VD = 4.5 V; see Figure 27 VS = 4.5 V, VD = 4.5 V; see Figure 27 VS = VD = 4.5 V; see Figure 28

0.6 0.8 1.1

5 20 22 2.0 0.8

0.005 0.1 5 330 440 100 245 330 215 285 10 70 70 0.06

VIN = VGND or VDD

530

550 50

400 335

440 370

RL = 100 , CL = 35 pF VS = 5 V; see Figure 29 RL = 100 , CL = 35 pF VS1 = VS2 = 5 V; see Figure 30 RL = 100 , CL = 35 pF VS = 5 V; see Figure 31 RL = 100 , CL = 35 pF VS = 5 V; see Figure 31 VS = 0 V, RS = 0 , CL = 1 nF; see Figure 32 RL = 50 , CL = 5 pF, f = 1 MHz; see Figure 33 RL = 50 , CL = 5 pF, f = 1 MHz; see Figure 34 RL = 110 , 5 V p-p, f = 20 Hz to 20 kHz; see Figure 36 RL = 50 , CL = 5 pF; see Figure 35

40 80 0.5 20 130 65 180 120

MHz typ MHz typ dB typ pF typ pF typ pF typ pF typ pF typ

RL = 50 , CL = 5 pF, f = 1 MHz; see Figure 35 f = 1 MHz f = 1 MHz f = 1 MHz f = 1 MHz f = 1 MHz

Rev. B | Page 7 of 20

ADG1408/ADG1409
Parameter POWER REQUIREMENTS IDD ISS VDD/VSS
1 2

+25C 0.001

40C to +85C

40C to +125C 1

Unit A typ A max A typ A max V min/max

Test Conditions/Comments VDD = +5.5 V, VSS = 5.5 V Digital inputs = 0 V or VDD Digital inputs = 0 V, 5 V or VDD

1 0.001 1 4.5/16.5

Temperature range for Y version: 40C to +125C. Guaranteed by design, not subject to production test.

CONTINUOUS CURRENT PER CHANNEL, S OR D

Table 5.
Parameter CONTINUOUS CURRENT, S or D 1 15 V Dual Supply ADG1408 ADG1409 12 V Single Supply ADG1408 ADG1409 5 V Dual Supply ADG1408 ADG1409
1

25C

85C

125C

Unit

Test Conditions/Comments VDD = +13.5 V, VSS = 13.5 V

190 140 160 120 155 115

105 85 95 75 90 70

50 45 50 40 45 40

mA max mA max VDD = 10.8 V, VSS = 0 V mA max mA max VDD = +4.5 V, VSS = 4.5 V mA max mA max

Guaranteed by design, not subject to production test.

Rev. B | Page 8 of 20

ADG1408/ADG1409 ABSOLUTE MAXIMUM RATINGS

TA = 25C, unless otherwise noted. Table 6.
Parameter VDD to VSS VDD to GND VSS to GND Analog Inputs, Digital Inputs 1 Rating 35 V 0.3 V to +25 V +0.3 V to 25 V VSS 0.3 V to VDD + 0.3 V or 30 mA, whichever occurs first Table 5 data + 10% 350 mA

Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only; functional operation of the device at these or any other conditions above those indicated in the operational section of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. Only one absolute maximum rating can be applied at any one time.

Continuous Current, S or D Peak Current, S or D (Pulsed at 1 ms, 10% Duty Cycle Maximum) Operating Temperature Range Industrial (Y Version) Storage Temperature Range Junction Temperature Reflow Soldering Peak Temperature (Pb-Free)
1

THERMAL RESISTANCE
JA is specified for the worst-case conditions, that is, a device soldered in a circuit board for surface-mount packages.

40C to +125C 65C to +150C 150C 260(+0/5)C

Table 7. Thermal Resistance

Package Type 16-Lead TSSOP 16-Lead LFCSP JA 150.4 30.4 JC 50 Unit C/W C/W

Overvoltages at A, EN, S, or D are clamped by internal diodes. Current should be limited to the maximum ratings given.

ESD CAUTION

Rev. B | Page 9 of 20

ADG1408/ADG1409 PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS

16 EN 15 A0
A0 1 EN 2 VSS
3 16 15

A1 A2 GND VDD S5 S6 S7 S8
04861-002

VSS 1 S1 2 S2 3 S3 4

PIN 1 INDICATOR

13 A2

14 A1

12 GND 11 VDD 10 S5 9 S6
04861-003

ADG1408
TOP VIEW (Not to Scale)

ADG1408
TOP VIEW (Not to Scale)

14 13 12 11 10 9

S1 4 S2 5 S3 6 S4 7 D 8

NOTES 1. THE EXPOSED PAD IS CONNECTED INTERNALLY. FOR INCREASED RELIABILITY OF THE SOLDER JOINTS AND MAXIMUM THERMAL CAPABILITY, IT IS RECOMMENDED THAT THE PAD BE SOLDERED TO THE SUBSTRATE, VSS.

Figure 2. ADG1408 Pin Configuration (TSSOP)

Figure 3. ADG1408 Pin Configuration (LFCSP)

Table 8. ADG1408 Pin Function Descriptions

Pin No. TSSOP LFCSP 1 15 2 16 3 4 5 6 7 8 9 10 11 12 13 14 15 16 1 2 3 4 5 6 7 8 9 10 11 12 13 14 EP Mnemonic A0 EN VSS S1 S2 S3 S4 D S8 S7 S6 S5 VDD GND A2 A1 Exposed Pad Description Logic Control Input. Active High Digital Input. When low, the device is disabled and all switches are off. When high, Ax logic inputs determine on switches. Most Negative Power Supply Potential. In single supply applications, it can be connected to ground. Source Terminal 1. Can be an input or an output. Source Terminal 2. Can be an input or an output. Source Terminal 3. Can be an input or an output. Source Terminal 4. Can be an input or an output. Drain Terminal. Can be an input or an output. Source Terminal 8. Can be an input or an output. Source Terminal 7. Can be an input or an output. Source Terminal 6. Can be an input or an output. Source Terminal 5. Can be an input or an output. Most Positive Power Supply Potential. Ground (0 V) Reference. Logic Control Input. Logic Control Input. The exposed pad is connected internally. For increased reliability of the solder joints and maximum thermal capability, it is recommended that the pad be soldered to the substrate, VSS.

Table 9. ADG1408 Truth Table

A2 X 0 0 0 0 1 1 1 1 A1 X 0 0 1 1 0 0 1 1 A0 X 0 1 0 1 0 1 0 1 EN 0 1 1 1 1 1 1 1 1
Rev. B | Page 10 of 20

On Switch None 1 2 3 4 5 6 7 8

S7 8

S8 7

S4 5

D 6

ADG1408/ADG1409
16 EN 15 A0 13 GND 14 A1

A0 1 EN 2 VSS S1A S2A S3A S4A

3 4 5 6 7

16 15

A1 GND VDD S1B S2B S3B S4B

04861-004

VSS 1 S1A 2 S2A 3 S3A 4

PIN 1 INDICATOR

12 VDD 11 S1B 10 S2B 9 S3B

ADG1409
TOP VIEW (Not to Scale)

ADG1409
TOP VIEW (Not to Scale)

14 13 12 11 10 9

S4B 8

S4A 5

DB 7

DA 6

DA 8

DB

NOTES 1. THE EXPOSED PAD IS CONNECTED INTERNALLY. FOR INCREASED RELIABILITY OF THE SOLDER JOINTS AND MAXIMUM THERMAL CAPABILITY, IT IS RECOMMENDED THAT THE PAD BE SOLDERED TO THE SUBSTRATE, VSS.

Figure 4. ADG1409 Pin Configuration (TSSOP)

Figure 5. ADG1409 Pin Configuration (LFCSP)

Table 10. ADG1409 Pin Function Descriptions

Pin No. TSSOP LFCSP 1 15 2 16 3 4 5 6 7 8 9 10 11 12 13 14 15 16 1 2 3 4 5 6 7 8 9 10 11 12 13 14 EP Mnemonic A0 EN VSS S1A S2A S3A S4A DA DB S4B S3B S2B S1B VDD GND A1 Exposed Pad Description Logic Control Input. Active High Digital Input. When low, the device is disabled and all switches are off. When high, Ax logic inputs determine on switches. Most Negative Power Supply Potential. In single supply applications, it can be connected to ground. Source Terminal 1A. Can be an input or an output. Source Terminal 2A. Can be an input or an output. Source Terminal 3A. Can be an input or an output. Source Terminal 4A. Can be an input or an output. Drain Terminal A. Can be an input or an output. Drain Terminal B. Can be an input or an output. Source Terminal 4B. Can be an input or an output. Source Terminal 3B. Can be an input or an output. Source Terminal 2B. Can be an input or an output. Source Terminal 1B. Can be an input or an output. Most Positive Power Supply Potential. Ground (0 V) Reference. Logic Control Input. The exposed pad is connected internally. For increased reliability of the solder joints and maximum thermal capability, it is recommended that the pad be soldered to the substrate, VSS.

Table 11. ADG1409 Truth Table

A1 X 0 0 1 1 A0 X 0 1 0 1 EN 0 1 1 1 1 On Switch Pair None 1 2 3 4

Rev. B | Page 11 of 20

04861-005

ADG1408/ADG1409 TYPICAL PERFORMANCE CHARACTERISTICS

6 TA = 25C 5
ON RESISTANCE () ON RESISTANCE () 6 5 4 3 2 1 0 15 TA = +25C TA = +85C TA = 40C TA = +125C 10 5 0 5 10 15
04861-008 04861-010 04861-009

7 VDD = +15V VSS = 15V

2 VDD VDD VDD VDD VDD = +15V, VSS = 15V = +13.5V, VSS = 13.5V = +12V, VSS = 12V = +10V, VSS = 10V = +16.5V, VSS = 16.5V 8.5 4.5 0.5 3.5 7.5 11.5 15.5
04861-006

0 16.5

12.5

SOURCE OR DRAIN VOLTAGE (V)

SOURCE OR DRAIN VOLTAGE (V)

Figure 6. On Resistance vs. VD, VS; Dual Supply

Figure 9. On Resistance vs. VD, VS for Different Temperatures; 15 V Dual Supply

12

9 TA = 25C 8

VDD = +5V VSS = 5V 10

7
ON RESISTANCE () ON RESISTANCE ()

6 5 4 3 2 1 0 7 VDD VDD VDD VDD 6 = +7V, VSS = 7V = +5.5V, VSS = 5.5V = +5V, VSS = 5V = +4.5V, VSS = 4.5V
04861-036

4 TA = +25C TA = +85C TA = 40C TA = +125C 4 3 2 1 0 1 2 3 4 5

0 5

SOURCE OR DRAIN VOLTAGE (V)

SOURCE OR DRAIN VOLTAGE (V)

Figure 7. On Resistance vs. VD, VS; Dual Supply

Figure 10. On Resistance vs. VD, VS for Different Temperatures; 5 V Dual Supply
10

13 12 11 10 ON RESISTANCE () 9 8 7 6 5 4 3 2 1 0 0 VDD VDD VDD VDD VDD 1 = 12V = 13.2V = 10.8V = 8V = 5V 2 3 4 5 6 7 8 9 10 11 12 13

04861-007

TA = 25C VSS = 0V

9 8 ON RESISTANCE () 7 6 5 4 3 2 1 0 0 TA = +25C TA = +85C TA = 40C TA = +125C 2 4 6 8

VDD = 12V VSS = 0V

10

12

SOURCE OR DRAIN VOLTAGE (V)

SOURCE OR DRAIN VOLTAGE (V)

Figure 8. On Resistance vs. VD, VS; Single Supply

Figure 11. On Resistance vs. VD, VS for Different Temperatures; 12 V Single Supply

Rev. B | Page 12 of 20

ADG1408/ADG1409
1.0 0.8 0.6 LEAKAGE CURRENT (nA) 0.4 0.2 0 0.2 0.4 0.6 0.8
04861-011

LEAKAGE CURRENT (nA)

IS (OFF) + ID (OFF) + IS (OFF) + ID (OFF) + ID, IS (ON) ++ ID, IS (ON)

VDD = +15V VSS = 15V VBIAS = +10V/10V

18 16 14 12 10 8 6 4 2 0

IS (OFF) + ID (OFF) + IS (OFF) + ID (OFF) + ID, IS (ON) ++ ID, IS (ON)

VDD = 12V VSS = 0V VBIAS = 1V/10V

10

20

30

40

50

60

70

80

20

40

60

80

100

120

TEMPERATURE (C)

TEMPERATURE (C)

Figure 12. Leakage Current vs. Temperature; 15 V Dual Supply

14 12 10 8 6 4 2 20 0 2
04861-012

Figure 15. Leakage Current vs. Temperature; 12 V Single Supply

70 60 50 40 30 VDD = +12V VSS = 0V VDD = +15V VSS = 15V

LEAKAGE CURRENT (nA)

IS (OFF) + ID (OFF) + IS (OFF) + ID (OFF) + ID, IS (ON) ++ ID, IS (ON)

VDD = +15V VSS = 15V VBIAS = +10V/10V

IDD PER CHANNEL TA = 25C

IDD (A)

10 0

VDD = +5V VSS = 5V 0 2 4 6 8 10 12 14

04861-034

20

40

60

80

100

120

TEMPERATURE (C)

LOGIC, AX (V)

Figure 13. Leakage Current vs. Temperature; 15 V Dual Supply

10 9 8 LEAKAGE CURRENT (nA) 7 6 5 4 3 2 1 0
04861-015

Figure 16. Positive Supply Current vs. Logic Level

CHARGE INJECTION (pC)

IS (OFF) + ID (OFF) + IS (OFF) + ID (OFF) + ID, IS (ON) ++ ID, IS (ON)

200
VDD = +5V VSS = 5V VBIAS = +4.5V/4.5V

TA = 25C 150 100 50 0 50 100 150 200 15 VDD = +15V VSS = 15V VDD = +5V VSS = 5V VDD = +12V VSS = 0V

20

40

60

80

100

120

10

0 VS (V)

10

15

TEMPERATURE (C)

Figure 14. Leakage Current vs. Temperature; 5 V Dual Supply

Figure 17. Charge Injection vs. Source Voltage

Rev. B | Page 13 of 20

04861-014

04861-013

1.0

ADG1408/ADG1409
450 400 350 300 TIME (ns) 250 200 150 100 50
04861-033

0 10 VDD = +5V VSS = 5V CROSSTALK (dB) VDD = 12V VSS = 0V 20 30 40 50 60 70 80 90 100 20 0 20 40 60 80 100 120 10k 100k 1M 10M 100M 1G
04861-018

VDD = +15V VSS = 15V TA = 25C

ADJACENT CHANNEL

VDD = +15V VSS = 15V

NONADJACENT CHANNEL

0 40

110 1k

TEMPERATURE (C)

FREQUENCY (Hz)

Figure 18. Transition Time vs. Temperature

Figure 21. ADG1409 Crosstalk vs. Frequency

0 10 20 OFF ISOLATION (dB) 30 40 50 60 70 80 90 100

04861-016

0 VDD = +15V VSS = 15V TA = 25C 0.5 1.0

BANDWIDTH (dB)

1.5 2.0 2.5 3.0 3.5 VDD = +15V VSS = 15V TA = 25C 1k 10k 100k 1M 10M 100M
04861-019 04861-031

110 1k

10k

100k

1M

10M

100M

1G

4.0 100

FREQUENCY (Hz)

FREQUENCY (Hz)

Figure 19. Off Isolation vs. Frequency

Figure 22. ADG1408 On Response vs. Frequency

0 10 20 30 CROSSTALK (dB) 40 50 60 70 80 90 100 10k 100k 1M 10M 100M 1G

04861-017

0 VDD = +15V VSS = 15V TA = 25C 0.5 1.0

BANDWIDTH (dB)

1.5 2.0 2.5 3.0 3.5 VDD = +15V VSS = 15V TA = 25C 1k 10k 100k 1M 10M 100M 1G

110 1k

4.0 100

FREQUENCY (Hz)

FREQUENCY (Hz)

Figure 20. ADG1408 Crosstalk vs. Frequency

Figure 23. ADG1409 On Response vs. Frequency

Rev. B | Page 14 of 20

ADG1408/ADG1409
0.10 0.09 0.08 0.07 VDD = +5V, VSS = 5V, VS = +5V p-p ACPSRR (dB) 0 LOAD = 110 TA = 25C 10 20 30 40 50 60 70 80 90 100
04861-032

VDD = +15V VSS = 15V TA = 25C V p-p = 0.63V

THD + N (%)

0.06 0.05 0.04 0.03 0.02 0.01 0 10 100 1k FREQUENCY (Hz) 10k 100k VDD = +15V, VSS = 15V, VS = +15V p-p

NO DECOUPLING CAPACITORS

DECOUPLING CAPACITORS ON SUPPLIES

1k

10k

100k

1M

10M

FREQUENCY (Hz)

Figure 24. Total Harmonic Distortion Plus Noise vs. Frequency

Figure 25. AC Power Supply Rejection Ratio vs. Frequency

Rev. B | Page 15 of 20

04861-035

110 100

ADG1408/ADG1409 TERMINOLOGY
RON Ohmic resistance between D and S. RON Difference between the RON of any two channels. RFLAT(ON) Flatness is defined as the difference between the maximum and minimum value of on resistance as measured. IS (Off) Source leakage current when the switch is off. ID (Off) Drain leakage current when the switch is off. ID, IS (On) Channel leakage current when the switch is on. VD (VS) Analog voltage on Terminal D and Terminal S. CS (Off) Channel input capacitance for off condition. CD (Off) Channel output capacitance for off condition. CD, CS (On) On switch capacitance. CIN Digital input capacitance. tON (EN) Delay time between the 50% and 90% points of the digital input and switch on condition. tOFF (EN) Delay time between the 50% and 90% points of the digital input and switch off condition. tTRANSITION Delay time between the 50% and 90% points of the digital inputs and the switch on condition when switching from one address state to another. tBBM Off time measured between the 80% point of both switches when switching from one address state to another. VINL Maximum input voltage for Logic 0. VINH Minimum input voltage for Logic 1. IINL, IINH Input current of the digital input. IDD Positive supply current. ISS Negative supply current. Off Isolation A measure of unwanted signal coupling through an off channel. Charge Injection A measure of the glitch impulse transferred from the digital input to the analog output during switching. Bandwidth Frequency at which the output is attenuated by 3 dB. On Response Frequency response of the on switch. Total Harmonic Distortion Plus Noise (THD + N) Ratio of the harmonic amplitude plus noise of the signal to the fundamental. AC Power Supply Rejection Ratio (ACPSRR) A measure of the ability of a part to avoid coupling noise and spurious signals that appear on the supply voltage pin to the output of the switch. The dc voltage on the device is modulated by a sine wave of 0.62 V p-p. The ratio of the amplitude of signal on the output to the amplitude of the modulation is the ACPSRR.

Rev. B | Page 16 of 20

ADG1408/ADG1409 TEST CIRCUITS

V
IS (OFF) A ID (OFF) A
04861-021

ID (ON) NC S D A
04861-022

D IDS
04861-020

VS

VS

VD

NC = NO CONNECT

VD

Figure 26. On Resistance

Figure 27. Off Leakage

Figure 28. On Leakage

VDD 3V ADDRESS DRIVE (VIN) 0V 50% 50%

VSS VSS S1 S2 TO S7 S8 VS8 OUTPUT D GND 100 35pF

04861-023

tr < 20ns tf < 20ns

A0 VIN 50 A1 A2

VDD

VS1

tTRANSITION

tTRANSITION
90%

ADG14081
2.4V EN

OUTPUT

90%
1SIMILAR CONNECTION FOR ADG1409.

Figure 29. Address to Output Switching Times, tTRANSITION

VDD 3V ADDRESS DRIVE (VIN) 0V VIN 50 A0 A1 A2 S1 S2 TO S7 S8 80% OUTPUT 80% 2.4V EN GND VS VSS

VDD

VSS

ADG14081
D

OUTPUT

100

35pF
04861-024

tBBM
1SIMILAR CONNECTION FOR ADG1409.

Figure 30. Break-Before-Make Delay, tBBM

VDD 3V ENABLE DRIVE (VIN) 0V 50% 50% A0 A1 A2 VDD

VSS VSS S1 S2 TO S8 VS

tON (EN)
0.9VO OUTPUT

tOFF (EN)
0.9VO VIN 50 EN

ADG14081
D GND

OUTPUT 100 35pF

1SIMILAR CONNECTION FOR ADG1409.

Figure 31. Enable Delay, tON (EN), tOFF (EN)

Rev. B | Page 17 of 20

04861-025

ADG1408/ADG1409
VDD VSS VDD 3V A0 A1 VIN A2 VSS

ADG14081
VOUT QINJ = CL VOUT VOUT VS VIN
04861-026

RS

S EN GND

D CL 1nF

VOUT

1SIMILAR

CONNECTION FOR ADG1409.

Figure 32. Charge Injection

VDD 0.1F

VSS 0.1F NETWORK ANALYZER

VDD 0.1F

VSS 0.1F NETWORK ANALYZER

VDD S

VSS

VDD S

VSS

50 D

50 VS VOUT

50 VS D RL 50 VOUT

GND

RL 50

GND
VOUT VS
04861-027

OFF ISOLATION = 20 log

INSERTION LOSS = 20 log

VOUT WITH SWITCH VOUT WITHOUT SWITCH

Figure 33. Off Isolation

VDD 0.1F NETWORK ANALYZER VOUT RL 50 VSS 0.1F
VDD VSS

Figure 35. Insertion Loss

VDD S1

VSS

0.1F

0.1F AUDIO PRECISION RS S

D S2 VS GND

R 50
IN

VDD

VSS

D VIN
04861-028

VS V p-p RL 10k VOUT

04861-030

CHANNEL-TO-CHANNEL CROSSTALK = 20 log

VOUT VS

GND

Figure 34. Channel-to-Channel Crosstalk

Figure 36. THD + Noise

Rev. B | Page 18 of 20

04861-029

ADG1408/ADG1409 OUTLINE DIMENSIONS

5.10 5.00 4.90
16 9

4.50 4.40 4.30

1 8

6.40 BSC

PIN 1 0.15 0.05 0.65 BSC 0.30 0.19 COPLANARITY 0.10 1.20 MAX

0.20 0.09

SEATING PLANE

8 0

0.75 0.60 0.45

COMPLIANT TO JEDEC STANDARDS MO-153-AB

Figure 37. 16-Lead Thin Shrink Small Outline Package [TSSOP] (RU-16) Dimensions shown in millimeters

4.00 BSC SQ

0.60 MAX
12 13

0.50 0.40 0.30

PIN 1 INDICATOR

16

PIN 1 INDICATOR

3.75 BSC SQ 0.65 BSC TOP VIEW

9

EXPOSED PAD
4 8 5

2.65 2.50 SQ 2.35 0.25 MIN

1.95 BCS 0.80 MAX 0.65 TYP BOT TOM VIEW FOR PROPER CONNECTION OF THE EXPOSED PAD, REFER TO THE PIN CONFIGURATION AND FUNCTION DESCRIPTIONS SECTION OF THIS DATA SHEET.

COMPLIANT TO JEDEC STANDARDS MO-220-VGGC.

Figure 38. 16-Lead Lead Frame Chip Scale Package [LFCSP_VQ] 4 mm 4 mm, Very Thin Quad (CP-16-13) Dimensions shown in millimeters

Rev. B | Page 19 of 20

031006-A

12 MAX 1.00 0.85 0.80 SEATING 0.30 PLANE 0.23 0.18

0.05 MAX 0.02 NOM COPLANARITY 0.20 REF 0.08

ADG1408/ADG1409
ORDERING GUIDE
Model ADG1408YRUZ 1 ADG1408YRUZ-REEL1 ADG1408YRUZ-REEL71 ADG1408YCPZ-REEL71 ADG1409YRUZ1 ADG1409YRUZ-REEL1 ADG1409YRUZ-REEL71 ADG1409YCPZ-REEL71
1

Temperature Range 40C to +125C 40C to +125C 40C to +125C 40C to +125C 40C to +125C 40C to +125C 40C to +125C 40C to +125C

Package Description 16-Lead Thin Shrink Small Outline Package [TSSOP] 16-Lead Thin Shrink Small Outline Package [TSSOP] 16-Lead Thin Shrink Small Outline Package [TSSOP] 16-Lead Lead Frame Chip Scale Package [LFCSP_VQ] 16-Lead Thin Shrink Small Outline Package [TSSOP] 16-Lead Thin Shrink Small Outline Package [TSSOP] 16-Lead Thin Shrink Small Outline Package [TSSOP] 16-Lead Lead Frame Chip Scale Package [LFCSP_VQ]

Package Option RU-16 RU-16 RU-16 CP-16-13 RU-16 RU-16 RU-16 CP-16-13

Z = RoHS Compliant Part.

20062009 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. D04861-0-3/09(B)

Rev. B | Page 20 of 20