Two-transistor Zeta-flyback DCDC converter with reduced transistor voltage stress D. Murthy-Bellur and M.K.

Kazimierczuk
A two-transistor Zeta-flyback DC-DC converter along with experimental results is introduced. The proposed converter topology is the extension of the single-transistor Zeta-flyback converter. With the incorporation of an additional transistor and two clamping diodes on the primary side of the transformer of the single-transistor Zeta-flyback converter, a two-transistor Zeta-flyback converter is proposed. High transistor voltage stress owing to the parasitic ringing seen in the single-transistor Zeta-flyback converter is reduced in the proposed converter. Furthermore, the voltage stresses of the transistors are reduced to the DC input voltage VI. Experimental results from a 10 V/30 W, 100 kHz laboratory prototype are presented.

Introduction: Recently, integration of DCDC converter topologies has been proposed [13] to achieve
high power density, low volume, high efficiency DCDC converters. A soft-switching Zeta-flyback converter is proposed in [1], which is the result of integrating the secondary sides of the hard-switching isolated Zeta and flyback converters and adding an active clamp circuit to the primary side of the transformer. By incorporating an additional transistor and two clamping diodes on the primary side of the transformer of the hard-switching single-transistor Zeta-flyback converter, a two-transistor Zeta-flyback converter is obtained (shown in Fig. 1). The parasitic transformer leakage inductance LI and the transistor output capacitances CO1 and CO2 are also shown in the equivalent circuit of Fig. 1. In the proposed converter, the high voltage ringing superimposed on the transistor off-state voltage of VI + nVO seen in the single-transistor Zeta-flyback converter is removed. Furthermore, the voltage stresses of both transistors are reduced to DC input voltage VI and most of the leakage energy stored in LI is returned to VI. In this Letter we propose a two-transistor Zeta-flyback converter and present the principle of circuit operation and experimental results.

Fig. 1 Proposed two-transistor Zeta-flyback converter

Circuit description: The basic circuit of the two-transistor Zeta-flyback DCDC converter is shown in
Fig. 1, including the parasitic components Lm, LI,
CO1,

and

CO2.

In the Figure, the two switches S1 and S2

CO2,

are n-channel power MOSFETs the output capacitors of which are denoted by CO1 and

respectively.

Clamping diodes D1 and D2 are cross-connected across the main switches and the primary winding. The circuit on the secondary side consists of winding Ls1, capacitor C, inductor L, and diode D3, winding Ls2 and diode D4. The DC input voltage, the filter capacitor, and the load resistance are denoted by VI, Cf, and RL, respectively. Both the switches S1 and S2 are turned on or off at the same time by a gate driver. The switching period Ts is given by 1/fs, where fs is the switching frequency. The ratio of switch on-time ton to Ts is defined as the switch duty ratio D. The transformer Tis modelled as an ideal transformer with its magnetising inductance Lm (referred to the primary side) and the total leakage inductance LI (referred to the primary side). The circuit operation is mainly categorised into six stages.

Principle of circuit operation of two-transistor Zeta -flyback converter: The principle of operation of each stage is explained with the aid of equivalent circuits shown in Fig. 2 and the voltage and current waveforms of the converter shown in Fig. 3a. The equivalent circuits are drawn under the following assumptions: 1. the diodes are ideal components, 2. the converter operates in continuous conduction mode (CCM), i.e. the inductances Lm and L are large enough so that the cur-rents through them are constant, 3. the capacitances C and Cf are large enough so that the voltages across them are constant and equal to VO, 4. the value of leakage inductance LI is far less than the value of the magnetising inductance Lm, 5. the time constants of the passive components are much greater than the switching period, and 6. before the beginning of the switching cycle, the diodes D3 and D4 are conducting and all other switches and diodes are off.

Fig. 2 Equivalent circuits of two-transistor Zeta-flyback converter during one complete switching cycle

Fig. 3 Voltage and current waveforms of two-transistor Zeta-flyback converter a Theoretical b Experiment Stage 1 [t0 , t ~ t1] Fig. 2a: At time t t0, both the switches S1 and S2 are turned on by a gate driver. The clamping diodes D1 and D2 are reverse biased as vD1 vD2 2VI. The leakage inductance LI prevents the instantaneous transfer of the current through the transformer secondary windings to the primary winding. Hence, the diodes D3 and D4 remain ON. The currents through LI, S1, and S2 begin to rise while cur-rents through D3 and D4 begin to fall. This stage ends at time t t1 when currents through the diode D3 and D4 reach zero.

Stage 2 [t1 , t ~ t2] Fig. 2b: During this stage, the switches S1, S2 are ON and all the diodes charged. This stage ends at time t t2 when both the switches are turned off. Stage 3 [t2 , t ~ t3] Fig. 2c: During this stage, the switches S1, S2 and all the diodes
D1D4

D1D4

are

OFF. The magnetising inductance Lm, leakage inductance LI, and the output inductance L are linearly are OFF. The

leakage current charges the transistor output capacitors CO1 and CO2 in a resonant manner. This stage ends at time t t3, when the voltage across each transistor equals VI, thus turning on the clamping diodes D1 and D2. Stage 4 [t3 , t ~ t4] Fig. 2d: During this stage, the switches S1, S2 are OFF and all the diodes voltage of the clamping diodes. The energy stored in LI is transferred to the DC
D1D4

are

ON. The voltages across each transistor vS1 and vS2 are clamped to VI + VF, where VF is the forward

input source VI via clamping diodes D1 and D2. This mode of operation is referred to as regenerative clamping mode. This stage ends at time t t4, when the leakage inductance current drops to zero, thereby turning off the clamping diodes D1 and D2. Stage 5 [t4 , t ~ t5] Fig. 2e: During this stage, the switches S1, S2 and the diodes D1, D2 are OFF while diodes D3 and D4 remain ON. The secondary winding voltages period of time. Stage 6 [t5 , t ~ t6] Fig. 2f: During this stage, the switches S1, S2 and the diodes D1, D2 are OFF while diodes D3 and D4 remain ON. For the remaining part of the switching cycle, the energy stored in Lm and L is transferred to the load. This stage ends at time t t6, when both the switches are turned on, thus completing one complete switching cycle.
vns1

and

vns2

are clamped to 2VO. The

transformer leakage inductance LI resonates with the transistor output capacitances CO1 and CO2 for a brief

Experimental results: A two-transistor Zeta-flyback converter was built using the following
specifications: VI 60 VDC, VO 10 VDC, POmax 30 W,fs 100 kHz. The following components were used in the experiment: switches S1, S2: IRF510; diodes D1 D4: MBR10100; Zeta-flyback transformer T:magnetics core ETD39, np: ns1: ns22 18/7/7; Lm 260 mH; LI ~ 14 mH; L 73.4 mH; C 100 mF/50 V; Cf 1 mF/50 V. Experimental current and voltage waveforms of the converter are depicted in Fig. 3b. The theoretical voltage and current waveforms of the converter shown in Fig. 3a are in excellent agreement with the experimental results shown in Fig. 3b. The maximum voltage across the power MOSFET switches was measured to be VI 60 V, as shown in Fig. 3b. The problem of high voltage transients owing to ringing in the single-transistor Zeta-flyback converter is eliminated and hence a MOSFET with lower voltage rating can be safely used.

Conclusion: A new isolated two-transistor Zeta-flyback converter topology with reduced transistor voltage
stress is proposed. The principle of circuit operation of the proposed converter is presented. The two transistors plus the clamping diodes on the primary side of the trans-former provide a simple mechanism to limit the switch overvoltage caused by ringing owing to the resonance of transformer leakage inductance and transistor output capacitance. Experimental results for the proposed converter are given and confirm the clamping of the switch overvoltage to DC input voltage VI. The power transistors are turned on under reduced voltage stresses.

References
1 Lin, B.R., and Hsieh, F.-Y.: Soft-switching Zeta-flyback converter with a buck-boost type of active clamp, IEEE Trans. Ind. Electron., 2007, 54, (5), pp. 28132822 2 Li, W.H., Li, W.C., and He, X.-N.: Isolated interleaved flyback-buck converter with inherent clamp scheme, Electron. Lett., 2009, 45, (16), pp. 853854 3 Tacca, H.E.: Single-switch two-output flyback-forward converter operation, IEEE Trans. Power Electron., 1998, 13, (5), pp. 903911