DESIGN AND ANALYSIS OF AN ACTIVE INTEGRATED ANTENNA

By Zhuoming Huang Bachelor of Science South China University of Technology, 2009

Submitted in Partial Fulfillment of the Requirements for the Degree of Master of Science in Electrical Engineering College of Engineering and Computing University of South Carolina 2011 Accepted by: Yinchao Chen, Director of Thesis Paul Huray, First Reader Tim Mousseau, Dean of the Graduate School

UMI Number: 1492267

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 Copyright by Zhuoming Huang, 2011 All Rights Reserved

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ACKNOWLEDGEMENTS
This thesis is dedicated to my parents. I would like to express my gratitude to my advisor, Dr. Yinchao Chen, who has offered me great help and taught me much knowledge in electrical engineering through the past two years. His attentive assistance in writing this thesis is heartily acknowledged as well. Also, I would like to give my thanks to my lab mates, Kangrong Li, Tom McDonough, and Inpyo Nam. In the past two years, they have given me a lot of helpful advice and study suggestion in lab meetings and daily discussions. In addition, all the support from other colleagues and professors and department officers are as well acknowledged.

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ABSTRACT
In this thesis, an active integrated antenna (AIA) system is proposed for potential applications in an RF receiver front end for mobile and wireless communication devices. The AIA system consists of a microstrip patch antenna and a low noise amplifier (LNA), which are integrated together with a matching circuit and printed on an FR4 PCB circuit board. The system is designed, analyzed, and optimized by targeting to satisfy the design specifications for both the microstrip antenna and the LNA in referencing the published industrial parameters. Firstly, the microstrip patch antenna is designed and simulated by the inset feeding method using Agilent ADS software. The optimized dimensions of the square patch are 1000mil 670 mil with the two smaller feeding patches (400mil 450mil). The center frequency of the system is 2.45GHz. The objective of this part is to design the antenna to be suitable for wireless communications characterized with low cost, easy fabrication, small size, and high efficiency. Then, the LNA (low-noise amplifier), composed of NE68030 NPN silicon transistor, bias circuit, and noise matching network, is also studied and designed. It is connected to the microstrip patch antenna to amplify the signal without adding additional noise. The target of this design is to ensure the LNA to be with high gain, low noise, high efficiency, low cost, and to match well with the receiver antenna. Finally, the microstrip patch antenna and the LNA are integrated together in both the schematic circuit and layout circuits. The integrated AIA system is further tuned and optimized for improving the system performance. The achieved results are encouraging and satisfying and the proposed specifications are essentially met, although the AIA system may be further improved with consideration of industrial design standards.
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CONTENTS
ACKNOWLEDGEMENTS ................................................................................................................... iii ABSTRACT ........................................................................................................................................ iv Chapter 1 INTRODUCTION............................................................................................................... 1 1.1 Introduction ........................................................................................................................... 1 1.2 Objective of the research ...................................................................................................... 2 1.3 Outline of the thesis .............................................................................................................. 3 Chapter 2 ANTENNA DESIGN ........................................................................................................... 4 2.1 Antenna theory introduction ................................................................................................ 4 2.2 Microstrip patch antenna fundamentals............................................................................... 5 Chapter 3 DESIGN AND ANALYSIS OF MICROSTRIP PATCH ANTENNA .......................................... 10 3.1 Microstrip Patch Antenna Specifications ............................................................................ 10 3.2 Design Procedure Microstrip Patch Antenna ...................................................................... 13 3.3 Result Analysis of Microstrip Patch Antenna ...................................................................... 23 Chapter 4 LNA DESIGN .................................................................................................................. 24 4.1 LNA Introduction ................................................................................................................. 24 4.1.1 Noise Figure and Noise Temperature........................................................................... 25 4.1.2 Gain............................................................................................................................... 26 4.1.3 Standing Wave Ratio .................................................................................................... 26 4.1.4 Return Loss ................................................................................................................... 27 4.1.5 Linearity ........................................................................................................................ 27 4.2 LNA Design Consideration ................................................................................................... 27 4.2.1 Impedance matching .................................................................................................... 27 4.2.2 DC Bias .......................................................................................................................... 28 Chapter 5 DESIGN AND ANALYSIS OF LNA .................................................................................... 30 5.1 Low-noise Amplifier Design Specifications .......................................................................... 30 5.2 Design Procedure of Low-noise Amplifier ........................................................................... 31 5.2.1 Choosing transistor....................................................................................................... 31 v

5.2.2 Simulation of SP mode Transistor ................................................................................ 31 5.2.3 DC bias circuit ............................................................................................................... 38 5.2.4 Linearity ........................................................................................................................ 42 5.3 Result Analysis of Low-noise Amplifier Design .................................................................... 43 Chapter 6 COMPLETE AIA DESIGN ANALYSIS ................................................................................ 44 Chapter 7 CONCLUSION ................................................................................................................ 47 BIBLIOGRAPHY ............................................................................................................................... 48

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LIST OF FIGURES
Figure 2.1: inset fed microstrip patch antenna ................................................................. 8 Figure 2.2: equivalent circuit of inset fed microstrip patch antenna ................................ 9 Figure 3.1: parameters setting of substrate layers ........................................................... 13 Figure 3.2: parameters setting of layout layers ................................................................ 14 Figure 3.3: layout design of microstrip patch antenna ..................................................... 15 Figure 3.4: S11 of microstrip patch antenna .................................................................... 16 Figure 3.5: gain, directivity and efficiency of microstrip patch antenna .......................... 17 Figure 3.6: 3D far field radiation pattern of E ................................................................... 18 Figure 3.7: schematic circuits for antenna impedance matching..................................... 19 Figure 3.8: LineCalc for microstrip line calculation ........................................................... 19 Figure 3.9: S11 of matched microstrip patch antenna ..................................................... 20 Figure 3.10: VSWR in 2.45GHz .......................................................................................... 21 Figure 3.11: impedance of matched antenna................................................................... 22 Figure 4.1: block diagram of an active integrated antenna amplifier receiver front end ........................................................................................................................................... 25 Figure 4.2: current mirror examples [13] ......................................................................... 29 Figure 5.1: schematic circuit of sp-mode scan ................................................................. 32 Figure 5.2: S-parameters of sp-mode ............................................................................... 33 5.3: a single stub matching component is added to the schematic circuit ...................... 34 Figure 5.4: input matching circuit settings ....................................................................... 35 Figure 5.5: input matching network created by smart component ................................. 36 Figure 5.6: S-parameters when input matching network is added .................................. 36 Figure 5.7: schematic circuit when output matching network is added .......................... 37 Figure 5.8: S-parameters when output matching network is added................................ 38
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Figure 5.9: bias circuit design schematic .......................................................................... 39 Figure 5.10: noise circles of LNA ....................................................................................... 40 Figure 5.11: S-parameters of LNA design ......................................................................... 41 Figure 5.12: other parameters of LNA design................................................................... 41 Figure 5.13: Linearity parameters of LNA ......................................................................... 42 Figure 6.1: schematic circuit of the complete AIA design ................................................ 45 Figure 6.2: Layout design of the AIA ................................................................................. 46 Figure 6.3: simulation result of the complete AIA design ................................................ 46

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Chapter 1 INTRODUCTION
1.1 Introduction
The high demands for wireless communications systems in compatibility and efficiency have been greatly leading to rapid development and growth in the microwave and monolithic microwave integrated circuit technologies. The active integrated antenna (AIA), as an advanced solution to various existing problems in wireless communications, such as noise matching, power saving and size reduction, has been a growing area of research in recent years. From a microwave engineers point of view, an AIA can be regarded as an active microwave circuit, in which the output or input port is free space instead of a conventional 50 transmission line. In this case, the antenna can provide certain circuit functions such as resonating, filtering, and duplexing, in addition to its original role as a radiating element. On the other hand, from an antenna designers point of view, the AIA is an antenna that possesses built-in signal and wave processing capabilities such as signal mixing and amplification. [1] Microstrip patch antennas are extensively used in commercial and military communication systems. Advantages of using microstrip patch antennas over conventional antennas are their light weight, low profile and volume, and low cost of fabrication [4]. However, in comparison to other types of microwave antennas, their

disadvantages include narrow bandwidth, relatively high loss, low gain, only radiate in half space, and narrow design tolerance. The low noise amplifier is an important building block in wireless receivers. It essentially determines the receivers performance. The LNA design is full of tradeoffs between optimum gain, optimum input matching, low power consumption, lowest noise figure and high linearity [5]. Nowadays, wireless communications devices require smaller size, less power consumption, further reach and wider range receiver front end. Thus, as a vital part that determines the performance of the receiver front end, the design of LNA is becoming more and more important. Normally, there are matching networks between the antenna and the Low-noise Amplifier in a receiver front end, which are used in microwave circuits to transform the impedance for eliminating reflection and improving circuit performance such as the gain or noise figure. The matching network could adjust the output impedance of antenna to the conjugate of the input impedance of transistor in order to obtain the highest gain; it could also optimize the LNA to produce the minimum noise figure. As for the active integrated antenna, instead of the conjugate matching, a transistor is tested to seek for a better noise figure and higher gain, and then the antenna is designed to have such output impedance. By this approach, the matching network between antenna and LNA is omitted.

1.2 Objective of the research

In this research work, the authors major aim is to design an amplifying AIA (active integrated antenna) working at 2.45 GHz for wireless communications systems. The proposed AIA include two major components: the microstrip patch antenna and the low-noise amplifier.

Firstly, a microstrip patch antenna is analyzed and designed in order for it to take the basic responsibilities of receiving electromagnetic waves, and transmitting them into electrical signals. It requires small size, reduced loss, and wide band. Secondly, the LNA (Low-noise Amplifier) is supposed, designed, and tuned to enhance the signal, reduce power consumption as well as minimize the noise.

1.3 Outline of the thesis

A brief introduction to antenna theory, including microstrip patch antenna fundamentals, is presented in chapter 2. Chapter 3 shows the design details of a single layer microstrip patch antenna. The antenna is designed to resonate at 2.45GHz, using inset feeding method. Next, Chapter 4 gives a brief introduction to LNA (low-noise amplifier), especially about the basic tradeoffs between different amplifying topologies, such as gain, NF (noise figure), linearity and impedance matching. Chapter 5 presents the design process of a LNA (low-noise amplifier). The design applied a NEC product, NE68030 NPN silicon high frequency transistor by using current mirror circuit as bias current source, as well as input and output matching networks to meet the specification. Chapter 6 performs the analysis of the complete design of the amplifying AIA (active integrated antenna), which is the combination of the microstrip patch antenna and the LNA (Low-noise Amplifier). Chapter 7 draws a conclusion on the research work and discuss future possible development of this area.

Chapter 2 ANTENNA DESIGN

2.1 Antenna theory introduction
Antenna is defined as a means for radiating or receiving radio waves. In other words, the antenna is a transitional structure, which turns the electrical signals into electromagnetic waves [3]. The transmission line is used to transport electromagnetic energy from the transmitting source to the antenna or from the antenna to the receiver.

Maxwells equations are the core of electromagnetism, also are widely used in antenna theory. Table 2.1 Maxwells equations
Differential Form Integral Form Name Faradays law Amperes law Gausss law for electric charge
Gausss law for magnetic charge

The integral form of Amperes law shows that, in electromagnetic field, the line integral of the magnetic field intensity over the closed boundary equals to the electrical current density through the closed circle. The differential form of Amperes law states that, for any single point in electromagnetic fields, the curl of the magnetic field intensity equals to the current density through the surface. Maxwell-Faraday equation presents the relation between the electric field intensity and the magnetic flux density. The curl of electric field intensity equals to the partial derivative of magnetic flux density with respect to time. Gausss law for electric charge explains that in electromagnetic fields, the surface integral denoting the electric flux through a closed surface equals to the total charge enclosed by the closed surface. While the Gausss law for magnetism says that the magnetic field has divergence equal to zero. Using Maxwells equations to analyze the radiation properties of an antenna, radiation pattern is commonly applied to examine the directional dependence of the strength of the radio waves from the antenna or other source. Typically, it is represented by a three dimensional graph, or polar plots of the horizontal and vertical cross sections.

2.2 Fundamentals of microstrip patch antennas

In high-performance aircraft, spacecraft, satellite and missile applications, where size, weight, cost, performance, ease of installation, and aerodynamic profile are highly constrained by their applications, low profile antennas are frequently required. Also, many government and commercial applications in mobile radio and wireless communications, are requesting similar specifications for the communication devices. Compared to other kinds of microwave antennas, microstrip antennas have many advantages such as light weight, small size, low profile, low cost, easy fabrication and installation, conformable and planar and nonplanar surfaces, little interference to other

parts. Thus they are widely used today in many areas, at the frequency from 100MHz to 50 GHz. However, microstrip antennas also have some disadvantages, like relatively high loss, low gain, low power, low efficiency, high Q, limited polarization purity, poor scan performance, spurious feed radiation and very narrow frequency bandwidth. There are three different types of microstrip patch antennas: microstrip patch antennas, microstrip travelling wave antennas and microstrip slot antennas. A microstrip patch antenna consists of a flat rectangular patch of metal, which in practice is usually mounted over a larger sheet of metal called ground plane. A very thin metallic strip (patch) is placed a small fraction of a wavelength above a ground plane. The microstrip patch is designed so its pattern maximum is normal to the patch. The strip (patch) and the ground plane are separated by a dielectric sheet (referred to as the substrate). Normally, the dielectric constants of the substrates are chosen in the range of 2.2 to 12. As designing the microstrip patch antennas, thick substrates and low dielectric constant provide better efficiency, larger bandwidth, loosely bound fields for radiation into space, but at the expense of larger element size. On the other hand, thin substrates with higher dielectric constants are desirable for microwave circuitry because they lead to minimum undesired radiation and coupling, and smaller element sizes. Since microstrip antennas are often integrated with other microwave circuitry, a compromise has to be reached between good antenna performance and circuit design [3]. There are many ways to feed microstrip patch antennas. The most popular ones are the microstrip line, coaxial probe, aperture coupling and proximity coupling. The microstrip feed line is also a conducting strip, usually of much smaller width compared to the patch. Under microstrip line feeding, there are several feeding methods, including probe feeding via hole, edge feeding and inset feeding. The inset feeding technique is a direct-coupled feeding method where the input power is fed to the radiating element directly by a microstrip line type feed line embedded into
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it. In this feed geometry, the feed line directly contacts the patch along the radiating edge [6]. For the maximum transfer of input power to the antenna, the feed line and patch input impedances must be matched. Due to the high edge impedance of the microstrip antenna, the feed line is inset into the patch by a certain distance to match the antenna input impedance to the line impedance. Actually, the insetting of the feed line produces lower input impedance than that of the edge of the antenna. The feed line currents are co-polarized with the current of the resonating patch, which minimizes the cross polarized radiation [7]. For low frequencies the effective dielectric constant is essentially constant, when the frequency goes higher, the dielectric constant begins to monotonically increase and eventually approach the value of the dielectric constant of the substrate. So the initial values (at low frequencies) of the effective dielectric constant are referred to as the static values, and they are given as follows [3]: (2-1) Since the electrical length of the microstrip antenna is larger than its physical dimension due to the fringing effects, the extended length of the antenna is usually expressed as follows [3]: (2-2) Thus the length of the patch equals to [3] (2-3) As shown in equation 2.4, the resonant frequency of the microstrip antenna is a function of its length. Since this equation does not account for fringing, it must be modified to include edge effects. (2-4)
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Based on the simplified formulation that has been described, we are now able to design a simple rectangular microstrip patch antenna. We can use the specified information such as the dielectric constant of the substrate, the resonant frequency, and the height of the substrate to determine the width and length of the microstrip patch antenna. Figure 2.1 shows the inset feeding microstrip patch antenna. The input impedance of the inset feeding microstrip patch antenna mainly depends on the inset distance and

to some extent on the inset width (spacing between feeding line and patch conductor). Variation in the inset length does not produce any change in resonant frequency but a variation in inset width changes the resonant frequency. Hence the spacing between the patch conductor and feed line is kept constant, equal to the feed lines width and variation in the input impedance at resonant frequency with respect to inset length is studied for various parameters.

Figure 2.1: inset fed microstrip patch antenna

Assume that the patch is divided into four regions; it can be modeled as transmission lines loaded by radiating slots of different length as shown in Figure 2.2. Parameters of each transmission line and the slot are given in Table 2.2. The radiating slots A, B and C can be modeled as discussed in [8].

Table 2.2 Parameters of elements in the model Element TL1 SLOT A TL2 SLOT B TL3 SLOT C h h Width W h W Length

Figure 2.2: equivalent circuit of inset fed microstrip patch antenna

Chapter 3 DESIGN AND ANALYSIS OF MICROSTRIP PATCH ANTENNA

3.1 Microstrip Patch Antenna Specifications
Reference [2] has proposed some performance characteristics of microstrip patch antenna in 2.45GHz. By referring its suggestions, the specification and target of the proposed antenna design are summarized in Table 3.1.

Table 3.1 Required Specifications for microstrip patch antenna Parameter Frequency Range VSWR Gain Bandwidth Efficiency Impedance Specification 2.44-2.46 <2 >5 >30 >75 50 Unit GHz N/A dB MHz % Ohm

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The center frequency of the antenna is 2.45GHz, which is one of the most commonly used frequencies in wireless communication. This frequency band is reserved internationally for the use of radio frequency energy for industrial, scientific and medical purposes other than communications. The selected antenna parameters are discussed as follows: VSWR In telecommunications, SWR (standing wave ratio) is the ratio of the amplitude of a partial standing wave at a maximum value to the amplitude at an adjacent minimum value, in an electrical transmission line. VSWR (Voltage Standing Wave Ratio) is the parameter to measure the energy consumed in conductor during electrical signal transmission. It can be expressed by:

For antennas, the lower the VSWR, the higher the power transmission efficiency. The ratio smaller than 2:1 assure an acceptable efficiency. Antenna Gain Directivity is the ability of an antenna to focus energy in a particular direction when transmitting, or to receive energy from a particular direction when receiving. If a wireless link uses fixed locations for both ends, it is possible to use antenna directivity to concentrate the radiation beam in the wanted direction. The gain of an antenna is a measure that takes into account the efficiency of the antenna as well as its directional capabilities. In fact, it is the product of its total efficiency and its directivity in a certain direction. It is normally regarded as the ratio of the power gain of the antenna in a given direction to the gain of a lossless isotropic source as a reference antenna in the same direction. In the specifications, the gain of the antenna is measured in the direction normal to the plain of the patch.
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Bandwidth Bandwidth is the difference between the upper and lower frequencies in a continuous set of frequencies. It is a central concept in signal processing as well as antenna system. One of the disadvantages of microstrip patch antenna is its low bandwidth, thus the design goal of the bandwidth is not supposed to be too wide. In some cases, a narrow bandwidth has its own merit in high interference environment. As a good microstrip patch antenna, the bandwidth of the antenna should be wider than 1%. Efficiency There are two major reasons for the energy loss of the antenna: one is the reflections because of the mismatch between the transmission line and the antenna, the other is the conduction and dielectric loss due to Ohms law. Considering these two losses, the total antenna efficiency can be measured using the voltage reflection coefficient. The reasonable efficiency of a microstrip patch antenna is at least 70%. Impedance The impedance of the antenna is usually designed to be 50Ohms, for its low VSWR and high energy transmission efficiency. Nevertheless, in order to improve the noise figure while maintaining a good gain, conjugate matching is no longer used. Instead, transistor is tested to see which impedance gives a better noise figure and a high enough gain. Then the antenna is designed to have such output impedance, and it is connected directly to the transistor. Compared to the normal method, the matching network used to adjust the antenna impedance to 50 ohms is omitted.

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3.2 Design Procedure Microstrip Patch Antenna

As shown in Figure 3.1 and 3.2, the microstrip patch antenna presented in this paper consists of three layers: a 50 mil thick FR4 ( ) substrate, a 15 mil thick

conductor, conductivity is 5.88+e07, and a ground plane, which is set to be a perfect electric conductor (PEC). The RF design of the microstrip patch antenna was done using the Agilents Advanced Design System (ADS) software.

Figure 3.1: parameters setting of substrate layers in the ADS environment

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Figure 3.2: parameters setting of layout layers in the ADS environment

Applying the equations in chapter 2, we can calculate the size of the patch, and then attach the two inset feeding parts at both sides of the antenna. Finally, as shown in Figure 3.3, draw a quarter-wavelength long microstrip line to complete the whole feeding part.

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Figure 3.3: layout design of microstrip patch antenna

In practice, the most commonly quoted parameter in regards to antennas is S11. S11 represents how much power is reflected from the antenna. After setting up the size of the antenna, the S parameters become our main concern. As shown in Figure 3.4, the center frequency of the patch antenna is at 2.451GHz, S11 is 18.85dB, which is a pretty good result. However, as can be easily seen in the figure, the bandwidth of the antenna is extremely narrow. Narrow bandwidth is one of the well-known disadvantages of microstrip patch antenna; it could be fixed by adding a matching circuit at the output port of the antenna, which will be mentioned in the next part of this chapter.

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Figure 3.4: S11 of microstrip patch antenna

After some little adjustment is completed, the radiation pattern can be plotted to be analyzed, as shown in Figure 3.5. The gain at 0 degree is 5.189dB, and the efficiency is 80.931%, both are higher than the specifications.

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Figure 3.5: gain, directivity and efficiency of microstrip patch antenna

The approximate value of the bandwidth can be calculated using this equation: In this equation, the unit of is GHz and the unit of is

millimeter. Thus the bandwidth of the antenna is approximately 38.42MHz. The three-dimensional E-plane radiation pattern is shown in Figure 3.6. For a linearly-polarized antenna, E-plane is the plane containing the electric field vector and the direction of maximum radiation. The electric field determines the polarization or orientation of the radio wave.

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Figure 3.6: 3D far field radiation pattern of E

In order to improve the NF while maintaining a good gain, conjugate matching is no longer used at the input port of the transistor. Instead, transistor is tested to see which impedance gives a better NF and a high enough gain. Then the antenna is designed to have such output impedance. And it is connected directly to the transistor. In this case, the microstrip patch antenna combines the function of a regular antenna and a matching network. Normally the value of the resonant input resistance of the antenna is in the range of 100 to 300 ohms. However, the resonant input resistance can be changed by using inset feeding method. Since there is no formula to calculate the exact output impedance from the antenna parameters, we have to attach additional microstrip lines to and use the schematic analysis to adjust the match of the antenna. Figure 3.7 shows the schematic circuit for the impedance matching, nominal optimization function is applied to determine the length of the microstrip lines.
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Figure 3.7: schematic circuits for antenna impedance matching

As shown in Figure 3.8, the LineCalc tool is used to determine the width of the microstrip lines, to make sure that the characteristic impedance is 50 ohms.

Figure 3.8: LineCalc for microstrip line calculation

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And the lengths of TL1 and TL2 in Figure 3.7 are set to be the goal of optimization, and the parameters of MSub are the same as the antenna. As shown in Figures 3.9, 3.10 and 3.11, the simulation results have been dramatically improved in S11, VSWR and impedance parameters, as well as the bandwidth, thus the Layout design of the microstrip patch antenna was adjusted using the simulation result of the optimization.

Figure 3.9: S11 of matched microstrip patch antenna

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Figure 3.10: VSWR in 2.45GHz

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Figure 3.11: impedance of matched antenna

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3.3 Result Analysis of Microstrip Patch Antenna

This chapter gives a design procedure of a microstrip patch antenna; the design can be applied in wireless telecommunications systems. ADS simulations were performed to predict each parameter to check for compliance against the design specification. The predictions of the various parameters have been summarized in Table 3.2. The result indicates that most of the specifications are properly satisfied; especially the bandwidth and the efficiency are over expectation. However, the impedance of the antenna is a little higher than 50ohms, which means the signal transmission efficiency and the power consumption rate may be affected. Thus, when designing the low noise amplifier, some adjustment has to be made in the impedance part to avoid too much discontinuity during signal transmission.

Table 3.2 Summary of simulated microstrip patch antenna performance Parameter Specification The Design Performance Frequency range VSWR Gain Bandwidth Efficiency impedance 2.44-2.46 <2 >5 >30 >75 50 2.44-2.46 2 5.189 38.42 80.931 58 GHz N/A dB MHz % Ohm Unit

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Chapter 4 LNA DESIGN

4.1 LNA Introduction
LNA is an electronic amplifier used to amplify very weak signals. It is usually located very close to the detection device to reduce losses in the feedline. This active antenna arrangement is frequently used in microwave systems like GPS, satellite, and radar. The growing wireless communication market has generated increasing interest in RF technologies. New technologies are developed to increase higher data rates and capacity, and to reduce the power dissipation for longer operation time. Low-voltage and low-power RF circuit design becomes a necessary requirement [5]. A block diagram of a typical AIA receiver front-end is shown in Figure 4.1. The main function of the LNA is to provide high enough signal gain to overcome the noise of the subsequent stages while adding the minimum possible noise. Moreover, it should accommodate large signals without distortion and with specified specific input impedance. A good input impedance matching is more critical if a pre-select filter precedes the LNA since the transfer characteristics of many filters are sensitive to the quality of the termination. The additional requirement is the low power consumption, which is especially important in portable communications systems [11]. The main characteristic parameters of LNA are shown as follow:

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Figure 4.1: block diagram of an active integrated antenna amplifier receiver front end

4.1.1 Noise Figure and Noise Temperature The noise Figure of an amplifier can be defined as:

where, NF is the Noise Figure of the RF device; are the powers of signal and noise of the input port; are the powers of signal and noise of the output port. Usually, Noise Figure is expressed in dB, which means

Noise temperature is a temperature assigned to a component such that the noise power delivered by the noisy component to a noiseless matched resistor, which is given by in watts. Here and is the noise bandwidth. is the Boltzmann constant, is the noise temperature,

The noise emitted by the amplifier is expressed by its Noise Temperature . The relationship between and NF is:

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where 290K.

is the standard Noise Temperature, and conventionally takes the value as

If several devices are cascaded, the total Noise Figure can be found with Friis Formula:

Where

is the noise figure for the n-th device and

is the power gain of the n-th

device. In a well designed receive chain, only the noise figure of the first amplifier should be significant, thats why the LNA is important in minimizing the noise of the receiver end of the system. 4.1.2 Gain There are many different definitions of gain for an amplifier. Normally, for an LNA, Power Gain refers to the gain measured when the source and load are 50 Ohms. It is defined as follows:

Where

and

are the input and output powers respectively.

4.1.3 Standing Wave Ratio In telecommunications, standing wave ratio (SWR) is the ratio of the amplitude of a partial standing wave at a maximum to the amplitude at an adjacent minimum, in an electrical transmission line. The SWR is usually defined as a voltage ratio called the VSWR, for voltage standing wave ratio. The input matching network is normally designed to approach the minimum noise, thus it is not the best power matching network, however, the output matching network is usually designed to get the largest gain and lowest VSWR. That is to say, there exist mismatch in the input port of the LNA.
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4.1.4 Return Loss In telecommunications, return loss or reflection loss is the loss of signal power from the reflection caused at a discontinuity in a transmission line or optical fiber. This discontinuity can be a mismatch with the terminating load or with a device inserted in the line. It is also expressed as a ratio in dB. For a single stage LNA, its noise figure is expressed as:

Where

is the minimum noise figure of the transistor,

and

is the

optimized return loss when

is achieved, the noise impedance of the transistor, and

the input return loss of the transistor, respectively. 4.1.5 Linearity 1 dB compression point and third-order intercept point are two important measures for weakly nonlinear systems and devices. In the design of LNA, the IP3 of the input LNA is normally chose to be a little higher, at least 20 dB higher than the input signal, to avoid much nonlinearity.

4.2 LNA Design Consideration

4.2.1 Impedance matching Unlike the conventional design, where an antenna and amplifier are separated by a standard 50 Ohms transmission line and interconnects, in the AIA approach, an antenna is directly attached to the input of amplifier circuit. One of the main challenges in realizing AIA design is the effective impedance match of antenna element and amplifier as their impedance mismatch significantly deteriorates the performance of integrated
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devices. Because of the importance of both gain impedance matching, which provides the maximum gain of AIA device, and noise figure minimum impedance matching, which minimizes the NF value, an amplifier must be designed according to the impedance characteristics of antenna element [12]. The condition of perfect gain impedance matching as applied to AIA device is expressed by where is the normalized input impedance

of an antenna while amplifiers normalized input impedance is given by with being the reflection coefficient of an amplifier at its input

port. These equations simply imply that the input impedance of the LNA is supposed to be the complex conjugate of the impedance of the antenna. 4.2.2 DC Bias The bias network determines the amplifier performance over temperature as well as RF drive. The DC bias condition of the RF transistor is usually established independently of the RF design. Power efficiency, stability, noise, thermal runway, and ease to use are the main concerns when selecting a bias configuration [13]. The use of Class-A and Class-AB amplifiers for linear power amplification relies on the use of a standing bias current, applied to the base (in case of BJT) in order to bias the RF device into partial or full conduction. This bias current must remain constant, despite the varying envelope of the input signal to the amplifier, which will cause significant variations in the collector current required by the devise. The most common form of biasing in RF circuits is the current mirror. This basic stage is used everywhere and it acts like a current source. It takes a current as an input and this current is usually generated, along with all other references, by a circuit called a bandgap reference generator.

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Figure 4.2: current mirror examples [13]

In the current mirror shown in Figure 4.2, the bandgap reference generator produces current and forces this current through Q1. Scaling the second transistor allows the

current to be multiplied up and used to bias working transistors. One major drawback to this circuit is that it can inject a lot of noise at the output due primarily to the gain of the transistor Q1 which acts like an amplifier for noise. A capacitor can be used to clean up the noise, and resistors degeneration can be put into the circuit to reduce the gain of the transistor. With any of mirror topologies, a voltage at the collector of N*Q1 must be maintained above a minimum level or else the transistor will go into saturation. Saturation will lead to bad matching and nonlinearity.

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Chapter 5 DESIGN AND ANALYSIS OF LNA

5.1 Low-noise Amplifier Design Specifications
The aim of the research is to design a Low-noise amplifier, which will be connected to the microstrip patch antenna. Based on the information from Reference [10], the specifications of the design are shown in Table 5.1. In this LNA design, the transistor used is an NEC68030 NPN silicon transistor, with typical noise figure 1.76, gain 10.70, when Vce=6V, Ic=5mA. The amplifier is biased for class A operation, using current mirror method. The input and output of the transistor are conjugated matched to the source and load impedance, using microstrip stubs matching networks. Compared to the specifications in Reference [10], some of the requirements, for instance, noise figure and gain have been tune down a little. Because the design in this thesis is only a one stage LNA, but the design in the reference is a two stage LNA with a cascode stage, which is capable of higher gain while maintaining the same level of noise figure.

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Table 5.1 The Proposed Design specifications for LNA Parameter Frequency Noise Figure Gain Return Loss Power Consumption Source/Load Impedance Specification 2.4 to 2.5 <2.7 >9 <20 <50 50 Unit GHz dB dB dB mW Ohms

5.2 Design Procedure of Low-noise Amplifier

5.2.1 Choosing transistor NECs NE680 series of NPN epitaxial silicon transistors is designed for low noise, high gain and low cost applications. Both the chip and micro-x versions are suitable for applications up to 6 GHz. The NE680s high makes it ideal for low voltage/low current

applications, down to as low as 0.5V/0.5mA. IC max for the NE680 series is 35mA. The detail descriptions are shown in reference [15]. Among the NE680 series, the author picked NE68030 as the transistor of the LNA, because of its good performance in terms of noise figure, gain, and S-parameters.

5.2.2 Simulation of SP mode Transistor After picking up proper transistor, the S-Parameters of the NE68030 need to be examined. Thus, an S-Parameter simulation project in ADS schematic window is established, which is shown in Figure 5.1.

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Figure 5.1: schematic circuit of sp-mode scan

In this figure, the NE68030 transistor is sp mode, in which the bias voltage and current are already set to certain values, which means we can isolate the influence of the DC bias circuit and focus on the AC performance of the transistor with . The simulation frequency scans from 2.0GHz to 2.8GHz. The reflection coefficient is used in electrical engineering when wave propagation in a medium containing discontinuities is considered. A reflection coefficient describes either the amplitude or the intensity of a reflected wave relative to an incident wave. As shown in Figure 5.2, the input reflection coefficient is close to 50 ohm, while the output reflection coefficient is not satisfied. In this case, we need to put matching network in the schematic circuit.

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Figure 5.2: S-parameters of sp-mode

As shown in Figure 5.3, a single-stub matching smart component is set as the input matching network. The parameters of the substrate are set to be the same as the microstrip patch antenna in Chapter 3.

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5.3: a single stub matching component is added applied at the input port

The setting of the input matching circuit is shown in Figure 5.4. The center frequency is 2.45GHz, Zin is 50ohms, and Zload is the same as the input impedance of the transistor which is examined in the previous simulation.

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Figure 5.4: Input matching circuit settings

When the settings are done, the matching network is created automatically, as shown in Figure 5.5. The simulation result in Figure 5.6 shows that the input reflection coefficient is even better, the gain and the noise figure and the stability factor are also improved, but the output reflection coefficient is still not good. Thus an output matching network is also needed.

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Figure 5.5: Input matching network created by smart component

Figure 5.6: S-parameters when input matching network is added

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Figure 5.7 shows the simulation circuit when the output matching network is added, which is also a single-stub matching. The width of the microstrip lines are the same as the lines in the input matching circuit. Nominal optimization tool and goals are set to optimize the length of the output matching circuit. The goals of the optimization are SParameters, stability factor, and noise figure. After several times of random optimization, the result is shown in Figure 5.8, in which the output matching is dramatically improved, the noise figure and stability factor are also improved.

Figure 5.7: schematic circuit when output matching network is added

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Figure 5.8: S-parameters when output matching network is added

5.2.3 DC bias circuit The bias circuit works by adjusting the gate voltage to maintain a particular value of drain current. Figure 5.9 shows the ADS schematic simulation of the LNA design with bias circuit. The sp mode transistor is replaced by a normal pack; an active current mirror and a current source is setup for biasing the transistor. The bias resistor R1 is used to isolate the current mirror from the RF input, and the capacitor C4 in the bias circuit is used to clean up the noise, which is discussed in chapter 4.

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Figure 5.9: bias circuit design schematic

Since the noise figure is not satisfied, and the performance of the S-parameters has some space to be adjusted to fit the noise matching, a noise circle is applied to find a better noise matching method. Unlike the conventional design, where an antenna and amplifier are separated by a standard 50ohm transmission line and interconnects, in the AIA approach, an antenna is directly attached to the input of amplifier circuit. One of the main challenges in realizing AIA design is the effective impedance matching of antenna element and amplifier as their impedance mismatch significantly deteriorated the performance of integrated devices. Because of the importance of both gain impedance matching, which provides the maximum gain of AIA device, and noise figure minimum impedance matching, which minimizes the NF value, an amplifier must be designed according to the impedance characteristics of antenna element.
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Figure 5.10 shows the noise contour in smith chart, which indicates that the ideal noise figure is around 2dB, which can be achieved by adjusting the impedance of the matching network. However, if the noise figure is set to 2 dB, the impedance of the LNA would be too high, which will severely affect the efficiency and S-parameters. So choosing an impedance of the LNA bigger than 50 ohms and setting the noise figure to 2.5dB would be a more reasonable idea.

Figure 5.10: noise circles of LNA

After several times of random optimization, the parameters of the matching network and DC bias are determined. The simulation results are a compromise between noise figure, gain, stability, and S-Parameters, which is shown in Figure 5.11 and 5.12.

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Figure 5.11: S-parameters of biased LNA design

Figure 5.12: other parameters of biased LNA design

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5.2.4 Linearity The 1dB compression point is calculated to examine the linearity of the LNA. If an amplifier is driven hard enough the output power will begin to roll of resulting in a drop of gain known as gain compression. The measurement of gain compression is given by the 1dB gain compression point. This parameter in another measure of the linearity of a device and is defined as the input power that causes a 1 dB drop in the linear gain due to device saturation [10]. The compression measurement is shown in Figure 5.13. As the figure shows, the 1dB compression point is about 1dbm, which is a satisfying result, indicates that the linearity of this LNA design is acceptable.

Figure 5.13: Linearity parameters of LNA

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5.3 Result Analysis of Low-noise Amplifier Design

This chapter gives a design procedure of a Low-noise Amplifier; which can be connected with a microstrip patch antenna. ADS simulations have been given to predict the various circuit parameters of gain, noise figure, power consumption and 1dB compression point, all summarized in Table 5.2. The simulation results are close to the specifications. The optimization tool and the noise contour show that 2.5dB noise figure and 10 dB gain cannot be achieved simultaneously, thus a compromise has to be made between these two parameters. Otherwise, a cascode stage amplifier can be added to amplify the signal to get an even better gain.

Table 5.2 Summary of simulated LNA performance Parameter Frequency Noise Figure Gain Power consumption Source/load impedance 1dB compression point Not specified 8.829 dBm Specification 2.4-2.5 <2.7 >9 <50 50 Prediction 2.4-2.5 2.6 9.6 50 50 Unit GHz dB dB mW Ohms

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Chapter 6 COMPLETE AIA DESIGN ANALYSIS

In this chapter, the designs of microstrip patch antenna and low-noise amplifier are combined together, tested and simulated using Agilent ADS. Figure 6.1 shows the schematic circuit of the complete AIA circuit, and Figure 6.2 display the layout design of the proposed AIA. Based on the simulation result shown in Figure 6.3, the bandwidth is extended to more than 5%, S11 is improved to -36dB, VSWR is less than 1.5dB, and the input impedance is close to 50Ohms. The overall size of the antenna including the amplifier circuit is less than 50 , which is much smaller compared to 120 , the

size of a normal circular microstrip antenna. Thus the size of the new antenna is less than 50% of the circular microstrip antenna [16]. Matching of the microstrip patch antenna and the low-noise amplifier does not go quite well at first. It is probably because the input impedance of the antenna is higher than 50 ohms, which affects the performance of the integration. After another optimization of the first two stub matching circuits, both the VSWR and voltage reflection coefficient are dramatically improved. The VSWR at 2.45 GHz drops to 1.16, and S11 at 2.451 GHz is also decreased to -25 dB. Since the length of the first stub is decreased, the total size of the AIA in layout design becomes smaller at the same time. Some of the parameters are not applied in the simulation model, thus there are differences between simulation result and the actual performance of the AIA. For example, the inductors should have resistance and Q value, and some parasitic
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capacitance and capacitors have also inductance and resistance, and so on. The values of those parameters are sometimes told in the datasheets, but not always. When doing some important and specific simulations, it is necessary to measure the parasitic elements of the used components. The simulated noise figure is not good enough, considering that the actual noise figure will increase when Q value of the inductors is applied. Because of the resistor added in the bias current circuit to isolate the RF signal, the power consumption is a little higher than what I expected. To improve this design, a cascode stage can be added to the LNA. The cascode is a combination of a common-source amplifier with a common-gate load, which has the effect of increasing the output impedance, and would also raise the gain as well as lower the noise figure.

Figure 6.1: schematic circuit of the complete AIA design

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Figure 6.2: Layout design of the AIA

Figure 6.3: simulation result of the complete AIA design

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Chapter 7 CONCLUSION
In this thesis, a design and simulation result of an active integrated antenna is presented. Compared to the conventional amplifying antenna, the new active integrated antenna leads to significant advantages such as compactness of the configuration, high power transmitting efficiency, and low noise. The antenna and the LNA performance match the specifications properly. However, a better performance can be achieved if a cascode stage is connected to the LNA. Compared to a single amplifier stage, the cascode stage may have these characteristics: higher input-output isolation, higher input impedance, high output impedance, higher gain or higher bandwidth. It can be seen that the active integrated antenna will be versatile applications in the growing area of wireless communications. The key requirements for components and system to be used in wireless communications are compactness, light weight, low cost, low DC power consumption, high DC and RF conversion efficiency, and high reliability. The concept of active integrated antenna satisfies the first three requirements and, with the improving performance of solid state devices, the last three requirements can also be satisfied [1]. Thus it is possible that the development of active integrated antennas will bring the wireless communication technology into a new era.

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Line Fed patch Antennas, IEEE Trans. Antennas Propagat, Vol.49, pp.45-47, Jan. 2001. [9] M. Ramesh and YIP KB, Design Formula for Inset Fed Microstrip Patch Antenna, Journal of Microwaves and Optoelectronics, Vol.3, December 2003 [10] J P Silver, Mos Common-source LNA Design Tutorial, http://www.odyseus.nildram.co.uk/ [11] D.K. Shaeffer, T.H. Lee, A 1.5 V, 1.5G Hz CMOS low noise amplifier, IEEE Journal of Solid-State Circuits, 35 (2) (1999) 745759. [12] Andrey S. Andrenko, Yukio Ikeda, Masatoshi Nakayama, Osami Ishida, Impedance Matching in Active Integrated Antenna Receiver Front End Design, IEEE Microwave and Guided Wave Letters, Vol. 10, NO. 1, JAN 2000. [13] [14] Iulian Rosu, Bias Circuits for RF Devices, http://www.qsl.net/va3iul/ Michael Steer, Microwave and RF Design a System Approach, Scitech Publishing, 2010. [15] [16] http://www.datasheetcatalog.com/datasheets_pdf/N/E/6/8/NE68030-T1.shtml Rohith K. Raj, Sona O. Kundukulam, C.K.Aanandan, K.Vasudevan, P.Mohanan, Praveen Kumar, Compact Amplifier Integrated Microstrip Antenna, Microwave and Optical Technology Letters, Vol.40, No.4, Feb 2004

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