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LM833 Low Noise, Audio Dual Operational Amplifier

The LM833 is a standard lowcost monolithic dual generalpurpose operational amplifier employing Bipolar technology with innovative highperformance concepts for audio systems applications. With high frequency PNP transistors, the LM833 offers low voltage noise (4.5 nV/ Hz ), 15 MHz gain bandwidth product, 7.0 V/s slew rate, 0.3 mV input offset voltage with 2.0 V/C temperature coefficient of input offset voltage. The LM833 output stage exhibits no deadband crossover distortion, large output voltage swing, excellent phase and gain margins, low open loop high frequency output impedance and symmetrical source/sink AC frequency response. For an improved performance dual/quad version, see the MC33079 family. Low Voltage Noise: 4.5 nV/ Hz High Gain Bandwidth Product: 15 MHz High Slew Rate: 7.0 V/s Low Input Offset Voltage: 0.3 mV Low T.C. of Input Offset Voltage: 2.0 V/C Low Distortion: 0.002% Excellent Frequency Stability Dual Supply Operation
http://onsemi.com MARKING DIAGRAMS
8 PDIP8 N SUFFIX CASE 626 1 1 8 8 1 SO8 D SUFFIX CASE 751 1 LM833 ALYW LM833N AWL YYWW

A WL, L YY, Y WW, W

= Assembly Location = Wafer Lot = Year = Work Week

MAXIMUM RATINGS
Rating Supply Voltage (VCC to VEE) Input Differential Voltage Range (Note 1) Input Voltage Range (Note 1) Output Short Circuit Duration (Note 2) Operating Ambient Temperature Range Operating Junction Temperature Storage Temperature Maximum Power Dissipation (Notes 2 and 3) Symbol VS VIDR VIR tSC TA TJ Tstg PD Value +36 30 15 Indefinite 40 to +85 +150 60 to +150 500 C C C mW Unit V V V Inputs 1
3 2 6

PIN CONNECTIONS
Output 1
1 8

VCC Output 2

Inputs 2
5

VEE

(Top View)

1. Either or both input voltages must not exceed the magnitude of VCC or VEE. 2. Power dissipation must be considered to ensure maximum junction temperature (TJ) is not exceeded (see power dissipation performance characteristic). 3. Maximum value at TA 85C.

ORDERING INFORMATION
Device LM833N LM833D LM833DR2 Package PDIP8 SO8 SO8 Shipping 50 Units/Rail 98 Units/Rail 2500 Tape & Reel

Semiconductor Components Industries, LLC, 2002

January, 2002 Rev. 2

Publication Order Number: LM833/D

LM833
ELECTRICAL CHARACTERISTICS (VCC = +15 V, VEE = 15 V, TA = 25C, unless otherwise noted.)
Characteristic Input Offset Voltage (RS = 10 , VO = 0 V) Average Temperature Coefficient of Input Offset Voltage RS = 10 , VO = 0 V, TA = Tlow to Thigh Input Offset Current (VCM = 0 V, VO = 0 V) Input Bias Current (VCM = 0 V, VO = 0 V) Common Mode Input Voltage Range Large Signal Voltage Gain (RL = 2.0 k, VO = 10 V Output Voltage Swing: RL = 2.0 k, VID = 1.0 V RL = 2.0 k, VID = 1.0 V RL = 10 k, VID = 1.0 V RL = 10 k, VID = 1.0 V Common Mode Rejection (Vin = 12 V) Power Supply Rejection (VS = 15 V to 5.0 V, 15 V to 5.0 V) Power Supply Current (VO = 0 V, Both Amplifiers) Symbol VIO VIO/T IIO IIB VICR AVOL VO+ VO VO+ VO CMR PSR ID Min 12 90 10 12 80 80 Typ 0.3 2.0 10 300 +14 14 110 13.7 14.1 13.9 14.7 100 115 4.0 Max 5.0 200 1000 +12 10 12 8.0 dB dB mA Unit mV V/C nA nA V dB V

AC ELECTRICAL CHARACTERISTICS (VCC = +15 V, VEE = 15 V, TA = 25C, unless otherwise noted.)


Characteristic Slew Rate (Vin = 10 V to +10 V, RL = 2.0 k, AV = +1.0) Gain Bandwidth Product (f = 100 kHz) Unity Gain Frequency (Open Loop) Unity Gain Phase Margin (Open Loop) Equivalent Input Noise Voltage (RS = 100 , f = 1.0 kHz) Equivalent Input Noise Current (f = 1.0 kHz) Power Bandwidth (VO = 27 Vpp, RL = 2.0 k, THD 1.0%) Distortion (RL = 2.0 k, f = 20 Hz to 20 kHz, VO = 3.0 Vrms, AV = +1.0) Channel Separation (f = 20 Hz to 20 kHz) PD , MAXIMUM POWER DISSIPATION (mW) 800 IIB , INPUT BIAS CURRENT (nA) 1000 800 600 400 200 0 -55 VCC = +15 V VEE = -15 V VCM = 0 V Symbol SR GBW fU m en in BWP THD CS Min 5.0 10 Typ 7.0 15 9.0 60 4.5 0.5 120 0.002 120 Max Unit V/s MHz MHz Deg nV Hz pA Hz kHz % dB

600

400

200

0 -50

0 50 100 TA, AMBIENT TEMPERATURE (C)

150

-25

0 25 50 75 TA, AMBIENT TEMPERATURE (C)

100

125

Figure 1. Maximum Power Dissipation versus Temperature

Figure 2. Input Bias Current versus Temperature

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LM833
800 I IB , INPUT BIAS CURRENT (nA) IS , SUPPLY CURRENT (mA) TA = 25C 10 8.0 6.0 4.0 2.0 0 +
VEE
IS

VCC

600

RL = TA = 25C
VO

400

200

5.0

10 15 VCC, |VEE|, SUPPLY VOLTAGE (V)

20

5.0

10 15 VCC, |VEE|, SUPPLY VOLTAGE (V)

20

Figure 3. Input Bias Current versus Supply Voltage

Figure 4. Supply Current versus Supply Voltage

110 AVOL, DC VOLTAGE GAIN (dB)

105

100

AVOL, DC VOLTAGE GAIN (dB)

VCC = +15 V VEE = -15 V RL = 2.0 k

110 RL = 2.0 k TA = 25C

100

95

90

90 -55

-25

0 25 50 75 TA, AMBIENT TEMPERATURE (C)

100

125

80 5.0

10 15 VCC, |VEE|, SUPPLY VOLTAGE (V)

20

Figure 5. DC Voltage Gain versus Temperature

Figure 6. DC Voltage Gain versus Supply Voltage

AVOL, OPEN LOOP VOLTAGE GAIN (dB)

100 80 60 40 20 0 VCC = +15 V VEE = -15 V RL = 2.0 k TA = 25C 1.0 10 100 Phase

GBW, GAIN BANDWIDTH PRODUCT (MHz)

120

0 , EXCESS PHASE (DEGREES)

20

45

15

90

10 VCC = +15 V VEE = -15 V f = 100 kHz

Gain

135

5.0

1.0 k 10 k 100 k f, FREQUENCY (Hz)

1.0 M

180 10 M

0 -55

-25

0 25 50 75 TA, AMBIENT TEMPERATURE (C)

100

125

Figure 7. Open Loop Voltage Gain and Phase versus Frequency

Figure 8. Gain Bandwidth Product versus Temperature

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LM833
GBW, GAIN BANDWIDTH PRODUCT (MHz) 30 f = 100 kHz TA = 25C 20 10 SR, SLEW RATE (V/ s)

8.0

Falling Rising VCC = +15 V VEE = -15 V RL = 2.0 k AV = +1.0 -25

6.0

10

4.0

Vin

VO RL

0 5.0

10 15 VCC, |VEE|, SUPPLY VOLTAGE (V)

20

2.0 -55

0 25 50 75 TA, AMBIENT TEMPERATURE (C)

100

125

Figure 9. Gain Bandwidth Product versus Supply Voltage

Figure 10. Slew Rate versus Temperature

10 8.0 6.0 4.0 2.0 0 5.0

SR, SLEW RATE (V/ s)

Falling Rising

VO, OUTPUT VOLTAGE (Vpp )

RL = 2.0k AV = +1.0 TA = 25C

35 30 25 20 15 10 5.0 0 10 VCC = +15 V VEE = -15 V RL = 2.0 k THD v 1.0% TA = 25C 100 1.0 k 10 k 1.0 M f, FREQUENCY (Hz) 10 M 100 k

Vin

+ -

VO RL

10 15 VCC, |VEE|, SUPPLY VOLTAGE (V)

20

Figure 11. Slew Rate versus Supply Voltage

Figure 12. Output Voltage versus Frequency

VO, OUTPUT VOLTAGE (Vpp )

15 10 5.0 0

RL = 10 k TA = 25C

VO +

V sat , OUTPUT SATURATION VOLTAGE |V|

20

15 +Vsat

14

-Vsat

-5.0 -10 -15 -20 5.0 10 15 VCC, |VEE|, SUPPLY VOLTAGE (V) 20 VO -

VCC = +15 V VEE = -15 V RL = 10 k 13 -55 -25 0 25 50 75 TA, AMBIENT TEMPERATURE (C) 100 125

Figure 13. Maximum Output Voltage versus Supply Voltage

Figure 14. Output Saturation Voltage versus Temperature

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LM833
PSR, POWER SUPPLY REJECTION (dB)
VCC VO

CMR, COMMON MODE REJECTION (dB)

140 120 100 80 60 40 20 0 100 +PSR = 20 Log -PSR = 20 Log 1.0 k -PSR

VCC = +15 V VEE = -15 V TA = 25C

160 140 120 100 80 60 40 20 100

ADM

VCM

ADM

VO VCM ADM V0

VEE

CMR = 20 Log

+PSR

( VCC ) O/ADM ( V ) VEE


10 k 100 k f, FREQUENCY (Hz) 1.0 M 10 M

VO/ADM

VCC = +15 V VEE = -15 V VCM = 0 V VCM = 1.5 V TA = 25C 1.0 k 10 k 100 k f, FREQUENCY (Hz) 1.0 M 10 M

Figure 15. Power Supply Rejection versus Frequency

Figure 16. Common Mode Rejection versus Frequency

THD, TOTAL HARMONIC DISTORTION (%)

1.0 + 0.1
-

RL

VO

VCC = +15 V VEE = -15 V RL = 2.0 k TA = 25C

e n, INPUT NOISE VOLTAGE (nV/ Hz )

10

5.0 VCC = +15 V VEE = -15 V RS = 100 TA = 25C

0.01

VO = 1.0 Vrms

2.0

0.001 10

VO = 3.0 Vrms 100 1.0 k f, FREQUENCY (Hz) 10 k 100 k

1.0 10

100

1.0 k f, FREQUENCY (Hz)

10 k

100 k

Figure 17. Total Harmonic Distortion versus Frequency

Figure 18. Input Referred Noise Voltage versus Frequency

i n , INPUT NOISE CURRENT (pA/ Hz )

2.0

1.0 0.7 0.5 0.4 0.3 0.2 10 100 1.0 k f, FREQUENCY (Hz) 10 k 100 k

e n, INPUT NOISE VOLTAGE (nV/ Hz )

VCC = +15 V VEE = -15 V TA = 25C

100

VCC = +15 V VEE = -15 V Vn(total) = (inRS)2 +en2 + 4KTRS TA = 25C

10

1.0 1.0

10

100

1.0 k

10 k

100 k

1.0 M

RS, SOURCE RESISTANCE ()

Figure 19. Input Referred Noise Current versus Frequency

Figure 20. Input Referred Noise Voltage versus Source Resistance

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LM833
VO , OUTPUT VOLTAGE (5.0 V/DIV) VO , OUTPUT VOLTAGE (5.0 V/DIV) VCC = +15 V VEE = -15 V RL = 2.0 k CL = 0 pF AV = -1.0 TA = 25C VCC = +15 V VEE = -15 V RL = 2.0 k CL = 0 pF AV = +1.0 TA = 25C

t, TIME (2.0 s/DIV)

t, TIME (2.0 s/DIV)

Figure 21. Inverting Amplifier

Figure 22. Noninverting Amplifier Slew Rate

VO , OUTPUT VOLTAGE (10 mV/DIV)

VCC = +15 V VEE = -15 V RL = 2.0 k CL = 0 pF AV = +1.0 TA = 25C

t, TIME (200 ns/DIV)

Figure 23. Noninverting Amplifier Overshoot

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LM833
PACKAGE DIMENSIONS
PDIP8 N SUFFIX CASE 62605 ISSUE L
NOTES: 1. DIMENSION L TO CENTER OF LEAD WHEN FORMED PARALLEL. 2. PACKAGE CONTOUR OPTIONAL (ROUND OR SQUARE CORNERS). 3. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. DIM A B C D F G H J K L M N MILLIMETERS MIN MAX 9.40 10.16 6.10 6.60 3.94 4.45 0.38 0.51 1.02 1.78 2.54 BSC 0.76 1.27 0.20 0.30 2.92 3.43 7.62 BSC --10_ 0.76 1.01 INCHES MIN MAX 0.370 0.400 0.240 0.260 0.155 0.175 0.015 0.020 0.040 0.070 0.100 BSC 0.030 0.050 0.008 0.012 0.115 0.135 0.300 BSC --10_ 0.030 0.040

B
1 4

F
NOTE 2

A L

C T
SEATING PLANE

J N D K
M

M T A
M

G 0.13 (0.005) B
M

SO8 D SUFFIX CASE 75107 ISSUE W


X A
8 5 NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: MILLIMETER. 3. DIMENSION A AND B DO NOT INCLUDE MOLD PROTRUSION. 4. MAXIMUM MOLD PROTRUSION 0.15 (0.006) PER SIDE. 5. DIMENSION D DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.127 (0.005) TOTAL IN EXCESS OF THE D DIMENSION AT MAXIMUM MATERIAL CONDITION. DIM A B C D G H J K M N S MILLIMETERS MIN MAX 4.80 5.00 3.80 4.00 1.35 1.75 0.33 0.51 1.27 BSC 0.10 0.25 0.19 0.25 0.40 1.27 0_ 8_ 0.25 0.50 5.80 6.20 INCHES MIN MAX 0.189 0.197 0.150 0.157 0.053 0.069 0.013 0.020 0.050 BSC 0.004 0.010 0.007 0.010 0.016 0.050 0_ 8_ 0.010 0.020 0.228 0.244

B
1 4

0.25 (0.010)

Y G C Z H D 0.25 (0.010)
M SEATING PLANE

X 45 _

0.10 (0.004)

Z Y

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LM833

ON Semiconductor and are trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. Typical parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including Typicals must be validated for each customer application by customers technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer.

PUBLICATION ORDERING INFORMATION


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LM833/D

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