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Summary of Results
20% Correct of 35 Score d ite m s:
7 C orre ct: 28 Incorre ct: 20% 80%
1.
Which of the following is not a linear/digital IC? Your Answer: Phase-locked loop Correct Answer: Passive filter
2.
Which of the following circuits is (are) linear/digital ICs? Your Answer: Timers Correct Answer: All of the above
3.
Which of the following is (are) the results of improvements built into a comparator IC? Your Answer: Outputs capable of directly driving a variety of loads Correct Answer: All of the above
4.
How many comparators does a 339 IC contain? Your Answer: 2 Correct Answer: 4
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6.
A 311 IC is an example of an eight-pin DIP that can be made to function as a _____. Your Answer: D to A converter Correct Answer: comparator
7.
A 339 IC is an example of a fourteen-pin DIP that can be made to function as a _____. Your Answer: D to A converter Correct Answer: comparator
8.
What is the function of a ladder network? Your Answer: Changing a digital signal to an analog signal
9.
What is (are) the level(s) of the input voltage to a ladder-network conversion? Your Answer: 0 V or Vre f
10.
What is the level of the output voltage of a ladder-network conversion? Your Answer: A fixed digital value Vre f Correct Answer: The analog output voltage proportional to the digital input voltage
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11.
What is the voltage resolution of an 8-stage ladder network? Your Answer: Vre f /256
12.
Which of the slope intervals of the integrator does the counter in the analog-to-digital converter (ADC) operate? Your Answer: Negative Correct Answer: Both positive and negative
13.
What is the first phase of the dual-slope method of conversion? Your Answer: Setting the counter to zero Correct Answer: Connecting the analog voltage to the integrator for a fixed time
14.
When is the counter set to zero in the dual-slope method of conversion? Your Answer: At the end of the charging of the capacitor
15.
Which of the following devices is (are) a component of a digital-to-analog converter (DAC)? Your Answer: All of the above
16.
At which of the following period(s) is the counter advanced (incremented) in dual-slope conversion? Your Answer: During both the charging and discharging of the capacitor of the integrator Correct Answer: During the discharging of the capacitor of the integrator
17.
What is (are) the input(s) to the comparator in the ladder-network conversion of an ADC? Your Answer: Analog input voltage Correct Answer: Both staircase and analog input voltage
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18.
What is the maximum conversion time of a clock rate of 1 MHz operating a 10-stage counter in an ADC? Your Answer: 1.024 s Correct Answer: 1.024 ms
19.
What is the minimum number of conversions per second of a clock rate of 1 MHz operating a 10-stage counter in an ADC? Your Answer: 697 Correct Answer: 976
20.
On which of the following does the conversion depend in ladder-network conversion? Your Answer: Digital counter Correct Answer: Comparator
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24.
The 555 timer IC is made up of a combination of linear comparators and digital flip-flops. Your Answer: False Correct Answer: True
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26.
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27.
Which of the following best describes the output of a 566 voltage-controlled oscillator? Your Answer: None of the above Correct Answer: Both square- and triangular-wave
28.
Which of the following best describes limitations for the 566 VCO? Your Answer: fo < 1 MHz Correct Answer: All of the above
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31.
The voltage-controlled oscillator is a subset of the "test bench" function generator. Your Answer: False Correct Answer: True
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w ps. pr enhal . com / w l ps/ gr ader
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33.
How many Vcc connections does the 565 PLL use? Your Answer: 3 Correct Answer: 2
34.
The timing components for a PLL are 15 k running frequency. Your Answer: 181.8 kHz Correct Answer: 90.91 kHz
35.
Which of the following frequencies is associated with the 565 frequency-shift keyed decoder? Your Answer: Both 1070 Hz and 1270 Hz
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