NANJING REL Manual

PCS-902 Line Distance Relay Instruction Manual
NR Electric Co., Ltd.
Preface
Preface
Introduction
This guide and the relevant operating or service manual documentation for the equipment provide full information on safe handling, commissioning and testing of this equipment. Documentation for equipment ordered from NR is dispatched separately from manufactured goods and may not be received at the same time. Therefore, this guide is provided to ensure that printed information normally present on equipment is fully understood by the recipient. Before carrying out any work on the equipment, the user should be familiar with the contents of this manual, and read relevant chapter carefully. This chapter describes the safety precautions recommended when using the equipment. Before installing and using the equipment, this chapter must be thoroughly read and understood.
Health and Safety

The information in this chapter of the equipment documentation is intended to ensure that equipment is properly installed and handled in order to maintain it in a safe condition. When electrical equipment is in operation, dangerous voltages will be present in certain parts of the equipment. Failure to observe warning notices, incorrect use, or improper use may endanger personnel and equipment and cause personal injury or physical damage. Before working in the terminal strip area, the equipment must be isolated. Proper and safe operation of the equipment depends on appropriate shipping and handling, proper storage, installation and commissioning, and on careful operation, maintenance and servicing. For this reason, only qualified personnel may work on or operate the equipment. Qualified personnel are individuals who: Are familiar with the installation, commissioning, and operation of the equipment and of the system to which it is being connected; Are able to safely perform switching operations in accordance with accepted safety engineering practices and are authorized to energize and de-energize equipment and to isolate, ground, and label it; Are trained in the care and use of safety apparatus in accordance with safety engineering practices; Are trained in emergency procedures (first aid).
Instructions and Warnings

The following indicators and standard definitions are used:
PCS-902 Line Distance Relay
Date: 2011-12-23
Preface
DANGER! It means that death, severe personal injury, or considerable equipment damage will occur if safety precautions are disregarded. WARNING! It means that death, severe personal, or considerable equipment damage could occur if safety precautions are disregarded. CAUTION! It means that light personal injury or equipment damage may occur if safety precautions are disregarded. This particularly applies to damage to the device and to resulting damage of the protected equipment. WARNING! The firmware may be upgraded to add new features or enhance/modify existing features, please make sure that the version of this manual is compatible with the product in your hand. WARNING! During operation of electrical equipment, certain parts of these devices are under high voltage. Severe personal injury or significant equipment damage could result from improper behavior. Only qualified personnel should work on this equipment or in the vicinity of this equipment. These personnel must be familiar with all warnings and service procedures described in this manual, as well as safety regulations. In particular, the general facility and safety regulations for work with high-voltage equipment must be observed. Noncompliance may result in death, injury, or significant equipment damage. DANGER! Never allow the current transformer (CT) secondary circuit connected to this equipment to be opened while the primary system is live. Opening the CT circuit will produce a dangerously high voltage. WARNING! Exposed terminals
Do not touch the exposed terminals of this equipment while the power is on, as the high voltage generated is dangerous
ii
Date: 2011-12-23
Preface
Residual voltage
Hazardous voltage can be present in the DC circuit just after switching off the DC power supply. It takes a few seconds for the voltage to discharge. CAUTION! Earth
The earthing terminal of the equipment must be securely earthed Operating environment
The equipment must only be used within the range of ambient environment detailed in the specification and in an environment free of abnormal vibration. Ratings
Before applying AC voltage and current or the DC power supply to the equipment, check that they conform to the equipment ratings. Printed circuit board
Do not attach and remove printed circuit boards when DC power to the equipment is on, as this may cause the equipment to malfunction. External circuit
When connecting the output contacts of the equipment to an external circuit, carefully check the supply voltage used in order to prevent the connected circuit from overheating. Connection cable
Carefully handle the connection cable without applying excessive force.
Copyright
Version: R1.05 NR ELECTRIC CO., LTD. 69 Suyuan Avenue. Jiangning, Nanjing 211102, China P/N: EN_XLBH5102.0086.0016 Tel: +86-25-87178185, Fax: +86-25-87178208 Website: www.nrelect.com, www.nari-relays.com Copyright NR 2012. All rights reserved Email: nr_techsupport@nari-relays.com
We reserve all rights to this document and to the information contained herein. Improper use in particular reproduction and dissemination to third parties is strictly forbidden except where expressly authorized. The information in this manual is carefully checked periodically, and necessary corrections will be included in future editions. If nevertheless any errors are detected, suggestions for correction or improvement are greatly appreciated. We reserve the rights to make technical improvements without notice.

Date: 2011-12-23
iii
Preface
Documentation Structure
The manual provides a functional and technical description of this relay and a comprehensive set of instructions for the relays use and application. All contents provided by this manual are summarized as below:
1 Introduction
Briefly introduce the application, functions and features about this relay.
2 Technical Data
Introduce the technical data about this relay, such as electrical specifications, mechanical specifications, ambient temperature and humidity range, communication port parameters, type tests, setting ranges and accuracy limits and the certifications that our products have passed.
3 Operation Theory
Introduce a comprehensive and detailed functional description of all protective elements.
4 Supervision
Introduce the automatic self-supervision function of this relay.
5 Management
Introduce the management function (measurment, recording and remote control) of this relay.
6 Hardware
Introduce the main function carried out by each plug-in module of this relay and providing the definition of pins of each plug-in module.
7 Settings
List settings including system settings, communication settings, label settings, logic links and etc., and some notes about the setting application.
8 Human Machine Interface

Introduce the hardware of the human machine interface (HMI) module and a detailed guide for the user how to use this relay through HMI. It also lists all the information which can be view through HMI, such as settings, measurements, all kinds of reports etc.
9 Configurable Function
Introduce configurable function of the device and all configurable signals are listed.
10 Communication
Introduce the communication port and protocol which this relay can support, IEC60970-5-103, IEC61850 and DNP3.0 protocols are introduced in details.
11 Installation
iv
Date: 2011-12-23
Preface
Introduce the recommendations on unpacking, handling, inspection and storage of this relay. A guide to the mechanical and electrical installation of this relay is also provided, incorporating earthing recommendations. A typical wiring connection to this relay is indicated.
12 Commissioning
Introduce how to commission this relay, comprising checks on the calibration and functionality of this relay.
13 Maintenance
A general maintenance policy for this relay is outlined.
14 Decommissioning and Disposal

A general decommissioning and disposal policy for this relay is outlined.
15 Manual Version History

List the instruction manual version and the modification history records.
Typographic and Graphical Conventions

Deviations may be permitted in drawings and tables when the type of designator can be obviously derived from the illustration. The following symbols are used in drawings:
&
AND gate
1
OR gate
Comparator
BI
Binary signal via opto-coupler

I>
SET
Input signal from comparator with setting
EN
Input signal of logic setting for function enabling

Date: 2011-12-23
Preface
SIG
Input of binary signal except those signals via opto-coupler
XXX
Output signal
Timer t t
Timer (optional definite-time or inverse-time characteristic)

10ms 0ms
Timer [delay pickup (10ms), delay dropoff (0ms), non-settable]

[XXX] 0ms
Timer (delay pickup, settable)

0ms [XXX]
Timer (delay dropoff, settable)

[XXX] [XXX]
Timer (delay pickup, delay dropoff, settable)

IDMT
Timer (inverse-time characteristic)
---xxx is the symbol
vi
Date: 2011-12-23
1 Introduction
1 Introduction Table of Contents

1 Introduction ...................................................................................... 1-a
1.1 Application....................................................................................................... 1-1 1.2 Function ........................................................................................................... 1-3 1.3 Features ........................................................................................................... 1-6
List of Figures
Figure 1.1-1 Typical application of PCS-902 ............................................................................1-1 Figure 1.1-2 Functional diagram of PCS-902...........................................................................1-2

Date: 2012-08-14
1-a
1 Introduction
1-b
Date: 2012-08-14
1 Introduction
1.1 Application
PCS-902 is a digital line distance protection with the main and back-up protection functions, which is designed for overhead line or cables and hybrid transmission lines of various voltage levels.
PCS-902
Optical fibre channel or PLC channel
PCS-902
Communication channel via direct dedicated fibre, MUX or PLC
Figure 1.1-1 Typical application of PCS-902
Main protection of PCS-902 comprises of pilot distance protection (PUTT, POTT, blocking and unblocking) and pilot directional earth-fault protection (selectable for independent communication channel or sharing channel with POTT), which can clear any internal fault instantaneously for the whole line with the aid of protection signalling. DPFC distance protection can perform extremely high speed operation for close-up faults. There is direct transfer trip (DTT) feature incorporated in the relay. PCS-902 also includes distance protection (3 forward zones, 1 reverse zone and 1 settable forward or reverse zone distance protection with selectable mho or quadrilateral characteristic), 4 stages directional earth fault protection, 4 stages directional phase overcurrent protection, 2 stages voltage protection (under/over voltage protection), broken conductor protection, pole discrepancy protection, breaker failure protection, frequency protection, thermal overload protection, and dead zone protection etc. Moreover, a backup overcurrent and earth fault protection will be automatically enabled when VT circuit is failure. In addition, stub overcurrent protection is provided for one and a half breakers arrangement when transmission line is put into maintenance. PCS-902 has selectable mode of single-phase tripping or three-phase tripping and configurable auto-reclosing mode for 1-pole, 3-poles and 1/3-pole operation. PCS-902 with appropriate selection of integrated protection functions can be applied for various voltage levels and primary equipment such as cables, overhead lines, interconnectors and transformer feeder, etc. It also supports configurable binary inputs, binary outputs, LEDs and IEC 61850 protocol.

Date: 2012-08-14
1-1
1 Introduction
BUS
52
81 85 21D 21 67G 67P 51GVT 51PVT 50BF 49 46BC 62PD FR 59 50G Data Transmitt/Receive 51G 50DZ 51P 27 50P FL
50STB (Only for one and a half breakers arrangement) SOTF 25 79
LINE
Figure 1.1-2 Functional diagram of PCS-902 No. 1 2 3 4 5 6 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 Pilot protection DPFC distance protection Distance protection Earth fault protection Definite-time earth-fault protection Inverse-time earth-fault protection Phase overcurrent protection Definite-time phase overcurrent protection Inverse-time phase overcurrent protection Overvoltage protection Undervoltage protection Frequency protection Broken conductor protection Breaker failure protection Thermal overload protection Stub overcurrent protection Dead zone protection Pole discrepancy protection Switch onto fault Phase overcurrent protection when VT circuit failure Earth fault protection when VT circuit failure Synchronism check Automatic reclosure Fault recorder Function 85 21D 21 67G 50G 51G 67P 50P 51P 59 27 81 46BC 50BF 49 50STB 50DZ 62PD SOTF 51PVT 51GVT 25 79 FR ANSI
1-2
Date: 2012-08-14
1 Introduction
26 Fault location FL
1.2 Function
1.
Protection Function Distance protection Three zones forward phase-to-ground distance elements (mho or quadrilateral characteristic) One pilot zone phase-to-ground distance element (mho or quadrilateral characteristic) with weakinfeed distance element One zone reverse phase-to-ground distance element (mho or quadrilateral characteristic) One zone settable forward or reverse phase-to-ground distance element (mho or quadrilateral characteristic) Three zones forward phase-to-phase distance elements (mho or quadrilateral characteristic) One pilot zone phase-to-phase distance element (mho or quadrilateral characteristic) with weakinfeed distance element One zone reverse phase-to-phase distance element (mho or quadrilateral characteristic) One zone settable forward or reverse phase-to-phase distance element (mho or quadrilateral characteristic) Blinder for mho characteristic distance element Power swing blocking releasing, selectable for each of above mentioned zones
Deviation of Power Frequency Component (DPFC) distance protection Current protection Four stages phase overcurrent protection, selectable time characteristic (definite-time or inverse-time) and directionality (forward direction, reverse direction or non-directional) Four stages directional earth fault protection, selectable time characteristic (definite-time or inverse-time) and directionality (forward direction, reverse direction or non-directional)
Breaker failure protection Optional instantaneously re-tripping One stage with two delay timers
Thermal overload protection Stub overcurrent protection Dead zone protection

1-3
Date: 2012-08-14
1 Introduction
Pole discrepancy protection Broken conductor protection Switch onto fault (SOTF) Via distance measurement elements Via dedicated earth fault element
Backup protection when VT circuit failure Phase overcurrent protection when VT circuit failure Earth fault protection when VT circuit failure
Voltage protection Two stages overvoltage protection Two stages undervoltage protection
Frequency protection Four stages overfrequency protection Four stages underfrequency protection f/dt block criterion for underfrequency protection
Control function Synchro-checking Automatic reclosure (single shot or multi-shot (max. 4) for 1-pole AR and 3-pole AR)
Pilot scheme logic Phase-segregated communication logic of distance protection Weak infeed logic of pilot distance protection Weak infeed logic of pilot directional earth fault protection
Communication scheme of optical pilot channel (Optional) Direct optical link Connection to a communication network, support G.703 and C37.94 protocol Dual-channels redundancy
2.
Measurement and control function Remote control (open and closing) Synchronism check for remote and manual closing (only for one circuit breaker) Energy metering (active and reactive energy are calculated in import respectively export
Date: 2012-08-14
1-4
1 Introduction
direction) 3.
Logic User programmable logic Additional function Fault location Fault phase selection Parallel line compensation for fault location VT circuit supervision CT circuit supervision Self diagnostic DC power supply supervision Event Recorder including 1024 disturbance records, 1024 binary events, 1024 supervision events, 256 control logs and 1024 device logs. Disturbance recorder including 64 disturbance records with waveforms (The file format of disturbance recorder is compatible with international COMTRADE file.) Clock synchronization PPS(RS-485) IRIG-B(RS-485) PPM(DIN) SNTP(PTP) IEEE1588 SNTP(BC) PPS(DIN)
4.
5.
Monitoring Number of circuit breaker operation (single-phase tripping, three-phase tripping and reclosing) Channel status Frequency Communication 2 RS-485 communication rear ports conform to IEC 60870-5-103 protocol or DNP3.0 protocol 1 RS-485 communication rear ports for clock synchronization
1-5
Date: 2012-08-14
6.
1 Introduction
Up to 4 Ethernet ports (depend on the chosen type of MON plug-in module) conform to IEC 61850 protocol, DNP3.0 protocol or IEC 60870-5-103 protocol over TCP/IP Up to 2 Ethernet ports via optic fiber (ST interface or SC interface, depend on the chosen type of MON plug-in module) conform to IEC 61850 protocol, DNP3.0 protocol or IEC 60870-5-103 protocol over TCP/IP GOOSE communication function (optional NET-DSP plug-in module) User Interface Friendly HMI interface with LCD and 9-button keypad on the front panel. 1 front multiplex RJ45 port for testing and setting 1 RS-232 or RS-485 rear ports for printer Language switchover English+ selected language Auxiliary software - PCS-Explorer
7.
1.3 Features
The intelligent device integrated with protection, control and monitor provides powerful protection function, flexible protection configuration, user programmable logic and configurable binary input and binary output, which can meet with various application requirements. High-performance hardware platform and modularized design, MCU (management control unit)DSP (digital signal processor). MCU manages general fault detector element and DSP manages protection and metering. Their data acquisition system is completely independent in electronic circuit. DC power supply of output relay is controlled by the operation of fault detector element operates, this prevents maloperation due to error from ADC or damage of any apparatus. Fast fault clearance for faults within the protected line, the operating time is less than 10 ms for close-up faults, less than 15ms for faults in the middle portion of protected line and less than 25ms for remote end faults. The unique DPFC distance element integrated in the protective device provides extremely high speed operation and insensitive to power swing. Self-adaptive floating threshold which only reflects deviation of power frequency component improves the protection sensitivity and stability under the condition of load fluctuation and system disturbance. Advanced and reliable power swing blocking releasing feature which ensure distance protection operate correctly for internal fault during power swing and prevent distance protection from maloperation during power swing Flexible automatic reclosure supports various initiation modes and check modes
1-6
Date: 2012-08-14
1 Introduction
Multiple setting groups with password protection and setting value saved permanently before modification Powerful PC tool software can fulfill protection function configuration, modify setting and waveform analysis.

Date: 2012-08-14
1-7
1 Introduction
1-8
Date: 2012-08-14
2 Technical Data
2 Technical Data Table of Contents

2 Technical Data .................................................................................. 2-a
2.1 Electrical Specifications ................................................................................. 2-1
2.1.1 AC Current Input ................................................................................................................ 2-1 2.1.2 AC Voltage Input ................................................................................................................ 2-1 2.1.3 Power Supply ..................................................................................................................... 2-1 2.1.4 Binary Input ........................................................................................................................ 2-1 2.1.5 Binary Output ..................................................................................................................... 2-2
2.2 Mechanical Specifications ............................................................................. 2-3 2.3 Ambient Temperature and Humidity Range .................................................. 2-3 2.4 Communication Port ....................................................................................... 2-3
2.4.1 EIA-485 Port ...................................................................................................................... 2-3 2.4.2 Ethernet Port ...................................................................................................................... 2-3 2.4.3 Optical Fibre Port ............................................................................................................... 2-4 2.4.4 Print Port ............................................................................................................................ 2-5 2.4.5 Clock Synchronization Port ................................................................................................ 2-5
2.5 Type Tests ........................................................................................................ 2-5

2.5.1 Environmental Tests ........................................................................................................... 2-5 2.5.2 Mechanical Tests................................................................................................................ 2-5 2.5.3 Electrical Tests ................................................................................................................... 2-5 2.5.4 Electromagnetic Compatibility ............................................................................................ 2-5
2.6 Certifications ................................................................................................... 2-6 2.7 Protective Functions....................................................................................... 2-7

2.7.1 Fault Detector .................................................................................................................... 2-7 2.7.2 Distance Protection ............................................................................................................ 2-7 2.7.3 Phase Overcurrent Protection ............................................................................................ 2-7

Date: 2012-06-25
2-a
2 Technical Data
2.7.4 Earth Fault Protection ........................................................................................................ 2-7 2.7.5 Overvoltage Protection ...................................................................................................... 2-7 2.7.6 Undervoltage Protection..................................................................................................... 2-8 2.7.7 Overfrequency Protection .................................................................................................. 2-8 2.7.8 Underfrequency Protection ................................................................................................ 2-8 2.7.9 Breaker Failure Protection ................................................................................................. 2-8 2.7.10 Thermal Overload Protection ........................................................................................... 2-9 2.7.11 Stub Overcurrent Protection ............................................................................................. 2-9 2.7.12 Dead Zone Protection ...................................................................................................... 2-9 2.7.13 Pole Discrepancy Protection ............................................................................................ 2-9 2.7.14 Broken Conductor Protection ........................................................................................... 2-9 2.7.15 Auto-reclosing .................................................................................................................. 2-9 2.7.16 Transient Overreach ...................................................................................................... 2-10 2.7.17 Fault Locator .................................................................................................................. 2-10
2-b
Date: 2012-06-25
2 Technical Data
2.1 Electrical Specifications

2.1.1 AC Current Input
Phase rotation Nominal frequency (fn) Rated current (In) Linear to ABC 505Hz, 605Hz 1A 5A
0.05In~40In (It should measure current without beyond full scale against 20 times of related current and value of DC offset by 100%.)
Thermal withstand -continuously -for 10s -for 1s -for half a cycle Burden Number 4In 30In 100In 250In < 0.15VA/phase @In < 0.25VA/phase @In
Up to 7 current input according to various applications
2.1.2 AC Voltage Input

Phase rotation Nominal frequency (fn) Rated voltage (Un) Linear to Thermal withstand -continuously -10s -1s Burden at rated Number 200V 260V 300V < 0.20VA/phase @Un Up to 6 voltage input according to various applications ABC 505Hz, 605Hz 100V~130V 1V~170V
2.1.3 Power Supply

Standard Rated voltage Permissible voltage range Permissible AC ripple voltage Burden Quiescent condition Operating condition <30W <35W IEC 60255-11:2008 110Vdc/125Vdc/220Vdc/250Vdc 88~300Vdc 15% of the nominal auxiliary voltage
2.1.4 Binary Input

Rated voltage Rated current drain Pickup voltage Dropoff voltage 24V 1.2mA 13~17V 50% of pickup voltage 48V 2.4mA 26~34V

Date: 2012-06-25
2-1
2 Technical Data
Maximum permissible voltage Withstand voltage Response time for logic input Number 100Vdc 2000Vac, 2800Vdc (continuously ) 1ms Up to 36 binary input according to various hardware configurations
Rated voltage Rated current drain Pickup voltage Dropoff voltage Maximum permissible voltage Withstand voltage Response time for logic input Number
110V 1.1mA 60.5~77V
125V 1.25mA 70~87.5V
220V 2.2mA 121~154V
250V 2.5mA
50% of pickup voltage 300Vdc 2000Vac, 2800Vdc (continuously ) 1ms Up to 36 binary input according to various hardware configurations
2.1.5 Binary Output

1. Tripping/signaling contact
Potential free contact 5A@380Vac 5A@250Vdc <8ms (typical 5ms) <5ms 0.6A@48Vdc Breaking capacity (L/R=40ms) 0.2A@110Vdc 0.1A@220Vdc Burden Maximal system voltage Test voltage across open contact 300mW 380Vac 250Vdc 1000V RMS for 1min 6A@3s Short duration current 15A@0.5s 30A@0.2s Number Up to 55 binary output according to various hardware configurations
Output mode Continuous carry Pickup time Dropoff time
2.
Fast signaling contact

Potential free contact 5A@380Vac 5A@250Vdc <1ms <5ms 1.0A@48Vdc
Output mode Continuous carry Pickup time Dropoff time
Breaking capacity (L/R=0ms)
0.9A@110Vdc 0.4A@220Vdc
Maximal system voltage 2-2
380Vac PCS-902 Line Distance Relay

Date: 2012-06-25
2 Technical Data
250Vdc Test voltage across open contact 1000V RMS for 1min
2.2 Mechanical Specifications

Enclosure dimensions (WHD) Mounting Way Trepanning dimensions (WH) Chassis color Weight per device Chassis material Location of terminal Device structure Protection class Standard Front side Other sides Rear side, connection terminals IEC 60255-1:2009 IP40, up to IP51 (With cover) IP30 IP20 482.6mm177.0mm291.0mm Flush mounted 450.0mm179.0mm, M6 screw Silver grey Approx. 15kg Aluminum alloy Rear panel of the device Plug-in modular type @ rear side, integrated frontplate
2.3 Ambient Temperature and Humidity Range

Standard Operating temperature Transport and storage temperature range Permissible humidity Pollution degree Altitude IEC 60255-1:2009 -40 C to +70 C (Readability of disaply may be impaired below -20 C) -40 C to +70 C 5%-95%, without condensation 2 <3000m
2.4 Communication Port

2.4.1 EIA-485 Port
Baud rate Protocol Maximal capacity Transmission distance Safety level Twisted pair 4.8kbit/s, 9.6kbit/s, 19.2kbit/s, 38.4kbit/s, 57.6kbit/s, 115.2kbit/s IEC 60870-5-103:1997 32 <500m Isolation to ELV level Screened twisted pair cable
2.4.2 Ethernet Port

Connector type Transmission rate Transmission standard Transmission distance PCS-902 Line Distance Relay
Date: 2012-06-25
RJ-45 100Mbits/s 100Base-TX <100m
ST, SC (Multi mode)
100Base-FX <2km (1310nm) 2-3
2 Technical Data
Protocol Safety level IEC 60870-5-103:1997, DNP 3.0 or IEC 61850 Isolation to ELV level
2.4.3 Optical Fibre Port

2.4.3.1 For Station Level
Characteristic Connector type Fibre type Transmission distance Wave length Transmission power Minimum receiving power Margin Glass optical fiber ST, SC Multi mode <2km 1310nm Min. -20.0dBm Min. -30.0dBm Min +3.0dB
2.4.3.2 For Process Level

Characteristic Connector type Fibre type Transmission distance Wave length Transmission power Minimum receiving power Margin Glass optical fiber LC Multi mode <2km 1310nm Min. -20.0dBm Min. -30.0dBm Min +3.0dB
2.4.3.3 For Pilot Channel

Characteristic Connector type Fibre type Wave length Transmission distance Transmission power Minimum receiving power Optical overload point Glass optical fiber FC Single mode 1310nm Max.40km -13.03.0 dBm Min.-37 dBm Min.-3 dBm 1550nm Max.100km -5.0 dBm3.0 dBm Min.-36 dBm Min.-3 dBm ST Multi mode 850nm Max.2km -12dBm~-20 dBm Min. -30.0dBm Min.-8 dBm
2.4.3.4 For Synchronization Port

Characteristic Connector type Fibre type Wave length Minimum receiving power Margin Glass optical fiber ST Multi mode 820nm Min. -25.0dBm Min +3.0dB
2-4
Date: 2012-06-25
2 Technical Data
2.4.4 Print Port

Type Baud Rate Printer type Safety level RS-232 4.8kbit/s, 9.6kbit/s, 19.2kbit/s, 38.4kbit/s, 57.6kbit/s, 115.2kbit/s EPSON 300K printer Isolation to ELV level
2.4.5 Clock Synchronization Port

Type Transmission distance Maximal capacity Timing standard Safety level RS-485 <500m 32 PPS, IRIG-B Isolation to ELV level
2.5 Type Tests

2.5.1 Environmental Tests
Dry cold test Dry heat test Damp heat test, cyclic IEC60068-2-1:2007 IEC60068-2-2:2007 IEC60068-2-30:2005
2.5.2 Mechanical Tests

Vibration Shock and bump IEC 60255-21-1:1988 Class I IEC 60255-21-2:1988 Class I
2.5.3 Electrical Tests

Standard Dielectric tests Standard Impulse voltage tests Overvoltage category Insulation measurements resistance Isolation resistance >100M@500VDC IEC 60255-27:2005 Test voltage 2kV, 50Hz, 1min IEC 60255-5:2000 Test voltage 5kV
2.5.4 Electromagnetic Compatibility

IEC 60255-22-1:2007 1MHz burst disturbance test Common mode: class III 2.5kV Differential mode: class III 1.0kV IEC60255-22-2:2008 class IV Electrostatic discharge test For contact discharge: 8kV For air discharge: 15kV IEC 60255-22-3:2007 class III Radio frequency interference tests Frequency sweep Radiated amplitude-modulated PCS-902 Line Distance Relay
Date: 2012-06-25
2-5
2 Technical Data
10V/m (rms), f=80~1000MHz Spot frequency Radiated amplitude-modulated 10V/m (rms), f=80MHz/160MHz/450MHz/900MHz Radiated pulse-modulated 10V/m (rms), f=900MHz IEC 60255-22-4:2008 Fast transient disturbance tests Power supply, I/O, Earth: class IV, 4kV, 2.5kHz, 5/50ns Communication terminals: class IV, 2kV, 5kHz, 5/50ns IEC 60255-22-5:2008 Surge immunity test Power supply, AC input, I/O port: class IV, 1.2/50us Common mode: 4kV Differential mode: 2kV Conducted Disturbance Power Frequency Magnetic Field Immunity Pulse Magnetic Field Immunity Damped oscillatory magnetic field immunity RF Electromagnetic IEC 60255-22-6:2001 Power supply, AC, I/O, Comm. Terminal: Class III, 10Vrms, 150 kHz~80MHz IEC 61000-4-8:2001 class V, 100A/m for 1min, 1000A/m for 3s IEC 61000-4-9:2001 class V, 6.4/16s, 1000A/m for 3s IEC 61000-4-10:2001 class V, 100kHz & 1MHz100A/m
Auxiliary power supply performance - Voltage dips -Voltage short interruptions
IEC60255-11: 2008 Up to 500ms for dips to 40% of rated voltage without reset 100ms for interruption without rebooting
2.6 Certifications
ISO9001:2008 ISO14001:2004 OHSAS18001:2007 ISO10012:2003 CMMI L4 EMC: 2004/108/EC, EN50263:1999 Products safety(PS): 2006/95/EC, EN61010-1:2001
2-6
Date: 2012-06-25
2 Technical Data
2.7 Protective Functions

2.7.1 Fault Detector
2.7.1.1 DPFC Current Element
Setting range Accuracy 0.050In~30.000In (A) 2.5% of setting or 0.02In whichever is greater
2.7.1.2 Residual Current Element

Setting range Accuracy 0.050In~30.000In (A) 2.5% of setting or 0.02In whichever is greater
2.7.1.3 Overvoltage Element

Setting range Accuracy Un~2Unn (V) 2.5% of setting or 0.01Un, whichever is greater
2.7.2 Distance Protection

Setting range Accuracy Resetting ratio Time delay Accuracy (0.000~4Unn)/In (ohm) 2.5% of setting or 0.1/In whichever is greater 105% 0.000~10.000 (s) 1%Setting+30ms
2.7.3 Phase Overcurrent Protection

Setting range Accuracy Resetting ratio Time delay Accuracy (definite-time characteristic) Accuracy (inverse-time characteristic) 0.050In~30.000In (A) 2.5% of setting or 0.02In whichever is greater 95% 0.000~20.000 (s) 1% of Setting+30ms (at 2 times current setting) 2.5% operating time or 30ms, whichever is greater (for current between 1.2 and 20 multiples of pickup)
2.7.4 Earth Fault Protection

Setting range Accuracy Resetting ratio Time delay Accuracy (definite-time characteristic) Accuracy (inverse-time characteristic) 0.050In~30.000In (A) 2.5% of setting or 0.02In whichever is greater 95% 0.000~20.000 (s) 1% of Setting+30ms (at 2 times current setting) 2.5% operating time or 30ms, whichever is greater (for current between 1.2 and 20 multiples of pickup)
2.7.5 Overvoltage Protection

Setting range Un~2Unn (V)

Date: 2012-06-25
2-7
2 Technical Data
Accuracy Resetting ratio Time delay Accuracy (definite-time characteristic) Accuracy (inverse-time characteristic) 2.5% of setting or 0.01Un, whichever is greater 95% 0.000~30.000 (s) 1% of Setting+30ms (at 1.2 times voltage setting) 2.5% operating time or 30ms, whichever is greater (for voltage between 1.2 and 2 multiples of pickup)
2.7.6 Undervoltage Protection

Setting range Accuracy Resetting ratio Time delay Accuracy (definite-time characteristic) Accuracy (inverse-time characteristic) 0~Unn (V) 2.5% of setting or 0.01Un, whichever is greater 105% 0.000~30.000 (s) 1%Setting+30ms (at 1.2 times voltage setting) 2.5% operating time or 30ms, whichever is greater (for voltage between 0.5 and 0.8 multiples of pickup)
2.7.7 Overfrequency Protection

Setting range Accuracy Resetting ratio Time delay Accuracy 50.00~65.00 (Hz) 0.02Hz 95% 0.000~100.000 (s) 1%Setting+30ms (at 1.2 times frequency setting)
2.7.8 Underfrequency Protection

Setting range Accuracy Resetting ratio Time delay Accuracy df/dt blocking setting range Accuracy 45.00~ 60.00 (Hz) 0.02Hz 105% 0.000s ~ 100.000 (s) 1%Setting+30ms (at 0.8 times frequency setting) 0.200~20.000 (Hz/s) 0.02Hz/s
2.7.9 Breaker Failure Protection

Pick-up time Drop-off time Setting range of phase current Setting range of zero-sequence current Setting range of negative-sequence current Accuracy Time delay (first) Time delay (second) <20ms <20ms 0.050In~30.000In (A) 0.050In~30.000In (A) 0.050In~30.000In (A) 2.5% of setting or 0.02In whichever is greater 0.000~10.000 (s) 0.000~10.000 (s)
2-8
Date: 2012-06-25
2 Technical Data
2.7.10 Thermal Overload Protection

Base current setting range Accuracy Line thermal time constant Thermal overload coefficient for trip Thermal overload coefficient for alarm Resetting ratio Drop-off time Time accuracy 0.050In~30.000In (A) 2.5% of setting or 0.02In whichever is greater 0.100~100.000 (min) 1.000~3.000 1.000~3.000 95% <30ms 2.5% operating time or 30ms, whichever is greater (for current between 1.2 and 20 multiples of pickup)
2.7.11 Stub Overcurrent Protection

Setting range Accuracy Resetting ratio Time delay Accuracy 0.050In~30.000In (A) 2.5% of setting or 0.02In whichever is greater 95% 0.000~10.000 (s) 1% of Setting+30ms (at 2 times current setting)
2.7.12 Dead Zone Protection

Setting range Accuracy Time delay Accuracy 0.050In~30.000In 2.5% or 0.02In whichever is greater 0.000~10.000s 1%Setting+30ms
2.7.13 Pole Discrepancy Protection

Setting range (zero-sequence current) Setting range (negative-sequence current) Accuracy Resetting ratio Time delay Accuracy 0.050In~30.000In (A) 0.050In~30.000In (A) 2.5% of setting 0.02In whichever is greater 95% 0.000~10.000 (s) 1% of Setting+30ms (at 2 times current setting)
2.7.14 Broken Conductor Protection

Setting range (I2/I1) Accuracy Resetting ratio Time delay Accuracy 0.20~1.00 2.5% of setting 95% 0.000~600.000 (s) 1% of Setting+30ms
2.7.15 Auto-reclosing
Phase difference setting range Accuracy 0~89 (Deg) 2.0Deg

Date: 2012-06-25
2-9
2 Technical Data
Voltage difference setting range Accuracy Frequency difference setting range Accuracy Operating time of synchronism check Operating time of energizing check Operating time of auto-reclosing 0.02Un~0.8Un (V) Max(0.01Un, 2.5%) 0.02~1 (Hz) 0.01Hz 1%Setting+20ms 1%Setting+20ms 1%Setting+20ms
2.7.16 Transient Overreach

Tolerance for all high-speed protection 2%
2.7.17 Fault Locator

Accuracy for multi-phase faults with single end feed < 2.5%
Tolerance will be higher in case of single-phase fault with high ground resistance.
2-10
Date: 2012-06-25
3 Operation Theory
3 Operation Theory Table of Contents

3 Operation Theory ............................................................................. 3-a
3.1 System Parameters ......................................................................................... 3-1
3.1.1 General Application ............................................................................................................ 3-1 3.1.2 Function Description .......................................................................................................... 3-1 3.1.3 Settings .............................................................................................................................. 3-1
3.2 Line Parameters .............................................................................................. 3-1

3.2.1 General Application ............................................................................................................ 3-1 3.2.2 Function Description .......................................................................................................... 3-1 3.2.3 Settings .............................................................................................................................. 3-2
3.3 Circuit Breaker Position Supervision ............................................................ 3-2

3.3.1 General Application ............................................................................................................ 3-2 3.3.2 Function Description .......................................................................................................... 3-2 3.3.3 Function Block Diagram ..................................................................................................... 3-3 3.3.4 I/O Signals ......................................................................................................................... 3-3 3.3.5 Logic .................................................................................................................................. 3-4 3.3.6 Settings .............................................................................................................................. 3-5
3.4 Fault Detector (FD) .......................................................................................... 3-5

3.4.1 Application.......................................................................................................................... 3-5 3.4.2 Fault Detector in Fault Detector DSP ................................................................................. 3-5 3.4.3 Protection Fault Detector in Protection Calculation DSP ................................................... 3-8 3.4.4 Function Block Diagram ..................................................................................................... 3-9 3.4.5 I/O Signals ....................................................................................................................... 3-10 3.4.6 Logic ................................................................................................................................ 3-10 3.4.7 Settings ............................................................................................................................ 3-10
3.5 Auxiliary Element .......................................................................................... 3-10

Date: 2012-08-14
3-a
3 Operation Theory
3.5.1 General Application .......................................................................................................... 3-10 3.5.2 Function Description ........................................................................................................ 3-11 3.5.3 Function Block Diagram ................................................................................................... 3-13 3.5.4 I/O Signals ....................................................................................................................... 3-13 3.5.5 Logic ................................................................................................................................ 3-15 3.5.6 Settings ............................................................................................................................ 3-18
3.6 Distance Protection ...................................................................................... 3-19

3.6.1 General Application .......................................................................................................... 3-19 3.6.2 Function Description ........................................................................................................ 3-19 3.6.3 DPFC Distance Protection ............................................................................................... 3-28 3.6.4 Load Encroachment ......................................................................................................... 3-32 3.6.5 Mho Distance Protection .................................................................................................. 3-33 3.6.6 Quadrilateral Distance Element ....................................................................................... 3-50 3.6.7 Pilot Distance Zone .......................................................................................................... 3-62 3.6.8 Power Swing Detection .................................................................................................... 3-65 3.6.9 Power Swing Blocking Releasing..................................................................................... 3-66 3.6.10 Distance SOTF Protection ............................................................................................. 3-72
3.7 Optical Pilot Channel (Option) ..................................................................... 3-77

3.7.1 General Application .......................................................................................................... 3-77 3.7.2 Function Description ........................................................................................................ 3-77 3.7.3 Function Block Diagram ................................................................................................... 3-82 3.7.4 I/O Signals ....................................................................................................................... 3-82 3.7.5 Logic ................................................................................................................................ 3-84 3.7.6 Settings ............................................................................................................................ 3-84
3.8 Pilot Distance Protection .............................................................................. 3-84

3.8.1 General Application .......................................................................................................... 3-84 3.8.2 Function Description ........................................................................................................ 3-84 3.8.3 Function Block Diagram ................................................................................................... 3-95 3.8.4 I/O Signals ....................................................................................................................... 3-95 3.8.5 Settings ............................................................................................................................ 3-96
3-b
Date: 2012-08-14
3 Operation Theory
3.9 Pilot Directional Earth-fault Protection ....................................................... 3-97

3.9.1 General Application .......................................................................................................... 3-97 3.9.2 Function Description ........................................................................................................ 3-98 3.9.3 Function Block Diagram ................................................................................................. 3-103 3.9.4 I/O Signals ..................................................................................................................... 3-103 3.9.5 Settings .......................................................................................................................... 3-104
3.10 Current Direction....................................................................................... 3-105

3.10.1 General Application ...................................................................................................... 3-105 3.10.2 Function Description .................................................................................................... 3-105 3.10.3 I/O Signals ................................................................................................................... 3-109 3.10.4 Settings ........................................................................................................................ 3-110
3.11 Phase Overcurrent Protection .................................................................. 3-110

3.11.1 General Application ...................................................................................................... 3-110 3.11.2 Function Description..................................................................................................... 3-110 3.11.3 Function Block Diagram ............................................................................................... 3-113 3.11.4 I/O Signals.................................................................................................................... 3-113 3.11.5 Logic............................................................................................................................. 3-114 3.11.6 Settings ........................................................................................................................ 3-114
3.12 Earth Fault Protection................................................................................ 3-118

3.12.1 General Application ...................................................................................................... 3-118 3.12.2 Function Description .................................................................................................... 3-118 3.12.3 Function Block Diagram ............................................................................................... 3-120 3.12.4 I/O Signals ................................................................................................................... 3-121 3.12.5 Logic ............................................................................................................................ 3-121 3.12.6 Settings ........................................................................................................................ 3-122
3.13 Overcurrent Protection for VT Circuit Failure ........................................ 3-126

3.13.1 General Application ...................................................................................................... 3-126 3.13.2 Function Block Diagram ............................................................................................... 3-127 3.13.3 I/O Signals ................................................................................................................... 3-127 3.13.4 Logic ............................................................................................................................ 3-128
Date: 2012-08-14
3-c
3 Operation Theory
3.13.5 Settings ........................................................................................................................ 3-128
3.14 Residual Current SOTF Protection .......................................................... 3-129

3.15 Voltage Protection ..................................................................................... 3-130

3.15.1 Overvoltage Protection................................................................................................. 3-130 3.15.2 Undervoltage Protection............................................................................................... 3-136
3.16 Frequency Protection ............................................................................... 3-143

3.17 Breaker Failure Protection ....................................................................... 3-149

3.18 Thermal Overload Protection ................................................................... 3-153

3.18.1 General Application ...................................................................................................... 3-153 3.18.2 Function Description .................................................................................................... 3-154 3.18.3 Function Block Diagram ............................................................................................... 3-155 3.18.4 I/O Signals ................................................................................................................... 3-155
3-d
Date: 2012-08-14
3 Operation Theory
3.18.5 Logic ............................................................................................................................ 3-156 3.18.6 Settings ........................................................................................................................ 3-156
3.19 Stub Overcurrent Protection .................................................................... 3-157

3.19.1 General Application ...................................................................................................... 3-157 3.19.2 Function Block Diagram ............................................................................................... 3-158 3.19.3 I/O Signals ................................................................................................................... 3-158 3.19.4 Logic ............................................................................................................................ 3-158 3.19.5 Settings ........................................................................................................................ 3-159
3.20 Dead Zone Protection ............................................................................... 3-159

3.20.1 General Application ...................................................................................................... 3-159 3.20.2 Function Description .................................................................................................... 3-159 3.20.3 Function Block Diagram ............................................................................................... 3-159 3.20.4 I/O Signal ..................................................................................................................... 3-160 3.20.5 Logic ............................................................................................................................ 3-160 3.20.6 Settings ........................................................................................................................ 3-160
3.21 Pole Discrepancy Protection.................................................................... 3-161

3.22 Broken Conductor Protection .................................................................. 3-163

3.23 Synchrocheck ........................................................................................... 3-165

Date: 2012-08-14
3-e
3 Operation Theory
3.23.1 General Application ...................................................................................................... 3-165 3.23.2 Function Description .................................................................................................... 3-165 3.23.3 I/O Signals ................................................................................................................... 3-172 3.23.4 Logic ............................................................................................................................ 3-173 3.23.5 Settings ........................................................................................................................ 3-174
3.24 Automatic Reclosure ................................................................................ 3-176

3.25 Transfer Trip .............................................................................................. 3-193

3.26 Trip Logic ................................................................................................... 3-195

3.26.1 General Application ...................................................................................................... 3-195 3.26.2 Function Description .................................................................................................... 3-195 3.26.3 I/O Signals ................................................................................................................... 3-195 3.26.4 Logic ............................................................................................................................ 3-196 3.26.5 Settings ........................................................................................................................ 3-199
3.27 VT Circuit Supervision.............................................................................. 3-199

3.27.1 General Application ...................................................................................................... 3-199 3.27.2 Function Description .................................................................................................... 3-199 3.27.3 Function Block Diagram ............................................................................................... 3-200 3.27.4 I/O Signals ................................................................................................................... 3-200
3-f
Date: 2012-08-14
3 Operation Theory
3.27.5 Logic ............................................................................................................................ 3-201 3.27.6 Settings ........................................................................................................................ 3-201
3.28 CT Circuit Supervision ............................................................................. 3-202

3.28.1 General Application ...................................................................................................... 3-202 3.28.2 Function Description .................................................................................................... 3-202 3.28.3 Function Block Diagram ............................................................................................... 3-202 3.28.4 I/O Signals ................................................................................................................... 3-202 3.28.5 Logic ............................................................................................................................ 3-203
3.29 Control and Synchrocheck for Manual Closing ..................................... 3-203

3.29.1 General Application ...................................................................................................... 3-203 3.29.2 Function Description .................................................................................................... 3-203 3.29.3 Function Block Diagram ............................................................................................... 3-206 3.29.4 I/O Signals ................................................................................................................... 3-206 3.29.5 Settings ........................................................................................................................ 3-207
3.30 Faulty Phase Selection ............................................................................. 3-209

3.30.1 General Application ...................................................................................................... 3-209 3.30.2 Function Description .................................................................................................... 3-209 3.30.3 I/O Signals ................................................................................................................... 3-211
3.31 Fault Location ............................................................................................ 3-211

3.31.1 Application.................................................................................................................... 3-211 3.31.2 Function Description .................................................................................................... 3-211 3.31.3 Mutual Compensation .................................................................................................. 3-211 3.31.4 I/O Signals ................................................................................................................... 3-214
List of Figures
Figure 3.3-1 Logic diagram of CB position supervision.........................................................3-4 Figure 3.3-2 Logic diagram of trip&closing circuit supervision ............................................3-5 Figure 3.4-1 Flow chart of protection program .......................................................................3-9 Figure 3.4-2 Logic diagram of fault detector .........................................................................3-10 Figure 3.5-1 Logic diagram of auxiliary element ...................................................................3-17

Date: 2012-08-14
3-g
3 Operation Theory
Figure 3.6-1 Protected reach of distance protection for each zone ....................................3-21 Figure 3.6-2 Operating time of single-phase fault (50Hz, SIR=1) .........................................3-22 Figure 3.6-3 Operating time of single-phase fault (60Hz, SIR=1) .........................................3-23 Figure 3.6-4 Operating time of two-phase fault (50Hz, SIR=1) .............................................3-23 Figure 3.6-5 Operating time of two-phase fault (60Hz, SIR=1) .............................................3-24 Figure 3.6-6 Operating time of three-phase fault (50Hz, SIR=1) ..........................................3-24 Figure 3.6-7 Operating time of three-phase fault (60Hz, SIR=1) ..........................................3-25 Figure 3.6-8 Operating time of single-phase fault (50Hz, SIR=30) .......................................3-25 Figure 3.6-9 Operating time of single-phase fault (60Hz, SIR=30) .......................................3-26 Figure 3.6-10 Operating time of two-phase fault (50Hz, SIR=30) .........................................3-26 Figure 3.6-11 Operating time of two-phase fault (60Hz, SIR=30) .........................................3-27 Figure 3.6-12 Operating time of three-phase fault (50Hz, SIR=30) ......................................3-27 Figure 3.6-13 Operating time of three-phase fault (60Hz, SIR=30) ......................................3-28 Figure 3.6-14 Operation characteristic for forward fault ......................................................3-29 Figure 3.6-15 Operation characteristic for reverse fault ......................................................3-30 Figure 3.6-16 Logic diagram of DPFC distance protection ..................................................3-31 Figure 3.6-17 Distance element with load trapezoid .............................................................3-32 Figure 3.6-18 Phase-to-ground operation characteristic for forward fault .........................3-34 Figure 3.6-19 Phase-to-phase operation characteristic for forward fault ...........................3-35 Figure 3.6-20 Operation characteristic for reverse fault ......................................................3-37 Figure 3.6-21 Steady-state characteristic of three-phase short-circuit fault ......................3-37 Figure 3.6-22 Operation characteristic of three-phase close up short-circuit fault ...........3-38 Figure 3.6-23 Shift impedance characteristic of zone 1 and zone 2 ....................................3-39 Figure 3.6-24 Operation characteristic of reverse Z4 distance protection .........................3-40 Figure 3.6-25 Logic diagram of enabling distance protection (Mho) ..................................3-42 Figure 3.6-26 Logic diagram of distance protection (Mho zone 1) ......................................3-42 Figure 3.6-27 Logic diagram of distance protection (Mho zone 2) ......................................3-43 Figure 3.6-28 Logic diagram of distance protection (Mho zone 3) ......................................3-44 Figure 3.6-29 Logic diagram of distance protection (Mho zone 4) ......................................3-45 Figure 3.6-30 Logic diagram of distance protection (Mho zone 5) ......................................3-46
3-h
Date: 2012-08-14
3 Operation Theory
Figure 3.6-30 Quadrilateral forward distance element characteristics ...............................3-51 Figure 3.6-31 Zone 4 reverse quadrilateral distance element characteristic ......................3-51 Figure 3.6-32 Logic diagram of enabling distance protection (Quad) .................................3-53 Figure 3.6-33 Logic diagram of distance protection (Quad zone 1) ....................................3-54 Figure 3.6-34 Logic diagram of distance protection (Quad zone 2) ....................................3-55 Figure 3.6-35 Logic diagram of distance protection (Quad zone 3) ....................................3-56 Figure 3.6-36 Logic diagram of distance protection (Quad zone 4) ....................................3-57 Figure 3.6-38 Logic diagram of distance protection (Quad zone 5) ....................................3-58 Figure 3.6-37 Protected zone of pilot distance protection ...................................................3-63 Figure 3.6-38 Pilot reverse weak infeed element ..................................................................3-63 Figure 3.6-39 Logic diagram of pilot distance zone (Quad characteristic) .........................3-64 Figure 3.6-40 Logic diagram of pilot distance zone (Mho characteristic) ...........................3-64 Figure 3.6-41 Logic diagram of power swing detection .......................................................3-66 Figure 3.6-44 Logic diagram of PSBR ....................................................................................3-70 Figure 3.6-43 Logic diagram of enabling distance SOTF protection ...................................3-73 Figure 3.6-44 Logic diagram of distance SOTF protection ..................................................3-74 Figure 3.7-1 Direct optical link up to 2km with 850nm .........................................................3-78 Figure 3.7-2 Direct optical link up to 40km with 1310nm or up to 100km with 1550nm ....3-78 Figure 3.7-3 Connect to a communication network via communication convertor ...........3-78 Figure 3.7-4 Connect to a communication network via MUX-64 ..........................................3-79 Figure 3.7-5 Connect to a communication network via MUX-2M .........................................3-79 Figure 3.7-6 Schematic diagram of communication channel time ......................................3-81 Figure 3.7-7 Logic diagram of receiving signal n .................................................................3-84 Figure 3.8-1 Enabling/disabling logic of pilot distance protection......................................3-85 Figure 3.8-2 Logic diagram of receiving signal.....................................................................3-85 Figure 3.8-3 Zone extension ...................................................................................................3-86 Figure 3.8-4 Simple schematic of PUTT ................................................................................3-87 Figure 3.8-5 Logic diagram of pilot distance protection (PUTT)..........................................3-87 Figure 3.8-6 Simple schematic of POTT ................................................................................3-88 Figure 3.8-7 Logic diagram of pilot distance protection (POTT) .........................................3-88
Date: 2012-08-14
3-i
3 Operation Theory
Figure 3.8-8 Simple schematic of system fault .....................................................................3-89 Figure 3.8-9 Simple schematic of blocking ...........................................................................3-90 Figure 3.8-10 Logic diagram of pilot distance protection (Blocking) ..................................3-90 Figure 3.8-11 Logic diagram of pilot distance protection (Unblocking) ..............................3-91 Figure 3.8-12 Current reversal ................................................................................................3-91 Figure 3.8-13 Logic diagram of current reversal blocking ...................................................3-92 Figure 3.8-14 Line fault description .......................................................................................3-93 Figure 3.8-15 Weak infeed logic during pickup .....................................................................3-93 Figure 3.8-16 Weak infeed logic without pickup ...................................................................3-94 Figure 3.8-17 Simplified CB Echo logic for POTT .................................................................3-94 Figure 3.9-1 Enabling/disabling logic of pilot directional earth-fault protection ...............3-98 Figure 3.9-2 Logic diagram of receiving signal.....................................................................3-98 Figure 3.9-3 Forward/reverse direction of zero-sequence power........................................3-99 Figure 3.9-4 Simple schematic of DEF (permissive scheme) ..............................................3-99 Figure 3.9-5 Logic diagram of DEF (permissive scheme) ..................................................3-100 Figure 3.9-6 Simple schematic of blocking .........................................................................3-101 Figure 3.9-7 Logic diagram of DEF (Blocking scheme) ......................................................3-101 Figure 3.9-8 Logic diagram for unblocking .........................................................................3-102 Figure 3.10-1 Line fault description .....................................................................................3-105 Figure 3.10-2 Vector diagram of current and voltage .........................................................3-106 Figure 3.10-3 Vector diagram of zero-sequence power ......................................................3-108 Figure 3.11-1 Logic diagram of phase overcurrent protection .......................................... 3-114 Figure 3.12-1 Logic diagram of earth fault protection ........................................................3-121 Figure 3.13-1 Logic diagram of overcurrent protection for VT circuit failure...................3-128 Figure 3.14-1 Logic diagram of residual current SOTF protection ....................................3-130 Figure 3.15-1 Logic diagram of stage x of overvoltage protection ....................................3-134 Figure 3.15-2 Blocking logic of undervoltage protection ...................................................3-140 Figure 3.15-3 Logic diagram of stage x of undervoltage protection .................................3-141 Figure 3.16-1 Logic diagram of underfrequency protection ..............................................3-146 Figure 3.16-2 Logic diagram of overfrequency protection.................................................3-147
3-j
Date: 2012-08-14
3 Operation Theory
Figure 3.17-1 Logic diagram of breaker failure protection.................................................3-152 Figure 3.18-1 Characteristic curve of the thermal overload model ...................................3-155 Figure 3.18-2 Logic diagram of thermal overload protection ............................................3-156 Figure 3.19-1 3/2 breakers arrangement ..............................................................................3-157 Figure 3.19-2 Logic diagram of stub overcurrent protection .............................................3-158 Figure 3.20-1 Dead zone protection .....................................................................................3-160 Figure 3.21-1 Pole discrepancy ............................................................................................3-162 Figure 3.21-2 Logic diagram of pole discrepancy protection ............................................3-163 Figure 3.22-1 Logic diagram of broken conductor protection ...........................................3-165 Figure 3.23-1 Relationship between reference voltage and synchronous voltage ..........3-166 Figure 3.23-2 Voltage connection for single busbar arrangement ....................................3-167 Figure 3.23-3 Voltage connection for single busbar arrangement ....................................3-167 Figure 3.23-4 Voltage connection for double busbars arrangement .................................3-168 Figure 3.23-5 Voltage selection for double busbars arrangement ....................................3-168 Figure 3.23-6 Voltage connection for one and a half breakers arrangement....................3-169 Figure 3.23-7 Voltage selection for one and a half breakers arrangement .......................3-170 Figure 3.23-8 Voltage selection for one and a half breakers arrangement .......................3-171 Figure 3.23-9 Synchronism check ........................................................................................3-173 Figure 3.23-10 Dead charge check logic..............................................................................3-174 Figure 3.23-11 Synchrocheck logic ......................................................................................3-174 Figure 3.24-1 Logic diagram of AR ready ............................................................................3-181 Figure 3.24-2 Single-phase tripping initiating AR ...............................................................3-183 Figure 3.24-3 Three-phase tripping initiating AR ................................................................3-183 Figure 3.24-4 1-pole AR initiation .........................................................................................3-184 Figure 3.24-5 3-pole AR initiation .........................................................................................3-184 Figure 3.24-6 One-shot AR ....................................................................................................3-185 Figure 3.24-7 Extra time delay and blocking logic of AR ...................................................3-185 Figure 3.24-8 Reclosing output logic ...................................................................................3-186 Figure 3.24-9 Reclosing failure and success ......................................................................3-187 Figure 3.24-10 Single-phase transient fault.........................................................................3-190
Date: 2012-08-14
3-k
3 Operation Theory
Figure 3.24-11 Single-phase permanent fault ([79.N_Rcls]=2) ...........................................3-191 Figure 3.25-1 Logic diagram of transfer trip........................................................................3-194 Figure 3.26-1 Tripping logic ..................................................................................................3-197 Figure 3.26-2 Blocking AR logic ...........................................................................................3-198 Figure 3.27-1 Logic of VT circuit supervision .....................................................................3-201 Figure 3.27-2 Logic of VT neutral point supervision ..........................................................3-201 Figure 3.28-1 Logic diagram of CT circuit failure ...............................................................3-203 Figure 3.29-1 Logic diagram of closing primary equipment ..............................................3-204 Figure 3.29-2 Logic diagram of open primary equipment ..................................................3-205 Figure 3.30-1 The region of faulty phase selection ............................................................3-210 Figure 3.31-1 Equivalent sequence network .......................................................................3-212
List of Tables
Table 3.1-1 System parameters ................................................................................................3-1 Table 3.2-1 Line parameters ......................................................................................................3-2 Table 3.3-1 I/O signals of CB position supervision .................................................................3-3 Table 3.3-2 Internal settings of CB position supervision .......................................................3-5 Table 3.4-1 I/O signals of fault detector .................................................................................3-10 Table 3.4-2 Settings of fault detector .....................................................................................3-10 Table 3.5-1 I/O signals of auxiliary element ...........................................................................3-13 Table 3.5-2 Settings of auxiliary element ...............................................................................3-18 Table 3.6-1 I/O signals of DPFC distance protection ............................................................3-31 Table 3.6-2 Settings of DPFC distance protection ................................................................3-31 Table 3.6-3 I/O signals of load encroachment .......................................................................3-33 Table 3.6-4 Settings of load encroachment ...........................................................................3-33 Table 3.6-5 I/O signals of distance protection (Mho) ............................................................3-41 Table 3.6-6 Settings of distance protection (Mho) ................................................................3-46 Table 3.6-7 I/O signals of distance protection (Quad) ..........................................................3-52 Table 3.6-8 Settings of distance protection (Quad) ..............................................................3-58 Table 3.6-9 Settings of pilot distance zone ............................................................................3-65
3-l
Date: 2012-08-14
3 Operation Theory
Table 3.6-10 I/O signals of power swing detection ...............................................................3-65 Table 3.6-11 Settings of power swing detection ...................................................................3-66 Table 3.6-12 I/O signals of PSBR ............................................................................................3-69 Table 3.6-13 Settings of PSBR ................................................................................................3-70 Table 3.6-14 I/O signals of distance SOTF protection ..........................................................3-72 Table 3.6-15 Settings of distance SOTF protection ..............................................................3-75 Table 3.6-16 Internal settings of distance SOTF protection .................................................3-77 Table 3.7-1 I/O signals of pilot channel ..................................................................................3-82 Table 3.7-2 Settings of pilot channel ......................................................................................3-84 Table 3.8-1 I/O signals of pilot distance protection ..............................................................3-95 Table 3.8-2 Settings of pilot distance protection ..................................................................3-96 Table 3.8-3 Internal settings of pilot distance protection .....................................................3-97 Table 3.9-1 I/O signals of pilot directional earth-fault protection ......................................3-103 Table 3.9-2 Settings of pilot directional earth-fault protection ..........................................3-104 Table 3.9-3 Internal settings of pilot distance protection ...................................................3-104 Table 3.10-1 Direction description .......................................................................................3-107 Table 3.10-2 I/O signals of current direction .......................................................................3-109 Table 3.10-3 Settings of current direction ........................................................................... 3-110 Table 3.11-1 Inverse-time curve parameters ........................................................................ 3-112 Table 3.11-2 I/O signals of phase overcurrent protection .................................................. 3-113 Table 3.11-3 Settings of phase overcurrent protection ...................................................... 3-114 Table 3.12-1 Inverse-time curve parameters........................................................................3-120 Table 3.12-2 I/O signals of earth fault protection ................................................................3-121 Table 3.12-3 Settings of earth fault protection ....................................................................3-122 Table 3.13-1 I/O signals of overcurrent protection for VT circuit failure ...........................3-127 Table 3.13-2 Settings of overcurrent protection for VT circuit failure ...............................3-128 Table 3.14-1 I/O signals of residual SOTF protection .........................................................3-129 Table 3.14-2 Settings of residual current SOTF protection ................................................3-130 Table 3.15-1 Inverse-time curve parameters........................................................................3-132 Table 3.15-2 I/O signals of overvoltage protection .............................................................3-133
Date: 2012-08-14
3-m
3 Operation Theory
Table 3.15-3 Settings of overvoltage protection .................................................................3-135 Table 3.15-4 Inverse-time curve parameters of phase undervoltage protection ..............3-138 Table 3.15-5 I/O signals of undervoltage protection ...........................................................3-139 Table 3.15-6 Settings of undervoltage protection ...............................................................3-141 Table 3.16-1 I/O signals of underfrequency protection ......................................................3-144 Table 3.16-2 I/O signals of overfrequency protection .........................................................3-145 Table 3.16-3 Settings of frequency protection ....................................................................3-147 Table 3.17-1 I/O signals of breaker failure protection .........................................................3-151 Table 3.17-2 Settings of breaker failure protection .............................................................3-153 Table 3.18-1 I/O signals of thermal overload protection.....................................................3-155 Table 3.18-2 Settings of thermal overload protection.........................................................3-156 Table 3.19-1 I/O signals of stub overcurrent protection .....................................................3-158 Table 3.19-2 Settings of stub overcurrent protection .........................................................3-159 Table 3.20-1 I/O signals of dead zone protection ................................................................3-160 Table 3.20-2 Settings of dead zone protection ....................................................................3-160 Table 3.21-1 I/O signals of pole discrepancy protection ....................................................3-161 Table 3.21-2 Settings of pole discrepancy protection ........................................................3-163 Table 3.22-1 I/O signals of broken conductor protection ...................................................3-164 Table 3.22-2 Settings of broken conductor protection .......................................................3-165 Table 3.23-1 I/O signals of synchrocheck ............................................................................3-172 Table 3.23-2 Settings of synchrocheck ................................................................................3-174 Table 3.24-1 I/O signals of auto-reclosing ...........................................................................3-178 Table 3.24-2 Reclosing number ............................................................................................3-188 Table 3.24-3 Settings of auto-reclosing ...............................................................................3-191 Table 3.25-1 I/O signals of transfer trip ................................................................................3-194 Table 3.25-2 Settings of Transfer trip ...................................................................................3-195 Table 3.26-1 I/O signals of trip logic .....................................................................................3-195 Table 3.26-2 Settings of trip logic .........................................................................................3-199 Table 3.27-1 I/O signals of VT circuit supervision ..............................................................3-200 Table 3.27-2 VTS Settings .....................................................................................................3-201
3-n
Date: 2012-08-14
3 Operation Theory
Table 3.28-1 I/O signals of CT circuit supervision ..............................................................3-202 Table 3.29-1 I/O signals of control ........................................................................................3-206 Table 3.29-2 Control Settings ...............................................................................................3-207 Table 3.29-3 Synchrocheck Settings ....................................................................................3-208 Table 3.30-1 Relation between UOMAX and faulty phase .............................................3-210 Table 3.30-2 I/O signals of faulty phase selection .............................................................. 3-211 Table 3.31-1 I/O signals of fault location..............................................................................3-214

Date: 2012-08-14
3-o
3 Operation Theory
3-p
Date: 2012-08-14
3 Operation Theory
3.1 System Parameters

3.1.1 General Application
The device performs various protection functions by respective algorithms with the information (currents and voltages) acquired from primary system through current transformer and voltage transformer, so it is important to configure analog input channels correctly. Further to correct configuration of analog input channels, other protected system information, such as the parameters of voltage transformer and current transformer are also required.
3.1.2 Function Description

The device generally considers transmission line as its protected object, current flows from busbar to line is considered as the forward direction.
3.1.3 Settings
Table 3.1-1 System parameters No. 1 2 3 4 5 6 7 Name Active_Grp Opt_SysFreq PrimaryEquip_ID U1n I1n U2n I2n 33~65500 100~65500 80~220 1 or 5 1 1 1 kV A V A Range 1~10 50 or 60 Step 1 Hz Unit Remark Active setting group System frequency ID of primary equipment Primary rated value of VT (phase to phase) Primary rated value of CT Secondary rated value of VT (phase to phase) Secondary rated value of CT
3.2 Line Parameters

When the device equips with line protection functions, line parameters of protected line are required, especially for fault location, precise line parameters are the basic criterion for accurate fault location.

Line parameters mainly include positive-sequence reactance, positive-sequence resistance, zero-sequence reactance, zero-sequence resistance, mutual zero-sequence reactance, mutual zero-sequence resistance and line length. The positive-sequence reactance, zero-sequence reactance, positive-sequence resistance and zero-sequence resistance are the reactance and resistance value of the whole line. In general, the device locates the fault through calculating the impedance value from the location of the device to fault point.

Date: 2012-08-14
3-1
3 Operation Theory
3.2.3 Settings
Table 3.2-1 Line parameters No. 1 2 3 4 5 6 7 8 9 10 X1L R1L X0L R0L X0M R0M LineLength phi1_Reach phi0_Reach Real_K0 Name Range (0.000~4Unn)/In (0.000~4Unn)/In (0.000~4Unn)/In (0.000~4Unn)/In (0.000~4Unn)/In (0.000~4Unn)/In 0.00~655.35 30.00~89.00 30.00~89.00 -4.000~4.000 Step 0.001 0.001 0.001 0.010 0.001 0.01 0.01 0.01 0.01 0.001 Unit ohm ohm ohm ohm ohm ohm km Deg Deg Remark Positive-sequence reactance of the whole line (secondary value) Positive-sequence resistance of the whole line (secondary value) Zero-sequence reactance of the whole line (secondary value) Zero-sequence resistance of the whole line (secondary value) Zero-sequence mutual reactance (secondary value) Zero-sequence mutual resistance of the whole line (secondary value) Total length of the whole line Phase angle of line positive-sequence impedance Phase angle of line zero-sequence impedance Real component of zero-sequence compensation coefficient Imaginary component of zero-sequence compensation coefficient
11
Imag_K0
-4.000~4.000
0.001
3.3 Circuit Breaker Position Supervision

The status of circuit breaker (CB) position is applied for protection and control functions in this device, such as, SOTF protection, auto-reclose and VT circuit supervision, etc. The status of CB position can be applied as input signals for other features configured by user.

The signal reflecting CB position is acquired via opto-coupler with settable delay pickup and dropoff, and forms digital signal used by protection functions. CB position can reflect the status of each phase by means of phase-segregated inputs. In order to prevent that wrong status of CB position is input into the device via binary input, appropriate monitor method is used to check the rationality of the binary input. When the binary input of CB open position is detected, the status of CB position will be thought as incorrect and an alarm [Alm_52b] will be issued if there is current detected in the line. Together with the status of circuit breaker and the information of external circuit, this function can be used to supervise control circuit of circuit breaker.
3-2
Date: 2012-08-14
3 Operation Theory
3.3.3 Function Block Diagram

1. For phase-segregated circuit breaker
CB Position Supervision 52b_PhA 52b_PhB 52b_PhC Alm_52b
2.
For non-phase segregated circuit breaker

CB Position Supervision 52b Alm_52b
3.
Trip&closing circuit supervision (TCCS)

TCCS 52a 52b TCCS.Input TCCS.Alm
TCCS will be disabled automatically when it is used for phase-segregated circuit breaker.
3.3.4 I/O Signals

Table 3.3-1 I/O signals of CB position supervision No. 1 2 3 4 5 6 Input Signal I3P 52b_PhA 52b_PhB 52b_PhC 52b 52a Three-phase current input Normally closed contact of A-phase of circuit breaker Normally closed contact of B-phase of circuit breaker Normally closed contact of C-phase of circuit breaker Normally closed contact of three-phase of circuit breaker Normally open contact of three-phase of circuit breaker Description

Date: 2012-08-14
3-3
3 Operation Theory
Control circuit failure (normally closed contact and normally open contact of 7 TCCS.Input three-phase circuit breaker are all de-energized due to DC power loss of control circuit) No. 1 2 Output Signal Alm_52b TCCS.Alm CB position is abnormal Control circuit of circuit breaker is abnormal Description
3.3.5 Logic
BI
52b_PhA
& >=1
52b_A_CB
BI
52b_PhB
& >=1
52b_B_CB
BI
52b_PhC
& >=1
52b_C_CB
EN
[En_3PhCB] 52b 52b_A_CB
&
BI
SIG
& &
SIG
52b_B_CB
& >=1
&
SIG
52b_C_CB
&
& >=1
SIG
&
10s 10s Alm_52b
Ia>I_Line
&
SIG
Ib>I_Line
&
SIG
Ic>I_Line
Figure 3.3-1 Logic diagram of CB position supervision
3-4
Date: 2012-08-14
3 Operation Theory
BI
[52a] [52b]
>=1 >=1
[TCCS.t_DPU] [TCCS.t_DDO] TCCS.Alm
BI
BI
[TCCS.Input]
Figure 3.3-2 Logic diagram of trip&closing circuit supervision
Where: 1. 2. 3. TCCS.t_DPU is pickup delay time of control circuit failure alarm. Default value is 500ms. TCCS.t_DDO is dropoff delay time of control circuit failure alarm. Default value is 500ms. I_Line is threshold value used to determine whether line is on-load or no-load. Default value 0.06In.
3.3.6 Settings
Table 3.3-2 Internal settings of CB position supervision No. 1 2 Name TCCS.t_DPU TCCS.t_DDO Default Value 0.5 0.5 Unit s s Remark Pickup delay time of control circuit failure alarm Dropoff delay time of control circuit failure alarm This setting is used to determine whether CB position is determined by phase-segregated auxiliary contact or three-phase auxiliary contact 0: phase-segregated contact ([52b_PhA], [52b_PhB], [52b_PhC]) 1: three-phase contact ([52b])
En_3PhCB
3.4 Fault Detector (FD)

3.4.1 Application
The device has one DSP module with fault detector DSP and protection DSP for fault detector and protection calculation respectively. Protection DSP with protection fault detector element is responsible for calculation of protection elements, and fault detector DSP is responsible to determine fault appearance on the protected power system. Fault detector in fault detector DSP picks up to provide positive supply to output relays. The output relays can only operate when both the fault detector in fault detector DSP and a protection element operate simultaneously. Otherwise, the output relays would not operate. An alarm message will be issued with blocking outputs if a protection element operates while the fault detector does not operate.
3.4.2 Fault Detector in Fault Detector DSP

Main part of FD is DPFC current detector element that detects the change of phase-to-phase power frequency current, and residual current fault detector element that calculates the vector sum of 3 phase currents as supplementary. They are continuously calculating the analog input signals.
Date: 2012-08-14
3-5
3 Operation Theory
The FD pickup condition in this device includes: 1. 2. 3. Pickup condition 1: DPFC current is greater than the setting value Pickup condition 2: Residual current is greater than the setting value Pickup condition 3: Phase voltage or phase-to-phase voltage is greater than the voltage setting of overvoltage protection Pickup condition 4: Circuit breaker position discrepancy
4.
Pickup condition 3 and 4 are only available when respective protection elements are enabled. If any of the above conditions is complied, the FD will operate to activate the output circuit providing DC power supply to the output relays. DPFC current fault detector element (pickup condition 1) and residual current fault detector element (pickup condition 2) are always enabled, and all protection functions are permitted to operate when they operate. 3.4.2.1 Fault Detector Based on DPFC Current (pickup condition 1) DPFC phase-to-phase current is obtained by subtracting the phase-to-phase current from that of a cycle before.
I(k) is the sampling value at a point. I(k-24) is the value of a sampling point before a cycle, 24 is the sampling points in one cycle.
200 100 0 -100 -200
20
40
60 Original Current
80
100
120
100 50 0 -50 -100
20
40
60 DPFC current
80
100
120
From above figures, it is concluded that DPFC can reflect the sudden change of current at the initial stage of a fault and has a perfect performance of fault detection. It is used to determine whether this pickup condition is met according to Equation 3.4-1.
3-6
Date: 2012-08-14
3 Operation Theory
For multi-phase short-circuit fault, the DPFC phase-to-phase current has high sensitivity to ensure the pickup of protection device. For usual single phase to earth fault, it also has sufficient sensitivity to pick up except the earth fault with very large fault resistance. Under this condition the DPFC current is relative small, however, residual current is also used to judge pickup condition (pickup condition 2). This element adopts adaptive floating threshold varied with the change of load current continuously. The change of load current is small and steadily under normal or power swing condition, the adaptive floating threshold with the ISet is higher than the change of current under these conditions and hence maintains the element stability. The criterion is: IMAX>1.25ITh+ISet Where: IMAX: The maximum half-wave integration value of phase-to-phase current (=AB, BC, CA) ISet: The fixed threshold value (i.e. the setting [FD.DPFC.I_Set]) ITh: The floating threshold value The coefficient, 1.25, is an empirical value which ensures the threshold always higher than the unbalance output value of the system. If operating condition is met, DPFC current element will pickup and trigger FD to provide DC power supply for output relays, the FD operation signal will maintain 7 seconds after DPFC current element drops off. 3.4.2.2 Fault Detector Based on Residual Current (pickup condition 2) This pickup condition will be met when 3I0 is greater than the setting [FD.ROC.3I0_Set]. Where: 3I0: residual current calculates from the vector sum of Ia, Ib and Ic When residual current FD element operates and lasts for longer than 10 seconds, an alarm [Alm_PersistI0] will be issued. If operating condition is met, the residual current FD element will pickup and trigger FD to provide DC power supply for output relay, and pickup signal will be kept for 7 seconds after the residual current FD element drops off. 3.4.2.3 Fault Detector Based on Overvoltage (pickup condition 3) Overvoltage fault detector will be automatically effective when overvoltage protection is enabled. If the logic setting [59Px.Opt_1P/3P] is set as 1 (x=1 or 2), i.e. the protective device adopts 1-out-of-3 mode, when any phase voltage is greater than the setting [59Px.U_Set] (x=1 or 2), the overvoltage fault detector element will pickup and trigger FD to provide DC power supply for output relays, the FD operation signal will maintain 7 seconds after overvoltage fault detector
Equation 3.4-1

Date: 2012-08-14
3-7
3 Operation Theory
element drops off. If the logic setting [59Px.Opt_1P/3P] is set as 0 (x=1 or 2), i.e. the protective device adopts 3-out-of-3 mode, when all three phase voltages are greater than the setting [59Px.U_Set] (x=1 or 2), the overvoltage fault detector element will pickup and trigger FD to provide DC power supply for output relays, the FD operation signal will maintain 7 seconds after overvoltage fault detector element drops off. 3.4.2.4 Fault Detector Based on Circuit Breaker Position Discrepancy (pickup condition 4) When pole discrepancy protection is enabled, i.e. the logic setting [62PD.En] is set as 1, and if three phases of circuit breaker are not in the same status, pole discrepancy FD element will operate to provide DC power supply for output relays, and pickup signal will maintain 7 seconds after pole discrepancy FD element drops out.
3.4.3 Protection Fault Detector in Protection Calculation DSP

The protection device is running either of the two programs: one is Regular program for normal state, and the other is Fault calculation program after protection fault detector picks up. Under the normal state, the protection device will perform the following tasks: 1. 2. 3. 4. 5. 6. Calculate analog quantity Read binary input Hardware self-check Circuit breaker position supervision Analog quantity input supervision Channel supervision
Once the protection fault detector element in protection calculation DSP picks up, the protection device will switch to fault calculation program, for example the calculation of distance protection, and to determine logic. If the fault is within the protected zone, the protection device will send tripping command. The protection program flow chart is shown as Figure 3.4-1.
3-8
Date: 2012-08-14
3 Operation Theory
Main program
Sampling program
No
Pickup?
Yes
Regular program
Fault calculation program
Figure 3.4-1 Flow chart of protection program
The protection FD pickup conditions are the same as the FD in fault detector DSP as shown below. The operation criteria for the conditions are also the same as that in fault detector DSP. Please refer to section 3.4.2 for details. 1. 2. 3. 4. Pickup condition 1: DPFC current is greater than the setting value Pickup condition 2: Residual current is greater than the setting value Pickup condition 3: Phase voltage or phase-to-phase voltage is greater than the setting value Pickup condition 4: Circuit breaker position discrepancy
When any pickup condition mentioned above is met, the protection device will go to fault calculation state. Pickup condition 3 and 4 are not common fault detector elements, only used for respective protection element. Please refer to section 3.15.1 and section 3.20 for details.

FD FD.Pkp FD.DPFC.Pkp FD.ROC.Pkp

Date: 2012-08-14
3-9
3 Operation Theory
3.4.5 I/O Signals

Table 3.4-1 I/O signals of fault detector No. 1 2 No. 1 2 3 Input Signal I3P U3P Output Signal FD.Pkp FD.DPFC.Pkp FD.ROC.Pkp The device picks up DPFC current fault detector element operates. Residual current fault detector element operates. Three-phase current input Three-phase voltage input Description Description
3.4.6 Logic
SIG SIG SIG
Ia Ib Ic
Calculate DPFC phase-tophase current: Iab=(Ia-Ib) Ibc=(Ib-Ic) Ica=(Ic-Ia)
Iab>[FD.DPFC.I_Set] Ibc>[FD.DPFC.I_Set] Ica>[FD.DPFC.I_Set]
>=1
FD.DPFC.Pkp
>=1
0s 7s FD.Pkp
Calculate residual current: 3I0=Ia+Ib+Ic
3I0>[FD.ROC.3I0_Set]
FD.ROC.Pkp
Figure 3.4-2 Logic diagram of fault detector
3.4.7 Settings
Table 3.4-2 Settings of fault detector No. 1 Name FD.DPFC.I_Set Range (0.050~30.000)In Step 0.001 Unit A Remark Current setting of DPFC current fault detector element Current setting of residual current fault detector element
FD.ROC.3I0_Set
(0.050~30.000)In
0.001
3.5 Auxiliary Element

Auxiliary element (AuxE) is mainly used to program logics to meet users applications or further improve operating reliability of protection elements. Reliability of protective elements (such as distance element or current differential element) is assured, auxiliary element is usually not required to configure. Auxiliary elements including current change auxiliary element (AuxE.OCD), residual current auxiliary element (AuxE.ROC), phase current auxiliary element (AuxE.OC), voltage change auxiliary element (AuxE.UVD), phase under voltage auxiliary element (AuxE.UVG), phase-to-phase under voltage auxiliary element (AuxE.UVS) and residual voltage auxiliary element (AuxE.ROV), and they can be enabled or disabled by corresponding logic setting or binary inputs. Users can configure them according to applications via PCS-Explorer software.
3-10
Date: 2012-08-14
3 Operation Theory

1. Current change auxiliary element AuxE.OCD
It shares DPFC current element of DPFC fault detector. If DPFC fault detector operates (FD.DPFC.Pkp=1) and current change auxiliary element is enabled, current change auxiliary element operates. 2. Residual current auxiliary element AuxE.ROC
There are 3 stages for residual current auxiliary element (AuxE.ROC1, AuxE.ROC2 and AuxE.ROC3). Each residual current auxiliary element will operate instantly if calculated residual current amplitude is larger than corresponding current setting The criteria are: AuxE.ROC1: 3I0>[AuxE.ROC1.3I0_Set] AuxE.ROC2: 3I0>[AuxE.ROC2.3I0_Set] AuxE.ROC3: 3I0>[AuxE.ROC3.3I0_Set] Where: 3I0: The calculated residual current 3. Phase current auxiliary element AuxE.OC
There are 3 stages for phase current auxiliary element (AuxE.OC1, AuxE.OC2 and AuxE.OC3). Each phase current auxiliary element will operate instantly if phase current amplitude is larger than corresponding current setting. The criteria are: AuxE.OC1: IMAX>[AuxE.OC1.I_Set] AuxE.OC2: IMAX>[AuxE.OC2.I_Set] AuxE.OC3: IMAX>[AuxE.OC3.I_Set] Where: IMAX: The maximum phase current among three phases 4. Voltage change auxiliary element AuxE.UVD
AuxE.UVD detects phase-to-ground voltage change and adopts floating threshold. Under normal conditions or power swing conditions, voltage change is very small, so it has a high reliability and does not operate under these conditions. The criterion is: UMAX>1.25UTh+[AuxE.UVD.U_Set] Where:

Date: 2012-08-14
3-11
3 Operation Theory
UMAX: The maximum phase-to-ground voltage change among three phases UTh: The floating threshold The coefficient, 1.25, is an empirical value which ensures no operation under normal conditions or power swing conditions. 5. Phase under voltage auxiliary element AuxE.UVG
AuxE.UVG will operate instantly if any phase-to-ground voltage is lower than corresponding voltage setting. The criterion is: UMIN<[ AuxE.UVG.U_Set] Where: UMIN: The minimum value among three phase-to-ground voltages 6. Phase-to-phase under voltage auxiliary element AuxE.UVS
AuxE.UVS will operate instantly if any phase-to-phase voltage is lower than corresponding voltage setting. The criterion is: UMIN<[ AuxE.UVS.U_Set] Where: UMIN: The minimum value among three phase-to-phase voltages 7. Residual voltage auxiliary element AuxE.ROV
AuxE.ROV will operate instantly if calculated residual voltage is larger than corresponding voltage setting. The criterion is: 3U0>[ AuxE.ROV.3U0_Set] Where: 3U0: The calculated residual voltage
3-12
Date: 2012-08-14
3 Operation Theory

AuxE AuxE.OCD.En AuxE.OCD.Blk AuxE.ROC1.En AuxE.ROC1.Blk AuxE.ROC2.En AuxE.ROC2.Blk AuxE.ROC3.En AuxE.ROC3.Blk AuxE.OC1.En AuxE.OC1.Blk AuxE.OC2.En AuxE.OC2.Blk AuxE.OC3.En AuxE.OC3.Blk AuxE.UVD.En AuxE.UVD.Blk AuxE.UVG.En AuxE.UVG.Blk AuxE.UVS.En AuxE.UVS.Blk AuxE.ROV.En AuxE.ROV.Blk AuxE.St AuxE.OCD.St AuxE.OCD.St_Ext AuxE.OCD.On AuxE.ROC1.St AuxE.ROC1.On AuxE.ROC2.St AuxE.ROC2.On AuxE.ROC3.St AuxE.ROC3.On AuxE.OC1.St AuxE.OC1.On AuxE.OC2.St AuxE.OC2.On AuxE.OC3.St AuxE.OC3.On AuxE.UVD.St AuxE.UVD.St_Ext AuxE.UVD.On AuxE.UVG.St AuxE.UVG.On AuxE.UVS.St AuxE.UVS.On AuxE.ROV.St AuxE.ROV.On
3.5.4 I/O Signals

Table 3.5-1 I/O signals of auxiliary element No. 1 Input Signal AuxE.OCD.En Description Current change auxiliary element enabling input, it is triggered from binary input or 3-13
Date: 2012-08-14
3 Operation Theory
programmable logic etc. 2 AuxE.OCD.Blk Current change auxiliary element blocking input, it is triggered from binary input or programmable logic etc. Stage 1 of residual current auxiliary element enabling input, it is triggered from binary input or programmable logic etc. Stage 1 of residual current auxiliary element blocking input, it is triggered from binary input or programmable logic etc. Stage 2 of residual current auxiliary element enabling input, it is triggered from binary input or programmable logic etc. Stage 2 of residual current auxiliary element blocking input, it is triggered from binary input or programmable logic etc. Stage 3 of residual current auxiliary element enabling input, it is triggered from binary input or programmable logic etc. Stage 3 of residual current auxiliary element blocking input, it is triggered from binary input or programmable logic etc. Stage 1 of phase current auxiliary element enabling input, it is triggered from binary input or programmable logic etc. Stage 1 of phase current auxiliary element blocking input, it is triggered from binary input or programmable logic etc. Stage 2 of phase current auxiliary element enabling input, it is triggered from binary input or programmable logic etc. Stage 2 of phase current auxiliary element blocking input, it is triggered from binary input or programmable logic etc. Stage 3 of phase current auxiliary element enabling input, it is triggered from binary input or programmable logic etc. Stage 3 of phase current auxiliary element blocking input, it is triggered from binary input or programmable logic etc. Voltage change auxiliary element enabling input, it is triggered from binary input or programmable logic etc. Voltage change auxiliary element blocking input, it is triggered from binary input or programmable logic etc. Phase-to-ground under voltage auxiliary element enabling input, it is triggered from binary input or programmable logic etc. Phase-to-ground under voltage auxiliary element blocking input, it is triggered from binary input or programmable logic etc. Phase-to-phase under voltage auxiliary element enabling input, it is triggered from binary input or programmable logic etc. Phase-to-phase under voltage auxiliary element blocking input, it is triggered from binary input or programmable logic etc. Residual voltage auxiliary element enabling input, it is triggered from binary input or programmable logic etc. Residual voltage auxiliary element blocking input, it is triggered from binary input or programmable logic etc.
AuxE.ROC1.En
AuxE.ROC1.Blk
AuxE.ROC2.En
AuxE.ROC2.Blk
AuxE.ROC3.En
AuxE.ROC3.Blk
AuxE.OC1.En
10
AuxE.OC1.Blk
11
AuxE.OC2.En
12
AuxE.OC2.Blk
13
AuxE.OC3.En
14
AuxE.OC3.Blk
15
AuxE.UVD.En
16
AuxE.UVD.Blk
17
AuxE.UVG.En
18
AuxE.UVG.Blk
19
AuxE.UVS.En
20
AuxE.UVS.Blk
21
AuxE.ROV.En
22
AuxE.ROV.Blk
3-14
Date: 2012-08-14
3 Operation Theory
23 24 No. 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 I3P U3P Output Signal AuxE.St AuxE.OCD.St AuxE.OCD.St_Ext AuxE.OCD.On AuxE.ROC1.St AuxE.ROC1.On AuxE.ROC2.St AuxE.ROC2.On AuxE.ROC3.St AuxE.ROC3.On AuxE.OC1.St AuxE.OC1.On AuxE.OC2.St AuxE.OC2.On AuxE.OC3.St AuxE.OC3.On AuxE.UVD.St AuxE.UVD.St_Ext AuxE.UVD.On AuxE.UVG.St AuxE.UVG.On AuxE.UVS.St AuxE.UVS.On AuxE.ROV.St AuxE.ROV.On Three-phase current input Three-phase voltage input Description Any auxiliary element of the device operates Current change auxiliary element operates. Current change auxiliary element operates (7s delayed drop off). Current change auxiliary element is enabled Stage 1 of residual current auxiliary element operates. Stage 1 of residual current auxiliary element is enabled Stage 2 of residual current auxiliary element operates. Stage 2 of residual current auxiliary element is enabled Stage 3 of residual current auxiliary element operates. Stage 3 of residual current auxiliary element is enabled Stage 1 of phase current auxiliary element operates. Stage 1 of phase current auxiliary element is enabled Stage 2 of phase current auxiliary element operates. Stage 2 of phase current auxiliary element is enabled Stage 3 of phase current auxiliary element operates. Stage 3 of phase current auxiliary element is enabled Voltage change auxiliary element operates. Voltage change auxiliary element operates (7s delayed drop off). Voltage change auxiliary element is enabled Phase-to-ground under voltage auxiliary element operates. Phase-to-ground under voltage auxiliary element is enabled Phase-to-phase under voltage auxiliary element operates. Phase-to-phase under voltage auxiliary element is enabled Residual voltage auxiliary element operates. Residual voltage auxiliary element is enabled
3.5.5 Logic
SIG
FD.DPFC.Pkp AuxE.OCD.En AuxE.OCD.Blk AuxE.OCD.En
AuxE.OCD.St
SIG
& &
0s [AuxE.OCD.t_Ext]
AuxE.OCD.On AuxE.OCD.St_Ext
SIG
En

Date: 2012-08-14
3-15
3 Operation Theory
SIG
Ia Ib Ic AuxE.ROC1.En 3I0>[AuxE.ROC1.3I0_Set] Calculate residual current: 3I0=Ia+Ib+Ic
SIG
SIG
SIG
&
AuxE.ROC1.St
&
SIG
AuxE.ROC1.Blk AuxE.ROC1.On AuxE.ROC1.En AuxE.ROC2.En 3I0>[AuxE.ROC2.3I0_Set]
En
SIG
&
AuxE.ROC2.St
&
SIG
AuxE.ROC2.Blk AuxE.ROC2.On AuxE.ROC2.En AuxE.ROC3.En 3I0>[AuxE.ROC3.3I0_Set]
En
SIG
&
AuxE.ROC3.St
&
SIG
AuxE.ROC3.Blk AuxE.ROC3.On AuxE.ROC3.En
En
SIG
Ia Ib Ic AuxE.OC1.En
Ia>[AuxE.OC1.I_Set] Ib>[AuxE.OC1.I_Set] Ic>[AuxE.OC1.I_Set]
>=1
SIG
SIG
SIG
& &
AuxE.OC1.St
SIG
AuxE.OC1.Blk AuxE.OC1.On AuxE.OC1.En
En
SIG
>=1
SIG
SIG
SIG
& &
AuxE.OC2.St
SIG
En
SIG
>=1
SIG
SIG
SIG
& &
AuxE.OC3.St
SIG
En
3-16
Date: 2012-08-14
3 Operation Theory
SIG
Ua Ub Uc
SIG
SIG
Calculate DPFC phase voltage Ua=(Ua-Ufa) Ub=(Ub-Ufb) Uc=(Uc-Ufc)
Ua>[AuxE.UVD.U_Set] Ub>[AuxE.UVD.U_Set] Uc>[AuxE.UVD.U_Set]
>=1 &
AuxE.UVD.St 0s [AuxE.UVD.t_Ext]
SIG
AuxE.UVD.En
AuxE.UVD.St_Ext
&
SIG
AuxE.UVD.Blk AuxE.UVD.En
AuxE.UVD.On
En
SET
UA<[AuxE.UVG.U_Set] >=1 UB<[AuxE.UVG.U_Set] UC<[AuxE.UVG.U_Set] AuxE.UVG.En
SET
&
AuxE.UVG.St
SET
SIG
&
SIG
AuxE.UVG.Blk AuxE.UVG.En
UAB<[AuxE.UVS.U_Set] >=1 UBC<[AuxE.UVS.U_Set] UCA<[AuxE.UVS.U_Set] AuxE.UVS.En
AuxE.UVG.On
En
SET SET SET

SIG
&
AuxE.UVS.St
&
SIG
AuxE.UVS.Blk AuxE.UVS.En
Ua Ub Uc AuxE.ROV.En Calculate residual voltage 3U0=Ua+Ub+Uc 3U0>[AuxE.ROV.3U0_Set]
AuxE.UVS.On
En
SIG
&
AuxE.ROV.St
SIG
SIG
SIG
&
SIG
AuxE.ROV.Blk AuxE.ROV.En
AuxE.ROV.On
En
SIG SIG SIG SIG SIG SIG SIG SIG
AuxE.OCD.St_Ext AuxE.ROC1.St >=1 AuxE.ROC2.St AuxE.ROC3.St AuxE.OC1.St >=1 AuxE.OC2.St AuxE.OC3.St AuxE.UVD.St_Ext >=1 >=1 >=1 AuxE.St
SIG SIG
AuxE.UVG.St AuxE.UVS.St >=1
SIG
AuxE.ROV.St
Figure 3.5-1 Logic diagram of auxiliary element

Date: 2012-08-14
3-17
3 Operation Theory
3.5.6 Settings
Table 3.5-2 Settings of auxiliary element No. 1 Name AuxE.OCD.t_Ext Range 0.000~10.000 Step 0.001 Unit s Remark Extended time delay of current change auxiliary element Enabling/disabling current change 2 AuxE.OCD.En 0 or 1 auxiliary element 0: disable 1: enable 3 AuxE.ROC1.3I0_Set (0.050~30.000)In 0.001 A Current setting of stage 1 residual current auxiliary element Enabling/disabling stage 1 residual 4 AuxE.ROC1.En 0 or 1 current auxiliary element 0: disable 1: enable 5 AuxE.ROC2.3I0_Set (0.050~30.000)In 0.001 A Current setting of stage 2 residual current auxiliary element Enabling/disabling stage 2 residual 6 AuxE.ROC2.En 0 or 1 current auxiliary element 0: disable 1: enable 7 AuxE.ROC3.3I0_Set (0.050~30.000)In 0.001 A Current setting of stage 3 residual current auxiliary element Enabling/disabling stage 3 residual 8 AuxE.ROC3.En 0 or 1 current auxiliary element 0: disable 1: enable 9 AuxE.OC1.I_Set (0.050~30.000)In Current setting of stage 1 phase current auxiliary element Enabling/disabling stage 1 phase 10 AuxE.OC1.En 0 or 1 current auxiliary element 0: disable 1: enable 11 AuxE.OC2.I_Set (0.050~30.000)In Current setting of stage 2 phase current auxiliary element Enabling/disabling stage 2 phase 12 AuxE.OC2.En 0 or 1 current auxiliary element 0: disable 1: enable 13 AuxE.OC3.I_Set (0.050~30.000)In Current setting of stage 3 phase current auxiliary element Enabling/disabling stage 3 phase current auxiliary element PCS-902 Line Distance Relay
Date: 2012-08-14
14
AuxE.OC3.En
0 or 1
3-18
3 Operation Theory
0: disable 1: enable 15 AuxE.UVD.U_Set 0~Un 0.001 V Voltage setting for voltage change auxiliary element Extended time delay of voltage change auxiliary element Enabling/disabling voltage change 17 AuxE.UVD.En 0 or 1 auxiliary element 0: disable 1: enable 18 AuxE.UVG.U_Set 0~Un 0.001 V Voltage setting for phase-to-ground under voltage auxiliary element Enabling/disabling phase-to-ground 19 AuxE.UVG.En 0 or 1 under voltage auxiliary element 0: disable 1: enable 20 AuxE.UVS.U_Set 0~Unn 0.001 V Voltage setting for phase-to-phase under voltage auxiliary element Enabling/disabling phase-to-phase 21 AuxE.UVS.En 0 or 1 under voltage auxiliary element 0: disable 1: enable 22 AuxE.ROV.3U0_Set 0~Un 0.001 V Voltage setting for residual voltage auxiliary element Enabling/disabling residual voltage 23 AuxE.ROV.En 0 or 1 auxiliary element 0: disable 1: enable
16
AuxE.UVD.t_Ext
0.000~10.000
0.001
3.6 Distance Protection

When a fault happens on a power system, distance protection will trip circuit breaker to isolate the fault from power system with its specific time delay if the fault is within the protected zone of distance protection.

The device comprises 3 forward zones, 1 reverse zone, 1 settable forward or reverse zone and 1 pilot zone. For each independent distance element zone, full scheme design provides continuous measurement of impedance separately in three independent phase-to-phase measuring loops as well as in three independent phase-to-ground measuring loops. Selection of zone characteristic between mho and quadrilateral is available. Distance protection includes: 1. DPFC distance protection
3-19
Date: 2012-08-14
3 Operation Theory
It is independent fast protection providing extremely fast speed to clear close up fault especially on long line and thus improves system stability. 2. Mho phase-to-phase distance protection Zone1~3: forward direction Zone 4: reverse direction including origin Zone5: settable forward or reverse direction 3. Mho phase-to-ground distance protection Zone1~3: forward direction Zone 4: reverse direction including origin Zone5: settable forward or reverse direction 4. Quadrilateral phase-to-phase distance protection Zone1~3: forward direction Zone 4: reverse direction Zone5: settable forward or reverse direction 5. Quadrilateral phase-to-ground distance protection Zone1~3: forward direction Zone 4: reverse direction Zone5: settable forward or reverse direction 6. Pilot distance protection The pilot zone is for PUTT, POTT and blocking scheme. The forward direction element is for sending signal for POTT and tripping upon receiving permissive signal for both PUTT and POTT scheme. The forward direction element for blocking scheme is used to stop sending blocking signal. The reverse direction element is only for POTT scheme with weak infeed condition. 7. Load encroachment It is used to prevent all distance elements from undesired trip due to load encroachment under heavy load condition especially for long lines. 8. 9. Power swing detection (PSD) Power swing blocking releasing (PSBR) For power swing with external fault, distance protection is always blocked, but for power swing with internal fault, PSBR will operate to release the blocking for distance protection. 10. SOTF distance protection
3-20
Date: 2012-08-14
3 Operation Theory
For manual closing or automatic closing on to a fault, zone 2 or 3 of distance protection will accelerate to trip. When VT circuit fails, VT circuit supervision logic will output a blocking signal to block all distance protection except DPFC distance protection. The operating threshold will be increased to 1.5UN to enhance stability. Distance protection can select line VT or bus VT for protection algorithm by a setting [VTS.En_Line_VT]. When no VT is provided, logic setting [VTS.En_Out_VT] should be set as 1, all distance protection will be blocked automatically. The coordination among zones of distance protection is shown in the following figure.
Z4
EM
A Z1DZ Z2
EN
Z3
Figure 3.6-1 Protected reach of distance protection for each zone
Where: Z1: forward direction zone 1 Z2: forward direction zone 2 Z3: forward direction zone 3 Z4: reverse direction zone 4 DZ: DPFC distance protection The choice of impedance reach is as follow. (only for reference) The zone 1 impedance reach setting should be set to cover as much the protected line as possible but not to respond faults beyond the protected line. The accuracy of the relay distance elements is 2.5% in general applications, however, the error could be much larger due to errors of current transformer, voltage transformer and inaccuracies of line parameter from which the relay settings are calculated. It is recommended the zone 1 reach is set to 80%~85% of the protected line in consideration the aforesaid errors and safety margin to prevent instantaneously tripping for faults on adjacent lines. The remaining 20% of the protected line relies on the zone 2 distance elements. With the pilot scheme distance protection, fast fault clearance could also be achieved for end zone faults at both ends of the protected line. The general rule for zone 2 impedance reach setting is set to cover the protected line plus 20% of the adjacent line. However, the coverage of adjacent line should be extended in the presence of
Date: 2012-08-14
3-21
3 Operation Theory
additional infeed at the remote end of the protected line to ensure 20% coverage of adjacent line. This assures the fast operation of zone 2 distance element for faults at the remote end of the protected line since the fault is well within zone 2 reach. This is important for pilot protection as the impedance reach of pilot zone is the same as that of zone 2 distance element. In a parallel line situation, a fault cleared sequentially on a line may cause current reversal in the healthy line. If the pilot zone settings are set to cover 50% of adjacent line and the POTT or Blocking scheme is used, the current reversal in the healthy line could cause relay mal-operation. Therefore, current reversal logic is required and explained in section 3.8.2.6. The Z3 distance element acts as backup protection for protected line and adjacent line but not to over the zone 2 setting of adjacent line. The zone 3 impedance reach is generally 2 times zone 1 reach, i.e. 160% of protected line. For different system impedance ratio (SIR), the operating time of distance protection for different fault location are shown as the following figures.
35 30 25
Operating Time (ms)
20 15 10 5 0 0 10% 20% 30% 40% 50% 60% 70% 80% 90% 100%
Fault Location (% of relay setting)
Figure 3.6-2 Operating time of single-phase fault (50Hz, SIR=1)
3-22
Date: 2012-08-14
3 Operation Theory
30 25
Operating Time (ms)
Operating Time (ms)
20 15 10 5 0 0% 10% 20% 30% 40% 50% 60% 70% 80% 90% 100%
35 30 25 20 15 10 5 0 0 10% 20% 30% 40% 50% 60% 70% 80% 90% 100%
Figure 3.6-4 Operating time of two-phase fault (50Hz, SIR=1)

Date: 2012-08-14
3-23
3 Operation Theory
30 25
Operating Time (ms) Operating Time (ms)
20 15 10 5 0 0% 10% 20% 30% 40% 50% 60% 70% 80% 90% 100%
35 30 25 20 15 10 5 0 0 10% 20% 30% 40% 50% 60% 70% 80% 90% 100%
Figure 3.6-6 Operating time of three-phase fault (50Hz, SIR=1)
3-24
Date: 2012-08-14
3 Operation Theory
30 25
20 15 10 5 0 0% 10% 20% 30% 40% 50% 60% 70% 80% 90% 100%
33 32.5 32
31.5
31
30.5
30
29.5
29 0% 10% 20% 30% 40% 50% 60% 70% 80% 90% 100%

Date: 2012-08-14
3-25
3 Operation Theory
27.5
27
26.5 26 25.5 25 24.5 24 0% 10% 20% 30% 40% 50% 60% 70% 80% 90% 100%
45 40 35 30 25 20 15 10 5 0 0 10% 20% 30% 40% 50% 60% 70% 80% 90% 100%
3-26
Date: 2012-08-14
3 Operation Theory
35
30
25 20 15 10 5 0 0% 10% 20% 30% 40% 50% 60% 70% 80% 90% 100%
33 32 31 30 29 28 27 0 10% 20% 30% 40% 50% 60% 70% 80% 90% 100%

Date: 2012-08-14
3-27
3 Operation Theory
27.5 27 26.5
26
Operating Time (ms)
25.5
25
24.5
24
23.5 0% 10% 20% 30% 40% 50% 60% 70% 80% 90% 100%
3.6.3 DPFC Distance Protection

The power system is normally treated as a balanced symmetrical three-phase network. When a fault occurs in the power system, by applying the principle of superposition, the load current and voltage can be calculated in the system prior to the fault and the pure fault component can be calculated by fault current or voltage subtracted by pre-fault load current or voltage. DPFC distance protection concerns change of current and voltage at power frequency, therefore, DPFC distance protection is not influenced by load current. As an independent fast protection, DPFC distance protection is mainly used to clear close up fault of long line quickly, its protected range can set as 80%~85% of the whole line. Since DPFC distance protection only reflects fault component and is not influenced by current change due to load variation and power swing, power swing blocking (PSB) is this not required. Moreover, there is no transient overreaching due to infeed current from the remote power supply because it is not influenced by load current. DPFC distance protection may not overreach, and its protected zone will be inverse-proportion reduced with system impedance behind it, i.e. the protected zone will be less than setting if the system impedance is greater. The protected zone will be close to setting value if the system impedance is smaller. Therefore, DPFC distance protection is usually used for long transmission line with large power source and it is recommended to disable DPFC distance protection for short line or the line with weak power source.
3-28
Date: 2012-08-14
3 Operation Theory
3.6.3.1 Impedance Characteristic

ZZD
M
Z I
EM
EN
ZS
ZK
jX
Zzd Zk
Zs+Zk -Zs
Figure 3.6-14 Operation characteristic for forward fault
Where: ZZD: the setting of DPFC distance protection ZS: total impedance between local system and device location ZK: measurement impedance : positive-sequence sensitive angle, i.e. [phi1_Reach] Figure 3.6-14 shows the operation characteristic of DPFC distance protection on R-X plane when a fault occurs in forward direction, which is the circle with the Zs as the center and theZs+Zzd as the radius. When measured impedance Zk is in the circle, DPFC distance protection will operate. DPFC distance protection has a larger capability of enduring fault resistance than distance protection using positive-sequence as polarized voltage.

Date: 2012-08-14
3-29
3 Operation Theory
ZZD F EM ZK ZS
M
Z I
EN
jX
Z's
Zzd
-Zk
Figure 3.6-15 Operation characteristic for reverse fault
Z'Stotal impedance between remote system and protective device location Figure 3.6-15 shows the operation characteristic of the DPFC distance element on R-X plane when a fault occurs in reverse direction, which is the circle with the ZS as the center and theZS-Zzdas the radius. The region of operation is in the quadrant 1 but the measured impedance -Zk is always in the quadrant 3, the DPFC distance protection will not operate. The DPFC distance protection can be enabled or disabled by logic setting and binary input. 3.6.3.2 Function Block Diagram
21D 21D.En_DPFC 21D.Blk_DPFC 21D.Op_DPFC
3-30
Date: 2012-08-14
3 Operation Theory
3.6.3.3 I/O Signals

Table 3.6-1 I/O signals of DPFC distance protection No. 1 Input Signal 21D.En_DPFC Description DPFC distance protection enabling input, it is triggered from binary input or programmable logic etc. DPFC distance protection blocking input, it is triggered from binary input or programmable logic etc. Description DPFC distance protection operates.
2 No. 1
21D.Blk_DPFC Output Signal 21D.Op_DPFC
3.6.3.4 Logic
EN
[21D.En_DPFC] 21D.En_DPFC 21D.Blk_DPFC
SIG SIG
& >=1
EN
[VTS.En_Out_VT] Manual closing signal 3-pole reclosing signal [21D.Z_DPFC]<0.05/In Z<[21D.Z_DPFC]
SIG
>=1
SIG
SET
SET
& >=1 & & &

21D.Op_DPFC
SIG
UP<0.85Un Z<[21D.Z_DPFC]
SET
SIG
UPP<0.85Unn PD signal
SIG
Figure 3.6-16 Logic diagram of DPFC distance protection
Note! PD signal only blocks DPFC distance element of corresponding phase (i.e. broken phase), and healthy phases (operation phases) are not affected. 3.6.3.5 Settings
Table 3.6-2 Settings of DPFC distance protection No. 1 Name 21D.Z_DPFC Range (0.000~4Unn)/In Step 0.001 Unit ohm Remark Impedance setting of DPFC distance protection Enabling/disabling protection 3-31
Date: 2012-08-14
21D.En_DPFC
0 or 1
DPFC
distance
3 Operation Theory
0: disable 1: enable
3.6.4 Load Encroachment

3.6.4.1 Impedance Characteristic When distance protection is used to protect long, heavily loaded lines, the risk of encroachment of the load impedance into the tripping characteristic of the distance protection may exist. A load trapezoid characteristic for all zones is used to exclude the risk of unwanted fault detection by the distance protection during heavy load flow. As shown below, if the measured impedance into the load area, distance elements need to be blocked.
jX
Load Load Area
Load Load Area
R
RLoad RLoad
Figure 3.6-17 Distance element with load trapezoid
Two settings are equipped to exclude the encroachment of the load impedance: RLoad: the minimum load resistance Load: the load area angle These values are common for all zones. 3.6.4.2 Function Block Diagram
LoadEnch LoadEnch.En LoadEnch.Blk LoadEnch.St
3-32
Date: 2012-08-14
3 Operation Theory
3.6.4.3 I/O Signals

Table 3.6-3 I/O signals of load encroachment No. 1 Input Signal LoadEnch.En Description Load trapezoid characteristic enabling input, it is triggered from binary input or programmable logic etc. Load trapezoid characteristic blocking input, it is triggered from binary input or programmable logic etc. Description Measured impedance into the load area. If load trapezoid characteristic is enabled and measured impedance into the load 1 LoadEnch.St are, LoadEnch.St=1, If measured impedance is out of the load are or load trapezoid characteristic is disabled, LoadEnch.St=0
2 No.
LoadEnch.Blk Output Signal
3.6.4.4 Settings
Table 3.6-4 Settings of load encroachment No. Name Range Step Unit Angle Remark setting of it load should trapezoid be set
characteristic, 1 LoadEnch.phi_Blinder 0~45 1 Deg
according to the maximum load area angle (Load_Max), Load_Max+5 is
recommended. Resistance setting of load trapezoid characteristic, 2 LoadEnch.R_Blinder (0.05~200)/In 0.01 ohm according to it the should be set load
minimum
resistance, 70%~90% minimum load resistance is recommended. Enabling/disabling 3 LoadEnch.En 0,1 characteristic 0: disable 1: enable load trapezoid
3.6.5 Mho Distance Protection

3.6.5.1 Impedance Characteristic 1. Zone 1, 2 and 3 of phase-to-ground distance element

Date: 2012-08-14
3-33
3 Operation Theory
ZZD
M
Z I
IN
EM
EN
ZS
ZK
jX
ZZD
ZK
-2ZS/3
Figure 3.6-18 Phase-to-ground operation characteristic for forward fault
Where: ZZD: the setting of distance protection ZS: total impedance between local system and protective device location ZK: measurement impedance : positive-sequence sensitive angle, i.e. [phi1_Reach] Phase-to-neutral positive sequence voltage is used as polarized signal for phase-to-ground distance protection. For zone 1 and zone 2: Operation voltage:
Polarized voltage: In short line, phase shift 1 could be applied to the polarized voltage to improve the performance against high resistance fault. The device provides an angle-shift setting, [ZG.phi_Shift], to set value of 1 among 0 , 15and 30 . Their impedance shift characteristics towards quadrant 1 are
3-34
Date: 2012-08-14
3 Operation Theory
respectively shown as the impedance circle A, B and C in Figure 3.6-23. For zone 3: Operation voltage:
Polarized voltage: UP uses phase positive-sequence voltage as polarized voltage. For earth fault, positive-sequence voltage is mainly formed from healthy phases, basically retaining the phase of the positive-sequence voltage before fault. Phase comparison equation is:
The operation characteristic is shown in Figure 3.6-18. Operation characteristic of ZK on R-X plane is a circle with line connecting ends of ZZD and -2ZS/3 as the diameter. The origin is enclosed in the circle. 2. Zone 1, 2 and 3 of phase-to-phase distance element
jX
ZZD
ZK
-ZS/2
Figure 3.6-19 Phase-to-phase operation characteristic for forward fault
Phase-to-phase positive sequence voltage is used as polarized signal for phase-to-phase distance protection. For zone 1 and zone 2: Operation voltage:

Date: 2012-08-14
3-35
3 Operation Theory
Polarized voltage: Phase shift 2 could be applied to polarized voltage of zones 1 and 2 just like 1 in phase-to-ground distance element. It is also used for improving performance against high resistance fault in short line. The device provides an angle-shift setting, [21M.ZP.phi_Shift], to set value of 2 among 0 , 15and 30 . Their impedance shift characteristics towards quadrant 1 are respectively shown as the impedance circle A, B and C in Figure 3.6-23. For zone 3: Operation voltage:
Polarized voltage: Phase-to-phase positive-sequence voltage is applied as the polarized voltage of this element. Phase comparison equation is:
The operation characteristic of phase-to-phase distance element is shown in Figure 3.6-19. Operation characteristic of ZK on R-X plane is a circle with line connecting ends of ZZD and -ZS/2 as the diameter. The origin is enclosed in the circle. Figure 3.6-20 shows operation characteristic of measured impedance -ZK on R-X plane when an asymmetric reverse fault occurs. This characteristic is a circle with line connecting ends of ZZD and Z'S as the diameter. It will operate only when -ZK is in the circle. Therefore, directionality of the distanced protection is achieved.
ZZD F EM I ZK ZS
M
EN
3-36
Date: 2012-08-14
3 Operation Theory
jX Z'S
ZZD
R -ZK
Figure 3.6-20 Operation characteristic for reverse fault
Z'S: total impedance between remote system and protective device location
jX
ZZD
ZK
Figure 3.6-21 Steady-state characteristic of three-phase short-circuit fault
Phase-to-phase distance protection is also used for three-phase short-circuit fault. The operation characteristic is shown in Figure 3.6-21. Operation characteristic of ZK on R-X plane is a circle with setting impedance ZZD as the diameter.

Date: 2012-08-14
3-37
3 Operation Theory
jX
ZZD
ZK
R
Circle C -ZS Circle B Circle A
Figure 3.6-22 Operation characteristic of three-phase close up short-circuit fault
Where: ZZD: the setting of distance protection (zone x) ZS: total impedance between local system and protective device location ZK: measured impedance : positive-sequence characteristic angle, i.e. [phi1_Reach] Circle A: transient characteristic Circle B: steady-state characteristic shifting towards quadrant Circle C: steady-state characteristic shifting towards quadrant As shown in Figure 3.6-22, the characteristic of the distance protection for a three-phase fault on a system is an impedance circle cross the origin, and there is a voltage dead zone around the origin. In order to eliminate the dead zone of the distance protection for a close up three-phase fault memorized positive-sequence voltage is adopted as polarized voltage when the positive-sequence voltage drops down to 15%Un or below. The transient (during process of memory) operation characteristic is shown as the impedance circle A in the above figure. The circle takes ZZD and -ZZS as diameter and thus the origin is within the impedance circle. When three-phase fault happens in reverse direction, its transient characteristic is shown in Figure 3.6-20, i.e. the distance protection has a clearly defined directionality and no dead zone during the process of memory. For zone 1, zone 2 and zone 3 of the phase-to-phase distance protection, if distance protection operates with memorized polarizing voltage, this means a close up forward fault. When the memory fades out, the operation characteristic will be reverse offset a little to enclose the origin as impedance circle B shown in Figure 3.6-22 to ensure keeping operating of distance protection until the fault being cleared. If distance protection does not operate with memorized polarizing voltage,
3-38
Date: 2012-08-14
3 Operation Theory
it will be a close up reverse fault. When the memory fades out, the operation characteristic will be forward offset not to enclose the origin as impedance circle C shown in Figure 3.6-22, and the distance protection will not mal-operate even if voltage is zero. The distance protection with such design thoroughly eliminates the dead zone when three-phase close up fault occurs. It also has favorable directivity and will not operate for a reverse three-phase fault at busbar. When receiving manual closing signal or 3-pole reclosing signal, the operation characteristic of phase to phase distance protection will always enclose the origin of impedance, with no dead zone, i.e. the reverse offset impedance circle B shown in Figure 3.6-22.
jX B: 15 C: 30
ZZD
A: 0 D
-ZS
Figure 3.6-23 Shift impedance characteristic of zone 1 and zone 2
The impedance characteristic of phase-to-ground distance protection is the circle with line connecting ends of ZZD and -2ZS/3 as the diameter and that of phase-to-phase distance is the circle with line connecting ends of ZZD and -ZS/2 as the diameter. In order to prevent the transient overreach caused by the infeed power supply from the remote end, the zero-sequence reactance line D is added. These measures have enhanced the capacity against fault resistance when using distance protection in short lines. 3. Zone 4
ZZDR F EM ZK I
M
ZZDF Z
N
EN

Date: 2012-08-14
3-39
3 Operation Theory
jX
ZZDF
ZK
ZZDR
Figure 3.6-24 Operation characteristic of reverse Z4 distance protection
Where: ZZDF: impedance setting of zone 4 in forward direction, i.e. [21M.Z4.Z_Fwd] ZZDR: impedance setting of zone 4 in reverse direction, i.e. [21M.Z4.Z_Rev] : positive-sequence characteristic angle, i.e. [phi1_Reach] ZK: measurement impedance When a fault occurs on the rear busbar, reverse distance element is provided to clear it with definite time delay and is taken as backup protection for reverse busbar fault. Its operation characteristic is shown in Figure 3.6-24. 4. Zone 5
Zone 5 can be set as forward direction or reverse direction. When zone 5 is set as forward direction, its operation characteristic is as similar as zone 1, 2. When zone is set as reverse direction, its operation characteristic is similar with zone 4, but the difference is that the impedance setting in forward direction can not set and is zero fixedly. In order to ensure that zone 5 reliably operates for reverse three-phase fault and does not reliably operate for forward three-phase fault, it adopts the same method as zone 1, 2. When positive-sequence voltage is smaller than 15%Un, polarized voltage, forward threshold and reverse threshold improves the reliability of zone 5 of distance protection.
3-40
Date: 2012-08-14
3 Operation Theory
3.6.5.2 Function Block Diagram

21M 21M.En 21M.Blk 21M.ZGx.En 21M.ZPx.En 21M.ZGx.Blk 21M.ZPx.Blk 21M.Zx.En_ShortDly 21M.Zx.Blk_ShortDly 21M.Z1.En_Instant 21M.Z1.On 21M.Z2.On 21M.Z3.On 21M.Z4.On 21M.Z5.On 21M.Z1.Op 21M.Z2.Op 21M.Z3.Op 21M.Z4.Op 21M.Z5.Op
3.6.5.3 I/O Signals

Table 3.6-5 I/O signals of distance protection (Mho) No. 1 Input Signal 21M.En Description Distance protection enabling input, it is triggered from binary input or programmable logic etc. Distance protection blocking input, it is triggered from binary input or programmable logic etc. Zone x of phase-to-ground distance protection enabling input, default value is 1 (x=1, 2, 3, 4, 5) Zone x of phase-to-ground distance protection blocking input, default value is 0 (x=1, 2, 3, 4, 5) Zone x of phase-to-phase distance protection enabling input, default value is 1 (x=1, 2, 3, 4, 5) Zone x of phase-to-phase distance protection blocking input, default value is 0 (x=1, 2, 3, 4, 5) Enable accelerating zone 2 of distance protection (x=2, 3) Accelerating zone 2 of distance protection is disabled (x=2, 3) Enable zone 1 of distance protection operates without time delay Description Zone 1 of distance protection is enabled Zone 2 of distance protection is enabled Zone 3 of distance protection is enabled zone 4 of distance protection is enabled zone 5 of distance protection is enabled
21M.Blk
21M.ZGx.En
21M.ZGx.Blk
21M.ZPx.En
6 7 8 9 No. 1 2 3 4 5
21M.ZPx.Blk
21M.Zx.En_ShortDly 21M.Zx.Blk_ShortDly 21M.Z1.En_Instant Output Signal 21M.Z1.On 21M.Z2.On 21M.Z3.On 21M.Z4.On 21M.Z5.On

Date: 2012-08-14
3-41
3 Operation Theory
6 7 8 9 10 21M.Z1.Op 21M.Z2.Op 21M.Z3.Op 21M.Z4.Op 21M.Z5.Op Zone 1 of distance protection operates Zone 2 of distance protection operates Zone 3 of distance protection operates zone 4 of distance protection operates zone 5 of distance protection operates
3.6.5.4 Logic
SIG
21M.En
& &
21M.Enable
SIG
21M.Blk VTS.Alm
SIG
>=1
EN
[VTS.En_Out_VT]
Figure 3.6-25 Logic diagram of enabling distance protection (Mho)

SIG
21M.Enable 21M.ZG1.En
& & & &

21M.ZP1.Enable 21M.ZG1.Enable
>=1
21M.Z1.On
SIG
SIG
21M.ZG1.Blk 21M.ZP1.En
SIG
SIG
21M.ZP1.Blk 21M.Z1.Rls_PSBR 21M.ZG1.Enable
SIG
& &
[21M.ZG1.t_Op] 0
SIG
>=1 & &

21M.ZG1.Op
EN
[21M.ZG1.En] Flag.21M.ZG1 LoadEnch.St (PG)
SIG
SIG
& >=1 & & &

[21M.ZP1.t_Op] 0 21M.Z1.Flg_PSBR
SET
3I0>[FD.ROC.3I0_Set] Flag.21M.ZP1
SIG
SIG
LoadEnch.St (PP) 21M.ZP1.Enable
SIG
>=1 &
21M.ZP1.Op
EN
[21M.ZP1.En] 21M.Z1.En_Instant 21M.ZG1.Op
SIG
SIG
>=1
21M.Z1.Op
SIG
21M.ZP1.Op
Figure 3.6-26 Logic diagram of distance protection (Mho zone 1)
Where:
3-42
Date: 2012-08-14
3 Operation Theory
21M.Z1.Rls_PSBR: Please refer to Figure 3.6-44. Flag.21M.ZG1 means that measured impedance by zone 1 of phase-to-ground distance protection is within the range determined by the setting [21M.ZG1.Z_Set]. Flag.21M.ZP1 means that measured impedance by zone 1 of phase-to-phase distance protection is within the range determined by the setting [21M.ZP1.Z_Set]. LoadEnch.St (PG) means that load trapezoid characteristic for distance element is enabled and measured phase-to-ground impedance into the load area. LoadEnch.St (PP) means that load trapezoid characteristic for distance element is enabled and measured phase-to-phase impedance into the load area.
SIG
& & & &

>=1
21M.Z2.On
SIG
SIG
SIG
SIG
21M.ZP2.Blk 21M.Z2.En_ShortDly
SIG
& &
21M.Z2.Enable_ShortDly
SIG
21M.Z2.Blk_ShortDly [21M.Z2.En_ShortDly] 21M.ZP2.Enable_ShortDly 21M.Z2.Rls_PSBR 21M.ZG2.Enable
EN
SIG
&
[21M.ZG2.t_ShortDly] 0
SIG
>=1 & &

[21M.ZG2.t_Op] 0 21M.ZG2.Op
SIG
EN
SIG
& & >=1

21M.Z2.Flg_PSBR
SIG
SET
SIG
& &
[21M.ZP2.t_Op] 0
SIG
LoadEnch.St (PP)
SIG
21M.ZP2.Enable
& &
[21M.ZP2.t_ShortDly] 0
>=1
21M.ZP2.Op
EN
[21M.ZP2.En] 21M.Z2.Enable_ShortDly 21M.ZG2.Op
SIG
SIG
>=1
21M.Z2.Op
SIG
21M.ZP2.Op
Where:

Date: 2012-08-14
3-43
3 Operation Theory
21M.Z2.Rls_PSBR: Please refer to Figure 3.6-44. Flag.21M.ZG2 means that measured impedance by zone 2 of phase-to-ground distance protection is within the range determined by the setting [21M.ZG2.Z_Set]. Flag.21M.ZP2 means that measured impedance by zone 2 of phase-to-phase distance protection is within the range determined by the setting [21M.ZP2.Z_Set].
SIG
& & & &

>=1
21M.Z3.On
SIG
SIG
SIG
SIG
21M.ZP3.Blk 21M.Z3.En_ShortDly
SIG
& &
21M.Z3.Enable_ShortDly
SIG
21M.Z3.Blk_ShortDly [21M.Z3.En_ShortDly] 21M.Z3.Enable_ShortDly 21M.Z3.Rls_PSBR 21M.ZG3.Enable
EN
SIG
&
[21M.ZG3.t_ShortDly] 0
SIG
>=1
21M.ZG3.Op
SIG
&
&
[21M.ZG3.t_Op] 0
EN
[21M.ZG3.En] Flag.21M.ZG3 3I0>[FD.ROC.3I0_Set] LoadEnch.St (PG) Flag.21M.ZP3
SIG
& >=1
21M.Z3.Flg_PSBR
SET
SIG
SIG
& &
[21M.ZP3.t_Op] 0
SIG
SIG
& &
[21M.ZP3.t_ShortDly] 0
>=1
21M.ZP3.Op
EN
[21M.ZP3.En] 21M.ZP3.Enable_ShortDly 21M.ZG3.Op
SIG
SIG
>=1
21M.Z3.Op
SIG
21M.ZP3.Op
Where: 21M.Z3.Rls_PSBR: Please refer to Figure 3.6-44. Flag.21M.ZG3 means that measured impedance by zone 3 of phase-to-ground distance protection is within the range determined by the setting [21M.ZG3.Z_Set].
3-44
Date: 2012-08-14
3 Operation Theory
Flag.21M.ZP3 means that measured impedance by zone 3 of phase-to-phase distance protection is within the range determined by the setting [21M.ZP3.Z_Set].
SIG
& & & &

>=1
21M.Z4.On
SIG
SIG
21M.Zp4.Blk 21M.ZP4.En
SIG
SIG
21M.ZP4.Blk 21M.ZG4.Enable
SIG
& &
EN
[21M.ZG4.En] 3I0>[FD.ROC.3I0_Set] LoadEnch.St (PG) Flag.21M.ZG4 Flag.21M.ZP4
SET
& >=1
21M.Z4.Flg_PSBR
SIG
SIG
SIG
& &
[21M.ZP4.t_Op] 0 21M.ZP4.Op
SIG
SIG
&
EN
[21M.ZP4.En] 21M.ZG4.Op
SIG
>=1
21M.Z4.Op
SIG
21M.ZP4.Op
Where: Flag.21M.ZG4 means that measured impedance by zone 4 of phase-to-ground distance protection is within the range determined by the settings [21M.Z4.Z_Fwd] and [21M.Z4.Z_Rev]. Flag.21M.ZP4 means that measured impedance by zone 4 of phase-to-phase distance protection is within the range determined by the settings [21M.Z4.Z_Fwd] and [21M.Z4.Z_Rev].

Date: 2012-08-14
3-45
3 Operation Theory
SIG
& & & &

>=1
21M.Z5.On
SIG
SIG
SIG
SIG
21M.ZP5.Blk 21M.Z5.Rls_PSBR 21M.ZG5.Enable
SIG
SIG
&
&
EN
SIG
& & >=1

21M.Z5.Flg_PSBR
SIG
SET
SIG
& &
[21M.ZP5.t_Op] 0 21M.ZP5.Op
SIG
LoadEnch.St (PP)
SIG
21M.ZP5.Enable
&
EN
[21M.ZP5.En] 21M.ZG5.Op
SIG
>=1
21M.Z5.Op
SIG
21M.ZP5.Op
Where: 21M.Z5.Rls_PSBR: Please refer to Figure 3.6-44. Flag.21M.ZG5 means that measured impedance by zone 5 of phase-to-ground distance protection is within the range determined by the settings [21M.ZG5.Z_Set]. Flag.21M.ZP5 means that measured impedance by zone 5 of phase-to-phase distance protection is within the range determined by the settings [21M.ZP5.Z_Set]. 3.6.5.5 Settings
Table 3.6-6 Settings of distance protection (Mho) No. 1 2 Name 21M.ZG.phi_Shift 21M.ZP.phi_Shift Range 0, 15 or 30 0, 15 or 30 Step Unit Deg Deg Phase shift Remark of zone 1, 2 of
phase-to-ground distance protection Phase shift of zone 1, 2 of
3-46
Date: 2012-08-14
3 Operation Theory
phase-to-phase distance protection 3 21M.ZG1.Z_Set (0.000~4Unn)/In 0.001 ohm Impedance setting of zone 1 of phase-to-ground distance protection Time delay of zone 1 of
21M.ZG1.t_Op
0.000~10.000
0.001
phase-to-ground distance protection Enabling/disabling zone 1 of
21M.ZG1.En
0 or 1
phase-to-ground distance protection 0: disable 1: enable Enabling/disabling phase-to-ground
zone 1 of distance protection operation 6 21M.ZG1.En_BlkAR 0 or 1 to block AR 0: disable 1: enable 7 21M.ZP1.Z_Set (0.000~4Unn)/In 0.001 ohm Impedance setting of zone 1 of phase-to-phase distance protection Time delay of zone 1 of
21M.ZP1.t_Op
0.000~10.000
0.001
phase-to-phase distance protection Enabling/disabling zone 1 of
21M.ZP1.En
0 or 1
phase-to-phase distance protection 0: disable 1: enable Enabling/disabling phase-to-phase
zone 1 of distance protection operation 10 21M.ZP1.En_BlkAR 0 or 1 to block AR 0: disable 1: enable 11 21M.ZG2.Z_Set (0.000~4Unn)/In 0.001 ohm Impedance setting of zone 2 of phase-to-ground distance protection Time delay of zone 2 of
12
21M.ZG2.t_Op
0.000~10.000
0.001
phase-to-ground distance protection Short time delay of zone 2 of
13
21M.ZG2.t_ShortDly
0.000~10.000
0.001
14
21M.ZG2.En
0 or 1
zone 2 of distance protection operation 15 21M.ZG2.En_BlkAR 0 or 1 to block AR 0: disable 1: enable 16 21M.ZP2.Z_Set (0.000~4Unn)/In 0.001 ohm Impedance setting of zone 2 of phase-to-phase distance protection 3-47
Date: 2012-08-14
3 Operation Theory
17 21M.ZP2.t_Op 0.000~10.000 0.001 s Time delay of zone 2 of
phase-to-phase distance protection Short time delay of zone 2 of
18
21M.ZP2.t_ShortDly
0.000~10.000
0.001
19
21M.ZP2.En
0 or 1
zone 2 of distance protection operation 20 21M.ZP2.En_BlkAR 0 or 1 to block AR 0: disable 1: enable Fixed accelerate zone 2 of distance 21 21M.Z2.En_ShortDly 0 or 1 protection 0: disable 1: enable 22 21M.ZG3.Z_Set (0.000~4Unn)/In 0.001 ohm Impedance setting of zone 3 of phase-to-ground distance protection Time delay of zone 3 of
23
21M.ZG3.t_Op
0.000~10.000
0.001
24
21M.ZG3.t_ShortDly
0.000~10.000
0.001
25
21M.ZG3.En
0 or 1
zone 3 of distance protection operation 26 21M.ZG3.En_BlkAR 0 or 1 to block AR 0: disable 1: enable 27 21M.ZP3.Z_Set (0.000~4Unn)/In 0.001 ohm Impedance setting of zone 3 of phase-to-phase distance protection Time delay of zone 3 of
28
21M.ZP3.t_Op
0.000~10.000
0.001
29
21M.ZP3.t_ShortDly
0.000~10.000
0.001
30
21M.ZP3.En
0 or 1
phase-to-phase distance protection 0: disable 1: enable
31
21M.ZP3.En_BlkAR
0 or 1
Enabling/disabling
phase-to-phase
zone 3 of distance protection operation PCS-902 Line Distance Relay

Date: 2012-08-14
3-48
3 Operation Theory
to block AR 0: disable 1: enable Fixed accelerate zone 3 of distance 32 21M.Z3.En_ShortDly 0 or 1 protection 0: disable 1: enable 33 21M.Z4.Z_Fwd (0.000~4Unn)/In 0.001 ohm Impedance setting of zone 4 of distance protection in forward direction Impedance setting of zone 4 of
34
21M.Z4.Z_Rev
(0.000~4Unn)/In
0.001
ohm
distance protection in reverse direction Time delay of zone 4 of distance protection Enabling/disabling zone 4 of
35
21M.Z4.t_Op
0.000~10.000
0.001
36
21M.ZG4.En
0 or 1
zone 4 of distance protection operation 37 21M.ZG4.En_BlkAR 0 or 1 to block AR (Internal setting, its default value is 1) 0: disable 1: enable Enabling/disabling 38 21M.ZP4.En 0 or 1 zone 4 of
zone 4 of distance protection operation 39 21M.ZP4.En_BlkAR 0 or 1 to block AR (Internal setting, its default value is 1) 0: disable 1: enable 40 21M.ZG5.Z_Set (0.000~4Unn)/In 0.001 ohm Impedance setting of zone 5 of
phase-to-ground distance protection Time delay of zone 5 of
41
21M.ZG5.t_Op
0.000~10.000
0.001
42
21M.ZG5.En
0 or 1
43
21M.ZG5.En_BlkAR
0 or 1
zone 5 of distance protection operation to block AR

Date: 2012-08-14
3-49
3 Operation Theory
0: disable 1: enable 44 21M.ZP5.Z_Set (0.000~4Unn)/In 0.001 ohm Impedance setting of zone 5 of phase-to-phase distance protection Time delay of zone 5 of
45
21M.ZP5.t_Op
0.000~10.000
0.001
46
21M.ZP5.En
0 or 1
zone 5 of distance protection operation 47 21M.ZP5.En_BlkAR 0 or 1 to block AR 0: disable 1: enable Direction option for zone 5 of distance 48 21M.Z5.Opt_Dir 0 or 1 0 protection 0: forward direction 1: reverse direction
3.6.6 Quadrilateral Distance Element

3.6.6.1 Impedance Characteristic Features available with quadrilateral distance protection include 3 forward zones (zone 1~3) phase-to-ground or phase-to-phase distance elements, 1 reverse zone (zone 4) phase-to-ground or phase-to-phase distance element, 1 settable forward or reverse zone (zone 5) phase-to-ground or phase-to-phase distance element and 1 pilot zone distance protection. Each zone can respectively enable or disable power swing blocking releasing. Quadrilateral distance protection will be disabled when VT circuit fails. 1. Zone 1, 2 and 3
Quadrilateral forward distance element characteristic for zone 1, 2 and 3 is shown as follows:
3-50
Date: 2012-08-14
3 Operation Theory
jX ZZD
RZD
Figure 3.6-31 Quadrilateral forward distance element characteristics
Where: ZZD: impedance setting. RZD: resistive setting range. : line positive-sequence characteristic angle. : the angle of directional line in the second quadrant, fixed at 15 . : the angle of directional line in the fourth quadrant, fixed at 15 . : downward angle of reactance line. 2. Zone 4
When a fault occurs on the busbar at the back, reverse distance element zone 4 is provided to clear it with definite time delay and is used as backup protection for reverse busbar fault.
jX C RZD

ZZD
Figure 3.6-32 Zone 4 reverse quadrilateral distance element characteristic

Date: 2012-08-14
3-51
3 Operation Theory
Where: ZZD: impedance setting of zone 4 in reverse direction RZD: resistance setting of zone 4 in reverse direction : positive-sequence characteristic angle, : the angle of directional line, fixed at 15 : the angle of directional line, fixed at 15 : tilted angle of the reactance line AB, fixed at 12 3. Zone 5
Zone 5 can be set as forward direction or reverse direction. When zone 5 is set as forward direction, its operation characteristic is as similar as zone 1, 2. When zone is set as reverse direction, its operation characteristic is similar with zone 4. 3.6.6.2 Function Block Diagram
21Q 21Q.En 21Q.Blk 21Q.ZGx.En 21Q.ZPx.En 21Q.ZGx.Blk 21Q.ZPx.Blk 21Q.Zx.En_ShortDly 21Q.Zx.Blk_ShortDly 21Q.Z1.On 21Q.Z2.On 21Q.Z3.On 21Q.Z4.On 21Q.Z5.On 21Q.Z1.Op 21Q.Z2.Op 21Q.Z3.Op 21Q.Z4.Op 21Q.Z5.Op
21Q.Z1.En_Instant
3.6.6.3 I/O Signals

Table 3.6-7 I/O signals of distance protection (Quad) No. 1 Input Signal 21Q.En Description Distance protection enabling input, it is triggered from binary input or programmable logic etc. Distance protection blocking input, it is triggered from binary input or programmable logic etc. Zone x of phase-to-ground distance protection enabling input, default value is 1 (x=1, 2, 3, 4, 5)
21Q.Blk
21Q.ZGx.En
3-52
Date: 2012-08-14
3 Operation Theory
4
21Q.ZGx.Blk
Zone x of phase-to-ground distance protection blocking input, default value is 0 (x=1, 2, 3, 4, 5) Zone x of phase-to-phase distance protection enabling input, default value is 1 (x=1, 2, 3, 4, 5) Zone x of phase-to-phase distance protection blocking input, default value is 0 (x=1, 2, 3, 4, 5)
21Q.ZPx.En
6 7 8 9 No. 1 2 3 4 5 6 7 8 9 10
21Q.ZPx.Blk
21Q.Zx.En_ShortDly 21Q.Zx.Blk_ShortDly 21Q.Z1.En_Instant Output Signal 21Q.Z1.On 21Q.Z2.On 21Q.Z3.On 21Q.Z4.On 21Q.Z5.On 21Q.Z1.Op 21Q.Z2.Op 21Q.Z3.Op 21Q.Z4.Op 21Q.Z5.Op
Enable accelerating zone 2 of distance protection (x=2, 3) Accelerating zone 2 of distance protection is disabled (x=2, 3) Enable zone 1 of distance protection operates without time delay Description Zone 1 of distance protection is enabled Zone 2 of distance protection is enabled Zone 3 of distance protection is enabled zone 4 of distance protection is enabled zone 5 of distance protection is enabled Zone 1 of distance protection operates Zone 2 of distance protection operates Zone 3 of distance protection operates zone 4 of distance protection operates zone 5 of distance protection operates
3.6.6.4 Logic
SIG
21Q.En
& &
21Q.Enable
SIG
21Q.Blk VTS.Alm
SIG
>=1
EN
[VTS.En_Out_VT]
Figure 3.6-33 Logic diagram of enabling distance protection (Quad)

Date: 2012-08-14
3-53
3 Operation Theory
SIG
21Q.Enable [21Q.ZG1.En] 21Q.ZG1.En 21Q.ZG1.Blk [21Q.ZP1.En] 21Q.ZP1.En 21Q.ZP1.Blk 21Q.ZG1.Enable LoadEnch.St (PG) 3I0>[FD.ROC.3I0_Set] Flag.21Q.ZG1 21Q.Z1.Rls_PSBR
EN
& &
21Q.ZG1.Enable
>=1
21Q.Z1.On
SIG
SIG
EN
& &
21Q.ZP1.Enable
SIG
SIG
SIG
SIG
&
&
[21Q.ZG1.t_Op] 0
>=1
21Q.ZG1.Op
SET
& >=1
21Q.Z1.Flg_PSBR
SIG
SIG
SIG
21Q.ZP1.Enable LoadEnch.St (PP) Flag.21Q.ZP1
& &
[21Q.ZP1.t_Op] 0
SIG
SIG
>=1
21Q.ZP1.Op
&
SIG
21Q.Z1.En_Instant 21Q.ZG1.Op
SIG
>=1
21Q.Z1.Op
SIG
21Q.ZP1.Op
Figure 3.6-34 Logic diagram of distance protection (Quad zone 1)
Where: 21Q.Z1.Rls_PSBR: Please refer to Figure 3.6-44. Flag.21Q.ZG1 means that measured impedance by zone 1 of phase-to-ground distance protection is within the range determined by the settings [21Q.ZG1.Z_Set] and [21Q.ZG1.R_Set]. Flag.21Q.ZP1 means that measured impedance by zone 1 of phase-to-phase distance protection is within the range determined by the settings [21Q.ZP1.Z_Set] and [21Q.ZP1.R_Set]. LoadEnch.St (PG) means that load trapezoid characteristic for distance element is enabled and measured phase-to-ground impedance into the load area. LoadEnch.St (PP) means that load trapezoid characteristic for distance element is enabled and measured phase-to-phase impedance into the load area.
3-54
Date: 2012-08-14
3 Operation Theory
SIG
21Q.Enable [21Q.ZG2.En] 21Q.ZG2.En 21Q.ZG2.Blk [21Q.ZP2.En] 21Q.ZP2.En 21Q.ZP2.Blk 21Q.Z2.En_ShortDly
EN
& &
21Q.ZG2.Enable
>=1
21Q.Z2.On
SIG
SIG
EN
& &
21Q.ZP2.Enable
SIG
SIG
SIG
& &
21Q.Z2.Enable_ShortDly
SIG
21Q.Z2.Blk_ShortDly [21Q.Z2.En_ShortDly] 21Q.Z2.Enable_ShortDly 21Q.ZG2.Enable 3I0>[FD.ROC.3I0_Set] LoadEnch.St (PG) Flag.21Q.ZG2 21Q.Z2.Rls_PSBR 21Q.ZP2.Enable LoadEnch.St (PP) Flag.21Q.ZP2
EN
SIG
SIG
& & &

[21Q.ZG2.t_Op] 0 [21Q.ZG2.t_ShortDly] 0
SET
>=1
21Q.ZG2.Op
SIG
SIG
>=1
21Q.Z2.Flg_PSBR
SIG
SIG
& &
&
[21Q.ZP2.t_ShortDly] 0
SIG
>=1
21Q.ZP2.Op
SIG
[21Q.ZP2.t_Op]
SIG
21Q.ZG2.Op
>=1
21Q.Z2.Op
SIG
21Q.ZP2.Op
Where: 21Q.Z2.Rls_PSBR: Please refer to Figure 3.6-44. Flag.21Q.ZG2 means that measured impedance by zone 2 of phase-to-ground distance protection is within the range determined by the settings [21Q.ZG2.Z_Set] and [21Q.ZG2.R_Set]. Flag.21Q.ZP2 means that measured impedance by zone 2 of phase-to-phase distance protection is within the range determined by the settings [21Q.ZP2.Z_Set] and [21Q.ZP2.R_Set].

Date: 2012-08-14
3-55
3 Operation Theory
SIG
21Q.Enable [21Q.ZG3.En] 21Q.ZG3.En 21Q.ZG3.Blk [21Q.ZP3.En] 21Q.ZP3.En 21Q.ZP3.Blk 21Q.Z3.En_ShortDly
EN
& &
21Q.ZG3.Enable
>=1
21Q.Z3.On
SIG
SIG
EN
& &
21Q.ZP3.Enable
SIG
SIG
SIG
& &
21Q.Z3.Enable_ShortDly
SIG
21Q.Z3.Blk_ShortDly [21Q.Z3.En_ShortDly] 21Q.Z3.Enable_ShortDly 21Q.ZG3.Enable 3I0>[FD.ROC.3I0_Set] LoadEnch.St (PG) Flag.21Q.ZG3 21Q.Z3.Rls_PSBR 21Q.ZP3.Enable LoadEnch.St (PP) Flag.21Q.ZP3
EN
SIG
SIG
& & &

[21Q.ZG3.t_Op] 0 [21Q.ZG3.t_ShortDly] 0
SET
>=1
21Q.ZG3.Op
SIG
SIG
>=1
21Q.Z3.Flg_PSBR
SIG
SIG
& &
&
[21Q.ZP3.t_ShortDly] 0
SIG
>=1
21Q.ZP3.Op
SIG
[21Q.ZP3.t_Op]
SIG
21Q.ZG3.Op
>=1
21Q.Z3.Op
SIG
21Q.ZP3.Op
Where: 21Q.Z3.Rls_PSBR: Please refer to Figure 3.6-44. Flag.21Q.ZG3 means that measured impedance by zone 3 of phase-to-ground distance protection is within the range determined by the settings [21Q.ZG3.Z_Set] and [21Q.ZG3.R_Set]. Flag.21Q.ZP3 means that measured impedance by zone 3 of phase-to-phase distance protection is within the range determined by the settings [21Q.ZP3.Z_Set] and [21Q.ZP3.R_Set].
3-56
Date: 2012-08-14
3 Operation Theory
SIG
21Q.Enable [21Q.ZG4.En] 21Q.ZG4.En 21Q.ZG4.Blk [21Q.ZP4.En] 21Q.ZP4.En 21Q.ZP4.Blk 21Q.ZG4.Enable 3I0>[FD.ROC.3I0_Set] LoadEnch.St (PG) Flag.21Q.ZG4 21Q.ZP4.Enable LoadEnch.St (PP) Flag.21Q.ZP4 21Q.ZG4.Op
EN
& &
21Q.ZG4.Enable
>=1
21Q.Z4.On
SIG
SIG
EN
& &
21Q.ZP4.Enable
SIG
SIG
SIG
&
[21Q.ZG4.t_Op] 0 21Q.ZG4.Op
SET
& >=1
21Q.Z4.Flg_PSBR
SIG
SIG
SIG
&
[21Q.ZP4.t_Op] 0 21Q.ZP4.Op
SIG
SIG
SIG
>=1
21Q.Z4.Op
SIG
21Q.ZP4.Op
Where: Flag.21Q.ZG4 means that measured impedance by zone 4 of phase-to-ground distance protection is within the range determined by the settings [21Q.ZG4.Z_Set] and [21Q.ZG4.R_Set]. Flag.21Q.ZP4 means that measured impedance by zone 4 of phase-to-phase distance protection is within the range determined by the settings [21Q.ZP4.Z_Set] and [21Q.ZP4.R_Set].

Date: 2012-08-14
3-57
3 Operation Theory
SIG
21Q.Enable [21Q.ZG5.En] 21Q.ZG5.En 21Q.ZG5.Blk [21Q.ZP5.En] 21Q.ZP5.En 21Q.ZP5.Blk 21Q.ZG5.Enable 3I0>[FD.ROC.3I0_Set] LoadEnch.St (PG) Flag.21Q.ZG5 21Q.Z5.Rls_PSBR 21Q.ZP5.Enable LoadEnch.St (PP) Flag.21Q.ZP5 21Q.ZG5.Op
EN
& &
21Q.ZG5.Enable
>=1
21Q.Z5.On
SIG
SIG
EN
& &
21Q.ZP5.Enable
SIG
SIG
SIG
& & &

[21Q.ZG5.t_Op] 0 21Q.ZG5.Op
SET
SIG
SIG
>=1
21Q.Z5.Flg_PSBR
SIG
SIG
& &
[21Q.ZP5.t_Op] 0 21Q.ZP5.Op
SIG
SIG
SIG
>=1
21Q.Z5.Op
SIG
21Q.ZP5.Op
21Q.Z5.Rls_PSBR: Please refer to Figure 3.6-44. Flag.21Q.ZG5 means that measured impedance by zone 5 of phase-to-ground distance protection is within the range determined by the settings [21Q.ZG5.Z_Set] and [21Q.ZG5.R_Set]. Flag.21Q.ZP5 means that measured impedance by zone 4 of phase-to-phase distance protection is within the range determined by the settings [21Q.ZP5.Z_Set] and [21Q.ZP5.R_Set]. 3.6.6.5 Settings
Table 3.6-8 Settings of distance protection (Quad) No. 1 Name 21Q.ZG1.Z_Set Range (0.000~4Unn)/In Step 0.001 Unit ohm Remark Impedance setting of zone 1 of phase-to-ground distance protection Resistance setting of zone 1 phase-to-ground distance protection Time delay of zone 1 of of
21Q.ZG1.R_Set
(0.000~4Unn)/In
0.001
ohm
21Q.ZG1.t_Op
0.000~10.000
0.001
21Q.ZG1.En
0 or 1
phase-to-ground distance protection
3-58
Date: 2012-08-14
3 Operation Theory
0: disable 1: enable Enabling/disabling phase-to-ground
zone 1 of distance protection operation 5 21Q.ZG1.En_BlkAR 0 or 1 to block AR 0: disable 1: enable 6 21Q.ZP1.Z_Set (0.000~4Unn)/In 0.001 ohm Impedance setting of zone 1 of phase-to-phase distance protection Resistance setting of zone 1 phase-to-phase distance protection Time delay of zone 1 of of
21Q.ZP1.R_Set
(0.000~4Unn)/In
0.001
ohm
21Q.ZP1.t_Op
0.000~10.000
0.001
21Q.ZP1.En
0 or 1
zone 1 of distance protection operation 10 21Q.ZP1.En_BlkAR 0 or 1 to block AR 0: disable 1: enable 11 21Q.ZG2.Z_Set (0.000~4Unn)/In 0.001 ohm Impedance setting of zone 2 of phase-to-ground distance protection Resistance setting of zone 2 phase-to-ground distance protection Time delay of zone 2 of of
12
21Q.ZG2.R_Set
(0.000~4Unn)/In
0.001
ohm
13
21Q.ZG2.t_Op
0.000~10.000
0.001
14
21Q.ZG2.t_ShortDly
0.000~10.000
0.001
15
21Q.ZG2.En
0 or 1
zone 2 of distance protection operation 16 21Q.ZG2.En_BlkAR 0 or 1 to block AR 0: disable 1: enable 17 21Q.ZP2.Z_Set (0.000~4Unn)/In 0.001 ohm Impedance setting of zone 2 of phase-to-phase distance protection Resistance setting of zone 2 phase-to-phase distance protection Time delay of zone 2 of 3-59
Date: 2012-08-14
18 19
21Q.ZP2.R_Set 21Q.ZP2.t_Op
(0.000~4Unn)/In 0.000~10.000
0.001 0.001
ohm s
of
3 Operation Theory
phase-to-phase distance protection 20 21Q.ZP2.t_ShortDly 0.000~10.000 0.001 s Short time delay of zone 2 of phase-tophase distance protection Enabling/disabling 21 21Q.ZP2.En 0 or 1 zone 2 of
zone 2 of distance protection operation 22 21Q.ZP2.En_BlkAR 0 or 1 to block AR 0: disable 1: enable Fixed accelerate zone 2 of distance 23 21Q.Z2. En_ShortDly 0 or 1 protection 0: disable 1: enable 24 21Q.ZG3.Z_Set (0.000~4Unn)/In 0.001 ohm Impedance setting of zone 3 of phase-to-ground distance protection Resistance setting of zone 3 phase-to-ground distance protection Time delay of zone 3 of of
25
21Q.ZG3.R_Set
(0.000~4Unn)/In
0.001
ohm
26
21Q.ZG3.t_Op
0.000~10.000
0.001
27
21Q.ZG3.t_ShortDly
0.000~10.000
0.001
28
21Q.ZG3.En
0 or 1
31
21Q.ZP3.R_Set
(0.000~4Unn)/In
0.001
ohm
32
21Q.ZP3.t_Op
0.000~10.000
0.001
33
21Q.ZP3.t_ShortDly
0.000~10.000
0.001
34
21Q.ZP3.En
0 or 1
phase-to-phase distance protection 0: disable
3-60
Date: 2012-08-14
3 Operation Theory
1: enable Enabling/disabling phase-to-phase
zone 3 of distance protection operation 35 21Q.ZP3.En_BlkAR 0 or 1 to block AR 0: disable 1: enable Fixed accelerate zone 3 of distance 36 21Q.Z3. En_ShortDly 0 or 1 protection 0: disable 1: enable 37 21Q.ZG4.Z_Set (0.000~4Unn)/In 0.001 ohm Impedance setting of zone 3 of phase-to-ground distance protection Resistance setting of zone 3 phase-to-ground distance protection Time delay of zone 4 of of
38
21Q.ZG4.R_Set
(0.000~4Unn)/In
0.001
ohm
39
21Q.ZG4.t_Op
0.000~10.000
0.001
40
21Q.ZG4.En
0 or 1
zone 4 of distance protection operation 41 21Q.ZG4.En_BlkAR 0 or 1 to block AR (Internal setting, its default value is 1) 0: disable 1: enable 42 21Q.ZP4.Z_Set (0.000~4Unn)/In 0.001 ohm Impedance setting of zone 3 of phase-to-phase distance protection Resistance setting of zone 3 phase-to-phase distance protection Time delay of zone 4 of of
43
21Q.ZP4.R_Set
(0.000~4Unn)/In
0.001
ohm
44
21Q.ZP4.t_Op
0.000~10.000
0.001
45
21Q.ZP4.En
0 or 1
zone 4 of distance protection operation 46 21Q.ZP4.En_BlkAR 0 or 1 to block AR (Internal setting, its default value is 1) 0: disable 1: enable 47 21Q.ZG5.Z_Set (0.000~4Unn)/In 0.001 ohm Impedance setting of zone 5 of phase-to-ground distance protection 3-61
Date: 2012-08-14
3 Operation Theory
48 21Q.ZG5.R_Set (0.000~4Unn)/In 0.001 ohm Resistance setting of zone 5 phase-to-ground distance protection Time delay of zone 5 of of
49
21Q.ZG5.t_Op
0.000~10.000
0.001
50
21Q.ZG5.En
0 or 1
53
21Q.ZP5.R_Set
(0.000~4Unn)/In
0.001
ohm
54
21Q.ZP5.t_Op
0.000~10.000
0.001
55
21Q.ZP5.En
0 or 1
zone 5 of distance protection operation 56 21Q.ZP5.En_BlkAR 0 or 1 to block AR 0: disable 1: enable Direction option for zone 5 of distance 57 21Q.Z5.Opt_Dir 0 or 1 0 protection 0: forward direction 1: reverse direction
3.6.7 Pilot Distance Zone

3.6.7.1 Impedance Characteristic An independent pilot zone distance protection is used for PUTT and POTT scheme. There is also a reverse pilot distance element available as an option for application of POTT on weak power source system.
3-62
Date: 2012-08-14
3 Operation Theory
Pilot.Z_Set_B M N Pilot.Z_Rev_B
EM
Pilot.Z_Rev_A
Pilot.Z_Set_A
Figure 3.6-39 Protected zone of pilot distance protection
The operation characteristic of pilot zone is same as that of zone 2, including mho and quadrilateral characteristic. When an internal fault occurs, distance protection at weak source end may not operate due to small fault current. Thus, a reverse distance element is provided to coordinate with the independent pilot distance protection to implement weak infeed logic, ensure pilot distance protection can operate to send signal or trip in the weak end. The operation characteristic is shown in Figure 3.6-40. The reverse weak infeed distance element is forward offset with 1/4 of the reverse setting to enclose the origin. Operation characteristics of pilot reverse weak infeed element distance are shown as below.
jX
jX
21Q.Z_Rev/4
21M.Z_Rev/4 R
21Q.R_Rev
21M.Z_Rev
21Q.Z_Rev
Figure 3.6-40 Pilot reverse weak infeed element
Where: : positive-sequence characteristic angle, i.e. [phi1_Reach] : the angle of directional line, fixed at 15 : the angle of directional line, fixed at 15 : tilted angle of the reactance line AC, fixed at 12

Date: 2012-08-14
3-63
3 Operation Theory
3.6.7.2 Logic
SIG
Enable zone 21Q.Pilot.Rls_PSBR Flag.21Q.Pilot.Z (PG) LoadEnch.St (PG) Flag.21Q.Pilot.Z (PP) LoadEnch.St (PP)
& &
ZPilotP
SIG SET
& >=1
21Q.Zpilot.Flag_PSBR
SIG SET
&
SIG
Figure 3.6-41 Logic diagram of pilot distance zone (Quad characteristic)
SIG
Enable zone
& &
ZPilotP
SIG
21M.Pilot.Rls_PSBR Flag.21M.Pilot.Z (PG)
SET
& >=1
21M.Zpilot.Flag_PSBR
SIG SET
LoadEnch.St (PG) Flag.21M.Pilot.Z (PP)
&
SIG
LoadEnch.St (PP)
Figure 3.6-42 Logic diagram of pilot distance zone (Mho characteristic)
Where: 21M.Pilot.Rls_PSBR, 21Q.Pilot.Rls_PSBR: Please refer to Figure 3.6-44. LoadEnch.St (PG) means that load trapezoid characteristic for distance element is enabled and measured phase-to-ground impedance into the load area. LoadEnch.St (PP) means that load trapezoid characteristic for distance element is enabled and measured phase-to-phase impedance into the load area. Flag.21Q.Pilot.Z (PG) means that measured impedance by phase-to-ground distance element is within the range determined by the setting [21Q.Pilot.Z_Set]. (Quad characteristic) Flag.21Q.Pilot.Z (PP) means that measured impedance by phase-to-phase distance element is within the range determined by the setting [21Q.Pilot.Z_Set]. (Quad characteristic) Flag.21M.Pilot.Z (PG) means that measured impedance by phase-to-ground distance element is within the range determined by the setting [21M.Pilot.Z_Set]. (Mho characteristic) Flag.21M.Pilot.Z (PP) means that measured impedance by phase-to-phase distance element is within the range determined by the setting [21M.Pilot.Z_Set]. (Mho characteristic)
3-64
Date: 2012-08-14
3 Operation Theory
3.6.7.3 Settings
Table 3.6-9 Settings of pilot distance zone No. 1 Name 21M.Pilot.Z_Set Range (0.000~4Unn)/In Step 0.001 Unit ohm Impedance Remark setting of pilot distance
protection (Mho characteristic) Impedance setting of pilot distance
21Q.Pilot.Z_Set
(0.000~4Unn)/In
0.001
ohm
protection (Quad characteristic) Impedance setting in of pilot distance (Mho
21M.Pilot.Z_Rev
(0.000~4Unn)/In
0.001
ohm
protection
reverse
direction
characteristic) Impedance 4 21Q.Pilot.Z_Rev (0.000~4Unn)/In 0.001 ohm setting of pilot distance
protection in reverse direction (Quad characteristic)
21Q.Pilot.R_Set
(0.000~4Unn)/In
0.001
ohm
Impedance
setting
of
pilot
distance
protection (Quad characteristic only) Impedance setting of pilot distance
21Q.Pilot.R_Rev
(0.000~4Unn)/In
0.001
ohm
protection in reverse direction (Quad characteristic only)
3.6.8 Power Swing Detection

Power swing is generally a dynamic process when power system is disturbed. When power swing occurs, the angle between the generators in parallel operation, the frequency of the system, the voltage on the bus, the current and power of the branch lines are all fluctuating. Power swing may destroy the normal operation of power systems and even damage electrical equipment, causing the system to collapse. 3.6.8.1 Function Block Diagram
68 68.En 68.Blk 68.St
3.6.8.2 I/O Signals

Table 3.6-10 I/O signals of power swing detection No. 1 Input Signal 68.En Description Power swing detection enabling input, it is triggered from binary input or programmable logic etc.

Date: 2012-08-14
3-65
3 Operation Theory
2 3 4 5 6 No. 1 68.Blk 21.St FD.ROC.Pkp 52b 52a Output Signal 68.St Power swing detection blocking input, it is triggered from binary input or programmable logic etc. Any element of distance protection picks up. Residual current FD element operates. Circuit breaker is in closed position. Circuit breaker is in open position. Description Power swing detection takes into effect.
3.6.8.3 Logic
EN
[68.En]
& & &
SIG
68.En 68.Blk I1>[Y.I_PSBR]
SIG
SIG
& &
t1 t2
SIG
21.St FD.ROC.Pkp
&
68.St
SIG
& >=1
SIG
3 CB Closed
SIG
3 CB open Unblocking for SF Unblocking for UF
>=1
SIG
SIG
Figure 3.6-43 Logic diagram of power swing detection
Y: 21M or 21Q 3.6.8.4 Settings

Table 3.6-11 Settings of power swing detection No. Name Range Step Unit Remark Enabling/disabling power swing detection 1 68.En 0 or 1 0: disable 1: enable
3.6.9 Power Swing Blocking Releasing

When power swing occurs on the power system, the impedance measured by the distance measuring element may vary from the load impedance area into the operating zone of the distance element. The distance measuring element may operate due to the power swing occurs in many points of interconnected power systems. To keep the stability of whole power system, tripping due to operation of the distance measuring element during a power swing is generally not
3-66
Date: 2012-08-14
3 Operation Theory
allowed. Our distance protection adopts power swing blocking releasing to avoid maloperation resulting from power swing. In another word, distance protection is blocked all along under the normal condition and power swing when the respective logic settings are enabled. Only when fault (internal fault or power swing with internal fault) is detected, power swing blocking for distance protection is released by PSBR element. Power swing blocking for distance element will be released if any of the following PSBR elements operates. Each distance zone elements has respective setting for selection this function.
Fault detector PSBR element (FD PSBR) Unsymmetrical fault PSBR element (UF PSBR) Symmetrical fault PSBR element (SF PSBR) Fault detector PSBR element
1.
If any of the following condition is matched, FD PSBR will operate for 160ms. 1) Positive sequence current is lower than the setting [I_PSBR] before general fault detector element operates. Positive sequence current is higher than the setting [I_PSBR] before general fault detector element operates, but the duration is less than 10ms.
2)
As shown in figure below, assume normal load impedance locates at position 1, and the impedance under current I_PSBR locates at position 2, if the condition for FD PSBR mentioned above operates, it means FD operates between point 1, point 2 and point 3 as example, then FD PSBR will operate for 160ms.
[I_PSBR] FD Normal load impedance
Point 1
Point 2
Point 3
2.
Unsymmetrical fault PSBR element
The operation criterion: I0+I2>mI1 The m, an empirical value, is internal fixed coefficient which can ensure UF PSBR operation during power swing with internal unsymmetrical fault, while no operation during power swing or power swing with external fault. This decision mainly utilizes the "discrepancy" that there is no negative-sequence or zero-sequence current during power swing, and there are negative-sequence and zero-sequence
Date: 2012-08-14
3-67
3 Operation Theory
currents in case of asymmetric fault. In addition, value of m is used to differentiate internal asymmetric fault and external asymmetric fault in case of power swing. In case of power swing or both power swing and external fault, asymmetric fault discriminating element will not operate and distance protection will be blocked: In case of power swing but no fault, I0 and I2 are near zero, but I1 is very large. Asymmetric fault discriminating element will not operate. In case of both power swing and external fault, if center of power swing is in scope of protection, both phase-to-phase and grounding impedance relays may operate. At this time, selection of value of m is used to ensure no operation of asymmetric fault discriminating element, blocking of distance protection, and no incorrect operation without selectivity. If power swing center is not on this line, distance protection will not operate incorrectly without selectivity due to power swing. In case of internal asymmetric fault, asymmetric fault discriminating element operates and distance protection will be release to clear internal fault: In case of both power swing and internal fault, if at the instant of short circuit, system electric potential angle is not laid out, asymmetric fault discriminating element will operate at once. If at the instant of short circuit, system electric potential angle is laid out, asymmetric fault discriminating element will operate when system angle gradually decreases, or local side tripping may be activated after immediate operation of opposite side asymmetric fault discriminating element and releasing of distance protection tripping. In case of normal internal asymmetric phase-to-phase or grounding fault in the system, relatively large zero-sequence or negative-sequence component will exist. At this time, the above equation is true and distance protection will be released. 3. Symmetrical fault PSBR element
If a three-phase fault occurs and FD PSBR is invalid (160ms after FD operates), neither FD PSBR nor UF PSBR will be able to release the distance protection. Thus, SF PSBR is provided for this case specially. This detection is based on measuring the voltage at power swing center, during power swing, U1cos will constantly change periodically. UOS=U1COS Where: : the angle between positive sequence voltage and current U1: the positive sequence voltage As shown in the figure below, assume system connection impedance angle of 90 , current vector will be perpendicular to the line connecting EM and EN, and have the same phase as power swing center voltage. During normal operation of system or power swing, U1cos just reflects positive-sequence voltage of power swing center. In case of 3-phase short circuit, U1cos is voltage drop on arc resistor, transition resistance is arc resistance, and voltage drop on arc resistor is less than 5%UN. In actual system, line impedance angle is not 90 . Through compensation of angle , power swing center voltage can be measured accurately. After compensation, power swing center voltage is U1cos(90oL), where L is line impedance angle.
3-68
Date: 2012-08-14
3 Operation Theory
EM U UOS I EN
During power swing, power swing center voltage U1cos has the following characteristics: When electric potential phase angle difference between power supplies at two sides is 180o, U1cos0 and change rate dU1cos/dt is the maximum. When this phase angle difference is near 0o, power swing center voltage change rate dU1cos/dt is the minimum. During short circuit, U1cos remains unchanged and dU1cos/dt0. However, in early stage of short circuit when normal state enters short circuit state, dU1cos/dt is very large. Therefore, use of dU1cos/dt solely to differentiate power swing and short circuit is not complete. For these reasons, the method to release distance protection on condition that power swing center voltage U1cos is less than a setting and after a short delay can be used as symmetric fault discriminating element. This element can accurately differentiate power swing and 3-phase short circuit fault, and constitute a complete power swing blocking scheme with other elements. The element to open distance protection if U1cos is less than a certain setting and after a delay is easy to realize and has short delay, and can trip fault more quickly and accurately trip 3-phase short circuit fault during power swing. The criterion of SF PSBR element comprises the following two parts:
when -0.03UN<UOS<0.08UN, the SF PSBR element will operate after 150ms. when -0.1UN<UOS<0.25UN, the SF PSBR element will operate after 500ms.
The second criterion is a backup of the first criterion allowing longer monitoring period of voltage variation. To reduce the time delay for SF PSBR element during power swing, the change rate of voltage at power swing center is also used which can release SF PSBR element quickly for the fault occurred during power swing. The typical release time is less than 60ms. 3.6.9.1 I/O Signals
Table 3.6-12 I/O signals of PSBR No. 1 2 3 4 No. 1 Input Signal 21M.En_PSBR 21Q.En_PSBR 21M.Blk_PSBR 21Q.Blk_PSBR Output Signal 21M.Z1.Rls_PSBR Description Enabling power swing blocking releasing (Mho characteristic) Enabling power swing blocking releasing (Quad characteristic) Blocking power swing blocking releasing (Mho characteristic) Blocking power swing blocking releasing (Quad characteristic) Description PSBR operates to release zone 1 (Mho characteristic)

Date: 2012-08-14
3-69
3 Operation Theory
2 3 4 5 6 7 8 9 10 21Q.Z1.Rls_PSBR 21M.Z2.Rls_PSBR 21Q.Z2.Rls_PSBR 21M.Z3.Rls_PSBR 21Q.Z3.Rls_PSBR 21M.Z5.Rls_PSBR 21Q.Z5.Rls_PSBR 21M.Pilot.Rls_PSBR 21Q.Pilot.Rls_PSBR PSBR operates to release zone 1 (Quad characteristic) PSBR operates to release zone 2 (Mho characteristic) PSBR operates to release zone 2 (Quad characteristic) PSBR operates to release zone 3 (Mho characteristic) PSBR operates to release zone 3 (Quad characteristic) PSBR operates to release zone 5 (Mho characteristic) PSBR operates to release zone 5 (Quad characteristic) PSBR operates to release pilot distance protection (Mho characteristic) PSBR operates to release pilot distance protection (Quad characteristic)
3.6.9.2 Logic
SIG
Y.En_PSBR
&
Y.Enable_PSBR
SIG
Y.Blk_PSBR Y.Enable_PSBR
SIG
&
EN
[Y.Zx .En_PSBR] Unblocking for UF
>=1 & >=1

Y.Zx.Rls_PSBR
SIG
Unsymmetrical |I0|+|I2|> symmetrical |U1cos|< t 0ms
>=1
SIG
Unblocking for SF
SET
I1>[Y.I_PSBR]
10ms
0ms
&
0 160ms
SIG
FD.Pkp Zx.Flg_PSBR
SIG
Figure 3.6-44 Logic diagram of PSBR
Y: 21M or 21Q x: 1, 2, 3, 5 or pilot Y.Zx.Flg_PSBR: Please refer to Figure 3.6-26~Figure 3.6-30, Figure 3.6-34~Figure 3.6-38, Figure 3.6-41 and Figure 3.6-42. 3.6.9.3 Settings
Table 3.6-13 Settings of PSBR No. 1 Name 21M.I_PSBR Range (0.050~30.000)In Step 0.001 Unit A Remark Current setting for power swing blocking (Mho characteristic) Current setting for power swing blocking (Quad characteristic) Enabling/disabling zone 1 of distance
2 3
21Q.I_PSBR 21M.Z1.En_PSBR
(0.050~30.000)In 0 or 1
0.001
3-70
Date: 2012-08-14
3 Operation Theory
protection controlled by PSBR (Mho characteristic) 0: disable 1: enable Enabling/disabling zone 1 of distance protection controlled by PSBR (Quad 4 21Q.Z1.En_PSBR 0 or 1 characteristic) 0: disable 1: enable Enabling/disabling zone 2 of distance protection controlled by PSBR (Mho 5 21M.Z2.En_PSBR 0 or 1 characteristic) 0: disable 1: enable Enabling/disabling zone 2 of distance protection controlled by PSBR (Quad 6 21Q.Z2.En_PSBR 0 or 1 characteristic) 0: disable 1: enable Enabling/disabling zone 3 of distance protection controlled by PSBR (Mho 7 21M.Z3.En_PSBR 0 or 1 characteristic) 0: disable 1: enable Enabling/disabling zone 3 of distance protection controlled by PSBR (Quad 8 21Q.Z3.En_PSBR 0 or 1 characteristic) 0: disable 1: enable Enabling/disabling zone 5 of distance protection controlled by PSBR (Mho 9 21M.Z5.En_PSBR 0 or 1 characteristic) 0: disable 1: enable Enabling/disabling zone 5 of distance protection controlled by PSBR (Quad 10 21Q.Z5.En_PSBR 0 or 1 characteristic) 0: disable 1: enable Enabling/disabling pilot distance
zone controlled by PSBR (Mho 11 21M.Pilot.En_PSBR 0 or 1 characteristic) 0: disable 1: enable

Date: 2012-08-14
3-71
3 Operation Theory
Enabling/disabling pilot distance
zone controlled by PSBR (Quad 12 21Q.Pilot.En_PSBR 0 or 1 characteristic) 0: disable 1: enable
3.6.10 Distance SOTF Protection

When the circuit breaker is closed manually or automatically, it is possible to switch on to a fault. This is especially critical if the line in the remote station is grounded, since the distance protection would not clear the fault until overreach zones (Z2 and/or zone 3) time delays have elapsed. In this situation, however, the fastest possible clearance is required. The SOTF (switch onto fault) protection is a complementary function to the distance protection. With distance SOTF protection, a fast trip is achieved for a fault on the whole line, when the line is being energized. It shall be responsive to all types of faults anywhere within the protected line. 3.6.10.1 Function Block Diagram
21SOTF 21SOTF.En 21SOTF.Blk 21SOTF.Op 21SOTF.Op_PDF
3.6.10.2 I/O Signals

Table 3.6-14 I/O signals of distance SOTF protection No. 1 Input Signal 21SOTF.En Description Distance SOTF protection enabling input, it is triggered from binary input or programmable logic etc. Distance SOTF protection blocking input, it is triggered from binary input or programmable logic etc. Description Accelerate distance protection to trip when manual closing or auto-reclosing to fault Accelerate distance protection to trip when another fault happened under pole discrepancy conditions
2 No. 1
21SOTF.Blk Output Signal 21SOTF.Op
21SOTF.Op_PDF
3-72
Date: 2012-08-14
3 Operation Theory
3.6.10.3 Logic
SIG
21SOTF.En 21SOTF.Blk [21SOTF.En]
& &
21SOTF.Enable
SIG EN
Figure 3.6-45 Logic diagram of enabling distance SOTF protection

Date: 2012-08-14
3-73
3 Operation Theory
SIG
21SOTF.Enable [21SOTF.En_ManCls] Manual closing signal [21SOTF.Z2.En_ManCls]
EN
& & &

[21SOTF.t_ManCls] 0
SIG
EN
SIG
Y.Z2.Flg_PSBR [21SOTF.Z3.En_ManCls]
EN
&
>=1
SIG
Y.Z3.Flg_PSBR [21SOTF.Z4.En_ManCls]
EN
& & &

[21SOTF.t_3PAR] 0
SIG
Y.Z4.Flg_PSBR [21SOTF.En_3PAR] 3-pole reclosing signal [21SOTF.Z2.En_3PAR]
>=1
21SOTF.Op
EN
SIG
EN
&
SIG
Y.Z2.Flg_PSBR [21SOTF.Z3.En_3PAR]
EN
&
>=1 >=1
SIG
Y.Z3.Flg_PSBR [21SOTF.Z4.En_3PAR]
EN
&
SIG
Y.Z4.Flg_PSBR [21SOTF.Z2.En_PSBR] Y.Z2.Flg_PSBR Y.Z2.Rls_PSBR [21SOTF.Z3.En_PSBR] Y.Z3.Flg_PSBR Y.Z3.Rls_PSBR [21SOTF.En_1PAR] PD signal Y.Z2.Rls_PSBR 21SOTF.Enable [21SOTF.En_PDF] Y.Z2.Rls_PSBR
EN
& >=1 & &

[21SOTF.t_1PAR] 0
SIG
SIG
EN
SIG
SIG
EN
&
SIG
SIG
SIG
&
[21SOTF.t_PDF] 0 21SOTF.Op_PDF
EN
& &
SIG
SIG
PD signal
Figure 3.6-46 Logic diagram of distance SOTF protection
Y: 21M or 21Q Distance SOTF protection can be enabled or disabled by logic setting [21SOTF.En] and can be
3-74
Date: 2012-08-14
3 Operation Theory
optional enabled by logic settings independently for several cases, including manual closing, 3-pole reclosing, 1-pole reclosing and pole discrepancy conditions. Distance protection for SOTF will operate to trip three-phase circuit breaker when closing manually. Controlled by the logic settings, zone 2, 3 and 4 of distance protection can be determined whether is accelerated to operate. Zone 2, 3 and 4 of distance element for SOTF with or without PSBR logic will operate to trip circuit breaker if the logic setting [21SOTF.Z2.En_3PAR], [21SOTF.Z3.En_3PAR] and [21SOTF.Z4.En_3PAR] are set as 0 or 1 respectively when 3-pole auto-reclosing. Zone 2 of distance element for SOTF with PSBR logic will operate to trip three-phase circuit breaker when 1-pole or 3-pole auto-reclosing if both the logic setting [21SOTF.Z2.En_3PAR] and [21SOTF.Z3.En_3PAR] are set as 0. For single-phase permanent fault, distance SOTF protection for 1-pole reclosing onto the faulty phase will trip three-phase circuit breaker. Under pole discrepancy condition after single-phase tripping, distance SOTF protection will accelerate to operate if another fault happens to the healthy phase. SOTF protection is automatically enabled after circuit breaker opened for 50 ms and automatically disabled after circuit breaker closed for 400ms. 3.6.10.4 Settings
Table 3.6-15 Settings of distance SOTF protection No. Name Range Step Unit Remark Enabling/disabling distance SOTF 1 21SOTF.En 0 or 1 protection 0: disable 1: enable Enabling/disabling distance 2 21SOTF.Z2.En_ManCls 0 or 1 SOTF zone 2 of for
protection
manual closing 1: enable 0: disable Enabling/disabling distance SOTF zone 3 of for
protection
21SOTF.Z3.En_ManCls
0 or 1
manual closing 1: enable 0: disable Enabling/disabling distance SOTF zone 4 of for
protection
21SOTF.Z4.En_ManCls
0 or 1
manual closing 1: enable 0: disable
21SOTF.Z2.En_3PAR
0 or 1
Enabling/disabling
zone
of 3-75

Date: 2012-08-14
3 Operation Theory
distance SOTF protection for
3-pole reclosing 1: enable 0: disable Enabling/disabling distance 6 21SOTF.Z3.En_3PAR 0 or 1 SOTF zone 3 of for
protection
3-pole reclosing 1: enable 0: disable Enabling/disabling distance SOTF zone 4 of for
protection
21SOTF.Z4.En_3PAR
0 or 1
3-pole reclosing 1: enable 0: disable Enabling/disabling zone 2
controlled by PSB of distance 8 21SOTF.Z2.En_PSBR 0 or 1 SOTF reclosing 1: enable 0: disable Enabling/disabling zone 3 protection for 3-pole
controlled by PSB of distance 9 21SOTF.Z3.En_PSBR 0 or 1 SOTF reclosing 1: enable 0: disable Enabling/disabling zone 4 protection for 3-pole
controlled by PSB of distance 10 21SOTF.Z4.En_PSBR 0 or 1 SOTF reclosing 1: enable 0: disable Enabling/disabling distance SOTF protection under pole discrepancy 11 21SOTF.En_PDF 0 or 1 conditions 1: enable 0: disable Time delay of distance protection 12 21SOTF.t_PDF 0.000~10.000 0.001 s operating under pole discrepancy conditions Option of manual SOTF mode 13 SOTF.Opt_Mode_ManCls 0, 1 or 2 0: initiated by input signal of manual closing 1: initiated by CB position protection for 3-pole
3-76
Date: 2012-08-14
3 Operation Theory
2: initiated by either input signal of manual closing or CB position Table 3.6-16 Internal settings of distance SOTF protection No. Name Default Value Unit Remark Enabling/disabling distance SOTF protection for 1 21SOTF.En_ManCls 1 manual closing 0: disable 1: enable 2 21SOTF.t_ManCls 0.025 s Time delay of distance protection accelerating to trip when manual closing Enabling/disabling distance SOTF protection for 3 21SOTF.En_3PAR 1 3-pole reclosing 0: disable 1: enable 4 21SOTF.t_3PAR 0.025 s Time delay of distance protection accelerating to trip when 3-pole reclosing Enabling/disabling distance SOTF protection for 5 21SOTF.En_1PAR 1 1-pole reclosing 0: disable 1: enable 6 21SOTF.t_1PAR 0.025 s Time delay of distance protection accelerating to trip when 1-pole reclosing
3.7 Optical Pilot Channel (Option)

When fibre optical channel is available between the devices at both ends, the devices have an optional module to transmit permissive signal or blocking signal (subject to the scheme selected), transfer signal and transfer trip via the fibre ports of the module. The communication rate can be 64 kbit/s or 2048kbit/s via optional dedicated optical fibre channel or multiplex channel.

12 digital bits are integrated in each frame of transmission message for various applications. Each received message frame via fibre optical channel will pass through security check to ensure the integrity of the message consistently. The last four digital bits of the 12 have been assigned for pilot scheme protection. The communication channel can be configured as single channel mode or as dual channels mode. (FOx, x can be 1 or 2) according to the optical pilot channel module selected. 3.7.2.1 Channel Interface The modules can communicate in two modes via multiplexer or dedicated optical fibre. Communication through dedicated fibre is usually recommended unless the received power does
Date: 2012-08-14
3-77
3 Operation Theory
not meet with the requirement. Channel of 64 kbit/s or 2048kbit/s via dedicated fibre is shown in Figure 3.7-1 and Figure 3.7-2. Two fibre cores of optical cable are dedicated to pilot scheme protection. Two fibre cores of optical cable are normally in service, and all data are exchanged via the other healthy core if one core is failed.
Max 2km for 62.5/125um multi-mode FO (C37.94)
PCS-902
TX RX ST connectors
RX PCS-902 TX ST connectors
Figure 3.7-1 Direct optical link up to 2km with 850nm
Max 40km/100km for 9/125um single-mode FO
PCS-902
TX RX FC connectors
RX TX FC connectors
PCS-902
Figure 3.7-2 Direct optical link up to 40km with 1310nm or up to 100km with 1550nm
Channel of 64 kbit/s or 2048kbit/s via multiplexer is shown in Figure 3.7-3, Figure 3.7-4 and Figure 3.7-5.
C37.94 (n*64kbit/s)
Multi-mode FO
Communication convertor
TX PCS-902 RX
ST connectors ST connectors
RX TX
O
Interface Link to communicate device
Figure 3.7-3 Connect to a communication network via communication convertor
3-78
Date: 2012-08-14
3 Operation Theory
G.703 (64kbit/s)
Single-mode FO
MUX-64
TX PCS-902 RX
FC connectors FC connectors
RX TX
O
Figure 3.7-4 Connect to a communication network via MUX-64
G.703-E1 (2048kbit/s)
Single-mode FO
MUX-2M
TX PCS-902 RX
FC connectors FC connectors
RX TX
O
Figure 3.7-5 Connect to a communication network via MUX-2M
3.7.2.2 Communication Clock Valid messages exchange is key factor for digital pilot scheme protection. The device transmits and receives messages based on respective clocks, which are called transmit clock (i.e. clock TX) and receive clock (i.e. clock RX) respectively. Clock RX is fixed to be extracted from message frame, which can ensure no slip frame and no error message received. Clock TX has two options: 1. Use internal crystal clock, which is called internal clock. (master clock) 2. Use external clock. (slave clock) Depend on the clock used by the device at both ends, there are three modes. 1. Master-master mode
Both ends use internal clock. 2. Slave-slave mode
Both ends use external clock. 3. Master-slave mode

Date: 2012-08-14
3-79
3 Operation Theory
One of them uses internal clock, the other uses external clock The logic setting [FOx.En_IntClock] is used in pilot scheme protection to select the communication clock. The internal clock is enabled automatically when the logic setting [FOx.En_IntClock] is set as 1. Contrarily, the external clock is enabled automatically when the logic setting [FOx.En_IntClock] is set to 0. If the device uses multiplex PCM channel, logic setting [FOx.En_IntClock] at both ends should be set as 0 (Mode 2). If the device uses dedicated optical fibre channel, clock Mode 1 and Mode 3 can be used. Mode 1 is recommended in considering simplification to user, i.e. logic setting [FOx.En_IntClock] at both ends should be set as 1. 3.7.2.3 Identity Code In order to ensure reliability of the device when digital communication channel is applied, settings [FO.LocID] and [FO.RmtID] are provided as identity code to distinguish uniquely the device at remote end using same channel. Under normal conditions, the identity code of the device at local end should be different with that at remote end. In addition, it is recommended that the identity code of all devices, i.e., the setting [FO.LocID], should be unique in the power grid. The setting range is from 0 to 65535. Only for loop test, they are set as the same. The setting [FO.LocID] of the device at an end should be the same as the setting [FO.RmtID] of the device at opposite end and the greater [FO.LocID] between the two ends is chosen as a master end for sampling synchronism, the smaller [FO.LocID] is slave end. If the setting [FO.LocID] is set the same as [FO.RmtID], that implies the device in loopback testing state. The setting [FO.LocID] is packaged in the message frame and transmitted to the remote end. When the [FO.LocID] of the device at remote end is received by local device is same to the setting [FO.RmtID] of local device, the message received from the remote end is valid, and protection information involved in message is read. When these settings are not matched, the message is considered as invalid and protection information involved in message is ignored, corresponding alarms will be issued. 3.7.2.4 Channel Statistics The device has the function of on-line channel monitoring and channel statistics. It can produce channel statistic report automatically at 9:00 every day and the report can be printed for operator to check the channel quality. The monitoring contents of channel status are shown as follows, and they can be viewed by the menu Main MenuTestProt Ch CountChx Counter. 1. FOx.Start_Time (starting time)
It shows the starting time of the channel status statistics of the device at local end. 2. FO.RmtID (ID code of the remote end)
It shows the ID information received by the device at local end now. 3. FOx.t_ChDly (propagation delay of channel x)
3-80
Date: 2012-08-14
3 Operation Theory
It shows the calculated communication channel time delay of the device at local end now (unit: us). The calculation is based on the assumption of same channel path for to and from remote end. The device measures propagation delay of communication channel based on the below principle. Side S transmits a frame of message to side M, and meanwhile records the transmitting time tss on the basis of clock on side S. When side M receives the message, it will record receiving time tmr of the message with its own clock, and return a frame of message to side S at next fixed transmitting time, meanwhile data of tms-tmr is included in the frame of message. Side S will receive the message from side M at the time tsr and obtain the data of tms-tmr. Therefore, the propagation delay of the channel Td is obtained through calculation:
Td
(t sr t ss ) (t ms t mr ) 2
T1
tss
tsr
"S"
tmr
Td T2
tms
"M"
Figure 3.7-6 Schematic diagram of communication channel time
4. 5.
FOx.Alm_CH (channel x is abnormal) FOx.N_CRCFail (total number of error frame of channel x)
It shows the total number of the error frames of the device at local end from starting time of channel statistics until now. Error frame means that this frame fails in CRC check. 6. FOx.N_FramErr (total number of abnormal messages of channel x)
It shows the total number of abnormal messages of the device at local end from starting time of channel statistics until now. 7. FOx.N_FramLoss (total number of lost frames of channel x)
It shows the total number of the lost frames of the device at local end from starting time of channel statistics until now. 8. FOx.N_RmtAbnor (total number of abnormal messages from the remote end of channel x)
It shows the total number of abnormal messages received from the remote end from starting time
Date: 2012-08-14
3-81
3 Operation Theory
of channel statistics until now. 9. FOx.t_CRCFailSec (seconds of serious error frames of channel x)
It shows the total number of serious error frame seconds of the device at local end from starting time of the channel statistics until now.

FOx FOx.Send1 FOx.Send2 FOx.Send3 FOx.Send4 FOx.Send5 FOx.Send6 FOx.Send7 FOx.Send8 FOx.Recv1 FOx.Recv2 FOx.Recv3 FOx.Recv4 FOx.Recv5 FOx.Recv6 FOx.Recv7 FOx.Recv8 FOx.Alm_CH FOx.Alm_ID
3.7.4 I/O Signals

Table 3.7-1 I/O signals of pilot channel No. 1 2 3 4 5 6 7 8 Input Signal FOx.Send1 FOx.Send2 FOx.Send3 FOx.Send4 FOx.Send5 FOx.Send6 FOx.Send7 FOx.Send8 Sending signal 1 of channel x Sending signal 2 of channel x Sending signal 3 of channel x Sending signal 4 of channel x Sending signal 5 of channel x Sending signal 6 of channel x Sending signal 7 of channel x Sending signal 8 of channel x Sending signal 9 of channel x (it is configured fixedly as sending permissive 9 FOx.Send9 signal 1 or sending A-phase permissive signal (only for phase-segregated command scheme)) 10 FOx.Send10 Sending signal 10 of channel x (it is configured fixedly as sending B-phase permissive signal (only for phase-segregated command scheme)) Sending signal 11 of channel x (it is configured fixedly as sending C-phase permissive signal (only for phase-segregated command scheme)) Sending signal 12 of channel x (it is configured fixedly as sending permissive PCS-902 Line Distance Relay
Date: 2012-08-14
Description
11 12 3-82
FOx.Send11 FOx.Send12
3 Operation Theory
signal 1 when pilot directional earth-fault protection sharing pilot channel 1 with pilot distance protection, or sending permissive signal 2 only for pilot directional earth-fault protection adopting independent pilot channel 2) No. 1 2 3 4 5 6 7 8 Output Signal FOx.Recv1 FOx.Recv2 FOx.Recv3 FOx.Recv4 FOx.Recv5 FOx.Recv6 FOx.Recv7 FOx.Recv8 Receiving signal 1 of channel x Receiving signal 2 of channel x Receiving signal 3 of channel x Receiving signal 4 of channel x Receiving signal 5 of channel x Receiving signal 6 of channel x Receiving signal 7 of channel x Receiving signal 8 of channel x Receiving signal 9 of channel x (it is configured fixedly as receiving permissive 9 FOx.Recv9 signal via channel No.1, or receiving permissive signal of A-phase via channel No.1 (only for phase-segregated command scheme)) Receiving signal 10 of channel x (it is configured fixedly as receiving permissive 10 FOx.Recv10 signal of B-phase via channel No.1 (only for phase-segregated command scheme)) Receiving signal 11 of channel x (it is configured fixedly as receiving permissive 11 FOx.Recv11 signal of C-phase via channel No.1 (only for phase-segregated command scheme)) Receiving signal 12 of channel x (it is configured fixedly as receiving permissive 12 FOx.Recv12 signal 1 when pilot directional earth-fault protection sharing pilot channel 1 with pilot distance protection, or receiving permissive signal 2 only for pilot directional earth-fault protection adopting independent pilot channel 2) 13 14 15 16 17 18 19 20 21 22 FOx.Alm_CH FOx.Alm_ID FO.RmtID FOx.t_ChDly FOx.N_CRCFail FOx.N_FramErr FOx.N_FramLoss FOx.N_RmtAbnor FOx.t_CRCFailSec FOx.Alm_Connect Channel x is abnormal Received ID from the remote end is not as same as the setting [FO.RmtID] of the device in local end ID information received from the remote end by the device at local end now Calculated propagation delay of communication channel of the device at local end now Total number of error frame of channel x Total number of abnormal messages of channel x Total number of lost frames of channel x Total number of abnormal messages from the remote end of channel x Seconds of serious error frames of channel x Optical fibre of channel x is connected wrongly Description

Date: 2012-08-14
3-83
3 Operation Theory
3.7.5 Logic
SIG
Receiving transfer signal n from remote side FOx.Alm_CH FOx.Alm_ID
&
FOx.Recvn
SIG
>=1
SIG
Figure 3.7-7 Logic diagram of receiving signal n
Where: n can be 1~12
3.7.6 Settings
Table 3.7-2 Settings of pilot channel No. 1 2 Name FO.LocID FO.RmtID Range 0-65535 0-65535 Step 1 1 Unit Remark Identity code of the device at local end Identity code of the device at remote end Option of internal clock or external clock 3 FOx.En_IntClock 0 or 1 0: external clock 1: internal clock 4 Fox.BaudRate 64 or 2048 kbps Baud rate of optical pilot channel
3.8 Pilot Distance Protection

The instant distance protection with underreaching setting is impossible to isolate the fault at remote end of the line, while distance protection with overreaching setting needs a time delay to grade with downstream protection to maintain discrimination. Pilot distance protection that exchanges distance protection information at both ends of the line can remove the fault within this line quickly, and will not operate for external fault. Pilot distance protection requires communication channel to exchange protection information at both ends. The channel may be dedicated or multiplexed channel through optical fiber or any other communication media. Pilot distance protection has schemes of permissive underreaching transfer trip (PUTT), permissive overreaching transfer trip (POTT) and blocking.

Pilot distance protection determines whether it will send the signal to the remote end according to the discrimination result of the distance element or direction element. Pilot distance protection can be divided into permissive scheme and blocking scheme according to whether the signal sent is used to permit tripping or block tripping. For permissive scheme, it can be divided into overreaching mode or underreaching mode according to the setting of distance element and
3-84
Date: 2012-08-14
3 Operation Theory
scheme selected, furthermore, it will provide the unblocking scheme as auxiliary function. For overreaching mode, current reversal logic and weak infeed logic are available for parallel line operation and weak power source situation respectively. Pilot distance protection with permissive scheme receives permissive signal from the remote end, so as to combine with local discrimination condition to accelerate tripping, so it has high security. Blocking scheme will operate with a short time delay [85.t_DPU_Blocking1] if forward pilot zone element operates and not receiving blocking signal before the short time delay expired. Pilot distance protection can be enabled or disabled by input signals, logic setting and blocking signal, as shown in Figure 3.8-1.
SIG
85.Z.En1 85.Z.En2 [85.Z.En] 85.Z.Blk
& &
Enable 85.Z
SIG
EN
SIG
Figure 3.8-1 Enabling/disabling logic of pilot distance protection
Pilot distance protection receives and sends signals via pilot channel, and the logic of receiving signal is shown in Figure 3.8-2.
SET
85.Blocking
& >=1
Valid_Recv1
SIG
85.Recv1
& >=1
SIG
85.Abnor_Ch1 Unblocking1 Valid [85.PUTT]
SIG
& >=1
EN
EN
[85.POTT]
Figure 3.8-2 Logic diagram of receiving signal
Pilot distance protection has the following application modes: 3.8.2.1 Zone Extension When pilot scheme protection is out of service due to pilot channel failure or no pilot scheme protection is provided. The fault outside zone 1 only can be cleared by zone 2 with a time delay. It can not ensure that all faults within protected line are cleared instantaneously. As a supplement of pilot scheme protection, zone extension can clear the fault within the whole line instantaneously. Different with pilot distance protection, zone extension can also operate for external close up fault in parallel line, but power supply can be restored by AR. So zone extension should be blocked

Date: 2012-08-14
3-85
3 Operation Theory
when AR is out of service and is not ready. In order to prevent too many lines from disconnecting with system due to zone extension operate when the circuit breaker is closed into permanent fault, zone extension should be blocked when AR operates. For temporary fault, the line can be into service again after AR operates successfully. For permanent fault in either local line or parallel line, distance protection with a time delay will operate.
SIG
85.ZX.En1 85.ZX.En2 85.ZX.En 85.ZX.Blk1
&
SIG
EN
SIG
>=1
&
[85.t_DPU_ZX] 0ms 85.Op_ZX
SIG
85.ZX.Blk2
SIG
79.Ready
Zpilot
&
SIG
Figure 3.8-3 Zone extension
Zone extension uses the setting of pilot zone (ZPilot), and its operation characteristic can be Mho or Quad. 3.8.2.2 Permissive Underreaching Transfer Trip (PUTT) Distance elements zone 1 (Z1) with underreaching setting and pilot zone (ZPilot) with overreaching setting are used for this scheme. Z1 element will send permissive signal to the remote end and release tripping after Z1 time delay expired. After receiving permissive signal with ZPilot element pickup, a tripping signal will be released. The signal transmission element for PUTT is set according to underreaching mode, so current reversal need not be considered. For PUTT, there may be a dead zone under weak power source condition. If the fault occurs outside Z1 zone at strong power source side, Z1 at weak power supply side may not operate to trip and transmit permissive signal, and pilot distance protection will not operate. Therefore, the system fault can only be removed by Z2 at strong power source side with time delay.
3-86
Date: 2012-08-14
3 Operation Theory
ZPilot Z2 Z1 EM M A Fault B EN
Z1
Z2 ZPilot
Relay A Z1
Relay B Z1
& ZPilot >=1 85.Op_Z 85.Op_Z
& & ZPilot
WI
WI
Figure 3.8-4 Simple schematic of PUTT
Pilot distance protection always adopts pilot channel 1, and the logic of PUTT is shown in Figure 3.8-5.
SIG
21M/21Q.Z1.Op
0ms
100ms
>=1 &
Send1
SIG
85.ExTrp 85.PUTT
0ms
150ms
SET
& & &

8ms 0ms 85.Op_Z
SIG
Enable 85.Z
SIG
FD.Pkp Valid_Recv1 ZPilot
SIG
SIG
>=1
SIG
WI
Figure 3.8-5 Logic diagram of pilot distance protection (PUTT)
3.8.2.3 Permissive Overreaching Transfer Trip (POTT) Pilot zone (ZPilot) distance element with an overreaching setting as zone 2 distance element is used for POTT scheme if selected. ZPilot will send permissive signal to remote end once it picks up and release tripping signal upon receiving permissive signal from the remote end. When POTT is applied on parallel lines arrangement and the ZPilot setting covers 50% of the
Date: 2012-08-14
3-87
3 Operation Theory
parallel line, there may be a problem under current reversal condition, settings for current reversal condition should be considered, please refer to section 3.8.2.6 for details. Under weak power source condition, the problem of dead zone at weak power source end is eliminated by the weak infeed logic, please refers to section 3.8.2.7 for details.
ZPilot Z2 Zpilot_Rev A Fault B EN
EM
N Zpilot_Rev Z2 ZPilot
Relay A ZPilot
& >=1
85.Op_Z 85.Op_Z
& >=1
Relay B ZPilot
WI
WI
Figure 3.8-6 Simple schematic of POTT

SIG
Zpilot 85.ExTrp CB open position 0ms 150ms
SIG
SIG
&
200ms 0ms
&
>=1
SIG
Valid_Recv1
&
Send1
SIG
ZPilot
& >=1
& &
t1 t2
SIG
Enable 85.Z WI
SIG
& &
85.Op_Z 8ms 0ms
SIG
FD.Pkp [85.POTT]
SET
Figure 3.8-7 Logic diagram of pilot distance protection (POTT)
Where: t1: pickup time delay of current reversal, the setting [85.t_DPU_CR1] t2: dropoff time delay of current reversal, the setting [85.t_DDO_CR1]
3-88
Date: 2012-08-14
3 Operation Theory
3.8.2.4 Blocking Permissive scheme has high security, but it relies on pilot channel seriously. Pilot distance protection will not operate when there is an internal fault with abnormal channel. Blocking scheme could be considered as an alternative. Blocking scheme takes use of pilot distance element Zpilot operation to terminate sending of blocking signal. Blocking signal will be sent once fault detector picks up without pilot zone Zpilot operation. Pilot distance protection will operate with a short time delay if pilot distance element operates and not receiving blocking signal after timer expired. The setting of pilot zone element Zpilot in Blocking scheme is overreaching, so current reversal condition should be considered. However, the short time delay of pilot distance protection has an enough margin for current reversal, that this problem has been resolved. The short time delay must consider channel delay and with a certain margin to set. As shown in Figure 3.8-8, an external fault happens to line MN. The fault is behind the device at M side, for blocking scheme, the device at M side will send blocking signal to the device at N side. If channel delay is too long, the device at side N has operated before receiving blocking signal. Hence, the time delay of pilot distance protection adopted in blocking scheme should be set according to channel delay.
Blocking signal EM Fault M A B N EN
Figure 3.8-8 Simple schematic of system fault
For blocking scheme, pilot distance protection will operate when there is an internal fault with abnormal channel, however, it is possible that pilot distance protection issue an undesired trip when there is an external fault with abnormal channel.
ZPilot
EM
Zpilot_Rev A Fault B EN
Zpilot_Rev ZPilot

Date: 2012-08-14
3-89
3 Operation Theory
Relay A FD.Pkp Relay B
&
&
FD.Pkp
Zpilot
&
[85.t_DPU_Blocking1] 85.Op_Z 85.Op_Z [85.t_DPU_Blocking1]
&
Zpilot
Figure 3.8-9 Simple schematic of blocking
SIG
Zpilot 85.ExTrp 0ms 150ms
SIG
&
SIG
>=1
CB open position
&
200ms 0ms
SIG
Valid_Recv1
& &
Send1
SIG
FWD_ZPilot
>=1 &
[85.t_DPU_Blocking1] 85.Op_Z
SIG
WI FD.Pkp 85.Blocking
SIG
SET
&
SIG
Enable 85.Z
Figure 3.8-10 Logic diagram of pilot distance protection (Blocking)
Current reversal logic is only used for permissive scheme. For blocking scheme, the time delay of pilot distance protection has enough margin for current reversal, so current reversal need not be considered. 3.8.2.5 Unblocking Permissive scheme will trip only when it receives permissive signal from the remote end. However, it may not receive permissive signal from the remote end when pilot channel fails. For this case, pilot distance protection can adopt unblocking scheme. Under normal conditions, the signaling equipment works in the pilot frequency, and when the device operates to send permissive signal, the signaling equipment will be switched to high frequency. While pilot channel is blocked, the signaling equipment will receive neither pilot frequency signal nor high frequency signal. The signaling equipment will provide a contact to the device as unblocking signal. When the device receives unblocking signal from the signaling equipment, it will recognize channel failure, and unblocking signal will be taken as permissive signal temporarily. The unblocking function can only be used together with PUTT and POTT.
3-90
Date: 2012-08-14
3 Operation Theory
SIG
[85.En_Unblocking1] 85.Unblocking1 [85.t_Unblocking1] 0ms
& &
SIG
SIG
Detecting multi-phase fault
>=1 &
Unblocking1 Valid
EN
[85.Opt_PilotCh1] Pilot distance forward element
SIG
Figure 3.8-11 Logic diagram of pilot distance protection (Unblocking)
3.8.2.6 Current Reversal When there is a fault in one of the parallel lines, the direction of the fault current may change during the sequence tripping of the circuit breaker at both ends as shown in Figure 3.8-12: When a fault occurs on line CD near breaker D, the fault current through line A-B to D will flow from A to B. When breaker D is tripped, but breaker C is not tripped, the fault current in line A-B will then flow from B to A. This process is the current reversal.
M Strong source EM A B N Weak source EN M A EM C D B EN N
Direction of fault current flow before CBDopen
Direction of fault current flow after CBDopen
Figure 3.8-12 Current reversal
As shown above, the device A judges a forward fault while the device B judges a reverse fault before break D is tripped. However, the device A judges a reverse fault while the device B judges a forward fault after breaker D is tripped. There is a competition between pickup and drop off of pilot zones in the device A and the device B when the fault measured by the device A changes from forward direction into reverse direction and vice versa for the device B. There may be maloperation for the device in line A-B if the forward direction of the device B has operated but the forward direction of the device A drops off slightly slower or the forward direction of the device B has operated but the forward direction information of the device A is still received due to the channel delay (the permissive signal is received). In general, the following two methods shall be adopted to solve the problem of current reversal: 1. The fault shall be measured by means of the reverse element of the device B. Once the reverse element of the device B operates, the send signals and the tripping circuit will be blocked for a period of time after a short time delay. This method can effectively solve the problem of competition between the device A and the device B, but there shall be a precondition. The reverse element of the device B must be in cooperation with the forward element of the device A, i.e. in case of a fault in adjacent lines, if the forward element of the
3-91
Date: 2012-08-14
3 Operation Theory
device A operates, and the reverse element of the device B must also operate. Once the bilateral cooperation fails, the anticipated function cannot be achieved. In addition, the blocking time for sending signals and the tripping circuit after the reverse element of the device B operates shall be set in combination with the channel time delay. 2. Considering the pickup and drop off time difference of distance elements and the channel time delay between the device A and the device B, the maloperation due to current reversal shall be eliminated by setting the time delay. The reverse direction element of the device is not required for this method, the channel time delay and the tripping time of adjacent breaker shall be taken into account comprehensively.
This protection device adopts the second method to eliminate the maloperation due to current reversal.
SIG
Pilot forward zone start condition
&
t1 t2 Current reversal blocking
SIG
Signal received conditon
Figure 3.8-13 Logic diagram of current reversal blocking
t1: [85.t_DPU_CR1] t2: [85.t_DDO_CR1] Referring to above figure, when signal from the remote end is received without pilot forward zone pickup, the current reversal blocking logic is enabled after t1 delay. The time delay of t1 [85.t_DPU_CR1] shall be set the shortest possible but allowing sufficient time for pilot forward zone pickup, generally set as 25ms. Once the current reversal logic is enabled, the healthy line device B transfer tripping is blocked. The logic will be disabled by either the dropoff of signal or the pickup of pilot forward zone. A time delay t2 [85.t_DDO_CR1] is required to avoid maloperation for the case that the pilot forward zone (or forward element of pilot directional earth-fault protection) of device B picks up before the signal from device A drops off. Considering the channel propagation delay and the pickup and drop-off time difference of pilot forward zone (or pilot directional earth-fault element) with margin, t2 is generally set between 25ms ~ 40ms. Because the time delay of pilot distance protection has an enough margin to current reversal, current reversal blocking only used for permissive scheme not blocking scheme. 3.8.2.7 Weak Infeed In case of a fault in line at one end of which there is a weak power source, the fault current supplied to the fault point from the weak power source is very small or even nil, and the conventional distance element could not operate. The weak infeed logic combines the protection information from the strong power source end and the electric feature of the local end to cope with the case.
3-92
Date: 2012-08-14
3 Operation Theory
ZPilot Z1 EM M A Fault B Zpilot_Rev EN
Zpilot_Rev
Z1
ZPilot Load
Figure 3.8-14 Line fault description
The device has options for weak infeed echo only or weak infeed echo with weak infeed tripping. The weak infeed logic can be applied together with unblocking logic for PUTT and POTT. When the weak infeed logic is enabled, distance forward and reverse element and direction element of directional earth-fault protection do not operate with the voltage lower than the setting [85.U_UV_WI] after the device picks up, upon receiving signal from remote end, the weak infeed logic will echo the signal back to remote end for 200ms if the weak infeed echo is enabled, the weak infeed end will echo signal and release tripping according to the logic. ZPilot_Rev at weak source end must coordinate with ZPilot_Set of the remote end. The coverage of ZPilot_Rev must exceed that of ZPilot_Set of the remote end. ZPilot_Rev only activates in the protection calculation when the weak infeed logic is enabled. In case of the weak infeed logic not enabled, the setting coordination is not required. If the device does not pick up, and the weak infeed logic is enabled, upon receiving signal from remote end with the voltage lower than the setting [85.U_UV_WI], the weak infeed logic will echo back to remote end for 200ms. When either weak infeed echo or weak infeed tripping is enabled, then the weak infeed logic is deemed to be enabled. During the device picking up, the weak infeed logic is shown in Figure 3.8-15.
SIG
Valid_Recv1 Pilot DEF forward direction
SIG
>=1 & >=1 &

Forward direction (WI)
SIG
Pilot DEF reverse direction Pilot distance forward direction
SIG
SIG
Pilot distance reverse direction [85.En_WI] Up<[85.U_UV_WI]
EN
SET
>=1
200ms
0ms
&
SET
Upp<[85.U_UV_WI]
Figure 3.8-15 Weak infeed logic during pickup

Date: 2012-08-14
3-93
3 Operation Theory
If the device does not pick up, the weak infeed logic is shown as the following figure:
SIG
Signal receive condition
& &
WI echo
EN
[85.En_WI] Up<[85.U_UV_WI]
SET
>=1
200ms 0ms
&
SET
Upp<[85.U_UV_WI]
Figure 3.8-16 Weak infeed logic without pickup
For permissive scheme, the signal receive condition means that the permissive signal is received or the unblocking signal is valid. 3.8.2.8 CB Echo A feature is also provided which enables fast tripping to be maintained along the whole length of the protected line, even when one terminal is open. The device will initiate sending a pulse of 200ms permissive signal when signal receive condition is met during CB is in open position.
SIG
FD.Pkp
& &
200ms 0ms
SIG
CB open position Valid_Recv1
&
Send permissive signal
SIG
&
EN
85.POTT
Figure 3.8-17 Simplified CB Echo logic for POTT
CB Echo logic is only applied to permissive overreach mode not underreach mode, and it is processed without the device pickup. This logic will be terminated immediately once the device picks up.
3-94
Date: 2012-08-14
3 Operation Theory

85 85.Z.En1 85.Z.En2 85.Z.Blk 85.Abnor_Ch1 85.Rcv1 85.RcvB 85.RcvC 85.ExTrp 85.Unblocking1 85.ZX.En1 85.ZX.En2 85.ZX.Blk1 85.ZX.Blk2 79.Ready 85.Op_Z 85.Send1 85.SendB 85.SendC 85.Op_ZX
3.8.4 I/O Signals

Table 3.8-1 I/O signals of pilot distance protection No. 1 Input Signal 85.Z.En1 Description Pilot distance protection enabling input 1, it is triggered from binary input or programmable logic etc. Pilot distance protection enabling input 2, it is triggered from binary input or programmable logic etc. Pilot distance protection blocking input, it is triggered from binary input or programmable logic etc. Input signal of indicating that pilot channel 1 is abnormal Input signal of receiving permissive signal via channel No.1, or input signal of 5 85.Recv1 receiving permissive signal of A-phase via channel No.1 (only for
85.Z.En2
3 4
85.Z.Blk 85.Abnor_Ch1
phase-segregated command scheme) 6 85.RecvB Input signal of receiving permissive signal of B-phase via channel No.1 (only for phase-segregated command scheme) Input signal of receiving permissive signal of C-phase via channel No.1 (only for phase-segregated command scheme) Input signal of initiating sending permissive signal from external tripping signal
7 8
85.RecvC 85.ExTrp

Date: 2012-08-14
3-95
3 Operation Theory
9 10 85.Unblocking1 85.ZX.En1 Unblocking signal 1 Zone Extension enabling input 1, it is triggered from binary input or programmable logic etc. Zone Extension enabling input 2, it is triggered from binary input or programmable logic etc. Zone Extension blocking input 1, it is triggered from binary input or programmable logic etc. Zone Extension blocking input 2, it is triggered from binary input or programmable logic etc. AR has been ready for reclosing cycle. Description Pilot distance protection operates. Output signal of sending permissive signal 1 or sending A-phase permissive signal (only for phase-segregated command scheme) Output signal of sending B-phase permissive signal (only for phase-segregated command scheme) Output signal of sending C-phase permissive signal (only for phase-segregated command scheme) Zone extension protection operates. Zone extension protection starts
11
85.ZX.En2
12
85.ZX.Blk1
13 14 No. 1 2
85.ZX.Blk2 79.Ready Output Signal 85.Op_Z 85.Send1
85.SendB
4 5 6
85.SendC 85.Op_ZX 85.Op_ZX_St
3.8.5 Settings
Table 3.8-2 Settings of pilot distance protection No. Name Range Step Unit Remark Option of pilot scheme 1 85.Opt_PilotMode 0~2 1 0: POTT 1: PUTT 2: Blocking Option of phase-segregated
signal scheme or three-phase 2 85.Opt_Ch_PhSeg 0 or 1 signal scheme 0: three-phase signal scheme 1: phase-segregated signal
scheme Enabling/disabling weak infeed 3 85.En_WI 0 or 1 scheme 0: disable 1: enable 4 85.U_UV_WI 0~Unn 0.001 V Undervoltage setting of weak infeed logic Enabling/disabling 5 85.Z.En 0 or 1 distance protection 0: disable pilot
3-96
Date: 2012-08-14
3 Operation Theory
1: enable Enabling/disabling unblocking 6 85.En_Unblocking1 0 or 1 scheme 0: disable 1: enable Time 7 85.t_DPU_Blocking1 0.000~1.000 0.001 s scheme delay of for pilot blocking distance
protection operation 8 85.t_DDO_CR1 0.000~1.000 0.001 s Time delay dropoff for current reversal logic Time delay pickup for current reversal logic Enabling/disabling 10 85.En_ZX 0 or 1 extension protection 0: disable 1: enable 11 85.t_DPU_ZX 0.000~10.000 0.001 s Pickup time delay for zone extension protection operation zone
85.t_DPU_CR1
0.000~1.000
0.001
Table 3.8-3 Internal settings of pilot distance protection No. 1 Name 85.t_Unblocking1 Default Value 0.1 Unit s Remark Pickup time delay of unblocking scheme for pilot channel 1 Option of PLC channel for pilot channel 1 2 85.Opt_PilotCh1 1 0: phase-to-phase channel 1: phase-to-ground channel
3.9 Pilot Directional Earth-fault Protection

Directional earth fault protection needs to coordinate with downstream protection with definite or inverse time delay so it cannot clear an internal fault quickly. Pilot directional earth-fault protection takes use of directional earth fault elements on both ends, it can detect high resistance fault and maintain high-speed operation. Pilot protection requires communication channel to exchange the protection information at both ends. The channel may be dedicated or multiplexed channel through optical fiber or any other communication media. Pilot directional earth-fault protection can be used independently, for example, no distance protection is equipped with the device but fast operation is required for the whole line, or it is used as backup protection of pilot distance protection to enhance the sensitivity for an earth fault with high fault resistance.

Date: 2012-08-14
3-97
3 Operation Theory

Sending permissive signal (or terminating sending signal) to the opposite end is controlled by forward direction element. Current reversal logic is available for parallel line operation and CB echo logic is provided once pilot directional earth fault protection is enabled. Current reversal logic is only used for permissive scheme. For blocking scheme, current reversal need not be considered because there is a settable time delay in pilot directional earth-fault protection. Pilot directional earth-fault protection can be enabled or disabled by input signals, logic setting and blocking signal, as shown in Figure 3.9-1.
SIG
85.DEF.En1 85.DEF.En2 [85.DEF.En] 85.DEF.Blk
& &
Enable 85.DEF
SIG
EN
SIG
Figure 3.9-1 Enabling/disabling logic of pilot directional earth-fault protection
Pilot directional earth-fault protection comprises permissive scheme and blocking scheme. It can share pilot channel 1 ([85.DEF.En_IndepCh]=0) with pilot distance protection, or uses independent pilot channel 2 ([85.DEF.En_IndepCh]=1) by setting logic setting [85.DEF.En_IndepCh]. For underreach mode, pilot directional earth-fault always adopts independent pilot channel 2. The logic of receiving signal is shown in Figure 3.9-2.
SET
85.Blocking
& >=1
SIG
85.Recv1
&
SIG
85.Abnor_Ch1 Unblocking1 Valid 85.PUTT
SIG
& >=1 >=1

Valid_Recv_DEF
SET
EN
[85.DEF.En_IndepCh] 85.Blocking
SET
& >=1
&
SIG
85.Recv2
&
SIG
85.Abnor_Ch2 Unblocking2 Valid
SIG
Figure 3.9-2 Logic diagram of receiving signal
3-98
Date: 2012-08-14
3 Operation Theory
SIG
FWD_ROC
&
85.FWD_DEF_Pilot
SIG
3I0>[85.DEF.3I0_Set]
SIG
REV_ROC
&
85.REV_DEF_Pilot
SIG
FD.ROC.Pkp
Figure 3.9-3 Forward/reverse direction of zero-sequence power
FWD_ROC: The forward direction of zero-sequence power. REV_ROC: The reverse direction of zero-sequence power. 3.9.2.1 Permissive Transfer Trip (PTT) Pilot protection with permissive scheme receives permissive signal from the device of remote end, so as to combine with local discrimination condition to accelerate tripping, so it has high security. Operation of forward directional earth fault element is used to send permissive signal to the remote end when the protection is enabled and will release tripping signal upon receiving permissive signal from the remote end with further guarded by no operation of reverse directional earth fault element. This ensures the security of the protection. The following figure shows the schematic of permissive transfer trip.
FWD_DEF_Pilot Rev_DEF_Pilot A Fault B EN
EM
Rev_DEF_Pilot FWD_DEF_Pilot
Relay A FWD_DEF_Pilot
&
85.DEF.t_DPU 85.Op_DEF 85.Op_DEF 85.DEF.t_DPU
&
FWD_DEF_Pilot Relay B
Figure 3.9-4 Simple schematic of DEF (permissive scheme)
For blocking scheme, pilot directional earth-fault protection will operate when there is an internal fault with abnormal channel, however, it is possible that pilot directional earth-fault protection issue an undesired trip when there is an external fault with abnormal channel.

Date: 2012-08-14
3-99
3 Operation Theory
SIG
[85.ExTrp]
0ms
150ms
&
SIG
>=1
CB open position
&
200ms 0ms
SIG
Valid_Recv_DEF FD.Pkp FWD_DEF_Pilot
&
85.Send_DEF
SIG
SIG
& & &

t1 t2
SIG
REV_DEF_Pilot Valid_Recv_DEF
SIG
&
SIG
FD.Pkp 85.PUTT
SET
>=1 & &

[85.DEF.t_DPU]
SET
85.POTT Enable 85.DEF
SIG
& >=1
85.Op_DEF
&
EN
85.DEF.En_IndepCh
Figure 3.9-5 Logic diagram of DEF (permissive scheme)
t1: pickup time delay of current reversal t2: dropoff time delay of current reversal When adopting independent pilot channel 2, settings of t1 [85.t_DDO_CR2] should be considered individually from channel 1. [85.t_DPU_CR2] and t2
When sharing pilot channel 1 with pilot distance protection, t1 and t2 are the settings [85.t_DPU_CR1] and [85.t_DDO_CR1] respectively. 3.9.2.2 Blocking Permissive scheme has high security, but it relies on pilot channel seriously. Pilot directional earth-fault protection will not operate when there is an internal fault with abnormal channel. Blocking scheme could be considered as an alternative. Blocking scheme sends blocking signal when fault detector picks up if and zero-sequence forward element does not operate or both zero-sequence forward element and zero-sequence reverse element do not operate. Pilot directional earth-fault protection will operate if forward directional zero-sequence overcurrent element operates and not receiving blocking signal.
3-100
Date: 2012-08-14
3 Operation Theory
FWD_DEF_Pilot Rev_DEF_Pilot A Fault B EN
EM
Rev_DEF_Pilot FWD_DEF_Pilot
Relay A Pkp_FD_Prot
Relay B Pkp_FD_Prot
&
REV_DEF_Pilot
& &
REV_DEF_Pilot
&
FWD_DEF_Pilot
FWD_DEF_Pilot
& &
[t_DEF_PilotP] 85.Op_DEF 85.Op_DEF
& &
[t_DEF_PilotP]
Figure 3.9-6 Simple schematic of blocking

SIG
85.TRIPOUT 0ms 150ms
>=1 >=1 &

Send_DEF
SIG
85.ExTrp CB open position
SIG
SIG
Valid_Recv_DEF FWD_DEF_Pilot
& & &

[85.DEF.t_DPU] 85.Op_DEF
SIG
SIG
REV_DEF_Pilot FD.Pkp 85.Blocking
SIG
SET
&
SIG
Enable 85.DEF
Figure 3.9-7 Logic diagram of DEF (Blocking scheme)
When DEF shares pilot channel 1 with pilot distance protection, time delay of pilot directional earth-fault protection will change from the setting [85.DEF.t_DPU] to the setting [85.t_DPU_Blocking1]. Because the time delay of pilot directional earth-fault protection has enough margin for current reversal, so blocking scheme should not consider the current reversal condition.

Date: 2012-08-14
3-101
3 Operation Theory
3.9.2.3 Unblocking Permissive scheme will operate only when it receives permissive signal from the remote end. However, it may not receive permissive signal from the remote end when pilot channel fails. For this case, pilot directional earth-fault protection can adopt unblocking scheme. Under normal conditions, the signaling equipment works in the pilot frequency, and when the device operates to send permissive signal, the signaling equipment will be switched to high frequency. While the channel is blocked, the signaling equipment will receive neither pilot frequency signal nor high frequency signal. The signaling equipment will provide a contact to the device as unblocking signal. When the device receives unblocking signal from the signaling equipment, it will recognize channel failure, and unblocking signal will be taken as permissive signal temporarily. The unblocking scheme can only be used together with permissive scheme.
EN
[85.En_Unblocking2]
& &
[85.t_Unblocking2] 0ms
BI
85.Unblocking2
SIG
Selection of multi-phase
>=1 &
Unblocking2 Valid
EN
[85.Opt_PilotCh2] Pilot DEF forward detection
SIG
Figure 3.9-8 Logic diagram for unblocking
3.9.2.4 Current Reversal The reach of directional earth-fault protection is difficult to define. There may have problem for pilot direction earth-fault protection applied on parallel line arrangement due to current reversal phenomenon. Current reversal blocking logic using time delay method is adopted in the device. It is the same logic as pilot distance protection. Please refer to section 3.8.2.6 for details. The only difference is that different signal receive terminal is used if independent channel is selected. 3.9.2.5 CB Echo It is the same logic as pilot distance protection. Please refer to section 3.8.2.8 for details. The only difference is that different signal receive terminal is used if independent channel is selected.
3-102
Date: 2012-08-14
3 Operation Theory

85 85.DEF.En1 85.DEF.En2 85.DEF.Blk 85.Abnor_Ch1 85.Abnor_Ch2 85.Rcv1 85.Rcv2 85.ExTrp 85.Unblocking1 85.Unblocking2 85.Op_DEF 85.DEF_BlkAR 85.Send1 85.Send2
3.9.4 I/O Signals

Table 3.9-1 I/O signals of pilot directional earth-fault protection No. 1 Input Signal 85.DEF.En1 Description Pilot directional earth-fault protection enabling input 1, it is triggered from binary input or programmable logic etc. Pilot directional earth-fault protection enabling input 2, it is triggered from binary input or programmable logic etc. Pilot directional earth-fault protection blocking input, it is triggered from binary input or programmable logic etc. Input signal of indicating that pilot channel 1 is abnormal Input signal of indicating that pilot channel 2 is abnormal Input signal of receiving permissive signal via channel 1 Input signal of receiving permissive signal via channel 2 Input signal of initiating sending permissive signal from external tripping signal Unblocking signal 1 Unblocking signal 2 Description Pilot directional earth-fault protection operates. Output signal of sending permissive signal 1 when pilot directional earth-fault protection sharing pilot channel 1 with pilot distance protection Output signal of sending permissive signal 2 only for pilot directional earth-fault protection adopting independent pilot channel 2
85.DEF.En2
3 4 5 6 7 8 9 10 No. 1 2
85.DEF.Blk 85.Abnor_Ch1 85.Abnor_Ch2 85.Recv1 85.Recv2 85.ExTrp 85.Unblocking1 85.Unblocking2 Output Signal 85.Op_DEF 85.Send1
85.Send2

Date: 2012-08-14
3-103
3 Operation Theory
3.9.5 Settings
Table 3.9-2 Settings of pilot directional earth-fault protection No. Name Range Step Unit Remark Enabling/disabling pilot directional 1 85.DEF.En 0 or 1 earth-fault protection 0: disable 1: enable Enabling/disabling pilot directional earth-fault protection operate to block AR 2 85.DEF.En_BlkAR 0 or 1 0: selective phase tripping and not blocking AR 1: three-phase tripping and blocking AR Enabling/disabling channel for pilot independent directional
earth-fault protection 3 85.DEF_En_IndepCh 0 or 1 0: pilot directional earth-fault
protection sharing same channel with pilot distance protection 1: pilot directional earth-fault
adopting independent pilot channel Enabling/disabling unblocking
scheme for pilot DEF via pilot 4 85.En_Unblocking2 0 or 1 channel 2 0: disable 1: enable 5 85.DEF.3I0_Set (0.050~30.000)In 0.001 A Current setting of pilot directional earth-fault protection Time delay of pilot directional
85.DEF.t_DPU
0.001~10.000
0.001
earth-fault protection Time delay pickup for current
85.t_DPU_CR2
0.000~1.000
0.001
reversal logic when pilot directional earth-fault protection adopts
independent pilot channel 2 Time delay dropoff for current 8 85.t_DDO_CR2 0.000~1.000 0.001 s reversal logic when pilot directional earth-fault protection adopts
independent pilot channel 2 Table 3.9-3 Internal settings of pilot distance protection No. 1 3-104
Date: 2012-08-14
Name 85.t_Unblocking2
Default Value 0.2
Unit s
Remark Pickup time delay of unblocking scheme for pilot PCS-902 Line Distance Relay
3 Operation Theory
channel 2 Option of PLC channel for pilot channel 2 2 85.Opt_PilotCh2 1 0: phase-to-phase channel 1: phase-to-ground channel
3.10 Current Direction

Overcurrent protection is widely used in the power system as backup protection, but in some cases, the direction of current is necessary to aid to complete the selective tripping. As shown below:
L EM C Fault D M A B N EN
Figure 3.10-1 Line fault description
When line LM has an earth fault, the fault currents flowing through the relay A and the relay D are of similar magnitude in most cases. It is desirable that the fault is isolated from the power system by tripping the circuit breaker C and circuit breaker D. Hence, the overcurrent protection of relay A and relay D require to associate with current direction to fulfill selective tripping. Directional earth fault protection has a time delay due to coordinate with that of downstream so it cannot clear the fault quickly. Pilot directional earth-fault protection, which is fulfilled by directional earth fault element on both ends, it can maintain fast operation and achieve high sensitivity to detect high resistance fault.

The module computes direction of phase current and phase-to-phase current, zero-sequence current and negative-sequence current. The direction of phase current and phase-to-phase current equips with an under-voltage direction function to ensure that phase or phase-to-phase overcurrent protection has explicit directionality when the polarized voltage is too low for close up fault. The direction of zero-sequence current and negative-sequence current direction equips with an impedance compensation function to ensure that zero-sequence or negative-sequence overcurrent protection has explicit directionality when the zero-sequence voltage or the negative-sequence voltage is too low. 3.10.2.1 Phase/Phase-to-phase Current Direction By setting the characteristic angle [RCA_OC] to determine the most sensitive forward angle of phase current and phase-to-phase current, power value is calculated using phase current with phase polarized voltage or phase-to-phase current with phase-to-phase polarized voltage to
Date: 2012-08-14
3-105
3 Operation Theory
determine the direction of phase current or phase-to-phase current respectively in forward direction or reverse direction. When the power value is zero, neither forward direction nor reverse direction is considered. As shown below:
jX U
Forward direction
Reverse direction
Figure 3.10-2 Vector diagram of current and voltage
Where: is the setting [RCA_OC] is the phase angle between polarized voltage and current The power value is calculated as below: P=U[ICOS(-)] 1. 2. If P>0, the current direction polarized by U is forward direction If P<0, the current direction polarized by U is reverse direction
From above diagram can be seen, when =, P reaches to the maximum value. It is considered as the most sensitive forward direction. Hence, is called as sensitivity angle of phase overcurrent protection. 1. Polarized voltage of phase or phase-to-phase current direction
In the event of asymmetrical fault, because phase or phase-to-phase voltage may decrease to very low voltage whereas positive-sequence voltage does not, the polarized voltage of phase or phase-to-phase current direction uses positive-sequence voltage to avoid wrong direction due to too low polarized voltage. Therefore, using positive-sequence voltage as polarized voltage can ensure that the direction determination has no dead zone for asymmetrical fault. For symmetric fault, if positive-sequence voltage decreases to 15%Un, the device uses memorized positive-sequence voltage as polarized voltage, the memorized positive-sequence voltage is 1.5
3-106
Date: 2012-08-14
3 Operation Theory
cycles pre-fault positive-sequence voltage. 2. Phase or phase-to-phase current direction under normal polarized voltage condition
When using normal polarized voltage to calculate phase and phase-to-phase current direction, there are total twelve direction determination algorithm including forward direction and reverse direction.
Table 3.10-1 Direction description Direction Phase A Forward direction Reverse direction Forward direction Reverse direction Forward direction Reverse direction Forward direction Reverse direction Forward direction Reverse direction Forward direction Reverse direction Polarized Voltage U1a U1a U1b U1b U1c U1c U1ab U1ab U1bc U1bc U1ca U1ca Ia Ia Ib Ib Ic Ic Iab Iab Ibc Ibc Ica Ica Current
Phase B
Phase C
Phase AB
Phase BC
Phase CA
3.
Phase or phase-to-phase current direction for under-voltage conditions
When the symmetrical fault occurs on a power system, positive-sequence voltage may reduce to less than 0.15Un, the device will switch to phase or phase-to-phase current direction for under-voltage condition. The 1.5 cycle pre-fault positive-sequence voltage is used as polarized voltage with reverse threshold to ensure stable direction decision when three-phase voltage goes to approximately zero due to close up fault. At first, the threshold is forward offset before direction is determined, and the threshold will be reversed offset after direction is determined. 3.10.2.2 Zero-sequence/Negative-sequence Current Direction By setting the characteristic angle [RCA_ROC] and [RCA_NegOC] to determine the most sensitive forward angle of zero-sequence current and negative-sequence current, power value is calculated using zero-sequence current with zero-sequence voltage or negative-sequence current with negative-sequence voltage to determine the direction of zero-sequence current and negative-sequence current respectively in forward direction or reverse direction. When the power value is between 0 and -0.1In, neither forward direction nor reverse direction is considered.

Date: 2012-08-14
3-107
3 Operation Theory
jX 3U0
-180
-3I0
R O 3I0 Reverse direction
Forward direction
Figure 3.10-3 Vector diagram of zero-sequence power
Vector diagram of negative-sequence power is similar to that of zero-sequence power. Where: is the setting [RCA_ROC] or the setting [RCA_NegOC] is the phase angle between zero/negative-sequence voltage and zero/negative-sequence current 3I0: calculated zero-sequence current by vector sum of Ia, Ib and Ic The power value is calculated as below: P=U[ICOS(-)] 1. If P>0, the direction of zero /negative-sequence current is reverse direction If P<-0.1InVA, the direction of zero /negative-sequence current is forward direction The direction of zero-sequence current
Calculating the power value using zero-sequence current (3I0) and zero-sequence voltage (3U0) to determine the direction of zero-sequence current According to the equation:
The zero-sequence current and the zero-sequence voltage can be gained by calculation
3-108
Date: 2012-08-14
3 Operation Theory
Zero-sequence power is: P=3U0[3I0COS(-)] 2. The direction of negative-sequence current
Calculating the power value using negative-sequence current (3I2) and negative-sequence voltage (3U2) to determine the direction of negative-sequence current According to the equation:
The negative-sequence current and the negative-sequence voltage can be gained by calculation Negative-sequence power is: P=3U2[3I2COS(-)] 3. The direction of zero-sequence/negative-sequence current with impedance compensation
When zero-sequence impedance or negative-sequence impedance behind the device is very small, if the fault in forward direction happens, the measured zero-sequence voltage or negative-sequence voltage by the device may be relatively small to determine correct direction. In order to solve this problem, compensated zero-sequence voltage and negative-sequence voltage are used for power calculation. The compensation formula is as follows:
is the setting [Z0_Comp], which cannot exceed the total zero-sequence impedance of the protected line is the setting [Z2_Comp], which cannot exceed the total negative-sequence impedance of the protected line
3.10.3 I/O Signals

Table 3.10-2 I/O signals of current direction No. 1 2 3 4 5 Output Signal FWD_ROC REV_ROC FWD_NegOC REV_NegOC Forward_DIR_A, B, C Description The forward direction of zero-sequence power The reverse direction of zero-sequence power The forward direction of negative-sequence power The reverse direction of negative-sequence power The forward direction of phase current

Date: 2012-08-14
3-109
3 Operation Theory
6 7 8 Rev_DIR_A, B, C Forward_DIR_AB, BC, CA Rev_DIR_AB, BC, CA The reverse direction of phase current The forward direction of phase-to-phase current The reverse direction of phase-to-phase current
3.10.4 Settings
Table 3.10-3 Settings of current direction No. 1 Name RCA_OC Range 45.00~89.00 Step 0.01 Unit Deg Remark The characteristic angle of directional phase overcurrent element The characteristic angle of directional earth fault element The characteristic angle of directional negative-sequence overcurrent element The compensated zero-sequence
RCA_ROC
45.00~89.00
0.01
Deg
RCA_NegOC
45.00~89.00
0.01
Deg
Z0_Comp
(0.000~4Unn)/In
0.001
ohm
impedance The compensated negative-sequence
Z2_Comp
(0.000~4Unn)/In
0.001
ohm
impedance
3.11 Phase Overcurrent Protection

When a fault occurs in power system, usually the fault current would be very large and phase overcurrent protection operates monitoring fault current is then adopted to avoid further damage to protected equipment. Directional element can be selected to improve the sensitivity and selectivity of the protection. For application on feeder-transformer circuits, second harmonic can also be selected to block phase overcurrent protection to avoid the effect of inrush current on the protection.

Phase overcurrent protection has following functions: 1. Four-stage phase overcurrent protection with independent logic, current and time delay settings. All stages can be selected as definite-time or inverse-time characteristic. The inverse-time characteristic is selectable among IEC and ANSI/IEEE standard inverse-time characteristics, and a user-defined inverse-time curve is available for stage 1 of phase overcurrent protection. Direction control element can be selected to control each stage phase overcurrent protection with three options: no direction, forward direction and reverse direction. Second harmonic can be selected to block each stage of phase overcurrent protection.
2.
3.
4.
3.11.2.1 Overview Phase overcurrent protection consists of following three elements:

3-110
Date: 2012-08-14
3 Operation Theory
1. 2.
Overcurrent element: each stage is independent overcurrent element. Direction control element: one direction control element shared by all overcurrent elements, and each overcurrent element can individually select protection direction. Harmonic blocking element: one harmonic blocking element shared by all overcurrent elements and each phase overcurrent element can individually enable the output signal from harmonic element as a blocking input.
3.
3.11.2.2 Overcurrent Element The operation criterion for each stage of overcurrent element is: Ip> [50/51Px.I_Set] Where: Ip is measured phase current. [50/51Px.I_Set] is the current setting of stage x (x=1, 2, 3, or 4) of overcurrent element. 3.11.2.3 Direction Control Element Please refer to section 3.10 for details. 3.11.2.4 Harmonic Blocking Element When phase overcurrent protection is used to protect feeder transformer circuits harmonic blocking function can be selected for each stage of phase overcurrent element by configuring logic setting [50/51Px.En_Hm2] (x=1, 2, 3 or 4) to prevent maloperation due to inrush current. When the percentage of second harmonic component to fundamental component of any phase current is greater than the setting [50/51P.K_Hm2], harmonic blocking element operates to block stage x overcurrent element if corresponding logic setting [50/51Px.En_Hm2] enabled. Operation criterion:
Equation 3.11-2 Equation 3.11-1
Where: is second harmonic of phase current
is fundamental component of phase current. [50/51P.K_Hm2] is harmonic blocking coefficient. If fundamental component of any phase current is lower than the minimum operating current (0.1In), then harmonic calculation is not carried out and harmonic blocking element does not operate.

Date: 2012-08-14
3-111
3 Operation Theory
3.11.2.5 Characteristic Curve All stages can be selected as definite-time or inverse-time characteristic, inverse-time operating characteristic is as follows.
Where: Iset is current setting [50/51Px.I_Set]. Tp is time multiplier setting [50/51Px.TMS]. is a constant. K is a constant. C is a constant. I is measured phase current from line CT The user can select the operating characteristic from various inverse-time characteristic curves by setting [50/51Px.Opt_Curve], and parameters of available characteristics for selection are shown in the following table.
Table 3.11-1 Inverse-time curve parameters 50/51Px.Opt_Curve 0 1 2 3 4 5 6 7 8 9 10 11 12 13 Time Characteristic Definite time IEC Normal inverse IEC Very inverse IEC Extremely inverse IEC Short-time inverse IEC Long-time inverse ANSI Extremely inverse ANSI Very inverse ANSI Inverse ANSI Moderately inverse ANSI Long-time extremely inverse ANSI Long-time very inverse ANSI Long-time inverse Programmable user-defined 0.14 13.5 80.0 0.05 120.0 28.2 19.61 0.0086 0.0515 64.07 28.55 0.086 0.02 1.0 2.0 0.04 1.0 2.0 2.0 0.02 0.02 2.0 2.0 0.02 0 0 0 0 0 0.1217 0.491 0.0185 0.114 0.25 0.712 0.185 K C
If all available curves do not comply with user application, user may set [50/51Px.Opt_Curve] as 13 to customize the inverse-time curve characteristic with constants , K and C. (only stage 1) When inverse-time characteristic is selected, if calculated operating time is less than setting [50/51Px.tmin], then the operating time of the protection changes to the value of setting
3-112
Date: 2012-08-14
3 Operation Theory
[50/51Px.tmin] automatically. Define-time or inverse-time phase overcurrent protection drops off instantaneously after fault current disappears.

50/51Px 50/51Px.En1 50/51Px.En2 50/51Px.Blk 50/51Px.StA 50/51Px.StB 50/51Px.StC 50/51Px.St 50/51Px.Op
3.11.4 I/O Signals

Table 3.11-2 I/O signals of phase overcurrent protection No. 1 Input Signal 50/51Px.En1 Description Stage x of phase overcurrent protection enabling input 1, it is triggered from binary input or programmable logic etc. Stage x of phase overcurrent protection enabling input 2, it is triggered from binary input or programmable logic etc. Stage x of phase overcurrent protection blocking input, it is triggered from binary input or programmable logic etc. Three-phase current input Three-phase voltage input Description Stage x of phase overcurrent protection operates. Stage x of phase overcurrent protection starts. Stage x of phase overcurrent protection starts (A-Phase). Stage x of phase overcurrent protection starts (B-Phase). Stage x of phase overcurrent protection starts (C-Phase).
50/51Px.En2
3 4 5 No. 1 2 3 4 5
50/51Px.Blk I3P U3P Output Signal 50/51Px.Op 50/51Px.St 50/51Px.StA 50/51Px.StB 50/51Px.StC

Date: 2012-08-14
3-113
3 Operation Theory
3.11.5 Logic
SET
Ia>[50/51Px.I_Set] Ib>[50/51Px.I_Set] Ic>[50/51Px.I_Set] [50/51Px.En] & [50/51Px.En1] [50/51Px.En2]
& [50/51Px.StA]
SET
SET
EN
& [50/51Px.StB]
SIG
SIG
&
SIG
[50/51Px.Blk] [50/51Px.Opt_Dir]=1
[50/51Px.StC]
SET
&
&
SIG
Forward DIR [50/51Px.Opt_Dir]=2
>=1
[50/51Px.St] Timer t t
SET
& >=1
SIG
Reverse DIR [50/51Px.Opt_Dir]=0 I3P 2nd Hm Detect
[50/51Px.Op]
SET
SIG
&
SET
[50/51Px.En_Hm2]
Figure 3.11-1 Logic diagram of phase overcurrent protection
Where: x=1, 2, 3, 4
3.11.6 Settings
Table 3.11-3 Settings of phase overcurrent protection No. Name Range Step Unit Setting 1 50/51P.k_Hm2 0.000~1.000 0.001 of for Remark second blocking harmonic phase
component
overcurrent elements 2 50/51P1.I_Set (0.050~30.000)In 0.001 A Current setting for stage 1 of phase overcurrent protection Time delay for stage 1 of phase overcurrent protection Enabling/disabling stage 1 of phase 4 50/51P1.En 0 or 1 overcurrent protection 0: disable 1: enable Enabling/Disabling 5 50/51P1.En_BlkAR 0 or 1 auto-reclosing
50/51P1.t_Op
0.000~20.000
0.001
blocked when stage 1 of phase overcurrent protection operates
3-114
Date: 2012-08-14
3 Operation Theory
0: disable 1: enable Direction option for stage 1 of phase overcurrent protection 6 50/51P1.Opt_Dir 0, 1 or 2 0: no direction 1: forward direction 2: reverse direction Enabling/disabling second harmonic blocking 7 50/51P1.En_Hm2 0 or 1 for stage 1 of phase
overcurrent protection 0: disable 1: enable Option of characteristic curve for
50/51P1.Opt_Curve
0~13
stage
of
phase
overcurrent
protection Time multiplier setting for stage 1 of 9 50/51P1.TMS 0.010~200.000 0.001 inverse-time protection Minimum operating time for stage 1 of 10 50/51P1.tmin 0.000~20.000 0.001 s inverse-time protection Constant 11 50/51P1.Alpha 0.010~5.000 0.001 customized characteristic protection Constant 12 50/51P1.C 0.000~20.000 0.001 customized characteristic protection Constant 13 50/51P1.K 0.050~20.000 0.001 customized characteristic protection 14 50/51P2.I_Set (0.050~30.000)In 0.001 A Current setting for stage 2 of phase overcurrent protection Time delay for stage 2 of phase overcurrent protection Enabling/disabling stage 2 of phase 16 50/51P2.En 0 or 1 overcurrent protection 0: disable 1: enable Enabling/Disabling 17 50/51P2.En_BlkAR 0 or 1 auto-reclosing phase K for stage 1 of phase C for stage 1 of phase for stage 1 of phase overcurrent phase overcurrent
inverse-time overcurrent
15
50/51P2.t_Op
0.000~20.000
0.001
blocked when stage 2 of phase overcurrent protection operates

Date: 2012-08-14
3-115
3 Operation Theory
0: disable 1: enable Direction option for stage 2 of phase overcurrent protection 18 50/51P2.Opt_Dir 0, 1 or 2 0: no direction 1: forward direction 2: reverse direction Enabling/disabling second harmonic blocking 19 50/51P2.En_Hm2 0 or 1 for stage 2 of phase
20
50/51P2.Opt_Curve
0~12
stage
of
phase
overcurrent
protection Time multiplier setting for stage 2 of 21 50/51P2.TMS 0.010~200.000 0.001 inverse-time protection. Minimum operating time for stage 2 of 22 50/51P2.tmin 0.000~20.000 0.001 s inverse-time protection 23 50/51P3.I_Set (0.050~30.000)In 0.001 A Current setting for stage 3 of phase overcurrent protection Time delay for stage 3 of phase overcurrent protection Enabling/disabling stage 3 of phase 25 50/51P3.En 0 or 1 overcurrent protection 0: disable 1: enable Enabling/Disabling auto-reclosing phase overcurrent phase overcurrent
24
50/51P3.t_Op
0.000~20.000
0.001
blocked when stage 3 of phase 26 50/51P3.En_BlkAR 0 or 1 overcurrent protection operates 0: disable 1: enable Direction option for stage 3 of phase overcurrent protection 27 50/51P3.Opt_Dir 0, 1 or 2 0: no direction 1: forward direction 2: reverse direction Enabling/disabling second harmonic blocking 28 50/51P3.En_Hm2 0 or 1 for stage 3 of phase
overcurrent protection 0: disable 1: enable
3-116
Date: 2012-08-14
3 Operation Theory
Option of characteristic curve for 29 50/51P3.Opt_Curve 0~12 stage 3 of phase overcurrent
protection Time multiplier setting for stage 3 of 30 50/51P3.TMS 0.010~200.000 0.001 inverse-time protection. Minimum operating time for stage 3 of 31 50/51P3.tmin 0.000~20.000 0.001 s inverse-time protection 32 50/51P4.I_Set (0.050~30.000)In 0.001 A Current setting for stage 4 of phase overcurrent protection Time delay for stage 4 of phase overcurrent protection Enabling/disabling stage 4 of phase 34 50/51P4.En 0 or 1 overcurrent protection 0: disable 1: enable Enabling/Disabling auto-reclosing phase overcurrent phase overcurrent
33
50/51P4.t_Op
0.000~20.000
0.001
blocked when stage 4 of phase 35 50/51P4.En_BlkAR 0 or 1 overcurrent protection operates 0: disable 1: enable Direction option for stage 4 of phase overcurrent protection 36 50/51P4.Opt_Dir 0, 1 or 2 0: no direction 1: forward direction 2: reverse direction Enabling/disabling second harmonic blocking 37 50/51P4.En_Hm2 0 or 1 for stage 4 of phase
38
50/51P4.Opt_Curve
0~12
stage
of
phase
overcurrent
protection Time multiplier setting for stage 4 of 39 50/51P4.TMS 0.010~200.000 0.001 inverse-time protection. Minimum operating time for stage 4 of 40 50/51P4.tmin 0.010~20.000 0.001 s inverse-time protection phase overcurrent phase overcurrent

Date: 2012-08-14
3-117
3 Operation Theory
3.12 Earth Fault Protection

During normal operation of power system, there is trace residual current, whereas a fault current flows to earth will result in greater residual current. Therefore, residual current is adopted for the calculation of earth fault protection. In order to improve the selectivity of earth fault protection in power grid with multiple power sources, directional element can be selected to control earth fault protection. For application on line-transformer unit, second harmonic also can be selected to block earth fault protection to avoid the effect of sympathetic current on the protection.

Earth fault protection has following functions: 1. 2. Four-stage earth fault protection with independent logic, current and time delay settings. All stages can be selected as definite-time or inverse-time characteristic. The inverse-time characteristic is selectable, among IEC and ANSI/IEEE standard inverse-time characteristics, and a user-defined inverse-time curve is available for stage 1 of earth fault protection. Directional element can be selected to control each stage of earth fault protection with three options: no direction, forward direction and reverse direction. Second harmonic can be selected to block each stage of earth fault protection.
3.
4.
3.12.2.1 Overview Earth fault protection consists of following three elements: 1. 2. Overcurrent element: each stage equipped with one independent overcurrent element. Directional control element: one direction control element shared by all overcurrent elements, and each overcurrent element can individually select protection direction. Harmonic blocking element: one harmonic blocking element shared by all overcurrent elements and each overcurrent element can individually enable the output signal of harmonic blocking element as a blocking input.
3.
3.12.2.2 Directional Earth-fault Element The operation criterion for each stage of earth fault protection is: 3I0>[50/51Gx.3I0_Set] Where: 3I0 is the calculated residual current. [50/51Gx.3I0_Set] is the current setting of stage x (x=1, 2, 3, or 4) of earth fault protection.
Equation 3.12-1
3-118
Date: 2012-08-14
3 Operation Theory
3.12.2.3 Direction Control Element Please refer to section 3.10 for details. 3.12.2.4 Harmonic Blocking Element In order to prevent effects of inrush current on earth fault protection, harmonic blocking function can be selected for each stage of earth fault element by configuring logic setting [50/51Gx.En_Hm2] (x=1, 2, 3 or 4). When the percentage of second harmonic component to fundamental component of residual current is greater than the setting [50/51G.K_Hm2], harmonic blocking element operates to block stage x of earth fault protection if corresponding logic setting [50/51Gx.En_Hm2] is enabled Operation criterion:
Equation 3.12-2
Where: is second harmonic of residual current
is fundamental component of residual current. [50/51G.K_Hm2] is harmonic blocking coefficient. If fundamental component of residual current is lower than the minimum operating current (0.1In) then harmonic calculation is not carried out and harmonic blocking element does not operate. 3.12.2.5 Characteristic Curve All 4 stages earth fault protection can be selected as definite-time or inverse-time characteristic, and inverse-time operating time curve is as follows.
Equation 3.12-3
Where: Iset is residual current setting [50/51Gx.3I0_Set].
Tp is time multiplier setting [50/51Gx.TMS]. K is a constant C is a constant. is a constant.

Date: 2012-08-14
3-119
3 Operation Theory
3I0 is the calculated residual current. The user can select the operating characteristic from various inverse-time characteristic curves by setting [50/51Gx.Opt_Curve], and parameters of available characteristics for selection are shown in the following table.
Table 3.12-1 Inverse-time curve parameters 50/51Gx.Opt_Curve 0 1 2 3 4 5 6 7 8 9 10 11 12 13 Time Characteristic Definite time IEC Normal inverse IEC Very inverse IEC Extremely inverse IEC Short-time inverse IEC Long-time inverse ANSI Extremely inverse ANSI Very inverse ANSI Inverse ANSI Moderately inverse ANSI Long-time extremely inverse ANSI Long-time very inverse ANSI Long-time inverse Programmable User-defined 0.14 13.5 80.0 0.05 120.0 28.2 19.61 0.0086 0.0515 64.07 28.55 0.086 0.02 1.0 2.0 0.04 1.0 2.0 2.0 0.02 0.02 2.0 2.0 0.02 0 0 0 0 0 0.1217 0.491 0.0185 0.114 0.25 0.712 0.185 K C
If all available curves do not comply with user application, user may set [50/51Gx.Opt_Curve] as 13 to customize the inverse-time curve characteristic, and constants K, and C with configuration tool software. (only stage 1) When inverse-time characteristic is selected, if calculated operating time is less than setting [50/51Gx.tmin], then the operating time of the protection changes to the value of setting [50/51Gx.tmin] automatically. Define-time or inverse-time directional earth-fault protection drops off instantaneously after fault current disappears.

50/51Gx 50/51Gx.En1 50/51Gx.En2 50/51Gx.Blk 50/51Gx.St 50/51Gx.Op
3-120
Date: 2012-08-14
3 Operation Theory
3.12.4 I/O Signals

Table 3.12-2 I/O signals of earth fault protection No. 1 Input Signal 50/51Gx.En1 Description Stage x of earth fault protection enabling input 1, it is triggered from binary input or programmable logic etc. Stage x of earth fault protection enabling input 2, it is triggered from binary input or programmable logic etc. Stage x of earth fault protection blocking input, it is triggered from binary input or programmable logic etc. Three-phase current input Three-phase voltage input Description Stage x of earth fault protection operates. Stage x of earth fault protection starts.
50/51Gx.En2
3 4 5 No. 1 2
50/51Gx.Blk I3P U3P Output Signal 50/51Gx.Op 50/51Gx.St
3.12.5 Logic
EN
[50/51Gx.En] [50/51Gx.En1] [50/51Gx.En2] [50/51Gx.Blk] 3I0>[50/51Gx.3I0_Set] [50/51Gx.En_Abnor_Blk] &
SIG
SIG
SIG
SET
EN
>=1 &
&
& [50/51Gx.St] Timer t t
SIG
No abnormal conditions
>=1 >=1
SET
[50/51Gx.Op]
[50/51Gx.Opt_Dir]=1
&
SIG
Forward DIR [50/51Gx.Opt_Dir]=2
SET
& >=1
SIG
Reverse DIR [50/51Gx.Opt_Dir]=0 CTS.Alm
SET
SIG
&
EN
[50/51Gx.En_CTS_Blk] I3P 2nd Hm Detect
SIG
&
SET
[50/51Gx.En_Hm2]
Figure 3.12-1 Logic diagram of earth fault protection

Date: 2012-08-14
3-121
3 Operation Theory
Where: x=1, 2, 3, 4 Abnormal condition 1: when the system is under pole disagreement condition, for 1-pole AR, earth fault protection will operate. If the logic setting [50/51Gx.En_Abnor_Blk] is set as 1, the stage x of earth fault protection will be blocked. If the logic setting [50/51Gx.En_Abnor_Blk] is set as 0, earth fault protection is not controlled by direction element. Abnormal condition 2: When manually closing circuit breaker, three phases of the circuit breaker maybe not operate simultaneously, and SOTF protection should operate. If the logic setting [50/51Gx.En_Abnor_Blk] is set as 1, the stage x of earth fault protection will be blocked. If the logic setting [50/51Gx.En_Abnor_Blk] is set as 0, earth fault protection is not controlled by direction element. Abnormal condition 3: VT circuit failure. If the logic setting [50/51Gx.En_Abnor_Blk] is set as 1, the stage x of earth fault protection will be blocked. If the logic setting [50/51Gx.En_Abnor_Blk] is set as 0, earth fault protection is not controlled by direction element.
3.12.6 Settings
Table 3.12-3 Settings of earth fault protection No. Name Range Step Unit Setting 1 50/51G.K_Hm2 0.000~1.000 0.001 of Remark second harmonic
component for blocking earth fault elements
50/51G1.3I0_Set
(0.050~30.000)In
0.001
Current setting for stage 1 of earth fault protection Time delay for stage 1 of earth fault protection Enabling/disabling stage 1 of
50/51G1.t_Op
0.000~20.000
0.001
50/51G1.En
0 or 1
earth fault protection 0: disable 1: enable Enabling/Disabling auto-reclosing blocked when stage 1 of earth
50/51G1.En_BlkAR
0 or 1
fault protection operates 0: disable 1: enable Direction option for stage 1 of earth fault protection
50/51G1.Opt_Dir
0, 1 or 2
0: no direction 1: forward direction 2: reverse direction
50/51G1.En_Hm2
0 or 1
Enabling/disabling
second
harmonic blocking for stage 1 of
3-122
Date: 2012-08-14
3 Operation Theory
earth fault protection 0: disable 1: enable Enabling/disabling blocking for stage 1 of earth fault protection 8 50/51G1.En_Abnor_Blk 0 or 1 under abnormal conditions 0: disable 1: enable Enabling/disabling blocking for stage 1 of earth fault protection 9 50/51G1.En_CTS_Blk 0 or 1 under CT failure conditions 0: disable 1: enable 10 50/51G1.Opt_Curve 0~13 1 Option of characteristic curve for stage 1 of earth fault protection Time multiplier setting for stage 1 11 50/51G1.TMS 0.010~200.000 0.001 of inverse-time earth fault
protection Minimum operating time for stage 12 50/51G1.tmin 0.050~20.000 0.001 s 1 of inverse-time earth fault protection Constant for stage 1 of 13 50/51G1.Alpha 0.010~5.000 0.001 customized characteristic protection Constant C for stage 1 of 14 50/51G1.C 0.000~20.000 0.001 customized characteristic protection Constant K for stage 1 of 15 50/51G1.K 0.050~20.000 0.001 customized characteristic protection 16 50/51G2.3I0_Set (0.050~30.000)In 0.001 A Current setting for stage 2 of earth fault protection Time delay for stage 2 of earth fault protection Enabling/disabling stage 2 of 18 50/51G2.En 0 or 1 earth fault protection 0: disable 1: enable Enabling/Disabling auto-reclosing 19 50/51G2.En_BlkAR 0 or 1 blocked when stage 2 of earth fault protection operates PCS-902 Line Distance Relay
Date: 2012-08-14
inverse-time earth fault
17
50/51G2.t_Op
0.000~20.000
0.001
3-123
3 Operation Theory
0: disable 1: enable Direction option for stage 2 of earth fault protection 20 50/51G2.Opt_Dir 0, 1 or 2 0: no direction 1: forward direction 2: reverse direction Enabling/disabling second
harmonic blocking for stage 2 of 21 50/51G2.En_Hm2 0 or 1 earth fault protection 0: disable 1: enable Enabling/disabling blocking for stage 2 of earth fault protection 22 50/51G2.En_Abnor_Blk 0 or 1 under abnormal conditions 0: disable 1: enable Enabling/disabling blocking for stage 2 of earth fault protection 23 50/51G2.En_CTS_Blk 0 or 1 under CT failure conditions 0: disable 1: enable 24 50/51G2.Opt_Curve 0~12 Option of characteristic curve for stage 2 of earth fault protection Time multiplier setting for stage 2 25 50/51G2.TMS 0.010~200.000 0.001 of inverse-time earth fault
protection Minimum operating time for stage 26 50/51G2.tmin 0.050~20.000 0.001 s 2 of inverse-time earth fault protection 27 50/51G3.3I0_Set (0.050~30.000)In 0.001 A Current setting for stage 3 of earth fault protection Time delay for stage 3 of earth fault protection Enabling/disabling stage 3 of 29 50/51G3.En 0, 1 or 2 earth fault protection 0: disable 1: enable Enabling/Disabling auto-reclosing blocked when stage 3 of earth 30 50/51G3.En_BlkAR 0 or 1 fault protection operates 0: disable 1: enable 31 3-124
Date: 2012-08-14
28
50/51G3.t_Op
0.000~20.000
0.001
50/51G3.Opt_Dir
0 or 1
Direction option for stage 3 of PCS-902 Line Distance Relay
3 Operation Theory
earth fault protection 0: no direction 1: forward direction 2: reverse direction Enabling/disabling second
protection Minimum operating time for stage 37 50/51G3.tmin 0.050~20.000 0.001 s 3 of inverse-time earth fault protection 38 50/51G4.3I0_Set (0.050~30.000)In 0.001 A Current setting for stage 4 of earth fault protection Time delay for stage 4 of earth fault protection Enabling/disabling stage 4 of 40 50/51G4.En 0, 1 or 2 earth fault protection 0: disable 1: enable Enabling/Disabling auto-reclosing blocked when stage 4 of earth 41 50/51G4.En_BlkAR 0 or 1 fault protection operates 0: disable 1: enable Direction option for stage 4 of 42 50/51G4.Opt_Dir 0 or 1 earth fault protection 0: no direction 1: forward direction PCS-902 Line Distance Relay
Date: 2012-08-14
39
50/51G4.t_Op
0.000~20.000
0.001
3-125
3 Operation Theory
2: reverse direction Enabling/disabling second
protection Minimum operating time for stage 48 50/51G4.tmin 0.050~20.000 0.001 s 4 of inverse-time earth fault protection
3.13 Overcurrent Protection for VT Circuit Failure

When protection VT circuit fails, distance protection will be disabled. As a substitute, definite-time phase overcurrent protection and ground overcurrent protection will be enabled automatically, if selected, as backup protection of distance protection.
3-126
Date: 2012-08-14
3 Operation Theory

51PVT/51GVT 51PVT.En1 51PVT.En2 51PVT.Blk 51GVT.En1 51GVT.En2 51GVT.Blk 51PVT.Op 51PVT.St 51PVT.StA 51PVT.StB 51PVT.StC 51GVT.Op 51GVT.St
3.13.3 I/O Signals

Table 3.13-1 I/O signals of overcurrent protection for VT circuit failure No. 1 Input Signal 51PVT.En1 Description Phase overcurrent protection for VT circuit failure enabling input 1, it is triggered from binary input or programmable logic etc. Phase overcurrent protection for VT circuit failure enabling input 2, it is triggered from binary input or programmable logic etc. Phase overcurrent protection for VT circuit failure blocking input, it is triggered from binary input or programmable logic etc. Ground overcurrent protection for VT circuit failure enabling input 1, it is triggered from binary input or programmable logic etc. Ground overcurrent protection for VT circuit failure enabling input 2, it is triggered from binary input or programmable logic etc. Ground overcurrent protection for VT circuit failure blocking input, it is triggered from binary input or programmable logic etc. Description Phase overcurrent protection for VT circuit failure operates. Phase overcurrent protection for VT circuit failure starts. Phase overcurrent protection for VT circuit failure starts (A-Phase). Phase overcurrent protection for VT circuit failure starts (B-Phase). Phase overcurrent protection for VT circuit failure starts (C-Phase). Ground overcurrent protection for VT circuit failure operates. Ground overcurrent protection for VT circuit failure starts.
51PVT.En2
51PVT.Blk
51GVT.En1
51GVT.En2
6 No. 1 2 3 4 5 6 7
51GVT.Blk Output Signal 51PVT.Op 51PVT.St 51PVT.StA 51PVT.StB 51PVT.StC 51GVT.Op 51GVT.St

Date: 2012-08-14
3-127
3 Operation Theory
3.13.4 Logic
SET
3I0>[51GVT.3I0_Set] & [51GVT.En] FD.ROC.Pkp & [51GVT.t_Op] 0ms
51GVT.St 51GVT.Op
EN
SIG
>=1
[51PVT.t_Op]
SIG
0ms
51PVT.Op 51PVT.St
VTS.Alm
& & 51PVT.StA
EN
[51PVT.En] Ia>[51PVT.I_Set]
SET
& 51PVT.StB
SET
Ib>[51PVT.I_Set] & 51PVT.StC Ic>[51PVT.I_Set]
SET
Figure 3.13-1 Logic diagram of overcurrent protection for VT circuit failure
3.13.5 Settings
Table 3.13-2 Settings of overcurrent protection for VT circuit failure No. 1 Name 51GVT.3I0_Set Range (0.050~30.000)In Step 0.001 Unit A Remark Current setting of ground overcurrent protection when VT circuit failure Time delay of ground overcurrent protection when VT circuit failure Enabling/disabling ground
51GVT.t_Op
0.000~10.000
0.001
overcurrent protection when VT circuit 3 51GVT.En 0 or 1 failure 0: disable 1: enable 4 51PVT.I_Set (0.050~30.000)In 0.001 A Current setting of phase overcurrent protection when VT circuit failure Time delay of phase overcurrent protection when VT circuit failure Enabling/disabling phase overcurrent 6 51PVT.En 0 or 1 protection when VT circuit failure 0: disable 1: enable
51PVT.t_Op
0.000~10.000
0.001
3-128
Date: 2012-08-14
3 Operation Theory
3.14 Residual Current SOTF Protection

When the circuit breaker is closed manually or automatically, it is possible to switch on to an existing fault. This is especially critical if the line in the remote station is grounded, since earth fault protection would not clear the fault until their time delays had elapsed. In this situation, however, the fastest possible clearance is desired. Residual current SOTF (switch onto fault) protection is a complementary function to earth fault protection. With residual current SOTF protection, a fast trip is achieved for a fault on the line, when the line is being energized. It shall be responsive to all types of earth faults anywhere within the protected line, and it shall be enabled for a period of 400ms when the circuit is energized either manually or via an auto-reclosing system.

Residual current SOTF protection will operate to trip three-phase circuit breaker with a time delay of 60ms when 1-pole auto-reclosing. Residual current SOTF protection will operate to trip three-phase circuit breaker with a time delay of 100ms when 3-pole auto-reclosing or closing manually.

50GSOTF 50GSOTF.En1 50GSOTF.En2 50GSOTF.Blk 50GSOTF.Op 50GSOTF.St
3.14.4 I/O Signals

Table 3.14-1 I/O signals of residual SOTF protection No. 1 Input Signal 50GSOTF.En1 Description Residual current SOTF protection enabling input 1, it is triggered from binary input or programmable logic etc. Residual current SOTF protection enabling input 2, it is triggered from binary input or programmable logic etc. Residual current SOTF protection blocking input, it is triggered from binary input or programmable logic etc. Description Residual current SOTF protection operates. Residual current SOTF protection starts.
50GSOTF.En2
3 No. 1 2
50GSOTF.Blk Output Signal 50GSOTF.Op 50GSOTF.St

Date: 2012-08-14
3-129
3 Operation Theory
3.14.5 Logic
SIG
3-pole AR signal
>=1 &
100ms 0ms
SIG
Manual closing signal 3I0>[50GSOTF.3I0_Set] 50GSOTF.En1 50GSOTF.En2 50GSOTF.Blk [50GSOTF.En_3I0] FD.ROC.Pkp 1-pole AR signal
SET
& & & >=1 &

60ms 0ms
>=1
50GSOTF.Op
SIG
SIG
SIG
EN
50GSOTF.St
SIG
SIG
Figure 3.14-1 Logic diagram of residual current SOTF protection
3.14.6 Settings
Table 3.14-2 Settings of residual current SOTF protection No. 1 Name 50GSOTF.3I0_Set Range (0.050~30.000)In Step 0.001 Unit A Remark Current setting of residual current SOTF protection Enabling/disabling residual current 2 50GSOTF.En_3I0 0 or 1 SOTF protection 0: disable 1: enable
3.15 Voltage Protection

Voltage protection has the function of protecting device against undervoltage and overvoltage. Both operational states are unfavorable as overvoltage may cause insulation breakdown while undervoltage may cause stability problem. Each voltage protection function has two individual stages with respective time delay. These voltage protection functions can be switched on or off separately. Selectable definite-time characteristic and multiple inverse-time characteristics are available.
3.15.1 Overvoltage Protection

3.15.1.1 General Application Abnormal high voltages often occur e.g. in low loaded, long distance transmission lines, in islanded systems when generator voltage regulation fails, or load rejection of a generator. Even if compensation reactors are provided to avoid line overvoltage by compensation of the line capacitance and thus reduction of the overvoltage, the overvoltage will endanger the insulation if the reactors fail. The line must be de-energized within a very short time. The overvoltage protection in this device detects the phase voltages Ua, Ub and Uc or the
3-130
Date: 2012-08-14
3 Operation Theory
phase-to-phase voltages Uab, Ubc and Uca with an option of any phase or all phases operation for output. The overvoltage protection can be used for tripping purpose as well as to initiate transfer trip, which selectable controlled by local circuit breaker. 3.15.1.2 Function Description Phase overvoltage protection has following functions: 1. Two-stage phase overvoltage protection with independent logic, voltage and time delay settings. Stage 1 and stage 2 can be selected as definite-time or inverse-time characteristic. The inverse-time characteristic is selectable, among IEC and ANSI/IEEE standard inverse-time characteristics. 3. 4. Phase voltage or phase-to-phase voltage can be selected for protection calculation. 1-out-of-3 or 3-out-of-3 logic can be selected for protection criterion. (1-out-of-3 means any of three phase voltages, 3-out-of-3 means all three phase voltages) 1. Operation Criterion
2.
Users can select phase voltage or phase-to-phase voltage for the protection calculation. If setting [59Px.Opt_Up/Upp] is set to 0, phase voltage criterion is selected and if [59Px.Opt_Up/Upp] is set to 1, phase-to-phase voltage criterion is selected. When phase voltage or phase-to-phase voltage is greater than any enabled stage voltage setting, the stage protection picks up and operates after delay, which will drop off instantaneously when fault voltage disappears. Phase voltage criterion
Two operation criteria of definite-time overvoltage protection are shown as follows, which of them is applied depending on the logic setting [59Px.Opt_1P/3P]. U_max>[ 59Px.U_Set] or Ua>[59Px.U_Set] & Ub>[59Px.U_Set] & Uc>[59Px.U_Set] Where: U_max is the maximum value among three phase-voltage. Ua, Ub, Uc are three phase voltages. [59Px.U_Set] is the setting of stage x (x=1 or 2) overvoltage protection. When [59Px.Opt_1P/3P] is set as 0, 1-out-of-3 logic (Equation 3.15-1) is selected as operation criterion, and when set as 1, 3-out-of-3 logic (Equation 3.15-2) is selected.

Date: 2012-08-14
3-131
3 Operation Theory
Phase-to-phase voltage criterion
Two operation criteria of definite-time overvoltage protection are shown as follows, which of them is applied depending on the logic setting [59Px.Opt_1P/3P]. U_max>[ 59Px.U_Set] or Uab>[59Px.U_Set] & Ubc>[59Px.U_Set] & Uca>[59Px.U_Set] [59Px.U_Set] is the setting of stage x (x =1 or 2) overvoltage protection. When [59Px.Opt_1P/3P] is set as 0, 1-out-of-3 logic (Equation 3.15-3) is selected as operation criterion, and when set as 1, 3-out-of-3 logic (Equation 3.15-4) is selected. 2. Characteristic Curve
Phase overvoltage protection stage 1 and stage 2 can be selected as definite-time or inverse-time characteristic, and inverse-time operating time curve is as follows.
Where: Uset is the voltage setting [59Px.U_Set] (x=1 or 2). Tp is time multiplier setting [59Px.Opt_TMS]. K is a constant. C is a constant. is a constant. U is the measured voltage For stage 1 and stage 2 of overvoltage protection, operating characteristic can be chosen from definite-time characteristic and 12 inverse-time characteristics by setting the logic setting [59Px.Opt_Curve] (x=1~12). The parameters of each characteristic are listed in the following table.
Table 3.15-1 Inverse-time curve parameters 59Px.Opt_Curve 0 1 2 3 Time Characteristic Definite time IEC Normal inverse IEC Very inverse IEC Extremely inverse 0.14 13.5 80.0 0.02 1.0 2.0 0 0 0 K C
3-132
Date: 2012-08-14
3 Operation Theory
59Px.Opt_Curve 4 5 6 7 8 9 10 11 12 Time Characteristic IEC Short-time inverse IEC Long-time inverse ANSI Extremely inverse ANSI Very inverse ANSI Inverse ANSI Moderately inverse ANSI Long-time extremely inverse ANSI Long-time very inverse ANSI Long-time inverse K 0.05 120.0 28.2 19.61 0.0086 0.0515 64.07 28.55 0.086 0.04 1.0 2.0 2.0 0.02 0.02 2.0 2.0 0.02 0 0 0.1217 0.491 0.0185 0.114 0.25 0.712 0.185 C
When inverse-time characteristic is selected, if calculated operating time is less than setting [59Px.tmin], then the operating time changes to the value of setting [59Px.tmin] automatically. Define-time or inverse-time phase overvoltage protection drops off instantaneously when measured voltage is lower than reset voltage. 3.15.1.3 Function Block Diagram
59Px 59Px.En1 59Px.En2 59Px.Blk 59Px.St 59Px.St1 59Px.St2 59Px.St3 59Px.Op 59Px.Alm 59Px.Op_InitTT

Table 3.15-2 I/O signals of overvoltage protection No. 1 Input Signal 59Px.En1 Description Stage x of overvoltage protection enabling input 1, it is triggered from binary input or programmable logic etc. Stage x of overvoltage protection enabling input 2, it is triggered from binary input or programmable logic etc. Stage x of overvoltage protection blocking input, it is triggered from binary input or
2 3
59Px.En2 59Px.Blk

Date: 2012-08-14
3-133
3 Operation Theory
programmable logic etc. 4 No. 1 2 3 4 5 6 7 U3P Output Signal 59Px.Op 59Px.St 59Px.St1 59Px.St2 59Px.St3 59Px.Op_InitTT 59Px.Alm Three-phase voltage input Description Stage x of overvoltage protection operates. Stage x of overvoltage protection starts. Stage x of overvoltage protection starts (A or AB). Stage x of overvoltage protection starts (B or BC). Stage x of overvoltage protection starts (C or CA). Stage x of overvoltage protection operates to initiate transfer trip. Stage x of overvoltage protection alarms.
3.15.1.5 Logic
EN
[59Px.En] & 59Px.En1 59Px.En2 59Px.Blk [59Px.En_Alm] Enable 59Px [59Px.Opt_Up/Upp]
SIG
Enable 59Px
SIG
SIG
EN
>=1
59Px.St
SIG
EN
& >=1
&
Timer t t
& & >=1 & &

59Px.Alm
SET
UA>[59Px.U_Set]
&
SET
UAB>[59Px.U_Set]
& >=1
SET
&
Timer t t
59Px.Op
UB>[59Px.U_Set]
& & >=1

59Px.Op_InitTT
SET
UBC>[59Px.U_Set]
>=1 & >=1 &

Timer t t
& &
SET
UC>[59Px.U_Set]
&
SET
59Px.St1
UCA>[59Px.U_Set] [59Px.Opt_1P/3P] [52b_PhA] [52b_PhB] [52b_PhC] 59Px.St3 [59Px.En_52b_TT] [59Px.En_TT] 59Px.St2
EN
BI
&
BI
BI
EN
EN
Figure 3.15-1 Logic diagram of stage x of overvoltage protection
Where: x=1, 2
3-134
Date: 2012-08-14
3 Operation Theory
3.15.1.6 Settings
Table 3.15-3 Settings of overvoltage protection No. 1 Name 59P1.U_Set Range Un~2Unn Step 0.001 Unit V Remark Voltage setting for stage 1 of overvoltage protection Time delay for stage 1 of overvoltage protection Enabling/disabling stage 1 of overvoltage 3 59P1.En 0 or 1 protection 0: disable 1: enable Option of 1-out-of-3 mode or 3-out-of-3 4 59P1.Opt_1P/3P 0 or 1 mode 0: 3-out-of-3 mode 1: 1-out-of-3 mode Option of phase-to-phase voltage or phase 5 59P1.Opt_Up/Upp 0 or 1 voltage 0: phase voltage 1: phase-to-phase voltage Enabling/disabling stage 1 of overvoltage 6 59P1.En_Alm 0 or 1 protection for alarm purpose 0: disable 1: enable Enabling/disabling transfer trip controlled by CB open position for stage 1 of 7 59P1.En_52b_TT 0 or 1 overvoltage protection 0: disable 1: enable Enabling/disabling stage 1 of overvoltage 8 59P1.En_TT 0 or 1 protection operate to initiate transfer trip 0: disable 1: enable 9 59P1.Opt_Curve 0~13 Option of characteristic curve for stage 1 of overvoltage protection 0.001 Time multiplier setting for stage 1 of inverse-time overvoltage protection s Minimum delay for stage 1 of inverse-time overvoltage protection Voltage setting for stage 2 of overvoltage protection Time delay for stage 2 of overvoltage protection Enabling/disabling stage 2 of overvoltage 3-135
Date: 2012-08-14
59P1.t_Op
0.000~30.000
0.001
10
59P1.Opt_TMS
0.010~200.000
11
59P1.tmin
0.050~20.000
0.001
12
59P2.U_Set
Un~2Unn
0.001
13 14
59P2.t_Op 59P2.En
0.000~30.000 0 or 1
0.001
3 Operation Theory
protection 0: disable 1: enable Option of 1-out-of-3 mode or 3-out-of-3 15 59P2.Opt_1P/3P 0 or 1 mode 0: 3-out-of-3 mode 1: 1-out-of-3 mode Option of phase-to-phase voltage or phase 16 59P2.Opt_Up/Upp 0 or 1 voltage 0: phase voltage 1: phase-to-phase voltage Enabling/disabling stage 2 of overvoltage 17 59P2.En_Alm 0 or 1 protection for alarm purpose 0: disable 1: enable Enabling/disabling transfer trip controlled by CB open position for stage 2 of 18 59P2.En_52b_TT 0 or 1 overvoltage protection 0: disable 1: enable Enabling/disabling stage 2 of overvoltage 19 59P2.En_TT 0 or 1 protection operate to initiate transfer trip 0: disable 1: enable 20 59P2.Opt_Curve 0~12 Option of characteristic curve for stage 2 of overvoltage protection 0.001 Time multiplier setting for stage 2 of inverse-time overvoltage protection s Minimum delay for stage 2 of inverse-time overvoltage protection
21
59P2.Opt_TMS
0.010~200.000
22
59P2.tmin
0.050~20.000
0.001
3.15.2 Undervoltage Protection

3.15.2.1 General Application The undervoltage protection can be applied to trip when fault occurs in a system. Two stages of undervoltage protection are available measuring phase voltages UA, UB and UC or phase-to-phase voltages UAB, UBC and UCA. The protection output can be selected for either any phase or all phases operation. The undervoltage protection is normally used as decoupling system rather than load shedding. 3.15.2.2 Function Description Phase undervoltage protection has following functions: 1. Two-stage phase undervoltage protection with independent logic, voltage and time delay settings.
Date: 2012-08-14
3-136
3 Operation Theory
2.
Stage 1 and stage 2 can be selected as definite-time or inverse-time characteristic. The inverse-time characteristic is selectable, among IEC and ANSI/IEEE standard inverse-time characteristics. Phase voltage or phase-to-phase voltage can be selected for protection calculation. 1-out-of-3 or 3-out-of-3 logic can be selected for protection criterion. (1-out-of-3 means any of three phase voltages, 3-out-of-3 means all three phase voltages) Operation Criterion
3. 4.
1.
Users can select phase voltage or phase-to-phase voltage for the protection calculation. If setting [27Px.Opt_Up/Upp] is set to 0, phase voltage criterion is selected and if [27Px.Opt_Up/Upp] is set to 1, phase-to-phase voltage criterion is selected. When phase voltage or phase-to-phase voltage is less than any enabled stage voltage setting, the stage protection picks up and operates after delay, which will drop off instantaneously when fault voltage disappears. Phase voltage criterion
Two operation criteria of definite-time undervoltage protection are shown as follows, which of them is applied depending on the logic setting [27Px.Opt_1P/3P]. U_min<[ 27Px.U_Set] or Ua<[ 27Px.U_Set] & Ub<[27Px.U_Set] & Uc<[27Px.U_Set] Where: U_min is the minimum value among three phase voltages. Ua, Ub and Uc are three phase voltages. [27Px.U_Set] is the setting of stage x (x=1 or 2) undervoltage protection. When [27Px.Opt_1P/3P] is set as 0, 1-out-of-3 logic (Equation 3.15-5) is selected as operation criterion, and when set as 1, 3-out-of-3 logic (Equation 3.15-6) is selected. Phase-to-phase voltage criterion
Two operation criteria of definite-time undervoltage protection are shown as follows, which of them is applied depending on the logic setting [27Px.Opt_Up/Upp]. U_min<[ 27Px.U_Set] or Uab<[27Px.U_Set] & Ubc<[27Px.U_Set] & Uca<[27Px.U_Set] Where: U_min is the minimum value among three phase-to-phase voltages.

Date: 2012-08-14
3-137
3 Operation Theory
Uab, Ubc and Uca are three phase-to-phase voltages. [27Px.U_Set] is the setting of stage x (x =1 or 2) undervoltage protection. When the setting [27Px.Opt_1P/3P] is set as 0, 1-out-of-3 logic (Equation 3.15-7) is selected as operation criterion, and when it is set as 1, 3-out-of-3 logic (Equation 3.15-8) is selected. 2. Characteristic Curve
Undervoltage protection stage 1 and stage 2 can be selected as definite-time or inverse-time characteristic, and inverse-time operating time curve is as follows.
Where: Uset is the setting [27Px.U_Set] (x=1 or 2). Tp is time multiplier setting [27Px.Opt_TMS]. K is a constant. C is a constant. is a constant. U is the measured voltage For stage 1 and stage 2 of undervoltage protection, operating characteristic can be chosen from definite-time characteristic and twelve inverse-time characteristics by setting the logic setting [27Px.Opt_Curve] (x=1~12). The parameters of each characteristic are listed in the following table.
Table 3.15-4 Inverse-time curve parameters of phase undervoltage protection 27Px.Opt_Curve 0 1 2 3 4 5 6 7 Time Characteristic Definite time IEC Normal inverse IEC Very inverse IEC Extremely inverse IEC Short-time inverse IEC Long-time inverse ANSI Extremely inverse ANSI Very inverse 0.14 13.5 80.0 0.05 120.0 28.2 19.61 0.02 1.0 2.0 0.04 1.0 2.0 2.0 0 0 0 0 0 0.1217 0.491 K C
3-138
Date: 2012-08-14
3 Operation Theory
27Px.Opt_Curve 8 9 10 11 12 Time Characteristic ANSI Inverse ANSI Moderately inverse ANSI Long-time extremely inverse ANSI Long-time very inverse ANSI Long-time inverse K 0.0086 0.0515 64.07 28.55 0.086 0.02 0.02 2.0 2.0 0.02 C 0.0185 0.114 0.25 0.712 0.185
When inverse-time characteristic is selected, if calculated operating time is less than setting [27Px.tmin], then the operating time changes to the value of setting [27Px.tmin] automatically. Define-time or inverse-time phase under voltage protection drops off instantaneously when measured voltage is higher than reset voltage. 3.15.2.3 Function Block Diagram
27Px 27Px.En1 27Px.En2 27Px.Blk 27Px.Alm 27Px.Op 27Px.St 27Px.St1 27Px.St2 27Px.St3

Table 3.15-5 I/O signals of undervoltage protection No. 1 Input Signal 27Px.En1 Description Stage x of undervoltage protection enabling input 1, it is triggered from binary input or programmable logic etc. Stage x of undervoltage protection enabling input 2, it is triggered from binary input or programmable logic etc. Stage x of undervoltage protection blocking input, it is triggered from binary input or programmable logic etc. Three-phase voltage input Description Stage x of undervoltage protection operates. Stage x of undervoltage protection alarms. Stage x of undervoltage protection starts. Stage x of undervoltage protection starts (A or AB).
27Px.En2
3 4 No. 1 2 3 4
27Px.Blk U3P Output Signal 27Px.Op 27Px.Alm 27Px.St 27Px.St1

Date: 2012-08-14
3-139
3 Operation Theory
5 6 27Px.St2 27Px.St3 Stage x of undervoltage protection starts (B or BC). Stage x of undervoltage protection starts (C or CA).
3.15.2.5 Logic When FD element reflecting current operates, including DPFC current element and residual current element, the undervoltage protection is released for operation. When any of the following conditions is fulfilled, the undervoltage protection will be blocked. 1. VT signal failsif the voltage comes from busbar VT, the voltage will restore to the normal immediately after the fault being cleared away. However, if the voltage comes from line VT, the voltage will drop to zero immediately after the fault is cleared. The undervoltage protection will be continuously in operation, thus an auxiliary current criterion is provided to solve it. (Input 1) Any phase is out of service, i.e. Up<0.01Un and IP<0.06In. (Input 2) Binary input of blocking undervoltage is energized, such as normally closed contact of line disconnector. (Input 3) Any phase of circuit breaker is open (binary input of normal close contact of breaker is energized) and the corresponding phase current is smaller than 0.06In. (Input 4)
SIG SIG SIG SIG Input 1 Input 2 Input 3 Input 4 20ms 100ms >=1 Block UV
2. 3.
4.
Figure 3.15-2 Blocking logic of undervoltage protection
3-140
Date: 2012-08-14
3 Operation Theory
EN
[27Px.En] & 27Px.En1 27Px.En2 27Px.Blk [27Px.En_Alm] Enable 27Px Block UV [27Px.Opt_Up/Upp] & >=1 & Timer t t & & & & >=1 27Px.St
SIG
Enable 27Px
SIG
SIG
EN
SIG
SIG SET
SET
UA<[27Px.U_Set]
SET
UAB<[27Px.U_Set] & >=1 & Timer t t &
27Px.Op
SET
UB<[27Px.U_Set] &
27Px.Alm
SET
UBC<[27Px.U_Set] >=1 & >=1 & Timer t t 27Px.St1 & 27Px.St2 & >=1
SET
UC<[27Px.U_Set]
SET SET
UCA<[27Px.U_Set] [27P1.Opt_1P/3P]
27Px.St3
Figure 3.15-3 Logic diagram of stage x of undervoltage protection
Where: x=1, 2 3.15.2.6 Settings

Table 3.15-6 Settings of undervoltage protection No. 1 Name 27P1.U_Set Range 0~Unn Step 0.001 Unit V Remark Voltage setting for stage 1 of undervoltage protection Time delay for stage 1 of undervoltage protection Enabling/disabling stage 1 of undervoltage 3 27P1.En 0 or 1 protection 0: disable 1: enable Option of 1-out-of-3 mode or 3-out-of-3 4 27P1.Opt_1P/3P 0 or 1 mode 0: 3-out-of-3 mode 3-141
Date: 2012-08-14
27P1.t_Op
0.000~30.000
0.001
3 Operation Theory
1: 1-out-of-3 mode Option 5 27P1.Opt_Up/Upp 0 or 1 of voltage criterion adopting
phase-to-phase voltage or phase voltage 0: phase voltage 1: phase-to-phase voltage Enabling/disabling stage 1 of undervoltage
27P1.En_Alm
0 or 1
protection operate to alarm 0: disable 1: enable
27P1.Opt_Curve
0~13
Option of characteristic curve for stage 1 of undervoltage protection Time multiplier setting for stage 1 of inverse-time undervoltage protection s Minimum delay for stage 1 of inverse-time undervoltage protection Voltage setting for stage 2 of undervoltage protection Time delay for stage 2 of undervoltage protection Enabling/disabling stage 2 of undervoltage
27P1.Opt_TMS
0.010~200.000
0.001
27P1.tmin
0.050~20.000
0.001
10
27P2.U_Set
0~Unn
0.001
11
27P2.t_Op
0.000~30.000
0.001
12
27P2.En
0 or 1
protection 0: disable 1: enable Option of 1-out-of-3 mode or 3-out-of-3
13
27P2.Opt_1P/3P
0 or 1
mode 0: 3-out-of-3 mode 1: 1-out-of-3 mode Option of voltage criterion adopting
14
27P2.Opt_Up/Upp
0 or 1
phase-to-phase voltage or phase voltage 0: phase voltage 1: phase-to-phase voltage Enabling/disabling stage 2 of undervoltage
15
27P2.En_Alm
0 or 1
protection operate to alarm 0: disable 1: enable
16
27P2.Opt_Curve
0~12
Option of characteristic curve for stage 2 of undervoltage protection Time multiplier setting for stage 2 of inverse-time undervoltage protection s Minimum delay for stage 2 of inverse-time undervoltage protection
17
27P2.Opt_TMS
0.010~200.000
0.001
18
27P2.tmin
0.050~20.000
0.001
3-142
Date: 2012-08-14
3 Operation Theory
3.16 Frequency Protection

In case of frequency decline due to lack of active power in the power system, underfrequency protection operates to shed part of the load according to the declined value of frequency to re-balance the power supply and the load. On the contrary, if the power frequency of regional rises due to the active power excess demand, overfrequency protection operates to perform generator rejection to shed part of the generators automatically according to the rising frequency so that power supply and the load are re-balanced.

3.16.2.1 Underfrequency Protection Underfrequency protection consists of the four stages (stage 1 to stage 4). When system frequency is smaller than the setting [81U.f_Pkp], underfrequency protection will put into service. In order to prevent possible maloperation of underfrequency protection in conditions of high harmonics, voltage circuit failures and so on, such blocking measures are carried out as follows: 1. Blocking in undervoltage condition
If the positive voltage U<0.15Un, the calculation of protection is not carried out and the output relay will be blocked. 2. df/dt blocking element
If df/dt[81U.df/dt_Blk], the calculation of protection is not carried out and the output relay will be blocked. The blocking element will not be released automatically until the system frequency recovers to be less than the setting [81U.f_Pkp]. 3. Frequency abnormality condition
When f<40Hz or f>65Hz, underfrequency protection will be blocked Operation criteria of underfrequency protection is shown in the following equation. f<[81U.UFx.f_Set] Where: f is system frequency. [81U.UFx.f_Set] is the frequency settings of stage x (x=1, 2, 3 or 4) of underfrequency protection. The equation of df/dt blocking function is as follows. df/dt[81U.df/dt_Blk] Where: df/dt is the frequency slip speed and the time step (i.e. dt) for the calucation is equal to 5 cycle. [81U.df/dt_Blk] is the setting of df/dt blocking underfrequency protection.
Date: 2012-08-14
Equation 3.16-1
Equation 3.16-2
3-143
3 Operation Theory
Underfrequency protection can be blocked by the frequency slip speed (df/dt). If the logic setting [81U.UFx.En_df/dt_Blk] (x=1, 2, 3 or 4) is set as 1, when Equation 3.16-1 and Equation 3.16-2 are met, it is decided that a fault occurred and the corresponding stage underfrequency protection is blocked at the same time for the purpose of waiting for operation of other related protection. The blocking signal will not reset until the system frequency recovers, i.e. the system frequency is greater than the setting [81U.f_Pkp]. If the logic setting is set as 0, when Equation 3.16-1 and Equation 3.16-2 are met, the stage underfrequency protection will be released to operate. 3.16.2.2 Overfrequency Protection Overfrequency protection consists of the four stages (stage 1 to stage 4). When system frequency is greater than the setting [81O.f_Pkp], overfrequency protection will put into service. In order to prevent possible maloperation of overfreqency protection in conditions of high harmonics, voltage circuit failures and so on, such blocking measures are carried out as follows: 1. Blocking in undervoltage condition
If the positive voltage U<0.15Un, the calculation of protection is not carried out and the output relay will be blocked. 2. Frequency abnormality condition
When f<40Hz or f>65Hz, overfrequency protection will be blocked Operation criteria of overfrequency protection is shown in the following equation. f>[81O.OFx.f_Set] Where: f is system frequency. [81O.OFx.f_Set] is the frequency setting of stage x (x=1, 2, 3, or 4) of overfrequency protection.
Equation 3.16-3

81U.UFx 81U.En1 81U.En2 81U.Blk 81U.St 81U.UFx.Op 81O.En1 81O.En2 81O.Blk 81O.OFx 81O.St 81O.OFx.Op
3.16.4 I/O Signals

Table 3.16-1 I/O signals of underfrequency protection No. 1 Input Signal 81U.En1 Description Underfrequency protection enabling input 1, it is triggered from binary input or
3-144
Date: 2012-08-14
3 Operation Theory
programmable logic etc. 2 81U.En2 Underfrequency protection enabling input 2, it is triggered from binary input or programmable logic etc. Underfrequency protection blocking input, it is triggered from binary input or programmable logic etc. Three-phase voltage input Description Stage x of underfrequency protection operates (x=1, 2, 3 or 4). Underfrequency protection starts. Table 3.16-2 I/O signals of overfrequency protection No. 1 Input Signal 81O.En1 Description Overfrequency protection enabling input 1, it is triggered from binary input or programmable logic etc. Overfrequency protection enabling input 2, it is triggered from binary input or programmable logic etc. Overfrequency protection blocking input, it is triggered from binary input or programmable logic etc. Three-phase voltage input Description Stage x of overfrequency protection operates (x=1, 2, 3 or 4). Overfrequency protection starts.
3 4 No. 1 2
81U.Blk U3P Output Signal 81U.UFx.Op 81U.St
81O.En2
3 4 No. 1 2
81O.Blk U3P Output Signal 81O.OFx.Op 81O.St

Date: 2012-08-14
3-145
3 Operation Theory
3.16.5 Logic
SIG
[81U.En1] [81U.En2] [81U.Blk] U1<0.15Un
&
Enable 81U
SIG
SIG
OTH
1 Block 81U
SIG
f<40 or f>65 -df/dt>[81U.df/dt_Blk]
SET
>=1
EN
81U.UF1.En_df/dt_Blk
>=1
EN
>=1
EN
>=1
EN
SIG
81U.UF4.En_df/dt_Blk Enable 81U
& &
50ms 0ms
>=1
[81U.St]
SIG
Block 81U f<[81U.f_Pkp] f<[81U.UF1.f_Set] [81U.UF1.En]
OTH
SET
&
[81U.UF1.t_Op] 0ms [81U.UF1.Op]
EN
SET
f<[81U.UF2.f_Set] [81U.UF2.En]
&
EN
SET
&
EN
SET
&
EN
Figure 3.16-1 Logic diagram of underfrequency protection
When underfrequency protection is disabled, these signals, [81U.St] and [81U.UFx.Op], are both reset. The default values of inputs signals, [81U.En1] and [81U.En2], are 1 and [81U.Blk] is 0 if those inputs are not connected to external signals or setting.
3-146
Date: 2012-08-14
3 Operation Theory
SIG
[81O.En1] [81O.En2] [81O.Blk] U1<0.15Un
&
Enable 81O
SIG
SIG
OTH
1 Block 81O
SIG
f40 or f65 Enable 81O
SIG
& &
50ms 0ms 1 [81O.St]
SIG
Block 81O f>[81O.f_Pkp] f>[81O.OF1.f_Set] [81O.OF1.En]
OTH
SET
&
[81O.OF1.t_Op] 0ms [81O.OF1.Op]
EN
SET
f>[81O.OF2.f_Set] [81O.OF2.En]
&
EN
SET
&
EN
SET
&
EN
Figure 3.16-2 Logic diagram of overfrequency protection
When overfrequency protection is disabled, these signals, [81O.St] and [81O.OFx.Op], are both reset. The default values of input signals, [81O.En1] and [81O.En2] are 1 and [81O.Blk] is 0 if those inputs are not connected to external signals or setting.
3.16.6 Settings
Table 3.16-3 Settings of frequency protection No. 1 Name 81U.f_Pkp Range 45.000~60.000 Step 0.01 Unit Hz Frequency Remark pickup setting for
underfrequency protection Frequency setting for stage 1 of underfrequency protection Time delay for stage 1 of
81U.df/dt_Blk
0.200~20.000
0.01
Hz/s
81U.UF1.f_Set
45.000~60.000
0.001
Hz
81U.UF1.t_Op
0.050~30.000
0.01
81U.UF2.f_Set
45.000~60.000
0.001
Hz
underfrequency protection Frequency setting for stage 3 of underfrequency protection
81U.UF2.t_Op
0.050~30.000
0.01

Date: 2012-08-14
3-147
3 Operation Theory
7 81U.UF3.f_Set 45.000~60.000 0.001 Hz Time delay for stage 3 of
81U.UF3.t_Op
0.050~30.000
0.01
81U.UF4.f_Set
45.000~60.000
0.001
Hz
underfrequency protection Rate of frequency change for
10
81U.UF4.t_Op
0.050~30.000
0.01
blocking underfrequency protection Enabling/disabling stage 1 of
11
81U.UF1.En
0 or 1
underfrequency protection 0: disable 1: enable Enabling/disabling rate of frequency change to block stage 1 of
12
0 or 1
underfrequency protection 0: disable 1: enable Enabling/disabling stage 2 of
13
81U.UF2.En
0 or 1
14
0 or 1
15
81U.UF3.En
0 or 1
16
0 or 1
17
81U.UF4.En
0 or 1
18
0 or 1
underfrequency protection 0: disable 1: enable
3-148
Date: 2012-08-14
3 Operation Theory
19 81O.f_Pkp 50.000~65.000 (Hz) 0.001 Hz Frequency pickup setting for
overfrequency protection Frequency setting for stage 1 of overfrequency protection Time delay for stage 1 of
20
81O.OF1.f_Set
50.000~65.000 (Hz)
0.001
Hz
21
81O.OF1.t_Op
0.050~20.000 (s)
0.001
22
81O.OF2.f_Set
50.000~65.000 (Hz)
0.001
Hz
23
81O.OF2.t_Op
0.050~20.000 (s)
0.001
24
81O.OF3.f_Set
50.000~65.000 (Hz)
0.001
Hz
25
81O.OF3.t_Op
0.050~20.000 (s)
0.001
26
81O.OF4.f_Set
50.000~65.000 (Hz)
0.001
Hz
27
81O.OF4.t_Op
0.050~20.000 (s)
0.001
overfrequency protection Enabling/disabling stage 1 of
28
81O.OF1.En
0 or 1
overfrequency protection 0: disable 1: enable Enabling/disabling stage 2 of
29
81O.OF2.En
0 or 1
30
81O.OF3.En
0 or 1
31
81O.OF4.En
0 or 1
overfrequency protection 0: disable 1: enable
3.17 Breaker Failure Protection

Duplicated protection configurations are usually adopted for EHV power system, but the primary equipment, circuit breaker, is not duplicated. Breaker failure protection is adopted to cater circuit breaker tripping failure. Breaker failure protection issues a back-up trip command to trip adjacent circuit breakers in case of a tripping failure of the circuit breaker, and clears the fault as requested by the device. To utilize
Date: 2012-08-14
3-149
3 Operation Theory
the protection information of faulty equipment and the electrical information of failure circuit breaker to constitute the criterion of breaker failure protection, it can ensure that the adjacent circuit breakers of failure circuit breaker are tripped with a shorter time delay, so that the affected area is minimized, and ensure stable operation of the entire power grid to prevent generators, transformers and other components from seriously damaged.

The instantaneous re-tripping function, after receiving tripping signal from other device and the corresponding phase overcurrent element operating, is available and provides phase-segregated binary output contact, which can ensure the circuit breaker is still tripped in case the secondary circuit between the device and the circuit breaker is abnormal, to avoid undesired tripping of breaker failure protection and the expansion of the affected area. Instantaneous re-tripping function does not block AR. When both the phase-segregated tripping contact from line protection and the corresponding phase overcurrent element operate, or both the three-phase tripping contact and any phase overcurrent element operate, breaker failure protection will send three-phase tripping command to trip local circuit breaker after time delay of [50BF.t1_Op] and trip all adjacent circuit breakers after time delay of [50BF.t2_Op]. When the protection element except undervoltage element within this device operates and issues tripping signal, breaker failure protection will also be initiated. Taking into account that the faulty current is too small for generator or transformer fault, the sensitivity of phase current element may not meet the requirements, zero-sequence current criterion and negative-sequence current criterion are provided in addition to the phase overcurrent element for breaker failure protection initiated by input signal [50BF.ExTrp3P_GT] from generator and transformer protection. They can be enabled or disabled by logic settings [50BF.En_3I0_3P] and [50BF.En_I2_3P] respectively. For some special fault (for example, mechanical protection or overvoltage protection operating), maybe faulty current is very small and current criterion of breaker failure protection is not met, in order to make breaker failure protection can also operate under the above situation, an input signal [50BF.ExTrp_WOI] is equipped to initiate breaker failure protection, once the input signal is energized, normally closed auxiliary contact of circuit breaker is chosen in addition to breaker failure current check to trigger breaker failure timer. The device takes current as priority with CB auxiliary contact (52b) as an option criterion for breaker failure check.
3-150
Date: 2012-08-14
3 Operation Theory

50BF 50BF.ExTrp3P_L 50BF.ExTrp3P_GT 50BF.ExTrp_WOI 50BF.ExTrpA 50BF.ExTrpB 50BF.ExTrpC 50BF.En 50BF.Blk 50BF.Op_ReTrpA 50BF.Op_ReTrpB 50BF.Op_ReTrpC 50BF.Op_ReTrp3P 50BF.Op_t1 50BF.Op_t2
3.17.4 I/O Signals

Table 3.17-1 I/O signals of breaker failure protection No. 1 2 3 4 5 Input Signal 50BF.ExTrp3P_L 50BF.ExTrp3P_GT 50BF.ExTrpA 50BF.ExTrpB 50BF.ExTrpC Description Input signal of three-phase tripping contact from line protection Input signal of three-phase tripping contact from generator or transformer protection Input signal of phase-A tripping contact from external device Input signal of phase-B tripping contact from external device Input signal of phase-C tripping contact from external device Input signal of three-phase tripping contact from external device. Once it is 6 50BF.ExTrp_WOI energized, normally closed auxiliary contact of circuit breaker is chosen in addition to breaker failure current check to trigger breaker failure timers. 7 8 No. 1 2 3 4 5 6 50BF.En 50BF.Blk Output Signal 50BF.Op_ReTrpA 50BF.Op_ReTrpB 50BF.Op_ReTrpC 50BF.Op_ReTrp3P 50BF.Op_t1 50BF.Op_t2 Input signal of enabling breaker failure protection Breaker failure protection blocking input, such as function blocking binary input. When the input is 1, breaker failure protection is reset and time delay is cleared. Description Breaker failure protection operates to re-trip phase-A circuit breaker Breaker failure protection operates to re-trip phase-B circuit breaker Breaker failure protection operates to re-trip phase-C circuit breaker Breaker failure protection operates to re-trip three-phase circuit breaker Stage 1 breaker failure protection operates Stage 2 breaker failure protection operates

Date: 2012-08-14
3-151
3 Operation Theory
3.17.5 Logic
SIG
50BF.En & [50BF.En] 50BF.Blk Enable 50BF & Enable 50BF
EN
SIG
SIG
EN
[50BF.En_ReTrp] [50BF.En_3I0_1P] >=1
EN
SET
3I0>[50BF.3I0_Set] BFI_A >=1 & >=1 & [50BF.t_ReTrp] 0ms [50BF.Op_ReTrpA]
SIG
BI
[50BF.ExTrpA] IA>[50BF.I_Set] BFI_B >=1 & >=1 & [50BF.t_ReTrp] 0ms [50BF.Op_ReTrpB]
SET
SIG
BI
[50BF.ExTrpB] IB>[50BF.I_Set] BFI_C >=1 & >=1 & [50BF.t_ReTrp] 0ms [50BF.Op_ReTrpC]
SET
SIG
BI
[50BF.ExTrpC] IC>[50BF.I_Set] BFI_3P >=1 >=1
>=1
SET
SIG
&
BI
[50BF.ExTrp3P_L] >=1 [50BF.ExTrp3P_GT] >=1
&
[50BF.Op_ReTrp3P]
BI
BI
[50BF.ExTrp_WOI] & [50BF.En_3I0_3P] & >=1 &
EN
>=1
SET
3I0>[50BF.3I0_Set] [50BF.En_I2_3P] &
EN
SET
I2>[50BF.I2_Set] & [50BF.t1_Op] & [50BF.t2_Op] 0ms [50BF.Op_t2] 0ms [50BF.Op_t1]
EN
[50BF.En_CB_Ctrl] [52b_PhA] & [52b_PhB] [52b_PhC] Enable 50BF
BI
BI
BI
SIG
Figure 3.17-1 Logic diagram of breaker failure protection
3-152
Date: 2012-08-14
3 Operation Theory
3.17.6 Settings
Table 3.17-2 Settings of breaker failure protection No. 1 2 Name 50BF.I_Set 50BF.3I0_Set Range (0.050~30.000 )In (0.050~30.000 )In Step 0.001 0.001 Unit A A Remark Current setting of phase current criterion for BFP Current setting of zero-sequence current criterion for BFP Current setting of negative-sequence current criterion for BFP Time delay of re-tripping for BFP Time delay of stage 1 for BFP Time delay of stage 2 for BFP Enabling/disabling breaker failure protection 0: disable 1: enable Enabling/disabling re-trip function for BFP 0: disable 1: enable Enabling/disabling zero-sequence current criterion for BFP initiated by single-phase tripping contact 0: disable 1: enable Enabling/disabling zero-sequence current criterion for BFP initiated by three-phase tripping contact 0: disable 1: enable Enabling/disabling negative-sequence current criterion for BFP initiated by three-phase tripping contact 0: disable 1: enable Enabling/disabling breaker failure protection can be initiated by normally closed contact of circuit breaker 0: disable 1: enable
3 4 5 6
50BF.I2_Set 50BF.t_ReTrp 50BF.t1_Op 50BF.t2_Op
(0.050~30.000 )In 0.000~10.000 0.000~10.000 0.000~10.000
0.001 0.001 0.001 0.001
A s s s
50BF.En
0 or 1
50BF.En_ReTrp
0 or 1
50BF.En_3I0_1P
0 or 1
10
50BF.En_3I0_3P
0 or 1
11
50BF.En_I2_3P
0 or 1
12
50BF.En_CB_Ctrl
0 or 1
3.18 Thermal Overload Protection

During overload operation of a transmission line (specially for cable), great current results in
Date: 2012-08-14
3-153
3 Operation Theory
greater heat to lead temperature increase and if the temperature reaches too high values the equipment might be damaged. Thermal overload protection estimates the internal heat content (temperature) continuously. This estimation is made by using a thermal model with two time constants, which is based on current measurement. When the temperature increases to the alarm value, the protection issues alarm signals to remind the operator for attention, and if the temperature continues to increase to the trip value, the protection sends trip command to disconnect the protected line.

Thermal overload protection has following functions: Thermal time characteristic adopting IEC 60255-8 Two stages for alarm purpose and two stages for trip purpose Thermal accumulation can be cleared by external input signal
The device provides a thermal overload model which is based on the IEC60255-8 standard. The thermal overload formulas are shown as below. 1. Criterion of cooling start characteristic:
I2 T ln 2 I (k I B ) 2
2. Criterion of hot start characteristic:
2 I2 Ip
T ln
Where:
I 2 (k I B ) 2
T = Time to operate (in seconds)
= Thermal time constant of the equipment to be protected, the setting [49.Tau]

IB = Full load current rating, the setting [49.Ib_Set] I = The RMS value of the largest phase current IP = Steady state pre-loading before application of the overload k = Factor associated to the thermal state formula, the setting [49.K] ln = Natural logarithm The characteristic curve of thermal overload model is shown in Figure 3.18-1.
3-154
Date: 2012-08-14
3 Operation Theory
t Refer to IEC60255-8
Ip P= IB
P = 0.0 P = 0.6 P = 0.8 P = 0.9
kIB
Figure 3.18-1 Characteristic curve of the thermal overload model
The hot start characteristic is adopted in the device. The calculation is carried out at zero of Ip, so users need not to set the value of Ip. Tripping outputs of the protection is controlled by current, even if the thermal accumulation value is greater than the setting for tripping, the protection drops off instantaneously when current disappears. Alarm outputs of the protection is not controlled by current, and only if the thermal accumulation value is greater than the setting for alarm, alarm output contacts, which can be connected to block the auto-reclosure, will operate.

49 49.Clr_Cmd 49.En 49.Blk 49.St 49-1.Alm 49-1.Op 49-2.Alm 49-2.Op
3.18.4 I/O Signals

Table 3.18-1 I/O signals of thermal overload protection No. 1 2 Input Signal 49.Clr_Cmd 49.En Description Input signal of clear thermal accumulation value Thermal overload protection enabling input, it is triggered from binary input or programmable logic etc. Thermal overload protection blocking input, it is triggered from binary input or programmable logic etc. Three-phase current input
3 4
49.Blk I3P

Date: 2012-08-14
3-155
3 Operation Theory
No. 1 2 3 4 5 Output Signal 49.St 49-1.Op 49-2.Op 49-1.Alm 49-2.Alm Description Thermal overload protection starts. Stage 1 of thermal overload protection operates to trip. Stage 2 of thermal overload protection operates to trip. Stage 1 of thermal overload protection operates to alarm. Stage 2 of thermal overload protection operates to alarm.
3.18.5 Logic
SIG
[49.Blk] [49.En]
&
SIG
&
SIG SET
[49.I3P] [49.Ib_Set] &
49.St
Timer t t
49-x.Op
EN
[49-x.En_Trp]
&
EN BI
Timer t t
49-x.Alm
[49-x.En_Alm] [49.Clr_Cmd]
Figure 3.18-2 Logic diagram of thermal overload protection
Where: x can be 1 or 2
3.18.6 Settings
Table 3.18-2 Settings of thermal overload protection No. Name Range Step Unit Remark The factor setting for stage 1 of thermal overload protection which is associated to the thermal state formula The factor setting for stage 2 of thermal overload protection which is associated to the thermal state formula The reference current setting of the thermal overload protection The time constant setting of the IDMT overload protection Enabling/disabling stage 1 of thermal overload protection for alarm purpose PCS-902 Line Distance Relay
Date: 2012-08-14
49-1.K
1.000~3.000
0.001
49-2.K
1.000~3.000
0.001
3 4
49.Ib_Set 49.Tau
(0.050~30.000 )In 0.100~100.000
0.001 0.001
A min
49-1.En_Alm
0 or 1
3-156
3 Operation Theory
0: disable 1: enable Enabling/disabling stage 1 thermal overload protection for purpose 0: disable 1: enable Enabling/disabling stage 2 thermal overload protection alarm purpose 0: disable 1: enable Enabling/disabling stage 2 thermal overload protection for purpose 0: disable 1: enable
of trip
49-1.En_Trp
0 or 1
of for
49-2.En_Alm
0 or 1
of trip
49-2.En_Trp
0 or 1
3.19 Stub Overcurrent Protection

Stub overcurrent protection is mainly designed for one and a half breakers arrangement. When line disconnector is open and transmission line is put into maintenance, line VT is no voltage. Distance protection is disabled, and stub overcurrent protection is enabled. It is used to protect stub section among for two circuit breakers and line disconnector. Usually, stub overcurrent protection is enabled automatically by normally closed auxiliary contact of line disconnector.
CT1 CT2
Bus
Bus
To the device
Line
Line
Figure 3.19-1 3/2 breakers arrangement

Date: 2012-08-14
3-157
3 Operation Theory

50STB 50STB.En1 50STB.En2 50STB.Blk 50STB.Op 50STB.St
3.19.3 I/O Signals

Table 3.19-1 I/O signals of stub overcurrent protection No. 1 Input Signal 50STB.En1 Description Stub overcurrent protection enabling input 1, it is triggered from binary input or programmable logic etc. Stub overcurrent protection enabling input 2, it is triggered from binary input or programmable logic etc. Stub overcurrent protection blocking input, it is triggered from binary input or programmable logic etc. Normally closed auxiliary contact of line disconnector Description Stub overcurrent protection operates. Stub overcurrent protection starts.
50STB.En2
3 4 No. 1 2
50STB.Blk 50STB.89b_DS Output Signal 50STB.Op 50STB.St
3.19.4 Logic
Only one stage is available to stub overcurrent protection. Based on calculating summation current from dual CTs, the logic scheme of stub overcurrent protection is shown as Figure 3.19-2.
SIG
50STB.En1 50STB.En2 50STB.Blk Ia>[50STB.I_Set] Ib>[50STB.I_Set] Ic>[50STB.I_Set] [50STB.En]
SIG
& & &

[50STB.t_Op] 50STB.Op
SIG
SET
>=1
50STB.St
SET
SET
EN
Figure 3.19-2 Logic diagram of stub overcurrent protection
3-158
Date: 2012-08-14
3 Operation Theory
3.19.5 Settings
Table 3.19-2 Settings of stub overcurrent protection No. 1 Name 50STB.I_Set Range (0.050~30.000)In Step 0.001 Unit A Remark Current setting of stub overcurrent protection Time delay of stub overcurrent protection Enabling/disabling stub overcurrent 3 50STB.En 0 or 1 protection 1: enable 0: disable
50STB.t_Op
0.000~10.000
0.001
3.20 Dead Zone Protection

Generally, fault current is very large when multi-phase fault occurs between CT and circuit breaker (i.e. dead zone) and it will have a greater impact on the system. Breaker failure protection can operate after a longer time delay, in order to clear the dead zone fault quickly and improve the system stability, dead zone protection with shorter time delay (compared with breaker failure protection) is adopted.

For some wiring arrangement (for example, circuit breaker is located between CT and the line), if fault occurs between CT and circuit breaker, line protection can operate to trip circuit breaker quickly, but the fault have not been cleared since local circuit breaker is tripped. Here dead zone protection is needed in order to trip relevant circuit breaker. The criterion for dead zone protection is: when dead zone protection is enabled, binary input of initiating dead zone protection is energized (by default, three-phase tripping signal is used to initiate dead zone protection), if overcurrent element for dead zone protection operates, then corresponding circuit breaker is tripped and three phases normally closed contact of the circuit breaker are energized, dead zone protection will operate to trip adjacent circuit breaker after a time delay.

50DZ 50DZ.En1 50DZ.En2 50DZ.Blk 50DZ.ExStart 50DZ.St 50DZ.Op

Date: 2012-08-14
3-159
3 Operation Theory
3.20.4 I/O Signal

Table 3.20-1 I/O signals of dead zone protection No. 1 2 3 4 No. 1 2 Input Signal 50DZ.En1 50DZ.En2 50DZ.Blk 50DZ.ExStart Output Signal 50DZ.St 50DZ.Op Dead zone protection starts. Dead zone protection operates. Description Dead zone protection enabling input 1, it can be binary inputs or logic link. Dead zone protection enabling input 2, it can be binary inputs or logic link. Dead zone protection blocking input, such as function blocking binary input. When the input is 1, dead zone protection is reset and time delay is cleared. Initiation signal input of the dead zone protection. Description
3.20.5 Logic
EN
[50DZ.En]
& &
SIG
[50DZ.En1] [50DZ.En2]
[50DZ.Blk] 52b_PhA 52b_PhB 52b_PhC Ia > [50DZ.I_Set] Ib > [50DZ.I_Set] Ic > [50DZ.I_Set] [50DZ.ExStart]
SIG
SIG
BI
&
BI
BI
SET
& >=1 &

[50DZ.t_Op] 0ms
50DZ.St 50DZ.Op
SET
SET
SIG
Figure 3.20-1 Dead zone protection
3.20.6 Settings
Table 3.20-2 Settings of dead zone protection No. Name Range Step Unit Current 1 50DZ.I_Set (0.050~30.000)In 0.001 A Remark setting for dead zone
protection. This setting shall ensure the protection being sensitive enough if dead zone fault occurs.
50DZ.t_Op
0.000~10.000
0.001
Time delay of dead zone protection. Enabling/disabling dead zone
50DZ.En
0 or 1
protection. 1: enable
3-160
Date: 2012-08-14
3 Operation Theory
0: disable
3.21 Pole Discrepancy Protection

The pole discrepancy of circuit breaker may occur during operation of a breaker with segregated operating gears for the three phases. The reason could be an interruption in the tripping/closing circuits, or mechanical failure. A pole discrepancy can only be tolerated for a limited period. When there is loading, zero-sequence or negative-sequence current will be generated in the power system, which will result in overheat of the generator or the motor. With the load current increasing, overcurrent elements based on zero-sequence current or negative-sequence current may operate. Pole discrepancy protection is required to operate before the operation of these overcurrent elements.

Pole discrepancy protection determines three-phase breaker pole discrepancy condition by its phase segregated CB auxiliary contacts. In order to improve the reliability of pole discrepancy protection, the asymmetrical current component can be selected as addition criteria when needed.

62PD 62PD.En1 62PD.En2 62PD.Blk 62PD.Op 62PD.St
3.21.4 I/O Signals

Table 3.21-1 I/O signals of pole discrepancy protection No. 1 Input Signal 62PD.En1 Description Pole discrepancy protection enabling input 1, it is triggered from binary input or programmable logic etc. Pole discrepancy protection enabling input 2, it is triggered from binary input or programmable logic etc. Pole discrepancy protection blocking input, it is triggered from binary input or programmable logic etc. Pole discrepancy binary input Three-phase current input Description Pole discrepancy protection operates to trip Pole discrepancy protection starts 3-161
Date: 2012-08-14
62PD.En2
3 4 5 No. 1 2
62PD.Blk 62PD.In_PD I3P Output Signal 62PD.Op 62PD.St
3 Operation Theory
3.21.5 Logic
Pole discrepancy protection can be initiated by two methods. 1. Initiation method 1
It uses combination of circuit breaker normally closed and normally open auxiliary contacts to initiate pole discrepancy protection, i.e. the binary input [62PD.In_PD] and its connection is shown as below.
DC+ 52b_PhA 52a_PhA
52b_PhB
52a_PhB Binary input 62PD.In_PD
52b_PhC
52a_PhC
Figure 3.21-1 Pole discrepancy
Where: 52b_PhA: normally closed CB auxiliary contact of phase A 52b_PhB: normally closed CB auxiliary contact of phase B 52b_PhC: normally closed CB auxiliary contact of phase C 52a_PhA: normally open CB auxiliary contact of phase A 52a_PhB: normally open CB auxiliary contact of phase B 52a_PhC: normally open CB auxiliary contact of phase C 2. Initiation method 2
Phase-segregated circuit breaker auxiliary contacts are connected to the device. When the state of three phase-segregated circuit breaker auxiliary contacts are inconsistent, pole discrepancy protection will be started and initiate output after a time delay [62PD.t_Op]. Pole discrepancy protection can be blocked by external input signal [62PD.Blk]. In general, this input signal is usually from the output of 1-pole AR initiation, so as to prevent pole discrepancy protection from operation during 1-pole AR initiation.
3-162
Date: 2012-08-14
3 Operation Theory
SIG
62PD.En1 62PD.En2 [62PD.Blk] [62PD.En] [62PD.In_PD] [62PD.En_3I0/I2_Ctrl] 3I0>[62PD.3I0_Set] I2>[62PD.I2_Set]
&
SIG BI EN BI EN SET
62PD.St
&
&
[62PD.t_Op] 0ms 62PD.Op
>=1 >=1
SET
Figure 3.21-2 Logic diagram of pole discrepancy protection
3.21.6 Settings
Table 3.21-2 Settings of pole discrepancy protection No. 1 Name 62PD.3I0_Set Range (0.050~30.000 )In Step 0.001 Unit A Remark Current setting of residual current criterion for pole discrepancy protection Current setting of negative-sequence current criterion for pole discrepancy protection Time delay of pole discrepancy protection Enabling/disabling pole discrepancy protection 0: disable 1: enable Enabling/disabling residual current criterion and negative-sequence current criterion for pole discrepancy protection 0: disable 1: enable
62PD.I2_Set
(0.050~30.000 )In
0.001
62PD.t_Op
0.000~10.000
0.001
62PD.En
0 or 1
62PD.En_3I0/I2_Ctrl
0 or 1
3.22 Broken Conductor Protection

Single-phase earthing fault and two-phases earthing fault are the most common fault on circuits, the fault is easy to detect because the fault current will increase obviously. Broken-conductor fault is difficult to detect since there is no increase of current but negative-sequence current, so negative-sequence overcurrent protection can be considered to clear broken-conductor fault. However, under heavy load condition, negative-sequence current is relative large due to unbalance loading, but negative-sequence current because of
Date: 2012-08-14
3-163
3 Operation Theory
broken-conductor fault under light load condition is relative small. If negative-sequence current protection is set larger than maximum negative-sequence current under loading, the protection may be failure to operate if broken-conductor fault happens under light load condition, negative-sequence overcurrent protection is therefore not suitable to apply for broken-conductor fault. The network of single-phase broken condition is similar to that of two-phases earthing fault, positive-sequence, negative-sequence and zero-sequence network is connected in parallel, I2/I1= Z0/(Z0+Z2), generally, zero-sequence impedance is larger than positive-sequence impedance, i.e. I2/I1>0.5. The network of two-phases broken condition is similar to that of single-phase earthing fault, positive-sequence, negative-sequence and zero-sequence network is connected in series, so I2/I1=1.

Broken-conductor fault mainly is single-phase broken or two-phases broken. According to the ratio of negative-sequence current to positive-sequence current (I2/I1), it is used to judge whether there is an broken-conductor fault. Negative-sequence current under normal operating condition (i.e. unbalance current) is due to CT error and unbalance load, so the ratio of negative-sequence current to positive-sequence current (amplitude) is relative steady. The value with margin can then be used as the setting of broken conductor protection. It is mainly used to detect broken-conductor fault and CT circuit failure as well.

46BC 46BC.En1 46BC.En2 46BC.Blk 46BC.St 46BC.Op
3.22.4 I/O Signals

Table 3.22-1 I/O signals of broken conductor protection No. 1 Input Signal 46BC.En1 Description Enable broken conductor protection input 1, it is triggered from binary input or programmable logic etc. Enable broken conductor protection input 2, it is triggered from binary input or programmable logic etc. Broken conductor protection blocking input, it is triggered from binary input or programmable logic etc. Description Broken-conductor protection starts
46BC.En2
3 No. 1
46BC.Blk Output Signal 46BC.St
3-164
Date: 2012-08-14
3 Operation Theory
2 46BC.Op Broken-conductor protection operates.
3.22.5 Logic
EN
[46BC.En]
& &
SIG
[46BC.En1] [46BC.En2] &
& 46BC.St [46BC.t_Op] 0ms 46BC.Op
SIG
SIG
[46BC.Blk] I2/I1>[46BC.K_Set]
SET
Figure 3.22-1 Logic diagram of broken conductor protection
3.22.6 Settings
Table 3.22-2 Settings of broken conductor protection No. 1 Name 46BC.k_Set Range 0.20~1.00 Step 0.001 Unit Remark Ratio setting (negative-sequence current to positive-sequence current) of broken conductor protection Time delay of broken conductor protection Enabling/disabling broken conductor protection 0: disable 1: enable
46BC.t_Op
0.000~600.000
0.001
46BC.En
0 or 1
3.23 Synchrocheck
The purpose of synchrocheck is to ensure two systems are synchronism before they are going to be connected. When two asynchronous systems are connected together, due to phase difference between the two systems, larger impact will be led to the system during closing. Thus auto-reclosing and manual closing are applied with the synchrocheck to avoid this situation and maintain the system stability. The synchrocheck includes synchronism check and dead charge check.

The synchronism check function measures the conditions across the circuit breaker and compares them with the corresponding settings. The output is only given if all measured quantities are simultaneously within their set limits. The dead charge check function measures the amplitude of line voltage and bus voltage at both sides of the circuit breaker, and then compare them with the live check setting [25.U_Lv] and the dead check setting [25.U_Dd]. The output is only given when the measured quantities comply with
Date: 2012-08-14
3-165
3 Operation Theory
the criteria. Synchrocheck in this device can be used for auto-reclosing and manual closing for both single-breaker and dual-breakers. Details are described in the following sections. When used for the synchrocheck of single-breaker, comparative relationship between reference voltage (UL) and incoming voltage (UB) for synchronism is as follows.
UL
UB
Figure 3.23-1 Relationship between reference voltage and synchronous voltage
Figure 3.23-1 shows the characteristics of synchronism check element used for the auto-reclosing if both line and busbar are live. The synchronism check element operates if voltage difference, phase angle difference and frequency differency are all within their setting values. 1. The voltage difference is checked by the following equations.
[25.U_Lv]UB [25.U_Lv] UL [25.U_Diff]|UB- UL| 2. The phase difference is checked by the following equations.
UB.UL cos0 UB.UL sin([25.phi_Diff])UB.UL sin([25.phi_Diff]) Where, is phase difference between UB and UL 3. The frequency difference is checked by the following equations.
|f(UB)-f(UL)|[25.f_Diff] If frequency check is disabled (i.e. [25.En_fDiffChk] is set as 0), a detected maximum slip cycle can also be determined by the following equation based on phase difference setting and the synchronism check time setting: f =[25.phi_Diff]/(180[25.t_SynChk]) Where:
3-166
Date: 2012-08-14
3 Operation Theory
f is slip cycle If frequency check is enabled (i.e. [25.En_fDiffChk] is set as 1), then [25.t_SynChk] can be set to be a very small value (default value is 50ms). 3.23.2.1 Single Busbar Arrangement Voltage selection function is not required for this busbar arrangement, the connection of the voltage signals and respective VT MCB auxiliary contacts to the device is shown in the Figure 3.23-2 and Figure 3.23-3. 1. Three-phase bus voltage used for protection
Bus
VTS.En_Line_VT=0 Ua Ub Uc
UL1
MCB_VT_UL1
MCB_VT_UB1
Figure 3.23-2 Voltage connection for single busbar arrangement
2.
Three-phase line voltage used for protection

Bus
VTS.En_Line_VT=1
MCB_VT_UB1
UL1
MCB_VT_UL1
Figure 3.23-3 Voltage connection for single busbar arrangement
In the figures, the setting [VTS.En_Line_VT] is used to determine protection voltage signals (Ua, Ub, Uc) from line VT or bus VT according to the condition.

Date: 2012-08-14
CB
UB1
Line
UB1
CB
Ua Ub Uc Line
3-167
3 Operation Theory
3.23.2.2 Double Busbars Arrangement

Bus2 Bus1
UB1 MCB_VT_UB1 UB2 MCB_VT_UB2 UB1D_Clsd UB1D_Open UB2D_Clsd UB2D_Open Ua Ub Uc
B1D B2D
CB
UL1
MCB_VT_UL1
Figure 3.23-4 Voltage connection for double busbars arrangement
For double busbars arrangement, selection of appropriate voltage signals from Bus 1 and Bus 2 for synchronizing are required. Line VT signal is taken as reference to check synchronizing with the voltage after voltage selection function. Selection approach is as follows. For the disconnector positions, the normally open (NO) and normally closed (NC) contacts of the disconnector for bus 1 and bus 2 are required to determine the disconnector open and closed positions. The voltage selection logic is as follows.
BI
UB1D_Clsd
BI
UB1D_Open Voltage Selection Logic
BI
UB2D_Clsd
BI
UB2D_Open
Figure 3.23-5 Voltage selection for double busbars arrangement 3-168

Date: 2012-08-14
Line
&
UB1_SEL
&
UB2_SEL
&
Invalid_SEL
UB1 UB2
UB
3 Operation Theory
After acquiring the disconnector open and closed positions of double busbars, use the following logic to acquire the feeder voltage of double busbars.
DS2 CLOSED DS1 CLOSED DS1 OPEN Keep original value Voltage from Bus 2 VT (UB2_Sel=1) DS2 OPEN Voltage from Bus 1 VT (UB1_Sel=1) Keep original value
DS1 is disconnector of Bus 1 DS2 is disconnector of Bus 2 If voltage selection is invalid (Invalid_SEL=1), keep original selection and without switchover. 3.23.2.3 One and A Half Breakers Arrangement For one and a half breakers arrangement, selection of appropriate voltage signals among Line1 VT, Line2 VT and Bus 2 VT as reference voltage to check synchronizing with Bus 1 voltage signal for closing breaker at Bus 1 side.
Bus1
UB1 MCB_VT_UB1 UB1D_Clsd UB1D_Open Ua Ub Uc
B1D
Line 1
UL1
MCB_VT_UL1 UL1D_Clsd UL1D_Open UL2 MCB_VT_UL2 UL2D_Clsd UL2D_Open UB2D_Clsd UB2D_Open UB2 MCB_VT_UB2 B2D Bus2
Figure 3.23-6 Voltage connection for one and a half breakers arrangement

Date: 2012-08-14
L1D
Line 2
L2D
3-169
3 Operation Theory
For the circuit breaker at bus side (take bus breaker of bus 1 as an example), the device acquires the disconnector open and closed positions of two feeders and bus 2. The voltage selection logic is as follows.
BI
UL1D_Clsd
&
UL1_SEL
BI
UL1D_Open UL2D_Clsd
& & & & &

Invalid_SEL UB2_SEL UL2_SEL
BI
BI
UL2D_Open UB2D_Clsd
BI
BI
UB2D_Open
UL1 UL2 UB2
UL
Figure 3.23-7 Voltage selection for one and a half breakers arrangement
For the tie breaker, the device acquires the disconnector open and closed positions of two feeders and two busbars. Either Line 1 VT or Bus 1 VT signal is selected as reference voltage to check synchronizing with the selected voltage between Line 2 VT and Bus 2 VT. The voltage selection logic is as follows.
3-170
Date: 2012-08-14
3 Operation Theory
BI
UL1D_Clsd
&
UL1_SEL
BI
UL1D_Open UB1D_Clsd
& & &

UB1_SEL
BI
BI
UB1D_Open
UL1 UB1
UL
BI
UL2D_Clsd
&
UL2_SEL
BI
UL2D_Open UB2D_Clsd
& & >=1 &

Invalid_SEL UB2_SEL
BI
BI
UB2D_Open
UL2 UB2
UB
Figure 3.23-8 Voltage selection for one and a half breakers arrangement
When the voltage selection fails (including VT circuit failure and MCB failure), the device will issue the corresponding failure signal. If the voltage selection is invalid (Invalid_SEL=1), keep original selection and without switchover. In order to simplify description, one of the two voltages used in the synchrocheck (synchronism check and dead charge check) which obtained after voltage selection function is regarded as line voltage, and another is bus voltage. 3.23.2.4 Synchronism Voltage Circuit Failure Supervision If synchronism voltage from line VT or busbar VT is used for auto-reclosing with synchronism or dead line or busbar check, the synchronism voltage is monitored. If the circuit breaker is in closed state (52b of three phases are de-energized), but the synchronism voltage is lower than the setting [25.U_Lv], it means that synchronism voltage circuit fails and an alarm [25.Alm_VTS_UB] or [25.Alm_VTS_UL] will be issued with a time delay of 10s. If auto-reclosing is disabled, or the logic setting [25.En_NoChk] is set as 1, synchronism voltage is not required and synchronism voltage circuit failure supervision will be disabled. When synchronism voltage circuit failure is detected, function of synchronism check and dead check in auto-reclosing logic will be disabled.
Date: 2012-08-14
3-171
3 Operation Theory
After synchronism voltage reverted to normal condition, the alarm will be reset automatically with a time delay of 10s.
3.23.3 I/O Signals

Table 3.23-1 I/O signals of synchrocheck No. 1 2 3 4 5 6 7 8 No. 1 2 3 4 5 6 Input Signal 25.Blk_Chk 25.Blk_SynChk 25.Blk_DdChk 25.Start_Chk 25.Blk_VTS_UB 25.Blk_VTS_UL 25.MCB_VT_UB 25.MCB_VT_UL Output Signal UL1_Sel UL2_Sel UB1_Sel UB2_Sel Invalid_Sel 25.Ok_fDiff To select voltage of Line 1 To select voltage of Line 2 To select voltage of Bus 1 To select voltage of Bus 2 Voltage selection is invalid. To indicate that frequency difference condition for synchronism check of AR is met, frequency difference between UB and UL is smaller than [25.f_Diff]. To indicate that voltage difference condition for synchronism check of AR is met, voltage difference between UB and UL is smaller than [25.U_Diff] To indicate phase difference condition for synchronism check of AR is met, phase difference between UB and UL is smaller than [25.phi_Diff]. Dead line and dead bus condition is met Dead line and live bus condition is met Live line and dead bus condition is met Line voltage is greater than the voltage setting [25.U_Lv] Line voltage is smaller than the voltage setting [25.U_Dd] Bus voltage is greater than the voltage setting [25.U_Lv] Bus voltage is smaller than the voltage setting [25.U_Dd] To indicate that dead charge check condition of AR is met To indicate that synchronism check condition of AR is met To indicate that synchrocheck condition of AR is met Synchronism voltage circuit is abnormal (UB) Synchronism voltage circuit is abnormal (UL) Frequency of the voltage used by protection calculation Frequency of the voltage used by synchrocheck Description Input signal of blocking synchrocheck function for AR. Input signal of blocking synchronism check for AR. If the value is 1, the output of synchronism check is 0. Input signal of blocking dead charge check for AR. Input signal of starting synchronism check, usually it was starting signal of AR from auto-reclosing module. VT circuit supervision (UB) is blocked VT circuit supervision (UL) is blocked Binary input for VT MCB auxiliary contact (UB) Binary input for VT MCB auxiliary contact (UL) Description
25.Ok_UDiff
8 9 10 11 12 13 14 15 16 17 18 19 20 21 22
25.Ok_phiDiff 25.Ok_DdL_DdB 25.Ok_DdL_LvB 25.Ok_LvL_DdB 25.Chk_LvL 25.Chk_DdL 25.Chk_LvB 25.Chk_DdB 25.Ok_DdChk 25.Ok_SynChk 25.Ok_Chk 25.Alm_VTS_UB 25.Alm_VTS_UL f_Prot f_Syn
3-172
Date: 2012-08-14
3 Operation Theory
23 24 25 u_Diff f_Diff phi_Diff Voltage difference for synchronism check Frequency difference for synchronism check Phase difference for synchronism check
3.23.4 Logic
These logic diagrams give the introduction to the working principles of the synchronism check and dead charge check. 3.23.4.1 Synchronism Check Logic The frequency difference, voltage difference, and phase difference of voltages from both sides of the circuit breaker are calculated in the device, they are used as input conditions of the synchronism check. When the synchronism check function is enabled and the voltages of both ends meets the requirements of the voltage difference, phase difference, and frequency difference, and there is no synchronism check blocking signal, it is regarded that the synchronism check conditions are met.
SIG
25.Blk_Chk
>=1 &
SIG
25.Blk_SynChk [25.En_SynChk] 25.Start_Chk UB>[25.U_Lv] UL>[25.U_Lv] 25.Ok_UDiff 25.Ok_phiDiff 25.Ok_fDiff
EN
SIG
SIG
&
50ms 0ms
& &
[25.t_SynChk] 0ms 25.Ok_SynChk
SIG
SIG
SIG
SIG
Figure 3.23-9 Synchronism check
3.23.4.2 Dead Charge Check Logic The dead charge check conditions have three types, namely, live-bus and dead-line check, dead-bus and live-line check and dead-bus and dead-line check. The above three modes can be enabled and disabled by the corresponding logic settings. The device can calculate the measured bus voltage and line voltage at both sides of the circuit breaker and compare them with the settings [25.U_Lv] and [25.U_Dd]. When the voltage is higher than [25.U_Lv], the bus/line is regarded as live. When the voltage is lower than [25.U_Dd], the bus/line is regarded as dead.

Date: 2012-08-14
3-173
3 Operation Theory
SIG 25.Blk_Chk >=1 & SIG SIG EN 25.Blk_DdChk 25.Start_Chk [25.En_DdL_DdB] & 25.Ok_DdL_DdB >=1 & [25.t_DdChk] 0ms 25.Ok_DdChk
EN
[25.En_DdL_LvB]
& 25.Ok_DdL_LvB
EN SIG SIG SIG SIG SIG
[25.En_LvL_DdB] UL>[25.U_Lv] UL<[25.U_Dd] UB>[25.U_Lv] UB<[25.U_Dd] 25.Alm_VTS_UB >=1
& 25.Ok_LvL_DdB
SIG
25.Alm_VTS_UL
Figure 3.23-10 Dead charge check logic
3.23.4.3 Synchrocheck Logic

SIG
25.Ok_SynChk >=1 25.En_NoChk 25.Ok_DdChk 25.Ok_Chk
EN
SIG
Figure 3.23-11 Synchrocheck logic
This device comprises two synchrocheck modules, correspond to circuit breaker 1 and circuit breaker 2 respectively.
3.23.5 Settings
Table 3.23-2 Settings of synchrocheck No. Name Range Step Unit Remark Voltage selecting mode of line. 0: A-phase voltage 1 25.Opt_Source_UL 0~5 1 1: B-phase voltage 2: C-phase voltage 3: AB-phase voltage 3-174
Date: 2012-08-14
3 Operation Theory
4: BC-phase voltage 5: CA-phase voltage Voltage selecting mode of bus. 0: A-phase voltage 1: B-phase voltage 2 25.Opt_Source_UB 0~5 1 2: C-phase voltage 3: AB-phase voltage 4: BC-phase voltage 5: CA-phase voltage 3 4 5 25.U_Dd 25.U_Lv 25.K_Usyn 0.05Un~0.8Un 0.5Un~Un 0.20-5.00 0.001 0.001 V V Voltage threshold of dead check Voltage threshold of live check Compensation coefficient for
synchronous voltage 1 Deg Phase difference limit of
25.phi_Diff
0~ 89
synchronism check for AR Compensation for between phase two
25.phi_Comp
0~359
Deg
difference
synchronous voltages 8 25.f_Diff 0.02~1.00 0.01 Hz Frequency difference limit of
synchronism check for AR Voltage difference limit of
25.U_Diff
0.02Un~0.8Un
synchronism check for AR Time delay to confirm dead check condition Time delay to confirm
10
25.t_DeadChk
0.010~25.000
11
25.t_SynChk
0.010~25.000
synchronism check condition Enabling/disabling frequency
12
25.En_fDiffChk
0 or 1
difference check 0: disable 1: enable Enabling/disabling synchronism
13
25.En_SynChk
0 or 1
check 0: disable 1: enable Enabling/disabling dead line and
14
25.En_DdL_DdB
0 or 1
dead bus (DLDB) check 0: disable 1: enable Enabling/disabling dead line and
15
25.En_DdL_LvB
0 or 1
live bus (DLLB) check 0: disable 1: enable
16
25.En_LvL_DdB
0 or 1
Enabling/disabling live line and

Date: 2012-08-14
3-175
3 Operation Theory
dead bus (LLDB) check 0: disable 1: enable Enabling/disabling AR without any 17 25.En_NoChk 0 or 1 check 0: disable 1: enable
3.24 Automatic Reclosure

To maintain the integrity of the overall electrical transmission system, the device is installed on the transmission system to isolate faulted segments during system disturbances. Faults caused by lightning, wind, or tree branches could be transient in nature and may disappear once the circuit is de-energized. According to statistics, for overhead transmission line, 80%~90% of the faults on overhead lines are the transient faults. Auto-reclosing systems are installed to restore the faulted section of the transmission system once the fault is extinguished (providing it is a transient fault). For certain transmission systems, auto-reclosure is used to improve system stability by restoring critical transmission paths as soon as possible. Besides overhead lines, other equipment failure, such as cables, busbar, transformer fault and so on, are generally permanent fault, and auto-reclosing is not initiated after faulty feeder is tripped. For some mixed circuits, such as overhead line with a transformer unit, hybrid transmission lines, etc., it is required to ensure that auto-reclosing is only initiated for faults overhead line section, or make a choice according to the situation.

This auto-reclosing logic can be used with either integrated device or external device. When the auto-reclosure is used with integrated device, the internal protection logic can initiate AR, moreover, a tripping contact from external device can be connected to the device via opto-coupler input to initiate integrated AR function. When external auto-reclosure is used, the device can output some configurable output to initiate external AR, such as, contact of initiating AR, phase-segregated tripping contact, single-phase tripping contact, three-phase tripping contact and contact of blocking AR. According to requirement, these contacts can be selectively connected to external auto-reclosure device to initiate AR. For phase-segregated circuit breaker, AR mode can be 1-pole AR for single-phase fault and 3-pole AR for multi-phase fault, or always 3-pole AR for any kinds of fault according to system requirement. For persistent fault or multi-shot AR number preset value is reached, the device will send final tripping command. The device will provide appropriate tripping command based on faulty phase selection if adopting 1-pole AR. AR can be enabled or disabled by logic setting or external signal via binary input. When AR is enabled, the device will output contact [79.On], otherwise, output contact [79.Off]. After some
3-176
Date: 2012-08-14
3 Operation Theory
reclosing conditions, such as, CB position, CB pressure and so on, is satisfied, the device will output contact [79.Ready]. According to requirement, the device can be set as one-shot or multi-shot AR. When adopting multi-shot AR, the AR mode of first time reclosing can be set as 1-pole AR, 3-pole AR or 1/3-pole AR. The rest AR mode is only 3-pole AR and its number is determined by the maximum 3-pole reclosing number. For one-shot AR or first reclosing of multi-shot AR, AR mode can be selected by logic setting [79.En_1PAR], [79.En_3PAR] and [79.En_1P/3PAR] or external signal via binary inputs. When 3-pole or 1/3-pole AR mode is selected, the following three types of check modes can be selected: dead charge check, synchronism check and no check.

Date: 2012-08-14
3-177
3 Operation Theory

79 79.En 79.Blk 79.Sel_1PAR 79.Sel_3PAR 79.Sel_1P/3PAR 79.Trp 79.Trp3P 79.TrpA 79.TrpB 79.TrpC 79.Lockout 79.PLC_Lost 79.WaitMaster 79.CB_Healthy 79.Clr_Counter 79.Ok_Chk 79.On 79.Off 79.Close 79.Ready 79.AR_Blkd 79.Active 79.Inprog 79.Inprog_1P 79.Inprog_3P 79.Inprog_3PS1 79.Inprog_3PS2 79.Inprog_3PS3 79.Inprog_3PS4 79.WaitToSlave 79.Prem_Trp1P 79.Prem_Trp3P 79.Fail_Rcls 79.Succ_Rcls 79.Fail_Chk 79.Mode_1PAR 79.Mode_3PAR 79.Mode_1/3PAR
3.24.4 I/O Signals

Table 3.24-1 I/O signals of auto-reclosing No. 1 79.En Input Signal Description Binary input for enabling AR. If the logic setting [79.En_ExtCtrl]=1, enabling AR will be controlled by the external signal via binary input Binary input for disabling AR. If the logic setting [79.En_ExtCtrl]=1, disabling AR will be controlled by the external input Input signal for selecting 1-pole AR mode of corresponding circuit PCS-902 Line Distance Relay
Date: 2012-08-14
2 3 3-178
79.Blk 79.Sel_1PAR
3 Operation Theory
breaker 4 79.Sel_3PAR Input signal for selecting 3-pole AR mode of corresponding circuit breaker Input signal for selecting 1/3-pole AR mode of corresponding circuit breaker Input signal of single-phase tripping from line protection to initiate AR Input signal of three-phase tripping from line protection to initiate AR Input signal of A-phase tripping from line protection to initiate AR Input signal of B-phase tripping from line protection to initiate AR Input signal of C-phase tripping from line protection to initiate AR Input signal of blocking reclosing, usually it is connected with the 11 79.Lockout operating signals of definite-time protection, transformer protection and busbar differential protection, etc. 12 13 79.PLC_Lost 79.WaitMaster Input signal of indicating the alarm signal that signal channel is lost Input signal of waiting for reclosing permissive signal from master AR (when reclosing multiple circuit breakers) The input for indicating whether circuit breaker has enough energy to perform the close function Clear the reclosing counter Synchrocheck condition of AR is met Description Automatic reclosure is enabled Automatic reclosure is disabled Output of auto-reclosing signal Automatic reclosure have been ready for reclosing cycle Automatic reclosure is blocked Automatic reclosing logic is actived Automatic reclosing cycle is in progress The first 1-pole AR cycle is in progress 3-pole AR cycle is in progress First 3-pole AR cycle is in progress Second 3-pole AR cycle is in progress Third 3-pole AR cycle is in progress Fourth 3-pole AR cycle is in progress Waiting signal of automatic reclosing which will be sent to slave (when reclosing multiple circuit breakers) Single-phase circuit breaker will be tripped once protection device operates Three-phase circuit breaker will be tripped once protection device operates Auto-reclosing fails Auto-reclosing is successful Synchrocheck for AR fails
5 6 7 8 9 10
79.Sel_1P/3PAR 79.Trp 79.Trp3P 79.TrpA 79.TrpB 79.TrpC
14 15 16 No. 1 2 3 4 5 6 7 8 9 10 11 12 13 14
79.CB_Healthy 79.Clr_Counter 79.Ok_Chk Output Signal 79.On 79.Off 79.Close 79.Ready 79.AR_Blkd 79.Active 79.Inprog 79.Inprog_1P 79.Inprog_3P 79.Inprog_3PS1 79.Inprog_3PS2 79.Inprog_3PS3 79.Inprog_3PS4 79.WaitToSlave
15
79.Prem_Trp1P
16 17 18 19
79.Prem_Trp3P 79.Fail_Rcls 79.Succ_Rcls 79.Fail_Chk

Date: 2012-08-14
3-179
3 Operation Theory
20 21 22 79.Mode_1PAR 79.Mode_3PAR 79.Mode_1/3PAR Output of 1-pole AR mode Output of 3-pole AR mode Output of 1/3-pole AR mode Automatic reclosure counter 23 24 25 26 27 28 79.N_Total_Rcls Total 79.N_Total_Rcls 1-pole Shot 1 79.N_Total_Rcls 3-pole Shot 1 79.N_Total_Rcls 3-pole Shot 2 79.N_Total_Rcls 3-pole Shot 3 79.N_Total_Rcls 3-pole Shot 4 Recorded number of all reclosing attempts Recorded number of first 1-pole reclosing attempts Recorded number of first 3-pole reclosing attempts Recorded number of second 3-pole reclosing attempts Recorded number of third 3-pole reclosing attempts Recorded number of fourth 3-pole reclosing attempts
3.24.5 Logic
3.24.5.1 AR Ready For the first reclosing of multi-shot AR, AR mode can be 1-pole AR or 3-pole AR, however, the selection is valid only to the first reclosing, after that it can only be 3-pole AR. When logic setting [79.SetOpt] is set as 1, AR mode is determined by logic settings. When logic setting [79.SetOpt] is set as 0, AR mode is determined by external signal via binary inputs. An auto-reclosure must be ready to operate before performing reclosing. The output signal [79.Ready] means that the auto-reclosure can perform at least one time of reclosing function, i.e., breaker open-close-open. When the device is energized or after the settings are modified, the following conditions must be met before the reclaim time begins: 1. 2. 3. AR function is enabled. The circuit breaker is ready, such as, normal storage energy and no low pressure signal. The duration of the circuit breaker in closed position before fault occurrence is not less than the setting [79.t_CBClsd]. There is no block signal of auto-reclosing.
4.
After the auto-reclosure operates, the auto-reclosure must reset, i.e., [79.Active]=0, in addition to the above conditions for reclosing again. The logic of AR ready is shown in Figure 3.24-1. When there is a fault on an overhead line, the concerned circuit breakers will be tripped normally. After fault is cleared, the tripping command will drop off immediately. In case the circuit breaker is in failure, etc., and the tripping signal of the circuit breaker maintains and in excess of the time delay [79.t_PersistTrp], AR will be blocked, as shown in the following figure.
3-180
Date: 2012-08-14
3 Operation Theory
SIG
Any tripping signal 79.LockOut 1-pole AR Initiation Any tripping signal [79.En_PDF_Blk] 79.Sel_1PAR
[79.t_PersistTrp] 0ms
>=1
0ms [79.t_DDO_BlkAR] [79.t_SecFault] 0ms
SIG
SIG
&
SIG
En
SIG
& >=1 & &

79.AR_Blkd
En
[79.N_Rcls]=1 Three phase trip Phase A open
SIG
SIG
SIG
Phase B open
&
>=1
&
SIG
Phase C open
SIG
CB closed position 79.Active
[79.t_CBClsd]
100ms
& >=1
>=1
SIG
SIG
Any tripping signal [79.CB_Healthy] 79.AR_Blkd 0ms [79.t_CBReady]
& &
79.Ready
BI
SIG
>=1 >=1 & >=1
SIG
BlockAR 79.Fail_Rcls 79.Fail_Chk Last shot is made [79.En]
SIG
SIG
SIG
EN
& >=1
79.On
EN
[79.En_ExtCtrl]
&
SIG
79.En
&
SIG
79.Blk
Figure 3.24-1 Logic diagram of AR ready
The input signal [79.CB_Healthy] must be energized before auto-reclosure gets ready. Because most circuit breakers can finish one complete process: open-closed-open, it is necessary that circuit breaker has enough energy before reclosing. When the time delay of AR is exhausted, AR
Date: 2012-08-14
3-181
3 Operation Theory
will be blocked if the input signal [79.CB_Healthy] is still not energized within time delay [79.t_CBReady]. If this function is not required, the input signal [79.CB_Healthy] can be not to configure, and its state will be thought as 1 by default. When auto-reclosure is blocked, auto-reclosing failure, synchrocheck failure or last shot is reached, or when the internal blocking condition of AR is met (such as, zone 3 of distance protection operates, the device operates for multi-phase fault, three-phase fault and so on. These flags of blocking AR have been configured in the device, additional configuration is not required.), auto-reclosure will be discharged immediately and next auto-reclosing will be disabled. When the input signal [79.LockOut] is energized, auto-reclosure will be blocked immediately. The blocking flag of AR will be also controlled by the internal blocking condition of AR. When the blocking flag of AR is valid, auto-reclosure will be blocked immediately. When a fault occurs under pole disagreement condition, blocking AR can be enabled or disabled. The time delay [79.t_SecFault] is used to discriminate another fault which begins after 1-pole AR initiated. AR will be blocked if another fault happens after this time delay if the logic setting [79.En_PDF_Blk] is set as 1, and 3-pole AR will be initiated if [79.En_PDF_Blk] is set as 1. AR will be blocked immediately once the blocking condition of AR appears, but the blocking condition of AR will drop off with a time delay [79.t_DDO_BlkAR] after blocking signal disappears. When one-shot and 1-pole AR is enabled, auto-reclosure will be blocked immediately if there are binary inputs of multi-phase CB position is energized. When any protection element operates to trip, the device will output a signal [79.Active] until AR drop off (Reset Command). Any tripping signal can be from external protection device or internal protection element. AR function can be enabled by internal logic settings of AR mode or external signal via binary inputs in addition to internal logic setting [79.En]. When logic setting [79.En_ExtCtrl] is set as 1, AR enable are determined by external signal via binary inputs and logic settings. When logic setting [79.En_ExtCtrl] set as 0, AR enable are determined only by logic settings. For one-shot reclosing, if 1-pole AR mode is selected, auto-reclosure will reset when there is three-phase tripping signal or input signal of multi-phase open position. 3.24.5.2 AR Initiation AR mode can be selected by external signal via binary inputs or internal logic settings. If the logic setting [79.SetOpt] set as 1, AR mode is determined by the internal logic settings. If the logic settings [79.SetOpt] set as 0, AR mode is determined by the external inputs. 1. AR initiated by tripping signal of line protection
AR can be initiated by tripping signal of line protection, and the tripping signal may be from internal trip signal or external trip signal. When selecting 1-pole AR or 1/3-pole AR, line single-phase fault will trigger 1-pole AR. When AR is ready to reclosing (79.Ready=1) and the single-phase tripping command is received, this single-phase tripping command will be kept in the device, and 1-pole AR will be initiated after the
3-182
Date: 2012-08-14
3 Operation Theory
single-phase tripping command drops off. The single-phase tripping command kept in the device will be cleared after the completion of auto-reclosing sequence (Reset Command). Its logic is shown in Figure 3.24-2.
SIG
Reset Command
& >=1
SIG
Single-phase Trip
&
SIG
79.Ready 79.Sel_1PAR
&
1-pole AR Initiation
SIG
>=1
SIG
79.Sel_1P/3PAR
Figure 3.24-2 Single-phase tripping initiating AR
When selecting 3-pole AR or 1/3-pole AR, three-phase tripping will trigger 3-pole AR. When AR is ready to reclosing (79.Ready=1) and the three-phase tripping command is received, this three-phase tripping command will be kept in the device, and 3-pole AR will be initiated after the three-phase tripping command drops off. The three-phase tripping command kept in the device will be cleared after the completion of auto-reclosing sequence. (Reset Command) Its logic is shown in Figure 3.24-3.
SIG
Reset Command
& >=1
SIG
Three-phase Trip
&
SIG
79.Ready 79.Sel_3PAR
&
SIG
>=1
SIG
79.Sel_1P/3PAR
Figure 3.24-3 Three-phase tripping initiating AR
2.
AR initiated by CB state
A logic setting [79.En_CBInit] is available for selection that AR is initiated by CB state. Under normal conditions, when AR is ready to reclosing (79.Ready=1), AR will be initiated if circuit breaker is open and corresponding phase current is nil. AR initiated by CB state can be divided into initiating 1-pole AR and 3-pole AR, their logics are shown in Figure 3.24-4 and Figure 3.24-5 respectively. Usually normally closed contact of circuit breaker is used to reflect CB state.

Date: 2012-08-14
3-183
3 Operation Theory
SIG
Phase A open
>=1 & & & &

SIG
Phase B open
SIG
Phase C open [79.En_CBInit] 79.Ready 79.Sel_1PAR
EN
SIG
SIG
>=1
SIG
79.Sel_1P/3PAR
Figure 3.24-4 1-pole AR initiation
SIG
Phase A open Phase B open Phase C open [79.En_CBInit]
&
SIG
SIG
EN
&
&
SIG
79.Ready [79.Sel_1PAR]
EN
>=1
EN
[79.Sel_1P/3PAR]
Figure 3.24-5 3-pole AR initiation
3.24.5.3 AR Reclosing After AR is initiated, the device will output the initiating contact of AR. For 1-pole AR, in order to prevent pole discrepancy protection from maloperation under pole discrepancy conditions, the contact of 1-pole AR initiation can be used to block pole discrepancy protection. When the dead time delay of AR expires after AR is initiated, as for 1-pole AR, the result of synchronism check will not be judged, and reclosing command will be output directly. As far as the 3-pole AR, if the synchronism check is enabled, the release of reclosing command shall be subject to the result of synchronism check. After the dead time delay of AR expires, if the synchronism check is still unsuccessful within the time delay [79.t_wait_Chk], the signal of synchronism check failure (79.Fail_Syn) will be output and the AR will be blocked. If 3-pole AR with no-check is enabled, the condition of synchronism check success (25.Ok_Chk) will always be established. And the signal of synchronism check success (25.Ok_Chk) from the synchronism check logic can be applied by auto-reclosing function inside the device or external auto-reclosure device.
3-184
Date: 2012-08-14
3 Operation Theory
>=1
79.Inprog
SIG
[79.t_Dd_1PS1]
0ms
>=1
SIG
[79.t_Dd_3PS1]
0ms
&
AR Pulse
79.Inprog_3P 79.Inprog_1P
&
[79.t_Wait_Chk] 0ms 79.Fail_Chk
SIG
25.Ok_Chk
Figure 3.24-6 One-shot AR
In case pilot protection adopting permissive scheme, when the communication channel is abnormal, pilot protection will be disabled. In the process of channel abnormality, an internal fault occurs on the transmission line, backup protection at both ends of line will operate to trip the circuit breaker of each end. The operation time of backup protection at both ends of the line is possibly non-accordant, whilst the time delay of AR needs to consider the arc-extinguishing and insulation recovery ability for transient fault, so the time delay of AR shall be considered comprehensively according to the operation time of the device at both ends. When the communication channel of main protection is abnormal (input signal [79.PLC_Lost] is energized), and the logic setting [79.En_AddDly] is set as 1, then the dead time delay of AR shall be equal to the original dead time delay of AR plus the extra time delay [79.t_AddDly], so as to ensure the recovery of insulation intensity of fault point when reclosing after transient fault. This extra time delay [t_ExtendDly] is only valid for the first shot AR.
>=1
SIG
Any tripping signal
& & &

Extend AR time
BI
[79.PLC_Lost] 79.Active [79.En_AddDly]
SIG
EN
Figure 3.24-7 Extra time delay and blocking logic of AR
Reclosing pulse length may be set through the setting [79.t_DDO_AR]. For the circuit breaker without anti-pump interlock, a logic setting [79.En_CutPulse] is available to control the reclosing pulse. When this function is enabled, if the device operates to trip during reclosing, the reclosing pulse will drop off immediately, so as to prevent multi-shot reclosing onto fault. After the reclosing command is issued, AR will drop off with time delay [79.t_Reclaim], and can carry out next reclosing.

Date: 2012-08-14
3-185
3 Operation Theory
SIG
AR Pulse
0ms
50ms
>=1
79.AR_Out
0ms
SIG
[79.t_DDO_AR] [79.t_Reclaim] 0ms Reset Command
Single-phase Trip
>=1 & &
SIG
Three-phase Trip
EN
[79.En_CutPulse]
Figure 3.24-8 Reclosing output logic
The reclaim timer defines a time from the issue of the reclosing command, after which the reclosing function resets. Should a new trip occur during this time, it is treated as a continuation of the first fault. The reclaim timer is started when the CB closing command is given. 3.24.5.4 Reclosing Failure and Success For transient fault, the fault will be cleared after the device operates to trip. After the reclosing command is issued, AR will drop off after time delay [79.t_Reclaim], and can carry out next reclosing. When the reclosing is unsuccessful or the reclosing condition is not met after AR initiated, the reclosing will be considered as unsuccessful, including the following cases. 1. For one-shot AR, if the tripping command is received again within reclaim time after the reclosing pulse is issued, the reclosing shall be considered as unsuccessful. For multi-shot AR, if the reclosing times are equal to the setting value of AR number and the tripping command is received again after the last reclosing pulse is issued, the reclosing shall be considered as unsuccessful. The logic setting [79.En_FailCheck] is available to judge whether the reclosing is successful by CB state, when it is set as 1. If CB is still in open position with a time delay [79.t_Fail] after the reclosing pulse is issued, the reclosing shall be considered as unsuccessful. For this case, the device will issue a signal (79.Fail_Rcls) to indicate that the reclosing is unsuccessful, and this signal will drop off after (Reset Command). AR will be blocked if the reclosing shall be considered as unsuccessful.
2.
3.
3-186
Date: 2012-08-14
3 Operation Theory
SIG
Any tripping command
& >=1
0ms 200ms
SIG
Last shot is made 79.Inprog
>=1
79.Fail_Rcls
SIG
&
SIG
79.AR_Blkd
>=1
SIG
AR Pulse CB closed [79.En_FailCheck]
&
[79.t_Fail] 0ms
SIG
& &
0 [79.t_Fail]
EN
&
79.Succ_Rcls
Figure 3.24-9 Reclosing failure and success
After unsuccessful AR is confirmed, AR will be blocked. AR will not enter into the ready state unless the circuit breaker position drops off , and can only begin to enter into the ready state again after the circuit breaker is closed. 3.24.5.5 Reclosing Numbers Control The device may be set up into one-shot or multi-shot AR. Through the setting [79.N_Rcls], the maximum number of reclosing attempts may be set up to 4 times. Generally, only one-shot AR is selected. Some corresponding settings may be hidden if one-shot AR is selected. 1. 1-pole AR
[79.N_Rcls]=1 means one-shot reclosing. For one-shot 1-pole AR mode, 1-pole AR will be initiated only for single-phase fault and respective faulty phase selected, otherwise, AR will be blocked. For single-phase transient fault on the line, line protection device will operate to trip and 1-pole AR is initiated. After the dead time delay for 1-pole AR is expired, the device will send reclosing pulse, and then the auto-reclosure will drop off after the time delay [79.t_Reclaim] to ready for the next reclosing. For permanent fault, the device will operate to trip again after the reclosing is performed, and the device will output the signal of reclosing failure [79.Fail_Rcls]. [79.N_Rcls]>1 means multi-shot reclosing. For multi-shot reclosing in 1-pole AR mode, the first reclosing is 1-pole AR, and the subsequent reclosing can only be 3-pole AR. For single-phase transient fault on the line, line protection device will operate to trip and then 1-pole AR is initiated. After the dead time delay of the first reclosing is expired, the device will send reclosing pulse, and then the auto-reclosure will drop off after the time delay [79.t_Reclaim] to ready for the next reclosing. For permanent fault, the device will operate to trip again after the reclosing is performed, and then 3-pole AR is initiated. At this time, the time delay applies the setting [79.t_Dd_3PS2]. After the time delay is expired, if the reclosing condition is met, the device will send reclosing pulse. The sequence is repeated until the reclosing is successful or the maximum permit reclosing number [79.N_Rcls] is reached. If the first fault is multi-phase fault, the device operates to trip
Date: 2012-08-14
3-187
3 Operation Theory
three-phase and initiate 3-pole AR. At this time, the time delay applies the setting [79.t_Dd_3PS1]. For the possible reclosing times of 3-pole AR in 1-pole AR mode, please refer to Table 3.24-2. 2. 3-pole AR
[79.N_Rcls]=1 means one-shot reclosing. For one-shot 3-pole AR mode, line protection device will operate to trip when a transient fault occurs on the line and 3-pole AR will be initiated. After the dead time delay for 3-pole AR is expired, the device will send reclosing pulse, and then the auto-reclosure will drop off after the time delay [79.t_Reclaim] to ready for the next reclosing. For permanent fault, the device will operate to trip again after the reclosing is performed, and the device will output the signal of reclosing failure [79.Fail_Rcls]. [79.N_Rcls]>1 means multi-shot reclosing. For multi-shot reclosing in 3-pole AR mode, line protection device will operate to trip when a transient fault occurs on the line and 3-pole AR will be initiated. After the dead time delay of the first reclosing is expired, the device will send reclosing pulse, and then the auto-reclosure will drop off after the time delay [79.t_Reclaim] to ready for the next reclosing. For permanent fault, the device will operate to trip again after the reclosing is performed, and then 3-pole AR is initiated after the tripping contact drops off. After the time delay for AR is expired, the device will send reclosing pulse. The sequence is repeated until the reclosing is successful or the maximum permit reclosing number [79.N_Rcls] is reached. 3. 1/3-pole AR
[79.N_Rcls]=1 means one-shot reclosing. For one-shot 1/3-pole AR mode, line protection device will operate to trip when a transient fault occurs on the line and 1-pole AR will be initiated for single-phase fault and 3-pole AR will be initiated for multi-phase fault. After respective dead time delay for AR is expired, the device will send reclosing pulse, and then the auto-reclosure will drop off after the time delay [79.t_Reclaim] to ready for the next reclosing. For permanent fault, the device will operate to trip again after the reclosing is performed, and the device will output the signal of reclosing failure [79.Fail_Rcls]. [79.N_Rcls]>1 means multi-shot reclosing. For multi-shot reclosing in 1/3-pole AR mode, line protection device will operate to trip when a transient fault occurs on the line and AR will be initiated. After the dead time delay of the first reclosing is expired, the device will send reclosing pulse, and then the auto-reclosure will drop off after the time delay [79.t_Reclaim] to ready for the next reclosing. For permanent fault, the device will operate to trip again after the reclosing is performed, and then 3-pole AR is initiated after the tripping contact drops off. After the time delay for AR is expired, the device will send reclosing pulse. The sequence is repeated until the reclosing is successful or the maximum permit reclosing number [79.N_Rcls] is reached. For the possible reclosing times of 3-pole AR in 1/3-pole AR mode, please refer to Table 3.24-2. The table below shows the number of reclose attempts with respect to the settings and AR modes.
Table 3.24-2 Reclosing number 1-pole AR N-1AR 1 1 N-3AR 0 1 3-pole AR N-1AR 0 0 N-3AR 1 2 1/3-pole AR N-1AR 1 1 N-3AR 1 2
Setting Value 1 2 3-188

Date: 2012-08-14
3 Operation Theory
3 4 1 1 2 3 0 0 3 4 1 1 3 4
N-1AR: the reclosing number of 1-pole AR N-3AR: the reclosing number of 3-pole AR 4. Coordination between dual auto-reclosures
Duplicated protection configurations are normally applied for UHV lines. If reclosing function is integrated within line protections, the auto-reclosing function can be enabled in any or both of the line protections without coordination. If both sets of reclosing functions are enabled, when one of them first recloses onto a permanent fault, the other will block the reclosing pulse according to the latest condition of the faulty phase. For one-shot AR mode, if the current is detected in the faulty phase, AR will be blocked immediately to prevent the circuit breaker from repetitive reclosing. For multi-shot AR mode, if the current is detected in the faulty phase, the current reclosing pulse will be blocked and go into the next reclosing pulse logic automatically. If the maximum permitted reclosing number [79.N_Rcls] is reached, the auto-reclosure will drop off after the time delay [79.t_Reclaim]. For one-shot or multi-shot AR, there is a corresponding reclosing counter at each stage. After reclosing pulse is sent, the corresponding reclosing counter will plus 1 and the reclosing counter may be cleared by the submenu Clear Counter. If the circuit breaker is reclosed by other devices during AR initiation, the auto-reclosure will go into the next reclosing pulse logic. 3.24.5.6 AR Time Sequence Diagram The following two examples indicate typical time sequence of AR process for transient fault and permanent fault respectively.

Date: 2012-08-14
3-189
3 Operation Theory
Signal
Fault Trip CB 52b 79.t_Reclaim 79.Active 79.Inprog 79.Inprog_1P 79.Ok_Chk AR Out 79.Perm_Trp3P 79.Fail_Rcls Time [79.t_DDO_AR] [79.t_Dd_1PS1] [79.t_Dd_1PS1]
Open [79.t_Reclaim]
Figure 3.24-10 Single-phase transient fault
3-190
Date: 2012-08-14
3 Operation Theory
Signal
Fault Trip 52b 79.t_Reclaim 79.Active 79.Inprog 79.Inprog_1P 79.Inprog_3PS2 79.Ok_Chk AR Out 79.Perm_Trp3P 79.Fail_Rcls 200ms Time [79.t_DDO_AR] [79.t_DDO_AR] [79.t_Dd_1PS1] [79.t_Dd_3PS2] Open Open [79.t_Reclaim]
Figure 3.24-11 Single-phase permanent fault ([79.N_Rcls]=2)
3.24.6 Settings
Table 3.24-3 Settings of auto-reclosing No. 1 2 3 4 5 6 Name 79.N_Rcls 79.t_Dd_1PS1 79.t_Dd_3PS1 79.t_Dd_3PS2 79.t_Dd_3PS3 79.t_Dd_3PS4 1~4 0.000~600.000 0.000~600.000 0.000~600.000 0.000~600.000 0.000~600.000 Range Step 1 0.001 0.001 0.001 0.001 0.001 s s s s s Unit Remark Maximum number of reclosing attempts Dead time of first shot 1-pole reclosing Dead time of first shot 3-pole reclosing Dead time of second shot 3-pole reclosing Dead time of third shot 3-pole reclosing Dead time of fourth shot 3-pole
reclosing Time delay of circuit breaker in closed position before reclosing Time delay to wait for CB healthy, and
79.t_CBClsd
0.000~600.000
0.001
79.t_CBReady
0.000~600.000
0.001
begin to timing when the input signal [79.CB_Healthy] is de-energized and if it is not energized within this time delay,

Date: 2012-08-14
3-191
3 Operation Theory
AR will be blocked. 9 79.t_WaitChk 0.000~600.000 0.001 s Maximum wait time for synchronism check Time delay allow for CB status change to conform reclosing successful Pulse width of AR closing signal Reclaim time of AR Time delay of excessive trip signal to block auto-reclosing Drop-off time delay of blocking AR, 14 79.t_DDO_BlkAR 0.000~600.000 0.001 s when blocking AR signal blocking for AR
10 11 12 13
79.t_Fail 79.t_DDO_AR 79.t_Reclaim 79.t_PersistTrp
0.000~600.000 0.000~600.000 0.000~600.000 0.000~600.000
0.001 0.001 0.001 0.001
s s s s
disappears,
condition
drops off after this time delay 15 16 79.t_AddDly 79.t_WaitMaster 0.000~600.000 0.000~600.000 0.001 0.001 s s Additional time delay for auto-reclosing Maximum wait time for reclosing
permissive signal from master AR Time delay of discriminating another fault, and begin to times after 1-pole AR
17
79.t_SecFault
0.000~600.000
0.001
initiated, 3-pole AR will be initiated if another fault happens during this time delay. AR will be blocked if another fault happens after that. Enabling/disabling auto-reclosing
blocked when a fault occurs under pole 18 79.En_PDF_Blk 0 or 1 disagreement condition 0: disable 1: enable Enabling/disabling auto-reclosing with 19 79.En_AddDly 0 or 1 an additional dead time delay 0: disable 1: enable Enabling/disabling adjust the length of 20 79.En_CutPulse 0 or 1 reclosing pulse 0: disable 1: enable Enabling/disabling confirm whether AR 21 79.En_FailCheck 0 or 1 is successful by checking CB state 0: disable 1: enable Enabling/disabling auto-reclosing 22 79.En 0 or 1 0: disable 1: enable
3-192
Date: 2012-08-14
3 Operation Theory
Enabling/disabling AR by external input 23 79.En_ExtCtrl 0 or 1 signal besides logic setting [79.En] 0: only logic setting 1: logic setting and external input signal Enabling/disabling AR be initiated by 24 79.En_CBInit 0 or 1 open state of circuit breaker 0: disable 1: enable Option of AR priority 0None (single-breaker arrangement) 25 79.Opt_Priority 0, 1 or 2 1 High (master AR of multi-breaker arrangement) 2 Low (slave AR of multi-breaker arrangement) Control option of AR mode 1: select AR mode by internal logic 26 79.SetOpt 0 or 1 settings 0: select AR mode by external input signals Enabling/disabling 1-pole AR mode 27 79.En_1PAR 0 or 1 0: disable 1: enable Enabling/disabling 3-pole AR mode 28 79.En_3PAR 0 or 1 0: disable 1: enable Enabling/disabling 1/3-pole AR mode 29 79.En_1P/3PAR 0 or 1 0: disable 1: enable
3.25 Transfer Trip

This function module provides a binary input [TT.Init] for receiving transfer trip from the remote end. This feature ensures simultaneous tripping at both ends.

Transfer trip can be controlled by local fault detector by logic settings [TT.En_FD_Ctrl]. In addition, the binary input [TT.Init] is always supervised, and the device will issue an alarm [TT.Alm] and block transfer trip once the binary input is energized for longer than 4s and drop off after resumed to normal with a time delay of 10s.

Date: 2012-08-14
3-193
3 Operation Theory

TT TT.Init TT.En TT.Blk TT.Alm TT.Op TT.On
3.25.4 I/O Signals

Table 3.25-1 I/O signals of transfer trip No. 1 2 Input Signal TT.Init TT.En Description Input signal of initiating transfer trip after receiving transfer trip Transfer trip enabling input, it is triggered from binary input or programmable logic etc. Transfer trip blocking input, it is triggered from binary input or programmable logic etc. Description Input signal of receiving transfer trip is abnormal Transfer trip operates Transfer trip is enabled
3 No. 1 2 3
TT.Blk Output Signal TT.Alm TT.Op TT.On
3.25.5 Logic
SIG
TT.En
& TT.On
SIG
TT.Blk 4s 10s
BI
[TT.Init]
TT.Alm
SIG
TT.Alm [TT.En_FD_Ctrl]
& >=1
TT.Op
EN
SIG
local fault detector [TT.Init]
BI
Figure 3.25-1 Logic diagram of transfer trip
3-194
Date: 2012-08-14
3 Operation Theory
3.25.6 Settings
Table 3.25-2 Settings of Transfer trip No. 1 Name TT.t_Op Range 0.000~600.000 Step 0.001 Unit s Remark Time delay of transfer trip Transfer trip controlled by local fault detector element 0: not controlled by local fault detector element 1: controlled by local fault detector element
TT.En_FD_Ctrl
0 or 1
3.26 Trip Logic

For any enabled protection tripping elements, their operation signal will convert to appropriate tripping signals through trip logics and then trigger output contacts by configuration.

This module gathers signals from phase selection and protection tripping elements and then converts the operation signal from protection tripping elements to appropriate tripping signals. The device can implement phase-segregated tripping or three-phase tripping, and may output the contact of blocking AR and the contact of initiating breaker failure protection.
3.26.3 I/O Signals

Table 3.26-1 I/O signals of trip logic No. 1 Input Signal Faulty phase selection (phase A, phase B, phase C) Description The result of fault phase selection If multi-phase is selected, three-phase breakers will be tripped. Input signal of permitting three-phase tripping 2 PrepTrp3P When this signal is valid, three-phase tripping will be adopted for any kind of faults. 3 Line tripping element All operation signals of various line protection tripping elements, such as distance protection, overcurrent protection, etc. All protection tripping elements concerned with breaker, such as pole discrepancy protection, etc. Tripping element to initiate BFP Description Tripping A-phase circuit breaker Tripping B-phase circuit breaker Tripping C-phase circuit breaker Tripping any phase circuit breaker Tripping three-phase circuit breaker Protection tripping signal of A-phase configured to initiate BFP, BFI
4 5 No. 1 2 3 4 5 6
Breaker tripping element Initiating BFP element Output Signal TrpA TrpB TrpC Trp 3PTrp BFI_A

Date: 2012-08-14
3-195
3 Operation Theory
signal shall be reset immediately after tripping signal drops off. 7 BFI_B Protection tripping signal of B-phase configured to initiate BFP, BFI signal shall be reset immediately after tripping signal drops off. Protection tripping signal of C-phase configured to initiate BFP, BFI signal shall be reset immediately after tripping signal drops off. Protection tripping signal configured to initiate BFP, BFI signal shall be reset immediately after tripping signal drops off. Initiating three-phase tripping due to failure in fault phase selection Blocking auto-reclosing
BFI_C
9 10 11
BFI Trp3P_PSFail BlockAR
3.26.4 Logic
After tripping signal is issued, the tripping pulse will be kept as same as the setting [t_Dwell_Trp] at least. When the time delay is expired, for phase-segregated tripping, the tripping signal will drop off immediately if the faulty current of corresponding phase is less than 0.06In (In is secondary rated current), otherwise the tripping signal will be always kept until the faulty current of corresponding phase is less than 0.06In. For three-phase tripping, the tripping signal will drop off immediately if three-phase currents are all less than 0.06In, otherwise the tripping signal will be always kept until three-phase currents are all less than 0.06In.
3-196
Date: 2012-08-14
3 Operation Theory
SIG
FPS (phase A)
&
>=1
&
TrpA
SIG
FPS (phase B)
&
>=1
&
TrpB
SIG
FPS (phase C)
&
>=1
&
TrpC
SIG
Line tripping element
& & >=1 >=1 >=1 & >=1 & &

3PTrp Trp
>=1 &
200ms 0ms Trp3P_PSFail
SIG
Breaker tripping element PrepTrp3P
SIG
>=1 &
EN
[En_3PTrp] Trp TrpA [t_Dwell_Trp] 0
SIG
SIG
&
SIG
Ia<0.06In [t_Dwell_Trp] 0
SIG
TrpB
&
SIG
Ib<0.06In [t_Dwell_Trp] 0
SIG
TrpC
&
SIG
Ib<0.06In
&
BFI_A
&
BFI_B
&
BFI_C
&
BFI
SIG
Initiating BFP element
Figure 3.26-1 Tripping logic

Date: 2012-08-14
3-197
3 Operation Theory
SIG
85.Op_DEF
&
EN
[85.DEF.En_BlkAR] Y.ZGx.Op
SIG
&
EN
[Y.ZGx.En_BlkAR]
SIG
50/51Px.Op
[50/51Px.En_BlkAR] 50/51Gx.Op
&
>=1
EN
SIG
&
EN
50/51Gx.En_BlkAR 51PVT.Op 51GVT.Op 59Pz.Op 27Pz.Op 81U.UFx.Op 81O.OFx.Op 50BF.Op_t1
SIG
>=1
SIG
SIG
SIG
>=1
>=1
>=1
>=1
BlockAR
SIG
SIG
SIG
>=1
SIG
50BF.Op_t2 49-1.Op
SIG
>=1
SIG
49-2.Op 50STB.Op
SIG
>=1
>=1
SIG
62PD.Op 46BC.Op
SIG
>=1
SIG
TT.Op En_MPF_Blk_AR
EN
&
SIG
Multi-phase fault En_3PF_Blk_AR
EN
&
>=1 >=1
SIG
Three-phase fault En_PhSF_Blk_AR
EN
&
SIG
Phase selection failure 21SOTF.Op
SIG
>=1 &
SIG
50GSOTF.Op Manual closing signal
SIG
Figure 3.26-2 Blocking AR logic
Where: Y can be 21M or 21Q x can be 1, 2, 3, 4 or 5 z can be 1 or 2
3-198
Date: 2012-08-14
3 Operation Theory
3.26.5 Settings
Table 3.26-2 Settings of trip logic No. Name Range Step Unit Enabling/disabling 1 En_MPF_Blk_AR 0 or 1 Remark auto-reclosing blocked
when multi-phase fault happens 0: disable 1: enable Enabling/disabling auto-reclosing blocked
En_3PF_Blk_AR
0 or 1
when three-phase fault happens 0: disable 1: enable Enabling/disabling auto-reclosing blocked when faulty phase selection fails 0: disable 1: enable Enabling/disabling three-phase tripping mode for any fault conditions 0: disable 1: enable The dwell time of tripping command, empirical value is 0.04
En_PhSF_Blk_AR
0 or 1
En_3PTrp
0 or 1
t_Dwell_Trp
0.000~10.000
0.001
The tripping contact shall drop off under conditions of no current or protection tripping element drop-off.
3.27 VT Circuit Supervision

The purpose of VT circuit supervision is to detect whether VT circuit is normal. Because some protection functions, such as distance protection, under-voltage protection and so on, will be influenced by VT circuit failure, these protection functions should be disabled when VT circuit fails. VT circuit failure can be caused by many reasons, such as fuse blown due to short-circuit fault, poor contact of VT circuit, VT maintenance and so on. The device can detect them and issue an alarm signal to block relevant protection functions. However, the alarm of VT circuit failure should not be issued when the following cases happen. 1. 2. Line VT is used as protection VT and the protected line is out of service. Only current protection functions are enabled and VT is not connected to the device.

VT circuit supervision can detect failure of single-phase, two-phase and three-phase on protection VT. Under normal condition, the device continuously supervises input voltage from VT, VT circuit failure signal will be activated if residual voltage exceeds the threshold value or positive-sequence
Date: 2012-08-14
3-199
3 Operation Theory
voltage is lower than the threshold value. If the device is under pickup state due to system fault or other abnormality, VT circuit supervision will be disabled. Under normal conditions, the device detect residual voltage greater than 8% of Unn to determine single-phase or two-phase VT circuit failure, and detect three times positive-sequence voltage less than Unn to determine three-phase VT circuit failure. Upon detecting abnormality on VT circuit, an alarm will comes up after 1.25s and drop off with a time delay of 10s after VT circuit restored to normal. VT (secondary circuit) MCB auxiliary contact as a binary input can be connected to the binary input circuit of the device. If MCB is open (i.e. [VTS.MCB_VT] is energized), the device will consider the VT circuit is not in a good condition and issues an alarm without a time delay. If the auxiliary contact is not connected to the device, VT circuit supervision will be issued with time delay as mentioned in previous paragraph. When VT is not connected into the device, the alarm will be not issued if the logic setting [VTS.En_Out_VT] is set as 1. However, the alarm is still issued if the binary input [VTS.MCB_VT] is energized, no matter that the logic setting [VTS.En_Out_VT] is set as 1 or 0. When VT neutral point fails, third harmonic of residual voltage is comparatively large. If third harmonic amplitude of residual voltage is larger than 0.2Unn and without operation of fault detector element, VT neutral point failure alarm signal [VTNS.Alm] will be issued after 1.25s and drop off with a time delay of 10s after three phases voltage restored to normal.

VTS VTNS VTS.Alm
VTS.En VTS.Blk VTS.MCB_VT
VTNS.En VTNS.Blk
VTNS.Alm
3.27.4 I/O Signals

Table 3.27-1 I/O signals of VT circuit supervision No. 1 Input Signal VTS.En Description VT supervision enabling input, it is triggered from binary input or programmable logic etc. VT supervision blocking input, it is triggered from binary input or programmable logic etc. VT neutral point supervision enabling input, it is triggered from binary input or programmable logic etc. VT neutral point supervision blocking input, it is triggered from binary input or programmable logic etc.
VTS.Blk
VTNS.En
VTNS.Blk
3-200
Date: 2012-08-14
3 Operation Theory
5 No. 1 2 VTS.MCB_VT Output Signal VTS.Alm VTNS.Alm Binary input for VT MCB auxiliary contact Description Alarm signal to indicate VT circuit fails Alarm signal to indicate VT neutral point fails
3.27.5 Logic
SIG
3U0>0.08Unn 3U1<Unn
>=1 & >=1 & & >=1

1.25s 10s
SIG
EN
[VTS.En_Line_VT]
SIG
52b_3P [VTS.En_Out_VT] [VTS.MCB_VT] [VTS.En] [VTS.En] [VTS.Blk]
EN
BI
& &
VTS.Alm
EN
SIG
SIG
Figure 3.27-1 Logic of VT circuit supervision

U03>0.2Unn
OTH
&
1.25s 10s
&
VTNS.Alm
EN
[VTS.En_Out_VT] [VTS.En] [VTNS.En] [VTNS.Blk]
EN
&
SIG
SIG
Figure 3.27-2 Logic of VT neutral point supervision
Unn: rated phase-to-phase voltage U03: third harmonic amplitude of neutral point residual voltage
3.27.6 Settings
Table 3.27-2 VTS Settings No. Name Range Step Unit Remark No voltage used for protection calculation 1: enable 1 VTS.En_Out_VT 0 or 1 0: disable In general, when VT is not connected to the device, this logic setting should be set as 1 2 VTS.En_Line_VT 0 or 1 Voltage selection for protection calculation from busbar VT or line VT

Date: 2012-08-14
3-201
3 Operation Theory
1: line VT 0: busbar VT Alarm function of VT circuit supervision 3 VTS.En 0 or 1 1: enable 0: disable
3.28 CT Circuit Supervision

The purpose of the CT circuit supervision is to detect any abnormality on CT secondary circuit.

Under normal conditions, CT secondary signal is continuously supervised by detecting the residual current and voltage. If residual current is larger than 10%In whereas residual voltage is less than 3V, an error in CT circuit is considered, the concerned protection functions are blocked and an alarm is issued with a time delay of 10s and drop off with a time delay of 10s after CT circuit is restored to normal condition.

CTS CTS.En CTS.Blk CTS.Alm
3.28.4 I/O Signals

Table 3.28-1 I/O signals of CT circuit supervision No. 1 Input Signal CTS.En Description CT circuit supervision enabling input, it is triggered from binary input or programmable logic etc. CT circuit supervision blocking input, it is triggered from binary input or programmable logic etc. Three-phase voltage input Three-phase current input Description Alarm signal to indicate CT circuit fails
2 3 4 No. 1
CTS.Blk U3P I3P Output Signal CTS.Alm
3-202
Date: 2012-08-14
3 Operation Theory
3.28.5 Logic
SIG
CTS.En CTS.Blk
3I0>0.1In 3U0<3V IA<0.06In IB<0.06In IC<0.06In
& &
10s 10s CTS.Alm
SIG
SIG
&
SIG
SIG
>=1
SIG
SIG
Figure 3.28-1 Logic diagram of CT circuit failure
3.29 Control and Synchrocheck for Manual Closing

The purpose of control is to open or close primary equipment, including circuit breaker (CB), disconnector (DS) and earth switch (ES), or to issue outputs for signaling purpose. Synchronism check and dead check are also provided for the control processes as below: 1. Local manual closing CB 2. Local closing CB by access the menu Local CmdManual Control 3. Remote closing CB from SCADA (i.e., local HMI system) or control center (CC) Programmable interlocking logics within a bay and amongst different bays are provided by using PCS-Explorer.

1. Control High reliability is ensured by adopting the principle of selection before operation (abbreviated SBO). When the binary input [BI_Maintenance] is energized as 1, remote control from SCADA/CC will be disabled, but local control will not be influenced. The integrated control process is as follow: 1) The control source (SCADA/CC, or local LCD control operation, or manual control operation) sends control selection command to this device 2) This device sends back the control selection result (success or failure) to the control source after logic judgment 3) The control source sends control operation command to this device if the control selection result is success. The control source will send control cancellation command to this device if the control selection result is failure.
Date: 2012-08-14
3-203
3 Operation Theory
4) This device sends back the control operation result (success or failure) to the control source after logic judgment. Logic calculation result of interlocking is input to the remote control module as a criterion of remote operation. When the enabling parameter of remote open/close interlock is 1, remote control module determines whether it can be output according to the calculation result of interlocking. If the current breaker position or programmable part can meet the interlocking condition, remote control can be output normally, otherwise remote operation is blocked. When the enabling parameter of remote open/close interlock is 0, interlocking function is disabled and remote control will be output directly without the judgment of interlocking. Holding time of each binary output contact can be set by configuring corresponding settings and is often configured as 250ms. However, for the control circuits without latched relays, the holding time must be longer to ensure successful control operation.
EN
[En_Cls01_Blk]
>=1
&
SIG
Sig_En_CtrlCls01 [BI_Rmt/Loc]
[t_DDO_Cls01] 0ms
[Op_Cls01]
BI
&
>=1
SIG
Cmd_LocCtrl
&
SIG
Cmd_RmtCtrl
SIG
Sig_Ok_Chk
MCBrd.25.En_NoChk [En_Clsxx_Blk]
>=1
SET
EN
>=1
&
SIG
Sig_En_CtrlClsxx [BI_Rmt/Loc]
[t_DDO_Clsxx] 0ms
[Op_Clsxx]
BI
&
>=1
SIG
Cmd_LocCtrl
&
SIG
Cmd_RmtCtrl
Figure 3.29-1 Logic diagram of closing primary equipment
Where: xx=02~10 Only the first closing command Op_Cls01 controlled by synchrocheck logic can be used for CB closing.
3-204
Date: 2012-08-14
3 Operation Theory
EN
[En_Opnxx_Blk]
>=1
&
SIG
Sig_En_CtrlOpnxx [BI_Rmt/Loc]
[t_DDO_Opnxx] 0ms
[Op_Opnxx]
BI
&
>=1
SIG
Cmd_LocCtrl
&
SIG
Cmd_RmtCtrl
Figure 3.29-2 Logic diagram of open primary equipment
Where: xx=01~10 The control output fulfills signal output circuit, and opens or closes circuit breaker, disconnector and earth switch according to the control command. Object manipulation strictly performs three steps: selection, check and excute, and perform output relay check, to ensure that the remote control can be excuted safely and reliably. When logic interlock is enabled, the device can receive the programmable interlock logic. The device can automatically initiate the interlock logic to determine whether to allow control operations. The device provides corresponding settings ([En_Opnxx_Blk] and [En_Clsxx_Blk]) for each control object. When they are set as 1, the interlock function of the corresponding control object is enabled. The interlock logic can be configured by using PCS-Explorer, and downloaded to the device via the Ethernet port. If the interlock function is enabled, but it is not configured the interlock logic, the result of the logic output is 0. The control record is a file which is used to store remote control command records of this device circularly. If the record number is to 256, the storage area of the control record will be full. If this device has received a new remote command, this device will delete the oldest remote control record, and then store the latest remote control record. 2. Synchrocheck Three synchrocheck modes are designed for CB closing: no check mode, dead check mode and synchronism check mode, if any one of the condition of three synchrocheck modes satisfied, then synchrocheck signal Sig_Ok_Chk will be asserted. The synchronism check function measures the conditions across the circuit breaker and compares them with the corresponding settings. The output is only given if all measured quantities are simultaneously within their set limits. Compared to the synchronism check for auto-reclosing, an additional criterion is applied to check the rate of frequency change (df/dt) between both sides of the CB. When the following four conditions are all met, the synchronism check is successful. 1) Phase angle difference between incoming voltage and reference voltage is less than the
Date: 2012-08-14
3-205
3 Operation Theory
setting [MCBrd.25.phi_Diff] 2) Frequency difference between incoming voltage and reference voltage is less than [MCBrd.25.f_Diff] 3) Voltage difference between between incoming voltage and reference voltage is less than [MCBrd.25.U_Diff] 4) Rate of frequency change between incoming voltage and reference voltage is less than [MCBrd.25.df/dt] The dead check function measures the amplitude of line voltage and bus voltage at both sides of the circuit breaker, and then compare them with the live check setting [MCBrd.25.U_Lv] and the dead check setting [MCBrd.25.U_Dd]. The dead check is successful when the measured quantities comply with the criteria. When this device is set to work in no check mode and receives a closing command, CB will be closed without synchronism check and dead check.

CSWI Sig_En_CtrlOpnxx Sig_En_CtrlClsxx Sig_Ok_Chk Cmd_RmtCtrl Cmd_LocCtrl BI_Rmt/Loc Op_Opnxx Op_Clsxx
3.29.4 I/O Signals

Table 3.29-1 I/O signals of control No. 1 2 Input Signal Sig_En_CtrlOpnxx Sig_En_CtrlClsxx Description It is the interlock status of No.xx open output of BO module (xx=01~10) It is the interlock status of No.xx closing output of BO module (xx=01~10) From receiving a closing command, this device will continuously check whether the 2 voltages (Incoming voltage and reference voltage) involved in synchronism check(or dead check) can meet the criteria. 3 Sig_Ok_Chk Within the duration of [MCBrd.25.t_Wait_Chk], if the synchronism check(or dead check) criteria are not met, [Sig_Ok_Chk] will be set as 0; if the synchronism check(or dead check) criteria are met, [Sig_Ok_Chk] will be set as 1. 4 Cmd_LocCtrl Access the menu Local CmdManual Control to issue control
3-206
Date: 2012-08-14
3 Operation Theory
command locally. If the binary input [BI_Rmt/Loc] is energized as 1, local control will be disabled. If the binary input [BI_Rmt/Loc] is de-energized as 0, local control will be enabled. If the binary input [BI_Rmt/Loc] is energized as 1, remote control from SCADA/CC will be enabled. If the binary input [BI_Rmt/Loc] is 5 Cmd_RmtCtrl de-energized as 0, remote control from SCADA/CC will be disabled. Remote control commands from SCADA/CC can be transmitted via IEC60870-5-103 protocol or IEC61850 protocol. It is used to select the remote control or the local control. 1: the remote control, all the binary outputs can only be remotely 6 BI_Rmt/Loc controlled by SCADA or control centers. 0 the local control, each binary output can only be applied to open/close CB/DS/ES locally. Each binary output can also be applied issue a signal locally. No. 1 2 Output Signal Op_Opnxx Op_Clsxx Description No.xx command output for open. No.xx command output for closing.
3.29.5 Settings
Table 3.29-2 Control Settings No. Name Range Step Unit Remark No.xx holding time of a normal open contact of 1 t_DDO_Opnxx 0~65535 1 ms remote opening CB, disconnector or for signaling purpose. (xx=01, 02.10) No.xx closing time of a normal open contact of 2 t_DDO_Clsxx 0~65535 1 ms remote closing CB, disconnector or for
signaling purpose. (xx=01, 02.10) These settings are applied to configure the debouncing time. DPU is the abbreviation of Delay Pick Up. (xx=01, 02.) The items in this submenu are applied together with [Sig_En_CtrlOpnxx] in the submenu InputsInterlock_Status. 1: No.xx open output of the BO module is
t_DPU_DPosxx
0~60000
ms
En_Opnxx_Blk
0 or 1
controlled by the interlocking logic. If the interlocking conditions are met (i.e.:
[Sig_En_CtrlOpnxx]=1), opening output xx has output, otherwise (i.e.: [Sig_En_CtrlOpnxx]=0) opening output xx has no output. 0: No.xx open output of the BO module is not

Date: 2012-08-14
3-207
3 Operation Theory
controlled by the interlocking logic. Whether the interlocking conditions are met or not, opening output xx has output. (xx=01, 02.10) The items in this submenu are applied together with [Sig_En_CtrlClsxx] in the submenu InputsInterlock_Status. 1: No.xx closing output of the BO module is controlled by the interlocking logic. If the interlocking 5 En_Clsxx_Blk 0 or 1 conditions are met (i.e.:
[Sig_En_CtrlClsxx]=1), closing output xx has output, otherwise (i.e.: [Sig_En_CtrlClsxx]=0) closing output xx has no output. 0: No.xx closing output of the BO module is not controlled by the interlocking logic. Whether the interlocking conditions are met or not, closing output xx has output. (xx=01, 02.10) Table 3.29-3 Synchrocheck Settings
No. 1 2 3 4 5
Name MCBrd.25.Opt_Source_UL MCBrd.25.Opt_Source_UB MCBrd.25.U_Dd MCBrd.25.U_Lv MCBrd.25.K_Usyn 0~5 0~5
Range
Step 1 1 0.001 0.001
Unit
Remark Voltage selecting mode of line Voltage selecting mode of bus
0.05Un~0.8Un 0.5Un~Un 0.20-5.00
V V
Voltage threshold of dead check Voltage threshold of live check Compensation coefficient for
synchronism voltage 1 Deg Phase difference limit of
MCBrd.25.phi_Diff
0~ 89
synchronism check for AR Compensation for phase difference between two synchronous voltages
MCBrd.25.phi_Comp
0~359
MCBrd.25.f_Diff
0.02~1.00
0.01
Hz
Frequency
difference
limit
of
synchronism check for AR Voltage difference limit of
9 10 11
MCBrd.25.U_Diff MCBrd.25.En_SynChk MCBrd.25.En_DdL_DdB
0.02Un~0.8Un 0 or 1 0 or 1
0.01
synchronism check for AR Enable synchronism check Enable dead line and dead bus (DLDB) check Enable dead line and live bus (DLLB) check Enable live line and dead bus (LLDB) check Enable AR without any check
12
MCBrd.25.En_DdL_LvB
0 or 1
13 14 15 3-208
MCBrd.25.En_LvL_DdB MCBrd.25.En_NoChk MCBrd.25.df/dt
0 or 1 0 or 1 0.00~3.00 0.01 Hz/s
Threshold of rate of frequency PCS-902 Line Distance Relay
Date: 2012-08-14
3 Operation Theory
change between both sides of CB for synchronism-check. Circuit breaker closing time. It is the 16 MCBrd.25.t_Close_CB 20~1000 1 ms time from receiving closing
command pulse till the CB is completely closed. From receiving a closing command, this device will continuously check whether between incoming voltage and reference voltage involved in synchronism check (or dead check)
17
MCBrd.25.t_Wait_Chk
5~30
0.001
can
meet
the
criteria.
If
the
synchronism check (or dead check) criteria are not met within the duration of this time delay, the failure of synchronism-check (or dead
check) will be confirmed.
3.30 Faulty Phase Selection

Fault phase selection logic can be implemented by the following methods: 1. 2. Detecting the variation of operating voltage Detecting the phase difference between I0 and I2A
The logic makes the device ideal for single-phase tripping applications.

3.30.2.1 Variation of Operating Voltage (Faulty Phase Selection Element 1) 1. 1) 2) 3) 2. 1) 2) 3) Variation of phase operating voltage Phase A: UOPA Phase B: UOPB Phase C: UOPC Variation of phase-to-phase operating voltage Phase AB: UOPAB Phase BC: UOPBC Phase CA: UOPCA
UOMAX=Max(UOPA, UOPB, UOPC)

Date: 2012-08-14
3-209
3 Operation Theory
UOMAX=Max(UOPAB, UOPBC, UOPCA) If UOMAX is several times higher than the variation of operating voltages of other two phases, the single-phase fault is ensured, otherwise, the multi-phase fault is ensured.
Table 3.30-1 Relation between UOMAX and faulty phase UOMAX or UOMAX UOPA UOPB UOPC UOPAB UOPBC UOPCA Phase A Phase B Phase C Phase AB Phase BC Phase CA Fault phase
3.30.2.2 I0 and I2A (Faulty Phase Selection Element 2) The phase selection algorithm uses the angle relation between I0 and I2A of the device. As shown in Figure 3.30-1, there are three faulty phase selection regions.
Region A 60 -60
Region B
Region C
180
Figure 3.30-1 The region of faulty phase selection
Depended on the phase relation between I0 and I2A, the faulty phase can be determined. 1. 2. 3. -60 <Arg(I0/I2A)<60 , region A is selected, possible faulty phase is phase A or phase BC. 60 <Arg(I0/I2A)<180 , region B is selected, possible faulty phase is phase B or phase CA. 180 <Arg(I0/I2A)<300 , region C is selected, possible faulty phase is phase C or phase AB.
For single-phase earth fault, I0 and I2 of faulty phase are in-phase and its distance element operates.
3-210
Date: 2012-08-14
3 Operation Theory
For phase to phase to earth fault, I0 and I2 of non-faulty phase are in-phase but its distance element does not operate.
3.30.3 I/O Signals

Table 3.30-2 I/O signals of faulty phase selection No. 1 2 3 4 PhSA PhSB PhSC Neut Output Signal Description Phase-A is selected as faulty phase Phase-B is selected as faulty phase Phase-C is selected as faulty phase Earth fault
3.31 Fault Location

3.31.1 Application
The main objective of line protection is fast, selective and reliable operation for faults on a protected line section. Besides this, information on distance to fault is very important for those involved in operation and maintenance. Reliable information on the fault location greatly decreases the outage of the protected lines and increases the total availability of a power system. This fault location function cannot be used for the transmission line with series compensation.

The fault location is an essential function to various line protection devices, after selecting faulty phase, it measures and indicates the distance to the fault with high accuracy. Thus, the fault can be quickly located for repairs. The calculation algorithm considers the effect of load currents, double-end infeed and additional fault resistance. Both double-end fault location and single-end fault location are available in line differential relay, but only single-end fault location is provided in other relays. The calculation equation is:
[km] Where: Dist: The distance of fault location according to the Zcalc (km) Zcalc: The impedance value calculated from the location of protection device to fault point Zl: The impedance value of the whole line + mutual impedance Length: The input length of transmission line (km)
3.31.3 Mutual Compensation

When an earth fault occurred on a line of parallel lines arrangement, a distance relay at one end of the faulty line will tend to underreach whilst the distance relay at the other end will tend to
Date: 2012-08-14
3-211
3 Operation Theory
overreach. Usually the degree of underreach or overreach is acceptable, however, for cases where precise fault location is required for long lines with high mutual coupling, mutual compensation is then required to improve the distance measurement. Practically, the mutual effect between the parallel lines is insignificant to positive and negative sequence and thus the mutual compensation is only for zero sequence
A Ia B
ZM k C ZS Ic D (1-k)ZL
kZL
ZL
The principle in the application of mutual compensation is shown as follows with the aid of following sequence network diagram figure. The diagram indicates a parallel lines arrangement with an earth fault at location k on line CD. The equivalent sequence network for an earth fault on a parallel lines arrangement with single source is shown as below.
Ia1 ZS1 kZL1 Ic1 Ia2 ZS2 kZL2 Ic2 Ia0 ZS0 Z0M kZL0 Ic0 (1-k)ZL0 ZL0 (1-k)ZL2 ZL2 (1-k)ZL1 ZL1
Figure 3.31-1 Equivalent sequence network
The device at location C without mutual compensation will have voltage URC and current IRC measured as shown in the expression URC is the voltage of the device at location C.
If the line is fully transposed, ZL1=ZL2, Then
3-212
Date: 2012-08-14
3 Operation Theory
The impedance presented to the device is:
For an earth fault,
With the mutual compensation enabled,
(Actual distance of the fault) The residual current from the parallel line should be added to the device. It should be connected to terminal 08 and star point of the parallel line CT connected to terminal 07 as shown in the following figure. Please note the connection diagram and the terminal numbers are for reference only. The final connection terminals are subject to the device configuration at site.

Date: 2012-08-14
3-213
3 Operation Theory
A B C
P2
S2
P2
S2
P1
S1
P1
S1
02 04 06 08
01 03 05 07
02 04 06 08
01 03 05 07
3.31.4 I/O Signals

Table 3.31-1 I/O signals of fault location No. 1 2 3 4 No. 1 2 3 4 Input Signal U3P I3P FPS_Fault FD.Pkp Output Signal Fault_Location Faulty_Phase Fault_Phase_Curr Fault_Resid_Curr The result of fault location The selected faulty phase Maximum faulty current Maximum residual current Three-phase voltage input Three-phase current input Faulty phase selection The device picks up Description Description
3-214
Date: 2012-08-14
4 Supervision
4 Supervision Table of Contents

4 Supervision ...................................................................................... 4-a
4.1 Overview .......................................................................................................... 4-1 4.2 Supervision Alarms ......................................................................................... 4-1 4.3 Relay Self-supervision.................................................................................... 4-7
4.3.1 Relay Hardware Monitoring................................................................................................ 4-7 4.3.2 Fault Detector Monitoring ................................................................................................... 4-7 4.3.3 Check Setting..................................................................................................................... 4-7
4.4 AC Input Monitoring ........................................................................................ 4-7

4.4.1 Voltage/current Drift Monitoring and Auto-adjustment ........................................................ 4-7 4.4.2 Sampling Monitoring .......................................................................................................... 4-7
4.5 Secondary Circuit Monitoring ........................................................................ 4-7

4.5.1 Opto-coupler Power Supervision ....................................................................................... 4-7 4.5.2 Circuit Breaker Supervision................................................................................................ 4-7
4.6 GOOSE Alarm .................................................................................................. 4-8
List of Tables
Table 4.2-1 Alarm description ...................................................................................................4-1 Table 4.2-2 Troubleshooting .....................................................................................................4-4

Date: 2012-03-12
4-a
4 Supervision
4-b
Date: 2012-03-12
4 Supervision
4.1 Overview
Protection system is in quiescent state under normal conditions, and it is required to respond promptly for faults occurred on power system. When the device is in energizing process before the LED HEALTHY is on, the device need to be checked to ensure no abnormality. Therefore, the automatic supervision function, which checks the health of the protection system when startup and during normal operation, plays an important role. The numerical relay based on the microprocessor operations is suitable for implementing this automatic supervision function of the protection system. In case a defect is detected during initialization when DC power supply is provided to the device, the device will be blocked with indication and alarm of relay out of service. It is suggested a trial recovery of the device by re-energization. Please contact supplier if the device is still failure. When a failure is detected by the automatic supervision, it is followed by a LCD message, LED indication and alarm contact outputs. The failure alarm is also recorded in event recording report and can be printed If required.
4.2 Supervision Alarms

Hardware circuit and operation status of the device are self-supervised continuously. If any abnormal condition is detected, information or report will be displayed and a corresponding alarm will be issued. A minor abnormality may block a certain number of protections functions while the other functions can still work. However, if severe hardware failure or abnormality, such as PWR module failure, DC converter failure and so on, are detected, all protection functions will be blocked and the LED HEALTHY will be extinguished and blocking output contacts BO_FAIL will be given. The protective device then can not work normally and maintenance is required to eliminate the failure. All the alarm signals and the corresponding handling suggestions are listed below. Note! If the protective device is blocked or alarm signal is sent during operation, please do find out its reason with the help of self-diagnostic record. If the reason can not be found at site, please notify the factory NR. Please do not simply press button TARGET RESET on the protection panel or re-energize on the device.
Table 4.2-1 Alarm description No. Item Description Fail Signals The device fails. 1 Fail_Device This signal will be pick up if any fail signal picks up and it will drop off when all fail signals drop off. 2 Fail_Setting_OvRange Set value of any setting is out of scope. Blocked Blocked Blocking Device

Date: 2012-03-12
4-1
4 Supervision
This signal will pick up instantaneously and will be latched unless the recommended handling suggestion is adopted. 3 Fail_BoardConfig Mismatch between the configuration of plug-in modules and the designing drawing of an applied-specific project. After config file is updated, settings of the file and settings saved on the device are not matched. 4 Fail_SettingItem_Chgd This signal will pick up instantaneously and will be latched unless the recommended handling suggestion is adopted. Error is found during checking memory data. 5 Fail_Memory This signal will pick up instantaneously and will be latched unless the recommended handling suggestion is adopted. Error is found during checking settings. 6 Fail_Settings This signal will pick up instantaneously and will be latched unless the recommended handling suggestion is adopted. DSP chip is damaged. 7 Fail_DSP This signal will pick up instantaneously and will be latched unless the recommended handling suggestion is adopted. Communication between two DSP chips is abnormal 8 Fail_DSP_Comm This signal will pick up instantaneously and will drop off instantaneously. Software configuation is incorrect. 9 Fail_Config This signal will pick up instantaneously and will be latched unless the recommended handling suggestion is adopted. AC current and voltage samplings are abnormal. 10 Fail_Sample This signal will pick up with a time delay of 200ms and will be latched unless the recommended handling suggestion is adopted. 11 MCBrd.Fail_Sample For DSP plug-in module for measurement and control in slot 06, AC current and voltage samplings are abnormal Error is found during checking the settings of DSP plug-in module for measurement and control in slot 06. Alarm Signals The device is abnormal. 13 Alm_Device This signal will be pick up if any alarm signal picks up and it will drop off when all alarm signals drop off. The device is in the communication test mode. 14 Alm_CommTest This signal will pick up instantaneously and will drop off instantaneously. 4-2
Date: 2012-03-12
Blocked
Blocked
Blocked
Blocked
Blocked
Blocked
Blocked
Blocked
Blocked
12
MCBrd.Fail_Settings
Blocked
Unblocked
Unblocked
4 Supervision
The error is found during MON module checking 15 Alm_Settings_MON settings of device. This signal will pick up with a time delay of 10s and will be latched unless re-powering or rebooting the device. The error is found during checking the version of 16 Alm_Version software downloaded to the device. This signal will pick up instantaneously and will drop off instantaneously. The active group set by settings in device and that set 17 Alm_BI_SettingGrp by binary input are not matched. This signal will pick up instantaneously and will drop off instantaneously. Data frame is abnormal between two DSP modules. 18 Alm_DSP_Frame This signal will pick up instantaneously and will drop off instantaneously. The power supply of BI plug-in module in slot xx is 19 Bxx.Alm_OptoDC abnormal. This signal will pick up with a time delay of 10s and will drop off with a time delay of 10s. Fault detector element operates for longer than 50s. 20 Alm_Pkp_FD This signal will pick up with a time delay of 50s and will drop off with a time delay of 10s. Neutral current fault detector element operates for 21 Alm_Pkp_I0 longer than 10s. This signal will pick up with a time delay of 10s and will drop off with a time delay of 10s. Protection VT circuit fails. 22 VTS.Alm This signal will pick up with a time delay of 1.25s and will drop off with a time delay of 10s. Protection VT circuit of neutral point fails. 23 VTNS.Alm This signal will pick up with a time delay of 1.25s and will drop off with a time delay of 10s. CT circuit of corresponding circuit breaker fails. 24 CTS.Alm This signal will pick up with a time delay of 10s and will drop off with a time delay of 10s. The 25 Alm_52b auxiliary normally closed contact (52b) of Unblocked Unblocked Unblocked Unblocked Unblocked Unblocked Unblocked Unblocked Unblocked Unblocked Unblocked
corresponding circuit breaker is abnormal. This signal will pick up with a time delay of 10s and will drop off with a time delay of 10s. The device is in maintenance state.
26
BI_Maintenance
This signal will pick up with a time delay of 150ms and will drop off with a time delay of 150ms.
Unblocked
27
Alm_TimeSync
Time synchronization abnormality alarm.
Unblocked

Date: 2012-03-12
4-3
4 Supervision
Frequency of the system is higher than 65Hz or lower 28 Alm_Freq than 45Hz. This signal will pick up with a time delay of 100ms and will drop off with a time delay of 10s. Alm_Sparexx (xx=01~08) Spare alarm signals The time delay of pickup and dropoff for these alarm signals can be set by PCS-Explorer. Protection Element Alarm Signals Input signal of receiving transfer trip is energized for 30 TT.Alm longer than 4s and it will drop off with a time delay of 10s. 31 32 33 34 35 27P1.Alm 27P2.Alm 59P1.Alm 59P2.Alm 49-1.Alm Stage 1 of undervoltage protection alarms. Stage 2 of undervoltage protection alarms. Stage 1 of overvoltage protection alarms. Stage 2 of overvoltage protection alarms. Stage 1 of thermal overload protection operates to alarm. Stage 2 of thermal overload protection operates to alarm. Synchronism voltage circuit is abnormal (UB) 37 25.Alm_VTS_UB This signal will pick up with a time delay of 1.25s and will drop off with a time delay of 10s. Synchronism voltage circuit is abnormal (UL) 38 25.Alm_VTS_UL This signal will pick up with a time delay of 1.25s and will drop off with a time delay of 10s. 39 40 41 79.Fail_Rcls 79.Fail_Chk 68.St Auto-reclosing fails. Synchrocheck for AR fails. Power swing detection takes into effect. Channel x is abnormal 42 FOx.Alm_CH This signal will pick up with a time delay of 100ms and will drop off with a time delay of 1s. Received ID from the remote end is not as same as the 43 FOx.Alm_ID setting [FOx.RmtID] of the device in local end This signal will pick up with a time delay of 100ms and will drop off with a time delay of 1s. Table 4.2-2 Troubleshooting No. Item Handling suggestion Fail Signals 1 Fail_Device The signal is issued with other specific fail signals, and please refer to the handling suggestion other specific alarm signals. Please reset setting values according to the range described in the instruction 2 Fail_Setting_OvRange manual, then re-power or reboot the device and the device will restore to normal operation state. 4-4
Date: 2012-03-12
Unblocked
29
Unblocked
Unblocked
Unblocked Unblocked Unblocked Unblocked Unblocked
36
49-2.Alm
Unblocked
Unblocked
Unblocked
Unblocked Unblocked Unblocked
Unblocked
Unblocked
4 Supervision
1. Go to the menu InformationBorad Info, check the abnormality information. 3 Fail_BoardConfig 2. For the abnormality board, if the board is not used, then remove, and if the board is used, then check whether the board is installed properly and work normally. Please check the settings mentioned in the prompt message on the LCD, and 4 Fail_SettingItem_Chgd go to the menu Settings and select Confirm_Settings item to comfirm settings. Then, the device will restore to normal operation stage. 5 6 7 8 9 Fail_Memory Fail_Settings Fail_DSP Fail_DSP_Comm Fail_Config Please inform the manufacture or the agent for repair. Please inform the manufacture or the agent for repair. Chips are damaged and please inform the manufacture or the agent replacing the module. Please inform the manufacture or the agent for repair. Please inform configuration engineers to check and confirm visualization functions of the device 1. Please make the device out of service. 10 Fail_Sample 2. Then check if the analog input modules and wiring connectors connected to those modules are installed at the position. 3. Re-power the device and the device will restore to normal operation state. 1. Please make the device out of service. 11 MCBrd.Fail_Sample 2. Then check if analog input modules and wiring connectors connected to those modules are installed at the position. 3. Re-power the device and the device will restore to normal operation state. 12 MCBrd.Fail_Settings Please inform the manufacturer or the agent for repair. Alarm Signals 13 Alm_Device The signal is issued with other specific alarm signals, and please refer to the handling suggestion other specific alarm signals. No special treatment is needed, and disable the communication test function after the completion of the test. Please inform the manufacture or the agent for repair. Users may pay no attention to the alarm signal in the project commissioning stage, but it is needed to download the latest package file (including correct 16 Alm_Version version checksum file) provided by R&D engineer to make the alarm signal disappear. Then users get the correct software version. It is not allowed that the alarm signal is issued on the device already has been put into service. the devices having being put into service so that the alarm signal disappears. Please check the value of setting [Active_Grp] and binary input of indiating 17 BI_SettingGrp active group, and make them matched. Then the ALARM LED will be extinguished and the corresponding alarm message will disappear and the device will restore to normal operation state. 18 Alm_DSP_Frame Please inform the manufacture or the agent for repair. 1. check whether the binary input module is connected to the power supply. 19 Bxx.Alm_OptoDC 2. check whether the voltage of power supply is in the required range. 3. After the voltage for binary input module restores to normal range, the PCS-902 Line Distance Relay
Date: 2012-03-12
14 15
Alm_CommTest Alm_Settings_MON
4-5
4 Supervision
ALARM LED will be extinguished and the corresponding alarm message will disappear and the device will restore to normal operation state. Please check secondary values and protection settings. If settings are not set 20 Alm_Pkp_FD reasonable to make fault detectors pick up, please reset settings, and then the alarm message will disappear and the device will restore to normal operation state. Please check secondary values and protection settings. If settings are not set 21 Alm_Pkp_I0 reasonable to make fault detectors pick up, please reset settings, and then the alarm message will disappear and the device will restore to normal operation state. 22 VTS.Alm Please check the corresponding VT secondary circuit. After the abnormality is eliminated, the device returns to normal operation state. Please check the corresponding VT secondary circuit of neutral point. After the abnormality is eliminated, the device returns to normal operation state. Please check the corresponding CT secondary circuit. After the abnormality is eliminated, the device returns to normal operation state. Please check the auxiliary contact of CB. After the abnormality is eliminated, the device returns to normal operation state. After maintenance is finished, please de-energized the binary input 26 Alm_BI_Maintenance [BI_Maintenance] and then the alarm will disappear and the device restore to normal operation state. 1. check whether the selected clock synchronization mode matches the clock synchronization source; 2. check whether the wiring connection between the device and the clock synchronization source is correct 27 Alm_TimeSync 3. check whether the setting for selecting clock synchronization (i.e. [Opt_TimeSync]) is set correctly. If there is no clock synchronization, please set the setting [Opt_TimeSync] as No TimeSync. 4. After the abnormality is removed, the ALARM LED will be extinguished and the corresponding alarm message will disappear and the device will restore to normal operation state. 28 29 Alm_Freq Alm_Sparexx (xx=01~08) Adjust the system operating mode Find the reason according to specific problem. (These signals are user-defined.) Operation Alarm Signals Please check the corresponding binary input secondary circuit. After the 30 TT.Alm abnormality is eliminated, ALARM LED will go off automatically and device returns to normal operation state with a time delay of 10s.
23
VTNS.Alm
24
CTS.Alm
25
Alm_52b
4-6
Date: 2012-03-12
4 Supervision
4.3 Relay Self-supervision 4.3.1 Relay Hardware Monitoring

All chips on DSP module are monitored to ensure whether they are damaged or having errors. If any one of them is detected damaged or having error, the alarm signal [Fail_DSP] is issued with the device being blocked.
4.3.2 Fault Detector Monitoring

When neutral current fault detector picks up and lasts for longer than 10 seconds, an alarm [Alm_Pkp_I0] will be issued without the device blocked. When any fault detector picks up for longer than 50s, an alarm will be issued [Alm_Pkp_FD] without the device blocked.
4.3.3 Check Setting

This relay has 10 setting groups, only one Setting group could be activiated (is active) at a time. The settings of active setting group are checked to ensure they are reasonable. If settings are checked to be unreasonable or out of setting scopes, a corresponding alarm signal will be issued, and protective device is also blocked.
4.4 AC Input Monitoring

4.4.1 Voltage/current Drift Monitoring and Auto-adjustment
Zero point of voltage and current may drift due to variation of temperature or other environment factors. The device continually traces the drift and adjust it to normal value automatically.
4.4.2 Sampling Monitoring

AC current and voltage samplings of protection DSP and fault detector DSP are monitored and if the samples of protection DSP and fault detector DSP are detected to be wrong or inconsistent between them, the alarm signal [Fail_Sample] will be issued and the device will be blocked.
4.5 Secondary Circuit Monitoring

4.5.1 Opto-coupler Power Supervision
Positive power supply of opto-coupler is continually monitored. If an error or damage has occurred, an alarm [Bxx.Alm_OptoDC] will be issued.
4.5.2 Circuit Breaker Supervision

If 52b of three phases are energized ,which indicates circuit breaker is open and there is no current detected in the line, the line will be considered to be out of service. SOTF protection will be enabled after 50ms. If 52b of three phases are energized that indicates circuit breaker is open but there is still current detected in the line (the measured current is greater than a settable threshold value) or three-phase circuit breaker is in pole disagreement, an alarm signal [Alm_52b] will be issued after
Date: 2012-03-12
4-7
4 Supervision
10 seconds.
4.6 GOOSE Alarm

No. 1 Output Signal GAlm_AStorm_SL Description GOOSE alarm signal indicating that there is a network storm occurring on the network A. GOOSE alarm signal indicating that there is a network storm occurring on the network B. GOOSE alarm signal indicating that there is an error in the GOOSE configuration file GOOSE alarm signal indicating that network A for Namexx is disconnected. GOOSE alarm signal indicating that network B for Namexx is disconnected. Between GOOSE control blocks received on network and GOOSE control blocks defined in GOOSE.txt file are unmatched for Namexx.
GAlm_BStorm_SL
3 4 5 6
GAlm_CfgFile_SL Namexx.GAlm_ADisc_SL_xx Namexx.GAlm_BDisc_SL_xx Namexx.GAlm_Cfg_SL_xx
These are GOOSE alarm reports. When any alarm message is issued, the LED ALARM is lit without the device being blocked. After the abnormality is removed, the device will return to normal with the LED ALARM being distinguished automatically.
No. 1 2 3 4 5 6 Output Signal GAlm_AStorm_SL GAlm_BStorm_SL GAlm_CfgFile_SL Namexx.GAlm_ADisc_SL_xx Namexx.GAlm_BDisc_SL_xx Namexx.GAlm_Cfg_SL_xx Handling suggestion Please check the related switches Please check the related switches Please check the GOOSE configuration file (i.e. GOOSE.txt) Please check the network Please check the network Please check the GOOSE configuration file and the network
Namexx is the name defined by the setting [Linkxx], xx=01, 02, 03, , 64
4-8
Date: 2012-03-12
5 Management
5 Management Table of Contents

5 Management ..................................................................................... 5-a
5.1 Measurement ................................................................................................... 5-1 5.2 Recording ........................................................................................................ 5-5
5.2.1 Overview ............................................................................................................................ 5-5 5.2.2 Event Recording ................................................................................................................ 5-5 5.2.3 Disturbance Recording ...................................................................................................... 5-6 5.2.4 Present Recording ............................................................................................................. 5-7

Date: 2012-03-08
5-a
5 Management
5-b
Date: 2011-03-08
5 Management
5.1 Measurement
PCS-902 performs continuous measurement of the analogue input quantities. The current full scale of relay is 40 times of rated current, and there is no effect to the performance of IED due to overflowing of current full scale. The device samples 24 points per cycle and calculates the RMS value in each interval and updated the LCD display in every 0.5 second. The measurement data can be displayed on the LCD of the relay front panel or on the local/remote PC via software tool. Navigate the menu to view the sampling value through LCD screen. This device can be used for one or two circuit breaker configuration. If it is used for two circuit breakers configuration, some corresponding metering will be suffixed by CBn (n is the number of the CB and it can be 1 and 2). 1. RMS Values
Access path: Press key to enter main menu firstly. Select the item Measurements and press key ENT to enter, and then select submenu Measurements1 (from protection DSP) or Measurements2 (from fault detector DSP). Press key ENT to display corresponding measurement values as below on the LCD.
Magnitude of three-phase protection voltage Ua, Ub, Uc (i.e. UL1) Magnitude of synchronism voltage (UB1, UB2 and UL2)
Please refer to Function Description in Synchronism Check about the definitions of UL1, UB1, UL2 and UB2.
Magnitude of calculated residual voltage (3U0) Magnitude of positive-sequence and negative-sequence voltage (U1, U2) Magnitude of phase current Ia, Ib, Ic (it represents the current of line, for two circuit breakers configuration, such as one and a half breakers arrangement, it is equal to the summation of corresponding phase currents of two circuit breakers) Magnitude of calculated residual current 3I0 (For one circuit breaker configuration, it is calculated from three phase currents, i.e. 3I0=Ia+Ib+Ic. However, for two circuit breakers configuration, it is calculated from two groups of three phase currents, i.e. 3I0=Ia1+Ib1+Ic1+Ia2+Ib2+Ic2) Magnitude of phase currents of two groups of CTs Ia1, Ib1, Ic1, Ia2, Ib2, Ic2 (Only displayed for two circuit breakers configuration with two groups of CTs, for example, one and a half breakers arrangement) Magnitude of residual currents of two groups of CTs 3I01, 3I02 (Only displayed for two circuit breakers configuration with two groups of CTs, for example, one and a half breakers arrangement) Frequency of protection voltage (f) Frequency of synchronism voltage (f_Syn)

Date: 2012-03-08
5-1
5 Management
Frequency difference (f_Diff) Voltage difference (U_Diff) Phase Angle
2.
Access path: 1) 2) 3) Press key to enter main menu firstly. Select the item Measurements and press key ENT to enter, and then Select submenu Measurements1 (from protection DSP) or Measurements2 (from fault detector DSP). Press key ENT to display corresponding measurement values as below on the LCD.
4)
These displayed phase angles of three-phase current and three-phase voltage are based on phase A voltage.
Phase angle of (Ua, Ub, Uc) Phase angle of (Ia, Ib, Ic) Phase angle of (Ia1, Ib1, Ic1) (Only displayed for two circuit breakers configuration with two groups of CTs, for example, one and a half breakers arrangement) Phase angle of (Ia2, Ib2, Ic2) (Only displayed for two circuit breakers configuration with two groups of CTs, for example, one and a half breakers arrangement) Phase angle difference between two synchronism voltages (phi_Diff)
No. 1 2 Symbol Ang(Ua) Ang(Ub) Definition Phase angle of A-phase voltage (Ua), it is taken as reference (i.e. zero degree) Phase angle difference for B-phase voltage (Ub) relative to the reference voltage (A-phase voltage (Ua)) Phase angle difference for C-phase voltage (Uc) relative to the reference voltage (A-phase voltage (Ua)) Phase angle difference for A-phase current (Ia) relative to the reference voltage (A-phase voltage (Ua)) Phase angle difference for B-phase current (Ib) relative to the reference voltage (A-phase voltage (Ua)) Phase angle difference for C-phase current (Ic) relative to the reference voltage (A-phase voltage (Ua)) Phase angle difference for A-phase current (Ia of CT1 for CB1) relative to the reference voltage (A-phase voltage (Ua)) Phase angle difference for B-phase current (Ib of CT1 for CB1) relative to the reference voltage (A-phase voltage (Ua)) Phase angle difference for C-phase current (Ic of CT1 for CB1) relative to the
Ang(Uc)
Ang(Ia)
Ang(Ib)
Ang(Ic)
Ang(Ia1)
8 9
Ang(Ib1) Ang(Ic1)
5-2
Date: 2011-03-08
5 Management
reference voltage (A-phase voltage (Ua)) 10 Ang(Ia2) Phase angle difference for A-phase current (Ia of CT2 for CB2) relative to the reference voltage (A-phase voltage (Ua)) Phase angle difference for B-phase current (Ib of CT2 for CB2) relative to the reference voltage (A-phase voltage (Ua)) Phase angle difference for C-phase current (Ic of CT2 for CB2) relative to the reference voltage (A-phase voltage (Ua)) Phase angle difference between two synchronism voltages
11
Ang(Ib2)
12 13
Ang(Ic2) Ang(phi_Diff)
3.
Primary value
Access path: 1) 2) 3) 4) Press key to enter main menu firstly. Select the item Measurements and press key ENT to enter, and then Select submenu Measurements3. Press key ENT to display corresponding measurement values as below on the LCD.
Symbol Ua Ub Uc Uab Ubc Uca 3U0 U1 U2 Ia Ib Ic I1 I2 Ia1 Definition The primary value of A-phase voltage (Ua) The primary value of B-phase voltage (Ub) The primary value of C-phase voltage (Uc) The primary value of phase-to-phase voltage (Uab) The primary value of phase-to-phase voltage (Ubc) The primary value of phase-to-phase voltage (Uca) The primary value of calculated residual voltage (3U0) The primary value of positive-sequence voltage (U1) The primary value of negative-sequence voltage (U2) The primary value of A-phase current of line (Ia) The primary value of B-phase current of line (Ib) The primary value of C-phase current of line (Ic) The primary value of positive-sequence current (I1) The primary value of negative-sequence current (I2) The primary value of A-phase current of CT1 for CB1 (Only displayed for two circuit breakers configuration with two groups of CTs) The primary value of B-phase current of CT1 for CB1 (Only displayed for two circuit breakers configuration with two groups of CTs) The primary value of C-phase current of CT1 for CB1 (Only displayed for two circuit breakers configuration with two groups of CTs) Unit kV kV kV kV kV kV kV kV kV A A A A A A
No. 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15
16
Ib1
17
Ic1

Date: 2012-03-08
5-3
5 Management
18 Ia2 The primary value of A-phase current of CT2 for CB2 (Only displayed for two circuit breakers configuration with two groups of CTs) The primary value of B-phase current of CT2 for CB2 (Only displayed for two circuit breakers configuration with two groups of CTs) The primary value of C-phase current of CT2 for CB2 (Only displayed for two circuit breakers configuration with two groups of CTs) The primary value of synchronism voltage (UB1) The primary value of synchronism voltage (UL2) The primary value of synchronism voltage (UB2) The primary value of synchronism voltage (U_Syn) The primary value of measurement frequency (f) The primary value of synchronism frequency (f_Syn) The primary value of phase-A active power (P) The primary value of phase-B active power (P) The primary value of phase-C active power (P) The primary value of phase-A reactive power (Q) The primary value of phase-B reactive power (Q) The primary value of phase-C reactive power (Q) The primary value of phase-A apparent power (S) The primary value of phase-B apparent power (S) The primary value of phase-C apparent power (S) The value of phase-A power factor (Cos) The value of phase-B power factor (Cos) The value of phase-C power factor (Cos) The primary value of active power (P) The primary value of reactive power (Q) The primary value of apparent power (S) The value of power factor (Cos) The frequency difference between reference side and incoming side for CB synchronism-check. The df/dt difference between reference side and incoming side for CB synchronism-check. Phase-angle difference between reference side and incoming side for CB synchronism-check. The primary value of voltage difference. The primary positive active energy. The primary negative active energy. A
19
Ib2
20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43
Ic2 UB1 UL2 UB2 U_Syn f f_Syn Pa Pb Pc Qa Qb Qc S Sb Sc Cosa Cosb Cosc P Q S Cos f_Diff
A kV kV kV kV Hz Hz MW MW MW MVAr MVAr MVAr MVA MVA MVA MW MVAr MVA Hz
44
df/dt
Hz/s
45 46 47 48
phi_Diff U_Diff PHr+ PHr-
Deg kV MWh MWh
5-4
Date: 2011-03-08
5 Management
49 50 QHr+ QHrThe primary positive reactive energy. The primary negative reactive energy. MVAh MVAh
5.2 Recording
5.2.1 Overview
PCS-902 provides the following recording functions: 1. 2. 3. Event recording Disturbance recording Present recording
All the recording information except waveform can be viewed on local LCD or by printing. Waveform could only be printed or extracted with PCS-Explorer software tool and a waveform analysis software.
5.2.2 Event Recording

5.2.2.1 Overview The device can store the latest 1024 disturbance records, 1024 binary events, 1024 supervision events and 1024 device logs. All the records are stored in non-volatile memory, and when the available space is exhausted, the oldest record is automatically overwritten by the latest one. 5.2.2.2 Disturbance Records When any protection element operates or drops off, such as fault detector, distance protection etc., they will be logged in event records. 5.2.2.3 Supervision Events The device is under automatic supervision all the time. If there are any failure or abnormal condition detected, such as, chip damaged, VT circuit failure and so on, it will be logged in event records. 5.2.2.4 Binary Events When there is a binary input is energized or de-energized, i.e., its state has changed from 0 to 1 or from 1 to 0, it will be logged in event records. 5.2.2.5 Control Logs When the total number of control command records reaches 256, Control_Logs memory area will be full. If the device receives a new control command now, the oldest control command record will be deleted, and then the latest control command record will be stored and displayed. 5.2.2.6 Device Logs If an operator implements some operations on the device, such as reboot protective device, modify setting, etc., they will be logged in event records.

Date: 2012-03-08
5-5
5 Management
5.2.3 Disturbance Recording

5.2.3.1 Application Disturbance records can be used to have a better understanding of the behavior of the power network and related primary and secondary equipment during and after a disturbance. Analysis of the recorded data provides valuable information that can be used to improve existing equipment. This information can also be used when planning for and designing new installations. 5.2.3.2 Design A disturbance record consists of fault record and fault waveform. A disturbance record is initiated by fault detector element. The disturbance record has two types: 1. 2. Fault detector element picks up without operation of protective element Fault detector element picks up with operation of protective elements.
5.2.3.3 Capacity and Information of Disturbance Records The device can store up to 64 disturbance records with waveform in non-volatile memory. It is based on first in first out queue that the oldest disturbance record will be overwritten by the latest one. For each disturbance record, the following items are included: 1. Sequence number
Each operation will be recorded with a sequence number in the record and displayed on LCD screen. 2. Date and time of fault occurrence
The time resolution is 1ms using the relay internal clock synchronized via clock synchronized device if connected. The date and time is recorded when a system fault is detected. 3. Relative operating time
An operating time (not including the operating time of output relays) is recorded in the record. 4. 5. Faulty phase Fault location
To get accurate result of fault location, the following settings shall be set correctly: 1) 2) 3) 4) Positive-sequence line reactance [X1L] Positive-sequence line resistance [R1L] Zero-sequence line reactance [X0L] Zero-sequence line resistance [R0L]
5-6
Date: 2011-03-08
5 Management
5) 6) 7) 8) 9) 6.
Zero-sequence line mutual reactance [X0M] Zero-sequence line mutual resistance [R0M] Line positive-sequence sensitive angle [phi1_Reach] Line zero-sequence sensitive angle [ph0_Reach] Line length in km [LineLength] Protection elements
5.2.3.4 Capacity and Information of Fault Waveform MON module can store 64 pieces of fault waveform oscillogram in non-volatile memory. If a new fault occurs when 64 fault waveform have been stored, the oldest will be overwritten by the latest one. Each fault record consists of all analog and digital quantities related to protection, such as original current and voltage, differential current, alarm elements, and binary inputs and etc. Each time recording includes 12-cycle pre-fault waveform, and 250 cycles at least and 500 cycles at most can be recorded.
5.2.4 Present Recording

Present recording is a waveform triggered manually on on the devices LCD or remotely through PCS-Explorer software. Recording content of present recording is same to that of disturbance recording. Each time recording includes 12-cycle waveform before triggering, and 250 cycles at most can be recorded.

Date: 2012-03-08
5-7
5 Management
5-8
Date: 2011-03-08
6 Hardware
6 Hardware Table of Contents

6 Hardware .......................................................................................... 6-a
6.1 Overview .......................................................................................................... 6-1 6.2 Typical Wiring .................................................................................................. 6-4
6.2.1 Conventional CT/VT (For reference only) .......................................................................... 6-4 6.2.2 ECT/EVT (For reference only) ........................................................................................... 6-6 6.2.3 CT Requirement ................................................................................................................. 6-8
6.3 Plug-in Module Description ............................................................................ 6-9

6.3.1 PWR Plug-in Module (Power Supply) ................................................................................ 6-9 6.3.2 MON Plug-in Module (Monitor) ........................................................................................ 6-11 6.3.3 AI Plug-in Module (Analog Input) ..................................................................................... 6-14 6.3.4 DSP Plug-in Module (Logic Process) ............................................................................... 6-24 6.3.5 NET-DSP Plug-in Module (GOOSE and SV) ................................................................... 6-25 6.3.6 CH Plug-in Module (Fibre Optical Channel Interface) ...................................................... 6-26 6.3.7 BI Plug-in Module (Binary Input) ...................................................................................... 6-27 6.3.8 BO Plug-in Module (Binary Output) .................................................................................. 6-32 6.3.9 HMI Module...................................................................................................................... 6-35
List of Figures
Figure 6.1-1 Rear view of fixed module position ....................................................................6-1 Figure 6.1-2 Hardware diagram ................................................................................................6-2 Figure 6.1-3 Front view of PCS-902 ..........................................................................................6-3 Figure 6.1-4 Typical rear view of PCS-902 ...............................................................................6-4 Figure 6.2-1 Typical wiring of PCS-902 (conventional CT/VT) ...............................................6-5 Figure 6.2-2 Typical wiring of PCS-902 (ECT/EVT) .................................................................6-7 Figure 6.3-1 View of PWR plug-in module .............................................................................6-10 Figure 6.3-2 Output contacts of PWR plug-in module ..........................................................6-10
Date: 2011-03-08
6-a
6 Hardware
Figure 6.3-3 View of MON plug-in module .............................................................................6-12 Figure 6.3-4 Connection of communication terminal ...........................................................6-14 Figure 6.3-5 Schematic diagram of CT circuit automatically closed .......................................6-15 Figure 6.3-6 Current connection of AI plug-in module .........................................................6-16 Figure 6.3-7 Voltage connection 1 of AI plug-in module ......................................................6-16 Figure 6.3-8 Voltage connection 2 of AI plug-in module ......................................................6-17 Figure 6.3-9 View of AI plug-in module for one CT group input ..........................................6-17 Figure 6.3-10 Current connection of AI plug-in module .......................................................6-19 Figure 6.3-11 Voltage connection of AI plug-in module........................................................6-19 Figure 6.3-12 View of AI plug-in module for two CT group input ........................................6-20 Figure 6.3-13 Current connection of AI plug-in module .......................................................6-21 Figure 6.3-14 Voltage connection of AI plug-in module .......................................................6-22 Figure 6.3-15 View of AI plug-in module for two CT group input ........................................6-22 Figure 6.3-16 View of DSP plug-in module ............................................................................6-24 Figure 6.3-17 View of NET-DSP plug-in module ....................................................................6-25 Figure 6.3-18 View of CH plug-in module ..............................................................................6-26 Figure 6.3-19 View of BI plug-in module (NR1503) ...............................................................6-28 Figure 6.3-20 View of BI plug-in module (NR1504) ...............................................................6-29 Figure 6.3-21 View of BO plug-in module (NR1521A) ...........................................................6-32 Figure 6.3-22 View of BO plug-in module (NR1521C) ...........................................................6-33 Figure 6.3-23 View of BO plug-in module (NR1521F) ...........................................................6-34 Figure 6.3-24 View of BO plug-in module (NR1521G) ...........................................................6-35
List of Tables
Table 6.3-1 Terminal definition and description of PWR plug-in module ............................6-10 Table 6.3-2 Terminal definition of AI module .........................................................................6-18 Table 6.3-3 Terminal definition of AI module .........................................................................6-20 Table 6.3-4 Terminal definition of AI module .........................................................................6-23
6-b
Date: 2011-03-08
6 Hardware
6.1 Overview
PCS-902 adopts 32-bit microchip processor CPU produced by FREESCALE as control core for management and monitoring function, meanwhile, adopts high-speed digital signal processor DSP for all the protection calculation. 24 points are sampled in every cycle and parallel processing of sampled data can be realized in each sampling interval to ensure ultrahigh reliability and safety of the device. PCS-902 is comprised of intelligent plug-in modules, except that few particular plug-in modules position cannot be changed in the whole device (gray plug-in modules as shown in Figure 6.1-1), other plug-in modules like AI (analog input) and IO (binary input and binary output) can be flexibly configured in the remaining slot positions.
MON module
Slot No.
01 02 03 04 05 06 07 08 09 10 11 12 13 14 15 P1
Figure 6.1-1 Rear view of fixed module position
PCS-902 has 16 slots, PWR plug-in module, MON plug-in module, DSP plug-in module and CH plug-in module are assigned at fixed slots. Besides 5 fixed modules are shown in above figure, there are 12 slots can be flexibly configured. AI plug-in module, BI plug-in module and BO plug-in module can be configured at position between slot 02, 03 and 06~15. It should be pay attention that AI plug-in module will occupy two slots. This device is developed on the basis of our latest software and hardware platform, and the new platform major characteristics are of high reliability, networking and great capability in anti-interference. See Figure 6.1-2 for hardware diagram.

Date: 2011-03-08
PWR module
DSP module
DSP module
BO module
BO module
BO module
BO module
CH Module
BI module
BI module
AI module
6-1
6 Hardware
Output Relay
Conventional CT/VT
A/D
Protection Calculation DSP
ECVT Fault Detector DSP Pickup Relay
A/D
ECVT ETHERNET LCD Uaux Power Supply Clock SYN LED CPU RJ45 Keypad PRINT +E
Figure 6.1-2 Hardware diagram
The working process of the device is as shown in above figure: current and voltage from conventional CT/VT are converted into small voltage signal and sent to DSP module after filtered and A/D conversion for protection calculation and fault detector respectively (ECVT signal is sent to the device without small signal and A/D convertion). When DSP module completes all the protection calculation, the result will be recorded in 32-bit CPU on MON module. DSP module carries out fault detector, protection logic calculation, tripping output, and MON module perfomes SOE (sequence of event) record, waveform recording, printing, communication between the device and SAS and communication between HMI and CPU. When fault detector detects a fault and picks up, positive power supply for output relay is provided. The items can be flexibly configured depending on the situations like sampling method of the device (conventional CT/VT or ECT/EVT), and the mode of binary output (conventional binary output or GOOSE binary output). The configurations for PCS-900 series based on microcomputer are classified into standard and optional modules.
Table 6.1-1 PCS-902 module configuration No. ID NR1101/NR1102 NR1401 NR1161 NR1213 NR1503/NR1504 NR1521 NR1301 Module description Management and monitor module (MON module) Analog input module (AI module ) Protection calculation and fault detector module (DSP module) Protection communication channel module (CH module) Binary input module (BI module) Binary output module (BO module) Power supply module (PWR module) Remark standard standard standard option standard standard standard
1 2 3 4 5 6 7
6-2
Date: 2011-03-08
External Binary Input
6 Hardware
No. ID NR1136 Module description GOOSE and SV from merging unit by IEC61850-9-2 (NET-DSP module) Human machine interface module (HMI module) Remark option standard
8 9
MON module provides functions like communication with SAS, event record, setting management etc. AI module converts AC current and voltage from current transformers and voltage transformers respectively to small voltage signal. DSP module performs filtering, sampling, protection calculation and fault detector calculation. CH module performs information exchange with the remote device through a dedicated optical fibre channel, multiplex optical fibre channel or PLC channel. BI module provides binary inputs via opto-couplers with rating voltage among 24V/110V/125V/220V/250V (configurable). BO module provides output contacts for tripping, and signal output contact for annunciation signal, remote signal, fault and disturbance signal, operation abnormal signal etc. PWR module converts DC 250/220/125/110V into various DC voltage levels for modules of the device. HMI module is comprised of LCD, keypad, LED indicators and multiplex RJ45 ports for user as human-machine interface. NET-DSP module receives and sends GOOSE messages, sampled values (SV) from merging unit by IEC61850-9-2 protocol.
PCS-902 series is made of a 4U height 19 chassis for flush mounting. Components mounted on its front include a 320240 dot matrix LCD, a 9 button keypad, 20 LED indicators and a multiplex RJ45 port. A monolithic micro controller is installed in the equipment for these functions. Following figures show front and rear views of PCS-902 respectively.
1 2 3 4 5 6 7 8 9 10
HEALTHY ALARM
11 12 13 14 15 16 17 18 19 20
PCS-902
GRP
Figure 6.1-3 Front view of PCS-902

Date: 2011-03-08
ESC
ENT
6-3
6 Hardware
20 LED indicators are, from top to bottom, operation (HEALTHY), self-supervision (ALARM), others are configurable. For the 9-button keypad, ENT is enter, GRP is group number and ESC is escape.
NR1102
NR1401
NR1161
NR1213
TX
NR1161
NR1504
NR1504
NR1521
NR1521
NR1521
NR1521
NR1301
5V OK ALM
BO_ALM BO_FAIL
RX ON TX OFF RX
DANGER
1 BO_COM1 2 3 4 5 6 7 8 9 10 11 12
PWR+ PWRGND BO_FAIL BO_ALM BO_COM2 BO_FAIL BO_ALM OPTO+ OPTO-
Figure 6.1-4 Typical rear view of PCS-902
6.2 Typical Wiring

6.2.1 Conventional CT/VT (For reference only)
NR1102 NR1401 NR1161 NR1213 NR1161 NR1504 NR1521A NR1521C NR1521C NR1521F NR1301
MON module
Slot No.
01 02 03 04 05 06 07 08 09 10 11 12 13 14 15 P1
The following typical wiring is given based on above hardware configuration
6-4
Date: 2011-03-08
PWR module
DSP module
DSP module
BO module
BO module
BO module
BO module
CH Module
BI module
AI module
6 Hardware
Power supply supervision CH-TX
0801
Dedicated Channel Or Telecom Equipment
CH-RX
*BI plug-in module can be independent common terminal
BI_01
0802
or CH-TX CH-RX
BI_06
+ Not used
0807 0808 0809
Fibre Optic
FC/PC Type (Rear) 0201 0202 0203 0204 0205 Ib Ia
BI_07
BI_12
+ Not used
0814 0815 0816
To parallel line
0206 0207
Ic
BI_13
From parallel line
0208 0213 0214 0215 0216 0217 0218
IM0
Protection Voltage
Ua
BI_18 -
0821 0822
Ub
Uc
1101 BO_01 1102 1103 BO_02
Controlled by fault detector element
0219 0220 0221 0222 0223 0224 UB2 UL2 UB1
Synchronism Voltage
1104 1121 1122
BO_11
1201 BO_01 1202 1203 BO_02
Signal Binary Output
External DC power supply Power supply for opto-coupler (24V)
PWR+ PWROPTO+ OPTO-
P110 P111 P107 P108 Power Supply
1204 1221 1222
BO_11
1301 BO_01 1302 1303 BO_02
Signal Binary Output (option)
P102 P103 P101 P105 P106 P104 A

To the screen of other coaxial cable with single point earthing PRINTER
BO_FAIL BO_ALM COM BO_FAIL BO_ALM COM
1304 1321 1322
BO_11
1501 0101
BO_CtrlOpn1
COM
1502 1503
B SGND
0102 0103 0104
BO_CtrlCls1
1504
SYN+ SYNSGND
0101 0102 0103 0104
1517 BO_CtrlOpn5 1518 1519 BO_CtrlCls5 1520 1521
Clock SYN
RTS TXD SGND
0105 0106 0107
BO_Ctrl Multiplex RJ45 (Front) 0012 0225
1522
Figure 6.2-1 Typical wiring of PCS-902 (conventional CT/VT)
PRINT
Grounding Bus

Date: 2011-03-08
6-5
6 Hardware
PCS-902 (conventional CT/VT and conventional binary input and binary output)
Slot No. Module ID
01 NR1102 MON
02
03
04 NR1161 DSP
05 NR1213 CH
06
07
08 NR1504 BI
09 NR1504 BI
10
11 NR1521 BO
12 NR1521 BO
13 NR1521 BO
14
15 NR1521 BO
P1 NR1301 PWR
NR1401 AI
PCS-902 (conventional CT/VT and GOOSE binary input and binary output)
Slot No. Module ID
01 NR1102 MON
02
03
04 NR1161 DSP
05 NR1213 CH
06 NR1136 NETDSP
07
08 NR1504 BI
09
10
11
12
13
14
15
P1 NR1301 PWR
NR1401 AI
6.2.2 ECT/EVT (For reference only)

NR1102 NR1161 NR1213 NR1161 NR1136 NR1503 NR1521A NR1521C NR1301
NET-DSP Module
MON module
Slot No.
01 02 03 04 05 06 07 08 09 10 11 12 13 14 15 P1
The following typical wiring is given based on above hardware configuration
6-6
Date: 2011-03-08
PWR module
DSP module
DSP module
BO module
BO module
CH Module
BI module
6 Hardware
CH-TX
BI_01
+ -
0801 0802 0803 0804 0805 0806
*BI plug-in module can be common negative terminal
Dedicated Channel Or Telecom Equipment
CH-RX or CH-TX CH-RX
BI_02
+ -
BI_03
+ -
Fibre Optic
FC/PC Type (Rear)
BI_11 + 0821 0822
Phase B Phase C
MU
SV from ECT/EVT
Phase A
RX
FO interface for SV channel Up to 8 (LC Type)
TX
1101 BO_01 1102 1103 BO_02 1104
Controlled by fault detector element
PWR+ PWROPTO+ OPTOP110 P111 P107 P108 P102 P103 P101 P105 P106 P104 A B SGND
1121 1122
BO_11
External DC power supply Power supply for opto-coupler (24V)
Power Supply
1201 BO_01 1202 1203 BO_02 1204
Signal Binary Output
1221 1222
BO_FAIL BO_ALM COM BO_FAIL
BO_11
1501 BO_CtrlOpn1 1502 1503 BO_CtrlCls1 1504
BO_ALM COM 0101 0102 0103 0104
1517 BO_CtrlOpn5 1518 1519 BO_CtrlCls5 1520 1521 BO_Ctrl 1522 IRIG-B
COM
PCS-902 ECT/EVT, GOOSE binary input and binary output
To the screen of other coaxial cable with single point earthing PRINTER
Slot No. Module ID 01 NR1102 MON 02 03 Slot No. Module ID 01 NR1102 MON 02 03
SYN+ SYNSGND
0101 0102 0103 0104
Clock SYN
RTS TXD SGND
0105 0106 0107
Figure 6.2-2 Typical wiring of PCS-902 (ECT/EVT)
PRINT
0012 Multiplex RJ45 (Front) 0225 Grounding Bus
04 NR1161 DSP
05 NR1213 CH
06 NR1136 NETDSP
07
08 NR1504 BI
09
10
11
12
13
14
15
P1 NR1301 PWR
PCS-902 ECT/EVT, conventional binary input and binary output
04 NR1161 DSP
05 NR1213 CH
06 NR1136 NETDSP
07
08 NR1504 BI
09 NR1504 BI
10
11 NR1521 BO
12 NR1521 BO
13 NR1521 BO
14
15 NR1521 BO
P1 NR1301 PWR

Date: 2011-03-08
6-7
6 Hardware
In the protection system adopting electronic current and voltage transformer (ECT/EVT), the merging unit will merge the sample data from ECT/EVT, and then send it to the device through multi-mode optical fibre. DSP module receives the data from merging unit through the optical-fibre interface to complete the protection calculation and fault detector. The difference between the hardware platform based on ECT/EVT and the hardware platform based on conventional CT/VT lies in the receiving module of sampled values only, and the device receives the sampled value from merging unit through multi-mode optical fibre.
6.2.3 CT Requirement
-Rated primary current Ipn: According to the rated current or maximum load current of primary apparatus. -Rated continuous thermal current Icth: According to the maximum load current. -Rated short-time thermal current Ith and rated dynamic current Idyn: According to the maximum fault current. -Rated secondary current Isn -Accuracy limit factor Kalf:
Ipn Icth Ith Idyn Isn Kalf IPal Rated primary current (amps) Rated continuous thermal current (amps) Rated short-time thermal current (amps) Rated dynamic current (amps) Rated secondary current (amps) Accuracy limit factor ()Kalf=Ipal/Ipn Rated accuracy limit primary current (amps)
Performance verification Esl > Esl

Esl Kalf IPal Ipn Isn Rct Rbn Sbn Esl 6-8
Date: 2011-03-08
Rated secondary limiting e.m.f (volts) Esl = kalfIsn(Rct+Rbn) Accuracy limit factor (Kalf=Ipal/Ipn) Rated accuracy limit primary current (amps) Rated primary current (amps) Rated secondary current (amps) Current transformer secondary winding resistance. (ohms) Rated resistance burden (ohms) Rbn=Sbn/Isn2 Rated burden (VAs)
Required secondary limiting e.m.f (volts) PCS-902 Line Distance Relay
6 Hardware
Esl = kIpcf Isn(Rct+Rb)/Ipn k Ipcf Isn Rct Rb Rc RL Rr Ipn stability factor = 2 Protective checking factor current (amps) Same as the maximum prospective fault current Rated secondary current (amps) Current transformer secondary winding resistance. (ohms) Real resistance burden (ohms) Rb=Rr+2RL+Rc Contact resistance, 0.05-0.1 ohm (ohms) Resistance of a single lead from relay to current transformer (ohms) Impedance of relay phase current input (ohms) Rated primary current (amps)
For example: 1. Kalf=30, Isn=5A, Rct=1ohm, Sbn=60VA
Esl = kalfIsn(Rct+Rbn) = kalfIsn(Rct+ Sbn/ Isn2) = 305(1+60/25)=510V 2. Ipcf=40000A, RL=0.5ohm, Rr=0.1ohm, Rc=0.1ohm, Ipn=2000A
Esl = 2IpcfIsn(Rct+Rb)/Ipn = 2Ipcf Isn(Rct+(Rr+2RL+Rc))/Ipn = 2400005(1+(0.1+20.5+0.1))/2000=440V Thus, Esl > Esl
6.3 Plug-in Module Description

The device consists of PWR plug-in module, MON plug-in module, DSP plug-in module, AI plug-in module, BI plug-in module, BO plug-in module, CH plug-in module and NET-DSP plug-in module. Terminal definitions and application of each plug-in module are introduced as follows.
6.3.1 PWR Plug-in Module (Power Supply)

PWR module is a DC/DC or AC/DC converter with electrical insulation between input and output. It has an input voltage range as described in Chapter 2 Technical Data. The standardized output voltages are +3.3V, +5V, 12V and +24V DC. The tolerances of the output voltages are continuously monitored. The +3.3V DC output provides power supply for the microchip processors, and the +5V DC output provides power supply for all the electrical elements that need +5V DC power supply in this device. The 12V DC output provides power supply for A/D conversion circuits in this device, and the +24V DC output provides power supply for the static relays of this device. The use of an external miniature circuit breaker is recommended. The miniature circuit breaker must be in the on position when the device is in operation and in the off position when the device is
Date: 2011-03-08
6-9
6 Hardware
in cold reserve. A 12-pin connector is fixed on PWR module. The terminal definition of the connector is described as below.
NR1301
5V OK ALM
BO_ALM BO_FAIL
ON OFF
1 2 3 4 5 6 7 8 9
BO_COM1 BO_FAIL BO_ALM BO_COM2 BO_FAIL BO_ALM OPTO+ OPTO-
10 PWR+ 11 PWR12 GND
Figure 6.3-1 View of PWR plug-in module
01 BO_FAIL 02 BO_ALM 03 04 BO_FAIL 05 BO_ALM 06
Figure 6.3-2 Output contacts of PWR plug-in module
Terminal definition and description is shown as follows:

Table 6.3-1 Terminal definition and description of PWR plug-in module Terminal No. 01 02 03 04 Symbol BO_COM1 BO_FAIL BO_ALM BO_COM2 Common terminal 1 Device failure output 1 (01-02, NC) Device abnormality alarm output 1 (01-03, NO) Common terminal 2 Description
6-10
Date: 2011-03-08
6 Hardware
Terminal No. 05 06 07 08 09 10 11 12 Symbol BO_FAIL BO_ALM OPTO+ OPTOBlank PWR+ PWRGND Description Device failure output 2 (04-05, NC) Device abnormality alarm output 2 (04-06, NO) Positive power supply for BI module (24V) Negative power supply for BI module (24V) Not used Positive input of power supply for the device (250V/220V/125V/110V) Negative input of power supply for the device (250V/220V/125V/110V) Grounded connection of the power supply
Note!
The standard rated voltage of PWR module is self-adaptive to 88~300 Vdc. If input voltage is out of range, an alarm signal (Fail_Device) will be issued. For non-standard rated voltage power supply module please specify when place order, and check if the rated voltage of power supply module is the same as the voltage of power source before the device being put into service. PWR module provides terminal 12 and grounding screw for device grounding. Terminal 12 shall be connected to grounding screw and then connected to the earth copper bar of panel via dedicated grounding wire. Effective grounding is the most important measure for a device to prevent EMI, so effective grounding must be ensured before the device is put into service. PCS-902, like almost all electronic relays, contains electrolytic capacitors. These capacitors are well known to be subject to deterioration over time if voltage is not applied periodically. Deterioration can be avoided by powering the relays up once a year.
6.3.2 MON Plug-in Module (Monitor)

MON module consists of high-performance built-in processor, FLASH, SRAM, SDRAM, Ethernet controller and other peripherals. Its functions include management of the complete device, human machine interface, communication and waveform recording etc. MON module uses the internal bus to receive the data from other modules of the device. It communicates with the LCD module by RS-485 bus. This module comprises 100BaseT Ethernet interfaces, RS-485 communication interfaces that exchange information with above system by using IEC 61850, PPS/IRIG-B differential time synchronization interface and RS-232 printing interface. Modules with various combinations of memory and interface are available as shown in the table below.

Date: 2011-03-08
6-11
6 Hardware
NR1102A
NR1102B
NR1102C
NR1102D
NR1102H TX
NR1102I TX
NR1101E
ETHERNET
ETHERNET
ETHERNET
ETHERNET
ETHERNET
RX TX RX
ETHERNET
RX TX RX
ETHERNET
Figure 6.3-3 View of MON plug-in module Module ID Memory Interface 2 RJ45 Ethernet 01 RS-485 NR1102A 64M DDR 02 03 04 05 RS-232 06 07 4 RJ45 Ethernet 01 RS-485 NR1102B 64M DDR 02 03 04 05 RS-232 06 07 2 RJ45 Ethernet 01 NR1102C 128M DDR RS-485 02 03 04 SYN+ SYNSGND To synchronization clock Twisted pair wire RTS TXD SGND To SCADA To printer Cable SYN+ SYNSGND To synchronization clock Twisted pair wire RTS TXD SGND To SCADA To printer Cable SYN+ SYNSGND To synchronization clock Twisted pair wire Terminal No. Usage To SCADA Physical Layer
6-12
Date: 2011-03-08
6 Hardware
05 RS-232 06 07 4 RJ45 Ethernet 01 RS-485 NR1102D 128M DDR 02 03 04 05 RS-232 06 07 2 RJ45 Ethernet 2 FO Ethernet 01 RS-485 02 03 04 05 RS-232 06 07 2 RJ45 Ethernet 2 FO Ethernet 01 RS-485 02 03 04 05 RS-232 06 07 2 RJ45 Ethernet 01 RS-485 02 03 04 05 NR1101E 128M DDR RS-485 06 07 08 09 RS-485 10 11 12 RS-232 PCS-902 Line Distance Relay
Date: 2011-03-08
RTS TXD SGND To SCADA SYN+ SYNSGND To synchronization clock Twisted pair wire To printer Cable
RTS TXD SGND To SCADA To SCADA SYN+ SYNSGND To synchronization clock Twisted pair wire Twisted pair wire Optical fibre SC To printer Cable
NR1102H
128M DDR
RTS TXD SGND To SCADA To SCADA SYN+ SYNSGND To synchronization clock Twisted pair wire Twisted pair wire Optical fibre ST To printer Cable
NR1102I
128M DDR
RXD TXD SGND To SCADA A B SGND To SCADA To printer Cable
A B SGND To SCADA Twisted pair wire
SYN+ SYNSGND To synchronization clock
13
RTS
To printer
Cable
6-13
6 Hardware
14 15 16 TXD SGND
The correct connection is shown in Figure 6.3-4. Generally, the shielded cable with two pairs of twisted pairs inside shall be applied. One pair of the twisted pairs are respectively used to connect the + and terminals of difference signal. The other pair of twisted pairs are used to connect the signal ground of the communication interface. The module reserves a free terminal for all the communication ports. The free terminal has no connection with any signal of the device, and it is used to connect the external shields of the cable when connecting multiple devices in series. The external shield of the cable shall be grounded at one of the ends only.
Twisted pair wire
A B 01 02 03 04
COM
6.3.3 AI Plug-in Module (Analog Input)

AI module is applicable for power plant or substation with conventional VT and CT. It is assigned to slot numbers 02 and 03. However, the module is not required if the device is used with ECT/EVT. For AI module, if the plug is not put in the socket, external CT circuit is closed itself. Just shown as below.
To the screen of other coaxial cable with single point earthing
SGND
Twisted pair wire

SYN+ SYNSGND 01
Clock SYN
02 03 04
Cable
RTS TXD SGND 05
PRINT
06 07
Figure 6.3-4 Connection of communication terminal
6-14
Date: 2011-03-08
6 Hardware
Plug
Socket
In
Out
plug is not put in the socket
In
Out
Put the plug in the socket
Figure 6.3-5 Schematic diagram of CT circuit automatically closed
There are two types of AI module with rating 5 A or 1 A. Please declare which kind of AI module is needed before ordering. Maximum linear range of the current converter is 40In. 1. One CT group input without synchronism voltage switchover
For one CT group input, three phase currents (Ia, Ib and Ic) and residula current from parallel line (for mutual compensation) are input to AI module separately. Terminal 01, 03, 05 and 07 are polarity marks. It is assumed that polarity mark of CT installed on line is at line side. Three phase voltages (Ua, Ub, and Uc) for protection calculation and one synchronism are input to AI module. The synchronism voltage could be any phase-to-ground voltage or phase-to-phase voltage. If the auto-reclosing is enabled but synchronism check is not required, the synchronism voltage should be disconnected.

Date: 2011-03-08
6-15
6 Hardware
A B C
P2
S2
P2
S2
P1
S1
P1
S1
02 04 06 08
01 03 05 07
02 04 06 08
01 03 05 07
Figure 6.3-6 Current connection of AI plug-in module
Relevant description about parallel line to refer to Section 3.25 Fault Location.
A B C
13 15 17 19
14 16 18 20
Figure 6.3-7 Voltage connection 1 of AI plug-in module
6-16
Date: 2011-03-08
6 Hardware
A B C
13 15 17 19
14 16 18 20
Figure 6.3-8 Voltage connection 2 of AI plug-in module
Ia
NR1401
01 03 05 07 09 11
Ian Ibn Icn IM0n
02 04 06 08 10 12
Ib Ic IM0
Ua Ub Uc Us
13 15 17 19 21 23
Uan Ubn Ucn Usn
14 16 18 20 22 24
Figure 6.3-9 View of AI plug-in module for one CT group input
Table 6.3-2 lists the terminal number and definition of AI module.

Date: 2011-03-08
6-17
6 Hardware
Table 6.3-2 Terminal definition of AI module Terminal No. 01 02 03 04 05 06 07 08 09 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 Ia Ian Ib Ibn Ic Icn IM0 IM0n Reserve Reserve Reserve Reserve Ua Uan Ub Ubn Uc Ucn Us Usn Reserve Reserve Reserve Reserve GND Ground The voltage of A-phase (Polarity mark) The voltage of A-phase The voltage of B-phase (Polarity mark) The voltage of B-phase The voltage of C-phase (Polarity mark) The voltage of C-phase Synchronism voltage (Polarity mark) Synchronism voltage Definition Definition The current of A-phase (Polarity mark) The current of A-phase The current of B-phase (Polarity mark) The current of B-phase The current of C-phase (Polarity mark) The current of C-phase Residual current of parallel line (Polarity mark) Residual current of parallel line
2.
Two CT groups input with synchronism voltage switchover
For two circuit breakers configuration with two CT groups input, three phase currents corresponding to CB1 and CB2 respectively (Ia1, Ib1, Ic1 and Ia2, Ib2, Ic2) are input to AI module. Terminal 01, 03, 05, 07, 09 and 11 are polarity marks. It is assumed that polarity mark of CT installed on line is at line side. Three phase voltages (Ua, Ub, and Uc) are input to AI module. UB1, UB2 and UL2 are the synchronism voltage from bus VT and line VT used for synchrocheck, it could be any phase-to-ground voltage or phase-to-phase voltage. The device can automatically switch synchronism voltage according to auxiliary contact of CB position or DS position. If the auto-reclosing is enabled but synchronism check is not required, the synchronism voltage should be disconnected.
6-18
Date: 2011-03-08
6 Hardware
P2 P1 P1 P2 A B S2 S1 S1 S2 C
02 04 06 08 10 12
01 03 05 07 09 11

A B C A B C
13 15 17 19 21 23
14 16 18 20 22 24
Figure 6.3-11 Voltage connection of AI plug-in module

Date: 2011-03-08
6-19
6 Hardware
Ia1
NR1401
01 03 05 07 09 11 13 15 17 19 21 23
Ia1n Ib1n Ic1n Ia2n Ib2n Ic2n Uan Ubn Ucn UB1n UL2n UB2n
02 04 06 08 10 12 14 16 18 20 22 24
Ib1 Ic1 Ia2 Ib2 Ic2 Ua Ub Uc UB1 UL2 UB2
Figure 6.3-12 View of AI plug-in module for two CT group input

Table 6.3-3 Terminal definition of AI module Terminal No. 01 02 03 04 05 06 07 08 09 10 11 12 13 14 15 16 17 18 19 20 Definition Ia1 Ia1n Ib1 Ib1n Ic1 Ic1n Ia2 Ia2n Ib2 Ib2n Ic2 Ic2n Ua Uan Ub Ubn Uc Ucn UB1 UB1n Definition The current of A-phase (Polarity mark) The current of A-phase The current of B-phase (Polarity mark) The current of B-phase The current of C-phase (Polarity mark) The current of C-phase The current of A-phase (Polarity mark) The current of A-phase The current of B-phase (Polarity mark) The current of B-phase The current of C-phase (Polarity mark) The current of C-phase The voltage of A-phase (Polarity mark) The voltage of A-phase The voltage of B-phase (Polarity mark) The voltage of B-phase The voltage of C-phase (Polarity mark) The voltage of C-phase The voltage of bus 1 (Polarity mark) The voltage of bus 1
6-20
Date: 2011-03-08
6 Hardware
Terminal No. 21 22 23 24 25 Definition UL2 UL2n UB2 UB2n GND Definition The voltage of line 2 (Polarity mark) The voltage of line 2 The voltage of bus 2 (Polarity mark) The voltage of bus 2 Ground
3.
Two CT groups input without synchronism voltage switchover
For two circuit breakers configuration with two CT groups input, three phase currents corresponding to CB1 and CB2 respectively (Ia1, Ib1, Ic1 and Ia2, Ib2, Ic2), and residula current from parallel line (for mutual compensation) are input to AI module. Terminal 01, 03, 05, 07, 09, 11 and 13 are polarity marks. It is assumed that polarity mark of CT installed on line is at line side. Three phase voltages (Ua, Ub, and Uc) for protection calculation and one synchronism are input to AI module. The synchronism voltage could be any phase-to-ground voltage or phase-to-phase voltage. If the auto-reclosing is enabled but synchronism check is not required, the synchronism voltage should be disconnected.
P2 P1 P1 P2 A B S2 S1 S1 S2 C
02 04 06 08 10 12 To parallel line From parallel line 14
01 03 05 07 09 11
13

Date: 2011-03-08
6-21
6 Hardware
A B C A B C
15 17 19
16 18 20
21
22
23
24
Figure 6.3-14 Voltage connection of AI plug-in module
Ia1
NR1401
01 03 05 07 09 11 13 15 17 19 21 23
Ia1n Ib1n Ic1n Ia2n Ib2n Ic2n IM0n Uan Ubn Ucn Usn
02 04 06 08 10 12 14 16 18 20 22 24
Ib1 Ic1 Ia2 Ib2 Ic2 IM0 Ua Ub Uc Us
Figure 6.3-15 View of AI plug-in module for two CT group input
6-22
Date: 2011-03-08
6 Hardware
Table 6.3-4 Terminal definition of AI module Terminal No. 01 02 03 04 05 06 07 08 09 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 Definition Ia1 Ia1n Ib1 Ib1n Ic1 Ic1n Ia2 Ia2n Ib2 Ib2n Ic2 Ic2n IM0 IM0n Ua Uan Ub Ubn Uc Ucn Us Usn Reserve Reserve GND Ground Definition The current of A-phase (Polarity mark) The current of A-phase The current of B-phase (Polarity mark) The current of B-phase The current of C-phase (Polarity mark) The current of C-phase The current of A-phase (Polarity mark) The current of A-phase The current of B-phase (Polarity mark) The current of B-phase The current of C-phase (Polarity mark) The current of C-phase Residual current of parallel line (Polarity mark) Residual current of parallel line The voltage of A-phase (Polarity mark) The voltage of A-phase The voltage of B-phase (Polarity mark) The voltage of B-phase The voltage of C-phase (Polarity mark) The voltage of C-phase Synchronism voltage (Polarity mark) Synchronism voltage

Date: 2011-03-08
6-23
6 Hardware
6.3.4 DSP Plug-in Module (Logic Process)
NR1161
Figure 6.3-16 View of DSP plug-in module
This device can be equipped with 2 DSP plug-in modules at most and 1 DSP plug-in module at least. The default DSP plug-in module is necessary, which mainly is responsible for protection function including fault detector and protection calculation. The module consists of high-performance double DSP (digital signal processor),16-digit high-accuracy ADC that can perform synchronous sampling and manage other peripherals. One of double DSP is responsible for protection calculation, and can fulfill analog data acquisition, protection logic calculation and tripping output. The other is responsible for fault detector, and can fulfill analog data acquisition, fault detector and providing power supply to output relay. When the module is connected with conventional CT/VT, it can perform the synchronous data acquisition through AI plug-in module. When the module is connected with ECT/EVT, it can receive the real-time synchronous sampled value from merging unit through NET-DSP plug-in module. The other module is optional and it is not required unless control and manual closing with synchronism check are equppied with this device. The default DSP plug-in module is fixed at slot 04 and the option DSP plug-in module is fixed at slot 06.
6-24
Date: 2011-03-08
6 Hardware
6.3.5 NET-DSP Plug-in Module (GOOSE and SV)
NR1136A
NR1136C
RX
Figure 6.3-17 View of NET-DSP plug-in module
This module consists of high-performance DSP (digital signal processor), 2~8 100Mbit/s optical-fibre interface (LC type) and selectable IRIG-B interface (ST type). It supports GOOSE and SV by IEC 61850-9-2 protocols. It can receive and send GOOSE messages to intelligent control device, and receive SV from MU (merging unit). This module supports IEEE1588 network time protocol, E2E and P2P defined in IEEE1588 protocol can be selected. This module supports Ethernet IEEE802.3 time adjustment message format, UDP time adjustment message format and GMRP.

Date: 2011-03-08
6-25
6 Hardware
6.3.6 CH Plug-in Module (Fibre Optical Channel Interface)
NR1213 TX RX
NR1213 TX RX
NR1213 TX RX TX RX
NR1213 TX RX TX RX
NR1214
NR1214
TX1
TX1
RX1
RX1
TX1
RX1
NR1213A
NR1213A-100
NR1213B
NR1213B-100
NR1214A
NR1214B
Figure 6.3-18 View of CH plug-in module Type NR1213A NR1213A-100 NR1213B NR1213B-100 NR1214A NR1214B Wavelength 1310nm 1550nm 1310nm 1550nm 830nm 830nm Application Single-mode, single channel, transmission distance <40 km Single-mode, single channel, transmission distance <100 km Single-mode, dual channels, transmission distance <40 km Single-mode, dual channels, transmission distance <100 km Multi-mode, single channel, transmission distance <2 km Multi-mode, dual channels, transmission distance <2 km
PCS-902 series can exchange information with the device at the remote end through a dedicated optical fibre channel or multiplex channel. The module transmits and receives optical signal using FC/PC or ST optical connector. The parameters are shown as follows:
Type1 Fiber Optic Wavelength Transmission power Receiving sensitivity Transmission distance Optical overload point Single mode, Rec.G652 1310nm -13.03.0 dBm Min.-37 dBm Max.40 km Min.-3 dBm Type2 Single mode, Rec.G652 1550nm -5.0 dBm3.0 dBm Min.-36 dBm Max.100 km Min.-3 dBm Type3 Multi mode, Rec.G652 830nm -12dBm~-20 dBm Min.-30 dBm Max.2 km Min.-8 dBm
6-26
Date: 2011-03-08
6 Hardware
Note!
When using dedicated optical fibre channel, if the transmission distance is longer than 50km, the transmitted power may be enchanced to ensure received power larger than receiving sensitivity. Please notify supplier before ordering and it will be considered as special project using 1550nm laser diode. When using multiplex channel, the sending power of the device is fixed. When using channel multiplexing equipment, the parameters are shown as follows: 1. 2. Channel type: digital optical fibre or digital microwave. Interface standard: 2048kbit/s E1
The devices requirements on the channel are shown as follows: 1. The routine of both direction shall be same to each other, so the time delays of both direction are the same. The maximum one-way channel propagation delay shall be less than 15 ms.
2.
6.3.7 BI Plug-in Module (Binary Input)

There are two kinds of BI modules available, NR1503 and NR1504. Up to 3 BI modules can be equipped with one device. The rated voltage can be selected to be 24V/48V (NR1503D or NR1504D) or 110V/220V/125V/250V (NR1503A or NR1504A). Each BI module is with a 22-pin connector for 11 binary inputs (NR1503) or 18 binary inputs (NR1504). For NR1503, each binary input has independent negative power input of opto-coupler, and can be configurable. The terminal definition of the connector of BI plug-in module is described as below. [BI_n] (n=01, 02,,11 can be configured as a specified binary input by PCS-Explorer software.)

Date: 2011-03-08
6-27
6 Hardware
BI_01 01 02 03 04 05 06 07 08 09 10 11 12 13 14 15 16 17 18 19 20 21 22
NR1503
Opto01BI_02 Opto02BI_03 Opto03BI_04 Opto04BI_05 Opto05BI_06 Opto06BI_07 Opto07BI_08 Opto08BI_09 Opto09BI_10 Opto10BI_11 Opto11-
Figure 6.3-19 View of BI plug-in module (NR1503)
Terminal description for NR 1503 is shown as follows.

Terminal No. 01 02 03 04 05 06 07 08 09 10 11 12 13 14 15 16 17 18 19 20 6-28
Date: 2011-03-08
Symbol BI_01 Opto01BI_02 Opto02BI_03 Opto03BI_04 Opto04BI_05 Opto05BI_06 Opto06BI_07 Opto07BI_08 Opto08BI_09 Opto09BI_10 Opto10Configurable binary input 1
Description
Negative supply of configurable binary input 1 Configurable binary input 2 Negative supply of configurable binary input 2 Configurable binary input 3 Negative supply of configurable binary input 3 Configurable binary input 4 Negative supply of configurable binary input 4 Configurable binary input 5 Negative supply of configurable binary input 5 Configurable binary input 6 Negative supply of configurable binary input 6 Configurable binary input 7 Negative supply of configurable binary input 7 Configurable binary input 8 Negative supply of configurable binary input 8 Configurable binary input 9 Negative supply of configurable binary input 9 Configurable binary input 10 Negative supply of configurable binary input 10
6 Hardware
Terminal No. 21 22 Symbol BI_11 Opto11Configurable binary input 11 Negative supply of configurable binary input 11 Description
For NR1504, all binary inputs share one common negative power input, and can be configurable. The terminal definition of the connector of BI plug-in module is described as below. [BI_n] (n=01, 02,,18 can be configured as a specified binary input by PCS-Explorer software.)
Opto+ 01 02 03 04 05 06 07 08 BI_07 BI_08 BI_09 BI_10 BI_11 BI_12 09 10 11 12 13 14 15 BI_13 BI_14 BI_15 BI_16 BI_17 BI_18 COM16 17 18 19 20 21 22
NR1504
BI_01 BI_02 BI_03 BI_04 BI_05 BI_06
Figure 6.3-20 View of BI plug-in module (NR1504)
Terminal description for NR1504 is shown as follows.

Terminal No. 01 02 03 04 05 06 07 08 09 10 11 12 13 Symbol Opto+ BI_01 BI_02 BI_03 BI_04 BI_05 BI_06 Blank BI_07 BI_08 BI_09 BI_10 BI_11 Description Positive supply of power supply of the module Configurable binary input 1 Configurable binary input 2 Configurable binary input 3 Configurable binary input 4 Configurable binary input 5 Configurable binary input 6 Not used Configurable binary input 7 Configurable binary input 8 Configurable binary input 9 Configurable binary input 10 Configurable binary input 11

Date: 2011-03-08
6-29
6 Hardware
Terminal No. 14 15 16 17 18 19 20 21 22 Symbol BI_12 Blank BI_13 BI_14 BI_15 BI_16 BI_17 BI_18 COMConfigurable binary input 12 Not used Configurable binary input 13 Configurable binary input 14 Configurable binary input 15 Configurable binary input 16 Configurable binary input 17 Configurable binary input 18 Common terminal of negative supply of binary inputs Description
First four binary signals (BI_01, BI_02, BI_03, BI_04) in first BI plug-in module are fixed, they are [BI_TimeSyn], [BI_Print], [BI_Maintenance] and [BI_RstTarg] respectively. 1. Binary input: [BI_TimeSyn]
It is used to receive clock synchronization signal from clock synchronization device, the binary input [BI_TimeSyn] will change from 0 to 1 once pulse signal is received. When the device adopts Conventional mode as clock synchronization mode (refer to Section 7.1 Communication Settings), the device can receives PPM (pulse per minute) and PPS (pulse per second). If the setting [Opt_TimeSyn] is set as other values, this binary input is invalid. 2. Binary input: [BI_Print]
It is used to manually trigger printing latest report when the equipment is configured as manual printing mode by logic setting [En_AutoPrint]=0. The printer button is located on the panel usually. If the equipment is configured as automatic printing mode ([En_AutoPrint]=1), report will be printed automatically as soon as it is formed. 3. Binary input: [BI_Maintenance]
It is used to block communication export when this binary input is energized. During device maintenance or testing, this binary input is then energized not to send reports via communication port, local display and printing still work as usual. This binary input should be de-energized when the device is restored back to normal. The application of the binary input [BI_Maintenance] for digital substation communication adopting IEC61850 protocol is given as follows. 1) a) Processing mechanism for MMS (Manufacturing Message Specification) message The protection device should send the state of this binary input to client.
b) When this binary input is energized, the bit Test of quality (Q) in the sent message changes to 1. c) When this binary input is energized, the client cannot control the isolator link and circuit breaker, modify settings and switch setting group remotely. d) According to the value of the bit Test of quality (Q) in the message sent, the client
6-30
Date: 2011-03-08
6 Hardware
discriminate whether this message is maintenance message, and then deal with it correspondingly. If the message is the maintenance message, the content of the message will not be displayed on real-time message window, audio alarm not issued, but the picture is refreshed so as to ensure that the state of the picture is in step with the actual state. The maintenance message will be stored, and can be inquired, in independent window. 2) Processing mechanism for GOOSE message
a) When this binary input is energized, the bit Test in the GOOSE message sent by the protection device changes to 1. b) For the receiving end of GOOSE message, it will compare the value of the bit Test in the GOOSE message received by it with the state of its own binary input (i..e [BI_Maintenance]), the message will be thought as invalid unless they are conformable. 3) Processing mechanism for SV (Sampling Value) message
a) When this binary input of merging unit is energized, the bit Test of quality (Q) of sampling data in the SV message sent change 1. b) For the receiving end of SV message, if the value of bit Test of quality (Q) of sampling data in the SV message received is 1, the relevant protection functions will be disabled, but under maintenance state, the protection device should calculate and display the magnitude of sampling data. c) For duplicated protection function configurations, all merging units of control module configured to receive sampling should be also duplicated. Both dual protection devices and dual merging units should be fully independent each other, and one of them is in maintenance state will not affect the normal operation of the other. 4. Binary input: [BI_RstTarg]
It is used to reset latching signal relay and LCD displaying. The reset is done by pressing a button on the panel.
Note!
The rated voltage of binary input is optional: 24V, 48V, 110V, 125V, 220V or 250V, which must be specified when placed order. It is necessary to check whether the rated voltage of BI module complies with site DC supply rating before put the relay in service.
Note!
There three binary signals are fixed for measurement functions, they are [BI_Rmt/Loc], [BI_ManSynCls] and [BI_ManOpen] respectively. 5. Binary input: [BI_Rmt/Loc]

Date: 2011-03-08
6-31
6 Hardware
It is used to select the remote control or the local control. 1: the remote control, all the binary outputs can only be remotely controlled by SCADA or control centers. 0 the local control, each binary output can only be applied to open/close CB/DS/ES locally. Each binary output can also be applied issue a signal locally. 6. Binary input: [BI_ManSynCls]
When the device is under local control condition (i.e. [BI_Rmt/Loc] is de-energized), the manual synchronism check for closing circuit breaker will be initiated if it is energized. 7. Binary input: [BI_ManOpen]
When the device is under local control condition (i.e. [BI_Rmt/Loc] is de-energized), the manual control for open circuit breaker will be initiated if it is energized.
6.3.8 BO Plug-in Module (Binary Output)

NR1521A, NR1521C and NR1521G modules are three standard binary output modules. The contacts provided by NR1521A, NR1521C and NR1521G are all normally open (NO) contacts. Output contact can be configured as a specified tripping output contact and a signal output contact respectively by PCS-Explorer software according to user requirement. NR1521A can provide 11 output contacts controlled by fault detector.
01 02 03 04 05 06 07 08 09 10 11 12 13 14 15 16 17 18 19 20 21 22
BO_01
NR1521A
BO_02
BO_03
BO_04
BO_05
BO_06
BO_07
BO_08
BO_09
BO_10
BO_11
Figure 6.3-21 View of BO plug-in module (NR1521A)
NR1521C can provide 11 output contacts without controlled by fault detector.

6-32
Date: 2011-03-08
6 Hardware
01 02 03 04 05 06 07 08 09 10 11 12 13 14 15 16 17 18 19 20 21 22
BO_01
NR1521C
BO_02
BO_03
BO_04
BO_05
BO_06
BO_07
BO_08
BO_09
BO_10
BO_11
Figure 6.3-22 View of BO plug-in module (NR1521C)
BO plug-in module (NR1521F) is dedicatedly for remote/manual open or closing to circuit breaker, disconnector and earth switch. 5 pairs of binary outputs (one for open and the other for closing) can be provided by this BO plug-in module configured in slot 15 if measurement and control function is equipped with the device. Up to 10 pairs of binary outputs can be provided by two BO plug-in modules that can be configured in slot 14 and 15 respectively. (BO plug-in module configured in slot 14 is optional if open or closing contacts is not enough) A normally open contact is presented via terminal 21-22 designated as ROS (i.e. remote operation signal). Whenever any of binary output contacts for open or closing is closed, ROS contact will close to issue a signal indicating that this device is undergoing a remote operation. BO plug-in module (NR1521F) is displayed as shown in the following figure.

Date: 2011-03-08
6-33
6 Hardware
01 02 03 04 05 06 07 08 09 10 11 12 13 14 15 16 17 18 19 20 21 22
BO_CtrlOpn01
NR1521F
BO_CtrlOpn01
BO_CtrlOpn02
BO_CtrlOpn02
BO_CtrlOpn03
BO_CtrlOpn03
BO_CtrlOpn04
BO_CtrlOpn04
BO_CtrlOpn05
BO_CtrlOpn05
BO_Ctrl
Figure 6.3-23 View of BO plug-in module (NR1521F)
NR1521G can provide 11 output contacts without controlled by fault detector. The first four output contacts are in parallel with instantaneous operating contacts which are recommended to be configured as fast signaling contacts to send PLC signal.
6-34
Date: 2011-03-08
6 Hardware
01 02 03 04 05 06 07 08 09 10 11 12 13 14 15 16 17 18 19 20 21 22
NR1521G
BO_01
BO_02
BO_03
BO_04
BO_05
BO_06
BO_07
BO_08
BO_09
BO_10
BO_11
Figure 6.3-24 View of BO plug-in module (NR1521G)
6.3.9 HMI Module

The display panel consists of liquid crystal display module, keyboard, LED and ARM processor. The functions of ARM processor include display control of the liquid crystal display module, keyboard processing, and exchanging data with the CPU through LAN port etc. The liquid crystal display module is a high-performance grand liquid crystal panel with soft back lighting, which has a user-friendly interface and an extensive display range.

Date: 2011-03-08
6-35
6 Hardware
6-36
Date: 2011-03-08
7 Settings
7 Settings Table of Contents

7 Settings ............................................................................................. 7-a
7.1 Communication Settings ................................................................................ 7-1
7.1.1 Setting Description ............................................................................................................. 7-2 7.1.2 Access Path ....................................................................................................................... 7-5
7.2 System Settings .............................................................................................. 7-5

7.3 Device Settings ............................................................................................... 7-6

7.4 Protection Settings ......................................................................................... 7-7

7.4.1 Setting Description ............................................................................................................. 7-7 7.4.2 Access Path ..................................................................................................................... 7-28
7.5 Logic Link Settings ....................................................................................... 7-28

7.5.1 GOOSE Link Settings ...................................................................................................... 7-28 7.5.2 Spare Link Settings .......................................................................................................... 7-28 7.5.3 Access Path ..................................................................................................................... 7-29
7.6 Measurement and Control Settings ............................................................. 7-29

7.6.1 Synchronism Settings ...................................................................................................... 7-29 7.6.2 Dual Position Binary Input Settings .................................................................................. 7-29 7.6.3 Control Settings ............................................................................................................... 7-30 7.6.4 Interlock Settings ............................................................................................................. 7-30
List of Tables
Table 7.1-1 Communication settings........................................................................................7-1 Table 7.2-1 System settings ......................................................................................................7-5
Date: 2012-08-14
7-a
7 Settings
Table 7.3-1 Device settings .......................................................................................................7-6
7-b
Date: 2012-08-14
7 Settings
The device has some setting groups for protection to coordinate with the mode of power system operation, one of which is assigned to be active. However, equipment parameters are common for all protection setting groups. Note! All current settings in this chapter are secondary current converted from primary current by CT ratio. Zero-sequence current or voltage setting is configured according to 3I0 or 3U0 and negative sequence current setting according to I2 or U2.
7.1 Communication Settings

Table 7.1-1 Communication settings No. 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 IP_LAN1 Mask_LAN1 IP_LAN2 Mask_LAN2 En_LAN2 IP_LAN3 Mask_LAN3 En_LAN3 IP_LAN4 Mask_LAN4 En_LAN4 Gateway En_Broadcast Addr_RS485A Baud_RS485A Protocol_RS485A Addr_RS485B Baud_RS485B Protocol_RS485B Threshold_Measmt Period_Measmt Format_Measmt Baud_Printer En_AutoPrint Item Range 000.000.000.000~255.255.255.255 000.000.000.000~255.255.255.255 000.000.000.000~255.255.255.255 000.000.000.000~255.255.255.255 0 or 1 000.000.000.000~255.255.255.255 000.000.000.000~255.255.255.255 0 or 1 000.000.000.000~255.255.255.255 000.000.000.000~255.255.255.255 0 or 1 000.000.000.000~255.255.255.255 0 or 1 0~255 4800,9600,19200,38400,57600,115200 (bps) 0, 1 or 2 0~255 4800,9600,19200,38400,57600,115200 (bps) 0, 1 or 2 0~100% 0~65535s 0, 1 4800,9600,19200,38400,57600,115200 (bps) 0 or 1 Conventional 25 Opt_TimeSyn SAS Advanced NoTImeSyn PCS-902 Line Distance Relay
Date: 2012-08-14
7-1
7 Settings
No. 26 27 28 Item IP_Server_SNTP OffsetHour_UTC OffsetMinute_UTC Range 000.000.000.000~255.255.255.255 -12~+12 (hrs) 0~60 (min)
7.1.1 Setting Description

1.
IP_LAN1, IP_LAN2, IP_LAN3, IP_LAN4
IP address of Ethernet port 1, Ethernet port 2, Ethernet port 3 and Ethernet port 4 2.
Mask_LAN1, Mask_LAN2, Mask_LAN3, Mask_LAN4
Subnet mask of Ethernet port 1, Ethernet port 2, Ethernet port 3 and Ethernet port 4 3.
En_LAN2, En_LAN3, En_LAN4
Put Ethernet port 2, Ethernet port 3 and Ethernet port 4 in service They are used for Ethernet communication based on the IEC 60870-5-103 protocol. When the IEC 61850 protocol is applied, the IP address of Ethernet A will be GOOSE source MAC address. Ethernet port 1 is always in service by default.
4.
Gateway
IP address of Gateway (router)
5.
En_Broadcast
This setting is only used only for IEC 60870-5-103 protocol. If NR network IEC 60870-5-103 protocol is used, the setting must be set as 1. 0: the device does not send UDP messages through network 1: the device sends UDP messages through network 6.
Addr_RS485A, Addr_RS485B
They are the devices communication address used to communicate with the SCADA or RTU via serial ports (port A and port B). 7.
Baud_RS485A, Baud_RS485B
Baud rate of rear RS-485 serial port A or B 8.
Protocol_RS485A, Protocol_RS485B
Communication protocol of rear RS-485 serial port A or B 0: IEC 60870-5-103 protocol 1: Modbus Protocol 2: Reserved
7-2
Date: 2012-08-14
7 Settings
Note! Above table listed all the communication settings, the device delivered to the user maybe only show some settings of them according to the communication interface configuration. If only the Ethernet ports are applied, the settings about the serial ports (port A and port B) are not listed in this submenu. And the settings about the Ethernet ports only listed in this submenu according to the actual number of Ethernet ports. The standard arrangement of the Ethernet port is two, at most four (predetermined when ordering). Set the IP address according to actual arrangement of Ethernet numbers and the un-useful port/ports need not be configured. If PCS-Explorer configuration tool auxiliary software is connected with this device through the Ethernet, the IP address of the PCS-Explorer must be set as one of the available IP address of this device.
9.
Threshold_Measmt
Threshold value of sending measurement values to SCADA through IEC 60870-5-103 or IEC61850 protocol. Default value: 1%
10. Period_Measmt
The time period for equipment sends measurement data to SCADA through IEC 60870-5-103 protocol. Default value: 60
11. Format_Measmt
The setting is used to select the format of measurement data sent to SCADA through IEC 60870-5-103 protocol. 0: GDD data type through IEC103 protocol is 12 1: GDD data type through IEC103 protocol is 7, i.e. 754 short real number of IEEE standard 12. Baud_Printer Baud rate of printer port 13. En_AutoPrint If automatic print is required for fault report after protection operating, it is set as 1. Otherwise, it should be set to 0. 14. Opt_TimeSyn There are four selections for clock synchronization of device, shown as follows. Conventional
PPS (RS-485): Pulse per second (PPS) via RS-485 differential level

Date: 2012-08-14
7-3
7 Settings
IRIG-B (RS-485): IRIG-B via RS-485 differential level PPM (DIN): Pulse per minute (PPM) via the binary input [BI_TimeSyn] PPS (DIN): Pulse per second (PPS) via the binary input [BI_TimeSyn] SAS
SNTP (PTP): Unicast (point-to-point) SNTP mode via Ethernet network SNTP (BC): Broadcast SNTP mode via Ethernet network Message (IEC103): Clock messages through IEC103 protocol Advanced
IEEE1588: Clock message via IEEE1588 IRIG-B (Fiber): IRIG-B via optical-fibre interface PPS (Fiber) PPS: Pulse per second (PPS) via optical-fibre interface NoTimeSync
When no time synchronization signal is connected to the device, please select this option and the alarm message [Alm_TimeSync] will not be issued anymore. Conventional mode and SAS mode are always be supported by the device, but Advanced mode is only supported when NET-DSP module is equipped. The alarm signal [Alm_TimeSyn] may be issued to remind user loss of time synchronization signals. 1) When SAS is selected, if there is no conventional clock synchronization signal, the device will not send the alarm signal [Alm_TimeSyn]. When Conventional mode is selected, if there is no conventional clock synchronization signal, SAS mode will be enabled automatically with the alarm signal [Alm_TimeSyn] issued simultaneously. When Advanced mode is selected, if there is no conventional clock synchronization signal connected to NET-DSP module, SAS mode is enabled automatically with the alarm signal [Alm_TimeSyn] issued simultaneously. When NoTimeSyn mode is selected, the device will not send alarm signals without time synchronization signal. But the device can be still synchronized if receiving time synchronization signal. Note! The clock message via IEC 60870-5-103 protocol is invalid when the device receives the IRIG-B signal through RCS-485 port. 15. IP_Server_SNTP It is the address of the SNTP time synchronization server which sends SNTP timing messages to the relay or BCU.
2)
3)
7-4
Date: 2012-08-14
7 Settings
16. OffsetHour_UTC, OffsetMinute_UTC If the IEC61850 protocol is adopted in substations, the time tags of communication messages are required according to UTC (Universal Time Coordinated) time. The setting [OffsetHour_UTC] is used to set the hour offset of the current time zone to the GMT (Greenwich Mean Time) zone; for example, if a relay is applied in China, the time zone of China is east 8th time zone, so this setting is set as 8. The setting [OffsetMinute_UTC] is used to set the minute offset of the current time zone to the GMT zone.
Time zone Setting Time zone Setting Time zone Setting Time zone Setting GMT zone 0 East 6 6 East/West 12 12/-12 West 6 -6
th th th
East 1st 1 East 7 7 West 1 -1 West 7 -7

th st th
East 2nd 2 East 8 8 West 2 -2 West 8 -8

th nd th
East 3rd 3 East 9 9 West 3 -3 West 9 -9

th rd th
East 4th 4 East 10 10 West 4 -4 West 10 -10

th th th
East 5th 5 East 11th 11 West 5th -5 West 11th -11
7.1.2 Access Path

MainMenuSettingsDevice SetupComm Settings
7.2 System Settings

Table 7.2-1 System settings No. 1 2 3 4 5 6 7 Active_Grp Opt_SysFreq PrimaryEquip_Name U1n U2n I1n I2n Item 1~10 50 or 60 Maximum 12 character 33~65500 80~220 100~65500 1 or 5 kV V A A Hz Range Unit

1. Active_Grp
The number of active setting group, 10 setting groups can be configured for protection settings, and only one is active at a time. 2. PrimaryEquip_Name
It is recognized by the device automatically. Such setting is used for printing messages. 3. Opt_SysFreq
It is option of system frequency, and can be set as 50Hz or 60Hz.

Date: 2012-08-14
7-5
7 Settings
4.
Un1
Primary rated voltage of VT; 5. Un2
Secondary rated voltage of VT; 6. In1
Primary rated current of CT; 7. In2
Secondary rated current of CT;
7.2.2 Access Path

MainMenuSettingsSystem Settings
7.3 Device Settings

Table 7.3-1 Device settings No. 1 2 3 Item HDR_EncodeMode Opt_Caption_103 Bxx.Un_BinaryInput GB18030, UTF-8 0, 1 or 2 24V, 30V, 48V, 110V, 125V, 220V Range

1. HDR_EncodeMode
Select encoding format of header (HDR) file COMTRADE recording file Default value is UTF-8. 2. Opt_Caption_103
Select the caption language sent to SAS via IEC103 protocol 0: Current language 1: Fixed Chinese 2: Fixed English Default value of [Opt_Caption_103] is 0 (i.e. current language), and please set it to 1 (i.e. Fixed Chinese) if the SAS is supplied by China Manufacturer. 3. Bxx.Un_BinaryInput
This setting is used to set voltage level of binary input module. If low-voltage BI module is equipped, 24V, 30V or 48V can be set according to the actual requirement, and if high-voltage BI module is equipped, 110V, 125V or 220V can be set according to the actual requirement.
7-6
Date: 2012-08-14
7 Settings
Bxx: this plug-in module is inserted in slot xx.
7.3.2 Access Path

MainMenuSettingsDevice SetupDevice Settings
7.4 Protection Settings

All settings of protection are based on secondary ratings of VT and CT. For the specific project, some settings relevant to synchrocheck module, auto-reclosing module and breaker failure protection module maybe with the suffix of _CB1 and _CB2 what represent the settings correspond to synchrocheck module, auto-reclosing module and breaker failure protection module for circuit breaker 1 and circuit breaker 2 respectively. Unn: rated secondary phase-to-phase voltage. Un: rated secondary phase-to-ground voltage. In: rated secondary current.

7.4.1.1 Line Parameters
No. 1 2 3 4 5 6 7 8 9 10 X1L R1L X0L R0L X0M R0M LineLength phi1_Reach phi0_Reach Real_K0 Item Remark Positive sequence reactance of the line Positive sequence resistance of the line Zero-sequence reactance of the line Zero-sequence resistance of the line Line mutual zero-sequence reactance Line mutual zero-sequence resistance Total length of the line Phase angle of line positive sequence impedance Phase angle of line zero-sequence impedance Resistive component of zero-sequence Range (0.000~4Unn)/In (ohm) (0.000~4Unn)/In (ohm) (0.000~4Unn)/In (ohm) (0.000~4Unn)/In (ohm) (0.000~4Unn)/In (ohm) (0.000~4Unn)/In (ohm) 0.00~655.35 (km) 30.00~89.00 (Deg) 30.00~89.00 (Deg) -4.000~4.000
compensation coefficient Imaginary component of zero-sequence
11
Imag_K0
compensation coefficient
-4.000~4.000
7.4.1.2 Fault Detector Settings (FD)

No. 1 2 Item FD.DPFC.I_Set FD.ROC.3I0_Set Remark Current setting of DPFC current FD element Current setting of neutral current FD element Range (0.050~30.000)In (A) (0.050~30.000)In (A)

Date: 2012-08-14
7-7
7 Settings
7.4.1.3 Auxiliary Element (Aux.E)

No. 1 2 3 Item AuxE.OCD.t_Ext AuxE.OCD.En AuxE.ROC1.3I0_Set Remark Extended time delay of current change auxiliary element Enabling/disabling current change auxiliary element Current setting of stage 1 residual current auxiliary element Enabling/disabling stage 1 residual current auxiliary element Current setting of stage 2 residual current element Enabling/disabling stage 2 residual current auxiliary element Current setting of stage 3 residual current auxiliary element Enabling/disabling stage 3 residual current auxiliary element Current setting of stage 1 phase current auxiliary element Enabling/disabling stage 1 phase current auxiliary element Current setting of stage 2 phase current auxiliary element Enabling/disabling stage 2 phase current auxiliary element Current setting of stage 3 phase current auxiliary element Enabling/disabling stage 3 phase current auxiliary element Voltage setting for voltage change auxiliary element Extended time delay of voltage change auxiliary element Enabling/disabling voltage change auxiliary element Voltage setting for phase-to-ground under voltage auxiliary element Enabling/disabling phase-to-ground under voltage auxiliary element Voltage setting for phase-to-phase under voltage auxiliary element Enabling/disabling phase-to-phase under voltage auxiliary element Voltage setting for residual voltage auxiliary element Enabling/disabling residual voltage auxiliary element auxiliary Range 0.000~10.000 (s) 0 or 1 (0.050~30.000)In
AuxE.ROC1.En
0 or 1
AuxE.ROC2.3I0_Set
(0.050~30.000)In
AuxE.ROC2.En
0 or 1
AuxE.ROC3.3I0_Set
(0.050~30.000)In
AuxE.ROC3.En
0 or 1
AuxE.OC1.I_Set
(0.050~30.000)In
10
AuxE.OC1.En
0 or 1
11
AuxE.OC2.I_Set
(0.050~30.000)In
12
AuxE.OC2.En
0 or 1
13
AuxE.OC3.I_Set
(0.050~30.000)In
14 15 16 17 18
AuxE.OC3.En AuxE.UVD.U_Set AuxE.UVD.t_Ext AuxE.UVD.En AuxE.UVG.U_Set
0 or 1 0~Un 0.000~10.000 (s) 0 or 1 0~Un
19
AuxE.UVG.En
0 or 1
20
AuxE.UVS.U_Set
0~Unn
21 22 23 7-8
AuxE.UVS.En AuxE.ROV.3U0_Set AuxE.ROV.En
0 or 1 0~Un 0 or 1

Date: 2012-08-14
7 Settings
7.4.1.4 DPFC Distance Protection Settings (21D)

No. 1 2 Item 21D.Z_DPFC 21D.En_DPFC Remark Impedance setting of DPFC distance protection Enable DPFC distance protection Range (0.000~4Unn)/In (ohm) 0 or 1
7.4.1.5 Load Encroachment Settings (LoadEnch)

No. Item Remark Angle setting of load trapezoid characteristic, it should 1 LoadEnch.phi_Blinder be set according to the maximum load area angle 0~45 (Deg) (Load_Max), Load_Max+5is recommended. Resistance setting of load trapezoid characteristic, it 2 LoadEnch.R_Blinder should be set according to the minimum load resistance, 70%~90% minimum load resistance is recommended. 3 LoadEnch.En Enable load trapezoid characteristic 0 or 1 (0.05~200)/In (ohm) Range
7.4.1.6 Distance Protection Settings with Mho Characteristic (21M)

No. 1 Item 21M.ZG.phi_Shift Remark Phase shift of zone 1, 2 of phase-to-ground distance protection Phase shift of zone 1, 2 of phase-to-phase distance protection Impedance setting of zone 1 of phase-to-ground distance protection Time delay of zone 1 of phase-to-ground distance protection Range 0, 15 or 30 (Deg)
21M.ZP.phi_Shift
0, 15 or 30 (Deg)
21M.ZG1.Z_Set
(0.000~4Unn)/In (ohm)
4 5 6
21M.ZG1.t_Op 21M.ZG1.En 21M.ZG1.En_BlkAR
0.000~10.000 (s)
Enable zone 1 of phase-to-ground distance protection 0 or 1 Enable phase-to-ground zone 1 of distance protection operation to block AR Impedance setting of zone 1 of phase-to-phase distance protection Time delay of zone 1 of phase-to-phase distance protection 0 or 1
21M.ZP1.Z_Set
(0.000~4Unn)/In (ohm)
8 9 10
21M.ZP1.t_Op 21M.ZP1.En 21M.ZP1.En_BlkAR
0.000~10.000 (s)
Enable zone 1 of phase-to-phase distance protection 0 or 1 Enable phase-to-phase zone 1 of distance protection operation to block AR Impedance setting of zone 2 of phase-to-ground distance protection Time delay of zone 2 of phase-to-ground distance protection Short time delay of zone 2 of phase-to-ground distance protection 0 or 1
11
21M.ZG2.Z_Set
(0.000~4Unn)/In (ohm)
12
21M.ZG2.t_Op
0.000~10.000 (s)
13
21M.ZG2.t_ShortDly
0.000~10.000 (s)

Date: 2012-08-14
7-9
7 Settings
14 15 21M.ZG2.En 21M.ZG2.En_BlkAR Enable zone 2 of phase-to-ground distance protection 0 or 1 Enable phase-to-ground zone 2 of distance protection operation to block AR Impedance setting of zone 2 of phase-to-phase distance protection Time delay of zone 2 of phase-to-phase distance protection Short time delay of zone 2 of phase-to-phase distance protection 0 or 1
16
21M.ZP2.Z_Set
(0.000~4Unn)/In (ohm)
17
21M.ZP2.t_Op
0.000~10.000 (s)
18 19 20 21 22
21M.ZP2.t_ShortDly 21M.ZP2.En 21M.ZP2.En_BlkAR 21M.Z2.En_ShortDly 21M.ZG3.Z_Set
0.000~10.000 (s)
Enable zone 2 of phase-to-phase distance protection 0 or 1 Enable phase-to-phase zone 2 of distance protection operation to block AR 0 or 1
Enable fixed accelerate zone 2 of distance protection 0 or 1 Impedance setting of zone 3 of phase-to-ground distance protection Time delay of zone 3 of phase-to-ground distance protection Short time delay of zone 3 of phase-to-ground distance protection (0.000~4Unn)/In (ohm)
23
21M.ZG3.t_Op
0.000~10.000 (s)
24 25 26
21M.ZG3.t_ShortDly 21M.ZG3.En 21M.ZG3.En_BlkAR
0.000~10.000 (s)
Enable zone 3 of phase-to-ground distance protection 0 or 1 Enable phase-to-ground zone 3 of distance protection operation to block AR Impedance setting of zone 3 of phase-to-phase distance protection Time delay of zone 3 of phase-to-phase distance protection Short time delay of zone 3 of phase-to-phase distance protection 0 or 1
27
21M.ZP3.Z_Set
(0.000~4Unn)/In (ohm)
28
21M.ZP3.t_Op
0.000~10.000 (s)
29 30 31 32 33
21M.ZP3.t_ShortDly 21M.ZP3.En 21M.ZP3.En_BlkAR 21M.Z3.En_ShortDly 21M.Z4.Z_Fwd
0.000~10.000 (s)
Enable fixed accelerate zone 3 of distance protection 0 or 1 Impedance setting of zone 4 of pilot positive distance protection Impedance setting of zone 4 of pilot reversal distance protection Time delay of zone 4 of distance protection Enable zone 4 of phase-to-ground distance element Enable phase-to-ground zone 4 of distance protection operation to block AR (0.000~4Unn)/In (ohm)
34 35 36 37 38 39
21M.Z4.Z_Rev 21M.Z4.t_Op 21M.ZG4.En 21M.ZG4.En_BlkAR 21M.ZP4.En 21M.ZP4.En_BlkAR
(0.000~4Unn)/In (ohm) 0.000~10.000 (s) 0 or 1 0 or 1
7-10
Date: 2012-08-14
7 Settings
40 21M.ZG5.Z_Set Impedance setting of zone 5 of phase-to-ground distance protection Time delay of zone 5 of phase-to-ground distance protection (0.000~4Unn)/In (ohm)
41 42 43
21M.ZG5.t_Op 21M.ZG5.En 21M.ZG5.En_BlkAR
0.000~10.000 (s)
Enabe zone 5 of phase-to-ground distance protection 0 or 1 Enable phase-to-ground zone 5 of distance protection operation to block AR Impedance setting of zone 5 of phase-to-phase distance protection Time delay of zone 5 of phase-to-phase distance protection 0 or 1
44
21M.ZP5.Z_Set
(0.000~4Unn)/In (ohm)
45 46 47 48
21M.ZP5.t_Op 21M.ZP5.En 21M.ZP5.En_BlkAR 21M.Z5.Opt_Dir
0.000~10.000 (s)
Enable zone 5 of phase-to-phase distance protection 0 or 1 Enable phase-to-phase zone 5 of distance protection operation to block AR Direction option for zone 5 of distance protection 0 or 1 0 or 1
7.4.1.7 Distance Protection Settings with Quad Characteristic (21Q)

No. 1 Item 21Q.ZG1.Z_Set Remark Impedance setting of zone 1 of phase-to-ground distance protection Resistance setting of zone 1 of phase-to-ground distance protection Time delay of zone 1 of phase-to-ground distance protection Range (0.000~4Unn)/In (ohm)
21Q.ZG1.R_Set
(0.000~4Unn)/In (ohm)
3 4 5
21Q.ZG1.t_Op 21Q.ZG1.En 21Q.ZG1.En_BlkAR
0.000~10.000 (s)
Enable zone 1 of phase-to-ground distance protection 0 or 1 Enable phase-to-ground zone 1 of distance protection operation to block AR Impedance setting of zone 1 of phase-to-phase distance protection Resistance setting of zone 1 of phase-to-phase distance protection Time delay of zone 1 of phase-to-phase distance protection 0 or 1
21Q.ZP1.Z_Set
(0.000~4Unn)/In (ohm)
21Q.ZP1.R_Set
(0.000~4Unn)/In (ohm)
8 9 10
21Q.ZP1.t_Op 21Q.ZP1.En 21Q.ZP1.En_BlkAR
0.000~10.000 (s)
Enable zone 1 of phase-to-phase distance protection 0 or 1 Enable phase-to-phase zone 1 of distance protection operation to block AR Impedance setting of zone 2 of phase-to-ground distance protection Resistance setting of zone 2 of phase-to-ground distance protection Time delay of zone 2 of phase-to-ground distance protection 0 or 1
11
21Q.ZG2.Z_Set
(0.000~4Unn)/In (ohm)
12
21Q.ZG2.R_Set
(0.000~4Unn)/In (ohm)
13
21Q.ZG2.t_Op
0.000~10.000 (s)

Date: 2012-08-14
7-11
7 Settings
14 15 16 21Q.ZG2.t_ShortDly 21Q.ZG2.En 21Q.ZG2.En_BlkAR Short time delay of zone 2 of phase-to-ground distance protection 0.000~10.000 (s)
Enable zone 2 of phase-to-ground distance protection 0 or 1 Enable phase-to-ground zone 2 of distance protection operation to block AR Impedance setting of zone 2 of phase-to-phase distance protection Resistance setting of zone 2 of phase-to-phase distance protection Time delay of zone 2 of phase-to-phase distance protection Short time delay of zone 2 of phase-to-phase distance protection 0 or 1
17
21Q.ZP2.Z_Set
(0.000~4Unn)/In (ohm)
18
21Q.ZP2.R_Set
(0.000~4Unn)/In (ohm)
19
21Q.ZP2.t_Op
0.000~10.000 (s)
20 21 22 23 24
21Q.ZP2.t_ShortDly 21Q.ZP2.En 21Q.ZP2.En_BlkAR 21Q.Z2.En_ShortDly 21Q.ZG3.Z_Set
0.000~10.000 (s)
Enable fixed accelerate zone 2 of distance protection 0 or 1 Impedance setting of zone 3 of phase-to-ground distance protection Resistance setting of zone 3 of phase-to-ground distance protection Time delay of zone 3 of phase-to-ground distance protection Short time delay of zone 3 of phase-to-ground distance protection (0.000~4Unn)/In (ohm)
25
21Q.ZG3.R_Set
(0.000~4Unn)/In (ohm)
26
21Q.ZG3.t_Op
0.000~10.000 (s)
27 28 29
21Q.ZG3.t_ShortDly 21Q.ZG3.En 21Q.ZG3.En_BlkAR
0.000~10.000 (s)
Enable zone 3 of phase-to-ground distance protection 0 or 1 Enable phase-to-ground zone 3 of distance protection operation to block AR Impedance setting of zone 3 of phase-to-phase distance element Resistance setting of zone 3 of phase-to-phase distance protection Time delay of zone 3 of phase-to-phase distance protection Short time delay of zone 3 of phase-to-phase distance protection 0 or 1
30
21Q.ZP3.Z_Set
(0.000~4Unn)/In (ohm)
31
21Q.ZP3.R_Set
(0.000~4Unn)/In (ohm)
32
21Q.ZP3.t_Op
0.000~10.000 (s)
33 34 35 36 37
21Q.ZP3.t_ShortDly 21Q.ZP3.En 21Q.ZP3.En_BlkAR 21Q.Z3.En_ShortDly 21Q.ZG4.Z_Set
0.000~10.000 (s)
Enable fixed accelerate zone 3 of distance protection 0 or 1 Impedance setting of zone 4 of phase-to-ground distance protection (0.000~4Unn)/In (ohm)
7-12
Date: 2012-08-14
7 Settings
38 21Q.ZG4.R_Set Resistance setting of zone 4 of phase-to-ground distance protection Time delay of zone 4 of phase-to-ground distance protection (0.000~4Unn)/In (ohm)
39 40 41
0.000~10.000 (s)
42
21Q.ZP4.Z_Set
(0.000~4Unn)/In (ohm)
43
21Q.ZP4.R_Set
(0.000~4Unn)/In (ohm)
44 45 46
21Q.ZP4.t_Op 21Q.ZP4.En 21Q.ZP4.En_BlkAR
0.000~10.000 (s)
Enable zone 4 of phase-to-phase distance protection 0 or 1 Enable phase-to-phase zone 4 of distance protection operation to block AR Impedance setting of zone 5 of phase-to-ground distance protection Resistance setting of zone 5 of phase-to-ground distance protection Time delay of zone 5 of phase-to-ground distance protection 0 or 1
47
21Q.ZG5.Z_Set
(0.000~4Unn)/In (ohm)
48
21Q.ZG5.R_Set
(0.000~4Unn)/In (ohm)
49 50 51
0.000~10.000 (s)
52
21Q.ZP5.Z_Set
(0.000~4Unn)/In (ohm)
53
21Q.ZP5.R_Set
(0.000~4Unn)/In (ohm)
54 55 56 57
21Q.ZP5.t_Op 21Q.ZP5.En 21Q.ZP5.En_BlkAR 21Q.Z5.Opt_Dir
0.000~10.000 (s)
Enable zone 5 of phase-to-phase distance protection 0 or 1 Enabling/disabling phase-to-phase zone 5 of distance protection operation to block AR Direction option for zone 5 of distance protection 0 or 1 0 or 1
7.4.1.8 Pilot Distance Zone Settings

No. 1 2 3 4 5 Item 21M.Pilot.Z_Set 21Q.Pilot.Z_Set 21M.Pilot.Z_Rev 21Q.Pilot.Z_Rev 21Q.Pilot.R_Set Remark Impedance setting of pilot distance element Impedance setting of pilot distance element Impedance setting of pilot reversal distance element Impedance setting of pilot reversal distance element Resistance setting of pilot distance element Range (0.000~4Unn)/In (ohm) (0.000~4Unn)/In (ohm) (0.000~4Unn)/In (ohm) (0.000~4Unn)/In (ohm) (0.000~4Unn)/In (ohm) 7-13
Date: 2012-08-14
7 Settings
6 21Q.Pilot.R_Rev Resistance setting of pilot reversal distance element (0.000~4Unn)/In (ohm)
7.4.1.9 Power Swing Detection Settings (68)

No. 1 68.En Item Remark Enable power swing detection 0 or 1 Range
7.4.1.10 Power Swing Blocking Releasing Settings (PSBR)

No. 1 2 Item 21M.I_PSBR 21Q.I_PSBR Remark Current setting of PSBR (Mho Characteristic) Current setting for power swing blocking (Quad Characteristic) Enable PSBR for zone 1 of distance element (Mho Characteristic) Enable PSBR for zone 1 of distance element (Quad Characteristic) Enable PSBR for zone 2 of distance element (Mho Characteristic) Enable PSBR for zone 2 of distance element (Quad Characteristic) Enable PSBR for zone 3 of distance element (Mho Characteristic) Enable PSBR for zone 3 of distance element (Quad Characteristic) Enable PSBR for zone 4 of distance element (Mho Characteristic) Enable PSBR for zone 4 of distance element (Quad Characteristic) Enable PSBR for pilot distance element (Mho Characteristic) Enable PSBR for pilot distance element (Quad Characteristic) Range (0.050~30.000)In (A) (0.050~30.000)In (A)
21M.Z1.En_PSBR
0 or 1
21Q.Z1.En_PSBR
0 or 1
21M.Z2.En_PSBR
0 or 1
21Q.Z2.En_PSBR
0 or 1
21M.Z3.En_PSBR
0 or 1
21Q.Z3.En_PSBR
0 or 1
21M.Z5.En_PSBR
0 or 1
10
21Q.Z5.En_PSBR
0 or 1
11
21M.Pilot.En_PSBR
0 or 1
12
21Q.Pilot.En_PSBR
0 or 1
7.4.1.11 Distance SOTF Protection Settings (21SOTF)

No. 1 Item 21SOTF.En Remark Enable accelerating distance protection to trip Enable stage 2 of accelerating distance protection 2 21SOTF.Z2.En_ManCls to trip when manual closing or auto-reclosing onto 0 or 1 an existing fault Enable stage 3 of accelerating distance protection 3 21SOTF.Z3.En_ManCls to trip when manual closing or auto-reclosing onto 0 or 1 an existing fault 0 or 1 Range
7-14
Date: 2012-08-14
7 Settings
Enable stage 4 of accelerating distance protection 4 21SOTF.Z4.En_ManCls to trip when manual closing or auto-reclosing onto 0 or 1 an existing fault 5 6 7 8 9 10 21SOTF.Z2.En_3PAR 21SOTF.Z3.En_3PAR 21SOTF.Z4.En_3PAR 21SOTF.Z2.En_PSBR 21SOTF.Z3.En_PSBR 21SOTF.Z4.En_PSBR Enable 3-pole auto-reclosing mode for zone 2 Enable 3-pole auto-reclosing mode for zone 3 Enable 3-pole auto-reclosing mode for zone 4 Enable PSBR for zone 2 of distance element Enable PSBR for zone 3 of distance element Enable PSBR for zone 4 of distance element Enable accelerating distance protection to trip 11 21SOTF.En_PDF when fault occurs on healthy phase under pole 0 or 1 discrepancy situation Time delay of accelerating distance protection to 12 21SOTF.t_PDF trip when fault occurs on healthy phase under pole 0.000~10.000 (s) discrepancy situation 13 SOTF.Opt_Mode_ManCls Option of manual SOTF mode 0, 1 or 2 0 or 1 0 or 1 0 or 1 0 or 1 0 or 1 0 or 1
7.4.1.12 Optical Pilot Channel Settings

No. 1 2 3 4 Item FO.LocID FO.RmtID FOx.En_IntClock Fox.BaudRate Remark Indentity code of the device at local end Indentity code of the device at remote end Option of internal clock or external clock Baud rate of optical pilot channel 0-65535 0-65535 0 or 1 64 or 2048 (KBPS) Range
7.4.1.13 Pilot Distance Protection Settings (85)

No. 1 2 3 4 5 6 7 8 9 10 11 Item 85.Opt_PilotMode 85.Opt_Ch_PhSeg 85.En_WI 85.U_UV_WI 85.Z.En 85.En_Unblocking1 85.t_DPU_Blocking1 85.t_DPU_CR1 85.t_DDO_CR1 85.En_ZX 85.t_DPU_ZX Remark Option of pilot scheme Option of phase-segregated signal scheme or three-phase signal scheme Enable weak infeed scheme Undervoltage setting of weak infeed logic Enable pilot distance protection Enable unblocking scheme Time delay for blocking scheme of pilot distance protection operation Time delay pickup for current reversal logic Time delay dropoff for current reversal logic Enable zone extension protection Pickup time delay for zone extension protection operation 0~2 0 or 1 0 or 1 0~Unn (V) 0 or 1 0 or 1 0.000~1.000 (s) 0.000~1.000 (s) 0.000~1.000 (s) 0 or 1 0.000~10.000 (s) Range

Date: 2012-08-14
7-15
7 Settings
7.4.1.14 Pilot Directional Earth-fault Protection Settings (85)

No. 1 2 Item 85.DEF.En 85.DEF.En_BlkAR Remark Enable pilot directional earth-fault protection Enable pilot directional earth-fault protection operate to block AR Enable independent pilot channel for pilot directional earth-fault protection Enable unblocking scheme for pilot DEF via pilot channel 2 Current protection Time delay of pilot directional earth-fault protection Time delay pickup for current reversal logic when pilot 7 85.t_DPU_CR2 directional earth-fault protection adopts independent 0.000~1.000 (s) pilot channel 2 Time delay dropoff for current reversal logic when 8 85.t_DDO_CR2 pilot directional earth-fault protection adopts 0.000~1.000 (s) setting of pilot directional earth-fault 0 or 1 0 or 1 Range
85.DEF_En_IndepCh
0 or 1
85.En_Unblocking2
0 or 1
5 6
85.DEF.3I0_Set 85.DEF.t_DPU
(0.050~30.000)In (A) 0.001~10.000 (s)
independent pilot channel 2
7.4.1.15 Current Direction Settings

No. 1 Item RCA_OC The characteristic Remark angle of directional phase Range 45.00~89.00 (Deg)
overcurrent element The characteristic angle of directional earth fault element The characteristic angle of directional
RCA_ROC
45.00~89.00 (Deg)
3 4 5
RCA_NegOC Z0_Comp Z2_Comp
negative-sequence overcurrent element Zero-sequence compensation impedance setting Negative-sequence compensation impedance setting
45.00~89.00 (Deg) (0.000~4Unn)/In (ohm) (0.000~4Unn)/In (ohm)
7.4.1.16 Phase Overcurrent Protection (50/51P)

No. 1 Item 50/51P.k_Hm2 Remark Setting of second harmonic component for blocking phase overcurrent elements Current setting for stage 1 of phase overcurrent protection Time delay for stage 1 of phase overcurrent protection Enable stage 1 of phase overcurrent protection Enabling/Disabling auto-reclosing blocked when stage 1 of phase overcurrent protection operates Range 0.000~1.000
50/51P1.I_Set
(0.050~30.000)In (A)
3 4 5
50/51P1.t_Op 50/51P1.En 50/51P1.En_BlkAR
0.000~20.000 (s) 0 or 1 0 or 1
7-16
Date: 2012-08-14
7 Settings
6 50/51P1.Opt_Dir Direction option for stage 1 of phase overcurrent protection Enable second harmonic blocking for stage 1 of phase overcurrent protection Option of characteristic curve for stage 1 of phase overcurrent protection Time multiplier setting for stage 1 of inverse-time phase overcurrent protection Minimum operating time for stage 1 of inverse-time phase overcurrent protection Constant for stage 1 of customized inverse-time characteristic phase overcurrent protection Constant C for stage 1 of customized inverse-time characteristic phase overcurrent protection Constant K for stage 1 of customized inverse-time characteristic phase overcurrent protection Current setting for stage 2 of phase overcurrent protection Time delay for stage 2 of phase overcurrent protection Enable stage 2 of phase overcurrent protection Enabling/Disabling auto-reclosing blocked when stage 2 of phase overcurrent protection operates Direction option for stage 2 of phase overcurrent protection Enable second harmonic blocking for stage 2 of phase overcurrent protection Option of characteristic curve for stage 2 of phase overcurrent protection Time multiplier setting for stage 2 of inverse-time phase overcurrent protection. Minimum operating time for stage 2 of inverse-time phase overcurrent protection Current setting for stage 3 of phase overcurrent protection Time delay for stage 3 of phase overcurrent protection Enable stage 3 of phase overcurrent protection Enabling/Disabling auto-reclosing blocked when stage 3 of phase overcurrent protection operates Direction option for stage 3 of phase overcurrent protection 0, 1 or 2
50/51P1.En_Hm2
0 or 1
50/51P1.Opt_Curve
0~13
50/51P1.TMS
0.010~200.000
10
50/51P1.tmin
0.000~20.000 (s)
11
50/51P1.Alpha
0.010~5.000
12
50/51P1.C
0.000~200.000
13
50/51P1.K
0.050~20.000
14
50/51P2.I_Set
(0.050~30.000)In (A)
15 16 17
0.000~20.000 (s) 0 or 1 0 or 1
18
50/51P2.Opt_Dir
0, 1 or 2
19
50/51P2.En_Hm2
0 or 1
20
50/51P2.Opt_Curve
0~12
21
50/51P2.TMS
0.010~200.000
22
50/51P2.tmin
0.000~20.000 (s)
23
50/51P3.I_Set
(0.050~30.000)In (A)
24 25 26
0.000~20.000 (s) 0 or 1 0 or 1
27
50/51P3.Opt_Dir
0, 1 or 2

Date: 2012-08-14
7-17
7 Settings
28 50/51P3.En_Hm2 Enable second harmonic blocking for stage 3 of phase overcurrent protection Option of characteristic curve for stage 3 of phase overcurrent protection Time multiplier setting for stage 3 of inverse-time phase overcurrent protection. Minimum operating time for stage 3 of inverse-time phase overcurrent protection Current setting for stage 4 of phase overcurrent protection Time delay for stage 4 of phase overcurrent protection Enable stage 4 of phase overcurrent protection Enabling/Disabling auto-reclosing blocked when stage 4 of phase overcurrent protection operates Direction option for stage 4 of phase overcurrent protection Enable second harmonic blocking for stage 4 of phase overcurrent protection Option of characteristic curve for stage 4 of phase overcurrent protection Time multiplier setting for stage 4 of inverse-time phase overcurrent protection. Minimum operating time for stage 4 of inverse-time phase overcurrent protection 0 or 1
29
50/51P3.Opt_Curve
0~12
30
50/51P3.TMS
0.010~200.000
31
50/51P3.tmin
0.000~20.000 (s)
32
50/51P4.I_Set
(0.050~30.000)In (A)
33 34 35
0.000~20.000 (s) 0 or 1 0 or 1
36
50/51P4.Opt_Dir
0, 1 or 2
37
50/51P4.En_Hm2
0 or 1
38
50/51P4.Opt_Curve
0~12
39
50/51P4.TMS
0.010~200.000
40
50/51P4.tmin
0.010~20.000 (s)
7.4.1.17 Direction Earth Fault Protection Settings (50/51G)

No. 1 2 3 4 5 6 7 Item 50/51G.K_Hm2 50/51G1.3I0_Set 50/51G1.t_Op 50/51G1.En 50/51G1.En_BlkAR 50/51G1.Opt_Dir 50/51G1.En_Hm2 Remark Setting of second harmonic component for blocking earth fault elements Current setting for stage 1 of earth fault protection Time delay for stage 1 of earth fault protection Enable stage 1 of earth fault protection Enabling/Disabling auto-reclosing blocked when stage 1 of earth fault protection operates Direction option for stage 1 of earth fault protection Enable second harmonic blocking for stage 1 of earth fault protection Enable blocking for stage 1 of earth fault protection under abnormal conditions Enable blocking for stage 1 of earth fault protection under CT failure conditions Range 0.000~1.000 (0.050~30.000)In (A) 0.000~20.000 (s) 0 or 1 0 or 1 0, 1 or 2 0 or 1
50/51G1.En_Abnor_Blk
0 or 1
50/51G1.En_CTS_Blk
0 or 1
7-18
Date: 2012-08-14
7 Settings
10 50/51G1.Opt_Curve Option of characteristic curve for stage 1 of earth fault protection Time multiplier setting for stage 1 of inverse-time earth fault protection Minimum operating time for stage 1 of inverse-time earth fault protection Constant for stage 1 of customized inverse-time characteristic earth fault protection Constant C for stage 1 of customized inverse-time characteristic earth fault protection Constant K for stage 1 of customized inverse-time characteristic earth fault protection Current setting for stage 2 of earth fault protection Time delay for stage 2 of earth fault protection Enable stage 2 of earth fault protection Enabling/Disabling auto-reclosing blocked when stage 2 of earth fault protection operates Direction option for stage 2 of earth fault protection Enable second harmonic blocking for stage 2 of earth fault protection Enable blocking for stage 2 of earth fault protection under abnormal conditions Enable blocking for stage 2 of earth faultv protection under CT failure conditions Option of characteristic curve for stage 2 of earth fault protection Time multiplier setting for stage 2 of inverse-time earth fault protection Minimum operating time for stage 2 of inverse-time earth fault protection Current setting for stage 3 of earth fault protection Time delay for stage 3 of earth fault protection Enable stage 3 of earth fault protection Enabling/Disabling auto-reclosing blocked when stage 3 of earth fault protection operates Direction option for stage 3 of earth fault protection Enable second harmonic blocking for stage 3 of earth fault protection Enable blocking for stage 3 of earth fault protection under abnormal conditions Enable blocking for stage 3 of earth fault protection under CT failure conditions 0~13
11
50/51G1.TMS
0.010~200.000
12
50/51G1.tmin
0.050~20.000 (t)
13
50/51G1.Alpha
0.010~5.000
14
50/51G1.C
0.000~20.000
15 16 17 18 19 20 21
50/51G1.K 50/51G2.3I0_Set 50/51G2.t_Op 50/51G2.En 50/51G2.En_BlkAR 50/51G2.Opt_Dir 50/51G2.En_Hm2
0.050~20.000 (0.050~30.000)In (A) 0.000~20.000 (s) 0 or 1 0 or 1 0, 1 or 2 0 or 1
22
0 or 1
23
50/51G2.En_CTS_Blk
0 or 1
24
50/51G2.Opt_Curve
0~12
25
50/51G2.TMS
0.010~200.000
26 27 28 29 30 31 32
50/51G2.tmin 50/51G3.3I0_Set 50/51G3.t_Op 50/51G3.En 50/51G3.En_BlkAR 50/51G3.Opt_Dir 50/51G3.En_Hm2
0.050~20.000 (s) (0.050~30.000)In (A) 0.000~20.000 (s) 0, 1 or 2 0 or 1 0 or 1 0 or 1
33
0 or 1
34
50/51G3.En_CTS_Blk
0 or 1

Date: 2012-08-14
7-19
7 Settings
35 50/51G3.Opt_Curve Option of characteristic curve for stage 3 of earth fault protection Time multiplier setting for stage 3 of inverse-time earth fault protection Minimum operating time for stage 3 of inverse-time earth fault protection Current setting for stage 4 of earth fault protection Time delay for stage 4 of earth fault protection Enable stage 4 of earth fault protection Enabling/Disabling auto-reclosing blocked when stage 4 of earth fault protection operates Direction option for stage 4 of earth fault protection Enable second harmonic blocking for stage 4 of earth fault protection Enable blocking for stage 4 of earth fault protection under abnormal conditions Enable blocking for stage 4 of earth fault protection under CT failure conditions Option of characteristic curve for stage 4 of earth fault protection Time multiplier setting for stage 4 of inverse-time earth fault protection Minimum operating time for stage 4 of inverse-time earth fault protection 0~12
36
50/51G3.TMS
0.010~200.000
37 38 39 40 41 42 43
50/51G3.tmin 50/51G4.3I0_Set 50/51G4.t_Op 50/51G4.En 50/51G4.En_BlkAR 50/51G4.Opt_Dir 50/51G4.En_Hm2
0.050~20.000 (s) (0.050~30.000)In (A) 0.000~20.000 (s) 0, 1 or 2 0 or 1 0 or 1 0 or 1
44
0 or 1
45
50/51G4.En_CTS_Blk
0 or 1
46
50/51G4.Opt_Curve
0~12
47
50/51G4.TMS
0.010~200.000
48
50/51G4.tmin
0.050~20.000 (s)
7.4.1.18 Overcurrent Protection Settings for VT Circuit Failure (51PVT/51GVT)

No. 1 Item 51GVT.3I0_Set Remark Current setting of ground overcurrent protection when VT circuit failure Time delay of ground overcurrent protection when VT circuit failure Enable ground overcurrent protection when VT circuit failure Current setting of phase overcurrent protection when VT circuit failure Time delay of phase overcurrent protection when VT circuit failure Enable phase overcurrent protection when VT circuit failure Range (0.050~30.000)In (A)
51GVT.t_Op
0.000~10.000 (s)
51GVT.En
0 or 1
51PVT.I_Set
(0.050~30.000)In (A)
51PVT.t_Op
0.000~10.000 (s)
51PVT.En
0 or 1
7.4.1.19 Residual Current SOTF Protection Settings (50GSOTF)

No. 1 Item 50GSOTF.3I0_Set Remark Current setting of residual current SOTF protection Range (0.050~30.000)In (A)
7-20
Date: 2012-08-14
7 Settings
2 50GSOTF.En_3I0 Enable residual current SOTF protection 0 or 1
7.4.1.20 Overvoltage Protection Settings (59P)

No. 1 2 3 4 5 6 Item 59P1.U_Set 59P1.t_Op 59P1.En 59P1.Opt_1P/3P 59P1.Opt_Up/Upp 59P1.En_Alm Remark Voltage setting for stage 1 of overvoltage protection Time delay for stage 1 of overvoltage protection Enable stage 1 of overvoltage protection Option of 1-out-of-3 mode or 3-out-of-3 mode Option of phase-to-phase voltage or phase voltage Enable stage 1 of overvoltage protection for alarm purpose Enable transfer trip controlled by CB open position for stage 1 of overvoltage protection Enable stage 1 of overvoltage protection operate to initiate transfer trip Option of characteristic curve for stage 1 of overvoltage protection Time multiplier setting for stage 1 of inverse-time overvoltage protection Minimum delay for stage 1 of inverse-time overvoltage protection Voltage setting for stage 2 of overvoltage protection Time delay for stage 2 of overvoltage protection Enable stage 2 of overvoltage protection Option of 1-out-of-3 mode or 3-out-of-3 mode Option of phase-to-phase voltage or phase voltage Enable stage 2 of overvoltage protection for alarm purpose Enable transfer trip controlled by CB open position for stage 2 of overvoltage protection Enable stage 2 of overvoltage protection operate to initiate transfer trip Option of characteristic curve for stage 2 of overvoltage protection Time multiplier setting for stage 2 of inverse-time overvoltage protection Minimum delay for stage 2 of inverse-time overvoltage protection Range Un~2Unn (V) 0.000~30.000 (s) 0 or 1 0 or 1 0 or 1 0 or 1
59P1.En_52b_TT
0 or 1
59P1.En_TT
0 or 1
59P1.Opt_Curve
0~13
10
59P1.Opt_TMS
0.010~200.000
11 12 13 14 15 16 17
59P1.tmin 59P2.U_Set 59P2.t_Op 59P2.En 59P2.Opt_1P/3P 59P2.Opt_Up/Upp 59P2.En_Alm
0.050~20.000 (s) Un~2Unn (V) 0.000~30.000 (s) 0 or 1 0 or 1 0 or 1 0 or 1
18
59P2.En_52b_TT
0 or 1
19
59P2.En_TT
0 or 1
20
59P2.Opt_Curve
0~12
21
59P2.Opt_TMS
0.010~200.000
22
59P2.tmin
0.050~20.000 (s)
7.4.1.21 Undervoltage Protection Settings (27P)

No. 1 2 Item 27P1.U_Set 27P1.t_Op Remark Voltage setting for stage 1 of undervoltage protection Time delay for stage 1 of undervoltage protection Range 0~Unn (V) 0.000~30.000 (s) 7-21
Date: 2012-08-14
7 Settings
3 4 5 27P1.En 27P1.Opt_1P/3P 27P1.Opt_Up/Upp Enable stage 1 of undervoltage protection Option of 1-out-of-3 mode or 3-out-of-3 mode Option of voltage criterion adopting phase-to-phase voltage or phase voltage Enable stage 1 of undervoltage protection operate to alarm Option of characteristic curve for stage 1 of 0 or 1 0 or 1 0 or 1
27P1.En_Alm
0 or 1
27P1.Opt_Curve
undervoltage protection Time multiplier setting for stage 1 of inverse-time undervoltage protection Minimum delay for stage 1 of inverse-time undervoltage protection Voltage setting for stage 2 of undervoltage protection Time delay for stage 2 of undervoltage protection Enable stage 2 of undervoltage protection Option of 1-out-of-3 mode or 3-out-of-3 mode Option of voltage criterion adopting phase-to-phase voltage or phase voltage Enable stage 2 of undervoltage protection operate to alarm Option of characteristic curve for stage 2 of
0~13
27P1.Opt_TMS
0.010~200.000
9 10 11 12 13 14
27P1.tmin 27P2.U_Set 27P2.t_Op 27P2.En 27P2.Opt_1P/3P 27P2.Opt_Up/Upp
0.050~20.000 (s) 0~Unn (V) 0.000~30.000 (s) 0 or 1 0 or 1 0 or 1
15
27P2.En_Alm
0 or 1
16
27P2.Opt_Curve
undervoltage protection Time multiplier setting for stage 2 of inverse-time undervoltage protection Minimum delay for stage 2 of inverse-time undervoltage protection
0~12
17
27P2.Opt_TMS
0.010~200.000
18
27P2.tmin
0.050~20.000 (s)
7.4.1.22 Frequency Protection Settings (81U and 81O)

No. 1 2 Item 81U.f_Pkp 81U.df/dt_Blk Remark Range
Frequency pickup setting for underfrequency protection 45.000~60.000 (Hz) Rate of frequency change for blocking underfrequency protection Frequency setting for stage 1 of underfrequency protection Time delay for stage 1 of underfrequency protection Frequency setting for stage 2 of underfrequency protection Time delay for stage 2 of underfrequency protection Frequency setting for stage 3 of underfrequency protection Time delay for stage 3 of underfrequency protection Frequency setting for stage 4 of underfrequency protection 0.200~20.000 (Hz/s)
3 4 5 6 7 8 9
81U.UF1.f_Set 81U.UF1.t_Op 81U.UF2.f_Set 81U.UF2.t_Op 81U.UF3.f_Set 81U.UF3.t_Op 81U.UF4.f_Set
45.000~60.000 (Hz) 0.050~30.000 (s) 45.000~60.000 (Hz) 0.050~30.000 (s) 45.000~60.000 (Hz) 0.050~30.000 (s) 45.000~60.000 (Hz)
7-22
Date: 2012-08-14
7 Settings
10 81U.UF4.t_Op Time delay for stage 4 of underfrequency protection Enabling/disabling stage 1 of underfrequency protection 11 81U.UF1.En 0: disable 1: enable Enabling/disabling rate of frequency change to block 12 81U.UF1.En_df/dt_Blk stage 1 of underfrequency protection 0: disable 1: enable Enabling/disabling stage 2 of underfrequency protection 13 81U.UF2.En 0: disable 1: enable Enabling/disabling rate of frequency change to block 14 81U.UF2.En_df/dt_Blk stage 2 of underfrequency protection 0: disable 1: enable Enabling/disabling stage 3 of underfrequency protection 15 81U.UF3.En 0: disable 1: enable Enabling/disabling rate of frequency change to block 16 81U.UF3.En_df/dt_Blk stage 3 of underfrequency protection 0: disable 1: enable Enabling/disabling stage 4 of underfrequency protection 17 81U.UF4.En 0: disable 1: enable Enabling/disabling rate of frequency change to block 18 81U.UF4.En_df/dt_Blk stage 4 of underfrequency protection 0: disable 1: enable 19 20 21 22 23 24 25 26 27 81O.f_Pkp 81O.OF1.f_Set 81O.OF1.t_Op 81O.OF2.f_Set 81O.OF2.t_Op 81O.OF3.f_Set 81O.OF3.t_Op 81O.OF4.f_Set 81O.OF4.t_Op Frequency pickup setting for overfrequency protection Frequency setting for stage 1 of overfrequency protection Time delay for stage 1 of overfrequency protection Frequency setting for stage 2 of overfrequency protection Time delay for stage 2 of overfrequency protection Frequency setting for stage 3 of overfrequency protection Time delay for stage 3 of overfrequency protection Frequency setting for stage 4 of overfrequency protection Time delay for stage 4 of overfrequency protection 50.000~65.000 (Hz) 50.000~65.000 (Hz) 0.050~20.000 (s) 50.000~65.000 (Hz) 0.050~20.000 (s) 50.000~65.000 (Hz) 0.050~20.000 (s) 50.000~65.000 (Hz) 0.050~20.000 (s) 0 or 1 0 or 1 0 or 1 0 or 1 0 or 1 0 or 1 0 or 1 0 or 1 0.050~30.000 (s)

Date: 2012-08-14
7-23
7 Settings
Enabling/disabling stage 1 of overfrequency protection 28 81O.OF1.En 0: disable 1: enable Enabling/disabling stage 2 of overfrequency protection 29 81O.OF2.En 0: disable 1: enable Enabling/disabling stage 3 of overfrequency protection 30 81O.OF3.En 0: disable 1: enable Enabling/disabling stage 4 of overfrequency protection 31 81O.OF4.En 0: disable 1: enable 0 or 1 0 or 1 0 or 1 0 or 1
7.4.1.23 Breaker Failure Protection Settings (50BF)

No. 1 2 3 4 5 6 7 8 9 10 11 12 Item 50BF.I_Set 50BF.3I0_Set 50BF.I2_Set 50BF.t_ReTrp 50BF.t1_Op 50BF.t2_Op 50BF.En 50BF.En_ReTrp 50BF.En_3I0_1P 50BF.En_3I0_3P 50BF.En_I2_3P 50BF.En_CB_Ctrl Remark Current setting of phase current criterion for BFP Range (0.050~30.000 )In (A)
Current setting of zero-sequence current criterion (0.050~30.000 )In (A) for BFP Current setting of negative-sequence current (0.050~30.000 )In (A) criterion for BFP Time delay of re-tripping for BFP Time delay of stage 1 for BFP Time delay of stage 2 for BFP Enable breaker failure protection Enable re-trip function for BFP 0.000~10.000 (s) 0.000~10.000 (s) 0.000~10.000 (s) 0 or 1 0 or 1
Enable zero-sequence current criterion for BFP 0 or 1 initiated by single-phase tripping contact Enable zero-sequence current criterion for BFP 0 or 1 initiated by three-phase tripping contact Enable negative-sequence current criterion for BFP 0 or 1 initiated by three-phase tripping contact Enable breaker failure protection can be initiated by 0 or 1 normally closed contact of circuit breaker
7.4.1.24 Thermal Overload Protection (49)

No. 1 49-1.K Item Remark Range
The factor setting for stage 1 of thermal overload protection which is associated to the thermal state 1.000~3.000 formula The factor setting for stage 2 of thermal overload protection which is associated to the thermal state 1.000~3.000 formula The reference current setting of the thermal (0.050~30.000 )In (A) overload protection The time constant setting of the IDMT overload 0.100~100.000 (min) protection PCS-902 Line Distance Relay
Date: 2012-08-14
49-2.K
3 4
49.Ib_Set 49.Tau
7-24
7 Settings
5 6 7 8 49-1.En_Alm 49-1.En_Trp 49-2.En_Alm 49-2.En_Trp Enable stage 1 of thermal overload protection for 0 or 1 alarm purpose Enable stage 1 of thermal overload protection for 0 or 1 trip purpose Enable stage 2 of thermal overload protection for 0 or 1 alarm purpose Enable stage 2 of thermal overload protection for 0 or 1 trip purpose
7.4.1.25 Stub Overcurrent Protection (50STB)

No. 1 2 3 Name 50STB.I_Set 50STB.t_Op 50STB.En Remark Current setting of stub overcurrent protection Time delay of stub overcurrent protection Enable stub overcurrent protection Range (0.050~30.000)In (A) 0.000~10.000 (s) 0 or 1
7.4.1.26 Dead Zone Protection (50DZ)

No. 1 2 3 Name 50DZ.I_Set 50DZ.t_Op 50DZ.En Remark Current setting of dead zone protection Time delay of dead zone protection Enable dead zone protection Range (0.050~30.000)In (A) 0.000~10.000 (s) 0 or 1
7.4.1.27 Pole Discrepancy Protection Settings (62PD)

No. 1 2 3 4 5 Item 62PD.3I0_Set 62PD.I2_Set 62PD.t_Op 62PD.En 62PD.En_3I0/I2_Ctrl Remark Range
Current setting of residual current criterion for pole (0.050~30.000 )In (A) discrepancy protection Current setting of negative-sequence criterion for pole discrepancy protection Time delay of pole discrepancy protection Enable pole discrepancy protection Enable residual current criterion negative-sequence current criterion for discrepancy protection current (0.050~30.000 )In (A) 0.000~600.000 (s) 0 or 1 and pole 0 or 1
7.4.1.28 Broken Conductor Protection (46BC)

No. 1 2 3 Item 46BC.k_Set 46BC.t_Op 46BC.En Remark Ratio setting (negative-sequence current to positive-sequence current) of broken conductor protection Time delay of broken conductor protection Enabe broken conductor protection Range 0.20~1.00 0.000~600.000 (s) 0 or 1
7.4.1.29 Synchrocheck Settings (25)

No. 1 2 Item 25.Opt_Source_UL 25.Opt_Source_UB Remark Voltage selecting mode of line Voltage selecting mode of bus 0~5 0~5 Range

Date: 2012-08-14
7-25
7 Settings
3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 25.U_Dd 25.U_Lv 25.K_Usyn 25.phi_Diff 25.phi_Comp 25.f_Diff 25.U_Diff 25.t_DeadChk 25.t_SynChk 25.En_fDiffChk 25.En_SynChk 25.En_DdL_DdB 25.En_DdL_LvB 25.En_LvL_DdB 25.En_NoChk Voltage threshold of dead check Voltage threshold of live check Compensation coefficient for synchronism voltage Phase difference limit of synchronism check for AR Compensation for phase difference between two synchronous voltages 0.05Un~0.8Un (V) 0.5Un~Un (V) 0.20-5.00 0~ 89 (Deg) 0~359 (Deg)
Frequency difference limit of synchronism check for AR 0.02~1.00 (Hz) Voltage difference limit of synchronism check for AR Time delay to confirm dead check condition Time delay to confirm synchronism check condition Enable frequency difference check Enable synchronism check Enable dead line and dead bus (DLDB) check Enable dead line and live bus (DLLB) check Enable live line and dead bus (LLDB) check Enable AR without any check 0.02Un~0.8Un (V) 0.010~25.000 (s) 0.010~25.000 (s) 0 or 1 0 or 1 0 or 1 0 or 1 0 or 1 0 or 1
7.4.1.30 Auto-reclosing Settings (79)

No. 1 2 3 4 5 6 7 Item 79.N_Rcls 79.t_Dd_1PS1 79.t_Dd_3PS1 79.t_Dd_3PS2 79.t_Dd_3PS3 79.t_Dd_3PS4 79.t_CBClsd Remark Maximum number of reclosing attempts Dead time of first shot 1-pole reclosing Dead time of first shot 3-pole reclosing Dead time of second shot 3-pole reclosing Dead time of third shot 3-pole reclosing Dead time of fourth shot 3-pole reclosing Time delay of circuit breaker in closed position before reclosing Time delay to wait for CB healthy, and begin to timing 8 79.t_CBReady when the input signal [79.CB_Healthy] is de-energized and if it is not energized within this time delay, AR will be blocked. 9 10 11 12 13 79.t_WaitChk 79.t_Fail 79.t_DDO_AR 79.t_Reclaim 79.t_PersistTrp Maximum wait time for synchronism check Time delay allow for CB status change to conform reclosing successful Pulse width of AR closing signal Reclaim time of AR Time delay of excessive trip signal to block 0.000~600.000 (s) 0.000~600.000 (s) 0.000~600.000 (s) 0.000~600.000 (s) 0.000~600.000 (s) 0.000~600.000 (s) 1~4 0.000~600.000 (s) 0.000~600.000 (s) 0.000~600.000 (s) 0.000~600.000 (s) 0.000~600.000 (s) 0.000~600.000 (s) Range
auto-reclosing
7-26
Date: 2012-08-14
7 Settings
Drop-off time delay of blocking AR, when blocking 14 79.t_DDO_BlkAR signal for AR disappears, AR blocking condition drops 0.000~600.000 (s) off after this time delay 15 16 79.t_AddDly 79.t_WaitMaster Additional time delay for auto-reclosing Maximum wait time for reclosing permissive signal from master AR Time delay of discriminating another fault, and begin to 17 79.t_SecFault times after 1-pole AR initiated, 3-pole AR will be initiated if another fault happens during this time delay. AR will be blocked if another fault happens after that. 18 79.En_PDF_Blk Enable auto-reclosing blocked when a fault occurs under pole disagreement condition Enable auto-reclosing with an additional dead time delay Enable adjust the length of reclosing pulse Enable confirm whether AR is successful by checking CB state Enable auto-reclosing Enable AR by external input signal besides logic setting [79.En] Enable AR be initiated by open state of circuit breaker Option of AR priority Control option of AR mode Enable 1-pole AR mode Enable 3-pole AR mode Enable 1/3-pole AR mode 0 or 1 0.000~600.000 (s) 0.000~600.000 (s) 0.000~600.000 (s)
19 20 21 22 23 24 25 26 27 28 29
79.En_AddDly 79.En_CutPulse 79.En_FailCheck 79.En 79.En_ExtCtrl 79.En_CBInit 79.Opt_Priority 79.SetOpt 79.En_1PAR 79.En_3PAR 79.En_1P/3PAR
0 or 1 0 or 1 0 or 1 0 or 1 0 or 1 0 or 1 0, 1 or 2 0 or 1 0 or 1 0 or 1 0 or 1
7.4.1.31 Transfer Trip Settings (TT)

No. 1 2 TT.t_Op TT.En_FD_Ctrl Item Remark Time delay of transfer trip Enable transfer trip controlled by local fault detector Range 0.000~600.000 (s) 0 or 1
7.4.1.32 Tripping Logic Settings

No. 1 Item En_MPF_Blk_AR Remark Enable auto-reclosing blocked when multi-phase fault happens Enable auto-reclosing blocked when three-phase fault happens Enable auto-reclosing blocked when selection of faulty phase fails 0 or 1 Range
En_3PF_Blk_AR
0 or 1
3 4
En_PhSF_Blk_AR En_3PTrp
0 or 1
Enable phase A,phase B and phase C breaker tripping 0 or 1

Date: 2012-08-14
7-27
7 Settings
5 t_Dwell_Trp The dwell time of tripping command, empirical value is 0.04 0.000~1000.000 (s)
7.4.1.33 VTS Settings (VTS)

No. 1 Item VTS.En_Out_VT Remark VT is not connected to the protection device If three-phase voltage used for protection measurement 2 VTS.En_Line_VT comes from line side (for example, 3/2 breaker), it should be set as 1. If three-phase voltage comes from busbar side, it should be set as 0. 3 VTS.En Enable alarm function of VT circuit supervision 0 or 1 0 or 1 0 or 1 Range
7.4.2 Access Path

MainMenuSettingsProt Settings
7.5 Logic Link Settings

The logic link settings (in the submenu Logic Links) are used to determine whether the relevant function of this device is enabled or disabled. If this device supports the logic link function, it will have a corresponding submenu in the submenu Logic Links for the logic link settings. Each logic link settings is an AND condition of enabling the relevant function with the corresponding binary input and logic setting. Through SAS or RTU, logic link settings can be set as 1 or 0; and it means that the relevant function can be in service or out of service through remote command. It provides convenience for operation management.
7.5.1 GOOSE Link Settings

The GOOSE link settings (in the submenu GOOSE Links) are used to determine whether the relevant GOOSE elements are enabled or disabled. See the GOOSE related instruction manual for the more information and details.
7.5.2 Spare Link Settings

The spare link settings (in the submenu Spare Links) are used for future application. It can be defined as one of above three link settings through the PCS-Explorer configuration tool.
No. 1 2 3 4 5 6 7 8 Link_01 Link_02 Link_01 Link_02 Link_01 Link_02 Link_01 Link_02 Item Spare link setting 01 Spare link setting 01 Spare link setting 01 Spare link setting 01 Spare link setting 01 Spare link setting 01 Spare link setting 01 Spare link setting 01 Remark 0 or 1 0 or 1 0 or 1 0 or 1 0 or 1 0 or 1 0 or 1 0 or 1 Range
7-28
Date: 2012-08-14
7 Settings
7.5.3 Access Path

MainMenuSettingsLogic Links
7.6 Measurement and Control Settings

7.6.1 Synchronism Settings
Parameters in the Syn_Settings menu are listed in the following table.
No. 1 2 3 4 5 6 7 Item MCBrd.25.Opt_Source_UL MCBrd.25.Opt_Source_UB MCBrd.25.U_Dd MCBrd.25.U_Lv MCBrd.25.K_Usyn MCBrd.25.phi_Diff MCBrd.25.phi_Comp Remark Voltage selecting mode of line Voltage selecting mode of bus Voltage threshold of dead check Voltage threshold of live check Compensation coefficient for synchronism voltage Phase difference limit of synchronism check for AR Compensation for phase difference between two synchronous voltages Frequency difference limit of synchronism check for AR 0~5 0~5 0.05Un~0.8Un (V) 0.5Un~Un (V) 0.20-5.00 0~ 89 (Deg) 0~359 (Deg) Range
8 9 10 11 12 13 14 15
MCBrd.25.f_Diff MCBrd.25.U_Diff MCBrd.25.En_SynChk MCBrd.25.En_DdL_DdB MCBrd.25.En_DdL_LvB MCBrd.25.En_LvL_DdB MCBrd.25.En_NoChk MCBrd.25.df/dt
0.02~1.00 (Hz)
Voltage difference limit of synchronism check for AR 0.02Un~0.8Un (V) Enable synchronism check Enable dead line and dead bus (DLDB) check Enable dead line and live bus (DLLB) check Enable live line and dead bus (LLDB) check Enable AR without any check Threshold of rate of frequency change between both sides of CB for synchronism-check. Circuit breaker closing time. It is the time from 0 or 1 0 or 1 0 or 1 0 or 1 0 or 1 0.00~3.00 (Hz/s)
16
MCBrd.25.t_Close_CB
receiving closing command pulse till the CB is 20~1000 (ms) completely closed. From receiving a closing command, this device will continuously check whether between incoming voltage and reference voltage involved in 5~30 (s)
17
MCBrd.25.t_Wait_Chk
synchronism check (or dead check) can meet the criteria. If the synchronism check (or dead check) criteria are not met within the duration of this time delay, the failure of synchronism-check (or dead check) will be confirmed.
7.6.2 Dual Position Binary Input Settings

Parameters in the BI_Settings menu are listed in the following table.

Date: 2012-08-14
7-29
7 Settings
No. Name Remark These settings are applied to configure the 1 t_DPU_DPosxx debouncing time. DPU is the abbreviation of Delay Pick Up. (xx=01, 02.) 0~60000 (ms) Range
Thses settings are applied to configure the status change confirmation time for No.xx double point binary inputs. Up to 10 virtual double point binary inputs are provided in this device. If a double point binary input changes from normal status to invalid status, i.e.: double point error occurs, [t_DPU_DPosxx] will be applied as the debouncing time for No.xx double point binary input.
7.6.3 Control Settings

Parameters in the Control_Settings menu are listed in the following table.
No. Name Remark No.xx holding time of a normal open contact of remote 1 t_DDO_Opnxx opening CB, disconnector or for signaling purpose. (xx=01, 02.10) No.xx closing time of a normal open contact of remote 2 t_DDO_Clsxx closing CB, disconnector or for signaling purpose. (xx=01, 02.10) 0~65535 (ms) 0~65535 (ms) Range
7.6.4 Interlock Settings

Parameters in the Interlock_Settings menu are listed in the following table.
No. Name Remark The items in this submenu are applied together with [Sig_En_CtrlOpnxx] in the submenu InputsInterlock_Status. 1: No.xx open output of the BO module is controlled by the interlocking logic. If the interlocking conditions are met (i.e.: 1 En_Opnxx_Blk [Sig_En_CtrlOpnxx]=1), opening output xx has output, otherwise (i.e.: [Sig_En_CtrlOpnxx]=0) opening output xx has no output. 0: No.xx open output of the BO module is not controlled by the interlocking logic. Whether the interlocking conditions are met or not, opening output xx has output. (xx=01, 02.10) The items in this submenu are applied together with [Sig_En_CtrlClsxx] 2 En_Clsxx_Blk in the submenu 0 or 1 InputsInterlock_Status. 1: No.xx closing output of the BO module is controlled by the interlocking logic. If the interlocking conditions are met 0 or 1 Range
7-30
Date: 2012-08-14
7 Settings
No. Name Remark (i.e.: [Sig_En_CtrlClsxx]=1), closing output xx has output, otherwise (i.e.: [Sig_En_CtrlClsxx]=0) closing output xx has no output. 0: No.xx closing output of the BO module is not controlled by the interlocking logic. Whether the interlocking conditions are met or not, closing output xx has output. (xx=01, 02.10) Range

Date: 2012-08-14
7-31
7 Settings
7-32
Date: 2012-08-14
8 Human Machine Interface Table of Contents

8 Human Machine Interface ............................................................... 8-a
8.1 Overview .......................................................................................................... 8-1
8.1.1 Keypad Operation .............................................................................................................. 8-2 8.1.2 LED Indications .................................................................................................................. 8-3 8.1.3 Front Communication Port ................................................................................................. 8-3 8.1.4 Ethernet Port Setup ........................................................................................................... 8-4
8.2 Menu Tree ........................................................................................................ 8-5

8.2.1 Overview ............................................................................................................................ 8-5 8.2.2 Main Menus ....................................................................................................................... 8-6 8.2.3 Sub Menus ......................................................................................................................... 8-7
8.3 LCD Display ................................................................................................... 8-20

8.3.1 Overview .......................................................................................................................... 8-20 8.3.2 Normal Display................................................................................................................. 8-20 8.3.3 Display Disturbance Records ........................................................................................... 8-21 8.3.4 Display Supervision Event ............................................................................................... 8-23 8.3.5 Display IO Events ............................................................................................................ 8-23 8.3.6 Display Device Logs ........................................................................................................ 8-24
8.4 Keypad Operation ......................................................................................... 8-25

8.4.1 View Device Measurements ............................................................................................. 8-25 8.4.2 View Device Status .......................................................................................................... 8-25 8.4.3 View Device Records ....................................................................................................... 8-26 8.4.4 Print Device Report .......................................................................................................... 8-26 8.4.5 View Device Setting ......................................................................................................... 8-27 8.4.6 Modify Device Setting ...................................................................................................... 8-28 8.4.7 Copy Device Setting ........................................................................................................ 8-30

Date: 2012-03-08
8-a
8.4.8 Switch Setting Group ....................................................................................................... 8-31 8.4.9 Delete Device Records .................................................................................................... 8-32 8.4.10 Remote Control .............................................................................................................. 8-32 8.4.11 Modify Device Clock ....................................................................................................... 8-36 8.4.12 View Module Information................................................................................................ 8-36 8.4.13 Check Software Version ................................................................................................. 8-37 8.4.14 Communication Test....................................................................................................... 8-37 8.4.15 Select Language ............................................................................................................ 8-38
List of Figures
Figure 8.1-1 Front panel ............................................................................................................8-1 Figure 8.1-2 Keypad buttons ....................................................................................................8-2 Figure 8.1-3 LED indications ....................................................................................................8-3 Figure 8.1-4 Corresponding cable of the RJ45 port in the front panel ..................................8-4 Figure 8.1-5 Rear view and terminal definition of NR1102C...................................................8-5 Figure 8.2-1 Menu tree ..............................................................................................................8-7
List of Tables
Table 8.1-1 Definition of the 8-core cable ................................................................................8-4 Table 8.3-1 Tripping report messages....................................................................................8-23 Table 8.3-2 User operating event list......................................................................................8-25
8-b
Date: 2012-03-08
The operator can access the protective device from the front panel. Local communication with the protective device is possible using a computer via a multiplex RJ45 port on the front panel. Furthermore, remote communication is also possible using a PC with the substation automation system via rear RS485 port or rear Ethernet port. The operator is able to check the protective device status at any time. This chapter describes human machine interface (HMI), and give operator a instruction about how to display or print event report, setting and so on through HMI menu tree and display metering value, including r.m.s. current, voltage and frequency etc. through LCD. Procedures to change active setting group or a settable parameter value through keypad is also described in details.
Note!
About three measurements in menu Measurements, please refer to the following description: Measurement1 is use to display measured values from protection calculation DSP (displayed in secondary value) Measurement2 is used to display measured values from fault detector DSP (displayed in secondary value) Measurement3 is used to display measured primary values and other calculated quantities
8.1 Overview
The human-machine interface consists of a human-machine interface (HMI) module which allows a communication to be as simple as possible for the user. The HMI module helps to draw your attention to something that has occurred which may activate a LED or a report displayed on the LCD. Operator can locate the data of interest by navigating the keypad.
1 2 3 4 5 6 7 8 9 10
HEALTHY ALARM
11 12 13 14 15 16
PCS-902
GRP
ESC
ENT
17 18 19 20
4 3
Figure 8.1-1 Front panel
The function of HMI module:

Date: 2012-03-08
8-1

No. Item Description A 320240 dot matrix backlight LCD display is visible in dim lighting 1 LCD conditions. The corresponding messages are displayed when there is operation implemented. 20 status indication LEDs, 2 LEDs are fixed as the signals of HEALTHY 2 LED (green) and ALARM (yellow), 18 LEDs are configurable with selectable color among green, yellow and red. 3 4 5 Keypad Communication port Logo Navigation keypad and command keys for full access to device a multiplex RJ45 port for local communication with a PC Type and designation and manufacturer of device
8.1.1 Keypad Operation
GR P
ENT
ESC
Figure 8.1-2 Keypad buttons
1.
ESC:
Cancel the operation Quit the current menu
2.
ENT:
Execute the operation Confirm the interface
3.
GRP
Activate the switching interface of setting group
4.
leftward and rightward direction keys ( and ):
Move the cursor horizontally Enter the next menu or return to the previous menu
5.
upward and downward direction keys ( and )
Move the cursor vertically Select command menu within the same level of menu
6.
plus and minus sign keys ( and )
Modify the value
8-2
Date: 2012-03-08
Modify and display the message number Page up/down
8.1.2 LED Indications

HEALTHY ALARM
Figure 8.1-3 LED indications
A brief explanation has been made as bellow.

LED Display Off HEALTHY Steady Green Off ALARM Steady Yellow Lit when VT circuit failure, CT circuit failure or other abnormal alarm is issued. Description When the equipment is out of service or any hardware error is defected during self-check. Lit when the equipment is in service and ready for operation. When equipment in normal operating condition.
Note!
HEALTHY LED can only be turned on by energizing the device and no abnormality detected. ALARM LED is turned on when abnormalities of device occurs like above mentioned and can be turned off after abnormalities are removed except alarm report [CTS.Alm] which can only be reset only when the failure is removed and the device is rebooted or re-energized. Other LED indicators with no labels are configurable and user can configure them to be lit by signals of operation element, alarm element and binary output contact according to requirement through PCS-Explorer software, but as drawed in figure, 2 LEDs are fixed as the signals of HEALTHY (green) and ALARM (yellow), 18 LEDs are configurable with selectable color among green, yellow and red.
8.1.3 Front Communication Port

There is a multiplex RJ45 port on the front panel. This port can be used as an RS-232 serial port
Date: 2012-03-08
8-3
as well as a twisted-pair ethernet port. As shown in the following figure, a customized cable is applied for debugging via this multiplex RJ45 port.
Figure 8.1-4 Corresponding cable of the RJ45 port in the front panel
In the above figure and the following table: P1: To connect the multiplex RJ45 port. An 8-core cable is applied here. P2: To connect the twisted-pair ethernet port of the computer. P3: To connect the RS-232 serial port of the computer. The definition of the 8-core cable in the above figure is introduced in the following table.
Table 8.1-1 Definition of the 8-core cable Terminal No. 1 2 3 4 5 6 7 Device side (Left) P1-1 P1-2 P1-3 P1-4 P1-5 P1-6 P1-7 Computer side (Right) P2-1 P2-2 P2-3 P3-2 P3-3 P2-6 P3-5
Core color Orange Orange & white Green & white Blue Brown & white Green Blue & white
Function TX+ of the ethernet port TX- of the ethernet port RX+ of the ethernet port TXD of the RS-232 serial port RXD of the RS-232 serial port RX- for the ethernet port The ground connection of the RS-232 port.
8.1.4 Ethernet Port Setup

MON plug-in module is equipped with two or four 100Base-TX Ethernet interface, take NR1102C as an example, as shown in Figure 8.1-5. Its rear view and the definition of terminals. The Ethernet port can be used to communication with PC via auxiliary software (PCS-Explorer) after connecting the protection device with PC, so as to fulfill on-line function (please refer to the instruction manual of PCS-Explorer). At first, the connection between the protection device and PC must be established. Through setting the IP address and subnet mask of corresponding Ethernet interface in the menu SettingsDevice SetupComm Settings, it should be ensured that the protection device and PC are in the same network segment. For example, setting the IP address and subnet mask of network A. (using network A to connect with PC)
8-4
Date: 2012-03-08
PC: IP address is set as 198.87.96.102, subnet mask is set as 255.255.255.0 The IP address and subnet mask of protection device should be [IP_LAN1]= 198.87.96.XXX, [Mask_LAN1]=255.255.255.0, [En_LAN1]=1. (XXX can be any value from 0 to 255 except 102) If the logic setting [En_LAN1] is non-available, it means that network A is always enabled.
NR1102C
ETHERNET
Network A
Network B
SYN+ SYNSGND GND RTS TXD SGND
Figure 8.1-5 Rear view and terminal definition of NR1102C
Note! If using other Ethernet port, for example, Ethernet B, the logic setting [En_LAN2] must be set as 1.
8.2 Menu Tree

8.2.1 Overview
Press of any running interface and enter the main menu. Select different submenu by and . Enter the selected submenu by pressing ENT or . Press and return to the previous menu. Press ESC back to main menu directly. For sake of entering the command menu again, a command menu will be recorded in the quick menu after its execution. Five latest command menus can be recorded in the quick menu. When five command menus are recorded, the latest command menu will cover the earliest one, adopting the first in first out principle. It is arranged from top to bottom and in accordance with the execution order of command menus. Press to enter the main menu with the interface as shown in the following diagram:

Date: 2012-03-08
8-5
MainMenu
Language Clock Quick Menu
For the first powered protective device, there is no record in quick menu. Press to enter the main menu with the interface as shown in the following diagram:
Measurements Status Records Settings Print Local Cmd Information Test Clock Language
The descriptions about menu is based on the maximized configuration, for a specific project, if some function is not available, the corresponding submenu will hidden.
8.2.2 Main Menus

The menu of the PCS-902 is organized into main menu and submenus, much like a PC directory structure. The menu of the PCS-902 is divided into 10 sections:
8-6
Date: 2012-03-08

Main Menu
Measurements
Status
Records
Settings
Print
Local Cmd
Information
Test
Clock
Language
Figure 8.2-1 Menu tree
Under the main interface, press to enter the main menu, and select submenu by pressing , and ENT. The command menu adopts a tree shaped content structure. The above diagram provides the integral structure and all main menus under menu tree of the protection device.
8.2.3 Sub Menus

8.2.3.1 Measurements
Main Menu
Measurements
Measurements1 Measurements2 Measurements3
This menu is used to display real-time measured values, including AC voltage, AC current, phase angle and calculated quantities. These data can help users to acquaint the devices status. This menu comprises following submenus. Please refer to section measurement about the detailed measured values.
No. 1 Item Measurement1 Function description Display measured values from protection calculation DSP (Displayed in

Date: 2012-03-08
8-7

secondary value) 2 3 Measurement2 Measurement3 Display measured values from fault detector DSP (Displayed in secondary value) Display measured primary values and other calculated quantities
8.2.3.2 Status
Main Menu
Status
Inputs
Contact Inputs Interlock Inputs GOOSE Inputs Prot Ch Inputs
Outputs
Contact Outputs GOOSE Outputs Prot Ch Outputs
Superv State
Prot Superv FD Superv GOOSE Superv SV Superv
This menu is used to display real time input signals, output signals and alarm signals of the device. These data can help users to acquaint the devices status. This menu comprises following submenus. Please refer to section signal list about the detailed inputs, output and alarm signals.
No. 1 2 3 Inputs Outputs Superv State Item Function description Display all input signal states Display all output signal states Display supervision alarm states
The submenu Inputs comprises the following command menus.
8-8
Date: 2012-03-08

No. 1 2 3 4 Item Contact Inputs Interlock Inputs GOOSE Inputs Prot Ch Inputs Function description Display states of binary inputs derived from opto-isolated channels Display states of interlock result of each remote control. Display states of GOOSE binary inputs. Display states of binary inputs received from protection channel.
The submenu Outputs comprises the following command menus.

No. 1 2 3 Item Contact Outputs GOOSE Outputs Prot Ch Outputs Function description Display states of contact binary outputs Display states of GOOSE binary outputs Display states of channel outputs
The submenu Superv State comprises the following command menus.

No. 1 2 3 4 Item Prot Superv FD Superv GOOSE Superv SV Superv Function description Display states of self-supervision signals from protection calculation DSP Display states of self-supervision signals from fault detector DSP Display states of GOOSE self-supervision signals Display states of SV self-supervision signals
8.2.3.3 Records
Main Menu
Records
Disturb Records Superv Events IO Events Device Logs Control Logs Clear Records
This menu is used to display all kinds of records, including the disturbance records, supervision events, binary events and device logs, so that the operator can load to view and use as the reference of analyzing accidents and repairing the device. All records are stored in non-volatile memory, it can still record them even if it loses its power. This menu comprises the following submenus.
No. 1 Item Disturb Records Function description Display disturbance records of the device

Date: 2012-03-08
8-9

2 3 4 5 6 Superv Events IO Events Device Logs Control Logs Clear Records Display supervision events of the device Display binary events of the device Display device logs of the device Display control logs of the device Clear all recods.
8.2.3.4 Settings
Main Menu
Settings
System Settings Prot Settings Mon/Ctrl Settings Logic Links
Function Links GOOSE Links SV Links Spare Links
Device Setup
Device Settings Comm Settings Label Settings
Copy Settings
This menu is used to check the device setup, system parameters, protection settings and logic links settings, as well as modifying any of the above setting items. Moreover, it can also execute the setting copy between different setting groups. This menu comprises the following submenus.
No. 1 2 3 4 Item System Settings Prot Settings Mon/Ctrl Settings Logic Links Function description Check or modify the system parameters Check or modify the protection settings Check or modify the measurement and control settings Check or modify the logic links settings, including function links, SV links, GOOSE links and spare links
8-10
Date: 2012-03-08

5 6 Device Setup Copy_Settings Check or modify the device setup Copy setting between different setting groups
The submenu Prot Settings includes the following command menus.

No. 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 Item Line Settings FD Settings Direction Settings Pilot Scheme Settings DPFC Dist Settings Mho Dist Settings Quad Dist Settings ROC Settings SOTF Settings OC Settings VTF OC Settings BFP Settings OV Settings UV Settings OF Settings UF Settings ThOvld Settings PD Settings Stub Settings BrknCond Settings VTS/CTS Settings Trip Logic Settings AR/Syn Settings Function description Check or modify line parameters Check or modify fault detector element settings Check or modify direction control element settings Check or modify pilot distance protection and pilot directional earth-fault protection settings Check or modify DPFC distance protection settings Check or modify distance protection with mho characteristic settings Check or modify distance protection with Quad characteristic settings Check or modify directional earth-fault protection settings Check or modify SOTF distance and overcurrent protection settings Check or modify phase overcurrent protection settings Check or modify overcurrent protection settings for VT circuit failure Check or modify breaker failure protection settings Check or modify overvoltage protection settings Check or modify undervoltage protection settings Check or modify overfrequency protection settings Check or modify underfrequency protection settings Check or modify thermal overload protection settings Check or modify pole discrepancy protection settings Check or modify stub overcurrent protection settings Check or modify broken-conductor protection settings Check or modify VT circuit supervision and CT circuit supervision settings Check or modify trippling logic settings Check or modify synchronism check and auto-reclosing settings
The submenu Mon/Ctrl Settings includes the following command menus.

No. 1 2 3 4 Item Syn Settings BI Settings Control Settings Interlock Settings Function description Check or modify manual sysnchronism check settings Check or modify binary input settings Check or modify control settings Check or modify interlock settings

Date: 2012-03-08
8-11
The submenu Logic Links comprises the following command menus.

No. 1 2 3 4 Item Function Links GOOSE Links SV Links Spare Links Function description Check or modify function links settings Check or modify GOOSE links settings Check or modify SV links settings Check or modify spare links settings (used for programmable logic)
The submenu Device Setup comprises the following command menus.

No. 1 2 3 Item Device Settings Comm Settings Label Settings Function description Check or modify the device settings. Check or modify the communication settings. Check or modify the label settings of each protection element.
8-12
Date: 2012-03-08
8.2.3.5 Print
Main Menu
Print
Device Info Settings
System Settings Prot Settings Mon/Ctrl Settings Logic Links
Function Links GOOSE Links SV Links Spare Links
Device Setup
Device Settings Comm Settings Label Settings
All Settings Latest Modified
Disturb Records Superv Events IO Events Prot Ch Superv
Channel 1 Channel 2
Prot Ch Statistics
Channel 1 Channel 2
Device Status Waveform IEC103 Info Cancel Print

Date: 2012-03-08
8-13
This menu is used to print device description, settings, all kinds of records, waveform, information related with IEC60870-5-103 protocol, channel state and channel statistic. This menu comprises the following submenus.
No. 1 Device Info Item Function description Print the description information of the device, including software version. Print device setup, system parameters, protection settings and logic 2 Settings links settings. It can print by different classifications as well as printing all settings of the device. Besides, it can also print the latest modified settings. 3 4 5 Disturb Records Superv Events IO Events Print the disturbance records Print the supervision events Print the binary events Print the self-check information of optical fibre channel, which is made of 6 Prot Ch Superv some hexadecimal characters and used to developer analyze channel state 7 Prot Ch Statistics Print the statistic report of optical fibre channel, which is formed A.M. 9:00 every day Print the current state of the device, including the sampled value of voltage and current, the state of binary inputs, setting and so on Print the recorded waveform Print 103 Protocol information, including function type (FUN), 10 IEC103 Info information serial number (INF), general classification service group number, and channel number (ACC) 11 Cancel Print Cancel the print command
8 9
Device Status Waveform
The submenu Settings comprises the following submenus.

No. 1 2 3 4 5 6 7 Item System Settings Prot Settings Mon/Ctrl Settings Logic Links Device Setup All Settings Latest Modified Function description Print the system parameters Print the protection settings Print the measurement and control settings Print the logic links settings Print the settings related to device setup Print all settings including device setup, system parameters, protection settings and logic links settings Print the setting latest modified
The submenu Prot Settings comprises the following command menus.
8-14
Date: 2012-03-08

No. 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 Item Line Settings FD Settings Direction Settings Pilot Scheme Settings DPFC DistP Settings Mho Settings Quad Settings ROC Settings SOTF Settings OC Settings OCVT Settings BFP Settings OV Settings UV Settings OF Settings UF Settings Overload Settings MiscProt Settings VTS/CTS Settings Trip Logic Settings AR/Syn Settings STB Settings Print line parameters Print fault detector element settings Print direction control element settings Print pilot distance protection and pilot directional earth-fault protection settings Print DPFC distance protection settings Print distance protection with mho characteristic settings Print distance protection with Quad characteristic settings Print directional earth-fault protection settings Print SOTF distance and overcurrent protection settings Print phase overcurrent protection settings Print overcurrent protection settings for VT circuit failure Print breaker failure protection settings Print overvoltage protection settings Print undervoltage protection settings Print overfrequency protection settings Print underfrequency protection settings Print thermal overload protection settings Print miscellaneous protection settings Print VT circuit supervision and CT circuit supervision settings Print trippling logic settings Print synchronism check and auto-reclosing settings Print stub overcurrent protection settings Function description
The submenu Mon/Ctrl Settings includes the following command menus.

No. 1 2 3 4 Item Syn Settings BI Settings Control Settings Interlock Settings Function description Check or modify manual sysnchronism check settings Check or modify binary input settings Check or modify control settings Check or modify interlock settings
The submenu Logic Links comprises the following command menus.

No. 1 2 3 Item Function Links GOOSE Links SV Links Function description Print function links settings Print GOOSE links settings Print SV links settings

Date: 2012-03-08
8-15

4 Spare Links Print spare links settings (used for programmable logic)
The submenu Device Setup comprises the following command menus.

No. 1 2 3 Item Device Settings Comm Settings Label Settings Print the device settings. Print the communication settings. Print the label settings of each protection element. Function description
The submenu Prot Ch Superv comprises the following command menus.

No. 1 Item Channel 1 Function description Print the self-check information of optical fibre channel 1, which is made of some hexadecimal characters and used to developer analyze channel state Print the self-check information of optical fibre channel 2, which is made of some hexadecimal characters and used to developer analyze channel state
Channel 2
The submenu Prot Ch Statistics includes the following command menus.

No. 1 Item Channel 1 Function description Print the statistic report of optical fibre channel 1, which is formed A.M. 9:00 every day Print the statistic report of optical fibre channel 2, which is formed A.M. 9:00 every day
Channel 2
8.2.3.6 Local Cmd

Main Menu
Local Cmd
Reset Target Trig Oscillograph Download Clear Counter Clear AR Counter Clear Energy Counter Manual Control
This menu is used to reset the tripping relay with latch, indicator LED, LCD display, and as same as the resetting function of binary inputs. This menu provides a method of manually recording the current waveform data of the device under normal condition for printing and uploading SAS. Besides, it can send out the request of program download, clear statistic information about
8-16
Date: 2012-03-08
GOOSE, SV, AR, FO channel and energy. This menu comprises the following submenus.
No. 1 2 3 4 5 6 7 Item Reset Target Trig Oscillograph Download Clear Counter Clear AR Counter Clear Energy Counter Manual Control Function description Reset the local signal, indicator LED, LCD display and so on Trigger waveform recording Send out the request of downloading program Clear GOOSE, SV, AR and FO channel statistic data Clear AR statistic data Clear all energy metering values (i.e., PHr+,PHr-,Qr+,QHr-) Manually operating to trip, close output or for signaling purpose
8.2.3.7 Information
Main Menu
Information
Version Info Board Info
In this menu, the LCD displays software information of all kinds of intelligent plug-in modules, which consists of version, creating time of software, CRC codes and management sequence number. Besides, plug-in module information can also be viewed. This menu comprises the following command menus.
No. Item Function description Display software information of DSP module, MON module and HMI module, 1 Version Info which consists of version, creating time of software, CRC codes and management sequence number. 2 Board Info Monitor the current working state of each intelligent module.

Date: 2012-03-08
8-17
8.2.3.8 Test
Main Menu
Test
Prot Ch Counter
Ch1 Counter Ch2 Counter
GOOSE Comm Counter SV Comm Counter AR Counter
Device Test
Prot Elements
All Test Select Test
Superv Events
IO Events
This menu is mainly used for developers to debug the program and for engineers to maintain the protection device. It can be used to fulfill the communication test function. It is also used to generate all kinds of reports or events to transmit to the SAS without any external input, so as to debug the communication on site. Besides, it can also display statistic information about GOOSE, SV, AR and FO channel. This menu comprises the following submenus.
No. 1 2 3 Item Prot Ch Couter GOOSE Couters SV Couters Function description Check communication statistics data of protection FO channel Check communication statistics data of GOOSE Check communication statistics data of SV (Sampled Values)
8-18
Date: 2012-03-08

4 AR Couters Check AR counters Automatically generate all kinds of reports or events to transmit to SCADA, 5 Device Test including disturbance records, self-supervision events and binary events. It can realize the report uploading by different classification, as well as the uploading of all kinds of reports
The submenu Prot Ch Counter comprises the following command menus.

No. 1 2 Item Ch1 Counter Ch2 Counter Function description Check communication statistic information of channel 1 Check communication statistic information of channel 2
The submenu Device Test comprises the following submenus.

No. 1 Item Protection Elements Function description View the relevant information about disturbance records (only used for debugging persons) View the relevant information about supervision events (only used for debugging persons) View the relevant information about binary events (only used for debugging persons)
Superv Events
IO Events
Users can respectively execut the test automatically or manually by selecting commands All Test or Select Test. The submenu Prot Elements comprises the following command menus.
No. 1 2 All Test Select Test Item Description Ordinal test of all protection elements Selective test of corresponding classification
The submenu Superv Events comprises the following command menus.

No. 1 2 All Test Select Test Item Description Ordinal test of all self-supervisions Selective test of corresponding classification
The submenu IO Events comprises the following command menus.

No. 1 2 All Test Select Test Item Description Ordinal test of change of all binary inputs Selective test of corresponding classification
8.2.3.9 Clock The current time of internal clock can be viewed here. The time is displayed in the form YY-MM-DD and hh:mm:ss. All values are presented with digits and can be modified.
Date: 2012-03-08
8-19
8.2.3.10 Language This menu is mainly used to set LCD display language.
8.3 LCD Display

8.3.1 Overview
There are five kinds of LCD display, SLD (single line diagram) display, tripping reports, alarm reports, binary input changing reports and control reports. Tripping reports and alarm reports will not disappear until these reports are acknowledged by pressing the RESET button in the protection panel (i.e. energizing the binary input [BI_RstTarg]). User can press both ENT and ESC at the same time to switch the display among trip reports, alarm reports and the SLD display. IO events will be displayed for 5s and then it will return to the previous display interface automatically. Device logs will not pop up and can only be viewed by navigating the corresponding menu.
8.3.2 Normal Display

After the protection device is powered and entered into the initiating interface, it takes 30 seconds to complete the initialization of protection device. During the initialization of protection device, the HEALTHY indicator lamp of the protection device goes out. The device can display single line diagram (SLD) and primary operation information, it can support wiring configuration function. LCD configuration file can be downloaded via the network. Remote control operating through single line diagram is also supported. Under normal condition, the LCD will display the following interface. The LCD adopts white color as its backlight that is activated if once there is any keyboard operation, and is extinguished automatically after 60 seconds of no operation.
2010-06-08 10:10:00 Ia Ib Ic 3I0 Ua Ub Uc 3U0 U_Syn f Addr 24343 0.00A 0.00A 0.00A 0.00A 0.02V 0.00V 0.00V 0.02V 0.00V 50.00Hz Group 01
The content displayed on the screen contains: the current date and time of the protection device
8-20
Date: 2012-03-08
(with a format of yyyy-mm-dd hh:mm:ss:), the active setting group number, the three-phase current sampling value, the neutral current sampling value, the three-phase voltage sampling value, the neutral voltage sampling value, the synchronism voltage sampling value, line frequency and the address relevant to IP address of Ethernet A. If all the sampling values of the voltage and the current cant be fully displayed within one screen, they will be scrolling-displayed automatically from the top to the bottom. If IP address of Ethernet A is xxx.xxx.a.b, the displayed address equals to (a256+b). For example, If IP address of Ethernet A is 198.087.095.023, the displayed address will be 95 256+23=24343. If the device has detected any abnormal state, itll display the self-check alarm information.
8.3.3 Display Disturbance Records

This device can store 1024 disturbance records and 64 disturbance records with fault waveform. When there is protection element operating, the LCD will automatically display the latest disturbance record, and two kinds of LCD display interfaces will be available depending on whether there are supervision events at present. For the situation that the disturbance records and the supervision events coexist, the upper half part is the disturbance record, and the lower half part is the supervision event. As to the upper half part, it displays separately the record number of the disturbance record, fault name, generating time of the disturbance record (with a format of yyyy-mm-dd hh:mm:ss), protection element and tripping element. If there is protection element operation, faulty phase and relative operation time with reference to fault detector element are displayed. At the same time, if displayed rows of protection element and tripping element are more than 3, a scroll bar will appear at the right. The height of the black part of the scroll bar basically indicates the total lines of protection element and tripping element, and its position suggests the position of the currently displayed line of the total lines. The scroll bar of protection element and tripping element will roll up at the speed of one line per time. When it rolls to the last three lines, it will roll from the earliest protection element and tripping element again. The displayed content of the lower half part is similar to that of the upper half part. If the device has no the supervision event, the display interface will only show the disturbance record.

Date: 2012-03-08
8-21
1. Disturb Records NO.2 2008-11-28 07:10:00:200 0 ms DPFC.Pkp 24 ms A

21Q.Z1.Op
If the device has the supervision event, the display interface will show the disturbance record and the supervision event at the same time.
1. Disturb Records NO.2 2008-11-28 07:10:00:200 0 ms DPFC.Pkp 24 ms A
21Q.Z1.Op
2. Superv Events NO.3 2008-11-28 07:09:00:200 Alm_52b
Disturb Records NO.2 2008-11-28 07:10:00:200
shows the title and SOE number of the disturbance record. shows the time when fault detector picks up, the format is yearmonth-date and hour:minute:second:millisecond. shows fault detector element and its operating time (set as 0ms fixedly). shows operation element and its relative operation time
0ms DPFC.Pkp
24ms A 21Q.Z1.Op
All the protection elements have been listed in Chapter Operation Theory, and please refer to each protection element for details. Operation reports of fault detector and the reports related to oscillography function are showed in the following table.
8-22
Date: 2012-03-08

Table 8.3-1 Tripping report messages No. 1 2 Message ManTrigDFR RmtTrigDFR Description Oscillography function is triggered manually. Oscillography function is triggered remotely.
8.3.4 Display Supervision Event

This device can store 1024 pieces of supervision events. During the running of the device, the supervision event of hardware self-check errors or system running abnormity will be displayed immediately.
2. Superv Events NO.4 2008-12-29 9:18:47:500ms Alm_52b 0 1
Superv_Events NO.4 2008-11-28 09:18:47:500
shows the SOE number and title of the supervision event shows the real time of the report: yearmonth-date and hour:minute:second:millisecond shows the content of abnormality alarm
Alm_52b
01
8.3.5 Display IO Events

This device can store 1024 pieces of binary events. During the running of the device, the binary input will be displayed once its state has changed, i.e. from 0 to 1 or from 1 to 0.

Date: 2012-03-08
8-23
3. IO Events NO.4 2008-11-29 09:18:47:500ms BI_RstTarg 0 1
IO Events NO.4 2008-11-28 09:18:47:50
shows the number and title of the binary event shows date and time when the report occurred, the format is yearmonth-date and hour:minute:second:millisecond shows the state change of binary input, including binary input name, original state and final state
BI_RstTarg 01
8.3.6 Display Device Logs

This device can store 1024 pieces of device logs. During the running of the device, the device log will be displayed after any operation of it is conducted.
4. Device Logs NO.4 2008-11-28 10:18:47:569ms Reboot
Device Logs NO. 4 2008-11-28 10:18:47:569
shows the title and the number of the device log shows date and time when the report occurred, the format is yearmonth-date and hour:minute:second:millisecond
8-24
Date: 2012-03-08
Reboot
shows the manipulation content of the device log
User operating information listed below may be displayed.

Table 8.3-2 User operating event list No. 1 2 3 4 5 6 7 8 Message Reboot Settings_Chg ActiveGrp_Chgd Report_Cleared Waveform_Cleared Process_Exit Counter_Cleared Signal_Reset The device has been reboot. The devices settings have been changed. Active setting group has been changed. All reports have been deleted. (Device logs can not be deleted) All waveforms have been deleted. A process has exited. Clear counter Reset signal Description
It will be displayed on the LCD before the fault report and self-check report are confirmed. Only pressing the restore button on the protection screen or pressing both ENT and ESC at the same time can switch among the fault report, the self-check report and the normal running state of protection device to display it. The binary input change report will be displayed for 5s and then it will return to the previous display interface automatically.
8.4 Keypad Operation

8.4.1 View Device Measurements
The operation is as follows: 1. 2. Press the to enter the main menu; Press the or to move the cursor to the Measurements menu, and then press the ENT or to enter the menu; Press the or to move the cursor to any command menu, and then press the ENT to enter the menu; 4. Press the or to page up/down (if all information cannot be displayed in one display screen, one screen can display 14 lines of information at most); Press the or to select pervious or next command menu; Press the ENT or ESC to exit this menu (returning to the Measurements menu);
3.
5. 6.
8.4.2 View Device Status

The operation is as follows: 1. 2. Press the key to enter the main menu. Press the key or to move the cursor to the Status menu, and then press the ENT or to enter the menu.

Date: 2012-03-08
8-25
3.
Press the key or to move the cursor to any command menu item, and then press the key ENT to enter the submenu.
4.
Press the or to page up/down (if all information cannot be displayed in one display screen, one screen can display 14 lines of information at most). Press the key or to select pervious or next command menu. Press the key ENT or ESC to exit this menu (returning to the Status menu).
5. 6.
8.4.3 View Device Records

The operation is as follows: 1. 2. Press the to enter the main menu; Press the or to move the cursor to the Records menu, and then press the ENT or to enter the menu; Press the or to move the cursor to any command menu, and then press the ENT to enter the menu; Press the or to page up/down; Press the or to select pervious or next record; Press the or to select pervious or next command menu; Press the ENT or ESC to exit this menu (returning to the Records menu);
3.
4. 5. 6. 7.
8.4.4 Print Device Report

The operation is as follows: 1. 2. Press the to enter the main menu; Press the or to move the cursor to the Print menu, and then press the ENT or to enter the menu; Press the or to move the cursor to any command menu, and then press the ENT to enter the menu; Selecting the Disturb Records, and then press the or to select pervious or next record. After pressing the key ENT, the LCD will display Start Printing... , and then automatically exit this menu (returning to the menu Print). If the printer doesnt complete its current print task and re-start it for printing, and the LCD will display Printer Busy. Press the key ESC to exit this menu (returning to the menu Print). Selecting the command menu Superv Events or IO Events, and then press the key or to move the cursor. Press the or to select the starting and ending numbers of printing message. After pressing the key ENT, the LCD will display Start Printing, and then automatically exit this menu (returning to the menu Print). Press the key ESC to exit this menu (returning to the menu Print).
8-26
Date: 2012-03-08
3.
4.
If selecting the command menu Device Info, Device Status or IEC103_Info, press the key ENT, the LCD will display Start printing.., and then automatically exit this menu (returning to the menu Print). If selecting the Settings, press the key ENT or to enter the next level of menu. After entering the submenu Settings, press the key or to move the cursor, and then press the key ENT to print the corresponding default value. If selecting any item to printing: Press the key or to select the setting group to be printed. After pressing the key ENT, the LCD will display Start Printing, and then automatically exit this menu (returning to the menu Settings). Press the key ESC to exit this menu (returning to the menu Settings).
5. 6.
7.
After entering the submenu Waveforms, press the or to select the waveform item to be printed and press ENT to enter. If there is no any waveform data, the LCD will display No Waveform Data! (Before executing the command menu Waveforms, it is necessary to execute the command menu Trig Oscillograph in the menu Local Cmd, otherwise the LCD will display No Waveform Data!). With waveform data existing:
Press the key or to select pervious or next record. After pressing the key ENT, the LCD will display Start Printing, and then automatically exit this menu (returning to the menu Waveforms). If the printer does not complete its current print task and re-start it for printing, and the LCD will display Printer Busy. Press the key ESC to exit this menu (returning to the menu Waveforms).
8.4.5 View Device Setting

The operation is as follows: 1. 2. Press the to enter the main menu; Press the or to move the cursor to the Settings menu, and then press the ENT or to enter the menu; Press the or to move the cursor to any command menu, and then press the ENT to enter the menu; 4. 5. 6. 7. Press the or to move the cursor; Press the + or - to page up/down; Press the or to select pervious or next command menu; Press the ESC to exit this menu (returning to the menu Settings). Note! If the displayed information exceeds 14 lines, the scroll bar will appear on the right side of the LCD to indicate the quantity of all displayed information of the command menu and the
3.

Date: 2012-03-08
8-27
relative location of information where the current cursor points at.
8.4.6 Modify Device Setting

The operation is as follows: 1. 2. Press the to enter the main menu; Press the or to move the cursor to the Settings menu, and then press the ENT or to enter the menu; Press the or to move the cursor to any command menu, and then press the ENT to enter the menu; 4. 5. 6. 7. 8. Press the or to move the cursor; Press the + or - to page up/down; Press the or to select pervious or next command menu; Press the ESC to exit this menu (returning to the menu Settings ); If selecting the command menu System Settings, move the cursor to the setting item to be modified, and then press the ENT;
3.
Press the or to modify the value (if the modified value is of multi-bit, press the or to move the cursor to the digit bit, and then press the or to modify the value), press the ESC to cancel the modification and return to the displayed interface of the command menu System Settings. Press the ENT to automatically exit this menu (returning to the displayed interface of the command menu System Settings). Move the cursor to continue modifying other setting items. After all setting values are modified, press the , or ESC, and the LCD will display Save or Not?. Directly press the ESC or press the or to move the cursor. Select the Cancle, and then press the ENT to automatically exit this menu (returning to the displayed interface of the command menu System Settings). Press the or to move the cursor. Select No and press the ENT, all modified setting item will restore to its original value, exit this menu (returning to the menu Settings). Press the or to move the cursor to select Yes, and then press the ENT, the LCD will display password input interface.
8-28
Date: 2012-03-08
Please Input Password:
____
Input a 4-bit password (, , or ). If the password is incorrect, continue inputting it, and then press the ESC to exit the password input interface and return to the displayed interface of the command menu System Settings. If the password is correct, LCD will display Save Setting Now, and then exit this menu (returning to the displayed interface of the command menu System Settings), with all modified setting items as modified values. Note! For different setting items, their displayed interfaces are different but their modification methods are the same. The following is ditto. 9. If selecting the submenu Prot Settings, and press ENT to enter. After selecting different command menu, the LCD will display the following interface: (take FD Settings as an example)
Line Settings
Please Select Group for Config Active Group: Selected Group: 01 02
Press the or to modify the value, and then press the ENT to enter it. Move the cursor to
Date: 2012-03-08
8-29
the setting item to be modified, press the ENT to enter. Take the setting [FD.DPFC.I_Set] as an example is selected to modify, then press the ENT to enter and the LCD will display the following interface. is shown the or to modify the value and then press the ENT to confirm.
FD.DPFC.I_Set
Current Value Modified Value Min Value Max Value
0.200 0.202 0.050 30.000
Note! After modifying protection settings in current active setting group or system parameters of the device, the HEALTHY indicator lamp of the device will go out, and the device will automatically restart and re-check them. If the check doesnt pass, the device will be blocked.
8.4.7 Copy Device Setting

The operation is as follows: 1. 2. Press the to enter the main menu; Press the or to move the cursor to the Settings menu, and then press the ENT or to enter the menu; Press the or to move the cursor to the command menu Copy Settings, and then press the ENT to enter the menu.
3.
8-30
Date: 2012-03-08
Copy Settings Active Group: 01
Copy To Group:
02
Press the or to modify the value. Press the ESC, and return to the menu Settings. Press the ENT, the LCD will display the interface for password input, if the password is incorrect, continue inputting it, press the ESC to exit the password input interface and return to the menu Settings. If the password is correct, the LCD will display copy setting OK!, and exit this menu (returning to the menu Settings).
8.4.8 Switch Setting Group

The operation is as follows: 1. 2. Exit the main menu; Press the GRP
Change Active Group
Active Group:
01
Change To Group:
02
Press the or to modify the value, and then press the ESC to exit this menu (returning to the main menu). After pressing the ENT, the LCD will display the password input interface. If the password is incorrect, continue inputting it, and then press the ESC to exit the password input

Date: 2012-03-08
8-31
interface and return to its original state. If the password is correct, the HEALTHY indicator lamp of the protection device will go out, and the protection device will re-check the protection setting. If the check doesnt pass, the protection device will be blocked. If the check is successful, the LCD will return to its original state.
8.4.9 Delete Device Records

The operation is as follows: 1. 2. Exit the main menu; Press the , , , and ENT; Press the ESC to exit this menu (returning to the original state). Press the ENT to carry out the deletion.
Press <ENT> To Clear Press <ESC> To Exit
Note! The operation of deleting device message will delete all messages saved by the protection device, including disturbance records, supervision events, binary events, but not including device logs. Furthermore, the message is irrecoverable after deletion, so the application of the function shall be cautious.
8.4.10 Remote Control

Control operation method is introduced as below: 1. 2. Press the key to enter the main menu. Press the key or to move the cursor to the command menu Local Cmd, and then press the key ENT to enter submenus. Press the key or to move the cursor to the command menu Control, and then press the key ENT to enter and the following display will be shown on LCD.
8-32
Date: 2012-03-08
Please Input Password:
___
Input a 3-bit password (111). If the password is incorrect, continue inputting it, and then press the ESC to exit the password input interface and return to the displayed interface of the command menu Control. If the password is correct, it will go to the following step. 3. Press the key or to move the cursor to the control object and press the key ENT to select control object.
Control Step1: select Control Object CSWI01 CSWI02 CSWI03 CSWI04 CSWI05 CSWI06 CSWI07
4.
Press the key or to select control command press the key ENT to the next step.
Three control commands are optional: 1) Open (Step down): Remote open 2) Close (Step up): Remote close 3) Stop: Reserved

Date: 2012-03-08
8-33
CSWI01 Step2: select Control Command Open(Lower) Close(Raise) (Stop)
NoCheck InterLockChk Select Result
SynchroCheck
DeadCheck InterLockNotChk
Execute
Cancle
5.
Press the key or to select synchronism check mode and press the key ENT to the next step.
Three synchronism check modes are optional: 1) NoCheck: Without any check 2) SynchroCheck: Synchronism-check mode 3) DeadCheck: Dead check mode
CSWI01 Step3: select Execution Condition Open(Lower) NoCheck InterLockChk Select Result Execute Close(Raise) SynchroCheck (Stop) DeadCheck InterLockNotChk Cancle
6.
Press the key or to select interlock mode and press the key ENT to next step.
8-34
Date: 2012-03-08
CSWI01 Step4: select Interlock Condition Open(Lower) NoCheck InterLockChk Select Result Execute Close(Raise) SynchroCheck (Stop) DeadCheck InterLockNotChk Cancle
Two synchronism check modes are optional: 1) InterLockChk: Check interlocking criteria 2) InterLockNotChk: Not check interlocking criteria 7. Press the key or to select control type and press the key ENT.
As shown in the following figure, operation results will be shown after Result at the bottom of the LCD.
CSWI01 Step5: select Control Type Open(Lower) NoCheck InterLockChk Select Result Execute Close(Raise) SynchroCheck (Stop) DeadCheck InterLockNotChk Cancle
Three synchronism control types are optional: 1) Select: Select control object 2) Execute: Execute control operation 3) Cancle: Cancle control operation

Date: 2012-03-08
8-35
Note! Exectue operation must be operated after Select operation.
8.4.11 Modify Device Clock

The operation is as follows: 1. 2. Press the to enter the main menu; Press the or to move the cursor to the Clock menu, and then press the ENT to enter clock display Press the or to move the cursor to the date or time to be modified; Press the + or - to modify value, and then press the ENT to save the modification and return to the main menu; Press the ESC to cancel the modification and return to the main menu.
3. 4.
5.
Clock Year Month Day Hour Minute Second 2008 11 28 20 59 14
8.4.12 View Module Information

The operation is as follows: 1. 2. Press the to enter the main menu; Press the or to move the cursor to the Information menu, and then press the ENT or to enter the menu; Press the or to move the cursor to the command menu Board Info, and then press the ENT to enter the menu; Press the or to move the scroll bar; Press the ENT or ESC to exit this menu (returning to the Information menu).
3.
4. 5.
8-36
Date: 2012-03-08
8.4.13 Check Software Version

The operation is as follows: 1. 2. Press the to enter the main menu. Press the or to move the cursor to the Information menu, and then press the ENT to enter the submenu. Press the key or to move the cursor to the command menu Version Info, and then press the key ENT to display the software version. Press the ESC to return to the main menu.
3.
4.
8.4.14 Communication Test

The operation is as follows: 1. 2. Press the key to enter the main menu. Press the key or to move the cursor to the Test menu, and then press the key ENT or to enter the menu. Press the key or to move the cursor to the submenu Device Test, and then press the key ENT to enter the submenu,to select test item. If Prot Elements Superv Events or IO Events is selected, two options All Test and Select Test are provided.
3.
Prot Element All Test Select Test
4.
Press the key or to move the cursor to select the corresponding command menu All Test or Select Test. If selecting the All Test, press the ENT, and the device will successively carry out all operation element message test one by one.
5.
If Select Test is selected, press the key ENT. Press the or to page up/down, and then press the key or to move the scroll bar. Move the cursor to select the corresponding protection element. Press the key ENT to execute the communication test of this protection element, the substation automatic system (SAS) will receive the

Date: 2012-03-08
8-37
corresponding message. Note! If no input operation is carried out within 60s, exit the communication transmission and return to the Test menu, at this moment, the LCD will display Communication Test Timeout and Exiting.... Press the key ESC to exit this menu (returning to the menu Test, at this moment, the LCD will display Communication Test Exiting.
8.4.15 Select Language

The operation is as follows: 1. 2. Press the key to enter the main menu. Press the key or to move the cursor to the command menu Language, and then press the key ENT to enter the menu and the following display will be shown on LCD.
Please Select Language: 1 2 English
3.
Press the key or to move the cursor to the language user preferred and press the key ENT to execute language switching. After language switching is finished, LCD will return to the menu Language, and the display language is changed. Otherwise, press the key ESC to cancel language switching and return to the menu Language. Note! LCD interface provided in this chapter is only a reference and available for explaining specific definition of LCD. The displayed interface of the actual device may be some different from it, so you shall be subject to the actual protection device.
8-38
Date: 2012-03-08
9 Configurable Function Table of Contents

9 Configurable Function..................................................................... 9-a
9.1 Overview .......................................................................................................... 9-1 9.2 Introduction on PCS-Explorer software ........................................................ 9-1 9.3 Signal List ........................................................................................................ 9-2
9.3.1 Input Signal ........................................................................................................................ 9-2 9.3.2 Output Signal ................................................................................................................... 9-10
List of Tables
Table 9.3-1 Input signals ...........................................................................................................9-2 Table 9.3-2 Output signals ......................................................................................................9-10

Date: 2012-08-14
9-a
9-b
Date: 2012-08-14
9.1 Overview
By adoption of PCS-Explorer software, it is able to make device configuration, function configuration, LCD configuration, binary input and binary output configuration, LED indicator configuration and programming logic for PCS-902.
9.2 Introduction on PCS-Explorer software

PCS-Explorer software is developed in order to meet customers demand on functions of UAPC platform device such as device configuration and programmable design. It selects substation as the core of data management and the device as fundamental unit, supporting one substation to govern many devices. The software provides on-line and off-line functions: on-line mode: Ethernet connected with the device supporting IEC60870-5-103 and capable of uploading and downloading configuration files through Ethernet net; off-line mode: off-line setting configuration. In addition, it also supports programmable logic to meet customers demand. After function configuration is finished, disabled protection function will be hidden in the device and in setting configuration list of PCS-Explorer Software. The user can select to show or hide some setting by this way, and modify the setting vale. Please refer to the instruction manual PCS-Explorer Auxiliary Software for details. Overall functions: Programmable logic (off-line function) Device configuration (off-line function) Function configuration (off-line function) LCD configuration (off-line function) LED indicators configuration (off-line function) Binary signals configuration (off-line function) Setting configuration (off-line & on-line function) Real-time display of analogue and digital quantity of device (on-line function) Display of sequence of report (SOE) (on-line function) Analysis of waveform (off-line & on-line function) File downloading/uploading (on-line function)

Date: 2012-08-14
9-1
9.3 Signal List

9.3.1 Input Signal
All input signal for this device are listed in the following table. For the specific project, some signals relevant to synchrocheck module, auto-reclosing module and breaker failure protection module are with the suffix of _CB1 and _CB2 for circuit breaker 1 and circuit breaker 2 respectively.
Table 9.3-1 Input signals No. Item Description Circuit breaker position supervision 1 2 3 4 5 52b_PhA 52b_PhB 52b_PhC 52b 52a Normally closed auxiliary contact of phase A of corresponding circuit breaker Normally closed auxiliary contact of phase B of corresponding circuit breaker Normally closed auxiliary contact of phase C of corresponding circuit breaker Normally closed contact of three-phase of circuit breaker Normally open contact of three-phase of circuit breaker Control circuit failure (normally closed contact and normally open contact of 6 TCCS.Input three-phase circuit breaker are all de-energized due to DC power loss of control circuit) Auxiliary element 7 AuxE.OCD.En Current change auxiliary element enabling input, it is triggered from binary input or programmable logic etc. Current change auxiliary element blocking input, it is triggered from binary input or programmable logic etc. Stage 1 of residual current auxiliary element enabling input, it is triggered from binary input or programmable logic etc. Stage 1 of residual current auxiliary element blocking input, it is triggered from binary input or programmable logic etc. Stage 2 of residual current auxiliary element enabling input, it is triggered from binary input or programmable logic etc. Stage 2 of residual current auxiliary element blocking input, it is triggered from binary input or programmable logic etc. Stage 3 of residual current auxiliary element enabling input, it is triggered from binary input or programmable logic etc. Stage 3 of residual current auxiliary element blocking input, it is triggered from binary input or programmable logic etc. Stage 1 of phase current auxiliary element enabling input, it is triggered from binary input or programmable logic etc. Stage 1 of phase current auxiliary element blocking input, it is triggered from binary input or programmable logic etc. Stage 2 of phase current auxiliary element enabling input, it is triggered from binary input or programmable logic etc. PCS-902 Line Distance Relay
Date: 2012-08-14
AuxE.OCD.Blk
AuxE.ROC1.En
10
AuxE.ROC1.Blk
11
AuxE.ROC2.En
12
AuxE.ROC2.Blk
13
AuxE.ROC3.En
14
AuxE.ROC3.Blk
15
AuxE.OC1.En
16
AuxE.OC1.Blk
17
AuxE.OC2.En
9-2
No. 18 Item AuxE.OC2.Blk Description Stage 2 of phase current auxiliary element blocking input, it is triggered from binary input or programmable logic etc. Stage 3 of phase current auxiliary element enabling input, it is triggered from binary input or programmable logic etc. Stage 3 of phase current auxiliary element blocking input, it is triggered from binary input or programmable logic etc. Voltage change auxiliary element enabling input, it is triggered from binary input or programmable logic etc. Voltage change auxiliary element blocking input, it is triggered from binary input or programmable logic etc. Phase-to-ground under voltage auxiliary element enabling input, it is triggered from binary input or programmable logic etc. Phase-to-ground under voltage auxiliary element blocking input, it is triggered from binary input or programmable logic etc. Phase-to-phase under voltage auxiliary element enabling input, it is triggered from binary input or programmable logic etc. Phase-to-phase under voltage auxiliary element blocking input, it is triggered from binary input or programmable logic etc. Residual voltage auxiliary element enabling input, it is triggered from binary input or programmable logic etc. Residual voltage auxiliary element blocking input, it is triggered from binary input or programmable logic etc. Distance protection 29 21D.En_DPFC DPFC distance protection enabling input, it is triggered from binary input or programmable logic etc. DPFC distance protection blocking input, it is triggered from binary input or programmable logic etc. Load trapezoid characteristic enabling input, it is triggered from binary input or programmable logic etc. Load trapezoid characteristic blocking input, it is triggered from binary input or programmable logic etc. Distance protection enabling input, it is triggered from binary input or programmable logic etc. Distance protection blocking input, it is triggered from binary input or programmable logic etc. Zone x of phase-to-ground distance protection enabling input, default value is 1 (x=1, 2, 3, 4, 5) Zone x of phase-to-ground distance protection blocking input, default value is 0 (x=1, 2, 3, 4, 5) Zone x of phase-to-phase distance protection enabling input, default value is 1 (x=1, 2, 3, 4, 5) Zone x of phase-to-phase distance protection blocking input, default value is 0
19
AuxE.OC3.En
20
AuxE.OC3.Blk
21
AuxE.UVD.En
22
AuxE.UVD.Blk
23
AuxE.UVG.En
24
AuxE.UVG.Blk
25
AuxE.UVS.En
26
AuxE.UVS.Blk
27
AuxE.ROV.En
28
AuxE.ROV.Blk
30
21D.Blk_DPFC
31
LoadEnch.En
32
LoadEnch.Blk
33
21M.En
34
21M.Blk
35
21M.ZGx.En
36
21M.ZGx.Blk
37 38
21M.ZPx.En 21M.ZPx.Blk

Date: 2012-08-14
9-3
No. Item (x=1, 2, 3, 4, 5) 39 40 41 42 21M.Zx.En_ShortDly 21M.Zx.Blk_ShortDly 21M.Z1.En_Instant 21Q.En Enable accelerating zone 2 of distance protection (x=2, 3) Accelerating zone 2 of distance protection is disabled (x=2, 3) Enable zone 1 of distance protection operates without time delay Distance protection enabling input, it is triggered from binary input or programmable logic etc. Distance protection blocking input, it is triggered from binary input or programmable logic etc. Zone x of phase-to-ground distance protection enabling input, default value is 1 (x=1, 2, 3, 4 5) Zone x of phase-to-ground distance protection blocking input, default value is 0 (x=1, 2, 3, 4, 5) Zone x of phase-to-phase distance protection enabling input, default value is 1 (x=1, 2, 3, 4, 5) Zone x of phase-to-phase distance protection blocking input, default value is 0 (x=1, 2, 3, 4, 5) 21Q.Zx.En_ShortDly 21Q.Zx.Blk_ShortDly 21Q.Z1.En_Instant 68.En Enable accelerating zone 2 of distance protection (x=2, 3) Accelerating zone 2 of distance protection is disabled (x=2, 3) Enable zone 1 of distance protection operates without time delay Power swing detection enabling input, it is triggered from binary input or programmable logic etc. Power swing detection blocking input, it is triggered from binary input or programmable logic etc. Enabling power swing blocking releasing (Mho characteristic) Enabling power swing blocking releasing (Quad characteristic) Blocking power swing blocking releasing (Mho characteristic) Blocking power swing blocking releasing (Quad characteristic) Distance SOTF protection enabling input, it is triggered from binary input or programmable logic etc. Distance SOTF protection blocking input, it is triggered from binary input or programmable logic etc. Optical pilot channel 59 60 61 62 63 64 65 66 67 FOx.Send1 FOx.Send2 FOx.Send3 FOx.Send4 FOx.Send5 FOx.Send6 FOx.Send7 FOx.Send8 FOx.Send9 Sending signal 1 of channel x Sending signal 2 of channel x Sending signal 3 of channel x Sending signal 4 of channel x Sending signal 5 of channel x Sending signal 6 of channel x Sending signal 7 of channel x Sending signal 8 of channel x Sending signal 9 of channel x (it is configured fixedly as sending permissive signal 1 or sending A-phase permissive signal (only for phase-segregated Description
43
21Q.Blk
44
21Q.ZGx.En
45
21Q.ZGx.Blk
46
21Q.ZPx.En
47 48 49 50 51
21Q.ZPx.Blk
52 53 54 55 56 57
68.Blk 21M.En_PSBR 21Q.En_PSBR 21M.Blk_PSBR 21Q.Blk_PSBR 21SOTF.En
58
21SOTF.Blk
9-4
Date: 2012-08-14
No. Item command scheme)) 68 FOx.Send10 Sending signal 10 of channel x (it is configured fixedly as sending B-phase permissive signal (only for phase-segregated command scheme)) Sending signal 11 of channel x (it is configured fixedly as sending C-phase permissive signal (only for phase-segregated command scheme)) Sending signal 12 of channel x (it is configured fixedly as sending permissive 70 FOx.Send12 signal 1 when pilot directional earth-fault protection sharing pilot channel 1 with pilot distance protection, or sending permissive signal 2 only for pilot directional earth-fault protection adopting independent pilot channel 2) Pilot distance protection and pilot directional earth-fault protection 71 85.Z.En1 Pilot distance protection enabling input 1, it is triggered from binary input or programmable logic etc. Pilot distance protection enabling input 2, it is triggered from binary input or programmable logic etc. Pilot distance protection blocking input, it is triggered from binary input or programmable logic etc. Input signal of indicating that pilot channel 1 is abnormal Input signal of indicating that pilot channel 2 is abnormal Input signal of receiving permissive signal via channel No.1, or input signal of 76 85.Recv1 receiving permissive signal of A-phase via channel No.1 (only for phase-segregated command scheme) 77 78 85.Recv2 85.RecvB Input signal of receiving permissive signal via channel 2 Input signal of receiving permissive signal of B-phase via channel No.1 (only for phase-segregated command scheme) Input signal of receiving permissive signal of C-phase via channel No.1 (only for phase-segregated command scheme) Input signal of initiating sending permissive signal from external tripping signal Unblocking signal 1 Unblocking signal 2 Zone Extension enabling input 1, it is triggered from binary input or programmable logic etc. Zone Extension enabling input 2, it is triggered from binary input or programmable logic etc. Zone Extension blocking input 1, it is triggered from binary input or programmable logic etc. Zone Extension blocking input 2, it is triggered from binary input or programmable logic etc. Pilot directional earth-fault protection enabling input 1, it is triggered from binary input or programmable logic etc. Pilot directional earth-fault protection enabling input 2, it is triggered from binary input or programmable logic etc. Pilot directional earth-fault protection blocking input, it is triggered from binary Description
69
FOx.Send11
72
85.Z.En2
73 74 75
85.Z.Blk 85.Abnor_Ch1 85.Abnor_Ch2
79 80 81 82 83
85.RecvC 85.ExTrp 85.Unblocking1 85.Unblocking2 85.ZX.En1
84
85.ZX.En2
85
85.ZX.Blk1
86
85.ZX.Blk2
87
85.DEF.En1
88 89
85.DEF.En2 85.DEF.Blk

Date: 2012-08-14
9-5
No. Item input or programmable logic etc. Phase overcurrent protection 90 50/51Px.En1 Stage x of phase overcurrent protection enabling input 1, it is triggered from binary input or programmable logic etc. Stage x of phase overcurrent protection enabling input 2, it is triggered from binary input or programmable logic etc. Stage x of phase overcurrent protection blocking input, it is triggered from binary input or programmable logic etc. Earth fault protection 93 50/51Gx.En1 Stage x of earth fault protection enabling input 1, it is triggered from binary input or programmable logic etc. Stage x of earth fault protection enabling input 2, it is triggered from binary input or programmable logic etc. Stage x of earth fault protection blocking input, it is triggered from binary input or programmable logic etc. Overcurrent protection for VT circuit failure 96 51PVT.En1 Phase overcurrent protection for VT circuit failure enabling input 1, it is triggered from binary input or programmable logic etc. Phase overcurrent protection for VT circuit failure enabling input 2, it is triggered from binary input or programmable logic etc. Phase overcurrent protection for VT circuit failure blocking input, it is triggered from binary input or programmable logic etc. Ground overcurrent protection for VT circuit failure enabling input 1, it is triggered from binary input or programmable logic etc. Ground overcurrent protection for VT circuit failure enabling input 2, it is triggered from binary input or programmable logic etc. Ground overcurrent protection for VT circuit failure blocking input, it is triggered from binary input or programmable logic etc. Residual SOTF protection 102 50GSOTF.En1 Residual current SOTF protection enabling input 1, it is triggered from binary input or programmable logic etc. Residual current SOTF protection enabling input 2, it is triggered from binary input or programmable logic etc. Residual current SOTF protection blocking input, it is triggered from binary input or programmable logic etc. Voltage protection 105 59Px.En1 Stage x of overvoltage protection enabling input 1, it is triggered from binary input or programmable logic etc. Stage x of overvoltage protection enabling input 2, it is triggered from binary input or programmable logic etc. Stage x of overvoltage protection blocking input, it is triggered from binary input or programmable logic etc. Description
91
50/51Px.En2
92
50/51Px.Blk
94
50/51Gx.En2
95
50/51Gx.Blk
97
51PVT.En2
98
51PVT.Blk
99
51GVT.En1
100
51GVT.En2
101
51GVT.Blk
103
50GSOTF.En2
104
50GSOTF.Blk
106
59Px.En2
107
59Px.Blk
9-6
Date: 2012-08-14
No. 108 Item 27Px.En1 Description Stage x of undervoltage protection enabling input 1, it is triggered from binary input or programmable logic etc. Stage x of undervoltage protection enabling input 2, it is triggered from binary input or programmable logic etc. Stage x of undervoltage protection blocking input, it is triggered from binary input or programmable logic etc. Frequency protection 111 81U.En1 Underfrequency protection enabling input 1, it is triggered from binary input or programmable logic etc. Underfrequency protection enabling input 2, it is triggered from binary input or programmable logic etc. Underfrequency protection blocking input, it is triggered from binary input or programmable logic etc. Overfrequency protection enabling input 1, it is triggered from binary input or programmable logic etc. Overfrequency protection enabling input 2, it is triggered from binary input or programmable logic etc. Overfrequency protection blocking input, it is triggered from binary input or programmable logic etc. Breaker failure protection 117 118 119 120 121 50BF.ExTrp3P_L 50BF.ExTrp3P_GT 50BF.ExTrpA 50BF.ExTrpB 50BF.ExTrpC Input signal of three-phase tripping contact from line protection Input signal of three-phase tripping contact from generator or transformer protection Input signal of phase-A tripping contact from external device Input signal of phase-B tripping contact from external device Input signal of phase-C tripping contact from external device Input signal of three-phase tripping contact from external device. Once it is 122 50BF.ExTrp_WOI energized, normally closed auxiliary contact of circuit breaker is chosen in addition to breaker failure current check to trigger breaker failure timers. 123 124 50BF.En 50BF.Blk Input signal of enabling breaker failure protection Breaker failure protection blocking input, such as function blocking binary input. When the input is 1, breaker failure protection is reset and time delay is cleared. Thermal overload protection 125 126 49.Clr_Cmd 49.En Input signal of clear thermal accumulation value Thermal overload protection enabling input, it is triggered from binary input or programmable logic etc. Thermal overload protection blocking input, it is triggered from binary input or programmable logic etc. Stub overcurrent protection 128 129 50STB.En1 50STB.En2 Stub overcurrent protection enabling input 1, it is triggered from binary input or programmable logic etc. Stub overcurrent protection enabling input 2, it is triggered from binary input or
109
27Px.En2
110
27Px.Blk
112
81U.En2
113
81U.Blk
114
81O.En1
115
81O.En2
116
81O.Blk
127
49.Blk

Date: 2012-08-14
9-7
No. Item programmable logic etc. 130 131 50STB.Blk 50STB.89b_DS Stub overcurrent protection blocking input, it is triggered from binary input or programmable logic etc. Normally closed auxiliary contact of line disconnector Dead zone protection 132 133 134 135 50DZ.En1 50DZ.En2 50DZ.Blk 50DZ.ExStart Dead zone protection enabling input 1, it can be binary inputs or logic link. Dead zone protection enabling input 2, it can be binary inputs or logic link. Dead zone protection blocking input, such as function blocking binary input. When the input is 1, dead zone protection is reset and time delay is cleared. Initiation signal input of the dead zone protection. Pole discrepancy protection 136 62PD.En1 Pole discrepancy protection enabling input 1, it is triggered from binary input or programmable logic etc. Pole discrepancy protection enabling input 2, it is triggered from binary input or programmable logic etc. Pole discrepancy protection blocking input, it is triggered from binary input or programmable logic etc. Pole discrepancy binary input Broken conductor protection 140 46BC.En1 Enable broken conductor protection input 1, it is triggered from binary input or programmable logic etc. Enable broken conductor protection input 2, it is triggered from binary input or programmable logic etc. Broken conductor protection blocking input, it is triggered from binary input or programmable logic etc. Synchrocheck function 143 144 145 146 147 148 149 150 25.Blk_Chk 25.Blk_SynChk 25.Blk_DdChk 25.Start_Chk 25.Blk_VTS_UB 25.Blk_VTS_UL 25.MCB_VT_UB 25.MCB_VT_UL Input signal of blocking synchrocheck function for AR. Input signal of blocking synchronism check for AR. If the value is 1, the output of synchronism check is 0. Input signal of blocking dead charge check for AR. Input signal of starting synchronism check, usually it was starting signal of AR from auto-reclosing module. VT circuit supervision (UB) is blocked VT circuit supervision (UL) is blocked Binary input for VT MCB auxiliary contact (UB) Binary input for VT MCB auxiliary contact (UL) Auto-reclosing 151 79.En Binary input for enabling AR. If the logic setting [79.En_ExtCtrl]=1, enabling AR will be controlled by the external signal via binary input Binary input for disabling AR. If the logic setting [79.En_ExtCtrl]=1, disabling AR will be controlled by the external input Input signal for selecting 1-pole AR mode of corresponding circuit breaker Description
137
62PD.En2
138 139
62PD.Blk 62PD.In_PD
141
46BC.En2
142
46BC.Blk
152 153
79.Blk 79.Sel_1PAR
9-8
Date: 2012-08-14
No. 154 155 156 157 158 159 160 Item 79.Sel_3PAR 79.Sel_1P/3PAR 79.Trp 79.Trp3P 79.TrpA 79.TrpB 79.TrpC Description Input signal for selecting 3-pole AR mode of corresponding circuit breaker Input signal for selecting 1/3-pole AR mode of corresponding circuit breaker Input signal of single-phase tripping from line protection to initiate AR Input signal of three-phase tripping from line protection to initiate AR Input signal of A-phase tripping from line protection to initiate AR Input signal of B-phase tripping from line protection to initiate AR Input signal of C-phase tripping from line protection to initiate AR Input signal of blocking reclosing, usually it is connected with the operating 161 79.Lockout signals of definite-time protection, transformer protection and busbar differential protection, etc. 162 163 79.PLC_Lost 79.WaitMaster Input signal of indicating the alarm signal that signal channel is lost Input signal of waiting for reclosing permissive signal from master AR (when reclosing multiple circuit breakers) The input for indicating whether circuit breaker has enough energy to perform the close function Clear the reclosing counter Synchrocheck condition of AR is met Transfer trip 167 168 TT.Init TT.En Input signal of initiating transfer trip after receiving transfer trip Transfer trip enabling input, it is triggered from binary input or programmable logic etc. Transfer trip blocking input, it is triggered from binary input or programmable logic etc. VT circuit supervision 170 VTS.En VT supervision enabling input, it is triggered from binary input or programmable logic etc. VT supervision blocking input, it is triggered from binary input or programmable logic etc. VT neutral point supervision enabling input, it is triggered from binary input or programmable logic etc. VT neutral point supervision blocking input, it is triggered from binary input or programmable logic etc. Binary input for VT MCB auxiliary contact CT circuit supervision 175 CTS.En CT circuit supervision enabling input, it is triggered from binary input or programmable logic etc. CT circuit supervision blocking input, it is triggered from binary input or programmable logic etc. Control and Synchrocheck for Manual Closing 177 178 179 Sig_En_CtrlOpnxx Sig_En_CtrlClsxx Sig_Ok_Chk It is the interlock status of No.xx open output of BO module (xx=01~10) It is the interlock status of No.xx closing output of BO module (xx=01~10) From receiving a closing command, this device will continuously check whether 9-9
Date: 2012-08-14
164 165 166
79.CB_Healthy 79.Clr_Counter 79.Ok_Chk
169
TT.Blk
171
VTS.Blk
172
VTNS.En
173 174
VTNS.Blk VTS.MCB_VT
176
CTS.Blk
No. Item Description the 2 voltages (Incoming voltage and reference voltage) involved in synchronism check(or dead check) can meet the criteria. Within the duration of [MCBrd.25.t_Wait_Chk], if the synchronism check(or dead check) criteria are not met, [Sig_Ok_Chk] will be set as 0; if the synchronism check(or dead check) criteria are met, [Sig_Ok_Chk] will be set as 1. Access the menu Local CmdManual Control to issue control command locally. 180 Cmd_LocCtrl If the binary input [BI_Rmt/Loc] is energized as 1, local control will be disabled. If the binary input [BI_Rmt/Loc] is de-energized as 0, local control will be enabled. If the binary input [BI_Rmt/Loc] is energized as 1, remote control from SCADA/CC will be enabled. If the binary input [BI_Rmt/Loc] is de-energized as 181 Cmd_RmtCtrl 0, remote control from SCADA/CC will be disabled. Remote control commands from SCADA/CC can be transmitted via IEC60870-5-103 protocol or IEC61850 protocol. 182 BI_Rmt/Loc It is used to select the remote control or the local control.
9.3.2 Output Signal

All output signal for this device have been listed in the following table.
Table 9.3-2 Output signals No. Signal Description Circuit breaker position supervision 1 2 Alm_52b TCCS.Alm CB position is abnormal Control circuit of circuit breaker is abnormal Fault detector 3 4 5 FD.Pkp FD.DPFC.Pkp FD.ROC.Pkp The device picks up DPFC current fault detector element operates. Residual current fault detector element operates. Auxiliary element 6 7 8 9 10 11 12 13 14 15 16 AuxE.St AuxE.OCD.St AuxE.OCD.St_Ext AuxE.OCD.On AuxE.ROC1.St AuxE.ROC1.On AuxE.ROC2.St AuxE.ROC2.On AuxE.ROC3.St AuxE.ROC3.On AuxE.OC1.St Any auxiliary element of the device operates Current change auxiliary element operates. Current change auxiliary element operates (7s delayed drop off). Current change auxiliary element is enabled Stage 1 of residual current auxiliary element operates. Stage 1 of residual current auxiliary element is enabled Stage 2 of residual current auxiliary element operates. Stage 2 of residual current auxiliary element is enabled Stage 3 of residual current auxiliary element operates. Stage 3 of residual current auxiliary element is enabled Stage 1 of phase current auxiliary element operates.
9-10
Date: 2012-08-14
No. 17 18 19 20 21 22 23 24 25 26 27 28 29 30 Signal AuxE.OC1.On AuxE.OC2.St AuxE.OC2.On AuxE.OC3.St AuxE.OC3.On AuxE.UVD.St AuxE.UVD.St_Ext AuxE.UVD.On AuxE.UVG.St AuxE.UVG.On AuxE.UVS.St AuxE.UVS.On AuxE.ROV.St AuxE.ROV.On Description Stage 1 of phase current auxiliary element is enabled Stage 2 of phase current auxiliary element operates. Stage 2 of phase current auxiliary element is enabled Stage 3 of phase current auxiliary element operates. Stage 3 of phase current auxiliary element is enabled Voltage change auxiliary element operates. Voltage change auxiliary element operates (7s delayed drop off). Voltage change auxiliary element is enabled Phase-to-ground under voltage auxiliary element operates. Phase-to-ground under voltage auxiliary element is enabled Phase-to-phase under voltage auxiliary element operates. Phase-to-phase under voltage auxiliary element is enabled Residual voltage auxiliary element operates. Residual voltage auxiliary element is enabled Distance protection 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 21D.Op_DPFC LoadEnch.St 21M.Z1.On 21M.Z2.On 21M.Z3.On 21M.Z4.On 21M.Z5.On 21M.Z1.Op 21M.Z2.Op 21M.Z3.Op 21M.Z4.Op 21M.Z5.Op 21Q.Z1.On 21Q.Z2.On 21Q.Z3.On 21Q.Z4.On 21Q.Z5.On 21Q.Z1.Op 21Q.Z2.Op 21Q.Z3.Op 21Q.Z4.Op 21Q.Z5.Op 68.St 21M.Z1.Rls_PSBR 21Q.Z1.Rls_PSBR 21M.Z2.Rls_PSBR 21Q.Z2.Rls_PSBR DPFC distance protection operates. Measured impedance into the load area Zone 1 of distance protection is enabled Zone 2 of distance protection is enabled Zone 3 of distance protection is enabled zone 4 of distance protection is enabled zone 5 of distance protection is enabled Zone 1 of distance protection operates Zone 2 of distance protection operates Zone 3 of distance protection operates zone 4 of distance protection operates zone 5 of distance protection operates Zone 1 of distance protection is enabled Zone 2 of distance protection is enabled Zone 3 of distance protection is enabled zone 4 of distance protection is enabled zone 5 of distance protection is enabled Zone 1 of distance protection operates Zone 2 of distance protection operates Zone 3 of distance protection operates zone 4 of distance protection operates zone 5 of distance protection operates Power swing detection takes into effect. PSBR operates to release zone 1 (Mho characteristic) PSBR operates to release zone 1 (Quad characteristic) PSBR operates to release zone 2 (Mho characteristic) PSBR operates to release zone 2 (Quad characteristic)

Date: 2012-08-14
9-11
No. 58 59 60 61 62 Signal 21M.Z3.Rls_PSBR 21Q.Z3.Rls_PSBR 21M.Z5.Rls_PSBR 21Q.Z5.Rls_PSBR 21M.Pilot.Rls_PSBR Description PSBR operates to release zone 3 (Mho characteristic) PSBR operates to release zone 3 (Quad characteristic) PSBR operates to release zone 5 (Mho characteristic) PSBR operates to release zone 5 (Quad characteristic) PSBR operates to release pilot distance protection (Mho
characteristic) PSBR operates to release pilot distance protection (Quad characteristic) Accelerate distance protection to trip when manual closing or auto-reclosing to fault Accelerate distance protection to trip when another fault happening under pole discrepancy conditions Optical pilot channel
63
21Q.Pilot.Rls_PSBR
64
21SOTF.Op
65
21SOTF.Op_PDF
66 67 68 69 70 71 72 73
FOx.Recv1 FOx.Recv2 FOx.Recv3 FOx.Recv4 FOx.Recv5 FOx.Recv6 FOx.Recv7 FOx.Recv8
Receiving signal 1 of channel x Receiving signal 2 of channel x Receiving signal 3 of channel x Receiving signal 4 of channel x Receiving signal 5 of channel x Receiving signal 6 of channel x Receiving signal 7 of channel x Receiving signal 8 of channel x Receiving signal 9 of channel x (it is configured fixedly as receiving
74
FOx.Recv9
permissive signal via channel No.1, or receiving permissive signal of A-phase via channel No.1 (only for phase-segregated command scheme)) Receiving signal 10 of channel x (it is configured fixedly as receiving
75
FOx.Recv10
permissive
signal
of
B-phase
via
channel
No.1
(only
for
phase-segregated command scheme)) Receiving signal 11 of channel x (it is configured fixedly as receiving 76 FOx.Recv11 permissive signal of C-phase via channel No.1 (only for
phase-segregated command scheme)) Receiving signal 12 of channel x (it is configured fixedly as receiving permissive signal 1 when pilot directional earth-fault protection 77 FOx.Recv12 sharing pilot channel 1 with pilot distance protection, or receiving permissive signal 2 only for pilot directional earth-fault protection adopting independent pilot channel 2) 78 79 FOx.Alm_CH FOx.Alm_ID Channel x is abnormal Received ID from the remote end is not as same as the setting [FO.RmtID] of the device in local end ID information received from the remote end by the device at local end now Calculated propagation delay of communication channel of the
80 81
FO.RmtID FOx.t_ChDly
9-12
Date: 2012-08-14
No. Signal device at local end now 82 83 84 85 86 87 FOx.N_CRCFail FOx.N_FramErr FOx.N_FramLoss FOx.N_RmtAbnor FOx.t_CRCFailSec FOx.Alm_Connect Total number of error frame of channel x Total number of abnormal messages of channel x Total number of lost frames of channel x Total number of abnormal messages from the remote end of channel x Seconds of serious error frames of channel x Optical fibre of channel x is connected wrongly Description
Pilot distance protection and pilot directional earth-fault protection 88 89 85.Op_Z 85.Send1 Pilot distance protection operates. Output signal of sending permissive signal 1 or sending A-phase permissive signal (only for phase-segregated command scheme) Output signal of sending permissive signal 2 only for pilot directional earth-fault protection adopting independent pilot channel 2 Output signal of sending B-phase permissive signal (only for phase-segregated command scheme) Output signal of sending C-phase permissive signal (only for phase-segregated command scheme) Zone extension protection operates. Zone extension protection starts Pilot directional earth-fault protection operates. Current direction 96 97 98 99 100 101 102 103 FWD_ROC REV_ROC FWD_NegOC REV_NegOC Forward_DIR_A, B, C Rev_DIR_A, B, C Forward_DIR_AB, BC, CA Rev_DIR_AB, BC, CA The forward direction of zero-sequence power The reverse direction of zero-sequence power The forward direction of negative-sequence power The reverse direction of negative-sequence power The forward direction of phase current The reverse direction of phase current The forward direction of phase-to-phase current The reverse direction of phase-to-phase current Phase overcurrent protection 104 105 106 107 108 50/51Px.Op 50/51Px.St 50/51Px.StA 50/51Px.StB 50/51Px.StC Stage x of phase overcurrent protection operates. Stage x of phase overcurrent protection starts. Stage x of phase overcurrent protection starts (A-Phase). Stage x of phase overcurrent protection starts (B-Phase). Stage x of phase overcurrent protection starts (C-Phase). Earth fault protection 109 110 50/51Gx.Op 50/51Gx.St Stage x of earth fault protection operates. Stage x of earth fault protection starts. Overcurrent protection for VT circuit failure 111 112 51PVT.Op 51PVT.St Phase overcurrent protection for VT circuit failure operates. Phase overcurrent protection for VT circuit failure starts.
90
85.Send2
91
85.SendB
92 93 94 95
85.SendC 85.Op_ZX 85.Op_ZX_St 85.Op_DEF

Date: 2012-08-14
9-13
No. 113 114 115 116 117 51PVT.StA 51PVT.StB 51PVT.StC 51GVT.Op 51GVT.St Signal Description Phase overcurrent protection for VT circuit failure starts (A-Phase). Phase overcurrent protection for VT circuit failure starts (B-Phase). Phase overcurrent protection for VT circuit failure starts (C-Phase). Ground overcurrent protection for VT circuit failure operates. Ground overcurrent protection for VT circuit failure starts. Residual SOTF protection 118 119 50GSOTF.Op 50GSOTF.St Residual current SOTF protection operates. Residual current SOTF protection starts. Voltage protection 120 121 122 123 124 125 126 127 128 129 130 131 132 59Px.Op 59Px.St 59Px.St1 59Px.St2 59Px.St3 59Px.Op_InitTT 59Px.Alm 27Px.Op 27Px.Alm 27Px.St 27Px.St1 27Px.St2 27Px.St3 Stage x of overvoltage protection operates. Stage x of overvoltage protection starts. Stage x of overvoltage protection starts (A or AB). Stage x of overvoltage protection starts (B or BC). Stage x of overvoltage protection starts (C or CA). Stage x of overvoltage protection operates to initiate transfer trip. Stage x of overvoltage protection alarms. Stage x of undervoltage protection operates. Stage x of undervoltage protection alarms. Stage x of undervoltage protection starts. Stage x of undervoltage protection starts (A or AB). Stage x of undervoltage protection starts (B or BC). Stage x of undervoltage protection starts (C or CA). Frequency protection 133 134 135 136 81U.UFx.Op 81U.St 81O.OFx.Op 81O.St Stage x of underfrequency protection operates (x=1, 2, 3 or 4). Underfrequency protection starts. Stage x of overfrequency protection operates (x=1, 2, 3 or 4). Overfrequency protection starts. Breaker failure protection 137 138 139 140 141 142 50BF.Op_ReTrpA 50BF.Op_ReTrpB 50BF.Op_ReTrpC 50BF.Op_ReTrp3P 50BF.Op_t1 50BF.Op_t2 Breaker failure protection operates to re-trip phase-A circuit breaker Breaker failure protection operates to re-trip phase-B circuit breaker Breaker failure protection operates to re-trip phase-C circuit breaker Breaker failure protection operates to re-trip three-phase circuit breaker Stage 1 breaker failure protection operates Stage 2 breaker failure protection operates Thermal overload protection 143 144 145 146 147 49.St 49-1.Op 49-2.Op 49-1.Alm 49-2.Alm Thermal overload protection starts. Stage 1 of thermal overload protection operates to trip. Stage 2 of thermal overload protection operates to trip. Stage 1 of thermal overload protection operates to alarm. Stage 2 of thermal overload protection operates to alarm. Stub overcurrent protection 9-14
Date: 2012-08-14
No. 148 149 50STB.St 50STB.Op Signal Description Stub overcurrent protection starts. Stub overcurrent protection operates. Dead zone protection 150 151 50DZ.St 50DZ.Op Dead zone protection starts. Dead zone protection operates. Pole discrepancy protection 152 153 62PD.Op 62PD.St Pole discrepancy protection operates to trip Pole discrepancy protection starts Broken conductor protection 154 155 46BC.St 46BC.Op Broken-conductor protection starts Broken-conductor protection operates. Synchrocheck function 156 157 158 159 160 UL1_Sel UL2_Sel UB1_Sel UB2_Sel Invalid_Sel To select voltage of Line 1 To select voltage of Line 2 To select voltage of Bus 1 To select voltage of Bus 2 Voltage selection is invalid. To indicate that frequency difference condition for synchronism 161 25.Ok_fDiff check of AR is met, frequency difference between UB and UL is smaller than [25.f_Diff]. To indicate that voltage difference condition for synchronism check of 162 25.Ok_UDiff AR is met, voltage difference between UB and UL is smaller than [25.U_Diff] To indicate phase difference condition for synchronism check of AR 163 25.Ok_phiDiff is met, phase difference between UB and UL is smaller than [25.phi_Diff]. 164 165 166 167 168 169 170 171 172 173 174 175 25.Ok_DdL_DdB 25.Ok_DdL_LvB 25.Ok_LvL_DdB 25.Chk_LvL 25.Chk_DdL 25.Chk_LvB 25.Chk_DdB 25.Ok_DdChk 25.Ok_SynChk 25.Ok_Chk 25.Alm_VTS_UB 25.Alm_VTS_UL Dead line and dead bus condition is met Dead line and live bus condition is met Live line and dead bus condition is met Line voltage is greater than the voltage setting [25.U_Lv] Line voltage is smaller than the voltage setting [25.U_Dd] Bus voltage is greater than the voltage setting [25.U_Lv] Bus voltage is smaller than the voltage setting [25.U_Dd] To indicate that dead charge check condition of AR is met To indicate that synchronism check condition of AR is met To indicate that synchrocheck condition of AR is met Synchronism voltage circuit is abnormal (UB) Synchronism voltage circuit is abnormal (UL) Auto-reclosing 176 177 178 79.On 79.Off 79.Close Automatic reclosure is enabled Automatic reclosure is disabled Output of auto-reclosing signal

Date: 2012-08-14
9-15
No. 179 180 181 182 183 184 185 186 187 188 189 79.Ready 79.AR_Blkd 79.Active 79.Inprog 79.Inprog_1P 79.Inprog_3P 79.Inprog_3PS1 79.Inprog_3PS2 79.Inprog_3PS3 79.Inprog_3PS4 79.WaitToSlave Signal Description Automatic reclosure have been ready for reclosing cycle Automatic reclosure is blocked Automatic reclosing logic is actived Automatic reclosing cycle is in progress The first 1-pole AR cycle is in progress 3-pole AR cycle is in progress First 3-pole AR cycle is in progress Second 3-pole AR cycle is in progress Third 3-pole AR cycle is in progress Fourth 3-pole AR cycle is in progress Waiting signal of automatic reclosing which will be sent to slave (when reclosing multiple circuit breakers) Single-phase circuit breaker will be tripped once protection device operates Three-phase circuit breaker will be tripped once protection device operates Auto-reclosing fails Auto-reclosing is successful Synchrocheck for AR fails Output of 1-pole AR mode Output of 3-pole AR mode Output of 1/3-pole AR mode Transfer trip 198 199 200 TT.Alm TT.Op TT.On Input signal of receiving transfer trip is abnormal Transfer trip operates Transfer trip is enabled Trip logic 201 202 203 204 205 206 TrpA TrpB TrpC Trp 3PTrp BFI_A Tripping A-phase circuit breaker Tripping B-phase circuit breaker Tripping C-phase circuit breaker Tripping any phase circuit breaker Tripping three-phase circuit breaker Protection tripping signal of A-phase configured to initiate BFP, BFI signal shall be reset immediately after tripping signal drops off. Protection tripping signal of B-phase configured to initiate BFP, BFI signal shall be reset immediately after tripping signal drops off. Protection tripping signal of C-phase configured to initiate BFP, BFI signal shall be reset immediately after tripping signal drops off. Protection tripping signal configured to initiate BFP, BFI signal shall be reset immediately after tripping signal drops off. Initiating three-phase tripping due to failure in fault phase selection Blocking auto-reclosing
190
79.Prem_Trp1P
191 192 193 194 195 196 197
79.Prem_Trp3P 79.Fail_Rcls 79.Succ_Rcls 79.Fail_Chk 79.Mode_1PAR 79.Mode_3PAR 79.Mode_1/3PAR
207
BFI_B
208
BFI_C
209 210 211
BFI Trp3P_PSFail BlockAR
9-16
Date: 2012-08-14
No. Signal VT circuit supervision 212 213 VTS.Alm VTNS.Alm Alarm signal to indicate VT circuit fails Alarm signal to indicate VT neutral point fails CT circuit supervision 214 CTS.Alm Alarm signal to indicate CT circuit fails Control and Synchrocheck for Manual Closing 215 216 Op_Opnxx Op_Clsxx No.xx command output for open. No.xx command output for closing. Faulty phase selection 217 218 219 220 PhSA PhSB PhSC Neut Phase-A is selected as faulty phase Phase-B is selected as faulty phase Phase-C is selected as faulty phase Earth fault Description

Date: 2012-08-14
9-17
9-18
Date: 2012-08-14
10 Communication
10 Communication Table of Contents

10 Communication ............................................................................ 10-a
10.1 Overview ...................................................................................................... 10-1 10.2 Rear Communication Port Information ..................................................... 10-1
10.2.1 RS-485 Interface ............................................................................................................ 10-1 10.2.2 Ethernet Interface .......................................................................................................... 10-3 10.2.3 IEC60870-5-103 Communication ................................................................................... 10-4
10.3 IEC60870-5-103 Interface over Serial Port ................................................ 10-4

10.3.1 Physical Connection and Link Layer .............................................................................. 10-5 10.3.2 Initialization .................................................................................................................... 10-5 10.3.3 Time Synchronization ..................................................................................................... 10-5 10.3.4 Spontaneous Events ...................................................................................................... 10-5 10.3.5 General Interrogation ..................................................................................................... 10-5 10.3.6 General Service ............................................................................................................. 10-6 10.3.7 Disturbance Records ..................................................................................................... 10-6
10.4 Messages Description for IEC61850 Protocol .......................................... 10-6

10.4.1 Overview ........................................................................................................................ 10-6 10.4.2 Communication profiles ................................................................................................. 10-7 10.4.3 Server data organization ................................................................................................ 10-8 10.4.4 Server features and configuration ................................................................................ 10-10 10.4.5 ACSI Conformance ...................................................................................................... 10-12 10.4.6 Logical Nodes .............................................................................................................. 10-16
10.5 DNP3.0 Interface ....................................................................................... 10-18

10.5.1 Overview ...................................................................................................................... 10-18 10.5.2 Link Layer Functions .................................................................................................... 10-19 10.5.3 Transport Functions ..................................................................................................... 10-19

Date: 2011-07-06
10-a
10 Communication
10.5.4 Application Layer Functions ......................................................................................... 10-19
List of Figures
Figure 10.2-1 EIA RS-485 bus connection arrangements.....................................................10-2 Figure 10.2-2 Ethernet communication cable .......................................................................10-3 Figure 10.2-3 Ethernet communication structure .................................................................10-4
10-b
Date: 2011-07-06
10 Communication
10.1 Overview
This section outlines the remote communications interfaces of NR Relays. The protective device supports a choice of three protocols via the rear communication interface (RS-485 or Ethernet), selected via the model number by setting. The protocol provided by the protective device is indicated in the menu SettingsDevice SetupComm Settings. The rear EIA RS-485 interface is isolated and is suitable for permanent connection of whichever protocol is selected. The advantage of this type of connection is that up to 32 protective devices can be daisy chained together using a simple twisted pair electrical connection. It should be noted that the descriptions contained within this section do not aim to fully detail the protocol itself. The relevant documentation for the protocol should be referred to for this information. This section serves to describe the specific implementation of the protocol in the relay.
10.2 Rear Communication Port Information

10.2.1 RS-485 Interface
This protective device provides two rear RS-485 communication ports, and each port has three terminals in the 12-terminal screw connector located on the back of the relay and each port has a ground terminal for the earth shield of the communication cable. The rear ports provide RS-485 serial data communication and are intended for use with a permanently wired connection to a remote control center. 10.2.1.1 EIA RS-485 Standardized Bus The EIA RS-485 two-wire connection provides a half-duplex fully isolated serial connection to the product. The connection is polarized and whilst the products connection diagrams indicate the polarization of the connection terminals it should be borne in mind that there is no agreed definition of which terminal is which. If the master is unable to communicate with the product, and the communication parameters match, then it is possible that the two-wire connection is reversed. 10.2.1.2 Bus Termination The EIA RS-485 bus must have 120 (Ohm) Watt terminating resistors fitted at either end across the signal wires (refer to Figure 10.2-1). Some devices may be able to provide the bus terminating resistors by different connection or configuration arrangements, in which case separate external components will not be required. However, this product does not provide such a facility, so if it is located at the bus terminus then an external termination resistor will be required.

Date: 2011-07-06
10-1
10 Communication
EIA RS-485
Master
120 Ohm
120 Ohm
Slave
Slave
Slave
Figure 10.2-1 EIA RS-485 bus connection arrangements
10.2.1.3 Bus Connections & Topologies The EIA RS-485 standard requires that each device is directly connected to the physical cable that is the communications bus. Stubs and tees are expressly forbidden, such as star topologies. Loop bus topologies are not part of the EIA RS-485 standard and are forbidden by it also. Two-core screened cable is recommended. The specification of the cable will be dependent on the application, although a multi-strand 0.5mm2 per core is normally adequate. Total cable length must not exceed 500m. The screen must be continuous and connected to ground at one end, normally at the master connection point; it is important to avoid circulating currents, especially when the cable runs between buildings, for both safety and noise reasons. This product does not provide a signal ground connection. If a signal ground connection is present in the bus cable then it must be ignored, although it must have continuity for the benefit of other devices connected to the bus. At no stage must the signal ground be connected to the cables screen or to the products chassis. This is for both safety and noise reasons. 10.2.1.4 Biasing It may also be necessary to bias the signal wires to prevent jabber. Jabber occurs when the signal level has an indeterminate state because the bus is not being actively driven. This can occur when all the slaves are in receive mode and the master is slow to turn from receive mode to transmit mode. This may be because the master purposefully waits in receive mode, or even in a high impedance state, until it has something to transmit. Jabber causes the receiving device(s) to miss the first bits of the first character in the packet, which results in the slave rejecting the message and consequentially not responding. Symptoms of these are poor response times (due to retries), increasing message error counters, erratic communications, and even a complete failure to communicate. Biasing requires that the signal lines be weakly pulled to a defined voltage level of about 1V. There should only be one bias point on the bus, which is best situated at the master connection point. The DC source used for the bias must be clean; otherwise noise will be injected. Note that some devices may (optionally) be able to provide the bus bias, in which case external components will not be required.
10-2
Date: 2011-07-06
10 Communication
Note! It is extremely important that the 120 termination resistors are fitted. Failure to do so will result in an excessive bias voltage that may damage the devices connected to the bus. As the field voltage is much higher than that required, NR cannot assume responsibility for any damage that may occur to a device connected to the network as a result of incorrect application of this voltage. Ensure that the field voltage is not being used for other purposes (i.e. powering logic inputs) as this may cause noise to be passed to the communication network.
10.2.2 Ethernet Interface

This protective device can provide four rear Ethernet interfaces (optional) and they are unattached each other. Parameters of each Ethernet port can be configured in the menu SettingsDevice SetupComm Settings. 10.2.2.1 Ethernet Standardized Communication Cable It is recommended to use twisted screened eight-core cable as the communication cable. A picture is shown bellow.
Figure 10.2-2 Ethernet communication cable
10.2.2.2 Connections and Topologies Each equipment is connected with an exchanger via communication cable, and thereby it forms a star structure network. Dual-network is recommended in order to increase reliability. SCADA is also connected to the exchanger and will play a role of master station, so the every equipment which has been connected to the exchanger will play a role of slave unit.

Date: 2011-07-06
10-3
10 Communication
SCADA
Switch: Net A Switch: Net B
Figure 10.2-3 Ethernet communication structure
10.2.3 IEC60870-5-103 Communication

The IEC specification IEC60870-5-103: Telecontrol Equipment and Systems, Part 5: Transmission Protocols Section 103 defines the use of standards IEC60870-5-1 to IEC60870-5-5 to perform communication with protective device. The standard configuration for the IEC60870-5-103 protocol is to use a twisted pair EIA RS-485 connection over distances up to 500m. It also supports to use an Ethernet connection. The relay operates as a slave in the system, responding to commands from a master station. To use the rear port with IEC60870-5-103 communication, the relevant settings to the protective device must be configured.
10.3 IEC60870-5-103 Interface over Serial Port

The IEC60870-5-103 interface over serial port (RS-485) is a master/slave interface with the protective device as the slave device. It is properly developed by NR. The protective device conforms to compatibility level 3. The following IEC60870-5-103 facilities are supported by this interface:
Initialization (reset) Time synchronization Event record extraction General interrogation General commands Disturbance records
10-4
Date: 2011-07-06
10 Communication
10.3.1 Physical Connection and Link Layer

Two EIA RS-485 standardized ports are available for IEC60870-5-103 in this protective device. The transmission speed is optional: 4800 bit/s, 9600 bit/s, 19200 bit/s or 38400 bit/s. The link layer strictly abides by the rules defined in the IEC60870-5-103.
10.3.2 Initialization
Whenever the protective device has been powered up, or if the communication parameters have been changed, a reset command is required to initialize the communications. The protective device will respond to either of the two reset commands (Reset CU or Reset FCB), the difference is that the Reset CU will clear any unsent messages in the transmit buffer. The protective device will respond to the reset command with an identification message ASDU 5, the COT (Cause Of Transmission) of this response will be either Reset CU or Reset FCB depending on the nature of the reset command.
10.3.3 Time Synchronization

The protective device time and date can be set using the time synchronization feature of the IEC60870-5-103 protocol. The protective device will correct for the transmission delay as specified in IEC60870-5-103. If the time synchronization message is sent as a send/confirm message then the protective device will respond with a confirmation. Whether the time-synchronization message is sent as a send confirmation or a broadcast (send/no reply) message, a time synchronization class 1 event will be generated/produced. If the protective device clock is synchronized using the IRIG-B input then it will not be possible to set the protective device time using the IEC60870-5-103 interface. An attempt to set the time via the interface will cause the protective device to create an event with the current date and time taken from the IRIG-B synchronized internal clock.
10.3.4 Spontaneous Events

Events are categorized using the following information:
Type identification (TYP) Function type (FUN) Information number (INF)
Messages sent to substation automation system are grouped according to IEC60870-5-103 protocol. Operating elements are sent by ASDU2 (time-tagged message with relative time), and status of binary signal and alarm element are sent by ASDU1 (time-tagged message). The cause of transmission (COT) of these responses is 1. All spontaneous events can be gained by printing, implementing submenu IEC103 Info in the menu Print.
10.3.5 General Interrogation

The GI can be used to read the status of the relay, the function numbers, and information numbers
Date: 2011-07-06
10-5
10 Communication
that will be returned during the GI cycle. The GI cycle strictly abides by the rules defined in the IEC60870-5-103. Refer the IEC60870-5-103 standard can get the enough details about general interrogation.
10.3.6 General Service

The generic functions can be used to read the setting and protection measurement of the protective device, and modify the setting. Two supported type identifications are ASDU 21 and ASDU 10. For more details about generic functions, see the IEC60870-5-103 standard. All general classification service group numbers can be gained by printing, implementing submenu IEC103 Info in the menu Print.
10.3.7 Disturbance Records

This protective device can store up to eight disturbance records in its memory. A pickup of the fault detector or an operation of the relay can make the protective device store the disturbance records. The disturbance records are stored in uncompressed format and can be extracted using the standard mechanisms described in IEC60870-5-103. All channel numbers (ACC) of disturbance data can be gained by printing, implementing submenu IEC103 Info in the menu Print.
10.4 Messages Description for IEC61850 Protocol

10.4.1 Overview
The IEC 61850 standard is the result of years of work by electric utilities and vendors of electronic equipment to produce standardized communications systems. IEC 61850 is a series of standards describing client/server and peer-to-peer communications, substation design and configuration, testing, environmental and project standards. The complete set includes:
IEC 61850-1: Introduction and overview IEC 61850-2: Glossary IEC 61850-3: General requirements IEC 61850-4: System and project management IEC 61850-5: Communications and requirements for functions and device models IEC 61850-6: Configuration description language for communication in electrical substations related to IEDs IEC 61850-7-1: Basic communication structure for substation and feeder equipment Principles and models IEC 61850-7-2: Basic communication structure for substation and feeder equipment - Abstract communication service interface (ACSI)
Date: 2011-07-06
10-6
10 Communication
IEC 61850-7-3: Basic communication structure for substation and feeder equipment Common data classes IEC 61850-7-4: Basic communication structure for substation and feeder equipment Compatible logical node classes and data classes IEC 61850-8-1: Specific Communication Service Mapping (SCSM) Mappings to MMS (ISO 9506-1 and ISO 9506-2) and to ISO/IEC 8802-3 IEC 61850-9-1: Specific Communication Service Mapping (SCSM) Sampled values over serial unidirectional multidrop point to point link IEC 61850-9-2: Specific Communication Service Mapping (SCSM) Sampled values over ISO/IEC 8802-3 IEC 61850-10: Conformance testing
These documents can be obtained from the IEC (http://www.iec.ch). It is strongly recommended that all those involved with any IEC 61850 implementation obtain this document set.
10.4.2 Communication profiles

The PCS-900 series relay supports IEC 61850 server services over TCP/IP communication protocol stacks. The TCP/IP profile requires the PCS-900 series to have an IP address to establish communications. These addresses are located in the menu SettingsDevice SetupComm Settings. 1. MMS protocol
IEC 61850 specifies the use of the Manufacturing Message Specification (MMS) at the upper (application) layer for transfer of real-time data. This protocol has been in existence for a number of years and provides a set of services suitable for the transfer of data within a substation LAN environment. Actual IEC 61850-7-2 abstract services and objects are mapped to MMS protocol services in IEC61850-8-1. 2. Client/server
This is a connection-oriented type of communication. The connection is initiated by the client, and communication activity is controlled by the client. IEC61850 clients are often substation computers running HMI programs or SOE logging software. Servers are usually substation equipment such as protection relays, meters, RTUs, transformer, tap changers, or bay controllers. 3. Peer-to-peer
This is a non-connection-oriented, high speed type of communication usually between substation equipment, such as protection relays, intelligent terminal. GOOSE is the method of peer-to-peer communication. 4. Substation configuration language (SCL)
A substation configuration language is a number of files used to describe IED and communication system realized according to IEC 61850-5 and IEC 61850-7. Each configured device has an IED

Date: 2011-07-06
10-7
10 Communication
Capability Description (ICD) file and a Configured IED Description (CID) file. The substation single line information is stored in a System Specification Description (SSD) file. The entire substation configuration is stored in a Substation Configuration Description (SCD) file. The SCD file is the combination of the individual ICD files and the SSD file, moreover, add communication system parameters (MMS, GOOSE, control block, SV control block) and the connection relationship of GOOSE and SV to SCD file.
10.4.3 Server data organization

IEC61850 defines an object-oriented approach to data and services. An IEC61850 physical device can contain one or more logical device(s) (for proxy). Each logical device can contain many logical nodes. Each logical node can contain many data objects. Each data object is composed of data attributes and data attribute components. Services are available at each level for performing various functions, such as reading, writing, control commands, and reporting. Each IED represents one IEC61850 physical device. The physical device contains one or more logical device(s), and the logical device contains many logical nodes. The logical node LPHD contains information about the IED physical device. The logical node LLN0 contains information about the IED logical device. 10.4.3.1 Digital status values The GGIO logical node is available in the PCS-900 series relays to provide access to digital status points (including general I/O inputs and warnings) and associated timestamps and quality flags. The data content must be configured before the data can be used. GGIO provides digital status points for access by clients. It is intended that clients use GGIO in order to access digital status values from the PCS-900 series relays. Clients can utilize the IEC61850 buffered reporting features available from GGIO in order to build sequence of events (SOE) logs and HMI display screens. Buffered reporting should generally be used for SOE logs since the buffering capability reduces the chances of missing data state changes. All needed status data objects are transmitted to HMI clients via buffered reporting, and the corresponding buffered reporting control block (BRCB) is defined in LLN0. 10.4.3.2 Analog values Most of analog measured values are available through the MMXU logical nodes, and metering values in MMTR, the else in MMXN, MSQI and so on. Each MMXU logical node provides data from a IED current/voltage source. There is one MMXU available for each configurable source. MMXU1 provides data from CT/VT source 1(usually for protection purpose), and MMXU2 provides data from CT/VT source 2 (usually for monitor and display purpose). All these analog data objects are transmitted to HMI clients via unbuffered reporting periodically, and the corresponding unbuffered reporting control block (URCB) is defined in LLN0. MMXUx logical nodes provide the following data for each source:
MMXU.MX.Hz: frequency MMXU.MX.PPV.phsAB: phase AB voltage magnitude and angle MMXU.MX.PPV.phsBC: phase BC voltage magnitude and angle
10-8
Date: 2011-07-06
10 Communication
MMXU.MX.PPV.phsCA: Phase CA voltage magnitude and angle MMXU.MX.PhV.phsA: phase AG voltage magnitude and angle MMXU.MX.PhV.phsB: phase BG voltage magnitude and angle MMXU.MX.PhV.phsC: phase CG voltage magnitude and angle MMXU.MX.A.phsA: phase A current magnitude and angle MMXU.MX.A.phsB: phase B current magnitude and angle MMXU.MX.A.phsC: phase C current magnitude and angle
10.4.3.3 Protection logical nodes The following list describes the protection elements for PCS-902 series relays. The specified relay will contain a subset of protection elements from this list.
PDIS: Phase-to-phase distance, phase-to-ground distance and SOTF distance PTUC: Undercurrent PTOC: Phase overcurrent, zero-sequence overcurrent and overcurrent when VT circuit failure PTTR: Thermal overload PTUV: Undervoltage PTOV: Overvoltage and auxiliary overvoltage PTOF: Overfrequency PTUF: Underfrequency PSCH: Protection scheme RBRF:Breaker failure RPSB: Power swing detection/blocking RREC: Automatic reclosing RSYN: Synchronism-check RFLO: Fault location
The protection elements listed above contain start (pickup) and operate flags, instead of any element has its own start (pickup) flag separately, all the elements share a common start (pickup) flags PTRC.ST.Str.general. The operate flag for PTOC1 is PTOC1.ST.Op.general. For PCS-902 series relays protection elements, these flags take their values from related module for the corresponding element. Similar to digital status values, the protection trip information is reported via BRCB, and BRCB also locates in LLN0. 10.4.3.4 LLN0 and other logical nodes Logical node LLN0 is essential for an IEC61850 based IED. This LN shall be used to address
Date: 2011-07-06
10-9
10 Communication
common issues for Logical Devices. Most of the public services, the common settings, control values and some device oriented data objects are available here. The public services may be BRCB, URCB and GSE control blocks and similar global defines for the whole device; the common settings include all the setting items of communication settings. System settings and some of the protection setting items, which can be configured to two or more protection elements (logical nodes). In LLN0, the item Loc is a device control object, this Do item indicates the local operation for complete logical device, when it is true, all the remote control commands to the IED will be blocked and those commands make effective until the item Loc is changed to false. In PCS-900 series relays, besides the logical nodes we describe above, there are some other logical nodes below in the IEDs:
MMXU: This LN shall be used to acquire values from CTs and VTs and calculate measurands such as r.m.s. values for current and voltage or power flows out of the acquired voltage and current samples. These values are normally used for operational purposes such as power flow supervision and management, screen displays, state estimation, etc. The requested accuracy for these functions has to be provided. LPHD: Physical device information, the logical node to model common issues for physical device. PTRC: Protection trip conditioning, it shall be used to connect the operate outputs of one or more protection functions to a common trip to be transmitted to XCBR. In addition or alternatively, any combination of operate outputs of protection functions may be combined to a new operate of PTRC. RDRE: Disturbance recorder function. It triggers the fault wave recorder and its output refers to the IEEE Standard Format for Transient Data Exchange (COMTRADE) for Power System (IEC 60255-24). All enabled channels are included in the recording, independently of the trigger mode.
10.4.4 Server features and configuration

10.4.4.1 Buffered/unbuffered reporting IEC61850 buffered and unbuffered reporting control blocks locate in LLN0, they can be configured to transmit information of protection trip information (in the Protection logical nodes), binary status values (in GGIO) and analog measured/calculated values (in MMXU, MMTR and MSQI). The reporting control blocks can be configured in CID files, and then be sent to the IED via an IEC61850 client. The following items can be configured.
TrgOps: Trigger options.
The following bits are supported by the PCS-900 series relays: Bit 1: Data-change Bit 4: Integrity Bit 5: General interrogation
OptFlds: Option Fields.

Date: 2011-07-06
10-10
10 Communication
The following bits are supported by the PCS-900 series relays: Bit 1: Sequence-number Bit 2: Report-time-stamp Bit 3: Reason-for-inclusion Bit 4: Data-set-name Bit 5: Data-reference Bit 7: EntryID (for buffered reports only) Bit 8: Conf-revision Bit 9: Segmentation
IntgPd: Integrity period.
10.4.4.2 File transfer MMS file services are supported to allow transfer of oscillography, event record or other files from a PCS-900 series relay. 10.4.4.3 Timestamps The Universal Time Coordinated(UTC for short) timestamp associated with all IEC61850 data items represents the lastest change time of either the value or quality flags of the data item. 10.4.4.4 Logical node name prefixes IEC61850 specifies that each logical node can have a name with a total length of 11 characters. The name is composed of:
A five or six-character name prefix. A four-character standard name (for example, MMXU, GGIO, PIOC, etc.). A one or two-character instantiation index.
Complete names are of the form xxxxxxPTOC1, where the xxxxxx character string is configurable. Details regarding the logical node naming rules are given in IEC61850 parts 6 and 7-2. It is recommended that a consistent naming convention be used for an entire substation project. 10.4.4.5 GOOSE services IEC61850 specifies the type of broadcast data transfer services: Generic Object Oriented Substation Events (GOOSE). IEC61850 GOOSE services provide virtual LAN (VLAN) support, Ethernet priority tagging, and Ether-type Application ID configuration. The support for VLANs and priority tagging allows for the optimization of Ethernet network traffic. GOOSE messages can be given a higher priority than standard Ethernet traffic, and they can be separated onto specific VLANs. Devices that transmit GOOSE messages also function as servers. Each GOOSE publisher contains a GOOSE control block to configure and control the transmission.

Date: 2011-07-06
10-11
10 Communication
The GOOSE transmission (including subscribing and publishing) is controlled by GOOSE link settings in device. The PCS-900 series relays support IEC61850 Generic Object Oriented Substation Event (GOOSE) communication. All GOOSE messages contain IEC61850 data collected into a dataset. It is this dataset that is transferred using GOOSE message services. The GOOSE related dataset is configured in the CID file and it is recommended that the fixed GOOSE be used for implementations that require GOOSE data transfer between PCS-900 series relays. IEC61850 GOOSE messaging contains a number of configurable parameters, all of which must be correct to achieve the successful transfer of data. It is critical that the configured datasets at the transmission and reception devices are an exact match in terms of data structure, and that the GOOSE addresses and name strings match exactly. The general steps required for transmission configuration are: 1. 2. 3. Configure the data. Configure the transmission dataset. Configure the GOOSE service settings.
The general steps required for reception configuration are: 1. 2. 3. Configure the data. Configure the GOOSE service settings Configure the reception data
10.4.5 ACSI Conformance

10.4.5.1 ACSI basic conformance statement
Services Client-Server Roles B11 B12 Server side (of Two-party Application-Association) Client side (of Two-party Application-Association) C1 C1 Y N Client Server PCS-900 Series
SCSMS Supported B21 B22 B23 B24 SCSM: IEC 61850-8-1 used SCSM: IEC 61850-9-1 used SCSM: IEC 61850-9-2 used SCSM: other Y N Y N O O Y N N N Y N Y N
Generic Substation Event Model (GSE) B31 B32 Publisher side Subscriber side O Y Y
Transmission Of Sampled Value Model (SVC) B41 B42 Publisher side Subscriber side O N N
Where:
10-12
Date: 2011-07-06
10 Communication
C1: Shall be "M" if support for LOGICAL-DEVICE model has been declared O: Optional M: Mandatory Y: N: Supported by PCS-900 series relays Currently not supported by PCS-900 series relays
10.4.5.2 ACSI models conformance statement

Services M1 M2 M3 M4 M5 M6 Reporting M7 M7-1 M7-2 M7-3 M7-4 M7-5 M7-6 M7-7 M7-8 M7-9 M7-10 M8 M8-1 M8-2 M8-3 M8-4 M8-5 M8-6 M8-7 Logging M9 M9-1 M10 GSE M12 M13 GOOSE GSSE O O O O Y N 10-13
Date: 2011-07-06
Client C2 C3 C4 C5 O O
Server C2 C3 C4 C5 O O
PCS-900 Series Y Y Y Y Y Y
Logical device Logical node Data Data set Substitution Setting group control
Buffered report control sequence-number report-time-stamp reason-for-inclusion data-set-name data-reference buffer-overflow entryID BufTm IntgPd GI Unbuffered report control sequence-number report-time-stamp reason-for-inclusion data-set-name data-reference BufTm IntgPd
O Y Y Y Y Y Y Y N Y Y M Y Y Y Y Y N N
O Y Y Y Y Y Y Y N Y Y M Y Y Y Y Y N Y
Y Y Y Y Y Y N Y N Y Y Y Y Y Y Y Y N Y
Log control IntgPd Log
O N O
O N O
N N N
10 Communication
M14 M15 M16 M17 Multicast SVC Unicast SVC Time File transfer O O M O O O M O N N Y Y
Where: C2: Shall be "M" if support for LOGICAL-NODE model has been declared C3: Shall be "M" if support for DATA model has been declared C4: Shall be "M" if support for DATA-SET, Substitution, Report, Log Control, or Time models has been declared C5: Shall be "M" if support for Report, GSE, or SMV models has been declared M: Mandatory Y: N: Supported by PCS-900 series relays Currently not supported by PCS-900 series relays
10.4.5.3 ACSI Services conformance statement

Services Server S1 ServerDirectory M Y Server/Publisher PCS-902
Application association S2 S3 S4 Associate Abort Release M M M Y Y Y
Logical device S5 LogicalDeviceDirectory M Y
Logical node S6 S7 Data S8 S9 S10 S11 Data set S12 S13 S14 S15 S16 GetDataSetValues SetDataSetValues CreateDataSet DeleteDataSet GetDataSetDirectory M O O O M Y Y N N Y GetDataValues SetDataValues GetDataDirectory GetDataDefinition M M M M Y Y Y Y LogicalNodeDirectory GetAllDataValues M M Y Y
Substitution 10-14
Date: 2011-07-06
10 Communication
S17 SetDataValues M Y
Setting group control S18 S19 S20 S21 S22 S23 SelectActiveSG SelectEditSG SetSGValuess ConfirmEditSGValues GetSGValues GetSGCBValues M/O M/O M/O M/O M/O M/O Y Y Y Y Y Y
Reporting Buffered report control block S24 S24-1 S24-2 S24-3 S25 S26 Report data-change qchg-change data-update GetBRCBValues SetBRCBValues M M M M M M Y Y N N Y Y
Unbuffered report control block S27 S27-1 S27-2 S27-3 S28 S29 Logging Log control block S30 S31 Log S32 S33 S34 QueryLogByTime QueryLogAfter GetLogStatusValues O O O N N N GetLCBValues SetLCBValues O O N N Report data-change qchg-change data-update GetURCBValues SetURCBValues M M M M M M Y Y N N Y Y
Generic substation event model (GSE) GOOSE control block S35 S36 S37 S38 S39 Control S51 S52 S53 Select SelectWithValue Cancel O M M N Y Y SendGOOSEMessage GetGoReference GetGOOSEElementNumber GetGoCBValues SetGoCBValuess M O O M M Y Y N Y N

Date: 2011-07-06
10-15
10 Communication
S54 S55 S56 Operate Command-Termination TimeActivated-Operate M O O Y Y N
File transfer S57 S58 S59 S60 Time SNTP M Y GetFile SetFile DeleteFile GetFileAttributeValues M/O O O M/O Y N N Y
10.4.6 Logical Nodes

10.4.6.1 Logical Nodes Table The PCS-902 series relays support IEC61850 logical nodes as indicated in the following table. Note that the actual instantiation of each logical node is determined by the product order code.
Nodes L: System Logical Nodes LPHD: Physical device information LLN0: Logical node zero P: Logical Nodes For Protection Functions PDIF: Differential PDIR: Direction comparison PDIS: Distance PDOP: Directional overpower PDUP: Directional underpower PFRC: Rate of change of frequency PHAR: Harmonic restraint PHIZ: Ground detector PIOC: Instantaneous overcurrent PMRI: Motor restart inhibition PMSS: Motor starting time supervision POPF: Over power factor PPAM: Phase angle measuring PSCH: Protection scheme PSDE: Sensitive directional earth fault PTEF: Transient earth fault PTOC: Time overcurrent PTOF: Overfrequency PTOV: Overvoltage PTRC: Protection trip conditioning PTTR: Thermal overload YES YES YES YES YES YES YES YES YES PCS-902 Series
10-16
Date: 2011-07-06
10 Communication
PTUC: Undercurrent PTUV: Undervoltage PUPF: Underpower factor PTUF: Underfrequency PVOC: Voltage controlled time overcurrent PVPH: Volts per Hz PZSU: Zero speed or underspeed R: Logical Nodes For Protection Related Functions RDRE: Disturbance recorder function RADR: Disturbance recorder channel analogue RBDR: Disturbance recorder channel binary RDRS: Disturbance record handling RBRF: Breaker failure RDIR: Directional element RFLO: Fault locator RPSB: Power swing detection/blocking RREC: Autoreclosing RSYN: Synchronism-check or synchronizing C: Logical Nodes For Control CALH: Alarm handling CCGR: Cooling group control CILO: Interlocking CPOW: Point-on-wave switching CSWI: Switch controller G: Logical Nodes For Generic References GAPC: Generic automatic process control GGIO: Generic process I/O GSAL: Generic security application I: Logical Nodes For Interfacing And Archiving IARC: Archiving IHMI: Human machine interface ITCI: Telecontrol interface ITMI: Telemonitoring interface A: Logical Nodes For Automatic Control ANCR: Neutral current regulator ARCO: Reactive power control ATCC: Automatic tap changer controller AVCO: Voltage control M: Logical Nodes For Metering And Measurement MDIF: Differential measurements MHAI: Harmonics or interharmonics MHAN: Non phase related harmonics or interharmonic YES YES YES YES YES YES YES YES YES YES

Date: 2011-07-06
10-17
10 Communication
MMTR: Metering MMXN: Non phase related measurement MMXU: Measurement MSQI: Sequence and imbalance MSTA: Metering statistics S: Logical Nodes For Sensors And Monitoring SARC: Monitoring and diagnostics for arcs SIMG: Insulation medium supervision (gas) SIML: Insulation medium supervision (liquid) SPDC: Monitoring and diagnostics for partial discharges X: Logical Nodes For Switchgear TCTR: Current transformer TVTR: Voltage transformer Y: Logical Nodes For Power Transformers YEFN: Earth fault neutralizer (Peterson coil) YLTC: Tap changer YPSH: Power shunt YPTR: Power transformer Z: Logical Nodes For Further Power System Equipment ZAXN: Auxiliary network ZBAT: Battery ZBSH: Bushing ZCAB: Power cable ZCAP: Capacitor bank ZCON: Converter ZGEN: Generator ZGIL: Gas insulated line ZLIN: Power overhead line ZMOT: Motor ZREA: Reactor ZRRC: Rotating reactive component ZSAR: Surge arrestor ZTCF: Thyristor controlled frequency converter ZTRC: Thyristor controlled reactive component YES YES YES
10.5 DNP3.0 Interface

10.5.1 Overview
The descriptions given here are intended to accompany this relay. The DNP3.0 protocol is not described here; please refer to the DNP3.0 protocol standard for the details about the DNP3.0 implementation. This manual only specifies which objects, variations and qualifiers are supported in this relay, and also specifies what data is available from this relay via DNP3.0.
10-18
Date: 2011-07-06
10 Communication
The relay operates as a DNP3.0 slave and supports subset level 2 of the protocol, plus some of the features from level 3. The DNP3.0 communication uses the Ethernet ports at the rear side of this relay. The Ethernet ports are optional: electrical or optical.
10.5.2 Link Layer Functions

Please see the DNP3.0 protocol standard for the details about the linker layer functions.
10.5.3 Transport Functions

Please see the DNP3.0 protocol standard for the details about the transport functions.
10.5.4 Application Layer Functions

10.5.4.1 Time Synchronization 1. Time delay measurement
Master/Slave Master Slave Function Code 0x17 0x81 Object 0x34 Variation 0x02 Qualifier 0x07
2.
Read time of device

Master/Slave Master Slave Function Code 0x01 0x81 Object 0x34 0x32 Variation 0x00, 0x01 0x01 Qualifier 0x070x07
3.
Write time of device

Master/Slave Master Slave Function Code 0x02 0x81 Object 0x32 Variation 0x01 Qualifier 0x00, 0x01, 0x07, 0x08 -
10.5.4.2 Supported Writing Functions 1. Write time of device See Section 10.5.4.1 for the details. 2. Reset the CU (Reset IIN bit7)
Master/Slave Master Slave Function Code 0x02 0x81 Object 0x50 Variation 0x01 Qualifier 0x00, 0x01 -
10.5.4.3 Supported Reading Functions 1. Supported qualifiers

Master Qualifier Slave Qualifier 0x00 0x00 0x01 0x01 0x06 0x01 0x07 0x07 0x08 0x08
2.
Supported objects and variations

10-19
Date: 2011-07-06
10 Communication
Object 1, Binary inputs

Master Variation Slave Variation 0x00 0x02 0x01 0x01 0x02 0x02
The protection operation signals, alarm signals and binary input state change signals are transported respectively according to the variation sequence in above table. Object 2, SOE
Master Variation Slave Variation 0x00 0x02 0x01 0x01 0x02 0x02 0x03 0x03
If the master qualifier is 0x07, the slave responsive qualifier is 0x27; and if the master qualifier is 0x01, 0x06 or 0x08, the slave responsive qualifier is 0x28. Object 30, Analog inputs
Master Variation Slave Variation 0x00 0x01 0x01 0x01 0x02 0x02 0x03 0x03 0x04 0x04
The measurement values are transported firstly, and then the measurement values are transported. Object 40, Analog outputs
Master Variation Slave Variation 0x00 0x01 0x01 0x01 0x02 0x02
The protection settings are transported in this object. Object 50, Time Synchronization See Section 10.5.4.1 for the details. 3. Class 0 data request The master adopts the Object 60 for the Class 0 data request and the variation is 0x01. The slave responds with the above mentioned Object 1, Object 30 and Object 40 (see Supported objects and variations in Section 10.5.4.3). 4. Class 1 data request The master adopts the Object 60 for the Class 1 data request and the variation is 0x02. The slave responds with the above mentioned Object 2 (see Supported objects and variations in Section 10.5.4.3). 5. Multiple object request The master adopts the Object 60 for the multiple object request and the variation is 0x01, 0x02, 0x03 and 0x04. The slave responds with the above mentioned Object 1, Object 2, Object 30 and Object
10-20
Date: 2011-07-06
10 Communication
40 (see Supported objects and variations in Section 10.5.4.3). 10.5.4.4 Remote Control Functions The function code 0x03 and 0x04 are supported in this relay. The function code 0x03 is for the remote control with selection; and the function code 0x04 is for the remote control with execution. The selection operation must be executed before the execution operation, and the single point control object can be supported to this relay.
Master Qualifier Slave Qualifier 0x17 0x17 0x27 0x27 0x18 0x18 0x28 0x28
The Object 12 is for the remote control functions.

Master Variation Slave Variation 0x01 0x01 Control Code 0x01: closing 0x10: tripping

Date: 2011-07-06
10-21
10 Communication
10-22
Date: 2011-07-06
11 Installation
11 Installation Table of Contents

11 Installation .................................................................................... 11-a
11.1 Overview ....................................................................................................... 11-1 11.2 Safety Information ........................................................................................ 11-1 11.3 Checking Shipment ...................................................................................... 11-2 11.4 Material and Tools Required........................................................................ 11-2 11.5 Device Location and Ambient Conditions.................................................. 11-2 11.6 Mechanical Installation ................................................................................ 11-3 11.7 Electrical Installation and Wiring ................................................................ 11-4
11.7.1 Grounding Guidelines .................................................................................................... 11-4 11.7.2 Cubicle Grounding ......................................................................................................... 11-5 11.7.3 Ground Connection on the Device ................................................................................. 11-6 11.7.4 Grounding Strips and their Installation............................................................................ 11-6 11.7.5 Guidelines for Wiring ...................................................................................................... 11-7 11.7.6 Wiring for Electrical Cables ............................................................................................ 11-7
List of Figures
Figure 11.6-1 Dimensions of PCS-902 ................................................................................... 11-3 Figure 11.6-2 panel cut-out of PCS-902 ................................................................................. 11-4 Figure 11.6-3 Demonstration of plugging a board into its corresponding slot .................. 11-4 Figure 11.7-1 Cubicle grounding system ............................................................................... 11-6 Figure 11.7-2 Ground terminal of this relay ........................................................................... 11-6 Figure 11.7-3 Ground strip and termination .......................................................................... 11-7 Figure 11.7-4 Glancing demo about the wiring for electrical cables ................................... 11-7

Date: 2011-02-28
11-a
11 Installation
11-b
Date: 2011-02-28
11 Installation
11.1 Overview
The device must be shipped, stored and installed with the greatest care. Choose the place of installation such that the communication interface and the controls on the front of the device are easily accessible. Air must circulate freely around the equipment. Observe all the requirements regarding place of installation and ambient conditions given in this instruction manual. Take care that the external wiring is properly brought into the equipment and terminated correctly and pay special attention to grounding. Strictly observe the corresponding guidelines contained in this section.
11.2 Safety Information

Modules and units may only be replaced by correspondingly trained personnel. Always observe the basic precautions to avoid damage due to electrostatic discharge when handling the equipment. In certain cases, the settings have to be configured according to the demands of the engineering configuration after replacement. It is therefore assumed that the personnel who replace modules and units are familiar with the use of the operator program on the service PC. DANGER! Only insert or withdraw the PWR module while the power supply is switched off. To this end, disconnect the power supply cable that connects with the PWR module. WARNING! Only insert or withdraw other modules while the power supply is switched off. WARNING! The modules may only be inserted in the slots designated in Section 6.2. Components can be damaged or destroyed by inserting boards in the wrong slots. DANGER! Improper handling of the equipment can cause damage or an incorrect response of the equipment itself or the primary plant. WARNING! Industry packs and ribbon cables may only be replaced or the positions of jumpers be changed on a workbench appropriately designed for working on electronic equipment. The
Date: 2011-02-28
11-1
11 Installation
modules, bus backplanes are sensitive to electrostatic discharge when not in the unit's housing. The basic precautions to guard against electrostatic discharge are as follows: Should boards have to be removed from this relay installed in a grounded cubicle in an HV switchgear installation, please discharge yourself by touching station ground (the cubicle) beforehand. Only hold electronic boards at the edges, taking care not to touch the components. Only works on boards that have been removed from the cubicle on a workbench designed for electronic equipment and wear a grounded wristband. Do not wear a grounded wristband, however, while inserting or withdrawing units. Always store and ship the electronic boards in their original packing. Place electronic parts in electrostatic screened packing materials.
11.3 Checking Shipment

Check that the consignment is complete immediately upon receipt. Notify the nearest NR Company or agent, should departures from the delivery note, the shipping papers or the order be found. Visually inspect all the material when unpacking it. When there is evidence of transport damage, lodge a claim immediately in writing with the last carrier and notify the nearest NR Company or agent. If the equipment is not going to be installed immediately, store all the parts in their original packing in a clean dry place at a moderate temperature. The humidity at a maximum temperature and the permissible storage temperature range in dry air are listed in Chapter Technical Data.
11.4 Material and Tools Required

The necessary mounting kits will be provided, including screws, pincers and assembly instructions. A suitable drill and spanners are required to secure the cubicles to the floor using the plugs provided (if this relay is mounted in cubicles).
11.5 Device Location and Ambient Conditions

The place of installation should permit easy access especially to front of the device, i.e. to the human machine interface of the equipment. There should also be free access at the rear of the equipment for additions and replacement of electronic boards. Since every piece of technical equipment can be damaged or destroyed by inadmissible ambient conditions, such as:
11-2
Date: 2011-02-28
11 Installation
1. 2.
The location should not be exposed to excessive air pollution (dust, aggressive substances). Severe vibration, extreme changes of temperature, surge voltages of high amplitude and short rise time, high levels of humidity and strong induced magnetic fields should be avoided as far as possible. Air must not be allowed to circulate freely around the equipment.
3.
The equipment can in principle be mounted in any attitude, but it is normally mounted vertically (visibility of markings). WARNING! Excessively high temperature can appreciably reduce the operating life of this relay.
11.6 Mechanical Installation

The device adopts IEC standard chassis and is rack with modular structure. It uses an integral faceplate and plug terminal block on backboard for external connections. PCS-902 series is IEC 4U high and 19 wide. Figure 11.6-1 shows its dimensions and Figure 11.6-2 shows the panel cut-out.
482.6
291
465.0
177.0
101.6
Figure 11.6-1 Dimensions of PCS-902

Date: 2011-02-28
11-3
11 Installation
465.0
101.6
4-6.8
450.0
Figure 11.6-2 panel cut-out of PCS-902
Note! It is necessary to leave enough space top and bottom of the cut-out in the cubicle for heat emission of this relay. The safety instructions must be abided by when installing the boards, please see Section 11.2 for the details. Following figure shows the installation way of a module being plugged into a corresponding slot.
Figure 11.6-3 Demonstration of plugging a board into its corresponding slot
In the case of equipment supplied in cubicles, place the cubicles on the foundations that have been prepared. Take care while doing so not to jam or otherwise damage any of the cables that have already been installed. Secure the cubicles to the foundations.
11.7 Electrical Installation and Wiring

11.7.1 Grounding Guidelines
Switching operations in HV installations generate transient over voltages on control signal cables. There is also a background of electromagnetic RF fields in electrical installations that can induce
11-4
Date: 2011-02-28
179.0
11 Installation
spurious currents in the devices themselves or the leads connected to them. All these influences can influence the operation of electronic apparatus. On the other hand, electronic apparatus can transmit interference that can disrupt the operation of other apparatus. In order to minimize these influences as far as possible, certain standards have to be observed with respect to grounding, wiring and screening. Note! All these precautions can only be effective if the station ground is of good quality.
11.7.2 Cubicle Grounding

The cubicle must be designed and fitted out such that the impedance for RF interference of the ground path from the electronic device to the cubicle ground terminal is as low as possible. Metal accessories such as side plates, blanking plates etc., must be effectively connected surface-to-surface to the grounded frame to ensure a low-impedance path to ground for RF interference. The contact surfaces must not only conduct well, they must also be non-corroding. Note! If the above conditions are not fulfilled, there is a possibility of the cubicle or parts of it forming a resonant circuit at certain frequencies that would amplify the transmission of interference by the devices installed and also reduce their immunity to induced interference. Movable parts of the cubicle such as doors (front and back) or hinged equipment frames must be effectively grounded to the frame by three braided copper strips (see Figure 11.7-1). The metal parts of the cubicle housing and the ground rail are interconnected electrically conducting and corrosion proof. The contact surfaces shall be as large as possible. Note! For metallic connections please observe the voltage difference of both materials according to the electrochemical code. The cubicle ground rail must be effectively connected to the station ground rail by a grounding strip (braided copper).

Date: 2011-02-28
11-5
11 Installation
Door or hinged equipment frame
Cubicle ground rail close to floor
Braided copper strip Station ground Conducting connection
Figure 11.7-1 Cubicle grounding system
11.7.3 Ground Connection on the Device

There is a ground terminal on the rear panel, and the ground braided copper strip can be connected with it. Take care that the grounding strip is always as short as possible. The main thing is that the device is only grounded at one point. Grounding loops from unit to unit are not allowed. There are some ground terminals on some connectors of this relay, and the sign is GND. All the ground terminals are connected in the cabinet of this relay. So, the ground terminal on the rear panel (see Figure 11.7-2) is the only ground terminal of this device.
Figure 11.7-2 Ground terminal of this relay
11.7.4 Grounding Strips and their Installation

High frequency currents are produced by interference in the ground connections and because of skin effect at these frequencies, only the surface region of the grounding strips is of consequence. The grounding strips must therefore be of (preferably tinned) braided copper and not round copper conductors, as the cross-section of round copper would have to be too large. Proper terminations must be fitted to both ends (press/pinch fit and tinned) with a hole for bolting them firmly to the items to be connected. The surfaces to which the grounding strips are bolted must be electrically conducting and non-corroding.
11-6
Date: 2011-02-28
11 Installation
The following figure shows the ground strip and termination.

Press/pinch fit cable terminal
Braided copper strip
Terminal bolt Contact surface
Figure 11.7-3 Ground strip and termination
11.7.5 Guidelines for Wiring

There are several types of cables that are used in the connection of this relay: braided copper cable, serial communication cable etc. Recommendation of each cable: Grounding: braided copper cable, 2.5mm2 ~ 6.0mm2 Power supply, binary inputs & outputs: brained copper cable, 1.0mm2 ~ 2.5mm2 AC voltage inputs: brained copper cable, 1.0mm2 ~ 2.5mm2 AC current inputs: brained copper cable, 1.5mm2 ~ 4.0mm2 Serial communication: 4-core shielded braided cable Ethernet communication: 4-pair screened twisted category 5E cable
11.7.6 Wiring for Electrical Cables

A female connector is used for connecting the wires with it, and then a female connector plugs into a corresponding male connector that is in the front of one board. See Chapter Hardware for further details about the pin defines of these connectors. The following figure shows the glancing demo about the wiring for the electrical cables.
01
02
03
04
Tighten
05
06
07
08
09
10
11 01
12
13
14
15
16
17
18
19
20
21
22
23
24
Figure 11.7-4 Glancing demo about the wiring for electrical cables

Date: 2011-02-28
11-7
11 Installation
DANGER! Never allow the current transformer (CT) secondary circuit connected to this equipment to be opened while the primary system is live. Opening the CT circuit will produce a dangerously high voltage.
11-8
Date: 2011-02-28
12 Commissioning
12 Commissioning Table of Contents

12 Commissioning ............................................................................ 12-a
12.1 Overview ...................................................................................................... 12-1 12.2 Safety Instructions ...................................................................................... 12-1 12.3 Commission Tools ...................................................................................... 12-2 12.4 Setting Familiarization ................................................................................ 12-2 12.5 Product Checks ........................................................................................... 12-3
12.5.1 With the Relay De-energized ......................................................................................... 12-3 12.5.2 With the Relay Energized............................................................................................... 12-5 12.5.3 Print Fault Report ........................................................................................................... 12-8 12.5.4 On-load Checks ............................................................................................................. 12-8
12.6 Final Checks ................................................................................................ 12-9

Date: 2011-02-28
12-a
12 Commissioning
12-b
Date: 2011-02-28
12 Commissioning
12.1 Overview
This relay is fully numerical in their design, implementing all protection and non-protection functions in software. The relay employs a high degree of self-checking and in the unlikely event of a failure, will give an alarm. As a result of this, the commissioning test does not need to be as extensive as with non-numeric electronic or electro-mechanical relays. To commission numerical relays, it is only necessary to verify that the hardware is functioning correctly and the application-specific software settings have been applied to the relay. Blank commissioning test and setting records are provided at the end of this manual for completion as required. Before carrying out any work on the equipment, the user should be familiar with the contents of the safety and technical data sections and the ratings on the equipments rating label.
12.2 Safety Instructions

WARNING! Hazardous voltages are present in this electrical equipment during operation. Non-observance of the safety rules can result in severe personal injury or property damage. WARNING! Only the qualified personnel shall work on and around this equipment after becoming thoroughly familiar with all warnings and safety notices of this manual as well as with the applicable safety regulations. Particular attention must be drawn to the following: The earthing screw of the device must be connected solidly to the protective earth conductor before any other electrical connection is made. Hazardous voltages can be present on all circuits and components connected to the supply voltage or to the measuring and test quantities. Hazardous voltages can be present in the device even after disconnection of the supply voltage (storage capacitors!) The limit values stated in the Chapter Technical Data must not be exceeded at all, not even during testing and commissioning. When testing the device with secondary test equipment, make sure that no other measurement quantities are connected. Take also into consideration that the trip circuits and maybe also close commands to the circuit breakers and other primary switches are disconnected from the device unless expressly stated.

Date: 2011-02-28
12-1
12 Commissioning
DANGER! Current transformer secondary circuits must have been short-circuited before the current leads to the device are disconnected. WARNING! Primary test may only be carried out by qualified personnel, who are familiar with the commissioning of protection system, the operation of the plant and safety rules and regulations (switching, earthing, etc.).
12.3 Commission Tools

Minimum equipment required: Multifunctional dynamic current and voltage injection test set with interval timer. Multimeter with suitable AC current range and AC/DC voltage ranges of 0~440V and 0~250V respectively. Continuity tester (if not included in the multimeter). Phase angle meter. Phase rotation meter. Note! Modern test set may contain many of the above features in one unit. Optional equipment: An electronic or brushless insulation tester with a DC output not exceeding 500V (for insulation resistance test when required). A portable PC, with appropriate software (this enables the rear communications port to be tested, if this is to be used, and will also save considerable time during commissioning). EIA RS-485 to EIA RS-232 converter (if EIA RS-485 IEC60870-5-103 port is being tested). PCS-900 serials dedicated protection tester HELP-2000.
12.4 Setting Familiarization

When commissioning this device for the first time, sufficient time should be allowed to become familiar with the method by which the settings are applied. A detailed description of the menu structure of this relay is contained in Chapter Operation Theory and Chapter Settings. With the front cover in place all keys are accessible. All menu cells can be read. The LED indicators and alarms can be reset. Protection or configuration settings can be changed, or fault
12-2
Date: 2011-02-28
12 Commissioning
and event records cleared. However, menu cells will require the appropriate password to be entered before changes can be made. Alternatively, if a portable PC is available together with suitable setting software (such as PCS-9700 SAS software), the menu can be viewed one page at a time to display a full column of data and text. This PC software also allows settings to be entered more easily, saved to a file on disk for future reference or printed to produce a setting record. Refer to the PC software user manual for details. If the software is being used for the first time, allow sufficient time to become familiar with its operation.
12.5 Product Checks

These product checks cover all aspects of the relay which should be checked to ensure that it has not been physically damaged prior to commissioning, is functioning correctly and all input quantity measurements are within the stated tolerances. If the application-specific settings have been applied to the relay prior to commissioning, it is advisable to make a copy of the settings so as to allow them restoration later. This could be done by extracting the settings from the relay itself via printer or manually creating a setting record.
12.5.1 With the Relay De-energized

This relay is fully numerical and the hardware is continuously monitored. Commissioning tests can be kept to a minimum and need only include hardware tests and conjunctive tests. The function tests are carried out according to users correlative regulations. The following tests are necessary to ensure the normal operation of the equipment before it is first put into service. Hardware tests These tests are performed for the following hardware to ensure that there is no hardware defect. Defects of hardware circuits other than the following can be detected by self-monitoring when the DC power is supplied. User interfaces test Binary input circuits and output circuits test AC input circuits test Function tests These tests are performed for the following functions that are fully software-based. Tests of the protection schemes and fault locator require a dynamic test set. Measuring elements test Timers test Measurement and recording test
12-3
Date: 2011-02-28
12 Commissioning
Conjunctive tests The tests are performed after the relay is connected with the primary equipment and other external equipment.
On load test. Phase sequence check and polarity check.
12.5.1.1 Visual Inspection After unpacking the product, check for any damage to the relay case. If there is any damage, the internal module might also have been affected, contact the vendor. The following items listed is necessary. Protection panel Carefully examine the protection panel, protection equipment inside and other parts inside to see that no physical damage has occurred since installation. The rated information of other auxiliary protections should be checked to ensure it is correct for the particular installation. Panel wiring Check the conducting wire which is used in the panel to assure that their cross section meeting the requirement. Carefully examine the wiring to see that they are no connection failure exists. Label Check all the isolator binary inputs, terminal blocks, indicators, switches and push buttons to make sure that their labels meet the requirements of this project. Device plug-in modules Check each plug-in module of the equipments on the panel to make sure that they are well installed into the equipment without any screw loosened. Earthing cable Check whether the earthing cable from the panel terminal block is safely screwed to the panel steel sheet. Switch, keypad, isolator binary inputs and push button Check whether all the switches, equipment keypad, isolator binary inputs and push buttons work normally and smoothly. 12.5.1.2 Insulation Test (if required) Insulation resistance tests are only necessary during commissioning if it is required for them to be done and they have not been performed during installation.
12-4
Date: 2011-02-28
12 Commissioning
Isolate all wiring from the earth and test the isolation with an electronic or brushless insulation tester at a DC voltage not exceeding 500V, The circuits need to be tested should include: Voltage transformer circuits Current transformer circuits DC power supply Optic-isolated control inputs Output contacts Communication ports
The insulation resistance should be greater than 100M at 500V. Test method: To unplug all the terminals sockets of this relay, and do the Insulation resistance test for each circuit above with an electronic or brushless insulation tester. On completion of the insulation resistance tests, ensure all external wiring is correctly reconnected to the protection. 12.5.1.3 External Wiring Check that the external wiring is correct to the relevant relay diagram and scheme diagram. Ensure as far as practical that phasing/phase rotation appears to be as expected. Check the wiring against the schematic diagram for the installation to ensure compliance with the customers normal practice. 12.5.1.4 Auxiliary Power Supply The relay only can be operated under the auxiliary power supply depending on the relays nominal power supply rating. The incoming voltage must be within the operating range specified in Chapter Technical Data, before energizing the relay, measure the auxiliary supply to ensure it within the operating range. Other requirements to the auxiliary power supply are specified in Chapter Technical Data. See this section for further details about the parameters of the power supply. WARNING! Energize this relay only if the power supply is within the specified operating ranges in Chapter Technical Data.
12.5.2 With the Relay Energized

The following groups of checks verify that the relay hardware and software is functioning correctly and should be carried out with the auxiliary supply applied to the relay.

Date: 2011-02-28
12-5
12 Commissioning
The current and voltage transformer connections must remain isolated from the relay for these checks. The trip circuit should also remain isolated to prevent accidental operation of the associated circuit breaker. 12.5.2.1 Front Panel LCD Display Connect the relay to DC power supply correctly and turn the relay on. Check program version and forming time displayed in command menu to ensure that are corresponding to what ordered. 12.5.2.2 Date and Time If the time and date is not being maintained by substation automation system, the date and time should be set manually. Set the date and time to the correct local time and date using menu item Clock. In the event of the auxiliary supply failing, with a battery fitted on CPU board, the time and date will be maintained. Therefore when the auxiliary supply is restored the time and date will be correct and not need to set again. To test this, remove the auxiliary supply from the relay for approximately 30s. After being re-energized, the time and date should be correct. 12.5.2.3 Light Emitting Diodes (LEDs) On power up, the green LED HEALTHY should have illuminated and stayed on indicating that the relay is healthy. The relay has latched signal relays which remember the state of the trip, auto-reclose when the relay was last energized from an auxiliary supply. Therefore these indicators may also illuminate when the auxiliary supply is applied. If any of these LEDs are on then they should be reset before proceeding with further testing. If the LED successfully reset, the LED goes out. There is no testing required for that that LED because it is known to be operational. It is likely that alarms related to voltage transformer supervision will not reset at this stage. 12.5.2.4 Testing HEALTHY and ALARM LEDs Apply the rated DC power supply and check that the HEALTHY LED is lighting in green. We need to emphasize that the HEALTHY LED is always lighting in operation course except that the equipment find serious errors in it. Produce one of the abnormal conditions listed in Chapter Supervision, the ALARM LED will light in yellow. When abnormal condition reset, the ALARM LED extinguishes. 12.5.2.5 Testing AC Current Inputs This test verified that the accuracy of current measurement is within the acceptable tolerances. Apply rated current to each current transformer input in turn; checking its magnitude using a multimeter/test set readout. The corresponding reading can then be checked in the relays menu. The measurement accuracy of the protection is 2.5% or 0.02In. However, an additional allowance
12-6
Date: 2011-02-28
12 Commissioning
must be made for the accuracy of the test equipment being used. Note! The closing circuit should remain isolated during these checks to prevent accidental operation of the associated circuit breaker.
Group No. Item Ia Three-phase current 1 Ib Ic Ia Three-phase current 2 Ib Ic Ia Three-phase current 3 Ib Ic Ia Three-phase current Ib Ic Input Value Input Angle Display Value Display Angle
12.5.2.6 Testing AC Voltage Inputs This test verified that the accuracy of voltage measurement is within the acceptable tolerances. Apply rated voltage to each voltage transformer input in turn; checking its magnitude using a multimeter/test set readout. The corresponding reading can then be checked in the relays menu. The measurement accuracy of the relay is 2.5% or 0.1V. However an additional allowance must be made for the accuracy of the test equipment being used. Note! The closing circuit should remain isolated during these checks to prevent accidental operation of the associated circuit breaker.
Group No. Item Ua Three-phase voltage 1 Ub Uc Ua Three-phase voltage 2 Ub Uc Three-phase voltage 3 Ua Input Value Input Angle Display Value Display Angle

Date: 2011-02-28
12-7
12 Commissioning
Group No. Item Ub Uc Ua Three-phase voltage Ub Uc Input Value Input Angle Display Value Display Angle
12.5.2.7 Testing Binary Inputs This test checks that all the binary inputs on the equipment are functioning correctly. The binary inputs should be energized one at a time, see external connection diagrams for terminal numbers. Ensure that the voltage applied on the binary input must be within the operating range. The status of each binary input can be viewed using relay menu. Sign 1 denotes an energized input and sign 0 denotes a de-energized input.
Terminal No. Signal Name BI Status on LCD Correct?
12.5.3 Print Fault Report

In order to acquire the details of protection operation, it is convenient to print the fault report of protection device. The printing work can be easily finished when operator presses the print button on panel of protection device to energize binary input [BI_Print] or operate control menu. What should be noticed is that only the latest fault report can be printed if operator presses the print button. A complete fault report includes the content shown as follows. 1) Trip event report 2) Binary input when protection devices start 3) Self-check and the transition of binary input in the process of devices start 4) Fault wave forms compatible with COMTRADE 5) The setting value when the protection device trips
12.5.4 On-load Checks

The objectives of the on-load checks are:
12-8
Date: 2011-02-28
Confirm the external wiring to the current and voltage inputs is correct. Measure the magnitude of on-load current and voltage (if applicable). Check the polarity of each current transformer.
12 Commissioning
However, these checks can only be carried out if there are no restrictions preventing the tenderization of the plant being protected. Remove all test leads, temporary shorting leads, etc. and replace any external wiring that has been removed to allow testing. If it has been necessary to disconnect any of the external wiring from the protection in order to perform any of the foregoing tests, it should be ensured that all connections are replaced in accordance with the relevant external connection or scheme diagram. Confirm current and voltage transformer wiring.
12.6 Final Checks

After the above tests are completed, remove all test or temporary shorting leads, etc. If it has been necessary to disconnect any of the external wiring from the protection in order to perform the wiring verification tests, it should be ensured that all connections are replaced in accordance with the relevant external connection or scheme diagram. Ensure that the protection has been restored to service. If the protection is in a new installation or the circuit breaker has just been maintained, the circuit breaker maintenance and current counters should be zero. If a test block is installed, remove the test plug and replace the cover so that the protection is put into service. Ensure that all event records, fault records, disturbance records and alarms have been cleared and LEDs has been reset before leaving the protection.

Date: 2011-02-28
12-9
12 Commissioning
12-10
Date: 2011-02-28
13 Maintenance
13 Maintenance Table of Contents

13 Maintenance ................................................................................. 13-a
13.1 Appearance Check ...................................................................................... 13-1 13.2 Failure Tracing And Repair ......................................................................... 13-1 13.3 Replace Failed Modules ............................................................................. 13-1 13.4 Cleaning ....................................................................................................... 13-3 13.5 Storage ......................................................................................................... 13-3

Date: 2011-02-28
13-a
13 Maintenance
13-b
Date: 2011-02-28
13 Maintenance
NR numerical relay PCS-902 is designed to require no special maintenance. All measurement and signal processing circuit are fully solid state. All input modules are also fully solid state. The output relays are hermetically sealed. Since the device is almost completely self-monitored, from the measuring inputs to the output relays, hardware and software defects are automatically detected and reported. The self-monitoring ensures the high availability of the device and generally allows for a corrective rather than preventive maintenance strategy. Therefore, maintenance checks in short intervals are not required. Operation of the device is automatically blocked when a hardware failure is detected. If a problem is detected in the external measuring circuits, the device normally only provides alarm messages.
13.1 Appearance Check

1. The relay case should be clean without any dust stratification. Case cover should be sealed well. No component has any mechanical damage and distortion, and they should be firmly fixed in the case. Relay terminals should be in good condition. The keys on the front panel with very good feeling can be operated flexibly. 2. It is only allowed to plug or withdraw relay board when the supply is reliably switched off. Never allow the CT secondary circuit connected to this equipment to be opened while the primary system is live when withdrawing an AC module. Never try to insert or withdraw the relay board when it is unnecessary. 3. Check weld spots on PCB whether they are well soldered without any rosin joint. All dual inline components must be well plugged.
13.2 Failure Tracing And Repair

Failures will be detected by automatic supervision or regular testing. When a failure is detected by supervision, a remote alarm is issued and the failure is indicated on the front panel with LED indicators and LCD display. It is also recorded in the event record. Failures detected by supervision are traced by checking the Superv Events screen on the LCD. When a failure is detected during regular testing, confirm the following:
Test circuit connections are correct Modules are securely inserted in position Correct DC power voltage is applied Correct AC inputs are applied Test procedures comply with those stated in the manual
13.3 Replace Failed Modules

If the failure is identified to be in the relay module and the user has spare modules, the user can
Date: 2011-02-28
13-1
13 Maintenance
recover the protection by replacing the failed modules. Repair at the site should be limited to module replacement. Maintenance at the component level is not recommended. Check that the replacement module has an identical module name (AI, PWR, CPU, SIG, BI, BO, etc.) and hardware type-form as the removed module. Furthermore, the CPU module replaced should have the same software version. In addition, the AI and PWR module replaced should have the same ratings. The module name is indicated on the top front of the module. The software version is indicated in LCD menu Version Info. Caution! When handling a module, take anti-static measures such as wearing an earthed wrist band and placing modules on an earthed conductive mat. Otherwise, many of the electronic components could suffer damage. After replacing the CPU module, check the settings. 1)
Replacing a module Switch off the DC power supply Disconnect the trip outputs Short circuit all AC current inputs and disconnect all AC voltage inputs Unscrew the module. Warning! Hazardous voltage can be present in the DC circuit just after switching off the DC power supply. It takes approximately 30 seconds for the voltage to discharge.
2)
Replacing the Human Machine Interface Module (front panel) Open the relay front panel Unplug the ribbon cable on the front panel by pushing the catch outside. Detach the HMI module from the relay Attach the replacement module in the reverse procedure. Replacing the AI, PWR, CPU, BI or BO module Unscrew the module connector Unplug the connector from the target module. Unscrew the module. Pull out the module
3)
13-2
Date: 2011-02-28
13 Maintenance
Inset the replacement module in the reverser procedure. After replacing the CPU module, input the application-specific setting values again. Warning! Units and modules may only be replaced while the supply is switched off and only by appropriately trained and qualified personnel. Strictly observe the basic precautions to guard against electrostatic discharge. Warning! When handling a module, take anti-static measures such as wearing an earthed wrist band and placing modules on an earthed conductive mat. Otherwise, many of the electronic components could suffer damage. After replacing the CPU module, check the settings. Danger! After replacing modules, be sure to check that the same configuration is set as before the replacement. If this is not the case, there is a danger of the unintended operation of switchgear taking place or of protections not functioning correctly. Persons may also be put in danger.
13.4 Cleaning
Before cleaning the relay, ensure that all AC/DC supplies, current transformer connections are isolated to prevent any chance of an electric shock whilst cleaning. Use a smooth cloth to clean the front panel. Do not use abrasive material or detergent chemicals.
13.5 Storage
The spare relay or module should be stored in a dry and clean room. Based on IEC standard 60255-1 the storage temperature should be from -40oC to +70oC, but the temperature of from 0oC to +40oC is recommended for long-term storage.

Date: 2011-02-28
13-3
13 Maintenance
13-4
Date: 2011-02-28
14 Decommissioning and Disposal Table of Contents

14 Decommissioning and Disposal................................................. 14-a
14.1 Decommissioning ....................................................................................... 14-1 14.2 Disposal ....................................................................................................... 14-1

Date: 2011-02-28
14-a
14-b
Date: 2011-02-28
14.1 Decommissioning
1. Switching off
To switch off the PCS-902, switch off the external miniature circuit breaker of the power supply. 2. Disconnecting Cables
Disconnect the cables in accordance with the rules and recommendations made by relational department. Danger! Before disconnecting the power supply cables that connected with the PWR module of the PCS-902, make sure that the external miniature circuit breaker of the power supply is switched off. Danger! Before disconnecting the cables that are used to connect analog input module with the primary CTs and VTs, make sure that the circuit breaker for the primary CTs and VTs is switched off. 3. Dismantling
The PCS-902 rack may now be removed from the system cubicle, after which the cubicles may also be removed. Danger! When the station is in operation, make sure that there is an adequate safety distance to live parts, especially as dismantling is often performed by unskilled personnel.
14.2 Disposal
In every country there are companies specialized in the proper disposal of electronic waste. Note! Strictly observe all local and national regulations when disposing of the device.

Date: 2011-02-28
14-1
14-2
Date: 2011-02-28

In the latest version of the instruction manual, several descriptions on existing features have been modified. Manual version and modification history records
Manual Version Source New R1.00 R1.00 R1.01 Software Version R1.00 R1.00 Date 2011-07-06 2011-08-18 Description of change Form the original manual. Add frequency protection Add stub overcurrent protection Add the description about C37.94 Rewrite datas of ambient temperature and humidity range and binary input Amend fault detector (FD) Add load encroachment element R1.01 R1.02 R1.10 2011-12-23 Delete blinder element Add broken conductor protection Amend descriptions of supervision alarms Add remote control function Add explanations about that external CT circuit is closed itself Rewrite configurable function based on PCS-Explorer R1.02 R1.03 R1.10 2012-03-15 Modify remote control function Add GOOSE alarm signals Modify setting range of underfrequency protection Add blocking AR logic Add dead zone protection Modify logic of power swing blocking releasing Modify logic of reclosing failure and success Add zone 5 of distance protection
R1.03
R1.04
R1.10
2012-05-09 2012-07-02
R1.04
R1.05
R2.00
2012-07-07 2012-07-07 2012-08-14

Date: 2012-08-14
15-1
15-2
Date: 2012-08-14

NANJING REL Manual

Uploaded by

Document Information

Original Title

Copyright

Available Formats

Share this document

Share or Embed Document

Sharing Options

Did you find this document useful?

Is this content inappropriate?

Copyright:

Available Formats

NANJING REL Manual

Uploaded by

Copyright:

Available Formats

PCS-902 Line Distance Relay Instruction Manual

NR Electric Co., Ltd.

Health and Safety

Instructions and Warnings

PCS-902 Line Distance Relay

Carefully handle the connection cable without applying excessive force.

PCS-902 Line Distance Relay

8 Human Machine Interface

PCS-902 Line Distance Relay

14 Decommissioning and Disposal

15 Manual Version History

Typographic and Graphical Conventions

Binary signal via opto-coupler

Input signal from comparator with setting

Input signal of logic setting for function enabling

PCS-902 Line Distance Relay

Input of binary signal except those signals via opto-coupler

Timer (optional definite-time or inverse-time characteristic)

Timer [delay pickup (10ms), delay dropoff (0ms), non-settable]

Timer (delay pickup, settable)

Timer (delay dropoff, settable)

Timer (delay pickup, delay dropoff, settable)

Timer (inverse-time characteristic)

---xxx is the symbol

PCS-902 Line Distance Relay

1 Introduction Table of Contents

PCS-902 Line Distance Relay

PCS-902 Line Distance Relay

Optical fibre channel or PLC channel

Communication channel via direct dedicated fibre, MUX or PLC

Figure 1.1-1 Typical application of PCS-902

PCS-902 Line Distance Relay

50STB (Only for one and a half breakers arrangement) SOTF 25 79

PCS-902 Line Distance Relay

Thermal overload protection Stub overcurrent protection Dead zone protection

PCS-902 Line Distance Relay

PCS-902 Line Distance Relay

PCS-902 Line Distance Relay

PCS-902 Line Distance Relay

PCS-902 Line Distance Relay

2 Technical Data Table of Contents

2.5 Type Tests ........................................................................................................ 2-5

2.6 Certifications ................................................................................................... 2-6 2.7 Protective Functions....................................................................................... 2-7

PCS-902 Line Distance Relay

PCS-902 Line Distance Relay

2.1 Electrical Specifications

Up to 7 current input according to various applications

2.1.2 AC Voltage Input

2.1.3 Power Supply

2.1.4 Binary Input

PCS-902 Line Distance Relay

110V 1.1mA 60.5~77V

125V 1.25mA 70~87.5V

220V 2.2mA 121~154V

2.1.5 Binary Output

Output mode Continuous carry Pickup time Dropoff time

Fast signaling contact

Output mode Continuous carry Pickup time Dropoff time

Breaking capacity (L/R=0ms)

Maximal system voltage 2-2

380Vac PCS-902 Line Distance Relay

2.2 Mechanical Specifications

2.3 Ambient Temperature and Humidity Range