A Wideband Sigma-Delta PLL based Phase Modulator

With Pre-distortion Filter

Shuai Jiang, Fei You, Songbai He
School of Electronic Engineering
University of Electronic Science and Technology of China
Chengdu, China
E-mail: jiangshuai_uestc@163.com
AbstractA wideband sigma-delta PLL based phase
modulator is presented in this paper. In the proposed
architecture a pre-distortion filter is applied to balance the
phase signals, compensating the suppression beyond the loop
bandwidth. By properly balancing the PLL transmission
characteristics, the data rate limitation is relieved to the sigma-
delta PLL bandwidth. The applicable condition of pre-
distortion filter is also analyzed in this paper. The simulation
results show that with PLL bandwidth of 1MHz the maximum
phase error is no more than 10eand that RMS error is only
0.06ewhen transmitting 2.85 Mbps GMSK signals.
KeywordsPre-distortion filter, sigma-delta PLL, Phase
modulation.
I. INTRODUCTION
To meet the continuously growing of the modern
wireless communication, high data rate is required to the
communication standards such as WCDMA, EDGE, which
employ modulation schemes both envelop and the phase of
the carrier frequency [1]. Moreover more and more
communication standards are concomitant which demands
that the mobile devices should support these standards
simultaneously with one transmitter to reduce the cost and
enhance the performances. Polar transmitters are attractive
candidates for highly reconfigurable multimode, multiband,
power efficient for mobile devices [2]. However, the
nonlinear Cartesian-to-polar coordinate transformation
results in much larger phase modulation bandwidth [3]. As a
key component of polar transmitter, the phase modulator is
required to support the wideband phase modulation,
meanwhile still meeting the fine phase modulation resolution.
The phase modulator can be realized in either mixer-based or
PLL-based architecture [4]. As the PLL-based solution is
more hard-efficient and suit for the integrated circuit design.
Sigma-delta fractional-N divider applied to PLL-based
modulator can offer high frequency resolution, but it is
mainly suitable for transmitting narrowband signals, for the
data rate is limited by the loop bandwidth. To overcome the
design difficulty aforementioned, this paper presents pre-
distortion filter to relieve the loop bandwidth limitation.
The paper is organized as follows. Section 2 provides the
implementation of traditional EA PLL used as phase
modulator in detail and analyzes the limitation in wideband
phase modulation. Section 3 introduced pre-distortion filter
to avoid the loop band limitation, improving the wideband
phase modulation. Section 4 presents the simulation results
and performance analysis. Finally section 5 shows the
conclusion.
II. THE DESIGN OF PHASE MODULATION BASED EA PLL
The fractional-N phase locked loop is an important
component in modern wireless communication system,
EA PLLs advantage is that input signals can be processed
flexibly by sigma-delta modulator to control the phase
locked loop output signal, providing high frequency
resolution and quick band switching time, besides the
introduction of EA fractional divider avoids the spurs caused
by traditional fractional-N PLL [5].
mod
frac
MOD EA
Reference
Modulated
signal
TX data
Channel select
Fig. 1 The diagram of phase modulator based sigma-delta PLL
EA fractional frequency divider generates a series of 0 or
1 by many quantizers according to the fraction input signal.
The output average can achieve high precision. In order to
get phase modulation used by EA fractional-N PLL, firstly
the modulated division ratio should be generated. The
diagram of phase modulator based EA fractional-N PLL is
shown as Fig. 1.
Assuming the carrier frequency of modulated signal is
c
f ,
TX data rate is 1
s
T bps. Sigma-delta modulator is digital
discrete system with high sample ratio. Set the modulation
phase is sampled by
sample
T , according to the modulation
phase of TX data sampled at each sample time, EA PLL
changes the output frequency by modifying EA dividers
frequency division ratio. The average frequency during the
sample time can be calculated by taken modulated phase
derivative:
978-1-4673-2185-3/12/$31.00 2012 IEEE
( )
( ) ( ) 1
2
mod
sample
k k
f k
T

t

= (1)
( ) k is the sampled modulation phase at kth sample
time, during the time range (( 1) , )
sample sample
k T kT
( ) 1 k modulation phase takes transition from to ( ) k ,
( )
d mo
f k is exactly the modulation frequency that modulated
signal should be. According to the relationship between PLL
reference frequency and VCO output frequency:
.
vco ref
f f N F = (2)
The fractional ratio can be taken as (3):
( )
( )
c mod inst
mod
ref ref
f f k f
frac k
f f
+
= = (3)
Modulation frequency changed to modulation fractional
ratio as sigma-delta modulator input signal by (3). It means
that the N-divider provides the carry frequency signal while
the sigma-delta modulator provides the modulation signal.
According to the diagram shown as Fig. 1 the phase-domain
model is set as Fig. 2:
1
( ) s u
2
( ) s u
mod
( ) s u 1/ N
d
K ( ) F s
o
K
s
Fig. 2 the phase-domain mode of phase modulator
( )
mod
s u is the modulated phase generated by sigma-delta
modulator, ( )
1
s u
( ) 0 s =
)
is the phase of the reference signal,
assuming , then the transfer function of modulated
phase
1
u
(
mod
s u is:
( )
mod,
mod
( ) ( )
( ) ( ) /
out d o
d o
s k k F s
H s
s s k k F s N
u
u
= =
+
(4)
This function is exactly as same as the phase locked
loops closed loop transfer function which is a low frequency
passed filter. According to the amplitude and phase response
of PLL, when the bandwidth of modulated signal is wider
than the pass band of closed loop transfer function, the
modulation signal outside of the band would be filtered out,
causing the modulated information distortion. The modulated
signals band is proportional to the data rate, so the
maximum data rate is constrained by loop bandwidth when
using the fractional-N PLL as phase modulator. EA
III. THE WIDEBAND PHASE MODULATOR DESIGN
A. Operation with predistortion filter
the
phase only when the modulated phase changing
he loop, otherwise
e modulation would be distorted. In order to compensate
e
Ph
modulated
ase modulator based sigma-delta PLL can transfer
rate is lower than the cutoff frequency of t
th
th loops suppression to the high frequency signal, a pre-
distortion filter is introduced as Fig. 3. Before the phase
passing the loop, a pre-distortion filter enlarges the high
frequency signal to compensate the suppression of the loop,
making the total effect is that the phase signal is passing an
all pass filter without distortion.
( ) s u ( )
comp
s u
( ) C s ( ) ( ) H s G s
Fig. 3 the block diagram of proposed wideband modulator
To ensure the pre-distortion filters transfer responses can
perfectly cancelling the constrain effect of loop, set the pre-
distortion filter as the inverse of closed loop function:
( )
( ) ( )
1
1
s
C s
H s K F s
= = +

(5)
( ) F s is the transfer function of the loop filter, as for 3-order
LL, F(s) is a 2-order low pass filter; the tra
s follow:
P nsfer function is
a
2
( )
n n
2 2
n n
2
s +2
w s w
F s
w s w
c
c
+
=
+
(6)
Take ( ) F s ( ) C s : to
( )
3 2 2 2
n
s Kw +
n n n
2
n n
s +2 2
( )
(2 )
w s w K w
C s
K w s w
c c
c
+ +
=
+
(7)
e data assed rough the shaping filter getting the
ideal phase modulation signal
Th p th
( ) s u
istortio
, then handled by
ompensation filter being pre-d n which ou
com
c tput the
pensated phase ( )
comp
s u :
( ) ( )
comp
s s ( ) C s u = u (8)
It can be noticed that the compensation filter can be
completed by FIR d

filter an IIR filter cascading, the FIR
d IIR filter separately set as followed: filter an
( ) ( )
3 2 2
n n n n
( ) s +2 2
fir
T s w s w K w s Kw c c = + + +
2
(9)
2
n n
( ) 1 (2 )
iir
T s K w s w c = + (10)
According to the inverse Laplace transformation, the
phase si of
t omain
gnal can be expressed as the linear added
he derivativ eal phase signal , the time d
utput phase of FIR part can be expressed as
-ord
ation
( )
fir
t
e to id ( ) t
o followed:
( )
2
( ) '''( ) 2 ''( ) 2 '( )
( )
fir n n n
t t w t w K w t
t
c c

= + + +
+
(11)
Then ( )
fir
t go through the 1 er low pass filter
( ) T s and finally get the compensated modul
2
n
Kw
iir
hase p ( )
comp
s u . The diagram of compensation filter is
depicted as Fig. 4:
( ) t
( )
comp
t
( )
fir
t
( ) g t
'''
( ) A t
''
( ) B t
'
( ) C t
( ) D t
2
1
n n
(2 ) K w s w c +
Fig. 4 the diagram of compensation filter
The waveform of compensated phase is shown as Fig. 5.
The compensated phase amount to adding high frequency
signals to the ideal phase signal. The higher the data rate
transmitted, the high frequency signals amplitude rose
much more,
compensate higher for
rem
up
which means the changing rate of the
d phase range should be much more
edying more attenuation of PLL. Phase shifting also
exists to compensate the phase response of PLL.
0 200 400 600 800 1000
-10
-8
-6
-4
-2
0
2
4
6
8
10
sample point
p
h
a
s
e

s
i
g
n
a
l
modulation phase signal
ideal phase signal
compensated phase signal
Fig. 5 the compensated phase waveform compared with ideal
phase
B. The applicable condition
However there is applicable condition to apply the
compensated filter. Through the filter the changing rate of
the e
dividing ratio which is
sho
modulation fractional frequency
wn as Fig. 6.
According to (10), the amplitude response of ( )
iir
T s can
be expressed as:
( ) ( )
2
4
iir
T 1 2 jx K w x w c = + (12)
n n
phase is raised, leading to the enlargement of th
0 100 200 300 400 500
-1
-0.8
-0.6
-0.4
-0.2
0
0.2
0.4
0.6
0.8
1
n
f
r
a
c
t
i
o
n
a
l

f
r
e
q
u
e
n
c
y

d
i
v
i
d
i
n
g

r
a
t
i
o
n fractional frequency dividing ratio of sigma-delta modulator modulatia
with compensated
without compensated
Fig. 6 the modulation fractional frequency division ratio
Equation (12) must be less than
2
max
1
n
T Kw =
( )
comp
t
, so the
maximum compensated phase must m t the
relat
ee
ionship as (14):
( ) ( ) ( ) ( )
( )
'
'''
2
''
2
1
n
t
t
Kw

+
Assuming the data rate raised
1 2
comp
n n
t t t
K w w
c c

| |
s + +
|
\ .
+
(13)
M times, and then each
erivate part in (14) will be en because the
time is reduced to
d sample larged
1 M times of th inal: e orig
( ) ( ) ( )
( )
''
max max max
3 '''
max
M
comp
D C B
t M t M t
T T T

' 2
max
A
M t
T

= + +
(14)
+
is the maximum compensated phase of t
a g
max
M
comp

ta rate raisin
he
d M times. According to (1) the average
modulation frequency is enlarged either, and then the
maximum modulation fractional ratio can be obtained:
gnal.
However sigma-delta modulator has a requirement of the
range when it applied to PLL as a fractional
divider. The fundamental component of sigma-delta
mo
2
mod mod
3 4
mod mod
max '
'' '''
M
frac Mfrac M frac
M frac M frac
= +
+ +
(15)
It will be sent to sigma-delta modulator as input si
mod
input frequency
dulator is N bit accumulator, the input fraction has to
convert to N bit binary according to 2
N
F frac ( =
(
, and
then F is accumulated at each sample time, when the
accumulated value is more than 2
N
overflow is happened
and the carry is set to 1. If the input fraction
mod
frac is bigger
than 1, it has to be indicated by N + which
exceeded the N bit accumulators range, the truncation error
would produce wrong frequency dividing ratio causing that
modulation phase can not transmitted correctly S in order
to ensure that the frequency dividing ratio can indicate the
modulation phase correctly, the maximum compensated
modulation fractional ratio
mod
max
M
1 , bit binary
. o
frac shown as (16) must
be less than 1.
IV. SIMULATION
Fig. 7 shows the power m of ideal phase,
compensated phase before an , which
proves being th
spectru
d after PLL separately
ro
ncy
ugh the co of
high freque signal nce the whole
transfer charact
mpensation filter the power
ala is strengthen to b
eristic and enlarge the phase modulation band
effectively.
-1.5 -1 -0.5 0 0.5 1 1.5
x 10
7
-100
-80
-60
-40
-20
0
s
i
g
n
a
l

p
o
w
e
r
(
d
B
)
ideal phase
-1.5 -1 -0.5 0 0.5 1 1.5
x 10
7
-100
-80
-60
-40
-20
0
compensated phase
-1.5 -1 -0.5 0 0.5 1 1.5
x 10
7
-100
-80
-60
-40
-20
0
Frequency(rad/sec)
s
i
g
n
a
l

p
o
w
e
r
(
d
B
)
output of PLL without compensated
-1.5 -1 -0.5 0 0.5 1 1.5
x 10
7
-100
-80
-60
-40
-20
0
Frequency(rad/sec)
output of PLL with compensated
Fig. 7 power spectrum of the compensated phase compared with
ideal phase before and after PLL
0 500 1000 1500 2000 2500 3000 3500 4000
-100
-80
-60
-40
-20
0
20
40
60
80
100
with compensated
sample point
p
h
a
s
e

e
r
r
o
r
the phase error between ideal phase and modulated phase by pll
Fig. 8 phase error between ideal phase and PLL output phase
Fig. 7 (a) shows the ideal phase power spectrum, Fig. 7
(c) shows the modulated signal after the ideal phase passing
through PLL, there is obviously power suppression on the
frequency outside the loop band. Besides there is amplitude
overshooting inside the band. Both of them would lead to
phase distortion. Fig. 7 (b) shows the compensated phase
power spectrum, high frequency signal outside the band is
enhanced and part of the signals inside the loop is depressed
to balance the suppression outside the band and the
overshoot inside the band. Fig. 7 (d) is the modulated phase
power spectrum of the PLL output by compensated phase
passing through PLL, there is less distortion compared with
ideal phase signal and is more similar with Fig. 7 (a).
Through the pre-distortion filter the modulated phase
error is improved greatly. Fig. 8 depicts the phase error
between ideal phase and PLL output phase signal with
co r
rea
mpensated and uncompensated. The maximum phase erro
ched 80ewithout compensated while it is improved to
less than 10eby compensated.
V. CONCLUSION
In this paper a pre-distortion filter is proposed for the
high data rate phase modulation. By this structure the data
rate limitation is relieved in the PLL-based phase modulator.
Besides the phase modulation error is reduced effectively.
One issue with predistortion filter is that there is a condition
to improve data rate. The data rate can be raised M times
only by the maximum fractional dividing ratio less than 1
after compensated. Using the pre-distortion filter to improve
the wideband phase modulation, the maximum data rate can
be
This work is supported by the National Natural Science
Foundation of Ch F010501 and by
the
:
ohong Liu, Tsung-Hsien Lin, A Wideband PLL-Based G/FSK
Transmitt State Circuits,
vol.44, no.
[5]
(a) (b)
(c) (d)
improved to 2.85Mbit/s with 1MHz PLL cutoff frequency
by the standard of the phase error less than 10e while the
maximum data rate is only 400Kbit/s without predistortion
filter.
VI. ACKNOWLEDGEMENT
ina under Grant 61001032/
Fundamental Research Funds for the Central Universities.
REFERENCES
[1] Ioannis L.Syllaios, Poras T.Balsara, Robert Bogdan Staszewski,
Recombination of Envelope and Phase Paths in Wideband Polar
Transmitters, IEEE Trans. On Circuit and Systems Regular
papers, vol.57, no.8, pp.1891-1904, Aug.2010.
[2] F.Raab, P.Asbeck, S.Cripps, et al, Power amplifiers and transmitters
for RF and microwave, IEEE Trans. Microw. Theory Tech., vol.50,
no.3, pp.814-826, Mar.2002.
[3] Jingcheng Zhuang, Khurram Waheed, Robert Bogdan Staszewski, A
Technique to Reduce Phase/Frequency Modulation Bandwidth in a
Polar RF Transmitter, IEEE Trans. On Circuit and Systems :
Regular papers, vol.57, no.8, pp.2196-2207, Aug.2010.
[4] Ya
er in 0.18m CMOS, IEEE Journal of Solid-
9, pp.2452-2462, Sep.2009.
Tomas A. D. Riley. Delta-Sigma Modulation in Fractional-N
Frequency Synthesis. IEEE Journal of Solid-state Circuit, Vol.28,
No.5. May 1993.