SUNIL KUMAR

M. Tech (MICROELECTRONICS & VLSI) Department of Electrical Engineering Indian Institute of Technology, Kanpur sunilkmch50@gmail.com Objective:

July 10, 1984 A-412, sector- 46, Noida, G.B. Nagar Uttar Pradesh Ph.: (+91)9540068976

To obtain a suitable position that utilizes my creative thinking and my skills in Microelectronics and VLSI background. Educational background Degree/Certificate M. Tech VLSI) (Microelectronics & Institute /School, City IIT Kanpur, Kanpur Galgotias College of Engg. & Tech. Gr. Noida Year 2009 2006 CGPA/% 8.25/10 72.64%

B. Tech.(Electronics and Instrumentation) Courses of Interest Digital VLSI System Design Semiconductor Device Modeling Semiconductor Devices Technology ASIC Design

Solid State Devices Analog VLSI circuits Switching Theory logic design

Professional registration course from IIT Delhi Pursuing a course titled Synthesis of digital systems from IIT Delhi under professional candidate registration. Academic Achievements Achieved All India Rank 71 in Gate-2007. I was among top 5 students during my under graduation. M. Tech Thesis Low power CMOS implementation of 32-bit binary to logarithmic converter: A 32-bit binary to logarithmic converter is designed at 350 mV for very low power. This circuit converts input 32-bit binary word to its equivalent binary logarithm value. Pipelining technique is used to improve throughput of the design. Optimum value of the D-FF delay is calculated from simulation. Optimum value of the PMOS to NMOS width ratio is determined. Optimum stack sizing equations for maximum current driving strength are modeled for NMOS and NMOS stacks. Dynamic threshold voltage approach is used to reduce static power as well as to improve performance. Entire design is carried out in cadence GPDK bulk CMOS 90 nm technology. Cadence Spectre and Assura simulators are used to simulate schematic and layout of the design respectively.

Technical Skills EDA Tools

Programming Language

1. Cadence Custom IC design tools: Virtuoso schematic editor, Spectre, Virtuoso layout editor, Assura, NCSim. 2. Mentor Graphics: Design Architect, Eldo, IC-Station, calibre, ModelSim 3. HDL: Verilog, VHDL C, Assembly Language

M. Tech Projects Domain Monolithic microwave ICs Digital VLSI Design Description Gilbert cell phase detector design and its non ideal behavior at high frequency: - Gilbert cell is designed as a phase detector and showed how it shows error when frequency of input signal is very high. 16-bit carry look ahead adder design: - A 4-bit carry look ahead adder is designed and four such adders are connected in ripple mode to design 16-bit carry look ahead adder. Cadence Spectre simulator is used to simulate schematic design, virtuoso is used for layout. Comparative study of differential amplifier for various kinds of loads: Differential amplifier is simulated for diode connected load, current source load, current mirror load to compare gain, input impedance, output impedance.

Analog VLSI Design

Term papers Presented Negative bias temperature instability with thin SiON gate dielectric Issues with high performance Organic Thin film Transistor (OTFT) Workshops/seminars Attended Attended five days Synopsys training program from 20 to 24 September 2008 held at IIT Kanpur. Attended a seminar on Silicon on Insulator held at IIT Kanpur, July 2008 . Experience Presently Working as a Principal Patent Analyst on latest technology in electronics domain in CPA Global Noida from January 2010. Worked as a faculty Member in ICFAI University of Science and Technology Dehradun from Aug 2009 to Dec 2009. Worked as a lecturer in IIMT College Gr. Noida of engineering from Aug 2006 to May 2007. Teaching Assistantships at IIT Kanpur Courses/Lab electrical lab II (EE-381) Integrated circuit technology (EE-618)

Responsibility To maintain the lab and teach execution of the experiments. To solve assignments and grading students home assignments.

References Anupam Kumar Sinha: Entrepreneur, Custom IC Design Services at Yoctozant Technologies, Bangalore, E-mail : sinha.anupamkumar@gmail.com Dr. K. M. Soni: Deputy Director, Amity School Of Engineering And Technology Noida, Email: kmsoni@amity.edu Dr. S. Qureshi: Professor, Department of Electrical Engineering, IIT Kanpur, Kanpur, Email: qureshi@iitk.ac.in