Reg8086

P. Klimo 22/02/02

8086 Register Architecture.

Programmers Model

S Z

Flags Register S sign O overflow D - direction T - trap I - interrupt enable C carry P - parity A auxiliary carry Z - zero

Reg8086

P. Klimo 22/02/02

Formation of 20 bit Addresses using Segment Registers

Example 1: To access memory location C80BDh one can use different segment : offset combinations. E.g.:

Segment
C800 C100 C70C

Offset
BD 70BD FFFD

Shifted Segment + Offset

C8000 + BD = C80BD C1000 + 70BD = C80BD C70C0 + FFFD = C80BD

Reg8086

P. Klimo 22/02/02

Example 2:
Let CS = C100, SS = F100, SP =100 and DS = 100 Assume that the data and the program memories hold the following : DS : offset

100 : 0300
CS : offset

00 01 23h AB 00 FF .. .. FC 01 16 .. .. 05

02 8C 02 00 .. .. 03

03 04 35h FF
|

05 10 05 00 .. .. FE

06 00 06 90 .. .. 90

07 05 07 4F .. .. 4F

CALL [0500]

Next Instruction

C100 : 0100 . . C100 : 0500

03 05 .. .. C3

04 F3 .. .. 56

MOV AX [0305] | RET

And the memory stack holds:

SS : offset

F100 : 00F8 F100 : 0100

A3 F1
SP

A3 14

FF 01

17 02

45 52

B4 FF

C1 A0

00 FF

IP = 0100

SP = 0100

AX = ???? CALL [500h]

IP = 0500

SP = 00FE

AX = ????
SP

Memory Stack
SS : offset

F100 : 00F8 F100 : 0100

A3 F1

A3 14

FF 01

17 02

45 52

B4 FF

04 A0

01 FF

Reg8086

P. Klimo 22/02/02

The four byte long CALL instruction at program memory location C0200 consists of two byte opcode (FF16) and two byte operand (0005). The 16 bit current PC value (0100h) is incremented by four (why?) and pushed onto the stack, the high byte (01h) first and the low byte (04) second (why ?). Because the 8086 stack growth downwards the pointer to the top of the stack is decremented by two. The PC points to the memory holding the first instruction of the subroutine.

[0500] PC = 0503 SP = 00FE

MOV AX, [305] AX = 0010

The first instruction of the subroutine, MOV AX,[305h] , is three bytes long (
one byte opcode and two byte operand 0503 ) so the PC is incremented by three. The instruction loads the two bytes starting at the data memory 10305h into the accumulator, in the order low byte from 10305 and high byte from 10306. Thus after the MOV instruction executes the AX will hold 10h.

RET PC = 0104 SP = 0100 AX = 0010

The return instruction pops up the last two stack locations into the PC and increments the SP by two.

Note : Had we used an inter-segment subroutine instruction CALLF [CS: 0500] then four bytes (2 bytes for CS and two bytes for offset) would have been saved on the stack:
SP

Memory Stack after CALLF

SS : offset

F100 : 00F8 F100 : 0100

A3 F1

A3 14

FF 01

17 02

04 52

01 FF

00 A0

C1 FF

Reg8086

P. Klimo 22/02/02

Example 3: The Intra-Segment and Inter-Segment Subroutine Mechanism.

Consider the following program extract: 010B: 010D: 0110: 0110: 0113: 8B E8 F4 F7 8B C1 01 00 E3 D0 A_SUB: . . 0124: C3 RET MOV AX,CX CALL A_SUB HLT MUL BX MOV DX, AX

Trace the effect of CALL and RET on the contents of IP, SP and the stack.

Before
CALL 0001 IP SP 01E1: 01E2: 01E3: 01E4: IP SP 01E1 01E2 01E3 01E4 010D 01E4 ?? ?? ?? ?? RET 0125 01E2 ?? 10 01 ??

After

0111 01E2 ?? 10 01 ?? 0110 01E4 ?? 10 01 ??

Commentary: By the time these instructions come to be executed the assembler will have replaced the label A_SUB with one of two things: 1. If the subroutine with the first instruction labelled A_SUB is stored within 0FFFF locations of the CALL instruction, then the label A_SUB will be replaced by a 16 bit signed number. This number specifies what
5

Reg8086

P. Klimo 22/02/02

will need to be added to the contents of the IP (PC) register after execution of CALL has begun in order for CS:IP to point to the instruction labelled A_SUB. Thus in the above case the label in CALL A_SUB will be replaced by 0001. But this is not the only effect of CALL. It also pushes the 16 bit address offset of the instruction which follows CALL onto the stack. The execution of the RET instruction simply pops this value back to the IP. This type of CALL and RET is known as intra-segment instructions. 2. If the first instruction the subroutine is more than 0FFFF locations apart, the inter-segment form of CALL (CALLF) and RET (RETF) must be used. Now the assembler replaces the A_SUB label with a 4 byte number defining the absolute address of the first instruction (two bytes for CS and two bytes for IP). Similarly, the CALL instruction updates the values of the CS and IP accordingly and places on stack a four byte number representing the absolute address of the instruction following the CALL. When the RET instruction executes it pops these four bytes of the address to the CS and the IP.

Example 4:
Write a subroutine which on exit will load the register AX with the address of the next instruction. Solution : Get_Address: POP AX PUSH AX RET ; get the address from the stack ; re-set the SP (why ?)

Reg8086

P. Klimo 22/02/02

Assigning Segment Registers using the MASM Assembler:

my_data . . my_data

SEGMENT
Definition of data items goes here

ENDS

my_stack . . my_stack

SEGMENT
Definition of working storage

ENDS

my_code

SEGMENT

; Assign the above listed segment labels to the segment registers

ASSUME DS:my_data, SS:my_stack, CS:my_code MOV AX, my_data MOV DS, AX .

; Set the DS register to point to ; my_data segment label. ; Notice, segment registers cannot be ; loaded directly
The 8086 program code goes here

my_code

ENDS

Reg8086

P. Klimo 22/02/02

Specifying Offsets in Relations to Segment Registers: Object

Instruction

Segment
given by
CS IP

Offset
given by

Program data item

DS

Explicitly or in BX, SI or DI SP or BP

Working storage item

SS

Character string

ES

DI

Summary of 8088 Addressing Modes:

Addresing Mode
Register Immediate Direct Register indirect

Operand Format
reg data disp [BX] [BP] [SI] [DI] [SI]+ disp [DI]+ disp [BX] + disp [BP] + disp [BX+ SI +disp] [BP + DI + disp] [BP + SI + disp] [BP + DI + disp]

Example
MOV AX, BX MOV AX, 31 MOV AX, Total MOV AX,[BX]

Direct Indexed Base relative Base indexed

MOV AX, Total[SI] MOV AX, [BP+4] MOV AX, [BX+SI+3]

Reg8086

P. Klimo 22/02/02

Examples of Instructions using some of the Registers:

CX (Count Register ): May be used implicitly as a counter in a special LOOP machine instruction. SI (Source Index): Used with MOV instruction as an index for one dimensional data structures (also called vectors ): Example 1: Assume that an array of 4 elements starts at data memory location
DS:0300, then the machine instruction

MOV AL, [SI + 0300]

will copy the contents of the memory location DS:SI+0300 into the AL.

Example 2: Using CX and SI registers with MASM: Consider the following program extract: my_vector DB 1, 2, 3, 4
; Define an array of four ; bytes, holding ASCI ; codes for digits from 1 to 4. ; CX is the loop counter. ; SI is the index into the array. ; Get the array element with ; the index held in SI register. ; Increment the index. ; Each LOOP instruction ; decrements the CX register ; and jumps until CX=0

next:

MOV CX, 4 MOV SI, 0 MOV AL, my_vector [SI] INC SI LOOP next

Note : The machine instruction LOOP uses the CX register implicitly (without being told to do it). The MASM instruction MOV AL, my_vector[SI] corresponds to the machine instruction MOV AL, [mem + SI] where mem is the address offset in the current Data Segment (held in the DS register).

BP (Base Pointer) : May be used for base index addressing of segment memory locations:
INC BYTE PTR [BP+SI-45] ; increment memory location in SS segment