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Gowra P S
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Figure 1
RE = 470 Rc = 2.2.K R1 = 12K R2 = 2.2K CE = 47F Cc = 1F OR 0.1F Design:Let VCC = 10V, IE = IC = 2mA = 100 (for SL100) VCC Choose VCE = - = 5 V
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1.1: Nov 17, 2009 12:19 am -0600
a. To nd R E :-
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2 1 VRE = VCC = 1V 10 But VRE = IE RE VRE 1 RE = - = = 500 (Select IE 2 X 10-3
470)
1 Choose VCE = - VCC = 5 V 2 Applying KVL to the output loop VCC = VRC +VRE +VCE VRC = VCC - VRE - VCE = 10 - 1 - 5 = 4V RC = VRC /IC = 2K (Select 2.2K) Stability factor `S' is given by, 1+ S = . RE 1+ Rth +RE Assuming S=5 and substituting for RE , and S in the above equation we get Rth =1.9K (1) By applying KVL to the input loop, VR2 = VBE +VRE = 0.6+1 = 1.6V VCC Also Vth = R2 R1 + R 2 R2 = = 0.16 (2) R1 + R 2 From equations (1) and (2), we get R1 and R2 as, R1 = 12.K (Select 12K) R2 = 2.3K (Select 2.2K) XCE = 0.1RE = 47 1 CE = = 33.87F (Select 2 XCE PROCEDURE :a. To get frequency response:-
b. To nd R C :-
c. To nd R 1 & R 2 :-
47 F)
1. The connections are made as shown in the circuit diagram. 2. Before applying the input signal, the DC conditions are checked by setting VCC = 10V. VCE must be close to VCC 5V. 3. Input sinusoidal signal (around 20mV peak to peak ) should be applied using audio signal generator. 4. Keeping input signal Vin constant, the frequency of the input sine wave is varied from 100hz to 1MHz in suitable steps while measuring the output voltage for dierent frequencies. The gain of the amplier is calculated from these values.
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5. Also the gain in db is calculated and tabulated. The graph of frequency versus gain in db is plotted on a semi log sheet. 6. Bandwidth is calculated from the frequency response. Also gain bandwidth product is computed. Tabular Column:Vi = - mV Frequency (hz) 100Hz1MHz
V o A v = V o /V i
Table 1
Gain in
Frequency Response Curve:Mid freq. region 3dbBandwidthf2 Frequency in HzGain in dbf1 Low freq. regionHigh freq. Region
Figure 2
1. 2. 3. 4.
DRB is connected as shown in the circuit and let the resistance of DRB be zero. Input sine wave (20 to 50mV peak peak) is applied keeping the frequency in the mid band region. Output voltage Vo is measured. Resistance on DRB is increased till Vo reduces to half of its value. The DRB value gives the input impedance Zi of an amplier.
Figure 3
1. DRB is connected as shown in the circuit and let the resistance of DRB be high in terms of several kilo ohms or mega ohms. 2. Input sine wave (20 to 50mV peak peak) is applied keeping the frequency in the mid band region. 3. Output voltage Vo is measured. 4. Resistance on DRB is decreased till Vo reduces to half of its value. The DRB value gives the output impedance Zo of an amplier.
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Results:a. Band width (BW) = Hz b. Midband gain = Amid = c. Gain Bandwidth Product = BW X Amid = d. Input Impedance = e. Output impedance = b. FET Amplier:Circuit Diagram:-
Figure 4
From equation for current ID = IDSS (1 Vgs /Vp )2 ID /IDSS = (1 - Vgs /Vp )2 Substituting for ID , IDSS andVP , we get Vgs = - 1.65V Vgs = ID RS RS = Vgs /ID = 0.820K = 820 Choose RS = 1K Igs RG = Vgs RG = Vgs /Igs = 1.65/1A = 1.65M Applying KVL VDD = ID RD + ID RS +VDS VDD VDS ID RS RD = ID 10 5 2 = = 1.5K 2 Let RD = 1.5K
a. To nd R S :-
Design :From data sheet of BFW10/11 IDSS = 10mA VP = -3V or -4V Let ID = 2mA
b. To nd R G :-
c. To nd R D :-
d. To nd C S and C C :-
1 Cs = = 0.15F (Select 0.22F) 2 X100X103 X 10 PROCEDURE:Same as BJT amplier. VDS should be VDD 5V as DC Condition.
Tabular Column:Frequency
Vi = mV
V o A V = V o /V i Gain in db = 20 log 10 V o /V i
Table 2
100hz 1Mhz
Results:a. Band width (BW) = Hz b. Midband gain = Amid = c. Gain Bandwidth Product = BW X Amid = d. Input Impedance = e. Output impedance =
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