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A Novel Soft Switched Auxiliary Resonant Circuit of a PFC ZVT-PWM
Boost Converter for an Integrated Multi-chip Power Module Fabrication

Authors names: Yong-Wook Kim
1
, Jun-Ho Kim
2
, Ki-Young Choi
3
, Rae-Young Kim
4*
Mailing Address: EECS Lab., Annex of Engineering center 407, Hanyang University, 17
Haengdang-dong, Seongdong-gu, Seoul, 133-791, Korea
Authors Affiliations
1. Ph. D. degree in the Dept. of Electrical Engineering, Hanyang University, IEEE Student Member, and a
senior engineer in the R&D Team of Digital Appliances, Samsung Electronics.
wennirini@hanyang.ac.kr
2. M.S. degree in the Dept. of Electrical Engineering, Hanyang University. jackhammer@hanyang.ac.kr
3. Ph. D. degree in the Dept. of Electrical Engineering, Hanyang University. cometic@hanyang.ac.kr
4. Professor in the Dept. of Electrical Engineering, Hanyang University, and IEEE Member.
(Corresponding author) rykim@hanyang.ac.kr
Phone: +82-2-2220-4341
Fax: +82-2-2290-4825
Keywords: Auxiliary resonant circuit, Zero-Voltage Transition, PWM boost converter, Intelligent multi-chip
power module, Power Factor Correction.
This paper was presented at a conference IEEE IAS ANNUAL MEETING 2012.

Abstract This paper proposes a novel soft-switched auxiliary resonant circuit to provide a Zero-Voltage-
Transition at turn-on for a conventional PWM boost converter in a PFC application. The proposed auxiliary
circuit enables a main switch of the boost converter to turn on under a zero voltage switching condition and
simultaneously achieves both soft-switched turn-on and turnoff. Moreover, for the purpose of an intelligent
multi-chip power module fabrication, the proposed circuit is designed to satisfy several design constraints
including space saving, low cost, and easy fabrication. As a result, the circuit is easily realized by a low rated
MOSFET and a small inductor. Detail operation and the circuit waveform are theoretically explained and then
simulation and experimental results are provided based on a 1.8 kW prototype PFC boost converter in order to
verify the effectiveness of the proposed circuit.
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I. INTRODUCTION

Power converters are developing very quickly for various applications such as PFC, SMPS and so on. One
major force driving this development is the emergence of powerful and cost-effective integrated power multi-
chips modules, based on the new concepts of building structure and advanced packing technology [1]-[3]. This
leads to several performance improvements in power converters, such as high efficiency, high power density,
and long-term reliability, with decreasing converter cost.
Moreover, various converter techniques and topologies have been proposed and used in order to improve
converter performance. One widely used technique is soft switching, which generates electrical resonance
between a capacitor and an inductor during a short turn-on/-off period, and consequently achieves zero-voltage
and/or zero-current switching [4]-[10]. Several benefits of this technique include improving efficiency, reducing
stress and removing EMI noises, but its major drawback is the requirement for an auxiliary circuit to create
resonance phenomena at switching time. The requirement of the auxiliary circuit increases component costs and
circuit complexity of the converter system, yet even for applications in industry and home appliances, where
cost and easy fabrication are the most important aspects of the design, there are still impediments to using soft
switching techniques.
In recent years, the integrated multi-chip power module, which itself incorporates the aforementioned soft
switching transition technique, have been in demand, because of the high performance requirements for energy
efficiency, harmonics, EMI, and so on, due to enhanced regulations from government and energy societies. In
addition, other market competitors are consistently reducing their costs. However, these performance
requirements are significantly challenged, in the sense of space constraints, thermal management, high costs,
and unwieldy fabrication. That is, the auxiliary circuit to realize the soft switching technique in conventional
ZVT circuitry requires at least three components of large size (inductor, MOSFET and diode), which consumes
too much space and increases costs.
This paper proposes a novel auxiliary resonant circuit that can easily be incorporated into a multi-chip power
module. The proposed circuit is simple, being realized with a low rated MOSFET and a small inductor due to
full utilization of the conduction resistance, R
DS(on)
, of MOSFET, while providing Zero-Voltage-Transition turn-
on switching for a conventional PWM converter. At the same time, the MOSFET of the auxiliary circuit
operates under soft switching conditions during both turn-on and -off transitions. In addition, by minimizing the
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number of components and the required power rating, the circuit can easily and cost-effectively be incorporated
into multi-chips power modules. The operating principle and theoretical analysis of the proposed circuit are
explained in detail. We also provide design considerations and experimental verification for the target of the
proposed PWM boost converter for home application with Power Factor Correction (PFC).


























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II. PRINCIPLES OF OPERATION OF THE PROPOSED ZVT-PWM BOOST CONVERTER
A. Circuit Scheme and Assumption

Fig. 1. The proposed ZVT-PWM boost converter topology.

Figure 1 shows the circuit scheme of the proposed ZVT-PWM boost converter. This converter differs from
the conventional PWM boost converter of a resonant branch, which consists of a resonant inductor L
r
, a resonant
capacitor C
r
and an auxiliary switch S2 (MOSFET). Generally, the auxiliary switch S2 has a lower power rating
than that of the main switch S1 (IGBT). The resonant capacitor C
r
is the sum of the parasitic capacitor of S1 and
others incorporating multi-chip module technology.
The following assumptions are made in order to easily describe the steady state analysis during one
switching cycle:

a) The input voltage V
in
is constant.
b) The output capacitor C
O
is sufficiently large.
c) The main inductor L
f
is sufficiently large.
d) The main inductor L
f
is much larger than the auxiliary inductor L
r
.

B. Analysis of Operation Stages

For one switching cycle, the proposed circuit operations can be divided into eight stages. Waveforms and
equivalent circuits for each stage are shown in Figs. 2 and 3 respectively.

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Fig. 2. Theoretical waveforms of the proposed ZVT-PWM boost converter.


Fig. 3. Equivalent circuits during one switching cycle. (a) stage 1: t
0
-t
1
, (b) stage 2: t
1
-t
2
, (c) stage 3: t
2
-t
3
, (d) stage 4: t
3
-t
4
, (e) stage 5: t
4
-t
5
,
(f) stage 6: t
5
-t
6
, (g) stage 7: t
6
-t
7
, (h) stage 8: t
7
-t
0

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Stage 1[Fig. 3(a): t
0
< t < t
1
]: The main switch S1 and the auxiliary switch S2 are off before t
0
. When the
auxiliary softly turns on at t
0
, the auxiliary inductor L
r
current linearly increases from 0 to I
i
at t
1
. During this
period the diode D is conducted.
The time period t
01
of this stage is given by

01
i r
Out
I L
t
V
=
(1)

Stage 2[Fig. 3(b): t
1
< t < t
2
]: In this stage, the circuit starts to resonate between L
r
and C
r
. The auxiliary
inductor current I
Lr
continues to increase up to I
S2_peak
. C
r
is discharged until the resonance brings its voltage to
zero. This resonant time period t
12
is given by

12
2
r r
t L C
t
=
(2)

The following equation is obtained for the peak current of the auxiliary switch I
S2_peak
:

( ) ( )
2_
2 1
sin
r r
S peak L i C
out
i
I I I I
V
I t t
Z
e
= =
= +

(3)

where, / , 1/
r r r r
Z L C L C e = =

Stage 3[Fig. 3(c): t
2
< t < t
3
]: When the anti parallel diode is conducting, the main switch current flows
negatively for a very short time. The main switch voltage V
CE_S1
is zero at t
3
. The main switch S1 is turned-on
under the ZVS condition.

Stage 4[Fig. 3(d): t
3
< t < t
4
]: The main switch current I
S1
increases, while the auxiliary switch current I
S2

decreases. Therefore, the sum of both switch currents is equal to Ii. In this stage, IGBT and MOSFET can be
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changed to the voltage source (V
sat_S1
) and on-resistance (R
DS(on)_S2
) respectively for analysis. This is because the
characteristic of the current flowing through the two switches is determined by the resistance elements of each
switch. The equation for current (I
Lr
) is given by

_ 1 ( ) _ 2
34
r
r
L
sat S r DS on S L
di
V L R i
dt
= +
(4)

at the initial condition
i Lr
I t I = ) (
3
. The solution of Eq. (4) becomes
4 4
_ 1
4
( ) _ 2
( ) (1 )
r
sat S t t
L i
DS on S
V
I t I e e
R
o o
= +
(5)
where,
( ) _ 2 DS on S
r
R
L
o = . Therefore, Eq. (5) determines how the slope of the current I
Lr
falls down. The slope
of current I
Lr
decreases by
4
t
i
I e
o
term during t
3
-t
4
. Also, the converging value of current I
Lr
can be determined
by the
4
_ 1
( ) _ 2
(1 )
sat S t
DS on S
V
e
R
o
term at t
4
.

Stage 5[Fig. 3(e): t
4
< t < t
5
]: The auxiliary switch S2 is softly turned off. The flowing current in the
auxiliary inductor is converted to voltage on the parasitic capacitor of S2. The auxiliary inductor current I
Lr
is
zero at t
5
. The relationship between voltage and current can be represented by the following equations

_ 2
4 5
5
4 5
( )
( )
r
DS S
L
C r
di t
v t L
dt

=
(6)
4 5
_ 1
5
( ) _ 2
( ) (1 )
r
sat S t
L
DS on S
V
i t e
R
o

=
(7)

where,
( ) _ 2 4 5 DS on S r
R t L

>> and t
4-5
= the period from t
4
to t
5
. Therefore, Eq. (7) can be simplified as Eq.
(8) by assuming
( ) _ 2
4 5
4 5
0
DS on S
R
t
t
Lr
e e
o

= ~ :
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_ 2
_ 1
5
( ) _ 2
( )
DS S
sat S
C r
DS on S
V
v t L
R t
~
A

(8)
_ _ 2
_ 2
G off S
r DS S R
t L C t t A = +
(9)

The voltage stress value on S2 can be found by Eq. (8). From (9), t A consists of a half cycle resonant time
_ 2 r DS S
L C t and a turned-off delay time
_ _ 2 G off S
R
t . The half cycle resonant time is decided by the values of
L
r
and C
r
. Also, the turn-off delay time is achieved by adjusting the gate off-resistance R
G_off
of S2. The time
between R
G_off_S2
and the turn-off delay time is a proportional relationship. The proposed ZVT-PWM boost
converter is implemented with very small values of L
r
and C
r
. So, the resonant time can be negligible. To
achieve sufficiently small
_ 2 DS S
C
v within the rated voltage of S2, the R
G_off_S2
is selected to be greater than the
value of its specifications.

Stage 6[Fig. 3(f): t
5
< t < t
6
]: This stage is identical to the conventional PWM boost converter behavior. D is
turned off at t
5
. The main switch S1 conducts and I
i
flows while the auxiliary circuit is inactive.

Stage 7[Fig. 3(g): t
6
< t < t
7
]: At this stage, the main switch is turned off, and the resonant capacitor C
r
is
linearly charged up to V
in
voltage. The diode D is turned-on naturally at t
7
.

Stage 8[Fig. 3(h): t
7
< t < t
0
]: This stage is a freewheeling condition as in the conventional PWM boost
converter. The main switch S2 turns on again at t
0
and the operation mode repeats.

III. DESIGN PROCEDURE
A. Specification of the Proposed ZVT-PWM Boost Converter

The design specifications of an air-conditioner with a PFC converter are shown in Table I. A prototype of
the proposed ZVT-PWM boost converter is shown in Figs. 4 and 5. It has been built to verify the analytical
results using components in Table II.
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Fig. 4. Experimental circuit scheme of a 1.8kW, 16kHz ZVT-PWM boost converter.

TABLE I
SPECIFICATIONS OF THE PROPOSED ZVT-PWM BOOST CONVERTER.
Parameters Description Values
V
in
Input voltage 200Vac
V
out
Output voltage 304Vdc
V
out_ripple
Output voltage variation Vout5%
I
i_ripple
Boost inductor current variation Ii5%
f
line
Input voltage frequency 50Hz or 60Hz
f
sw
Switching frequency 16kHz
P
out
System capacity 1.8kW
Boost converter efficiency > 0.95


Fig. 5. Picture of the proposed ZVT-PWM boost converter.
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TABLE II
COMPONENTS VALUE OF THE PROPOSED ZVT-PWM BOOST CONVERTER.
Parameters Description Values
L
f
Boost inductance 4mH
L
r
Auxiliary inductance 1.5uH
S1 Main switch(FGH40N60SFD)
IGBT, 20A, 600V
V
CE(sat)
=2.3V
S2 Auxiliary switch(FQA11N90)
MOSFET, 11A, 900V
R
DS(on)_S2
=0.96
R
G_off_S2
Gate off-resistance of the S2 130
C
O
Output capacitance 940uF(470uF*2ea)
C
r
Auxiliary capacitance 2.2nF
BD Bridge diode(GBPC3506) 35A, 600V
D Main diode(RHR3060) 30A, 600V

B. Selection of L
f
and C
O


To minimize both the current ripple and the voltage ripple, we design L
f
and the C
O
to be as large as possible.
However, the system cost increases according to the stringency of the specification. The optimized C
O
and L
f
of
the proposed ZVT-PWM boost converter are designed by (10) and (11) as below [11]:
( )
2
(min)
(min)
_
2
1
2 %
in
in
i ripple sw out out
V V
Lf
I f P V q
| |

> |
|

\ .

(10)
_
2
out
O
line out ripple out
P
C
f V V t
>


(11)

C. Selection of S2

At the turn-on condition, the auxiliary switch current I
S2
flows through the drain to the source for a very
short time (a few microseconds) and its duty ratio is less than 0.1. In this paper, the on-time of S2 is within 3us.
This design value of the auxiliary switch S2 can be applied in order to select the MOSFET (FQA11N90) device
by using the pulse drain current specifications. Usually, the maximum pulse drain current is about 4 times the
value of the continuous drain current [12]. In addition, the predicted value of I
S2_peak
from Eq. (3) can be applied
to select the auxiliary switch. The auxiliary switch MOSFET should be more than twice the calculated value of
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I
S2_peak
while the pulse drain current is 45.6A. In order to achieve a rapid decrease in the slope of I
S2
, S2 is
selected to satisfy the following condition:

_ 1 _ 2 ( ) _ 2 sat S S S DS on S
V I R <
(12)

where I
S_S2
is the maximum continuous drain-source forward current of S2. When the R
DS(on)
of S2 is selected
sufficiently large, the voltage stress of S2 is much smaller than its rated voltage from (7).

D. Selection of L
r
and C
r


To achieve ZVT turn-on of the main switch, the turn-on signal of S1 should be applied while its anti parallel
diode is conducting. Moreover, the I
S2_peak
must be greater than the value of I
i
. This value is determined by L
r

and C
r
. From (3), the L
r
and the C
r
can be approximated.

IV. SIMULATION AND EXPERIMENTAL RESULTS
A. Simulation Results

The proposed system is simulated in PSIM software. A real model of each power device is used in the
schematic based on the device data sheets. The simulated waveforms of the proposed ZVT-PWM converter are
shown in Fig. 6. As can be seen in the simulation results, the main switch is ZVT turned-on and softly turned-
off. The auxiliary switch is softly turned-on and -off. When the I
S2
decreases sufficiently, the voltage stress on
S2 is much smaller than the rated voltage of the S2 based on (7) and (8).
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Fig. 6. Simulation waveforms for the proposed ZVT-PWM boost converter.

B. Experimental Results

A control circuit with the DSP chip (TMS320F28335) has been used for this experiment. The current and the
voltage of the converter are sensed using LEM HX 20-P and LEM LV 25-P respectively.

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Fig. 7. Waveforms of the 1.8kW 16kHz experimental proposed PWM-ZVT boost converter at full load.


Fig. 8. Measured currents and voltages of two switches at 1.8kW 16kHz.

The waveforms of the input and output currents and voltages are shown in Fig 7. These waveforms are
measured at the rectified node. The input current is in phase with the input voltage (PFC). Because of using
resistive load, the output voltage V
out
is adjusted to 304V to satisfy the 1.8kW system capacity. V
out
is 30414V
dc
,
as expected. The current and voltage waveforms of the main switch S1 and the auxiliary switch S2 are shown in
Fig. 8. The main switch is ZVT turned-on and the auxiliary switch is softly turned-on and -off. These results are
very similar to the simulation waveforms. In addition, the voltage stress of S2 was measured as 40V
peak
at
turned-off time. This value is much smaller than the rated voltage of the auxiliary switch. There is no additional
voltage stress on S2. In Fig. 9, the voltage and current waveforms of S2 are shown. S2 is operated a very short
time within the duty factor 0.05.
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Fig. 9. Measured current and voltage of S2 at 600W 16kHz.

C. Comparison of the Proposed ZVT-PWM Boost Converter and the Conventional ZVT-PWM Boost
Converter

Table III compares the auxiliary circuits of the proposed and conventional topologies. In spite of a larger
capacity and lower switching frequency, the proposed topology uses smaller L
r
and C
r
than those of the
conventional topology. Also, no clamped diode is used in the proposed topology. These advantages enable an
auxiliary circuit that is simple, small, and low cost. The auxiliary circuit very simply consists of L
r
, C
r
and S2.

TABLE III
COMPARISON THE AUXILIARY CIRCUITS OF THE PROPOSED AND CONVENTIONAL TOPOLOGIES.
Parameters Description
Proposed
Topology
Conventional
Topology
P
out
System capacity 1.8kW 600W
f
sw
Switching frequency 16kHz 100kHz
L
r
Auxiliary inductance 1.5uH 16uH
C
r
Auxiliary capacitance 2.2nF 4.4nF
D2 Clamped diode none Used

Figures 10 and 11 show the switching waveforms (S1 and S2) of the proposed and conventional topologies.
In both cases, the same circuit parameters including the same values of L
r
and the C
r
are employed, but the
system capacity is smaller than 600W compared to the conventional one. As shown in Fig. 10, the proposed
topology provides a smooth turned-off waveform at the S1 and S2, without voltage spikes and current ringing.
However, the conventional topology, as shown in Fig. 11, experiences a large voltage spike at the S2 and current
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ringing at S1, when the switch S1 is turned-off. This behavior makes the proposed topology an improved EMI
performance, while providing a high converter efficiency of 97.5%.


(a) (b)
Fig. 10. Measured currents and voltages of S1 and S2 during one switching cycle in the proposed topology at 600W 16kHz.
(a) Waveforms of S1, (b) Waveforms of S2.


(a) (b)
Fig. 11. Measured currents and voltages of S1 and S2 during one switching cycle in the conventional topology at 600W 16kHz.
(a) Waveforms of S1, (b) Waveforms of S2.

Figures 12 and 13 show the measured graphs of Conducted Emission for the both topologies by using a
ROHED & SCHWARZ ESCI EMI TEST RECIVER. When comparing the two graphs, a low frequency range
shows similar performance, but in the high frequency from 4MHz to 26MHz, the Conducted Emission (CE) of
the proposed topology improved to 4dB smaller than the conventional topology, due to the smooth switching
transient at the S1 and S2. This enables the EMI filter design to satisfy the international regulations of
Conducted Emission.
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Fig. 12. Measurement graph of CE for the proposed topology.


Fig. 13. Measurement graph of CE for the conventional topology.

V. CONCLUSION
This paper presents a new ZVT-PWM boost converter with an active snubber. This simple snubber circuit
can be integrated into the multi-chips power module. The operation of the proposed circuit was described
theoretically. As shown, the proposed method has a reduced circuit complexity, a minimized auxiliary inductor
and reduced Conducted Emission. Also, the main switch and the auxiliary switch are confirmed to have ZVT
turned-on and softly turned-on and -off. The voltage stress of the auxiliary switch is found to be about 5.6%
which is quite low for the proposed converter system.
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ACKNOWLEDGMENT
The authors would like to thank Dr. Bum-Seok Suh and Mr. Min-Gyu Park of Samsung Electro-Mechanics,
Korea for their financial support and technical direction on this research.


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